Philips Bds4223v 27 Service Manual LCD

CONFIDENTIAL Issue: 22.July.05 Version: 1.
42PDP SERVICE MANUAL MODELBDS4223V/27 PANELVVEPP42SD-YD05-
Collation: Andy Lai
CONTENTS
1. IMPORTANT SAFETY PRECAUTIONS 2. SPECIFICATION 1-2
...2-8
3. FACTORY & ELECTRONIC ADJUSTMENT .3-15 4. BLOCK DIAGRAM 4-2 ..5-6
5. TROUBLE SHOOTING GUIDE 6. P.C. BOARD TOP VIEW
..6-7
7. ELECTRONIC MODULE LIST ...7-1 8. EXPLODED VIEW 8-1
9. PACKAGING LIST 9-1
IMPORTANT SAFETY PRECAUTIONS
VER1.0
1. Before returning an instrument to the customer, always make a safety check of the entire instrument, including, but not limited to, the following items. a. Be sure that no built-in protective devices are defective and/or have been defeated during servicing. (1) Protective shields are provided on this chassis to protect both the technician and the customer. Correctly replace all missing protective shields, including any removed for servicing convenience. (2) When reinstalling the chassis and/or other assembly in the cabinet, be sure to put back in place all protective devices, including, but not limited to, nonmetallic control knobs, insulating paper, adjustment and compartment covers/shields, and isolation resistor/capacitor networks. Do not operate this instrument or permit it to be operated without all protective devices correctly installed and functioning. b. Be sure that there are no cabinet openings through which an adult or child might be able to insert their fingers and contact a hazardous voltage. Such opening include, but not limited to, (1) excessively wide cabinet ventilation slots, and (2) an improperly fitted and/or incorrectly secured cabinet back cover. c. Leakage Current Hot CheckWith the instrument completely reassembled, plug the AC line cord directly into a 120V AC outlet. (Do not use an isolation transformer during this test.) Use a leakage current tester or a metering system that complies with American National Standards Institutes (ANSI) C101.1 Leakage Current for Appliances and Underwriters Laboratories (UL) 478. With the instrument AC switch first in the ON position and then in the OFF position, measure from a known earth ground (metal water pipe, conduit, etc.) to all exposed metal parts of the instrument (antennas, handle bracket, metal cabinet, screw heads, metallic overlays, control shafts, etc.), especially any exposed metal parts that offer an electrical return path to the chassis. Any current measured must not exceed 0.7 mini-ampere. Reverse the instrument power cord plug in the outlet and repeat test. ANY MEASUREMENTS NOT WITHIN THE LIMITS SPECIFIED HEREIN INDICATE A POTENTIAL SHOCK HAZARD THAT MUST BE ELIMINATED BEFORE RETURNING THE INSTRUMENT TO THE CUSTOMER.
AC Leakage Test
LEAKAGE CURRENT TESTER DEVICE UNDER TEST TEST ALL EXPOSED METAL SURFACES 3. WIRE CORD ALSO TEST WITH PLUG REVERSED (USING AC ADAPTER PLUG AS REQUIRED)
(READING SHOULD NOT BE ABOVE 3.5mA)
+ -
EARTH GROUND
1-1
IMPORTANT SAFETY PRECAUTIONS

2. Read and comply with all caution and safety-related notes on or inside the cabinet.
VER1.0
3. Design Alteration WarningDo not alter or add to the mechanical or electrical design of this unit. Design alterations and additions, including, but not limited to, circuit modifications and the addition of the items such as auxiliary audio and/or video output connections might alter the safety characteristics of this TV Monitor and create a hazard to the user. Any design alterations or additions will void the manufacturers warranty and will make you, the service, responsible for personal injury or property damage resulting therefrom. 4. Observe original lead dress. Take extra care to assure correct lead dress in the following areas: a. near sharp edges, b. near thermally hot partsbe sure that leads and components do not touch thermally hot parts, c. the AC supply, d. high voltage, e. antenna wiring. Always inspect in all areas for pinched, out-of-place, or frayed wiring. Do not change spacing between components, and between components and the printed-circuit board. Check AC power cord for damage. 5. Components, parts, and/or wiring that appear to have overheated or are otherwise damaged should be replaced with components, parts, or wiring that meet original specifications. Additionally, determine the cause of overheating and/or damage and, if necessary, take corrective action to remove any potential safety hazard. 6. PRODUCT SAFETY NOTICE Many electrical and mechanical parts have special safety-related characteristics some of which are often not evident from visual inspection, nor can the protection they give necessarily be obtained by replacing them with components rated for higher voltage, wattage, etc. Parts that have special safety characteristics are identified in this service data by shading with a mark on schematics and by shading or a mark in the parts list. Use of a substitute replacement part that does not have the same safety characteristics as the recommended replacement part in this service data parts list might create shock, fire, and/or other hazards. 7. Outdoor Antenna Grounding
If an outside antenna or cable system is connected to the TV receiver, be sure the antenna or cable system is grounded so as provide some protection against voltage surges and built-up static changes.
Section 810 of the National Electrical Code, provides information with respect to proper grounding of the mast and supporting structure, grounding of the lead-in wire to an antenna discharge unit, size of grounding conductors, location of antenna-discharge unit, connection to grounding electrodes, and requirements for the grounding electrode.
1-2
SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

1. 2. 2.1. SCOPE: These specifications describe all the characteristics of the 42 inch color monitor. ELECTRICAL REQUIREMENTS: Display panel: a. b. c. d. e. f. Screen size Aspect ratio Number of pixels Pixel Pitch Luminance Chromatically Specification
VER1.0
Diagonal 42 inch 16:9 wide 852(Horizontal, RGB Trio ) X 480(Vertical)pixels 1.095mm(Horizontal) X1.110mm(Vertical) 1000cd/m2,at 1% White Window x=0.2750.03, y=0.2850.03(color temperature COOL ) at center block white pattern 100% (mosaic). x=0.2850.03, y=0.2930.03(color temperature NATURAL ) at center block white pattern 100% (mosaic). x=0.3130.03, y=0.3290.03(color temperature WARM ) at center block white pattern 100% (mosaic). 100 ~ 240 Vac , 50 / 60 Hz 4.0 A 60 A p-p/20ms Max. 380 Watts ( at 110Vac/all white pattern) 400 Watts Max 8 Watts Max. (at 110Vac) RCA Jack for audio, video Y/CB/CR and Y/PB/PR 4 pin Din S-terminal 9 pin D-SUB 15 pin D-SUB 24 pin DVI Analog Positive Video: 1Vp-p (with sync) S-Video: Y: 1Vp-p ,C: 0.286Vp-p H: 15.734KHz V: 60Hz (NTSC) 75 ohms Analog Positive Y: 1Vp-p (with sync) Pb/Cb: 0.7Vp-p ,Pr/Cr: 0.7Vp-p H: 15.734KHz V: 60Hz (480i) H: 31KHz V: 60Hz (480p) H: 45KHz V: 60Hz (720p) H: 33KHz V: 60Hz (1080i)
2.2.
Power Source: a. b. c. d. Input voltage Input current Inrush current Power consumption
e. Stand-by & DPMS 2.3. Input Signal:
2.3.1 Connector Type:
2.3.2 Video/S-Video Signal: a. Type b. Polarity c. Amplitude d. Frequency e. Input impedance 2.3.3 COMPONENT Signal: a. Type b. Polarity c. Amplitude d. Frequency Y/CB/CR: Y/PB/PR: HDTV
2-1

2.3.4 RGB Signal: a. Type b. Polarity c. Amplitude d. Frequency 2.3.5 DVI Signal: a. Type b. Polarity c. Frequency d. HDCP Encryption 2.3.6 Audio Signal: Digital Positive or Negative H: support to 31K~69KHz V: support to 50~85Hz Enabled Analog 500mV rms /more than 22Kohm TTL Positive or Negative RGB: 0.7Vp-p H: support to 31K~69KHz V: support to 50~85Hz
VER1.0
2.3.7 Pin Assignments For D-SUB Connector (In / Loop Out): Pin 1 2 3 4 5 Pin 1 2 3 4 5 6 7 8 Signal Assignment RED GREEN BLUE GND GND Signal Assignment TMDS Data 2TMDS Data 2+ TMDS Data 2/4 Shield TMDS Data 4TMDS Data 4+ DDC Clock DDC Data No Connect Pin 6 7 8 9 10 Pin 9 10 11 12 13 14 15 16 Signal Assignment RED GND GREEN GND BLUE GND NC GND Signal Assignment TMDS Data 1TMDS Data 1+ TMDS Data 1/3 Shield TMDS Data 3TMDS Data 3+ +5V Power Ground (For +5V) Hot Plug Detect Pin 11 12 13 14 15 Pin 17 18 19 20 21 22 23 24 Signal Assignment GND SDA H-SYNC V-SYNC SCL Signal Assignment TMDS Data 0TMDS Data 0+ TMDS Data 0/5 Shield TMDS Data 5TMDS Data 5+ TMDS Clock Shield TMDS Clock + TMDS Clock -
2.3.8 Pin Assignments For 24 Pin DVI Connector (Digital Only):
2-2

2.3.9 MODE LIST FOR RGB/DVI : Mode No 1 2 3 4 6 7 8 9 10 11 12 13 14 18 19 20 21 22 23 Resolution 640(VGA)480 640(VGA)480 640(VGA)480 640(VGA)480 800(SVGA)600 800(SVGA)600 800(SVGA)600 800(SVGA)600 1024(XGA)768 1024(XGA)768 1024(XGA)768 1024(XGA)768 1280(SXGA)1024 720(DOS)400 852(VGA)480 1280(HDTV)720p 1920(HDTV)1080i 640(VGA)350 720(HDTV)480p Refresh Rate (Hz) 60 72 75 85 60 72 75 85 60 70 75 85 60 70 60 60 60(i) 70 60 Horizontal Vertical Frequency Frequency (K Hz) 31.469 37.900 37.500 43.269 37.879 48.077 46.879 53.674 48.364 56.476 60.023 68.677 63.981 31.469 31.413 45.000 33.750 31.469 31.469 (Hz) 59.940 72.810 75.000 85.008 60.317 72.188 75.000 85.061 60.004 70.069 75.029 84.997 60.020 70.087 59.835 60.000 60.000 70.087 59.940 Vertical Sync Polarity (TTL) + + + + + + + + + + + Horizontal Sync Polarity (TTL) + + + + + + + + + + +
VER1.0
Dot rate (MHz) 25.175 31.500 31.500 36.000 40.000 50.000 49.500 56.250 65.000 75.000 78.750 94.500 108.000 28.322 30.000 74.250 74.250 25.175 27.000
Attention : For HDTV S.T.B.(Set Top Box). 2.3.10 Y/PB/PR For Component: Mode No 1 2 3 2.4. Resolution 640 480p 1920 1080i 1280 720p Refresh Rate 60 60 60
Display Performance Requirements: The data of display performance are measured based on the following conditions unless otherwise specified. a. b. c. d. e. f. Ambient temperature Warm up period Line input voltage : Viewing distance Display mode Brightness condition 255 30 minutes Min. 100 Vac ~ 240 Vac (50 / 60 Hz) Distance from screen is 81 cm Test with window white pattern mode if not specified. Press recall bottom to set default brightness Support to 1280 x 1024
2.4.1 Maximum Resolution:
Horizontal Size (Standard) 920.1.0.5 mm (for mode 126) Vertical Size (Standard) 518.40.5 mm (for mode 126)
2-3

2.4.2 Maximum Brightness Level: a. 100% center block white pattern(mosaic) b. Raster background 2.5. Operation: Main unit button Timing Mode 1
VER1.0
More than 30FL (while pressing recall button to set default brightness) Less than 0.4FL (while pressing recall button to set default brightness) Main power switch (power ON /OFF) Power ON/OFF Input Select (TV -> AV1 ->AV2 -> COMPONENT 1 -> COMPONENT 2-> RGB -> DVI->TV run in circle) Menu key Select ,/CH , Volume -,+/Adjustment , Power on/off MUTE Display Input Select (same as Main unit button) Volume -,+ Wide : TV/AV1/AV2/COMPONENT 1/2 480i input: 4:3/16:9/PANORAMA (ZOOM1/ZOOM2/ZOOM3/OFF For 16:9 Only) COMPONENT 1/2 480p/720p/1080i input: 4:3/16:9 Analog RGB input : 4:3/16:9 DVI input : 4:3/16:9 Menu -,+ Adjustment -,+ RECALL PIP ,SOURCE,SWAP,POSITION USE FOR TV MODE: V-CHIP FAV.CH,FAV.QV,CCD,MTS,CH LOCK, SLEEP TIMER, Number Select, CH DIRECT KEY: POWER ON,POWER OFF,RGB,TV,AV1,AV2,COMPONENT1/2,DVI PICTURE: Picture Mode, Contrast, Brightness, Color, Tint, Sharpness Color Temperature, Noise Reduction, Format, Image Shift SOUND: Bass, Treble, Balance, Volume, Surround, Speaker Audio Output SETUP: Language, Sleep Timer, Pass Code, Closed Caption V-Chip, OSD Timeout, OSD Background Power Save(no function), Full White(no function) INFO: S/W Version, H-Frequency, V-Frequency, Video System
IR Remote Control
2.5.1 Adjustable Items: AV1/AV2 Input
2-4

COMPONENT 480i/480p/720p/1080i input
VER1.0
Analog RGB input
DVI input
PICTURE: Picture Mode, Contrast, Brightness, Color, Tint, Sharpness Color Temperature, Noise Reduction, Format, Image Shift V-Position, H-Size, H-Position, Clock Phase SOUND(same as AV1/AV2 input) SETUP: Language, Sleep Timer, OSD Timeout, OSD Background Power Save(no function), Full White(no function) INFO: S/W Version, H-Frequency, V-Frequency, Resolution PICTURE: Picture Mode, Contrast, Brightness, Color Temperature Format, Noise Reduction, V-Position, H-Size, H-Position Clock Phase SOUND(same as AV1/AV2 input) SETUP: Language, Sleep Timer, OSD Timeout, OSD Background Power Save, Full White INFO(same as COMPONENT 480i/480p/720p/1080i input) PICTURE: Picture Mode, Contrast, Brightness, Color Temperature Format, Noise Reduction, V-Position(no function) H-Size(no function), H-Position(no function) Clock Phase(no function) SOUND(same as AV1/AV2 input) SETUP(same as Analog RGB input): INFO(same as COMPONENT 480i/480p/720p/1080i input) Without/Stand 1096 mm 693 mm 105.5 mm 1250 mm 1120 mm 450 mm 43 Kgs (w/o stand) 50 Kgs (w/ stand) 61.2 Kgs With/Stand 1096 mm 761 mm 3061 mm
3.
DIMENSIONS: Width Height Depth 3.1. Package Dimensions: Width Height Depth 3.2. Weight: Net weight Gross weight
4. 4.1.
ENVIRONMENT: Operating: Temperature Relative humidity Pressure 4.2. Non-Operating: Temperature Relative humidity Pressure Vibration 4.3. Acoustics: (IHF A-weighted 1meter) 0~40 20~80% 700~1114 hpa X/Y/Z, 0.5G/10~55Hz(sweep), 10 minutes 40dB Max. 0~40(32~105) 20~80% 800~1114 hpa
2-5

5. SOUND: 500W Max. a. Residual hum (at volume min) b. Practical max. Audio output (at 10% THD max.) 1.0vp-p 1K Hz input 5W +5W Max. /16 ohm c. Sound distortion (at 250 mw 1K Hz) 1% Max. 1.0 VP-P d. Audio output (input at 1.4VP-P) 1000W Max. e. Max. hum (at volume max) 150mV 3dB f. Sensitivity (at volume max. O/P 1W) at 1KHz AV Input g. Audio Fidelity (1KHz 0dB,corrected for emphasis characteristics) 11dB 3dB WOOFER ON 60Hz 4dB 3dB 10KHz 6dB 3dB BBE ON 60Hz 8dB 3dB 10KHz -1dB 3dB WOOFER & BBE OFF 100Hz -1dB 3dB 10KHz 7. 8. 8.1 Reliability Requirement: The MTBF needs 20000hrs under operation 255(half luminosity, motion picture) REGULATORY REQUIREMENTS: Safety Requirement: a. UL b. CSA c. TUV 8.2 Safety of information technology equipment including electrical business equipment Safety of information technology equipment including electrical business equipment
VER1.0
Emission Requirement: The unit shall meet the EMI limits in all screen modes. For EMI testing, the unit must be failed with the screen pattern consisting of scrolling capital H characters also the brightness contrast will be adjusted to max. Level. a. FCC class B part 15
8.3
Transit test a. b. Drop Test Vibration Test 1. 2. 3. Forward and backward Right and left Up and down 30 minutes 1000 c.p.m 30 minutes 1000 c.p.m 30 minutes 1000 c.p.m 300mm max.
8.4
Power Management: Mode Normal Stand-by Power saving H-sync Pulse No pulse Pulse No pulse V-sync Pulse No pulse No pulse Pulse Video Active No video Blanked Power dissipation Normal power Less than 6 watts Less than 60 watts
Note: The power indicator LED color is green in normal state, yellow in stand-by and power saving state.
2-6

APPENDIX A : Preset Timing Chart
VER1.0
Item A B C D E F G H I
Description: Total time Active display area including borders Active display area excluding borders Left/Top border Right/bottom border Blanking time Front porch Sync-width Back porch
Mode No 1 2 3 4 6 7 8 9 10 Resolution 640 640 640 640 800 800 800 800 1024 & 480 480 480 480 600 600 600 600 768 Refresh Rate 60 72 75 85 60 72 75 85 60 Pixel Clock 25.175 31.500 31.500 36.000 40.000 50.000 49.500 56.250 65.000 Horizontal visible 640 640 640 640 800 800 800 800 1024 Horizontal total 800 832 840 832 1056 1040 1056 1048 1344 Horizontal front porch 16 24 16 56 40 56 16 32 24 Horizontal sync 96 40 64 56 128 120 80 64 136 Horizontal back porch 48 128 120 80 88 64 160 152 160 Horiz blanking time 144 176 200 192 256 240 256 248 320 Vertical visible 480 480 480 480 600 600 600 600 768 Vertical total 525 520 500 509 628 666 625 631 806 Vertical front porch 10 9 1 1 1 37 1 1 3 Vertical sync 2 3 3 3 4 6 3 3 6 Vertical back porch 33 28 16 25 23 23 21 27 29 Vertical blanking time 45 40 20 29 28 66 25 31 38 Horizontal frequency 31.469 37.861 37.500 43.269 37.879 48.077 46.875 53.674 48.364 Vertical frequency 59.940 72.809 75.000 85.008 60.317 72.188 75.000 85.061 60.004 Vertical sync polarity + + + + Horiz sync polarity + + + + -
Hz MHz Dots Dots Dots Dots Dots Dots Lines Lines Lines Lines Lines Lines KHz Hz TTL TTL
2-7

Mode No Resolution & Refresh Rate Pixel Clock Horizontal visible Horizontal total Horizontal front porch Horizontal sync Horizontal back porch Horiz blanking time Vertical visible Vertical total Vertical front porch Vertical sync Vertical back porch Vertical blanking time Horizontal frequency Vertical frequency Vertical sync polarity Horiz sync polarity 11 12 13 14 1024 1024 1024 1280 768 768 768 1024 70 75 85 60 75.000 78.750 94.500 108.000 1024 1024 1024 1280 1328 1312 1376 1688 24 16 48 48 136 96 96 112 144 176 208 248 304 288 352 408 768 768 768 1024 806 800 808 1066 3 1 1 1 6 3 3 3 29 28 36 38 38 32 40 42 56.476 60.023 68.677 63.981 70.069 75.029 84.997 60.020 + + + + + + 18 720 400 70 28.322 720 900 18 108 54 180 400 449 12 2 35 49 31.469 70.087 + 19 20 21 852 1280 1920 480 720p 1080i 60 60 60(i) 30.000 74.250 74.250 852 1280 1920 955 1650 2200 19 110 88 48 40 44 36 260 192 103 370 280 480 720 540 525 750 562.5 10 5 3 2 5 5 33 20 15 45 30 23 31.413 45.000 33.750 59.835 60.000 60.000 + + + +
VER1.0
Mode No 22 23 Resolution 640 720 & 350 480p Refresh Rate 70 60 Pixel Clock 25.175 27.000 Horizontal visible 640 720 Horizontal total 800 858 Horizontal front porch 16 16 Horizontal sync 96 62 Horizontal back porch 48 60 Horiz blanking time 160 138 Vertical visible 350 480 Vertical total 449 525 Vertical front porch 37 9 Vertical sync 2 6 Vertical back porch 60 30 Vertical blanking time 99 45 Horizontal frequency 31.469 31.469 Vertical frequency 70.087 59.940 Vertical sync polarity + Horiz sync polarity + +
2-8
FACTORY & ELECTRONIC ADJUSTMENT 1. Color Temperature Adjustment
VER1.0
Pre-setting Adjustment and Equipment Preparation for All Mode: (1) Turn on the PDP and let it warm up for at least 30 minutes. (2) There are 6 different modes ( DVI, RGB, YpbPr 720P,YpbPr 480P,YcbCr480I, and AV) that have Color Temperature settings. For each one of these 6 modes, there are 3 different Color Temperatures ( 6500D, 9600K and 11000K) that can be individually adjusted. Each Color Temperature is adjusted through the dark level, bright level, Gain and Bias values. (3) Press the following key sequence to access the Color Temperature Adjustment OSD Menu: 1. Press the Factory Key into Factory Mode and then the Color Temperature OSD menu will appear on the screen. COLOR TEMPERATURE 0. DVI 3. 480P Bias R 6. 6500D 7. 9600 8. 11000 9. EXIT F6 F6 F6 1. RGB 4. 480I G F6 F6 F6 B F6 F6 F6 2. 720P/1080 5. AV Gain R 06 05 04
G 04 04 04
B FE 01 03
ADJUST
SELECT
*Note: When adjusting the Color Temperatures, press number key 1, 2, 3, and 4 on the remote control to select the PDP input source that you would like to adjust, including DVI, RGB, YPbPr, and AV. When you press the number key to select the input source that you would like to adjust Color Temperature, the PDP set will switch to the to-be-adjusted input source mode automatically.
3-1
FACTORY & ELECTRONIC ADJUSTMENT
VER1.0
1.1 Pre-setting Adjustment and Equipment Preparation for RGB Mode: (1) Turn on the Color Analyzer (Minolta, Model = CA-210) and reset the Color Analyzer. (2) Switch the PDP input to RGB mode and press the Recall key on the remote control to have the PDP set recalled back to default factory settings. (3) Set up the Video Pattern Generator (ASTRO VG828) with the following settings: A. Timing: 1024 x 768 @ 60Hz, B. Make sure the Output signal is Analog (RGB) Connect the PDP RGB input connector to the ASTRO VG828 RGB output connector. (1) Dark level and bright level center block definition: A. Dark level center block definition: OPT2 Pattern B. Bright level center block definition: OPT1 Pattern (2) Flatly place the Minolta Color Analyzers Photo Detector in contact with the center of the PDP screen. 1.2 RGB Mode Color Temperature Adjustment Procedure: (1) With the PDPs RGB input connected to ASTRO VG828 RGB output connector, set the ASTRO VG828 to a dark level center block signal (OPT2). Enter the Color Temperature OSD menu using the same Key Sequence specified above. Press number key 2 to start RGB Color Temperature setting. (2) Press the Left/Right Button to switch between the Bias (R, G, B) and Gain (R, G, B) values. Use the Up/Down Buttons to change the Bias and Gain Values. (3) 6500D dark level center block adjustment procedure: A. Select G-BIAS and adjust the G-Bias value until Y = 0.70.10 FL B. Select R-BIAS and adjust the R-Bias value until x = 21315 C. Select B-BIAS and adjust the B-Bias value until y = 32915 D. Repeat steps A, B and C until the following final values are obtained: x = 31315 y = 32915 Y = 0.70.10 FL(10IRE) (4) 6500D bright level center block adjustment procedure: (Please set the ASTRO VG828 RGB bright level center block signal to OPT1) A. Select G-GAIN and adjust the G-GAIN value until Y = 362.5 FL B. Select R-GAIN and adjust the R-GAIN value until x = 31315 C. Select B-GAIN and adjust the B-GAIN value until y = 32915
3-2
VER1.0
D. Repeat steps A, B and C until the following final values are obtained: x = 31315 y = 32915 Y = 362.5 FL(60IRE) (5) Repeat Steps (3) and (4) until the 6500D Bias and Gain RGB values are all obtained, and then press number key 6 for the next Color Temperature setting of 6500D, number key 7 for the setting of 9600K, and number key 8 for the setting of 11000K sequentially. For each color temperature setting, please repeat Steps (3) and (4) above but replace the x and y settings with the following values: 6500D: x = 313, y = 329 for Dark Level Settings x = 313, y = 329 for Bright Level Settings 9600K: x = 285, y = 295 for Dark Level Settings x = 285, y = 295 for Bright Level Settings c. 11000K: x = 275, y = 280 for both Dark and Bright Level Settings For these 3 Color Temperatures (6500D, 9600K and 11000K), adjust the Dark and Bright Levels to the following Y values: a. Dark level Y = 0.70.10 FL(14IRE) b. Bright level Y = 362.5 FL(60IRE) (6) Once all 4 Color Temperatures have been adjusted, press number key 3 to start Component YpbPr Color Temperature setting. 2.1 Pre-setting Adjustment and Equipment Preparation for Component YpbPr Mode: (1) Turn on the Color Analyzer (Minolta, Model = CA-210) and reset the Color Analyzer. (2) Switch the PDP input to Component1 mode and press the Recall key on the remote control to have the PDP set recalled back to default factory settings. (3) Set up the Video Pattern Generator (ie. ASTRO VG828) with the following settings: A. Dark Level Center block definition: a. Group: 3 b. Timing: 01 c. Pattern: OPT2 C. Bright Level Center block definition: a. Group: 3 b. Timing: 01 c. Pattern: OPT1 (4) Connect the PDP Component1 input to the VG828 Component output connector. (5) Flatly place the Minolta Color Analyzers Photo Detector in contact with the center of the PDP screen.
3-3
VER1.0
2.2 Component YpbPr Mode Color Temperature Adjustment Procedure: (1) Set the VG828 to send a dark level center block signal (OPT2). Enter the Color Temperature OSD menu using the same Key Sequence specified above. Press number key 3 to start the Component YPbPr Color Temperatures setting. (2) Press the Left/Right Button to switch between the Bias (R, G, B) and Gain (R, G, B) values. Use the Up/Down Buttons to change the Bias and Gain Values. (3) 6500D dark level center block adjustment procedure: A. Select G-BIAS and adjust the G-Bias value until Y = 0.90.10 FL(480I) or Y=1.00.10 FL(480P/1080I). B. Select R-BIAS and adjust the R-Bias value until x = 31315 C. Select B-BIAS and adjust the B-Bias value until y = 32915 D. Repeat steps A, B and C until the following final values are obtained: x = 31315 y = 32915 Y = 0.90.10 FL(480I) or Y=1.00.10 FL(480P/1080I ) (14IRE) (4) 6500D bright level center block adjustment procedure: (Please set the VG828 bright level center block signal to OPT1) A. Select G-GAIN and adjust the G-GAIN value until Y = 352.5 FL(480I/1080I) or Y = 342.5 FL(480P) B. Select R-GAIN and adjust the R-GAIN value until x = 33215 C. Select B-GAIN and adjust the B-GAIN value until y = 33015 D. Repeat steps A, B and C until the following final values are obtained: x = 31315 y = 32915 Y = 352.5 FL(480I/1080I) or Y = 342.5 FL(480P) (60IRE) (5) Repeat Steps (3) and (4) until the 6500D Bias and Gain RGB values are all obtained, and then press number key 6 for the next Color Temperature setting of 6500D, number key 7 for the setting of 9600K, and number key 8 for the setting of 11000K sequentially. For each color temperature setting, please repeat Steps (3) and (4) above but replace the x, y and Y values with the following values: a. 6500D : x = 313, y = 329 for Dark Level Settings x = 313, y = 329 for Bright Level Settings b. 9600K : x = 285, y = 295 for Dark Level Settings x = 285, y = 295 for Bright Level Settings c. 11000K : x = 275, y = 285 for both Dark and Bright Level Settings For these 3 Color Temperatures (6500D, 9600K and 11000K), adjust the Dark and Bright Levels to the following Y values: a. Dark level Y = 0.90.10 FL(14IRE) b. Bright level Y = 352.5 FL(480I/1080I) or Y = 342.5 FL(480P) (60IRE)
3-4
VER1.0
(6) Once all 4 Color Temperatures have been adjusted, press number key 4 to start AV Color Temperature setting.
3-5
VER1.0
3.1 Pre-setting Adjustment and Equipment Preparation for AV Mode: (1)Turn on the Color Analyzer (Minolta, Model = CA210) and reset the Color Analyzer. (2)Switch the PDP input to AV1 (Composite Video) mode and press the Recall key on the remote control to have the PDP set recalled back to default factory settings. (3)Set up the Video Pattern Generator (ie. ASTRO VG828) with the following settings: A. Dark Level Center block definition: a. Group: 08 b. Timing: 01 c. Pattern: OPT2 B. Bright Level Center block definition: a. Group: 08 b. Timing: 01 c. Pattern: OPT1 (4)Connect the PDP AV1 (Composite Video) input to the VG828 Composite output connector. (5)Flatly place the Minolta Color Analyzers Photo Detector in contact with the center of the PDP screen. 3.2 AV Mode Color Temperature Adjustment Procedure: (1)Set the VG828 to send a dark level center block signal (OPT2). Enter the Color Temperature OSD menu using the same Key Sequence specified above. Press number key 4 to start the AV Color Temperatures setting. (2)Press the Left/Right Button to switch between the Bias (R, G, B) and Gain (R, G, B) values. Use the Up/Down Buttons to change the Bias and Gain Values. (3)6500D dark level center block adjustment procedure: A. Select G-BIAS and adjust the G-Bias value until Y = 0.80.1 FL. B. Select R-BIAS and adjust the R-Bias value until x = 31312 C. Select B-BIAS and adjust the B-Bias value until y = 32912 D. Repeat steps A, B and C until the following final values are obtained: x = 31312 y = 32912 Y = 0.80.1 FL(20IRE) (4)6500D bright level center block adjustment procedure: (Please set the VG828 bright level center block signal to OPT1) A. Select G-GAIN and adjust the G-GAIN value until Y = 302.5 FL B. Select R-GAIN and adjust the R-GAIN value until x = 31310 C. Select B-GAIN and adjust the B-GAIN value until y = 32910
3-6
VER1.0
D. Repeat steps A, B and C until the following final values are obtained: x = 31310 y = 32910 Y = 302.5 FL(60IRE) (5)Repeat Steps (3) and (4) until the 6500D Bias and Gain RGB values are all obtained, and then press number key 6 for the next Color Temperature setting of 6500D, number key 7 for the setting of 9600K, and number key 8 for the setting of 11000K sequentially. For each color temperature setting, please repeat Steps (3) and (4) above but replace the x, y and Y values with the following values: a. 6500D : x = 313, y = 329 for both Dark and Bright Level Settings b. 9600K : x = 285, y = 295 for both Dark and Bright Level Settings c. 11000K : x = 275, y = 270 for both Dark and Bright Level Settings For these 3 Color Temperatures (6500D, 9600K and 11000K), adjust the Dark and Bright Levels to the following Y values: a. Dark level Y = 0.80.1 FL(20IRE) b. Bright level Y = 302.5 FL(60IRE) (6)Once all 4 Color Temperatures have been set press number key 9 to exit the Color Temperature OSD menu. (7)Re-enter the Color Temperature OSD menu again to double check that the Color Temperature values just adjusted are stored in the PDP display.
3-7
FACTORY & ELECTRONIC ADJUSTMENT ISP Firmware Update User Manual

1.
VER1.0
Definitions: a. Computer Requires a 9-pin RS-232 port and a Windows 98/ME/XP based operating system PC. b. Display A Sampo Corporation manufactured PDP. c. Firmware Hex Code The firmware in hex code to be updated onto the Display. File will be provided by Sampo Corporation d. LED Light Emitting Diode that is located at the lower-right corner of the front bezel of the Display. When the Display is powered OFF, the LED will not be lighted. When the Display is in Standby Mode or ISP Mode, the LED will be in orange color. When the Display is turned ON, the LED will be in solid green color. e. Main Power Switch The red main power switch located on the back of the Display (either at the lower right or lower left corner). f. Tera Term Pro It is a free software terminal emulator that can either be downloaded from the website or provided by Sampo Corporation. g. RS-232 Cable The RS-232 serial cable to connect the Computer and the Display must be straight-through type that pin 2 (RX) and pin 3 (TX) are not reversed at one end of the cable. The pin layout for RS-232 Terminal:
Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Received Line Signal Detector (Data Carrier Detect) Received Data (RXD) Transmit Data (TXD) Data Terminal Ready (DTR) Signal Ground Data Set Ready (DSR) Request to Send (RTS) Clear To Send (CTS) Ring Indicator
2. Application Software & Firmware Setup: a. Acquire the Tera Term Pro setup software and install it on the Computer. b. Acquire the to-be-updated Firmware Hex Code (.hex) file. c. Save the Firmware Hex Code in the hard drive of the Computer. 3. Hardware Setup: a. Press the Main Power Switch to turn off the Display. b. Connect the Computers RS-232 port (COM 1 on the PC) to the Displays RS-232 port. c. Press and hold both the Displays Input and Volume Up front control buttons (located at the front bezel of the Display) and at the same time turn on the Display by pressing the Main Power Switch on the back of the Display. d. Hold the Input and Volume Up buttons until the LED becomes orange color, which indicates the Display is in the ISP Mode. Note: To verify if the Display enters in the ISP Mode successfully or not, push the Power front control button at the front bezel of the Display, if the Display powers on and LED turns green, the Display in NOT in the ISP mode so you have to repeat Step #3.a to #3.c again; if the Display doesnt power on and LED stays in orange, the Display is in the right mode and ready for the next step.
3-8

4. Uploading Firmware:
VER1.0
1. Power off the PDP, prepare a piece of RS232 cable line (with female to female pin-out) and connect the PDP set with RS232 male pin-out com1 to your computer with RS232 male pin-out com1. 2. Select/Double-click ISP icon (arrow marked, if you have already setup the ISP_Setup_Ver1.0 software tool on the CD-ROM in-appendix) in Figure F. 1 and the screen in Figure F. 2 will pop up. FIGURE F. 1 FIGURE F. 2
3. Select one of the items Connect (as shown in Figure F. 2, arrow marked) and the screen in Figure F. 3 will pop up. FIGURE F. 3
3-9
VER1.0
4. Place the cursor to the point on the word frame in the long square size (lower arrow marked) and select/click one of the items HEX (upper arrow marked), and then, the screen in Figure F. 4 will pop up. FIGURE F. 4 FIGURE F. 5
5. Press-and-hold up the keying ESC from the keyboard and power on the PDP, and then, the Figure F. 5 (as shown above) screens dialogue box will pop up some choosing items if you move the cursor to the right straight menu bar from up to down (right arrow marked). 6. Press both the Arabic number 1(as shown Figure F. 6, upper arrow marked) and then press the character Y or y (as shown Figure F. 6, lower arrow marked), and the screen in Figure F. 7 will pop up if you move the cursor to the right menu bar from up to down (right arrow marked). FIGURE F. 6 FIGURE F. 7
3-10
VER1.0
7. Select File, Send file from the left-and-top menu bar (as shown in Figure F. 8) and the screen in Figure F. 9 will pop up.
FIGURE F. 8 8. Select sub-file name .hex (for example: 123.hex) and click one of the items Enter (arrow marked) from Figure F.9 to execute /burn-in your program and the screen in Figure F. 10 will pop up if you move the cursor to the right menu bar from up to down (arrow marked). FIGURE F. 9 FIGURE F. 10
9. Press both the keying Shift and Arabic number 8 to terminate/exit burning program code if you had finished it.
3-11
VER1.0
Overview This monitor is equipped with an RS-232 serial terminal for using the monitor with computer controls. The RS-232 serial terminal conforms to the RS-232C interface specification. The computer will require software application (such as HyperTerminal fot RS-232) which allows the computer to send and receive control data that can support the communication parameters described in this section.
Interface Parameters Specification RS-232C Sync Method Synchronous Baud Rate 9600 bps Parity None Character Length 8 Bits Stop Bit 1 Bit
RS-232C Pint Layout Pin 1 Received Line Signal Detector (Data Carrier Detect) Pin 2 Received Data (RXD) Pin 3 Transmit Data (TXD) Pin 4 Data Terminal Ready (DTR) Pin 5 Signal Ground Pin 6 Data Set Ready (DSR) Pin 7 Request To Send (RTS) Pin 8 Clear To Send (CTS) Pin 9 Ring Indicator
3-12

Command Sequence PC Side Command: Data Display Side -> <- RCV (Received acknowledgement) or BZY (Busy) <- CFM or FAL or (Actual Data)
VER1.0
Notes: 1. If PC side sends command data to Display while display is not busy and receives the command, display is to send RCV to confirm receipt of command a. If PC side does not receive RCV from display, then PC side is to re-send data 2. If PC Side sends command data to Display while Display is processing, display to return: BZY a. When PC side received BZY, then PC side needs to stop and wait until Display sends status. 3. When Display side has completed processing, display side sends either CFM (confirmed processing) or FAL (Failure) or Actuat data (if REA command is used) Example: Read Power status Data, followed by Power On command, and input select to TV1 with disruption
PC Side REA:PWR -> Display Side <<PWR:PON -> <<INP:TV1 INP:TV2 -> <-> <<INP:TV2 -> <<RCV CFM BZY CFM RCV RCV CFM RCV OFF PC Status PC sends command PC waits ack PC waits for actual data PC sends command PC waits ack PC waits for confirmation PC sends command PC waits ack PC sends command PC waits ack PC ack buzy and waits to resend PC resends previous buzy comnd PC waits ack PC waits for confirmation Display Status Monitor is powered off & receives command Monitor sends receipt of command Monitor returns OFF data to PC Monitor receives command Monitor sends receipt of command Monitor processes command and confirms Monitor receives command Monitor sends receipt of command Monitor is still processing previous command Monitor sends back busy status with prev command Monitor sends confirmation of prev command Monitor receives new command Monitor sends receipt of command Monitor processes command and confirms
Priority Must
Description Read Data
Command REA
Must Must 2 2 2 2 2
Volume Power On Brightness Contrast Color Tint Sharpness
VOL PWR BRT CON CLR TNT SHP
Data VOL,PWR,BRT,CON,CLR,TNT,SHP,INP VSZ,VPS, HSZ, HPS,RCL,SAV,MUT, LNG,TMP,BAS,TRB,BAL,TS1,CSR, TV1,CCD,ZOM,PIP,POP,PIS,POF, SIN,SWP,RGN,GGN,BGN,RBS, GBS,BBS,FPL, ,STS, ,BI3 BI4, PTM, POS, POV 001100 PON=Power On OFF=Power off 001100 001100 001100 001100 001100
3-13

Must Input Select INP TV1=Tuner 1 AV1=AV Input 1 AV2=AV Input 2 CP1=Component 1 CP2=Component 2 RG1=RGB1 DV1=DVI1 001100 001100 001100 001100 000 000 MON=On OFF=Off ENG=English SPA=Spanish FFR=French TCH=Traditional Chinese MID=Natural (9300 x=290, y=293) HIG=Cool (13,800 x=270, y=273) 65D=Warm (6500D x=313, y=316) 001100 001100 001100 AIR=Air CBL=Cable TV1=Channel Search TV1 001125
VER1.0
2 2 2 2 Must 4 Must 3
V-Size V-Position H-Size H-Position Recall Save Mute Language
VSZ VPS HSZ HPS RCL SAV MUT LNG
Color Temp
TMP
3 3 3 Must 3 Must
Bass Treble Balance Tuner 1 Source Channel Search Tuner 1 Channel Change Closed Captioning
BAS TRB BAL TS1 CSR TV1
CCD
OFF CC1 CC2 CC3 CC4 TX1 TX2 TX3 TX4 WID=16:9 PAN=Panorama Stretch NOR=4:3 with black bars ZO1=Zoom1 ZO2=Zoom2 ZO3=Zoom3 PON=PIP On OFF=PIP Off PON=POP On OFF=POP Off
3-14
Aspect Ratio
ZOM
2 2
PIP POP
PIP POP

2 PIP Position PIS PS1=Position 1 PS2=Position 2 PS3=Position 3 PS4=Position 4 PF1=Full size PF2=16:9 Format PF3=4:3 Format TV1=Tuner 1 AV1=AV Input 1 AV2=AV Input 2 CP1=Component 1 CP2=Component 2 RG1=RGB1 DV1=DVI1 000 001256 001256 001256 001256 001256 001256 FO1=Panel Lock On for All OFF=Panel Lock Off for All SON=Status On OFF=Status Off OFF=Turn off 10S=10 Sec 20S=20 Sec 30S=30 Sec OFF=Turn off 10M=10 Min 1HR=1 Hour CNM=Cinema VVD=Vivid STD=Standard USR=User OFF=Turn off TV1=Tuner 1 AV1=AV Input 1 AV2=AV Input 2 CP1=Component 1 CP2=Component 2 RG1=RGB1 DV1=DVI1 001100
VER1.0
POP Format POF
Sub-Source
SIN
2 4 4 4 4 4 4 Must Must Must
Sub-Swap R-Gain G-Gain B-Gain R-Bias G-Bias B-Bias Front Panel Lock Status Display Image Shift (Screen Saver) Full White (Screen Saver) Picture Mode
SWP RGN GGN BGN RBS GBS BBS FPL STS BI3 PDP Only BI4 PDP Only PTM
Must
Must
Must
Power On Source
POS
Must
Power On Volume
POV
3-15
BLOCK DIAGRAM
VER1.0
MAIN BOARD BLOCK DIAGRAM

CVBS(MP)
I2C(1) CVBS1 CVBS2 SV1_YC1 +9V 5V COMP1_L/R COMP2_L/R RGB_L/R DVI_L/R CVBS1_L/R CVBS2_L/R SV2_YC2 COMP. 1 COMP. 2
SV_YC(MP) COMPONENT(MP) RGB/HV(MP)
X901_14.318MHz
ICV3
AN15865 Video Sw
CVBS(SP) SV_YC(SP) COMPONENT(SP) RGB/HV(SP)
IC901
SVP-EX22 Video Decode & De-Interlace & ADC & Scaler 208 PIN
X801_14.318MHz
IC801
SVP-EX52 Video Decode & DeInterlace & ADC & Scaler& LVDS 256 PIN
LVDS CN201 40Pin 1.0mm Plug
Digital 24bit
MCAD[0..7] MCA[0..15] IC802
To PDP Panel
ICV6
4052BT Analog SW
I2C(1) +9V RSTn A_DCTL EM6A9320 4M*32 GDDR SDRAM FBGA 144PIN
IC902
AL_MAIN AR_MAIN
ICV5
MSP3450G Multi Sound Process
AL_DACM AR_DACM
IC308
NJM2904M HPF
IC306
TA2024 Sound Power Amplifier
D6432AH SDRAM SPK_L O/P SPK_R O/P
18.432MHz
+9V
ICV8
M7809 9V Regulator
12V
SUB_WFR AUDIO_L/R
6V_SB 8V
ICV4
NJM2930L08 8V Regulator
12V
I2C(1) RGB/HV(MP) RGB/HV(SP) Digital 24bit
I2C(1)
I2C(2)
SO502
VGA_OUT
D_Sub 15Pin Connector Output
HV SYNC VGA_OUT
IC503/IC504
PI5V330 Analog Sw
IC6
24C32 EEPROM
X1_32MHz
IC2
W78C438CP MCU
HS_DET
IC10
74LV153 Analog SW
TVSP2_HOUT VGA_HS_IN HS2_EX52
IC4
W24257 SDRAM IIC_RGB
SO501D_S
VGA_IN
ub 15PIN Connector Input
IC501
N74F14 Buffer
HV SYNC
IC502
AT24C21 Eeprom
HS_S0
HS_S1
VGA_IN
IC5
39SF040 Flash ROM
IC9 IC12
HIN232CB Transceiver MACH4064
SO601 DVI_IN
TMDS_D 24PIN Connector Input
IC602
***_CTL
IC601
3V3_SB DVI RX SII169CT100 TMDS
AT24C21 Eeprom
IIC_DVI
MCAD[0..7] MCA[0..15]
CPLD
SO2 RS232 15Pin
4-1
BLOCK DIAGRAM
VER1.0
SOUND BLOCK DIAGRAM

AUDIO OUTPUT TUNER MTS DECODER AU_1 IN AU_2 IN SOURCE SELECTOR ICV5 MSP3450G SUBWOOFER OUTPUT
YUV_1 IN YUV_2 IN
WITH AV BOX
WITH AV BOX
SELECT CONTROL
IC2 SDA5550M VOLUME CONTROL
A_VOL BUFFER IC304 NJM2904M A_VOL
RGB_IN DVI_1 IN
PC SOUND SELECTOR IC301 HEF4052BT
INPUT SELECTOR IC302/305 HEF4066
BUFFER IC304 NJM2904M
VOLUME CONTROL IC303 uPC1406
OUTPUT SELECYOR IC302/305 HEF4066
HPF IC308 NJM2904M
SELECT CONTROL Q303/304 DTC144EKA
4-2
SPEAKER OFF
YUV SOUND SELECTOR ICV6 HEF4052BT
AUDIO PROCESSOR VOLUME BALANCE BASS TREBLE SURROUND BBE AUDIO OUTPUT
SPEAKER OUTPUT
I2C BUS
POWER AMPLIFIER IC306 TA2024
TROUBLE SHOOTING GUIDE 1 No Picture 1-1 No RGB Picture

No RGB Picture (Raster ok)
VER1.0
No
Is CN201 PDP control signal /data signal / B+ normal? No
Yes
Yes
Is IC801 control signal/ data signal/B+ normal?
Check / Replace CN201/Cable / PDP panel
After check all B+ /control signal / clock /IIC are normal. Check / Replace IC801/802
Yes
Are IC704/706/708 /710/712control signal/ data signal/B+ normal?
No
Is IC501 RGB signal / B+ normal?
No
Yes After check all B+ /control signal are normal.
Check / Replace IC502
After check all B+ / signal / are normal.? Check / Replace No are D508 or D509
No
Is S501 RGB signal / B+ normal? Yes After check All B+ / RGB signal are normal. Check / Replace IC502
5-1
TROUBLE SHOOTING GUIDE 1-2 No COMP Picture

No YPbPr Picture (Raster ok)
VER1.0
No
Is CN201 PDP control signal / data signal / B+ normal? No
Yes
Yes
Check / Replace CN201 or Cable or PDP panel
After check all B+ /control signal / clock /IIC are normal. Check / Replace IC801/802
Yes
Are IC704/706/708 /710/712control signal/ data signal/B+ normal? No
After check all B+ /control signal / clock /IIC are normal. Check / Replace ICV4/ICV8
Yes
Is ICV3 control signal / data signal / B+ normal?
No After check all B+ /control signal / clock /IIC are normal. Check / Replace JKV1/JKV2
5-2
TROUBLE SHOOTING GUIDE 1-3 No AV/S-Video Picture

No AV/S-Video Picture (Raster ok)
VER1.0
No
Is CN201 PDP control signal / data signal / B+ normal? No
Yes
Yes
Check / Replace CN201 or Cable or PDP panel
After check all B+ /control signal / clock /IIC are normal. Check / Replace IC801/IC802
Yes
Are IC704/706/708 /710/712control signal/ data signal/B+ normal?
No
After check all B+ /control signal / clock /IIC are normal. Check / Replace ICV4/ICV8
Yes
Is ICV3 control signal / data signal / B+ normal?
No After check all B+ /control signal / clock /IIC are normal. Check / Replace SV1
5-3
TROUBLE SHOOTING GUIDE 2. No Remote control

No Remote control
VER1.0
Yes Does , IC106 Pin1 appear continuous waveform when press R/C button?
No
No
Check CN6 Pin1 MAIN BOARD is Normal? Yes
Yes
Does CN6 Pin1 appear continuous waveform?
No
Check / Replace R/C and Receiver IC106
Yes
Check CN6 Pin2 Circuit
No
Is IC2 Pin129 B+ Normal?
Check MAIN BOARD Power circuit
Yes
Check / replace IC2
5-4
TROUBLE SHOOTING GUIDE 3. No Sound 3-1. No RGB/COMP/DVI Sound

No RGB Sound No Is ICV6 output signal normal? No
VER1.0
Yes
Check / Replace Speaker or Wire
Is ICV5 input signal normal? No
Yes
Is IC308 output signal normal? No
Yes
Are S0601/S0501/ JKV1/JKV2 audio signal No

Check / Replace MAIN Board or SPEAKER
Yes
5-5
TROUBLE SHOOTING GUIDE
VER1.0
3-2. No S-VIDEO/AV/AUDIO OUTPUT/TV/SUBWOOFR OUTPUT Sound
No RGB Sound No
Yes
Is ICV5 input signal normal?
Yes
Check / Replace TU1
No
Is IC308 output signal normal?
Yes
No
Are S0601/S0501/ JKV1/JKV2 audio signal normal? No

Check / Replace MAIN Board or SPEAKER
5-6
P.C. BOARD TOP VIEW
VER1.0
MODULE NAME IMAGE BOARD ASSY
PARTS NO. DPWB11526-MPS--
MODULE NAME FORNT BUTTON CONTROL BOARD ASSY
PARTS NO. DPWB11421-KPS-A
6-1
P.C. BOARD TOP VIEW
VER1.0
MODULE NAME POWER FILTER BOARD ASSY
PARTS NO. DPWB11513-PPS-A
MODULE NAME LOGIC BOARD ASSY
PARTS NO. LJ92-00915A
6-2
P.C. BOARD TOP VIEW
VER1.0
MODULE NAME Y DRV_TOP BOARD ASSY
MODULE NAME Y DRV_BOTTOM BOARD ASSY
6-3
P.C. BOARD TOP VIEW
VER1.0
MODULE NAME Y-SUS BOARD ASSY
MODULE NAME X DRV BOARD ASSY
6-4
P.C. BOARD TOP VIEW
VER1.0
MODULE NAME X DRV_RIGHT_BOTTOM BOARD ASSY
MODULE NAME X DRV_CENTER_BOTTOM BOARD ASSY
6-5
P.C. BOARD TOP VIEW
VER1.0
MODULE NAME X DRV_LEFT_BOTTOM BOARD ASSY
MODULE NAME MAIN POWER BOARD ASSY
6-6
P.C. BOARD TOP VIEW
VER1.0
MODULE NAME PDP PANEL MODULE BOARD ASSY
PARTS NO. VVEPP42SD-YD05-
6-7
ELECTRONIC MODULE LIST

Model Name: BDS4223V/27 No.
1 2 3 4 5 6 7 8 9
VER1.0
Module Name
Image Board Front Button Control Board Power Filter Board Logic Board Y DRV_Top Y DRV_Bottom Y-SUS X DRV X DRV_Right_Bottom
Supplier
Sampo Sampo Sampo
Supplier's Ass'y Part No.

DPWB11526-MPS-DPWB11421-KPS-A DPWB11513-PPS-A
Quantity Per Final Assembly

1 1 1 1 1 1 1 1 1 1 1 1 1
Samsung LJ92-00915A Samsung LJ92-01236A Samsung LJ92-01237A Samsung LJ92-01256A Samsung LJ92-01255A Samsung LJ92-00813A Samsung LJ92-00812A Samsung LJ92-00811A Samsung LJ44-00096A Samsung VVEPP42SD-YD05-
10 X DRV_Center_Bottom 11 X DRV_Left_Bottom 12 Main Power 13 Full Set PDP Panel Module 14 Glass Filter 15 Speaker 16 Front Bezel 17 Rear Cover 18 Plasma Stand Assembly
Sampo Sampo Sampo Sampo Sampo
PGLS-0020-1- - - RSPKES011-17FL DMSKP0132-1F- -L GCABB0317-1P-AC GSTN-0032-1F- -D
1 2 1 1 2
7-1
EXPLODED VIEW
VER1.0
8-1
PACKAGING
VER1.0
9-1
SCHEMATIC DIAGRAM
VER1.0
CONTENT OF ATTACHMENTS
1. 2. 3.
Main Board
Front Button Control Board Power Filter Board
SCHEMATIC DIAGRAM 1. Image Board

5V_SB
5V_SB
5V_uP
5V_SB
Reset Circuit
IC1 G690L463T7
VCC RESET
C1 N/1uF 16V
R2 0 1/16W
2
RST_uP
R1 N/10K 1/16W
JC1 For ICE Enable 2 1
R3 0 1/16W
CPU_RST
VCC(3)
ADM809-5
P1.3
P1.4
RGB
DVI1
DVI2
MCAD[0..7]
MCAD[0..7]
P[2,4,8]
GND
0
0
3V3_IO
0
1
0
1
1
1
R118 0 1/16W
8 7 6 5 8 7 6 5
GND(1)
RESET(2)
* * *
* *
MCAD7 MCAD6 MCAD5 MCAD4 MCAD3 MCAD2 MCAD1 MCAD0
RP2 22 ohm
4 3 2 1
4 3 2 1
1 2 3 4 1 2 3 4
P[2] DT_OUT
R4
N/0 1/16W
R107 N/0 1/16W

P1_4 P1_3 P1_2 P1_1 P1_0
P4_7 P4_6 P4_5 P4_4 P4_3 P4_2 P4_1 P4_0
1 2 3 4
RP4 22 ohm
8 7 6 5
5 6 7 8
5 6 7 8
5V_uP
P[12] VGA_SEL
R5
R6
22
22
1/16W
1/16W
P[7] BRT_LCD
P[2] RST_uP
P[4,8] RST
5V_SB
R10
R11
D
1/16W
N/0 1/16W
P1.4 P1.3 P1.2 P1.1/T2EX P1.0/T2 NC P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 NC VDD P0.0 P0.1 P0.2 P0.3 P0.4
R9
N/0 1/16W
11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75
R8
1/16W
IC2 W78C438CP
P0_0 P0_1 P0_2 P0_3
E D C N R O U C O E S S
5V_SB
5V_SB
Q12 BSN20
R100 N/0 1/16W
RP3 22 ohm
RP1 4.7K ohm
RP26 4.7K ohm
SCL1 SDA1 SCL2 SDA2

P0_4 P0_5 P0_6 P0_7
1 2 3 4
8 7 6 5
P[2,4,7,8,11] P[2,4,7,8,11] P[8,11] P[8,11]
ENn_ISP BANK0 BANK1 BANK2
P[2] P[2] P[2] P[2]
RP5 22 ohm
R7 N/4.7K 1/16W
AFT
AFT
R12 N/0 1/16W
P[2] INTn_IO1 P[3] HS_DET P[4] EX_INT
R13 R14 R15

R17 R99 R20 R21 R22
22 N/22 N/22
22 0 22 N/22 22
1/16W 1/16W 1/16W

1/16W 1/16W 1/16W 1/16W 1/16W
P1_5 P1_6 P1_7 RST_MCU P8_0 P8_1 P8_2 P8_3 P8_4 P8_5 P8_6 P8_7 INT3n
P3_0
P[3] RXD
P[3] TXD P[3] REMOTE P[8] TVSP_INT
REMOTE TVSP_INT
A_PWM
5V_uP
P3.6/#WR P3.7/#RD XTAL2 XTAL1 VSS NC AP7.3 AP7.2 AP7.1 AP7.0 AP6.7 AP6.6 AP6.5 AP6.4 AP6.3 AP6.2 AP6.1 AP6.0 P2.0 P2.1 P2.2
R23
R16
22
22
1/16W
1/16W
P3_1 P3_2 P3_3 P3_4 P3_5

INT2n
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
P1.5 P1.6 P1.7 RESET P8.0 P8.1 P8.2 P8.3 P8.4 P8.5 P8.6 P8.7 #INT3 #INT2 P3.0/RxD VDD P3.1/TxD P3.2/#INT0 P3.3/#INT1 P3.4/T0 P3.5/T1
W78C438CP 84-pin
P0.5 P0.6 P0.7 #EA AP5.0 AP5.1 AP5.2 AP5.3 AP5.4 AP5.5 AP5.6 AP5.7 VDD VSS ALE #PSEN P2.7 P2.6 P2.5 P2.4 P2.3
74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54
5V_uP
RP6 22 ohm
MCA[0..15]
P[2,4,8]
AP5_0 AP5_1 AP5_2 AP5_3 AP5_4 AP5_5 AP5_6 AP5_7
1 2 3 4 1 2 3 4
8 7 6 5 8 RP7 7 22 ohm 6 5
MCA0 MCA1 MCA2 MCA3 MCA4 MCA5 MCA6 MCA7
MCU_ALE PSENn
R18 R19
22 22
1/16W 1/16W
ALE_uP PSENn_uP
ALE_uP PSENn_uP
P[4,8] P[2]
P2_7
R24
1/16W
KEY7
KEY6
TP6
P2_6
P2_5
5V_SB
KEY6 P[3]
R25
1/16W
P[3] HS_DET
TP5
P2_4
R29
1/16W
KEY4
KEY3
4 3 2 1
4 3 2 1
R27
1/16W
KEY5
KEY5
P[3]
KEY4
KEY3
KEY2
KEY1
P[3]
P[3]
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
P2_3
P2_2
R30
1/16W
RP27 4.7K ohm
RP28 4.7K ohm
P[2,4,8] RDn_uP
RDn_uP
R32
22
1/16W
P3_7
D
P2_1
AP6_7 AP6_6 AP6_5 AP6_4 AP6_3 AP6_2 AP6_1 AP6_0
R34
R35
0
0
1/16W
1/16W
KEY1
P[3]
5V_SB
XTAL2 XTAL1
P2_0
KEY0
KEY0
P[3]
C48 0.1uF 16V

IC3A N74F14D
2
D
5V_uP
5V_V
R26 10K 1/16W
A_VOL
R31 10K 1/16W
Q1 DTC144EKA
D
X1 32MHz
RP8 22 ohm
4 3 2 1 4 3 2 1
RP9 22 ohm
14
14
IC3B N74F14D
4
DT_IN P[2]
C3 0.1uF 16V
V
C4 0.1uF 16V
C5 0.1uF 16V
1
7
3
7
P1_0
R98 0 1/16W
14
IC3F N74F14D
12
CPLD_CS P[2]
C6 33PF 50V
R36 1M 1/16W
C7 T 33PF 50V
A_PWM
C2 0.1uF 16V
D
13
7
5 6 7 8 5 6 7 8
MCA[0..15]
MCA[0..15]
P[2,4,8]
R113 N/0 1/16W
14
IC3C N74F14D
6
14
IC3D N74F14D
8
R114 N/0 1/16W
5
7
D
9
7
D_CLK
P[2]
3V3_IO
R119 0 1/16W
Q13 BSN20
2
SAMPO
Title Size C Date: MPU (W78C438) Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 1
of
5 6 7 8
5 6 7 8
P[2,4,8] WRn_uP
WRn_uP
R28
22
1/16W
P3_6
R33
1/16W
KEY2
P[3]
KEY0 KEY1 KEY2 KEY3
KEY7 KEY6 KEY5 KEY4
MCA8 MCA9 MCA10 MCA11 MCA12 MCA13 MCA14 MCA15
66 CC JJ ,, 55 CC JJ ,, 44 CC JJ ,, 33 CC JJ 0,, 322 RCC ,JJ 7 2e Rsn ,oe 7lp 1CO R ,;; 611 1CC RJJ , 3 e Rns ,eo 2pl ROC >>> ----el va om mrE eoC RNI ... 123 : e s U E C I r o F
Rev 1.0 23
SCHEMATIC DIAGRAM
5V_SB
MCA[0..15]
MCA[0..15]
MCAD[0..7]
P[1,4,8]
P[1,4,8]
RST_uP
5V_P
P[1]
MCA0 MCA1 MCA2 MCA3 MCA4 MCA5 MCA6 MCA7 MCA8 MCA9 MCA10 MCA11 MCA12 MCA13 MCA14 MCA15 BANK0 BANK1
IC5 39SF040-7
12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 30
16
D
D
MCAD[0..7]
13 14 15 17 18 19 20 21
C49 10uF 16V

+
R105 0 1/16W
R101 82K 1/16W
R108 0 1/16W
R103 N/0 1/16W

Q9 2SC2412KBQ
R106 N/100K 1/16W
Q8 2SA1037KQ
R102 1K 1/16W
D
3V3_SB
3V3_IO
L1 0 1/8W
D
D
MCA15
R88
22
1/16W
R87
N/10K 1/16W
D
Q10 BSN20
VT_MEM
+ C8 10uF 16V
C9 0.1uF 25V Z
C10 0.1uF 25V Z
C11 0.1uF 25V Z
C12 0.1uF 25V Z
P[1] P[1]
BANK0 BANK1
D0 A0 D1 A1 D2 A2 D3 A3 D4 A4 D5 A5 D6 A6 D7 A7 A8 A9 A10 VCC A11 A12 A18/VPP A13 PGM A14 A15 A16 A17 OE GND
VT_MEM
32 1
31
VT_MEM
BANK2
WRn_ROM
BANK2
P[1]
24
OEn_ROM
R38 4.7K 1/16W
R39 4.7K 1/16W

RDn_SRAM WRn_SRAM
R40 4.7K 1/16W
MCA0 MCA1 MCA2 MCA3 MCA4 MCA5 MCA6 MCA7 MCA8 MCA9 MCA10 MCA11 MCA12 MCA13 MCA14
17 16 15 14 13 12 11 10 4 3 28 2 9 5 8
27 1 6
IC4 W24257AQ-12
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 CS OE WE
D0 D1 D2 D3 D4 D5 D6 D7
18 19 20 22 23 24 25 26
VT_MEM
8
IC6 24LC32-SN
VCC TEST SCL SDA A0 A1 A2 VSS
1
2
3
4
R43 10 1/16W
P[1,4,7,8,11] SDA1
5
R42 10 1/16W
VT_MEM
VT_MEM
CE
22
R37 4.7K 1/16W
VDD VSS
7 21
R111 470 1/16W
2
5V_SB
VT_MEM
P[1,4,7,8,11] SCL1
L2 0 1/8W
C17 + 10uF 16V

D
C18 0.1uF 25V Z
C19 0.1uF 25V Z

D
C20 0.1uF 25V Z

D
C21 0.1uF 25V Z

D
R112 N/0 1/16W
MCAD[0..7]
3V3_IO
P[1] INTn_IO1
INTn_IO1
R44
0 1/16W
3V3_IO
MCA13
MCA12 MCA11 MCA10
P[1,4,8] MCA15
MCA15
R41 N/0 1/16W

R104 0 1/16W
MCAD3 MCAD2 MCAD1 MCAD0
C13 0.1uF 25V Z
C14 0.1uF 25V Z
C15 0.1uF 25V Z
C16 0.1uF 25V Z
3V3_IO
MCA[0..15]
1 2 3 4
RP10 N/33 ohm
8 7 6 5
LD1 N/LT8311G-41 LD2 N/LT8311G-41 LD3 N/LT8311G-41 LD4 N/LT8311G-41
1 2 3 4
RP11 N/470 ohm
3V3_IO
8 7 6 5
I9 I8
P[1] CPLD_CS
I7
D
I9 I8 I7 I6
1 2 3 4
RP12 33 ohm
8 7 6 5
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
A7 A6 A5 A4 GND_0 VCC_0 A3 A2 A1 A0/GOE0 VCC I9/CLK0 I8/CLK3 D15/GOE1 D14 D13 D12 VCC_1 GND_1 D11 D10 D9 D8 I7 GND
SV1_DET SV2_DET
P[20] P[20]
TP1
TDI WRn_SRAM RDn_SRAM WRn_ROM OEn_ROM
1 2 3 4
8 RP13 7 33 ohm 6 5
P[1,4,8] P[1,4,8] P[1] P[1]
WRn_uP RDn_uP PSENn_uP ENn_ISP
3V3_IO P[13] PDn_DVI1
R89 4.7K 1/16W

LG_VSn SB
1 2 3 4
1 2 3 4
8 RP15 7 33 ohm 6 5
8 RP17 7 33 ohm 6 5
P[7] PNL_PWR P[3] HS_S0 P[3] HS_S1
1 2 3 4
TP3
8 RP19 7 33 ohm 6 5
R47 N/0 1/16W
TCK
3V3_IO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
GND I2 B8 B9 B10 B11 GND_0 VCC_0 B12 B13 B14 B15 I3/CLK1 I4/CLK2 VCC C0 C1 C2 C3 VCC_1 GND_1 C4 C5 C6 C7
GND TDI A8 A9 A10 A11 GND_0 A12 A13 A14 A15 I0 VCC_0 B0 B1 B2 B3 GND_0 B4 B5 B6 B7 I1 TCK VCC
IC9 4064V75
VCC TDO I6 D7 D6 D5 D4 GND_1 D3 D2 D1 D0 VCC_1 I5 C15 C14 C13 C12 GND_1 C11 C10 C9 C8 TMS GND
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
3V3_IO
I6
TDO
TP2
1 RP14 33 ohm 2 3 4
1 RP16 33 ohm 2 3 4
8 7 6 5
8 7 6 5
BKLT_CTL VFD_DET
R94 N/0 1/16W
RST1
P[7] P[7]
P[8]
LED_SBn LED_PWRn
RSTn
P[3] P[3]
P[13,21]
5V_SB
I5
3V3_IO
1 RP18 33 ohm 2 3 4
1 RP20 33 ohm 2 3 4
8 7 6 5
8 7 6 5
1 2 3 4 5
D
5V_SB CN3 N/CP0305-EJST-
C22 0.1uF 25V Z

D
EX_PS TVSP_PS
TMS
P[4] P[8]
TO LED CTL
TP4
3V3_IO
3V3_IO
3V3_IO
PG2 CP0058-JJST1 TDO 2 TDI 3 4 5 TMS 6 7 8 TCK

D
I2
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
3V3_IO
R76 I3 R95 I4 R96 I5 R97
33 1/16W 33 1/16W 33 1/16W 33 1/16W
A_DCTL
P[21]
LGAC_DET P[11] LG5V_DET P[11]
I4
I2 P[22] P[22] P[14] P[14,17] P[11,14,17] A_CTL0 A_CTL1 SPK_CTL SPK_EXT SB_AMP LG_I2Cn
1 2 3 4 1 2 3 4
8 7 6 5 8 7 6 5
RP23 33 ohm
RP25 33 ohm
1 2 3 4 1 RP24 33 ohm 2 3 4
RP22 33 ohm
8 7 6 5 8 7 6 5
R50 4.7K 1/16W
R48 R49
0 1/16W 0 1/16W
READY AL_ARM
I3
3V3_IO
AVBn_DET
DVI1_HPD DVI_SCDT P[13] P[13]
5V_SB
5V_SB
IC8D 74HCT04D
8
14
IC8C 74HCT04D
14
P[7,11] SB_PWR
SB_PWR
5
7
9
7
SB
5V_SB
5V_SB
IC8B 74HCT04D
14
IC8A 74HCT04D
2
R46 N/0 1/16W
14
P[11]
LG_VS
LG_VS
3
7
1
7
LG_VSn
2 4 6 8 10 12 14 16 18 20
R45 N/0 1/16W
P[11]
D
LG_VS
AL_ARM
3V3_SB
P[1] P[1] DT_IN DT_OUT
R117 0 1/16W
D
CN4 N/P1628-120 1 3 5 7 9 11 13 15 17 19
D
R115 N/0 1/16W
R116 0 1/16W
READY
SB
D_CLK
P[1]
SAMPO
Title Size C Date: DIGITAL SYSTEM - MEMORY & I/O Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 2
of
Rev 1.0 23
SCHEMATIC DIAGRAM
R52 N/0 1/16W
5V_SB
14
5V_SB
KEY_INB
R51 10K 1/16W
5V_SB
R54 10K 1/16W
Q3 2SC2412KBQ
IC10 74LV153PW
3 4 5 6
13 12 11 10
1I_3 1I-2 1I-1 1I-0 2I-3 2I_2 2I-1 2I-0 S0 S1 1E 2E
C46 0.1uF 16V

7
D
KEY0'
1
7
IC11A
KEY0
74HCT04D
R53 180 1/16W
LED_SBn
LED_SBn
P[2]
5V_SB
14
KEY1'
P[12] VGA_HS_IN P[5,9,13] HS2_EX52 TVSP2_HOUT
1Y
HS_DET
P[1]
3
7
IC11B
KEY1
74HCT04D
2Y
14
KEY2'
5
7
14
IC11C
KEY2
CN6 CP0307-EJST7 6 5V_SB 5 GND 4 SB_LED 3 ON_LED 2 SW_IN 1 RC_IN
Q2 2SC2412KBQ
LED_PWRn
LED_PWRn
P[2]
R55 10K 1/16W
R57 180 1/16W

REMOTE
R56 10K 1/16W
KEY_INA
REMOTE P[1]
P[2] P[2]
HS_S0 HS_S1
14 2
1 15
3V3_SB
VCC GND
16 8
74HCT04D
IC11F
C29 1000PF 50V

KEY3
C23 1000PF 50V

D
C24 1000PF 50V
C25 1000PF 50V
C26 1000PF 50V
C27 T 120PF 50V
R58 0 1/16W
T C28 120PF 50V

D
C47 0.1uF 16V

D
KEY3'
13
7
12
74HCT04D
5V_SB
5V_SB
14
KEY4'
11
7
IC11E
10
KEY4
74HCT04D
R60 10K 1/16W
R59 1.2K 1/16W

1
IC13 LM393
8
14
C30 1uF 16V
IC12 HIN232CB
1
3
4
C1+ C1C2+ C2VCC V+ VGND T1-IN R1-OUT R1-IN T1-OUT T2-OUT R2-IN R2-OUT T2-IN
KEY5'
11
12
13
14
7
8
9
10
R109 0 1/16W
9
7
IC11D
KEY5
74HCT04D
SO2 D1553-109-10 5 9 4 8 3 7 2 6 11 1
KEY0'
R61 100 1/16W
R68 10K 1/16W
C44 0.1uF 16V

D
KEY1'
R69 100 1/16W
TXD
5V_SB
R62 0 1/8W
TXD_IN
RXD_OUT
TP7
R110 0 1/16W R63

R64
R66
TXD
P[1]
>4V
3
4
RXD
22
RXD
1/16W
P[1]
TXD_UART
D
C31 1uF 16V
DTR CTS
RTS
C32 100PF T 50V
C39 T 100PF 50V

D
N/22
22
1/16W
1/16W
R65 1K 1/16W
>3V
D
16
2
RXD_UART
C35 + 47uF 16V
C36 0.1uF 25V Z
TP8
TP9
TP10
R67
N/22
1/16W
C33 T 180PF 50V
C34 T 180PF 50V
DSR
KEY_INB
R71 3K 1/16W
5V_SB
5V_SB
C37 0.1uF 25V Z

D
C38 0.1uF 25V Z
15
5V_SB
5V_SB
D
D
CN5 N/CP030A-EJST1 KEY0 2 KEY1 3 KEY2 4 KEY3 5 KEY4 6 KEY5 7 KEY6 8 9 10

D
R92 4.7K 1/16W
R91 D4 RLS4148 N/0 1/16W

KEY_INA
R70 10K 1/16W

D1 RLS4148
R77 10K 1/16W
R86 1.2K 1/16W
IC14 LM393
1
8
KEY0 KEY1 KEY2 KEY3 KEY4 KEY5 KEY6
P[1] P[1] P[1] P[1] P[1] P[1] P[1]
R74 82K 1/16W

Q4 2SC2412KBQ
KEY4'
R72 100 1/16W
C40 T 100PF 50V
D
R80 100 1/16W
R83 10K 1/16W
C45 0.1uF 16V

D
KEY3'
R84 100 1/16W
RC_IN
R93 0 1/16W
Q7 DTC144EKA
R90 470 1/16W

Q6 DTC144EKA
ZD1 UDZ5.6B
>1.6V
KEY2'
>4V
3
4
R75 2.2K 1/16W
C41 100PF T 50V
C43 T 100PF 50V

D
CN6 PIN1
R81 1K 1/16W
>3V
D
D
Output Key in
R73 240K 1/16W
5V_SB
KEY_INA
KEY0
0
KEY1
0
KEY2
0
KEY3
0
0
1
KEY4
1
KEY5
1
Voltage
5V
Normal
D2 RLS4148
KEYA
SW101
SW102
0
KEY_INA
0
R78 1M 1/16W
Q5 2SA1235F
R85 3K 1/16W
1
1
1
1
1
0
1
1
3.72V
2.5V
VOL+/ADJ+
0
0
VOL-/ADJ-
SW103
0
0
1
1
0
0
0
1
0
1
1.6V
CH+/SET+
CH-/SET-
KEY_INB
D3 RLS4148
R79 100 1/16W
SW104
SW105
0 0
1
0
1
1
0V
<1
<1.7
R82 4.7K 1/16W
D
KEY5'
C42 T 100PF 50V
D
1
1
0
0
3.72V
2.5V
POWER
Title Size B
SAMPO
RS-232 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 3
of
KEYB
SW106
SW107
1
INPUT
MENU
0V
Rev 1.0 23
Date:
SCHEMATIC DIAGRAM
R844
22
1/16W
MCA15
EX_PS
MCA15
EX_PS
P[1,2,8]
P[2]
5V_SBR
EX52_MPUGPIO0
EX52_MPUGPIO1
R804
N/0 1/16W
IC803 NC7WZ14P6X
R845
N/0 1/16W
6 Y1
5 VCC
A1 GND A2
MCA14
P[1,2]
EX52_MPUGPIO2
EX_VDDM
TP801
TP802
EX_VDDM
EX52_MPUGPIO3 EX52_MPUGPIO4
R805 N/1K 1/16W
R846
1/16W
4 Y2
192 193 191 190 189 188
179 175 171 161 157 153 136 134 124 119 103 99 95 85 81 77
173 176 169 155 158 151 132 129 121 116 105 98 101 87 80 83
139 141
IC801A SVP-EX52
C899 0.1uF 16V
P[6] EX52_MD[0..31]
VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VDDR VSSR
EX52_MD0 EX52_MD1 EX52_MD2 EX52_MD3 EX52_MD4 EX52_MD5 EX52_MD6 EX52_MD7 EX52_MD8 EX52_MD9 EX52_MD10 EX52_MD11 EX52_MD12 EX52_MD13 EX52_MD14 EX52_MD15 EX52_MD16 EX52_MD17 EX52_MD18 EX52_MD19 EX52_MD20 EX52_MD21 EX52_MD22 EX52_MD23 EX52_MD24 EX52_MD25 EX52_MD26 EX52_MD27 EX52_MD28 EX52_MD29 EX52_MD30 EX52_MD31 EX52_DQM0 EX52_DQM1 EX52_DQM2 EX52_DQM3
8051_PS#=1: Select SVP-EX 8051_PS#=0: Do Not Select SVP-EX
ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0
MCK0 MCK0# CS0# CS1# RAS# CAS# MVREF
DQS0 DQS1 DQS2 DQS3
MA11 MA10 MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0
73 75 76 78 84 86 88 90 91 93 94 96 102 104 106 108 148 150 152 154 160 162 163 165 166 168 170 172 178 180 181 183 79 97 159 177
NC MPUGPIO0 MPUGPIO1 MPUGPIO2 MPUGPIO3 MPUGPIO4
VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 DQM0 DQM1 DQM2 DQM3
INPUT
17 18
16 14
P_17
EX52_SDA EX52_SCL
OUTPUT
MPUGPIO0
MPUCS0N
P_17 FLD/IO SDA SCL A_D7 A_D6 A_D5 A_D4 A_D3 A_D2 A_D1 A_D0 RD# WR# ALE MPUCS0N INT# V5SF TESTMODE RESET BA1 BA0 CLKE WE#
R801 0 1/16W
MPUGPIO1
0
*CS1N
MPUGPIO2
MPUGPIO3
0
1
0
1
1
0
MCAD[0..7] P[1,2,8]
0
1
1
0
1
1
0
1
SVP-EX52 [256] (1 of 2)
203 202 201 200 197 196 195 194

RDn_uP WRn_uP ALE_uP EX52_MPUCS0N EX_INT
R802 N/0 1/16W
*CS1N is not a input or output pin CS1N=0: SVP-EX CPU access enabled CS1N=1:SVP-EX CPU access disabled
RDn_uP WRn_uP ALE_uP
EX_INT
216 217 218 219 220

15
12
13
147 145 144 142
P[1,2,8] P[1,2,8] P[1,8]

P[1]
5V_SBR
5V_SB
5V_SBR
R803 4.7K 1/16W
R828 0 1/16W
RST
C801 0.1uF 16V
ZD801 N/UDZ5.1B
EX_VD33
5V_P
R810 4.7K 1/16W
RST
P[1,8]
EX52_BA1 EX52_BA0 EX52_CLKE EX52_WE#
P[6] P[6] P[6] P[6]
R809 1.2K 1/16W
TP804
P_17
82 100 156 174
109 111 112 114 115 117 118 120 122 123 125 126
213 212 211 210 209 208 207 206
130 131 133 135 137 138 140
P[6] EX52_DQM[0..3]
DQS0 DQS1 DQS2 DQS3
EX52_MA11 EX52_MA10 EX52_MA9 EX52_MA8 EX52_MA7 EX52_MA6 EX52_MA5 EX52_MA4 EX52_MA3 EX52_MA2 EX52_MA1 EX52_MA0
P[6] DQS[0..3]
DQS[0..3]
EX52_MVREF
EX52_MVREF P[6] EX52_CAS# P[6] EX52_RAS# P[6]

EX52_CS0# P[6] EX52_MCLK0# P[6] EX52_MCLK0 P[6]
MCA[0..15] P[1,2,8]
R811 0 1/16W
R808 0 1/16W
TP803
EX52_MCLK0# EX52_MCLK0
P_17
GPIO
PWM
C804 + 10uF 16V
Q801 2SA1235F
C805 + 100uF 16V
C806 0.01uF 50V
P[6] EX52_MA[0..11]
EX_VD33
R812 N/1K 1/16W
I2C Address: 7E/7F
EX_VD33
R814 1K 1/16W
EX52_MPUGPIO4
MPU has Data/Address multiplex

EX_VDDM
1 2 3 4 1 2 3 4
RP801 22 ohm
MCA[0..15]
8 7 6 5 8 7 6 5
RP802 22 ohm
MCA0 MCA1 MCA2 MCA3 MCA4 MCA5 MCA6 MCA7 MCA14 MCA15
R806 68 1/16W
EX52_SDA
EX52_SCL
C803 68PF 50V
SDA1
SDA1
P[1,2,7,8,11]
SCL1
SCL1
P[1,2,7,8,11]
C802 T 68PF 50V
R807 68 1/16W
EX52_MPUCS0N
R813 1K 1/16W
EX_VDDM
I2C Address: 7C/7D
R815 N/1K 1/16W
MPU has separated Address/Data
C880 + 22uF 16V
C887 0.1uF 16V
C888 0.1uF 16V
C889 0.1uF 16V
C890 0.1uF 16V
C891 0.1uF 16V
C892 0.1uF 16V
C893 0.1uF 16V
C894 0.1uF 16V
C895 0.1uF 16V
C896 0.1uF 16V
C897 0.1uF 16V
C898 0.1uF 16V Title
SAMPO
SVP_EX52_1 of 2 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 4 Rev 1.0
Size B Date:
of
23
SCHEMATIC DIAGRAM
EX_VD33
LVDS Out To Panel

EX52_TXOUT0EX52_TXOUT0+
EX52_Y1
C851 0.1uF 16V
EX52_Y1G
R816 N/75 1/16W
Y_YUV_MP
EX52_TXOUT0- P[7] EX52_TXOUT0+ P[7]

Y_YUV_MP
P[20]
EX52_CVBS1
TP805
R826 1K 1/16W
C854 0.1uF 16V

EX52_CVBS1G
R819 N/75 1/16W
EX52_TXCLKEX52_TXCLK+

EX52_TXCLK- P[7] EX52_TXCLK+ P[7]
EX52_PB1
C852 0.1uF 16V
B_YUV_MP
B_YUV_MP
P[20]
P[10,13] EX52_DIN[0..23]
R817 N/75 1/16W
Video1-1
EX52_PB1G
EX52_PR1
EX52_TXOUT0+ EX52_TXOUT1EX52_TXOUT1+ LVDSVCC LVDSGND EX52_TXOUT2EX52_TXOUT2+ EX52_TXCLKEX52_TXCLK+ EX52_TXOUT3EX52_TXOUT3+ PLL_GND PLL_VCC
LVDSVDDP EX52_TXOUT0-
EX52_DIN0 EX52_DIN1 EX52_DIN2 EX52_DIN3 EX52_DIN4 EX52_DIN5 EX52_DIN6 EX52_DIN7 CLK2_EX52 EX52_DIN8 EX52_DIN9 EX52_DIN10 EX52_DIN11 EX52_VSSH EX52_VDDH EX52_DIN12 EX52_DIN13 EX52_DIN14 EX52_DIN15 EX52_DIN16 EX52_DIN17 EX52_DIN18 EX52_DIN19 EX52_VSSC EX52_VDDC
P[9,13] P[9,13] P[3,9,13] P[9,13]
CLK2_EX52 DE2_EX52 HS2_EX52 VS2_EX52
CLK2_EX52 DE2_EX52 HS2_EX52 VS2_EX52
R_YUV_MP
R_YUV_MP
P[20]
C853 0.1uF 16V
R818 N/75 1/16W
EX52_CVBS2
C855 0.1uF 16V
EX52_CVBS2G
R820 N/75 1/16W
VIDEO_MP
VIDEO_MP
P[20]
EX52_PR1G
36 35 34 33 32 31 30 29 28 27 26 25 24
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37
Digital In
IC801B SVP-EX52
EX52_DIN23 EX52_DIN22 EX52_DIN21 EX52_DIN20
EX_VD19
EX52_MLF1 EX52_PLF2
YPbPr1 In
Video1-2
P_64 P_63 P_62 P_61 P_60 P_59 P_58 P_57 P_56 P_55 P_54 P_53 P_52 P_51 P_50 P_49 P_48 P_47 P_46 P_45 P_44 P_43 P_42 P_41 P_40 P_39 P_38 P_37
69 70 71 72
3 6
9 67 89 107 113 143 149 167 184 198 214 251
DIN23 DIN22 DIN21 DIN20 MLF1 PLF2 VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VSSC VSSC VSSC VSSC VSSC VSSC VSSC VSSC VSSC VSSC VSSC VSSC
P_36 P_35 P_34 P_33 P_32 P_31 P_30 P_29 P_28 P_27 P_26 P_25 P_24
DE V H AIN_HS AIN_VS PR_R1 Y_G1 PB_B1 PR_R2 Y_G2 PB_B2 CVBS_OUTP CVBS_OUTN CVBS1 CVBS2 CVBS3 C AIN_N1 AIN_N2 AIN_N3
VREFP_1 VREFN_1 VREFP_2 VREFN_2 VREFP_3 VREFN_3
23 22 21
DE2_EX52 VS2_EX52 HS2_EX52
10 11
225 246 232 226 248 233
236 237 242 243 244 231
245 247 249
EX52_AIN_HS EX52_AIN_VS
EX52_PR1 EX52_Y1 EX52_PB1 EX52_PR2 EX52_Y2 EX52_PB2
EX52_Y2
C856 0.1uF 16V
EX52_Y_2
EX52_Y_2
P[12]
EX52_CVBS3
SV_Y_MP
SV_Y_MP
P[20]
EX_VD19
PAVSS2 PAVSS1 PAVSS PDVSS AVSS_ADC1 AVSS_ADC2 AVSS_ADC3 AVSS3_BG_ASS
PAVDD2 PAVDD1 PAVDD PDVDD AVDD_ADC1 AVDD_ADC2 AVDD_ADC3 AVDD3_AVSP2
C807 0.1uF 16V
C808 0.1uF 16V
C809 0.1uF 16V
C810 0.1uF 16V
C811 0.1uF 16V
C812 0.1uF 16V
1 256 XTALO XTALI
205 187 VSSH 66 VSSH 20 VSSH VSSH
204 186 VDDH 65 VDDH 19 VDDH VDDH
VDDL
8 68 74 92 110 146 164 182 185 199 215 250
SVP-EX52 [256] (2 of 2)
R821 N/75 1/16W

EX52_Y2G
C859 0.1uF 16V

EX52_Y2G P[12]
R824 N/75 1/16W
EX52_Y2G
EX52_PB2
EX52_CVBS3G
EX52_PB_2
C857 0.1uF 16V
EX52_PB_2
P[12]
EX52_CVBS1 EX52_CVBS2 EX52_CVBS3 EX52_C

EX52_AIN_N1 EX52_AIN_N2 EX52_AIN_N3
EX52_C
SV_C_MP
R822 N/75 1/16W

EX52_PB2G
SV_C_MP
P[20]
EX52_PB2G
EX52_PR2
C860 0.1uF 16V

EX52_PB2G P[12]
EX52_CG
R825 N/75 1/16W
EX52_PR_2
EX52_PR_2 P[12]
C858 0.1uF 16V

EX52_PR2G
EX52_AIN_HS
R823 N/75 1/16W
SVideo1
EX52_PR2G
VSSL
EX_VD19
EX52_PR2G P[12]
7 EX52_PAVSS2 4 EX52_PAVSS1 EX52_PAVSS 255 253 EX52_PDVSS 239 EX52_AVSS_ADC1 228 EX52_AVSS_ADC2 EX52_AVSS_ADC3 222 EX52_AVSS3_BG_ASS 235
EX52_AIN_HS P[12]
EX52_AIN_VS P[12]
EX52_PAVDD2 EX52_PAVDD1 EX52_PAVDD EX52_PDVDD EX52_AVDD_ADC1 EX52_AVDD_ADC2 EX52_AVDD_ADC3 EX52_AVDD3_AVSP2
R827 1M 1/16W C850 C849 33PF T 33PF 50V 50V
EX52_VSSL
X801 14.318MHz
EX52_VDDL
C813 0.1uF 16V
C814 0.1uF 16V
C815 0.1uF 16V
C816 0.1uF 16V
C817 0.1uF 16V
C818 0.1uF 16V
EX52_AIN_VS
Place 75 ohm resistors close to SVP-EX
5 2 254 252 238 227 221 234
127
128
241 240 230 229 224 223
EX52_VREFN_3 EX52_VREFP_3 EX52_VREFN_2 EX52_VREFP_2 EX52_VREFN_1 EX52_VREFP_1
PC1 In
EX52_VDDH
EX52_AIN_N1
EX52_VSSH
EX52_CVBS1G EX52_CVBS2G EX52_CVBS3G EX52_CG
EX52_AIN_N2
EX52_Y1G EX52_PB1G EX52_PR1G
EX52_AIN_N3
EX52_Y2G EX52_PB2G EX52_PR2G
Place close to EX_256 chip
AGND
AGND
AGND
EX_VL18
EX_VA18
EX_VD19
EX52_VDDC EX52_VDDL
FB801 120/2A
C830 + 10uF 16V
EX52_PAVDD1
FB805 120/2A
EX52_AVDD_ADC1
EX52_VREFP_1
C863 N/0.1uF 16V
EX52_VREFN_1
C862 0.1uF 16V EX52_AVSS_ADC1
C819 0.1uF 16V
C829 0.1uF 16V

EX52_VSSC EX52_VSSL
C831 + 10uF 16V
C832 0.1uF 16V
EX52_MLF1
FB809 120/4A
C833 2700PF 50V
C843 + 10uF 16V
C844 0.1uF 16V

EX52_AVSS_ADC1
C861 0.1uF 16V
EX52_PAVSS1
EX_VD33
EX52_PAVDD2
EX52_VDDH
FB806 120/2A
AGND
FB802 120/2A
C820 + 10uF 16V
C821 0.1uF 16V
C822 0.1uF 16V
C823 0.1uF 16V
C824 0.1uF 16V

EX52_VSSH
LVDSVDDP LVDSVCC PLL_VCC
C834 + 10uF 16V
C835 0.1uF 16V
EX52_AVDD_ADC2
FB810 120/4A
C866 N/0.1uF 16V
EX52_PLF2
C836 2700PF 50V
EX52_PAVSS2
C845 + 10uF 16V
C846 0.1uF 16V

EX52_AVSS_ADC2
EX52_VREFP_2
C864 0.1uF 16V
EX52_VREFN_2
EX52_PDVDD
AGND
FB807 120/2A
C837 + 10uF 16V
C838 0.1uF 16V
EX52_AVDD_ADC3
C869 N/0.1uF 16V
FB811 120/4A
FB803 120/2A
C825 + 10uF 16V
C826 0.1uF 16V
C827 0.1uF 16V
C828 0.1uF 16V
EX52_PDVSS
EX52_PAVDD
C847 + 10uF 16V
C848 0.1uF 16V
EX52_VREFP_3
EX52_VREFN_3
EX52_AVSS_ADC3
AGND
C867 0.1uF 16V
LVDSGND PLL_GND
FB808 120/2A
EX52_AVDD3_AVSP2
FB804 120/2A
C839 + 10uF 16V
C840 0.1uF 16V

EX52_PAVSS
C841 + 10uF 16V
C842 0.1uF 16V

EX52_AVSS3_BG_ASS
SAMPO
Title SVP-EX52_ 2 of 2 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 5 Rev 1.0
AGND
Size C Date:
of
23
SCHEMATIC DIAGRAM
R833
R834
0 1/16W
0 1/16W
EX52_BA1
P[4]
EX52_BA0
P[4]
R840 51 1/16W
R835
R836
0 1/16W
0 1/16W
0 1/16W
EX52_CS0# P[4]
EX52_MCLK0 P[4]
EX52_RAS# P[4]
P[4] EX52_MA[0..11]
EX52_MA[0..11]
R837
EX52_CAS# P[4]
EX52_WE# P[4]
C870 0.01uF 50V
R838
0 1/16W
EX52_MA0 EX52_MA1 EX52_MA2 EX52_MA3 EX52_MA4 EX52_MA5 EX52_MA6 EX52_MA7 EX52_MA8 EX52_MA9 EX52_MA10 EX52_MA11
R839
0 1/16W
EX52_CLKE P[4]
EX52_MCLK0 EX52_MCLK0#
R841 51 1/16W
EX52_MCLK0# P[4]
EX52_MD[0..31] P[4]
M4 M5 L5 M6 M7 L8 M8 M9 M10 L7 K5 L6
L4 M3 M1 L1 K1 K2 M11 L10 L11
L9 K8 B3 G3 L2 M2 L3 K11 K12 G10 B10
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
A6 B5 A5 A4 B1 C2 C1 D1
E2 E1 F2 F1 H2 H1 J1 J2
A2 G2
DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8
A7 B8 A8 A9 B12 C11 C12 D12

E11 E12 F11 F12 H11 H12 J11 J12
A11 G11
A12 G12

RP803 1 22 ohm 2 3 4 RP804 1 22 ohm 2 3 4
8 7 6 5 8 7 6 5
EX52_MD0 EX52_MD1 EX52_MD2 EX52_MD3 EX52_MD4 EX52_MD5 EX52_MD6 EX52_MD7
A0 A1 A2 A3 A4 A5 A6 A7 A8_AP A9 A10 A11
BA1 BA0 CS# RAS# CAS# WE# CKE CK CK#
RFU2 RFU3 NC_B3 NC_G3 NC_L2 NC_M2 NC_L3 NC_K11 NC_K12 NC_G10 NC_B10
P[4] EX52_DQM[0..3]
EX52_DQM[0..3]

EX52_DQM1 EX52_DQM0
DDQS1 DDQS0
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DM0 DM2 DQS0 DQS2 MCL VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
RP805 1 22 ohm 2 3 4 RP806 1 22 ohm 2 3 4

RP807 1 22 ohm 2 3 4 RP808 1 22 ohm 2 3 4
8 7 6 5 8 7 6 5
8 7 6 5 8 7 6 5
EX52_DQM[0..3]
A1 G1
L12
4M x 32 DDR
FBGA 144
DM3 DM1 DQS3 DQS1 VREF VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
EX52_DQM2 EX52_DQM3
DDQS2 DDQS3
EX52_MVREF

M12
B2 B4 B6 B7 B9 B11 D2 D11 E3 F3 H3 J3 E10 F10 H10 J10
P[4] DQS[0..3]
DQS0
DQS1
R829
15
1/16W
DDQS0
DDQS1
R830
R831
15
15
1/16W
1/16W
DQS2
DDQS2
DDQS3
DQS3
R832
15
1/16W
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VDD VDD VDD VDD VDD VDD VDD VDD
A3 A10 C3 C4 C5 C8 C9 C10 D5 D8 E4 E9 F4 F9 G4 G9 H4 J4 H9 J9
EX_VCCM
C871 0.1uF 16V

C872 0.1uF 16V
R842 51 1/16W
RP809 1 22 ohm 2 3 4 RP810 1 22 ohm 2 3 4
8 7 6 5 8 7 6 5
EX52_MVREF P[4]
R843 51 1/16W
EX_VCCM
IC802 EM6A9320
K4 K9 J5 J6 J7 J8 D4 D6 D7 D9
E5 E6 E7 E8 F5 F6 F7 F8 G5 G6 G7 G8 H5 H6 H7 H8
K3 K6 K7 K10 D3 D10 C6 C7
EX_VCCM
Second Source K4D263238E-GC45
EX_VCCM
EX_VCCM
C873 + 22uF 16V
C874 0.1uF 16V
C875 0.1uF 16V
C876 0.1uF 16V
C877 0.1uF 16V
C878 0.1uF 16V
C879 0.1uF 16V
C881 0.1uF 16V
C882 0.1uF 16V
C883 0.1uF 16V
C884 0.1uF 16V
C885 0.1uF 16V
C886 0.1uF 16V

Title Size B
SAMPO
SVP_EX SDRAM Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 6
of
SDRAM DECOUPLING CAPACITORS
Rev 1.0 23
Date:
SCHEMATIC DIAGRAM
CN201 CP1628-140-A
P[5] P[5] P[5] P[5] P[5] P[5] P[5] P[5] P[5] P[5] EX52_TXOUT0EX52_TXOUT0+ EX52_TXOUT1EX52_TXOUT1+ EX52_TXOUT2EX52_TXOUT2+ EX52_TXCLKEX52_TXCLK+ EX52_TXOUT3EX52_TXOUT3+
EX52_TXOUT0EX52_TXOUT0+ EX52_TXOUT1EX52_TXOUT1+ EX52_TXOUT2EX52_TXOUT2+ EX52_TXCLKEX52_TXCLK+ EX52_TXOUT3EX52_TXOUT3+
+5V
+V_PNL
3V3
R212 0 1/16W
P[2] VFD_DET
R205 N/0 1/16W
R216 N/0 1/16W
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
R213 0 1/16W
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
R201 N/0 1/16W
SCL1 SDA1
SCL1 SDA1
P[1,2,4,8,11] P[1,2,4,8,11]
FOR LVDS PANEL

D
R214 0 1/16W
R215 0 1/16W
R202 N/0 1/16W
3V3
R211 N/10K 1/16W
5V_V
R206 10K 1/16W
R217 N/0 1/16W

P[2,11] SB_PWR
R207 10 1/16W
C204 0.1uF 16V

D
+5V
FB201 N/120/4A
P[1] BRT_LCD
Q202 DTC144EKA
LCD
PDP
R206 R207 R218

R207 R211 R217
CN203 CP0303-EJST1 2 3
D
BRT_CTL INV_CTL
1 2 3
D
CN204 CP0303-EJST-
CN202 CP0046-JJST1 2 3 4 5 6
D
IC201 AP9435M
1
S1 S2 S3 G D1 D2 D3 D4
+V_PNL
8
7
6
C202 0.1uF 16V
R203 10K 1/16W
D201 RLS4148
3
4
C203 + 220uF 25V
5V_V
R208 1K 1/16W
P[2] PNL_PWR
C201 T 47PF 50V
DE4 NC0 4 OR7 CUF EOR SSI
P[2] BKLT_CTL
Q203 DTC144EKA
5V_V
R204 N/1K 1/16W
Q201 DTC144EKA
SB
ON
H
L
R209 N/0 1/16W
IB_CTL
R210 N/0 1/16W
P[11]
(CTL_C/INVERTER B+)
Q204 N/DTC144EKA
SB
ON
H
Title Size B
SAMPO
LCD INTERFACE-TTL/LVDS EVEN Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 7
of
Rev 1.0 23
Date:
SCHEMATIC DIAGRAM
P[1,4]
RST
RST
R944 N/0 1/16W
R903 N/1K 1/16W
P[2]
RST1
R901 N/68 1/16W
P[1,2,4,7,11] SCL1
SCL1
SP2_SCL
SP2_SDA
RP908 33 ohm 8 MCAD7 7 MCAD6 6 MCAD5 5 MCAD4 8 MCAD3 7 MCAD2 MCAD1 6 5 MCAD0
P[1,2,4,7,11] SDA1
SDA1
R902 N/68 1/16W
R936 68 1/16W
MCAD[0..7]
R938 22 1/16W
MCAD[0..7]
P[1,2,4]
C901 T 68PF 50V
C902 T 68PF 50V
RDn_uP
WRn_uP
RDn_uP
WRn_uP
P[1,2,4]
P[1,2,4]
TP_VDDM
R939
RP909 33 ohm
22
22
1/16W
1/16W
P[1,11]
P[1,11]
SCL2
SDA2
SCL2
SDA2
R937 68 1/16W
SP2_SCL
SP2_SDA
5V_SB
R940
ALE_uP
ALE_uP
P[1,4]
R909 I2C Address: 1K 1/16W 7E/7F
C903 0.1uF 16V
R904 0 1/16W
TVSP2_MPUCS0N
R905
R906
0 1/16W
N/0 1/16W
TVSP_INT
TVSP_INT
P[1]
R910 N/1K I2C Address: 7C/7D 1/16W Not Populated
1 2 3 4 1 2 3 4
TP901
P_17
GPIO
R907 N/0 1/16W
PWM
165 164 163 162 161 160 159 158
170 171 172
173 174 18
TP_VDDM
R941 N/1K 1/16W
RESET TESTMODE
A_D7 A_D6 A_D5 A_D4 A_D3 A_D2 A_D1 A_D0
V5SF
60 DQS0 76 132 DQS1 148 DQS2 DQS3
MCK0 MCK0# CS0# CS1# RAS# CAS# MVREF
MA11 MA10 MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0
118 120 WE# 121 CLKE 123 BA0 BA1
TVSP2_MD0 TVSP2_MD1 TVSP2_MD2 TVSP2_MD3 TVSP2_MD4 TVSP2_MD5 TVSP2_MD6 TVSP2_MD7 TVSP2_MD8 TVSP2_MD9 TVSP2_MD10 TVSP2_MD11 TVSP2_MD12 TVSP2_MD13 TVSP2_MD14 TVSP2_MD15 TVSP2_MD16 TVSP2_MD17 TVSP2_MD18 TVSP2_MD19 TVSP2_MD20 TVSP2_MD21 TVSP2_MD22 TVSP2_MD23 TVSP2_MD24 TVSP2_MD25 TVSP2_MD26 TVSP2_MD27 TVSP2_MD28 TVSP2_MD29 TVSP2_MD30 TVSP2_MD31 TVSP2_DQM0 TVSP2_DQM1 TVSP2_DQM2 TVSP2_DQM3
P[10] TVSP2_DQM[0..3]
53 55 56 58 62 64 66 68 69 71 72 74 78 80 82 84 124 126 128 130 134 136 137 139 140 142 144 146 150 152 153 155 59 75 133 149
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 DQM0 DQM1 DQM2 DQM3
MPUCS0N INT# FLD/IO
P_17
RD# WR# ALE
SDA SCL
P[10] TVSP2_MD[0..31]
IC901A SVP-EX22
13 12
15
16 14
17
MPUGPIO0 MPUGPIO1 VDDR VSSR VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM VSSM
157 156
115 117
151 145 135 129 112 110 100 95 79 73 63 57
147 143 131 127 108 105 97 92 81 77 65 61
TVSP2_MPUGPIO0 TVSP2_MPUGPIO1
TVSP_PS
TVSP_PS
P[2]
TP_VDDM
INPUT
MPUGPIO0
OUTPUT
MPUCS0N
CS1N
1
R908 N/1K 1/16W
TVSP=1: Select EX22 TVSP=0: Do Not Select EX22
SVP-EX22 [208] (1 of 2)
1 1 0 *CS1N is not a input or output pin CS1N=0: SVP-EX CPU access enabled CS1N=1: SVP-EX CPU access disabled
TVSP2_MPUGPIO0
R943 0 1/16W
MCA[0..15]
MCA15
MCA[0..15]
P[1,2,4]
IC8E 74HCT04D
5V_SB
14
IC8F 74HCT04D
12
5V_SB
14
TVSP2_MPUGPIO1
R942 0 1/16W
10
11
7
D
13
7
D
MCA9
TP_VDDM
R935 N/0 1/16W
85 87 88 90 91 93 94 96 98 99 101 102
106 107 109 111 113 114 116
TP_VDDM TP_VDDM
TVSP2_MCLK0
TVSP2_MA10 TVSP2_MA9 TVSP2_MA8 TVSP2_MA7 TVSP2_MA6 TVSP2_MA5 TVSP2_MA4 TVSP2_MA3 TVSP2_MA2 TVSP2_MA1 TVSP2_MA0
R913 0 1/16W
TVSP2_BA0 P[10] TVSP2_CLKE P[10] TVSP2_WE# P[10]
C904 0.1uF 16V
R911 1K 1/16W
C959 0.1uF 16V
C960 0.1uF 16V
C975 0.1uF 16V
C976 0.1uF 16V
C977 0.1uF 16V
C978 0.1uF 16V
C979 0.1uF 16V
C980 0.1uF 16V
TVSP2_MVREF
R914 0 1/16W
P[10] TVSP2_MA11
TVSP2_CAS# P[10] TVSP2_RAS# P[10] TVSP2_CS0# P[10] TVSP2_MCLK0 P[10]
C905 0.1uF 16V
R912 1K 1/16W
SAMPO
Title Size B Date: SVP-EX22_1 of 2 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 8
of
P[10] TVSP2_MA[0..10]
TP902 TP903
Rev 1.0 23
SCHEMATIC DIAGRAM
P[10] TVSP2_O[0..23]
TVSP2_O13 TVSP2_O14 TVSP2_O15 TVSP2_O16 TVSP2_O17 TVSP2_O18 TVSP2_O19
TVSP2_O20 TVSP2_O21 TVSP2_O22 TVSP2_O23
TVSP2_O8 TVSP2_O9 TVSP2_O10 TVSP2_O11
TVSP2_O12
TVSP2_O0 TVSP2_O1 TVSP2_O2 TVSP2_O3 TVSP2_O4 TVSP2_O5 TVSP2_O6 TVSP2_O7
SP2_Y1
Y_YUV_SP
C943 0.1uF 16V
Y_YUV_SP
P[20]
SP2_CVBS1
VIDEO_SP
VIDEO_SP
P[20]
R934 33 1/16W
P[5,13] CLK2_EX52
T C988 N/33PF 50V
R926 10K 1/16W
TP_VD33
SP2_Y1G
R918 N/75 1/16W
C946 0.1uF 16V
R921 N/75 1/16W
SP2_CVBS1G
B_YUV_SP
TVSP2_PCLK
SP2_VSSH SP2_VDDH SP2_VSSC SP2_VDDC
TVSP2_HOUT TVSP2_VOUT TVSP2_DOUT
1 2 3 4
RP907 33 ohm
SP2_PB1
8 7 6 5
C944 0.1uF 16V
SP2_PB1G
B_YUV_SP
P[20]
HS2_EX52 VS2_EX52 DE2_EX52
P[3,5,13] P[5,13] P[5,13]
R919 N/75 1/16W
Video2-1
P_52 P_51 P_50 P_49 P_48 P_47 P_46 P_45 P_44 P_43 P_42 P_41 P_40 P_39 P_38 P_37
TP_VD19
MLF1 PLF2 VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VSSC VSSC VSSC VSSC VSSC VSSC VSSC VSSC XTALO XTALI
P_36 P_35 P_34 P_33 P_32 P_31 P_30 P_29 P_28 P_27 P_26 P_25 P_24 P_23 P_22 P_21
SP2_MLF1 3 SP2_PLF2 6
IC901B SVP-EX22
AIN_HS AIN_VS Y_G1 PB_B1 PR_R1 Y_G2 PB_B2 PR_R2 CVBS_OUTP CVBS_OUTN CVBS1 CVBS2 CVBS3 C AIN_N1 AIN_N2 AIN_N3
10 11
T C987 N/33PF 50V
SP2_PR1
C945 0.1uF 16V
SP2_PR1G
R_YUV_SP
R920 N/75 1/16W
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
R_YUV_SP
P[20]
SP2_CVBS2
C947 0.1uF 16V
SP2_CVBS2G
SP2_CVBS_2
TP904
SP2_AIN_HS SP2_AIN_VS
SP2_Y1 SP2_PB1 SP2_PR1 SP2_Y2 SP2_PB2 SP2_PR2
R922 N/75 1/16W
SP2_VDDC
9 67 83 89 119 125 141 168

8 54 70 86 122 138 154 169
SP2_VSSC
SVP-EX22 [208] (2 of 2)
PAVSS2 PAVSS1 PAVSS PDVSS AVSS_ADC1 AVSS_ADC2 AVSS_ADC3 AVSS3_BG_ASS PAVDD2 PAVDD1 PAVDD PDVDD AVDD_ADC1 AVDD_ADC2 AVDD_ADC3 AVDD3_AVSP2
200 186 179 202 187 180

190 191 196 197 198 185 199 201 203
YPbPr2 In
Video2-2
SP2_CVBS1 SP2_CVBS2 SP2_CVBS3 SP2_C SP2_AIN_N1 SP2_AIN_N2 SP2_AIN_N3
SP2_Y2
C940 0.1uF 16V
SP2_Y_2
P[12]
SP2_CVBS3
SV_Y_SP
C948 0.1uF 16V
SV_Y_SP
P[20]
R915 N/75 1/16W
R923 N/75 1/16W
SP2_Y2G
SP2_PB2
SP2_Y2G
P[12]
SP2_CVBS3G
VREFP_1 VREFN_1 VREFP_2 VREFN_2 VREFP_3 VREFN_3
167 20 VSSH VSSH
166 19 VDDH VDDH
VDDL
1 208
SP2_PB_2
C941 0.1uF 16V
P[12]
X901 14.318MHz
VSSL
R916 N/75 1/16W
SP2_C
C949 0.1uF 16V
SV_C_SP
SV_C_SP
P[20]
103
7 4 207 205 193 182 176 189
5 2 206 204 192 181 175 188
104
195 194 184 183 178 177
SP2_PB2G
SP2_VREFN_3 SP2_VREFP_3 SP2_VREFN_2 SP2_VREFP_2 SP2_VREFN_1 SP2_VREFP_1
SP2_PR2
C942 0.1uF 16V
SP2_PR2G
R924 N/75 1/16W
SP2_PB2G
P[12]
SP2_CG
SP2_PAVSS2 SP2_PAVSS1 SP2_PAVSS SP2_PDVSS SP2_AVSS_ADC1 SP2_AVSS_ADC2 SP2_AVSS_ADC3 SP2_AVSS3_BG_ASS
SP2_PAVDD2 SP2_PAVDD1 SP2_PAVDD SP2_PDVDD SP2_AVDD_ADC1 SP2_AVDD_ADC2 SP2_AVDD_ADC3 SP2_AVDD3_AVSP2
SP2_VSSL
SP2_VDDL
SP2_PR_2
R917 N/75 1/16W
SP2_PR2G
P[12]
R925 1M 1/16W
C906 T 33PF 50V
SVideo2
P[12]
C907 T 33PF 50V
SP2_VDDH
SP2_AIN_HS
SP2_AIN_HS P[12]
SP2_AIN_VS P[12]
SP2_AIN_VS
SP2_VSSH
PC2 In
TP_VL18
TP_VA18
SP2_PAVDD1
FB901 120/2A
C908 + 10uF 16V
SP2_AVDD_ADC1
FB905 120/4A
TP_VD33
SP2_VDDH
SP2_AIN_N1
SP2_CVBS1G SP2_CVBS2G SP2_CVBS3G SP2_CG
SP2_AIN_N2
SP2_Y1G SP2_PB1G SP2_PR1G
SP2_AIN_N3
SP2_Y2G SP2_PB2G SP2_PR2G
C909 0.1uF 16V
SP2_MLF1
C910 2700PF 50V
C918 + 10uF 16V
C919 0.1uF 16V

SP2_AVSS_ADC1
FB908 120/2A
C924 + 10uF 16V
C925 0.1uF 16V
C926 0.1uF 16V
C927 0.1uF 16V
SP2_PAVSS1
SP2_PAVDD2
SP2_VSSH
AGND
AGND
AGND
AGND
SP2_AVDD_ADC2
SP2_AVDD3_AVSP2
FB902 120/2A
C911 + 10uF 16V
C912 0.1uF 16V
SP2_PLF2
C913 2700PF 50V
FB906 120/4A
SP2_PAVSS2
C920 + 10uF 16V
C921 0.1uF 16V
FB909 120/2A
C928 + 10uF 16V
C929 0.1uF 16V
SP2_AVSS3_BG_ASS
SP2_VREFP_1
C952 N/0.1uF 16V
SP2_AVSS_ADC2
AGND
SP2_VREFN_1
C950 0.1uF 16V
SP2_PDVDD
AGND
FB903 120/2A
C914 + 10uF 16V
C915 0.1uF 16V

SP2_PDVSS
SP2_PAVDD
SP2_AVDD_ADC3
TP_VD19
C951 0.1uF 16V SP2_AVSS_ADC1
FB907 120/4A
C922 + 10uF 16V
C923 0.1uF 16V

SP2_AVSS_ADC3
SP2_VDDL
C930 + 10uF 16V
C931 0.1uF 16V

SP2_VSSL
SP2_VREFP_2
C955 N/0.1uF 16V

C953 0.1uF 16V
SP2_VREFN_2
FB904 120/2A
C916 + 10uF 16V
C917 0.1uF 16V
AGND
SP2_PAVSS
TP_VD19
SP2_VREFP_3
C958 N/0.1uF 16V

C956 0.1uF 16V
SP2_VREFN_3
C932 0.1uF 16V
C933 0.1uF 16V
C934 0.1uF 16V
C935 0.1uF 16V
C936 0.1uF 16V
C937 0.1uF 16V
C938 0.1uF 16V
C939 0.1uF 16V
SAMPO
Title Size C Date: svp-EX22_2 of 2 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 9
of
Rev 1.0 23
SCHEMATIC DIAGRAM
IC902 D6432AH-6 TVSP2_MD0 TVSP2_MD1 TVSP2_MD2 TVSP2_MD3 TVSP2_MD4 TVSP2_MD5 TVSP2_MD6 TVSP2_MD7 TVSP2_MD8 TVSP2_MD9 TVSP2_MD10 TVSP2_MD11 TVSP2_MD12 TVSP2_MD13 TVSP2_MD14 TVSP2_MD15 TVSP2_MD16 TVSP2_MD17 TVSP2_MD18 TVSP2_MD19 TVSP2_MD20 TVSP2_MD21 TVSP2_MD22 TVSP2_MD23 TVSP2_MD24 TVSP2_MD25 TVSP2_MD26 TVSP2_MD27 TVSP2_MD28 TVSP2_MD29 TVSP2_MD30 TVSP2_MD31 TVSP2_DQM0 TVSP2_DQM1 TVSP2_DQM2 TVSP2_DQM3 2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56 16 71 28 59 14 21 30 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQM0 DQM1 DQM2 DQM3 NC NC NC VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ CKE CLK A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP BA0 BA1 WE CAS RAS CS NC NC NC NC 1 15 29 43 3 9 35 41 49 55 75 81 67 68 25 26 27 60 61 62 63 64 65 66 24 22 23 17 18 19 20 57 69 70 73
TP_VCCM
R927 0 1/16W TVSP2_CLKE P[8] TVSP2_MCLK0 P[8] R928 0 1/16W TVSP2_MA[0..10] P[8] TVSP2_MA0 TVSP2_MA1 TVSP2_MA2 TVSP2_MA3 TVSP2_MA4 TVSP2_MA5 TVSP2_MA6 TVSP2_MA7 TVSP2_MA8 TVSP2_MA9 TVSP2_MA10 R929 R930 R931 R932 R933 0 1/16W 0 1/16W 0 1/16W 0 1/16W 0 1/16W TVSP2_BA0 P[8] TVSP2_MA11 P[8] TVSP2_WE# P[8] TVSP2_CAS# P[8] TVSP2_RAS# P[8] TVSP2_CS0# P[8] P[9] TVSP2_O[0..23] TVSP2_O23 TVSP2_O22 TVSP2_O21 TVSP2_O20 TVSP2_O19 TVSP2_O18 TVSP2_O17 TVSP2_O16 TVSP2_O15 TVSP2_O14 TVSP2_O13 TVSP2_O12 TVSP2_O11 TVSP2_O10 TVSP2_O9 TVSP2_O8 TVSP2_O7 TVSP2_O6 TVSP2_O5 TVSP2_O4 TVSP2_O3 TVSP2_O2 TVSP2_O1 TVSP2_O0 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 8 RP901 7 33 ohm 6 5 8 RP902 7 33 ohm 6 5 8 RP903 7 33 ohm 6 5 8 RP904 7 33 ohm 6 5 8 RP905 7 33 ohm 6 5 8 RP906 7 33 ohm 6 5 EX52_DIN23 EX52_DIN22 EX52_DIN21 EX52_DIN20 EX52_DIN19 EX52_DIN18 EX52_DIN17 EX52_DIN16 EX52_DIN15 EX52_DIN14 EX52_DIN13 EX52_DIN12 EX52_DIN11 EX52_DIN10 EX52_DIN9 EX52_DIN8 EX52_DIN7 EX52_DIN6 EX52_DIN5 EX52_DIN4 EX52_DIN3 EX52_DIN2 EX52_DIN1 EX52_DIN0 EX52_DIN[0..23] P[5,13]
TVSP2_DQM[0..3] P[8] TVSP2_MD[0..31] P[8]
TP_VCCM
44 58 72 86 6 12 32 38 46 78 84 52
VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
TP_VCCM
C961 + 22uF 16V
C962 0.1uF 16V
C963 0.1uF 16V
C964 0.1uF 16V
C965 0.1uF 16V
C966 0.1uF 16V
C967 0.1uF 16V
C968 + 22uF 16V
C969 0.1uF 16V
C970 0.1uF 16V
C971 0.1uF 16V
C972 0.1uF 16V
C973 0.1uF 16V
C974 0.1uF 16V
SDRAM DECOUPLING CAPACITORS

SAMPO
Title TVSP2_SDRAM Size B Date: Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 10 of 23 Rev 1.0
SCHEMATIC DIAGRAM
P[1,8]
SCL2
SCL2
SDA2
P[1,8]
SDA2
5V_SB
2
D(3)
M8p
3V3_SB
3V3_SB
R409 0 1/16W
Q401 N/BSN20
3
Q402 N/BSN20
3
R410 0 1/16W
R401 N/10K 1/16W
R402 N/10K 1/16W
CN401 CP0046-JJST1 2 LG_VS 3 4 SB_PWR 5 SP_CTL 6 LG5V_DET
+5V_SB
FB402 0.45uH
FB403 120/4A
5V_SB
C401 + 47uF 16V
C402 0.1uF 25V Z

D
C403 + 220uF 16V
C404 + 100uF 16V
C405 0.1uF 25V Z
G(1) S(2) BSN20
SCL2_5V
SDA2_5V
SCL2_5V
P[23]
SDA2_5V
P[23]
P[1,2,4,7,8] SCL1
P[1,2,4,7,8] SDA1
SCL1
SDA1
2
5V_SB
3V3_SB
2
3V3_SB
CN404 CP0047-JJST1 2 3 4 5 6 7
D
+5V
FB405 120/2A
+3V3_SB
L401 N/10uH
FB404 N/120/4A
C408 + N/100uF 16V
3V3_SB
Q403 BSN20
3
R411 0 1/16W
Q404 BSN20
3
R412 0 1/16W
R403 N/10K 1/16W
R404 N/10K 1/16W
FB406 N/120/2A
C406 + N/47uF 16V
C407 N/0.1uF 25V Z
C409 N/0.1uF 25V Z
SCL1_5V
SDA1_5V
SCL1_5V
P[20,21,23]
SDA1_5V
P[20,21,23]
CN405 N/CP0304-EJST4 3 2 1
IC401 IRF7404
1
S1 S2 S3 G D1 D2 D3 D4
+5V
8
7
6
C415 + 47uF 25V
C414 0.1uF 25V Z
R418 1K 1/16W
C416 + 1uF 50V
C417 0.1uF 25V Z
2
3
4
C418 + 47uF 25V
5
D
C419 0.1uF 25V Z
CN403 CP0043-JJST3 2 1
+12V_T
LG_VS
SB_PWR
LG_VS
P[2]
SB_PWR
P[2,7]
T_5V
C412 + 220uF 25V
C413 0.1uF 25V Z
R417 0 1/16W
SP_CTL
R406
R407
V
D
Q407 DTC144EKA
SB_PWR
P[2,7]
C410 + 220uF 25V
R419 100 1/16W

D
C411 0.1uF 25V Z
N/0 1/16W
N/0 1/16W
LGAC_DET
IB_CTL
P[2]
P[7]
R408
LG5V_DET
N/0 1/16W
SB_AMP
LG5V_DET
P[2,14,17]
P[2]
IC402 IRF7404
1
S1 S2 S3 G D1 D2 D3 D4
+12V_T
8
7
6
C421 + 47uF 16V
C420 0.1uF 25V Z
R420 1K 1/16W
C422 + 1uF 50V
C423 0.1uF 25V Z
2
3
4
Q408 DTC144EKA
R421 100 1/16W

V
PG401 CP0046-JJST1 2 3 4 5 6
L717 33uH
VOUT AMPAMPOUT GND 8
5V_SB
SCL2_5V SDA2_5V
SCL1_5V SDA1_5V
IC714 MD5001T
1
VIN R/C OSC S/S
FB723 120/2A
C771 + 220uF 25V

D
C777 0.1uF 16V
C773 220PF 50V
2
3
4
C774 220PF 50V
C778 1000PF 50V
R733 5.1K 1/16W
C780 1000PF 50V

R737 1K 1/16W
C776 + 47uF 16V
FB724 120/2A
R732 1K 1/16W
D
D704 RGF20B
R734 150 1/16W
C775 0.047uF 16V
R735 1K 1/16W
D
SAMPO
Title Size B Date: DIGITAL SYSTEM - CONNECTOR Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 11
of
Rev 1.0 23
SCHEMATIC DIAGRAM
R502 0 1/16W
VGA_ROUT_1
VGA_RIN
R504 0 1/16W
VGA_BOUT_1
R506 0 1/16W
5V_SBV
VGA_GOUT_1
D508 RLS4148
C506 0.1uF 25V Z
D
R515 4.7 1/16W
5V_SB
VGA_BIN
VGA_BIN
R503 75 1/16W
C502 T 100PF 50V
VGA_GIN
VGA_GIN
R505 75 1/16W
R501 75 1/16W
C501 T 100PF 50V
R533 0 1/16W
R534 0 1/16W
C503 T 100PF 50V

3
R535 0 1/16W
2
5V_VGA
1
V
5V_SBV
V
5V_SBV
V
R517 10K 1/16W
R518 10K 1/16W
D509 RLS4148
R516 4.7 1/16W
5V_SBV
8
D501 BAV99
D502 BAV99
D503 BAV99
IC502 AT24C21
VCC TEST SCL SDA A0 A1 A2 VSS
1
2
3
4
D
5V_SBV
R509 0 1/16W
VGA_VS_IN
SCL_RGB
HS_OUT
VGA_RIN_G
A6
3
SDA_RGB
R507 N/10K 1/16W
SDA_RGB
IC501E N74F14D
5V_SBV
R510 22 1/16W
5V_SBV
14
14
IC501F N74F14D
12
VGA_HS_IN
11
10
VGA_RIN
VGA_GIN_G
VGA_GIN
13
7
V
A1
A7
A11
1
VGA_HS_IN P[3]
5V_SBV
A2
A8
A12
SD_RGB
V
D504 BAV99
V
R508 N/2K 1/16W

V
7
2
5V_SBV
VGA_BIN_G
VGA_BIN
D505 BAV99
+ C504 10uF 16V
5V_SBV
A3
A9
A13
VGA_HSIN
5V_VGA
A4
A10
A14
VGA_VSIN
5V_SBV
R511 N/10K 1/16W
R513 0 1/16W
C505 0.1uF 25V Z

D
VS_OUT
A5
A15
SC_RGB
SCL_RGB
R514 22 1/16W
5V_SBV
14
IC501A N74F14D
5V_SBV
14
IC501B N74F14D
4
VGA_VS_IN
VGA IN
D506 BAV99
V
R512 N/2K 1/16W

V
SO501A SOC DB15-2
1
2
5V_SBV
3
7
V
5V_SBV
D507 BAV99
5V_SBV
R523 10 1/16W
IC503 PI5V330Q
5V_SBO
5V_SBO
R520 75 1/16W
VGAVSOUT
R519 1K 1/16W
VS_OUT
V
C507 + 10uF 10V M

VGA_GOUT
Q501 2SC2412KBQ
R525 100 1/16W
R526 68K 1/16W

VGA_GOUT_1
EX52_Y2G EX52_Y_2 EX52_PR2G EX52_PR_2

SP2_Y2G SP2_Y_2 SP2_PR2G SP2_PR_2
13 10 6 3
B4 B3 B2 B1 A4 A3 A2 A1 OE
A/B
GND
Y4 Y3 Y2 Y1
8
12
VGA_GIN_G
VGA_GIN
5V_SB
CN501 3-PIN HEADER
3 2 1
VGA_SEL
14 11 5 2
15
1
VGA_RIN_G
VGA_RIN
EX52_Y_2 EX52_Y2G
EX52_PR_2 EX52_PR2G
EX52_Y_2 EX52_Y2G
P[5] P[5]
1
V
5V_SBV
D510 BAV99
R522 75 1/16W
C508 T 100PF 50V

V
R524 1.2K 1/16W
C509 10uF 10V M
EX52_PR_2 P[5] EX52_PR2G P[5]
VCC
16
5V_SB
EX52_PB_2 EX52_PB2G
EX52_PB_2 P[5] EX52_PB2G P[5]

EX52_AIN_VS P[5] EX52_AIN_HS P[5]
TO SVP-EX
EX52_AIN_VS EX52_AIN_HS
1
V
5V_SBV
VGAHSOUT
HS_OUT
D512 BAV99
5V_SBO
5V_SBO
R529 68K 1/16W
VGA_SEL = Low : PC --> TVSP VGA_SEL = HIGH : PC --> SVP-EX

IC504 PI5V330Q
EX52_AIN_VS EX52_AIN_HS EX52_PB2G EX52_PB_2
SP2_Y_2 SP2_Y2G
GND
Y4 Y3 Y2 Y1
R521 1K 1/16W
1
V
SP2_Y_2 SP2_Y2G
P[9] P[9]
5V_SBV
Q502 2SC2412KBQ
R528 100 1/16W
13 10 6 3
D511 BAV99
VGA_ROUT_1
B4 B3 B2 B1 A4 A3 A2 A1 OE
A/B
8
12
SP2_PB_2 SP2_PB2G
VGA_VS_IN
SP2_PB_2 SP2_PB2G
P[9] P[9]
VGA_ROUT
C510 T 100PF 50V
R527 1.2K 1/16W
C511 10uF 10V M

VGA_SEL
SP2_AIN_VS SP2_AIN_HS SP2_PB2G SP2_PB_2
14 11 5 2
15
VGA_HS_IN
SP2_PR_2 SP2_PR2G
SP2_PR_2 SP2_PR2G
P[9] P[9]
TO TVSP2
VGA_BIN_G
VGA_BIN
SP2_AIN_VS SP2_AIN_HS
SP2_AIN_VS P[9] SP2_AIN_HS P[9]
P[1]
3
V
VGA_SEL
VGA_SEL
VCC
16
5V_SB
1
V
5V_SBV
5V_SBO
B6
B11
D513 BAV99
B1
B7
VGA_ROUT
5V_SBO
B12
B2
B8
VGA_GOUT
Q503 2SC2412KBQ
R531 100 1/16W
R532 68K 1/16W
VGA_BOUT_1
VGAHSOUT
B13
B3
B9
VGA_BOUT
VGAVSOUT
B14
B4
B10
C512 T 100PF 50V

3
R530 1.2K 1/16W

2
V
C513 10uF 10V M
1
V
B15
B5
5V_SBV
D514 BAV99
SO501B SOC DB15-2
VGA OUT
Title Size C
SAMPO
VGA IN/OUT Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 12
of
Rev 1.0 23
Date:
SCHEMATIC DIAGRAM
R601 0 1/8W
3V3_SB
DVI_3V3
SI169
R669 NC
EP169
4.7K
VDVIA
FB601 N/120/2A
IC601 SII169CT100
VDVID
R670
R671
0
0
4.7K
NC
R672
R673
IC605
NC
NC
NC
10
10
24C08
C601 T 100PF 50V
C602 + 10uF 10V M
FB602 120/2A
C603 + 10uF 10V M

D
C604 + 10uF 10V M
C605 T 330PF 50V
C606 T 330PF 50V
C607 T 330PF 50V
C608 T 330PF 50V
C609 T 330PF 50V
C610 T 330PF 50V
C611 T 330PF 50V
C612 T 330PF 50V

D1_SCL2
R669 N/4.7K 1/16W
R670 0 1/16W
18 29 43 57 78
OVCC OVCC OVCC OVCC OVCC VCC VCC VCC OGND OGND OGND OGND OGND GND GND GND PVCC PGND AGND AGND AGND AGND AGND AVCC AVCC AVCC AVCC RX2+ RX2RX1+ RX1RX0+ RX0RXC+ RXCEXT_RES RESERVED OCK_INV DFO PD ST PIXS HSYNC VSYNC DE ODCK CTL1 CTL2 CTL3
6 38 67
R671 0 1/16W
QO0 QO1 QO2 QO3 QO4 QO5 QO6 QO7 QO8 QO9 QO10 QO11 QO12 QO13 QO14 QO15 QO16 QO17 QO18 QO19 QO20 QO21 QO22 QO23 QE0 QE1 QE2 QE3 QE4 QE5 QE6 QE7 QE8 QE9 QE10 QE11 QE12 QE13 QE14 QE15 QE16 QE17 QE18 QE19 QE20 QE21 QE22 QE23 STAG_OUT SCDT PDO
49 50 51 52 53 54 55 56
Remark: 24C08 With Program

D1_SDA2
SO601 D1555-124--
FB603 120/2A
C613 T 100PF 50V
C614 T 100PF 50V
C615 T 100PF 50V
C616 T 100PF 50V
C617 + 10uF 10V M
19 28 45 58 76
VDVIA
D
5 39 68
59 60 61 62 63 64 65 66
97 98
RX2_0N
17
RX2_2N
RX2_1N
9
RX2_0P
18
RX2_2P
5V_HPD2
D612 RLS4148
D613 RLS4148
R614 4.7 1/16W

5V_SB
VDVIA
RX2_2P RX2_2N
79 83 87 89 92 82 84 88 95
69 70 71 72 73 74 75 77
EX52_DIN[0..23] P[5,10]
P0B0 P0B1 P0B2 P0B3 P0B4 P0B5 P0B6 P0B7
RX2_1P
10
19
3
VDVIA
R602 N/10K 1/16W
80 81
10 11 12 13 14 15 16 17
1 2 3 4 1 2 3 4
1 2 3 4 1 2 3 4
8 7 6 5 8 7 6 5
8 7 6 5 8 7 6 5
RP601 33 ohm
RP602 33 ohm
EX52_DIN8 EX52_DIN9 EX52_DIN10 EX52_DIN11 EX52_DIN12 EX52_DIN13 EX52_DIN14 EX52_DIN15
5V_DVI2
C619 0.1uF 25V Z
D
11
D
20
4
D
12
21
R610 0 1/8W
R616 10K 1/16W
R617 10K 1/16W
R615 4.7 1/16W
IC602 AT24C21
R604 N/2K 1/16W
R603 390 1/16W
RX2_1P RX2_1N
RX2_0P RX2_0N
85 86
90 91
RX2_CP RX2_CN
93 94
20 21 22 23 24 25 26 27
P0G0 P0G1 P0G2 P0G3 P0G4 P0G5 P0G6 P0G7
RP603 33 ohm
RP604 33 ohm
To SVP-EX52 Capture Port
13
22
6
SCLDVI_2
8
7
6
VCC TEST SCL SDA
A0 A1 A2 VSS
R605 N/0 1/16W
96
RSV_2 SCL169_2 DFO_2
5V_DVI2
C618 + 10uF 10V M
D
14
OCKINV_2
P[2] PDn_DVI1
RX2_CP
23
SDADVI_2
R611 N/1K 1/16W

TP602
R612 10K 1/16W
15
RX2_CN
24
16
R618 10K 1/16W
HS_DVI VS_DVI DE_DVI CLK_DVI

OCKINV_2
VDVID
R606 33 1/16W
99 100 1 2 ST_2 (SDA169) 3 PIXS_2 4
30 31 32 33 34 35 36 37
P0R0 P0R1 P0R2 P0R3 P0R4 P0R5 P0R6 P0R7
1 2 3 4 1 2 3 4
8 7 6 5 8 7 6 5
RP605 33 ohm
RP606 33 ohm
48 47 46 44
HS2_DJTR
7 8 9
STAGOUT2 SCDT_ PDO_2
DVI_SCDT
P[2]
P[2] DVI1_HPD
C3
C1
D
R613 20K 1/16W

D
IC605 N/M24C08
R607 0 1/16W
TP601
40 41 42
R608 0 1/16W
DFO_2
D601 RLS4148
RSTn
R609 0 1/16W
P[2,21]
C5
C5
D1_SCL2
R672 N/10 1/16W
VCC TEST SCL SDA
A0 A1 A2 VSS
7
6
5
HS_DVI VS_DVI DE_DVI CLK_DVI
1 2 3 4
8 RP607 7 22 ohm 6 5
T C639 N/33PF 50V
T C640 N/33PF 50V
D
HS2_EX52 P[3,5,9] VS2_EX52 P[5,9] DE2_EX52 P[5,9] CLK2_EX52 P[5,9]
C4
C2
D1_SDA2
R673 N/10 1/16W
Func.
RESET* DFO_2
5 6 7 8
Parts
R609
R621
SiI161B
SiI169
5V_SB
X
O
X
X
X
R622
RP608 10K ohm
D(3)
M8p
ST_2
R625
5V_P
D602 BAV99
5V_P
5V_P
4 3 2 1
5V_P
D605 BAV99
5V_HPD2
D606 BAV99
G(1)
3V3_SB
S(2)
BSN20
D603 BAV99
D604 BAV99
R619 N/0 1/16W

R621 N/0 1/16W
OCKINV_2
R620 10K
1/16W
OCKINV_2
R605
R607
X
O
O
SDADVI_2
RX2_CP
RX2_0P
RX2_1P
RX2_2P
3 SDADVI_2
R622 N/10K 1/16W
DFO_2
R623 N/0 1/16W
VDVID
Q601 BSN20
X
X
RSV_2
R624 10K 1/16W

R626 N/10K 1/16W
3V3_SB
R633 33 1/16W
HS2_DJTR
ST_2
R632
R625 N/0 1/16W

D
ST_2
PIXS_2
(SDA169)
R627 0 1/16W
R628 N/10K 1/16W

R630 10K 1/16W
SCLDVI_2
3
Q602 BSN20
5V_P
D607 BAV99
5V_P
5V_P
5V_P
D610 BAV99
5V_HPD2
R629 N/0 1/16W
D608 BAV99
D609 BAV99
D611 BAV99
STAGOUT2
I2C Voltage Level Shifting

3V3_SB
R634 33 1/16W
RX2_CN
RX2_0N
RX2_1N
RX2_2N
3 SCLDVI_2
R631 N/0 1/16W
HS2_DJTR
R632 10K 1/16W
RP608 R633 R634 Q601 Q602
SCL169_2
SAMPO
Title Size C Date: DVI 1 SiI169 (HDCP) Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 13 Rev 1.0
of
23
SCHEMATIC DIAGRAM
PG305 N/CP0304-EJST1 2 3 4
AR_HP + R373 N/15 1/6W R75AU AL_HP OUT1 R3C1 N/15 1/6W R75AU C374 N/220uF 16V IC307 N/NJM2769A R375 N/10K 1/16W R0603 C378 N/0.47uF 16V
OUT2
BIAS
VCC
IN2
MUTE
GND
IN1
C379 N/220uF 16V
C381 + N/1uF 50V
HPMUTE
PLUG IN=1
C389 + 220uF 16V

A A
R386 2.2K 1/16W R0603
R387 2.2K 1/16W R0603
R379 3K 1/16W P[21] AL_DACM R380 7.5K 1/16W R0603

A
C383 0.1uF 50V C0805
C384 0.1uF 50V C0805
R381 51K 1/16W R0603
R382 51K 1/16W R0603 4 3 2 1 P[21] AR_DACM R383 7.5K 1/16W R0603
A
C386 0.1uF 50V C0805
C387 0.1uF 50V C0805 R384 3K 1/16W
R374 N/10K 1/16W
C376 N/47uF 16V
C375 N/100uF 16V
C377 N/0.1uF 50V
HP
L305 N/10uH
5V_P
AR_HPIN
P[21]
PG310 N/CP030C-EJST11V_SND 1 2 3 11V_GND 4 5V_SB 5 AL_MAIN 6 11V_SND_A 7 AR_MAIN 8 HP_MUTE 9 A_MUTE SPK_CTL 10 11 SPK_EXT 12 SB_AMP
11V_SND 11V_GND 5V_SB AL_MAIN 11V_SND_A AR_MAIN HP_MUTE A_MUTE SPK_CTL SPK_EXT SB_AMP P[17,18] P[17] P[17,18] P[17] P[17] P[17] P[2] P[2,17] P[2,11,17]
AL_HPIN C380 N/0.47uF 16V
P[21]
+ R376 N/100K 1/16W Q311 N/DTC144EKA + C382 100uF 16V

A A
A MUTE=1
Q309 N/DTC144EKA
A_MUTE
HP_MUTE
11V_SND
R378 10 1/16W
11V_SND_A
AL_MAIN R377 1.8K 1/16W R0603 C385 1uF 16V
IC308 NJM2904M
HPF
AR_MAIN R385 1.8K 1/16W R0603

A
C388 1uF 16V
SAMPO
Title Size B Date: AUDIO 1 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 14 of 23 Rev 1.0
SCHEMATIC DIAGRAM
5V_SB 2 L701 10uH C701 + 47uF 16V C702 0.1uF 25V Z C703 + 220uF 16V
IC701 LD1117S OUT ADJ VIN
3V3_SB 3 R701 124 1/16W F R702 205 F 1/16W
5V_SB 2 L702 10uH
IC702 LD1117S OUT ADJ VIN
2V5_SB 3 R703 124 1/16W F R704 124 1/16W F

D
C704 + 100uF 16V
Second Source AP1117E-ADJ
C705 0.1uF 25V Z
Vo AP1117E-ADJ SOT-223 1 2 3 GND Vo Vi
C706 0.1uF 25V Z
C707 + 220uF 16V
C708 + 100uF 16V
Second Source AP1117E-ADJ
C709 0.1uF 25V Z
D D
+5V
FB701 120/4A C712 0.1uF 25V Z L703 10uH C713 + 220uF 16V C714 + 100uF 16V
5V_P
3V3_P
FB720 N/120/4A
C711 + 47uF 16V
C715 0.1uF 25V Z
3.3V Power for DVI

C710 100PF 50V 5V_P 3 IC713 AP1084D33LA VIN GND VOUT 2 + C742 22uF 16V C743 0.1uF 16V FB710 120/4A DVI_3V3
D D D
FB702 120/4A L704 10uH C717 + 220uF 16V C718 + 100uF 16V
5V_V
+ C768 22uF 16V
C769 0.1uF 16V
C719 0.1uF 25V Z
C716 100PF 50V Vo
1
D D D
2V5_SB
L705 15uH 1
IC703 ILC6383ADJ Lx Vin LBI/SD SEL Vout GND LBO VFB
6V_SB 8 7 6 5
V
AP1084D-3.3 TO-252 1 6V_SB P[21] 2 3
D701 RLS4148
C720 + 47uF 16V

V
2 3 R707 N/0 1/16W 4
R705 10K 1/16W
C721 + 47uF 16V
to Page.11
R709 62K 1/16W
GND Vo Vi
R706 N/0 1/16W

V
R708 0 1/16W
V V
R710 15K 1/16W
SAMPO
Title Size A Date: POWER REGULATOR 1 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 15 of 23 Rev 1.0
SCHEMATIC DIAGRAM
5V_P
3
TP_VCCM
IC704 AP1084KLA
2V5_EX52
2
R711 0 1/8W
EX_VCCM
Vo
VIN ADJ
OUT
Power for EX52_DDR

C724 + 220uF 10V
AP1084D-3.3 TO-252
1
2
3V3_P
FB719 N/120/4A
FB704 120/2A
C726 + 220uF 10V
C727 0.1uF 16V
3.3V Power for EX22_SDRAM
FB703 120/4A
C722 + 22uF 16V
C723 0.1uF 16V

Vo
3
AP1084K-ADJ TO-263
R712 124 1/16W F

R713 124 1/16W F
C725 0.1uF 16V
Linear equation: Vout=1.25v*(1+R712/R713)
Linear condition: 100ohm < (R712) < 200ohm
GND Vo Vi
5V_V
IC705 AP1084K33LA
TP_VDDM
EX_VDDM
VIN
VOUT
2
+ C728 22uF 16V
3.3V Power for EX22
3
3V3_P
2.5V Power for EX52
+ C730 22uF 16V
C731 0.1uF 16V
GND
FB705 120/4A
C729 0.1uF 16V
FB708 120/2A
GND Vo Vi
TP_VD33
FB721 N/120/4A
FB717 120/2A
FB709 120/2A
C738 + 220uF 10V
C739 0.1uF 16V
3.3V Power for EX22
5V_P
3
IC706 AP1084K33LA
3V3_EX52
2
C734 + 22uF 16V
EX_VD33
VIN GND
VOUT
3V3
3V3_V
FB706 120/4A
3.3V for BL_CTL_B+

3V3_EX52
C732 + 22uF 16V
C733 0.1uF 16V
C735 0.1uF 16V
FB707 120/2A
C736 + 220uF 10V
C737 0.1uF 16V
3.3V Power for EX52
FB718 N/120/2A
TP_VA18
3
FB711 120/2A
C744 + 22uF 16V
C745 0.1uF 16V
IC707 AP1117E18LA
VIN
VOUT
2
C746 + 220uF 10V
C747 0.1uF 16V
GND
1.8V Power for EX22 ANALOG

Vo
AP1117E-1.8 SOT-223
IC708 AP1117E18LA
EX_VA18
2
VIN
VOUT
IC709 AP1117E18LA
TP_VL18
1 3 2 GND Vo Vi
GND
FB712 120/2A
C748 + 22uF 16V
C749 0.1uF 16V
C750 + 220uF 10V
C751 0.1uF 16V
1.8V Power for EX52 ANALOG
VIN GND
VOUT
FB713 120/2A
TP_VD19
IC711 AP1084DLA
Vo
EX_VD19
VIN
OUT
2
R714 210 1/16W F
R715 110 1/16W F
ADJ
FB715 120/2A
AP1084D-1.8 TO-252
C760 + 22uF 16V
C761 0.1uF 16V
C762 + 220uF 10V
C763 0.1uF 16V
IC712 AP1084DLA
GND
C752 + 22uF 16V
C753 0.1uF 16V
C754 + 220uF 10V
C755 0.1uF 16V
1.8V Power for EX22 DIGITAL
IC710 AP1117E18LA
EX_VL18
2
C758 + 220uF 10V
VIN
VOUT
FB714 120/2A
C756 + 22uF 16V
C757 0.1uF 16V
C759 0.1uF 16V
1.8V Power for EX52 DIGITAL
VIN
OUT
GND Vo Vi
ADJ
FB716 120/2A
C764 + 22uF 16V
C765 0.1uF 16V
1.9V Power for EX22 CORE
R716 210 1/16W F

R717 110 1/16W F
C766 + 220uF 10V
C767 0.1uF 16V
1.9V Power for EX52 CORE

SAMPO
Title Size B Date: REG POWER 2 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 16 Rev 1.0
of
23
SCHEMATIC DIAGRAM
R396 N/0.22 2W
12V
FB316 N/120/4A
12V IN
FB317 120/4A
11V_SND 11V_GND 5V_SB AL_MAIN 11V_SND_A AR_MAIN HP_MUTE A_MUTE SPK_CTL SPK_EXT SB_AMP
11V_SND 11V_GND 5V_SB AL_MAIN 11V_SND_A AR_MAIN HP_MUTE A_MUTE SPK_CTL SPK_EXT SB_AMP
P[14,18]
Q305 2SC3441F
R395 22 1/16W R0603
C337 100uF 16V
D1 D2 D3 D4
S1 S2 S3 G
IC311 IRF7404 SOP8
12V_SND
P[18]
P[14] P[14,18] P[14] P[14] P[14] P[2,14] P[2,14] P[2,11,14]
R359 100 1/16W
R355 4.7K 1/16W

2SA1037KQ Q306
PG306 CP030C-EJSTP12A
C340 + 220uF 16V
R360 22K 1/16W
R358 33K 1/16W
R356 3.3K 1/16W
C336 330uF 16V
D301 C338 RLS4148 47uF 16V
D302 RLS4148
R357 33K 1/16W
L306 100uH
6
5
PG301 CP0304-EJST-
C335 0.1uF 50V C0805
C396 0.1uF 50V C0805
R392 10K 1/16W R0603
1 2 3 4
+
C339 2200uF 16V
12V_SND_GND P[14,18]
D313 RLS4148 D3216
D303 RLS4148
DCAP1 V5D AGND1 REF OVERLOADB AGND2 V5A VP1 IN1 MUTE / IDLE NC VP2 IN2 BIASCAP AGND3 SLEEP
NC VDDA NC OUTP1 VDD1 VDD1 OUTM1 OUTM2 VDD2 VDD2 OUTP2 NC DGND NC PGND2 FAULT
33
C346 0.1uF 50V C0805
12V
D309 RLS4148
D304 N/RLS4148
32
31
30
12
R361 8.2K F 1/16W
C352 50V 0.1uF C0805
L301
10uH C349 0.22uF 25V D305 C0805 B140
C348 M 0.47uF 63V C5AU
C351 C347 100PF 2200uF 50V 10V

C350 0.1uF 50V C0805
LZ
R398 3.9K 1/16W

Lch
FB311 120/4A
LZ
R366 47K 1/16W
C361 2700PF 50V

C364 2700PF 50V
Rch
R364 15K 1/16W
11
26
C359 220uF 25V +
L303
12
25
24
D307 B140
10uH C360 0.22uF 25V C0805
R367 10 1/2W R10AU

C366 M 0.47uF 63V C5AU
C367 0.1uF 50V C0805
C358 C362 2200uF 10V 100PF 50V FB314 120/4A
R399 3.9K 1/16W
R368 47K 1/16W
Q313 DTC363TK
R372 1.2K 1/16W
R362 10K 1/16W
FB312 120/4A
R371 3.3K 1/16W
Q314 DTC363TK
MUTE=1
D314 N/RLS4148
MUTE=0
Q315 DTC144EKA
1 2 3 4 5 6 7 8 9 10 11 12
11V_SND
SB_AMP
C341 1uF 16V
ON=1
11V_GND 5V_SB AL_MAIN 11V_SND_A AR_MAIN HP_MUTE A_MUTE SPK_CLK SPK_EXT SB_AMP
sound power amplifier

IC306 TA2024
Q312 DTC144EKA SOT-23
+5GEN DCAP2
CPUMP PGND1
36
35
C342 1uF 16V
HI-CURRENT
FB310 120/4A
C345 100uF 16V CE063
C344 100PF 50V
PG308 CP0302-EJST1 2
IC312 ML7809FA
PG309 CP0043-JJST1 2 3
VIN
VOUT
3
C398 + 100uF 16V
C372 0.1uF 50V C0805
C343 0.1uF 50V C0805
34
RL301 N/RLYSPDT RL1 16 1
GND
Lch
CP0042-JJSTPG302
29
28
27
C353 220uF 25V
D306 B140
C357 0.47uF 16V
R365 39K 1/16W
L302
10uH
C355 0.22uF 25V C0805
R363 10 1/2W R10AU
C354 100PF 50V C356 2200uF 10V
1 2
FB315 120/4A
PG303
10
3 2 1
CP0043-JJST-
Rch
C369 R369 0.47uF 15K 16V 1/16W
R370 39K 1/16W
13
14
C363 0.1uF 50V C0805
D308 B140
23
C365 0.22uF 25V C0805

10uH
C368 100PF 50V

12V
15
22
21
20
19
L304
C370 2200uF 10V

D312 N/RLS4148
12
1 16
FOR EXT. SPKR BOX

PG304
DTC144EKA Q307
C371
16
0.1uF 50V C0805
17
RL1
R397 N/3.3K 1/16W
0 = IN
RL302 N/RLYSPDT
4 3 2 1
Lch
Rch
CP0044-JJSTP4B
18
SPK_EXT
R3B1 N/0 1/16W
Q308 DTC144EKA
Q310 N/2SC3441F
SAMPO
Title
D310 RLS4148
TA2024 Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 17 Rev 1.0
POWER MUTE = 1
11V_GND
Size B Date:
of
23
SCHEMATIC DIAGRAM
PG307 N/CP0045-JJST1 2 3 4 5
IC309 N/L5973D
L307 N/100uH
17~30V
C395 N/0.1uF 50V
C394 + N/330uF 35V
VCC GND VREF FB
OUT SYNC INH COMP
1
2
3
4
D311 N/B340B
12.2V
12V_SND
P[17]
R393 N/30.1K 1/16W F
R394 N/1.5M 1/16W
LZ
C397 + N/220uF 25V
LZ
C392 N/0.022uF 50V

R391 N/4.7K 1/16W
C391 + N/220uF 25V
C393 N/220PF 50V
R390 N/3.3K 1/16W F
12V_SND_GND P[14,17]
SAMPO
Title Size A Date: STEP DOWN CONVERTER Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 18
of
Rev 1.0 23
SCHEMATIC DIAGRAM
SV1D YKC22-1 CVBS1 B7 RV115 N/75 1/16W

V V
FV1 3.3uH CV129 T 330PF 50V

V
CVBS1 CV136 T 330PF 50V

V
CVBS1
P[20]
SV1B YKC22-1 CVBS2 A7 RV118 N/75 1/16W

V V
FV12 3.3uH CV131 T 330PF 50V

V
CVBS2 CV127 T 330PF 50V

V
CVBS2
P[20]
ZDV1 UDZ5.1B
ZDV2 UDZ5.1B
B8
SVHS1_C FV2 0 1/10W

V
P[20] FV3 0 1/10W

V
A8
V
SVHS2_C ZDV4 UDZ5.1B
P[20]
ZDV3 UDZ5.1B SV1A YKC22-1 SVHS1_SW P[20] SVHS1_Y P[20] A4 A2
SV1C YKC22-1 B4 B2
B6 B3 B1 RV116 N/75 1/16W

V V
A6 A3 A1 RV119 N/75 1/16W

V V
SVHS2_SW P[20] SVHS2_Y CV132 T 330PF 50V FV5 3.3uH CV128 T 330PF 50V
V V
P[20]
CV130 T 330PF 50V
FV4 3.3uH
CV126 T 330PF 50V

V V
ZDV5 UDZ5.1B
ZDV6 UDZ5.1B
B5
YUV1_Y
JKV1A P1208-1-9-1 RV117 N/75 1/16W

V V
YUV1_Y CV134 T N/330PF 50V FV6 0 1/10W

V
YUV1_Y
P[20]
YUV2_Y
JKV2A P1208-1-9-1 RV120 N/75 1/16W

V V
A5
V
YUV2_Y CV133 T N/330PF 50V FV7 0 1/10W

V
YUV2_Y
P[20]
T CV10 100PF 50V

V
ZDV7 UDZ6.8B
CV11 T 100PF 50V

V
ZDV8 UDZ6.8B
YUV1_B
JKV1D P1208-1-9-5 FV8 0 1/10W

V
YUV1_B T CV14 100PF 50V

V
YUV1_B
P[20]
YUV2_B
JKV2D P1208-1-9-5 FV9 0 1/10W

V
YUV2_B CV15 T 100PF 50V

V
YUV2_B
P[20]
ZDV9 UDZ6.8B
ZDV10 UDZ6.8B
YUV1_R
JKV1G P1208-1-9-9 FV10 0 1/10W

V
YUV1_R T CV18 100PF 50V

V
YUV1_R
P[20]
YUV2_R
JKV2G P1208-1-9-9 FV11 0 1/10W

V
YUV2_R CV19 T 100PF 50V

V
YUV2_R
P[20]
ZDV11 UDZ6.8B
ZDV12 UDZ6.8B
12
12
SAMPO Title Size B Date: AV CONNECTOR(AV3) Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 19 of 23 Rev 1.0
SCHEMATIC DIAGRAM
P[23] TV2_CVBS
TV2_CVBS
RV113 120 1/16W
V
RV114 220 1/16W

V
CV122 T 270PF 50V
CV33 47uF 16V
TV1_CVBS
CV121 T 270PF 50V
V
TV1_CVBS
P[23]
P[19]
CVBS1
CVBS1
+
RV24 10 1/16W
CV30 47uF 16V
RV112 220 1/16W

V
RV111 120 1/16W
RV21 75 1/16W
V
CV26 47uF 16V
RV23 1K 1/16W
CVBS2
RV25 10 1/16W
P[19] SVHS1_SW
P[2] SV1_DET
SVHS1_SW
RV18 1K 1/16W
CV25 47uF 16V

V
CVBS2
P[19]
RV17 75 1/16W
SVHS2_SW
RV122 1K 1/16W
SVHS2_SW
P[19]
CV28 47uF 16V

CV27 47uF 16V
SV2_DET
P[2]
P[19] SVHS1_Y
P[19] SVHS1_C
SVHS1_Y
SVHS1_C
RV28 75 1/16W
RV123 1K 1/16W
SVHS2_Y
SVHS2_C
RV110 75 1/16W
V
CV116 0.1uF 25V Z
SVHS2_Y
P[19]
P[19] YUV1_Y
YUV1_Y
CV7 47uF 16V
SVHS2_C
P[19]
P[19] YUV1_B
YUV1_B
CV4 10uF 16V +

CV8 10uF 16V
CV29 0.1uF 25V Z

V
RV29 75 1/16W
V
RV27 75 1/16W
LV1 0 1/10W
+9V
+9V
P[19] YUV1_R
YUV1_R
V5/SC6 Hin5 U5/SY6 SB6 Y5/CV6 SA6 SC4 SB4 SY4 SA4 CV4 SB3 CV3 SA3 CV2 GND1 CV1 SA5 Y6/CV5 SB5 U6/SY5 Hin6 V6/SC5 Vin6
P[19] YUV2_Y
YUV2_Y
CV2 47uF 16V

CV1 10uF 16V
CV32 0.01uF 50V
CV31 + 220uF 16V

V
RV36 10 1/16W
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
+
V
RV35 1.5K 1/16W
RV16 N/1.5K 1/16W
P[19] YUV2_B
YUV2_B
P[19] YUV2_R
YUV2_R
CV3 10uF 16V
RV8 75 1/16W
V
V
RV9 75 1/16W
V
RV10 75 1/16W
V
RV5 75 1/16W
V
RV6 75 1/16W
V
RV7 75 1/16W
VIN2 R2/V2 SDA SCL G1/Y1 HIN1 B1/U1 VIN1 R1/V1 Sync-out Sync-in Vsyncsepa AFC1 GND3 Field monitor R2/V2 Vout2 B2/U2 Hout2 G2/Y2 GND4 R1/V1 Vout1 B2/U1
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
Vin5 Y4/CV7 Hin4 U4/SY7 Vin4 V4/SC7 VCC1 G3/Y3 Hin3 B3/U3 Vin3 R3/V3 VCC3 G2/Y2 Hin2 B2/U2
ICV3 AN15865
CV1 VCC2 SY1 DCOUT SC1 SLVADR CV2/SY2 GND6 SC2 GND2 CV3/SY3 GND5 SC3 VCC4 G1/Y1 Hout1
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
QV5 2SC2412KBQ
RV40 N/1.5K 1/16W
V
CV39 0.01uF 50V

V
CV38 + 220uF 16V

V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
+
+
VIDEO_MP
RV43 1.5K 1/16W
RV19 N/1.5K 1/16W
VIDEO_MP
P[5]
RV41 150 1/16W

V
+
RV30 100 1/16W
RV48 1.5K 1/16W
RV22 N/1.5K 1/16W

V
RV46 N/1.5K 1/16W
QV7 2SC2412KBQ
RV47 150 1/16W
V
SV_Y_MP
SV_Y_MP
P[5]
T_5V
RV26 N/1.5K 1/16W

V
QV8 2SC2412KBQ
SV_C_MP
+9V
SV_C_MP
P[5]
P[11,21,23] SDA1_5V
P[11,21,23] SCL1_5V
SDA1_5V
SCL1_5V
RV31 100 1/16W

RV14 75K
CV20 0.47uF 16V

V
CV16 0.01uF 50V

V
CV17 + 220uF 16V
RV49 150 1/16W

V
RV32 10 1/16W
CV21 0.022uF 50V
RV104 N/1.5K 1/16W
CV35 0.01uF 50V
CV34 + 220uF 16V

V
RV15 4.7K 1/16W

V
CV23 4.7uF 16V
RV42 1.5K 1/16W
RV37 1.5K 1/16W
RV108 N/1.5K 1/16W

V
RV44 N/1.5K 1/16W
QV6 2SC2412KBQ
VIDEO_SP
VIDEO_SP
P[9]
RV45 150 1/16W

V
CV22 0.01uF 50V
P[9] R_YUV_SP
P[9] B_YUV_SP
RV109 N/1.5K 1/16W

V
RV38 N/1.5K 1/16W
QV4 2SC2412KBQ
RV39 150 1/16W
V
SV_Y_SP
SV_Y_SP
P[9]
P[9] Y_YUV_SP
RV11 0 1/16W
V
RV12 2K 1/16W
RV33 1.5K 1/16W

V
RV121 N/1.5K 1/16W
QV3 2SC2412KBQ
SV_C_SP
SV_C_SP
P[9]
RV34 150 1/16W

V
P[5] R_YUV_MP
P[5] B_YUV_MP
P[5] Y_YUV_MP
RV1 0 1/16W
V
RV2 2K 1/16W
SAMPO Title Size C Date: VIDEO SYSTEM - AUDIO & VIDEO SWITCH TA8851CN Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 20
of
Rev 1.0 23
SCHEMATIC DIAGRAM
JKV2H P1208-1-9-10
CVBS2_L
AGS
FBV3 120/2A L0805
A
A
P[22]
CV54 1000PF 50V
RV60 47K 1/16W
RV59 3.3K 1/16W
RV52 47K 1/16W
CV41 T 100PF 50V
CV40 0.47uF 16V
12
COMP_R
CV43 0.47uF 16V
RV64 47K 1/16W
A
P[22]
CVBS2_R
JKV2I P1208-1-9-11
CV44 T 100PF 50V
RV53 100 1/16W

COMP_L P[22]
FBV4 120/2A L0805

A
CV58 1000PF 50V
RV63 3.3K 1/16W
RV57 47K 1/16W
CV47 T 100PF 50V
CV45 0.47uF 16V
12
CV46 0.47uF 16V
CV49 T 100PF 50V
RV55 100 1/16W
JKV2E P1208-1-9-6
AR_PC
FBV1 120/2A L0805
A
A
CVBS1_L
8
CV42 1000PF 50V
RV51 47K 1/16W
RV50 3.3K 1/16W
RV61 47K 1/16W
CV53 T 100PF 50V
CV51 0.47uF 16V
CV50 0.47uF 16V
CV52 T 100PF 50V
RV58 100 1/16W

AL_PC
CVBS1_R
JKV2F P1208-1-9-7
CV55 0.47uF 16V

RV56 47K 1/16W
CV56 T 100PF 50V
RV62 100 1/16W

LV2 10uH
DV1 B140
FBV2 120/2A L0805

A
CV48 1000PF 50V

A
RV54 3.3K 1/16W
RV65 47K 1/16W
CV59 T 100PF 50V
CV57 0.47uF 16V
6V_SB
P[15]
8V
P[23]
ICV4 NJM2930L08
1
CV60 10uF 16V +
CV63 0.1uF 16V
CV64 0.1uF 16V
VOUT
GND
VIN
3
+9V
+12V_T
CV61 + 3.3uF 50V
CV62 100uF 16V
SC1_IN_L
SC2_IN_L
SC3_IN_L
VREFTOP
SC4_IN_L
AHVSS
SC1_IN_R
SC2_IN_R
SC3_IN_R
SC4_IN_R
AHVSS
AVSS
AVSS
ASG
ASG
MONO_IN
ASG
AGNDC
CV71 100uF 16V
RV66 100 1/16W
CV74 56PF 50V
CV72 0.1uF 16V
NC
NC
NC
NC
NC
NC
CV68 0.1uF 16V

FBV5 200
CV69 470PF 50V

CV73 10uF 16V
65
AVSUP AVSUP ANA_IN1+ ANA_INANA_IN2+ TESTEN XTAL_IN XTAL_OUT TP AUD_CL_OUT NC NC D_CTR_I/O_1
CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R
40
66
39
P[23] SIF2_OUT
67
38
CV75 10uF 16V
68
37
P[23] SIF1_OUT
RV68 100 1/16W
CV77 56PF 50V
71
ICV5 MSP3450G-B
VREF1 SC2_OUT_L SC2_OUT_R NC NC DACM_SUB NC DACM_L
34
CV80 2.2uF 50V

CV81 T 100PF 50V
RV67 0 1/16W
CV76 56PF 50V
69
36
CV78 2.2uF 50V

RV69 100 1/16W
RV20 N/0 1/8W
AUXOUT_L
70
35
CE040
AUXOUT_R
P LV3 10uH
CV79 5PF 50V D
RV71 1M 1/16W
XV1 18.432MHz
73
32
RV70 100 1/16W

CV84 1000PF 50V
74
31
CV82 T 100PF 50V
CV85 10uF 16V
72
33
CE040
CV83 5PF 50V D

P[2] A_DCTL
75
30
SUB_OUT
76
29
1800PF 50V CV86

CV88 1800PF 50V
RV72 330
1/16W
CV36 N/0.01uF 50V
77
28
GND
CV65 0.1uF 16V
CV70 + 10uF 16V
ICV8 ML7809FA
3
CV66 0.1uF 16V
VOUT
VIN
1
CV123 0.1uF 16V
CV67 + 100uF 16V
CV124 + 100uF 16V
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
I2S_DA_IN1
I2S_DA_IN2
79
I2S_DA_OUT
ADR_WS
RESETQ
DACA_R
ADR_DA
ADR_CL
I2S_WS
I2C_DA
DVSUP
DVSUP
DVSS
DVSS
DVSS
RV74 0 1/16W
STBYQ
DVSUP
I2C_CL
I2S_CL
NC
NC
NC
NC
NC
NC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
PG1 N/CP0044-JJST1 2 3 4
RV77 100 1/16W
RV78 100 1/16W
CV92 470PF 50V
24
P[11,20,23] SCL1_5V
P[11,20,23] SDA1_5V
T_5V
P[2,13] RSTn
+
+
78
D_CTR_I/O_0 ADR_SEL
DACM_R VREF2 DACA_L
27
26
80
25
CV90 1000PF 50V
RV75 330 1/16W
RV73 330 1/16W
CV91 0.47uF 16V
CV37 0.1uF 50V
CV87 N/0.01uF 50V
AL_DACM
P[14]
AR_DACM
P[14]
CV89 0.1uF 50V
AL_HPIN
P[14]
AR_HPIN
P[14]
FBV6 200
CV93 1000PF 50V
RV76 330 1/16W
CV95 0.1uF 16V

A
CV94 0.47uF 16V
RV79 47K 1/16W
RV80 47K 1/16W
P LV4 10uH
CV96 100uF 16V
RV81 100 1/16W
CV97 0.1uF 16V
AUDIO_L
JKV3B YKC21-1 2
FBV7 120/2A
AUXOUT_L
CV98 1000PF 50V

A
A
RV82 47K 1/16W
AUDIO_R
JKV3C YKC21-1 3
FBV8 120/2A
CV99 1000PF 50V
A
A
AUXOUT_R
RV83 47K 1/16W
SUB_WFR
JKV3A YKC21-1 1
FBV9 120/2A
CV100 1000PF 50V
A
A
SUB_OUT
RV84 47K 1/16W
SAMPO Title Size C Date: MSP & INPUT PORT Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 21 Rev 1.0
of
23
SCHEMATIC DIAGRAM
T_5V
+9V
CV117 + 220uF 16V
CV118 0.1uF 25V Z
CV119 + 220uF 16V
CV120 0.1uF 25V Z

RV85 47K 1/16W
RV95 3.3K 1/16W
RV86 47K 1/16W
RV87 47K 1/16W
RV88 47K 1/16W
CV101 100uF 16V
RV89 2.2K 1/16W
RV90 2.2K 1/16W
R IN
JKV1I P1208-1-9-11
12
FBV10 120/2A
RV97 47K 1/16W
CV103 470PF 50V
CV102 0.47uF 16V
RV91 47K 1/16W
RV92 47K 1/16W
RV93 47K 1/16W
RV94 47K 1/16W
ICV6 HEF4052BT input selection

12
14
X0 X1 X2 X3 A B X-COM Y-COM
RV96 10 1/8W
11V_SND
10
COMP1
FBV11 120/2A
12
RV98 47K 1/16W
L IN
CV106 470PF 50V
15
9
13
10
CV107 0.47uF 16V

RV99 3.3K 1/16W
11
COMP_R
P[21]
JKV1H P1208-1-9--
1
5
COMP_L
P[21]
Y0 Y1 Y2 Y3 INH
R IN
JKV2C P1208-1-9-3
FBV12 120/2A L0805
VDD VSS VEE
16
RV101 47K 1/16W
CV109 470PF 50V
RV100 3.3K 1/16W
CV108 0.47uF 16V
4
6
COMP2
RV102 47K 1/16W
2
CV111 47uF 16V
AGS
P[21]
L IN
CV110 470PF 50V
RV103 3.3K 1/16W
CV112 0.47uF 16V
CTL0
A
CTL1
A
L
H
B
L
REMARK
IN0
IN1
IN2
COMP1
FBV13 120/2A L0805
FB301 120/2A
R324 10K 1/16W
H
L
H
H
H
JKV2B P1208-1-9--
RV105 10K 1/16W

Q302 DTC144EKA
COMP2
R IN
JKV1F P1208-1-9-7
RGB
L
L
L
H
RGB
FB302 120/2A
R313 47K 1/16W
C303 470PF 50V
R311 3.3K 1/16W
C302 0.47uF 16V
DVI
IN3
Q301 DTC144EKA
L IN
R315 47K 1/16W
C304 470PF 50V
A
A
A_CTL0
P[2]
JKV1E P1208-1-9--
FB303 120/2A
R317 3.3K 1/16W
R IN
JKV1C P1208-1-9-3
FB307 120/2A L0805
R327 47K 1/16W
C305 0.47uF 16V
A_CTL1
P[2]
C312 470PF 50V
R326 3.3K 1/16W
C311 0.47uF 16V
DVI 1
FB308 120/2A L0805
2
R329 47K 1/16W
C313 470PF 50V
L IN
R331 3.3K 1/16W
C314 0.47uF 16V
SAMPO Title Size B Date: Component Input Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 22
of
JKV1B P1208-1-9--
FB309 120/2A L0805
Rev 1.0 23
SCHEMATIC DIAGRAM
TU1 FQ1236PH3
VIDEO
5V IF
SDA
SCL
SIF
NC
NC
NC
NC
AS
TU2 FQ1236PH3
10
VIDEO
RT25 N/2.2K 1/16W
5V IF
SDA
SCL
SIF
NC
NC
NC
NC
AS
10
11
12
13
14
AF
5V
11
12
13
14
AF
5V
TV1_CVBS
RT23 N/0 1/16W
TV1_CVBS
TP11
P[20]
RT26 N/2.2K 1/16W
TV2_CVBS
RT1 0 1/16W
TV2_CVBS
TP12
P[20]
CT8 10uF 16V
RT2 0 1/16W
RT24 N/0 1/16W
CT7 10uF 16V
CT5 100PF 50V

LT1 330uH
T_5V
CT6 T 100PF 50V
CT2 0.01uF 50V
T_5V
CT3 100PF 50V
CT4 T 100PF 50V
CT1 0.01uF 50V
CT9 + 1000uF 10V
CT10 0.01uF 50V
RT5 100 1/16W

SCL1_5V
SDA1_5V
RT6 100 1/16W
P[11,20,21] SCL1_5V
LT3
CT11 + 1000uF 10V
LT2 330uH
CT12 0.01uF 50V

T_5V_G
P[11,20,21] SDA1_5V
8V
8V
P[11,20,21] SDA1_5V
SDA1_5V
SCL1_5V
RT27 N/100 1/16W
100uH
8V
P[21]
SIF
RT28 N/100 1/16W
LT4 100uH
P[11,20,21] SCL1_5V
SIF
RT3 100 1/16W
RT4 100 1/16W
CT13 1000PF 50V
RT7 15K 1/16W

RT11 1K 1/16W
RT8 1.5K 1/16W
P[11] SCL2_5V
P[11] SDA2_5V
SCL2_5V
SDA2_5V
QT1 MMBT2222A
CT17 0.1uF 16V
CT15 + 100uF 16V
CT14 1000PF 50V
RT9 15K 1/16W
RT10 1.5K 1/16W
RT12 1K 1/16W
QT2 MMBT2222A
CT18 0.1uF 16V
CT16 + 100uF 16V
QT3 MMBT2222A
CT19 33PF 50V
SIF2_OUT
RT14 1K 1/16W
QT4 MMBT2222A
SIF1_OUT
SIF2_OUT
P[21]
SIF1_OUT
P[21]
RT13 3.3K 1/16W
RT17 330 1/16W
CT20 33PF 50V
RT15 3.3K 1/16W
RT18 330 1/16W
RT16 1K 1/16W
SIF1_G
SIF2_G
SAMPO Title Size B Date: AV & TUNER Document Number QPWB11526-1G--Thursday, May 12, 2005 Sheet 23
of
Rev 1.0 23
SCHEMATIC DIAGRAM 2. Front Button Control Board
KEYPAD BOARD
5V_SB PG102 CP0317-EJST7 SWB_OUT 6 5V_SB GND 5 SB_LED 4 ON_LED 3 2 SWA_OUT RC_OUT 1
D
D102 RLS4148
0V
5V_SB R109 0 1/16W ZD102 UDZ5.6B
R169 4.7K 1/16W
R168 4.7K 1/16W
1.67V
R167 15K 1/16W
2.10V
IC106 93M2AKF 5V_SB VOUT GND VCC
C140 1000PF 50V
S107 SW-A1199
S106 SW-A1199
S105 SW-A1199
MENU
INPUT
POWER
TO Main Board
R170 4.7 1/16W
R166 22 1/16W
R177 22 1/16W
R171 470 1/16W
D101 RLS4148
5V_SB 3
GRN
1
ORG
D103 RLS4148
1 2 3
C139 T 470PF 50V
ZD101 UDZ5.6B
C141 + 100uF 10V M

D
LD101 HB5-30YGC 2 R110 0 1/16W ZD103 UDZ5.6B
0V
R165 4.7K 1/16W
1.25V
R164 4.7K 1/16W
1.67V
R163 15K 1/16W
2.10V
C142 1000PF 50V
S104 SW-A1199
S103 SW-A1199
S102 SW-A1199
S101 SW-A1199
CH-/SEL-
CH+/SEL+
VOL-/ADJ-
VOL+/ADJ+
NOTE(V0.1A): 1.TRAINSITION KEY PAD FROM PARALLEL MODE TO SERIAL MODE 2.ADD DIODE and ZENER DIODE for ESD 3.CHANGE LED RESISTOR TO ANODE PIN
VOLT
SWA_OUT NONE VOL+/ ADJ+ VOL-/ ADJSEL+/CH+ SEL-/CH-
SWB_OUT NONE POWER INPUT -----MENU
2.50V 2.10V 1.67V 1.25V 0V
sampo Title Size B Date: KEYPAD Document Number QPWB11418-1G-1Monday, May 09, 2005 Sheet 1 of 1 Rev 2.0
SCHEMATIC DIAGRAM 3. Power Filter Board
To Main Power IN
CN802 CP1552-1---1 2 3
L802
1
C803 0.47uF AC250V M
L801
2
C804 N/470PF AC400V M
To SUB Power IN
CN803 N/CP1552-1---1 2 3
C802 0.47uF AC250V M
C801 0.47uF AC250V M
ZN01 N/271KD14C4
R801 N/390K 1W
1 2 3
CN801 CP1552-1----
AC IN
C805 N/470PF AC400V M
1 2 3
CN805 N/CP1552-1----
To SUB Power IN
SAMPO Title Size B Date: POWER FILTER Document Number QPWB11513-1G--Tuesday, May 24, 2005 Sheet 1
of
Rev 1.0 1
Certificates/Test Reports
VER1.0
1. 2. 3.
Notice of Authorization to apply the UL mark Test Report for P4202YD05 CB Test Report for P4202YD05 (950)
<12007879 001>
Page 2 of 74
Particulars: test item vs. test requirements Equipment mobility .................................................... : Stationary Operating condition .................................................... : Continuous Mains supply tolerance (%) ........................................ : +10%, -10% Tested for IT power systems ..................................... : Yes (for Norway) IT testing, phase-phase voltage (V) .......................... : IT, 230V (for Norway) Class of equipment .................................................... : Class I Mass of equipment (kg).............................................. : 35.5 Protection against ingress of water ........................... : IPX0 Test case verdicts Test case does not apply to the test object...................: N(.A.) Test item does meet the requirement............................: P(ass) Test item does not meet the requirement .....................: F(ail) Testing Date of receipt of test item ........................................ : February, 2004 Date(s) of performance of test .................................. : February - October, 2004
TRF No.: IECEN60950A
TRF originator: SGS FIMKO
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General remarks This report is not valid as a CB Test Report unless appended to a CB Test Certificate issued by a NCB, in accordance with IECEE 02. This report shall not be reproduced except in full without the written approval of the testing laboratory. The test results presented in this report relate only to the item tested. (see remark #)" refers to a remark appended to the report. "(see Annex #)" refers to an annex appended to the report. Throughout this report a point is used as the decimal separator. Comments Factory(ies): Sampo Corporation. No. 55, Chung Cheng Road, Tu-Cheng City, Taipei 236 Taiwan. Brief description of the test sample: The equipment model P4202YD05XXX, where X can be 0-9, A-Z or blank for marketing purpose, is a 42 Plasma Display Monitor with optional TV tuner for general office use. Models 42MF7000/XX and 42MF7010/XXXX are identical to model P4202YD05XXX except for model number. The color plasma display module and internal building-in switching power supply (SPS) are certified and CB Scheme tested by TV Product Service according to IEC 60950: 1999. See appended 1.5.1. for details. This Plasma Display contains elements mentioned above and Image board, AV module board, Audio board, Front button control board, EMI filter, power switch board, power switch, remote controller and speakers. All tests were carried out with model P4202YD05XXX to represent the other models if no else specified. This Plasma Display Monitor contains a TV tuner (Philips, type FQ1216ME, FQ1236). Therefore the IEC Guide 112:2000 for multimedia equipment has been considered. The surge test, insulation resistance test and dielectric strength test are conducted according to sub-clause 10.1, 10.2 and 10.3 of IEC 60065:1998. After 50 discharges at a maximum rate of 12 per minute, from a 1nF capacitor charged to 10kV, the insulation resistance between primary and antenna terminal was more than 100M and subject to DC 4240V of electric strength test.
TRF No.: IECEN60950A
TRF originator: SGS FIMKO
PANEL POWER SUPPLY SPECIFICATION
VER1.0
1. 2. 3.
SMP POWER SUPPLY SPECIFICATON SMP POWER SUPPLY SCHEMATIC DIAGRAM PHOTOS for INTERNAL and EXTERIOR WIRING
PANEL POWER SUPPLY SPECIFICATION
VER1.0
SMPS SPECIFICATIONS
1. Connector Location
S C A N D I R V E B O A R D
Y- Drive Board
SMPS X- Drive Board
Logic Board Address Buffer Board
[Note] 1. Layout Schematic is viewed from back side of PDP Module. 2. The Output Power for Image board is separated from Main SMPS. 3. The Power for Image board is output by DC link Voltage boosted through PFC. 4. The Input Power Connector in Y-Drive Board is named as "SY". 5. The Input Power Connector in X-Drive Board is named as "SX". 6. The Input Power Connector in Logic Board is named as "SL". 7. The Input Power Connector in Address Buffer Board is named as "BUFFER"..
-1-
PANEL POWER SUPPLY SPECIFICATION 2 DC outputs for Image Scaler Board

N am e D 3V3 D 6V Vaudi o V fa n Vt 5VS B A 6V A 12V Vol ta g e [V ] 3 .3 6 .0 1 2 .0 1 2 .0 3 3 .0 5 .0 6 .0 1 2 .0 100 100 200 0.1 0.1 0.1 Ri ppl e [m V p p ] 100 100 100 Mi n. 1.0 0.7 0.0 0.0 C u rren t[A ]
VER1.0
R e m arks T yp . 1.0 1.4 2.0 M a x. 1.5 2.0 3.5 1.0 0 .0 01 1.0 1.0 1.0 Sam e w i th V a u d i o Vol ta g e fo r T u n ne r
Pin assignment of connectors for Power Supply

: IMAGE BOARD Output Connector & Pin Assignment(USER ONLY)
-2-
PANEL POWER SUPPLY SPECIFICATION 4 Power Applying Sequence

AC Input 5VSB Relay-On Output Min 200mSec ~ Max 250mSec 3V3, 5V Va, Vg Vs_on (Logic Bd) Vs, Vscan Ve, Vset Image data
VER1.0
Min 1.2Sec ~ 1.5 Sec Remark) After incoming Image Sync time with the 3.3V and image Sync must become the approval at one second inside to the logic Min 100mS ~ Max 250mS From Image Board
Plug-in Remote On
Remote Off
Plug-out
-3-
PHOTOS FOR INTERNAL AND EXTERIOR WIRING

1.REAR COVER WITH POWER SUPPLY UNIT.
VER1.0
2.REAR COVER WITH POWER SUPPLY AND SEPARATE BOARD
-1-
PHOTOS FOR INTERNAL AND EXTERIOR WIRING

3.IMAGE BOARD
VER1.0
-2-

Philips Bds4223v 27 Service Manual LCD

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CONFIDENTIAL Issue: 22.July.05 Version: 1.

42PDP SERVICE MANUAL MODELBDS4223V/27 PANELVVEPP42SD-YD05-

Collation: Andy Lai

3. FACTORY & ELECTRONIC ADJUSTMENT .3-15 4. BLOCK DIAGRAM 4-2 ..5-6

5. TROUBLE SHOOTING GUIDE 6. P.C. BOARD TOP VIEW

7. ELECTRONIC MODULE LIST ...7-1 8. EXPLODED VIEW 8-1

9. PACKAGING LIST 9-1

IMPORTANT SAFETY PRECAUTIONS

(READING SHOULD NOT BE ABOVE 3.5mA)

IMPORTANT SAFETY PRECAUTIONS

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

e. Stand-by & DPMS 2.3. Input Signal:

2.3.1 Connector Type:

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

2.3.8 Pin Assignments For 24 Pin DVI Connector (Digital Only):

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

2.4.1 Maximum Resolution:

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

2.5.1 Adjustable Items: AV1/AV2 Input

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

Analog RGB input

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

SPECIFICATION FOR BDS4223V/27 PLASMA DISPLAY

FACTORY & ELECTRONIC ADJUSTMENT 1. Color Temperature Adjustment

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT ISP Firmware Update User Manual

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

FACTORY & ELECTRONIC ADJUSTMENT

Description Read Data

Volume Power On Brightness Contrast Color Tint Sharpness

VOL PWR BRT CON CLR TNT SHP

FACTORY & ELECTRONIC ADJUSTMENT

V-Size V-Position H-Size H-Position Recall Save Mute Language

VSZ VPS HSZ HPS RCL SAV MUT LNG

BAS TRB BAL TS1 CSR TV1

FACTORY & ELECTRONIC ADJUSTMENT

POP Format POF

2 4 4 4 4 4 4 Must Must Must

MAIN BOARD BLOCK DIAGRAM

SV_YC(MP) COMPONENT(MP) RGB/HV(MP)

CVBS(SP) SV_YC(SP) COMPONENT(SP) RGB/HV(SP)

D6432AH SDRAM SPK_L O/P SPK_R O/P

I2C(1) RGB/HV(MP) RGB/HV(SP) Digital 24bit

TVSP2_HOUT VGA_HS_IN HS2_EX52

SO2 RS232 15Pin

SOUND BLOCK DIAGRAM

IC2 SDA5550M VOLUME CONTROL

A_VOL BUFFER IC304 NJM2904M A_VOL

PC SOUND SELECTOR IC301 HEF4052BT

INPUT SELECTOR IC302/305 HEF4066

BUFFER IC304 NJM2904M

VOLUME CONTROL IC303 uPC1406

OUTPUT SELECYOR IC302/305 HEF4066