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Integration of Ferroelectric Thin Films

into Silicon Based Microsystems


Von der Fakultt fr Elektrotechnik und Informationstechnik
der Rheinisch-Westflischen Technischen Hochschule Aachen
zur Erlangung des akademischen Grades eines Doktors der
Ingenieurwissenschaften genehmigte Dissertation
vorgelegt von
Diplom-Ingenieur
Carsten Kgeler
aus Rheda-Wiedenbrck
Berichter: Univ.-Prof. Dr.-Ing. Rainer Waser
Univ.-Prof. Dr. rer. nat. Wilfried Mokwa
Tag der mndlichen Prfung: 13.07.2006
Diese Dissertation ist auf den Internetseiten der Hochschulbibliothek online verfgbar.
III
Preface
This dissertation was written during my Ph.D.-studies at the Institut fr Werkstoffe der Elek-
trotechnik of the Rheinisch-Westflische Technische Hochschule Aachen, Germany (RWTH
Aachen).
I would like to express my gratitude to Prof. R. Waser for giving me the opportunity to do re-
search at the Institut fr Werkstoffe der Elektrotechnik in the exciting eld of ferroelectric based
MEMS and for providing an excellent working and learning environment. I highly appreciate
his advice and support.
I am also indebted to Prof. W. Mokwa who kindly agreed to be the co-examiner in the jury.
Many thanks also to: Dr. U. Bttger for his support and stimulating discussions; S. Tappe and
R. Plonka for the fruitful discussions, careful proof-reading and being great ofce mates; D.
Bruhaus, C. Dehoff and K. Herbertz for their dedicated work during the diploma thesis; Dr. T.
Schneller and R. Thelen for preparing the precursor solutions and the help regarding questions
of chemistry; D. Erdoglija for preparing Pt electrodes and for performing lithography so many
times; G. Wasse for taking SEM pictures.
Last but not least I would like to thank all colleagues and all the students at the Institut fr
Werkstoffe der Elektrotechnik and at the Forschungszentrum Jlich for their valuable support
and many great moments spent together.
IV
V
Contents
1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 State of the Art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.1 Piezoelectric Cantilever Structures on Silicon Substrates . . . . . . . 2
1.2.2 Piezoelectric Cantilever Structures on Metal Substrates . . . . . . . . 2
1.2.3 Integrated Piezoelectric Driven Micro-Relays . . . . . . . . . . . . . 2
1.2.4 Piezoelectric Driven Microwave Switches . . . . . . . . . . . . . . . 3
1.2.5 Thin Film Bulk Acoustic Resonators for High Frequency Applications 3
1.2.6 Dielectric Bolometers . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Ferroelectric Materials 7
2.1 Spontaneous Polarization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Piezoelectric Effect and Electrostriction . . . . . . . . . . . . . . . . . . . . 10
2.3 Lead Zirconate Titanate (PZT) . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Lanthanum doped Lead Hafnate Titanate (PLHT) . . . . . . . . . . . . . . . 13
2.5 Barium Strontium Titanate (BST) . . . . . . . . . . . . . . . . . . . . . . . 14
3 Thin Film Deposition 17
3.1 Chemical Solution Deposition . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2 Microstructural Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.2.1 Lead Zirconate Titanate (PZT) . . . . . . . . . . . . . . . . . . . . . 20
3.2.2 Lanthanum doped Lead Hafnate Titanate (PLHT) . . . . . . . . . . . 23
3.2.3 Barium Strontium Titanate (BST) . . . . . . . . . . . . . . . . . . . 27
4 Material Characterization with Respect to MEMS Devices 29
4.1 Electrical Characterization Methods . . . . . . . . . . . . . . . . . . . . . . 29
4.2 Electromechanical Characterization Methods . . . . . . . . . . . . . . . . . 30
4.3 Lead Zirconate Titanate (PZT) . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.3.1 Electromechanical Fatigue . . . . . . . . . . . . . . . . . . . . . . . 35
VI
4.4 Lanthanum doped Lead Hafnate Titanate (PLHT) . . . . . . . . . . . . . . . 38
4.5 Barium Strontium Titanate (BST) . . . . . . . . . . . . . . . . . . . . . . . 42
5 Technology 45
5.1 Photolithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
5.2 Silicon Bulk Micromachining . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.3 Surface Micromachining . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.3.1 Plasma Etching of Pt and BST . . . . . . . . . . . . . . . . . . . . . 52
5.3.2 Plasma Etching of PZT . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.3.3 Plasma Etching of SiO
2
and Si
3
N
4
. . . . . . . . . . . . . . . . . . . 54
5.3.4 Anisotropic Silicon Etching . . . . . . . . . . . . . . . . . . . . . . 55
5.3.5 Isotropic Silicon Etching . . . . . . . . . . . . . . . . . . . . . . . . 56
5.4 HF-Vapor Etching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.5 Stress Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
5.6 Electroplating of Freestanding Copper Contacts . . . . . . . . . . . . . . . . 66
6 Piezoelectric Cantilever Structures on Silicon Substrates 69
6.1 Cantilevers Fabricated by Silicon Bulk Micromachining . . . . . . . . . . . . 69
6.2 Cantilevers Fabricated by Silicon Surface Micromachining . . . . . . . . . . 76
6.3 Cantilevers Fabricated on Silicon On Insulator Substrates . . . . . . . . . . . 79
7 Devices 85
7.1 Integrated Piezoelectric Driven Micro-Relays . . . . . . . . . . . . . . . . . 85
7.2 Piezoelectric Driven Microwave Switches . . . . . . . . . . . . . . . . . . . 91
7.3 Thin Film Bulk Acoustic Wave Resonators . . . . . . . . . . . . . . . . . . . 97
7.4 Dielectric Bolometers for Infrared Detection . . . . . . . . . . . . . . . . . . 103
7.5 Piezoelectric Cantilevers on Metal Foil Substrates . . . . . . . . . . . . . . . 110
8 Conclusions 117
8.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
8.2 Outlook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
References 121
VII
Used Symbols and Abbreviations
Symbols
A Area
C Capacitance
C
f
Capacitance on membrane
C
ref
Capacitance on bulk
C
Curie
Curie-Weiss constant
d
ij
Tensor of the piezoelectric coefcients
D Dielectric displacement
D
i
Components of the dielectric displacement vector
e
ij
ij-th component of transversal piezoelectric charge coefcient
E Electric eld
E
C
Coercive eld
E
Si
Youngs modulus of silicon
f Frequency
f
bias
Large signal frequency
f
osc
Small signal frequency
h displacement
I Electric current
k
B
Boltzmanns constant k
B
= 1.3806610
23
JK
1
k
t
Electromechanical coupling constant
l Length
L Power density
P Polarization or Power
P
r
Remanent polarization
P
S
Saturation polarization
Q
ij
ij-th component of electrostriction tensor
r radius
r
0
initial radius
S Mechanical strain or microwave measurement parameter
s
ij
ij-th component of the elastic compliance tensor
t Time or thickness
T Temperature
T
int
Intrinsic stress
T
ext
Extrinsic stress
T
therm
Thermal stress
T
0
Curie-Weiss temperature
T
C
Transition temperature
T
k
k-th component of the mechanical stress tensor
v sound velocity
V Voltage
V
osc
Small signal voltage
V
C
Coercive voltage
z
i
Normalized acoustic impedance
VIII
Z
0
Acoustic impedance
Greek Symbols
phase delay

0
Permittivity of free space (8.85410
12
As/Vm)
,
r
,
rev
Permittivity, relative and reversible permittivity

total
Total permittivity

intrinsic
Intrinsic permittivity

extrinsic
Extrinsic permittivity

ij
Components of the permittivity tensor

Si
Poisson ratio of silicon
Mass density
Angular frequency
electric conductance
Abbreviations
AFM Atomic Force Microscopy
AlN Aluminum Nitride
BAW Bulk Acoustic Resonator
BS Beam Splitter
BST Barium Strontium Titanate
BTO Barium Titanate
BOX Buried oxide
CH
3
COOH Acetic acid
CHF
3
Triuoromethane
CF
4
Tetrauoromethane
CMOS Complementary Metal Oxide Semiconductor
CSD Chemical Solution Deposition
CuSO
4
5H
2
O Coppersulphatepentahydrate
CVD Chemical Vapor Deposition
ECR Electro cyclotron resonance plasma source
FeRAM Ferroelectric Random Access Memory
FEM Finite Element Method
HF Hydrouoric Acid
H
2
SO
4
Sulfuric acid
IR Infra red
KOH Potassium Hydroxide
LPCVD Low Pressure Chemical Vapor Deposition
L Lens
LNO Lanthanum Nickel Oxide
M Mirror
MBE Molecular Beam Epitaxy
MEMS Microelectromechanical Systems
IX
MOCVD Metal-Organic Chemical Vapor Deposition
MOD Metal-Organic Decompostion
MPB Morphotropic Phase Boundary
MW MEMS Microwave Microelectromechanical Systems
HNO
3
Nitric acid
PBS Polarizing Beam Splitter
PLD Pulsed Laser Deposition
PLHT Lanthanum doped Lead Hafnate Titanate
PLZT Lanthanum doped Lead Zirconate Titanate
PHT Lead Hafnate Titanate
PZT Lead Zirconate Titanate
PVD Physical Vapor Deposition
RF MEMS Radio Frequency Microelectromechanical Systems
RTA Rapid Thermal Annealing
SEM Scanning Electron Microscope
SF
6
Sulfur hexauoride
SiO
2
Silicon dioxide
Si
3
N
4
Silicon nitride
STO Strontium Titanate
TFBAR Thin Film Bulk Acoustic Resonator
TMAH Tetramethylammonium Hydroxide
UMTS Universal Mobile Telecommunication System
WLAN Wireless Local Area Network
XRD X-Ray Diffraction
X
1
1 Introduction
1.1 Motivation
T
he continued interest on integrated ferroelectric thin lms is based on their manifold
properties, which are applied in memory devices, automotive applications, RF and
microwave components as well as sensors and actuators. This class of materials promises cost
effective, future devices with a new functionality, a higher performance and a lower energy
consumption.
Ferroelectric capacitors are promising candidates for non-volatile Ferroelectric Random
Access Memories (FeRAMs), where the direction of the spontaneous polarization is used to
store informations digitally [15]. The high dielectric coefcients over a wide temperature and
frequency range are used in integrated or surface mounted device capacitors. Furthermore, the
electric eld tunable permittivity is applied for the realization of thin lm varactors in RF and
microwave components for wireless communication [6] and the high pyroelectric coefcients
are utilized in infrared sensing applications [7].
Microsystems and especially microelectromechanical systems (MEMS) have become
synonymous for many types of microfabricated devices, whereby the lateral dimensions are
in the range of 10 m - 10 mm and the devices are often limited to the functionality of
traditional materials like Si, SiO
2
, Si
3
N
4
, Pt, Al etc. [8]. The ultimate goal of microsystems
is a self-contained system of interrelated sensing and actuating devices together with signal
processing and control electronics on silicon substrates.
The superior piezoelectric properties of ferroelectric ceramics make them ideal materials for
the use in MEMS realizing new functions. In addition ferroelectric actuators do not dissipate
power in static mode and the excellent dielectric properties result in extremely low noise
during operation. In the past, a number of devices have been demonstrated on research level
e.g. micro motors [911], cantilever beam actuators [12], meanderline micropositioners [13],
micropumps [14], piezoelectric accelerometers [15], piezoelectric microphones for photo
acoustic gas detectors [16] or microwave acoustic resonators [1721].
Especially the market potential of MEMS for microwave applications is tremendous and
estimated to exceed US$ 1 billion in 2007 [22]. Piezoelectric based microwave switches and
microwave resonators are expected to gain a part of this market.
2 1 Introduction
1.2 State of the Art
This thesis deals with the integration of ferroelectric thin lms into microsystems and therefore
the following section gives an overview about the current status of a number of devices, which
are of interest for this work.
1.2.1 Piezoelectric Cantilever Structures on Silicon Substrates
Cantilevers are of primary interest for the integration of piezoelectric thin lms into MEMS,
since they promise large deections and low driving voltages. Hoffmann [23] reported the
fabrication of a piezoelectric cantilever with a maximum tip deection of 70 m at 12 V. A
very popular approach is the application of piezoelectric cantilevers in atomic force microscopy
(AFM) to enhance the resolution [24, 25].
1.2.2 Piezoelectric Cantilever Structures on Metal Substrates
The integration of functional materials into MEMS is concentrated on the world of CMOS using
silicon substrates. This is a limitation in the broad eld of MEMS applications, since mostly
the silicon determines the mechanical properties and the applied micromachining technologies
limit the structure size. To benet in the macro world from the functionality of those materi-
als, the covering of large, low cost substrates with functional thin lms and mass production
technologies are desired. Recently, several reports have described attempts of depositing ferro-
electric thin lms on metal foil substrates, including copper, aluminum, nickel alloys, titanium,
Hastelloy or stainless steel [2630]. Li et al. [31] deposited 22 m PZT lms on stainless steel
and suggested the use for ultrasonic devices. However, lms in this thickness range require
driving voltages of more than 100 V. To achieve a voltage reduction thinner lms are needed.
1.2.3 Integrated Piezoelectric Driven Micro-Relays
It turned out that the assumption that switches based on semiconductors can fully replace slow
electromechanical relays is not correct. The galvanic separation of excitation and signal circuit
exhibits advantages regarding electric losses and crosstalk. Using miniaturized micro-relays
will enhance the switching time and reduce the dimensions down to the range of semiconductor
switches and therefore combine the advantages of both technologies. The research focus is
1.2 State of the Art 3
still on integrated switches with electrostatic actuation for microwave applications (see next
paragraph). Up to date only few publications deal with piezoelectric actuated switches [32].
1.2.4 Piezoelectric Driven Microwave Switches
Integrated high frequency switches working in the microwave range are of huge interest in or-
der to replace currently used expensive and space consuming off-chip components. Microwave
switches based on electromagnetic and electrostatic actuation have been demonstrated. Since
electromagnetic MEMS consume much more power than electrostatic switches, the research
activities are focused in the latter area [33].
The demonstrated electrostatic switches suffer from a high activation voltage, low displace-
ments and device failure due to stiction. Typical operation voltages are around 50 V and contact
distances are in the range between 1.5 - 3.5 m [3438]. In a recent work the operation voltage
could be reduced to 15 V by exhibiting a deection of 14 m [39]. Reported contact forces are
around 11 N, if the electrostatic switch is driven with 58 V [40].
1.2.5 Thin Film Bulk Acoustic Resonators for High Frequency Applications
Bulk acoustic wave (BAW) resonators base on a planar capacitor structure of a piezoelectric ma-
terial clamped between two electrodes, which are acoustically isolated from the substrate [41].
By means of an alternating electric eld the structure is excited to the fundamental thickness
mode resonance. If piezoelectric thin lms are incorporated with this design the structure is
referred as thin lm bulk acoustic resonator (TFBAR).
Sound velocities of piezoelectric materials are in the range from 4000 to 11000 m/s, so typical
resonance frequencies of 2 - 5.5 GHz are achieved with 1 m thick lms. This is the range of
modern applications like the universal mobile telecommunications system (UMTS) or wireless
local area network (WLAN) and therefore of great industrial interest.
During recent years a couple of devices using lead zirconate titanate (PZT) for the genera-
tion of acoustic waves are demonstrated [4245], but for TFBAR applications PZT is not the
most encouraging candidate, since the use of platinum electrodes increases the high frequency
losses enormously [46]. Therefore, aluminum nitride (AlN) lms are mostly applied in TF-
BARs [4751].
4 1 Introduction
1.2.6 Dielectric Bolometers
Uncooled infrared detectors base on the thermal detection of incoming IR ux instead of the
quantum mechanism used in superconducting, high performance detectors. In recent years they
have attracted much attention since they are highly suitable for detecting a thermal point such
as a human body and eliminates the large and expensive cooling systems. There are different
types of infrared detectors: Resistive bolometers, dielectric bolometers and pyroelectric sensors.
Resistive bolometers are fabricated from amorphous silicon and detect the change of resistance,
if the silicon is heated [5254]. The advantage of full compatibility with CMOS processing is
overruled by the disadvantage that a voltage drop across the detector resistance leads to current
consumption which is not negligible. It causes a temperature increase in the bolometer and
requires a thermal stabilizer.
Pyroelectric bolometers base on the pyroelectric effect, whereby a polar dielectric generates
charge when it is heated. In such pyroelectric IR detectors, the infrared energy is absorbed in
a thin lm of the pyroelectric material and the temperature change gives rise to a pyroelectric
current, which is detected in an external circuit. Mostly PZT and calcium substituted lead
titanate thin lms are in use due to a high pyroelectric coefcient in the range of 1C/cm
2
K
[5559]. However, one drawback of pyroelectric bolometers is the requirement of a chopper
technique, because only temperature changes are detectable.
Dielectric bolometers simply uses the permittivity dependence of ferroelectric materials on the
temperature. They are not necessarily reliant on fast temperature changes and since a reference
capacitor belongs to the device, no additional cooling or thermal stabilization is required.
1.3 Objectives 5
1.3 Objectives
The nal goal of this thesis is the demonstration of microsystems using integrated, ferroelectric
thin lms as functional materials. Therefore this work addresses three major tasks:
(i) Deposition and Characterization of Ferroelectric Thin Films
Lead zirconate titanate (PZT) is a well known ferroelectric material [6062] and thin lms are
deposited on silicon and metal substrates. The characterization addresses the electrical and
electromechanical properties with regard to reliability aspects in piezoelectric MEMS.
The deposition and the characterization of lead hafnate titanate (PHT) and lanthanum doped
lead hafnate titanate (PLHT) thin lms follows the demand of hysteresis free material proper-
ties.
Barium strontium titanate (BST) thin lms are investigated with regard to infrared imaging
sensors [6365] and therefore especially the dependence of the dielectric permittivity on the
temperature is of interest.
(ii) Development of Micromachining Technologies
The integration process of the piezoelectric thin lms by maintaining CMOS compatibility
is one important issue [6669] and therefore technologies for the integration of ferroelectric
materials into silicon based microsystems are developed, including e.g. release processes using
silicon bulk or surface micromachining, plasma etching of ferroelectric thin lms and the
fabrication of free standing copper contacts.
(iii) Processing of Microsystems
The successful integration of ferroelectric thin lms is demonstrated by a number of
microsystems, which are designed, simulated, fabricated and characterized:
1. Piezoelectric Cantilever Structures on Silicon Substrates
As basic elements, piezoelectric cantilevers on silicon substrates are requested, which
exhibit a large deection at low operation voltages in order to close contacts in a distance
of 5 m or more. For fast operation, high resonance frequencies are desired and modeling
of the devices by nite element method (FEM) is required to conrm the measurement
results and for the calculation of the contact forces.
6 1 Introduction
2. Piezoelectric Cantilever Structures on Metal Substrates
To benet from the outstanding properties of ferroelectric thin lms in the macro world
the deposition of PZT thin lms on metal foils using chemical solution deposition (CSD)
is desired. Thereby, the covering of large areas by maintaining the piezoelectric properties
and the fabrication of cantilevers by applying low cost ne mechanical techniques is
requested to demonstrate the possibility of mass production.
3. Integrated Piezoelectric Driven Micro-Relays
Integrated piezoelectric micro-relays based on cantilever structures are one competitive
concept to electrostatic switches. For the device fabrication complex micromachining
technologies, which offers a high integration density need to be applied. The addition of
free standing metal contacts is one further task. The demands for the micro-relays are
the separation of the actuation and the signal circuit, low driving voltages, fast operation,
a completely integrated design, improved mechanical stability compared to single side
suspended cantilevers and fatigue free operation.
4. Piezoelectric Driven Microwave Switches
By the integration of piezoelectric micro-relays into a microwave circuit design one
achieves a microwave switch, which overcomes the drawbacks of conventional electro-
static switches. For good switching characteristics of more than 15 dB between "on"
and "off" state low loss microwave signal lines are required and the device needs to be
designed to work stable over a large frequency range, at least up to 20 GHz.
5. Thin Film Bulk Acoustic Resonators for High Frequency Applications
A new approach within this thesis is the exploitation of the electrostrictive behavior of
BST for the generation of acoustic waves within the thin lm, whereby the device should
work in the microwave range. By the use of a membrane technology a good acoustically
insulation can be achieved so that the TFBARs show a pronounced resonance at certain
frequencies. The device design needs to be supported by theoretical considerations.
6. Dielectric Bolometers
To demonstrate infrared sensors, taking advantage of the dielectric working principle the
integration of high quality BST thin lms into a bolometer is requested. The demands are
fast operation and a high sensibility.
7
2 Ferroelectric Materials
T
his chapter gives an overview over the relevant properties of ferroelectric materials. It
deals with crystallographic considerations and general aspects of spontaneous polarization
and piezoelectric properties. For more details the reader is referred to general textbooks or
review articles [7073].
Ferroeletricity describes the presence of a spontaneous electric moment in a crystal, which
can be switched in its orientation between two or more distinct crystallographic directions
by applying an external electric eld. The term was coined to indicate the close analogy to
ferromagnetism [74]. Together with the apparence of spontaneous polarization ferroelectric
materials also exhibit high dielectric coefcients and the piezoelectric effect.
2.1 Spontaneous Polarization
The ability of a crystal to exhibit spontaneous polarization is related to its symmetry. Among
the 32 different crystal classes, which are all electrostrictive, 11 groups belong to the cen-
trosymmetric classes and contain an inversion center. The remaining 21 groups belong to the
non-centrosymmetric classes and 20 of them exhibit the piezoelectric effect. Subjecting those
crystals to mechanical stress causes charge separation and therefore an electric eld. The piezo-
electric effect is reversible. Applying an electric eld to the crystal induces stress and deforma-
tion following Hooks Law. The piezoelectric properties of ferroelectrics are essential for this
work and therefore the piezoelectric effect is explained more detailed in section 2.2.
Ten of those piezoelectric classes are polar with an unique polar axis. Such crystals may display
spontaneous polarization parallel to the polar axis.
Figure 2.1 (a) shows a perovskite crystal lattice. A central B-ion is positively charged and
surrounded by six negatively charged O
2
-ions. The corners of the unit cell are occupied by
eight positively charged A-ions. The crystal is of cubic shape and therefore symmetric, ex-
hibiting no spontaneous polarization in this state. The material becomes ferroelectric, if the
crystal lattice loses the symmetry, e.g. by transforming from the cubic into the tetragonal phase
while cooling the material below the phase transition temperature T
C
(Figure 2.1 (b)). In this
non-centrosymmetric form the B-cation has two stable states. Hence, the material shows spon-
taneous polarization which can be switched by an external electric eld.
The analogy of ferroelectrics to ferromagnetics is not only due to the exhibition of spontaneous
8 2 Ferroelectric Materials
(a) (b)
A
+
B
+
O
-
FIGURE 2.1:
(a) Perovskite crystal in cubic phase. (b) Perovskite crystal in tetragonal phase.
polarization rather its reorientability by an external electric eld is essential. Figure 2.2 (a)
displays the polarization characteristic of a single domain crystal whereby the polarization is a
superposition of dielectric ionic and electronic polarization (non-ferroelectric) and spontaneous
polarization (ferroelectric). The spontaneous polarization is reoriented, if an electric eld E
opposite to the polarization, exceeds the coercive eld E
C
leading to a jump in the P E
curve. The non-ferroelectric part leads to the linear increasing polarization for E > +E
C
and
E < E
C
respectively.
Polydomain crystals possess a statistical distribution of domains. If an electric eld is applied,
the domains start to orientate in one direction (Figure 2.2 (b), line AB). The saturation pola-
P
E
-E +E
c c
s
s
+P
-P
P
E
A
B
C
-E +E
c
s
c
P
(a) (b)
P
r
FIGURE 2.2:
(a) Typical hysteresis loop of a single crystal ferroelectric material. (b) P E characteristic
for a multidomain ferroelectric material [70].
2.1 Spontaneous Polarization 9
rization P
S
is dened by extrapolating the line BC to E=0. If the electric eld is reduced to
zero, parts of the domains switch back in opposite direction due to energy constraints, but the
major part remains in the direction and results in a remanent polarization P
r
. By increasing the
electric eld into the opposite direction the domains switch continously until an equal distribu-
tion is obtained and the polarization is reduced to zero at the coercive eld E
C
and by further
increasing of the electric eld the negative saturation is reached. A complete cycle results in the
typical hysteresis loop. Actually, the y-Axis shows the dielectric displacement D:
D =
0
E + P (2.1)
where
0
denotes the permittivity of free space. For ferroelectric materials the vacuumtermonly
contributes a small amount to the dielectric displacement and can be neglected, thus: D P.
Hysteresis curves reect the large signal behavior of ferroelectrics where an electric eld is
applied to the material and the current or electric charge respectively is monitored. If sufciently
small electric elds are applied to dielectrics they follow a linear relation D = E. This
dielectric small signal response is caused by reversible contributions of the electronic and ionic
polarization (intrinsic) [75, 76]. In polycrystalline ferroelectrics this effect is superimposed by
extrinsic mechanisms like movement of domain walls and the alignment of defects.

total
=
intrinsic
+
extrinsic
(2.2)
It has been shown that especially the electromechanical active non-180 domain walls, i. e. 90
domain walls in tetragonal structures, 71 and 109 domain walls in rhombohedral structures
are responsible for a considerable contribution to the dielectric coefcient as well as to the
piezoelectric and the elastic coefcients.
E
permittivity
FIGURE 2.3:
Typical small signal measurement
of a polydomain ferroelectric mate-
rial.
10 2 Ferroelectric Materials
Figure 2.3 shows a typical small signal measurement of a polydomain ferroelectric material.
Thereby, a large signal (bias voltage) is supperimposed by the small signal. The curve shows
two maxima around E
C
and reduced permittivity at high electric elds.
2.2 Piezoelectric Effect and Electrostriction
All ferroelectric and therefore polar materials belong to the subgroup of piezoelectric crystals
which can be polarized by applying mechanical stress. This is called the direct piezoelectric
effect and can be expressed by
D
i
= d
ik
T
k
+
X
ij
E
j
(2.3)
where T
k
represents the stress and d
ik
the piezoelectric coefcient [77]. Due to symmetric
constrains 6 of the 9 components of the stress and strain tensors are independent from each
other and it is customary to use a reduced notation [74]. The equation includes two parts. The
rst one combines mechanical forces to electrical output and the second one represents the
dielectric behavior due to an applied electric eld. Since rarely an electric eld is applied, if
using the direct piezoelectric effect, equation 2.3 reduces to
D
i
= d
ik
T
k
. (2.4)
Furthermore, the piezoelectric effect is a reversible effect. Applying an electric eld to the
material results in an elastic deformation and is called the converse piezoelectric effect, which
can be expressed by
S
k
= s
E
kl
T
l
+ d
ik
E
i
(2.5)
where s
E
kl
is the tensor of the elastic compliance and S
k
is the induced strain. Similar to the
reduction of the equation for the direct piezoelectric effect the mechanical part in equation 2.5
can be neglected and the equation reduces to
S
k
= d
ik
E
i
. (2.6)
The typical piezoelectric behavior of ferroelectrics is presented in Figure 2.4. One has to distin-
guish between large and small signal measurements. Figure 2.4 (a) shows the mechanical strain,
if an electric eld is applied to a polydomain, ferroelectric material. An applied electric eld
causes the orientation of the domains in eld direction, thereby those extrinsic contributions
are superimposed by intrinsic contributions due to the shift of oppositely charged sublattices
in the crystal. At some point all domains are oriented in the direction of the electric eld and
2.2 Piezoelectric Effect and Electrostriction 11
(a)
E
S
(b)
d
33
E
-E
C
+E
C
FIGURE 2.4:
Typical piezoelectric behavior of a ploydomain ferroelectric thin lm: (a) Strain (S) vs.
electric eld (E) and (b) piezoelectric coefcient (d
33
) vs. electric eld (E).
therefore only the intrinsic part contributes to the strain and the slope of the curve is reduced
for E > E
C
. The elongation of the piezoelectric material reduces to zero, if the electric eld is
removed. Switching of the direction of the applied eld leads to contraction until all domains
are uniformly distributed before the domains start to switch in opposite direction causing an
increasing strain. This so called buttery measurements (due to the shape of the measurement
curve) refer to the large signal measurements.
The small signal behavior is investigated by applying certain bias electric elds superimposed
by a small electric eld. The small electric eld activates the intrinsic contributions and there-
fore the linear response is measured. Figure 2.4 (b) presents the typical piezoelectric small
signal behavior of ferroelectrics indicating the piezoelectric coefcient d
33
if the electric eld
and the generated strain are in parallel direction. In the high electric eld regime (E >> E
C
)
the piezoelectric coefcient shows a negative slope because all domains are aligned parallel to
the electric eld and only the intrinsic effects contribute to the piezoelectric coefcient. This
effect is more and more reduced if the bias eld increases and therefore the crystal is strained.
Around the coercive eld also domain switching contributes to the piezoelectric coefcient,
hence the d
33
decreases to zero if the domains are uniformly distributed at E
C
.
Electrostriction is a second electromechanical effect and occurs in all dielectric materials as a
result of the reorientation of the molecules, if an electric eld is applied. Thereby, the reversal of
the electric eld does not reverse the direction of the deformation. Consequently electrostriction
is a quadratic effect
S
k
= Q
ij
P
2
j
(2.7)
where Q
ij
is the coefcient of electrostriction. Usually electrostriction is a small effect and in
12 2 Ferroelectric Materials
E
S
FIGURE 2.5:
Typical electrostrictive behavior of a
dielectric material.
piezoelectric materials covered by the piezoelectric effect. Figure 2.5 shows the typical strain
curve dependend on the applied electric eld for purly electrostrictive materials.
2.3 Lead Zirconate Titanate (PZT)
PbZr
x
Ti
(1x)
O
3
crystallizes in the perovskite structure shown in Figure 2.1. Thereby, the
Pb-ions occupy the A site of the primitive cell and the Ti- or Zr-ions occupy the B site. The
oxygen is placed in the center of the faces of the cell (see Table 2.1).
From the phase diagram in Figure 2.6 it can be seen that the crystal structure does not depend
only on temperature, but also on the ratio between Ti and Zr. For high Ti contents PZT crys-
tallizes in a tetragonal structure, while Zr-rich compositions have a rhombohedral shape. In
the high temperature regime the cell is always cubic. The transition from cubic to tetragonal
or rhombohedral structure appears at the phase transition temperature T
C
and depends on the
Zr/Ti ratio. Below T
C
, the morphotropic phase boundary (MBP) is observed, at a Zr content
of around x = 0.53. The shape of the lattice cell changes spontaneous from rhombohedral to
tetragonal and the other way around or in other words the tetragonal and the rhombohedral
phase coexists. Tetragonal PZT has six equivalent directions of the polar axis and in polydo-
main crystals it has 90 and 180 domain walls. In rhombohedral PZT the polarization distorts
along the body diagonal of the cubic prototype phase and has therefore eight possible domain
TABLE 2.1: Occupation of the perovskite unit cell of lead zirconate titanate (PZT).
A-ion B-ion O-ion
Pb
2+
Ti
4+
or Zr
4+
O
2
2.4 Lanthanum doped Lead Hafnate Titanate (PLHT) 13
500
400
Cubic
c
T
300
200
100
Tetragonal
Rhombohedral
(high-temperture
form)
Rhombohedral
(low-teperature
form)
Morphotrop c
phaseboundary
i
Orthorhombic
T
e
m
p
e
r
a
t
u
r
e
/

C
1 0.8 0.6 0.4 0.2 0
x 3
PbTi O
3
PbZrO
FIGURE 2.6:
Phase diagram of PZT as a function
of Zr content [71].
states. Furthermore, not only 90 and 180 domain walls exists, but also 71 and 109 domain
walls have been observed. Since both phases coexist an external electric eld can also switch
between the tetragonal and the rhombohedral domain states resulting in 14 possible directions.
Thus, the spontaneous polarization can be aligned more accurately in the eld direction and
therefore PZT at the MPB exhibits high dielectric permittivity, high remanent polarization and
high piezoelectric coefcients [7880].
2.4 Lanthanum doped Lead Hafnate Titanate (PLHT)
An alternative material to PZT also suggested for electromechanical actuation is lead hafnate
titanate PbHf
x
Ti
(1x)
O
3
(PHT) [83, 84], which is composed by the substitution of the Zr
4+
cations with Hf
4+
cations on the B-site due to a similar ion radius. Although the material
exhibits strong ferroelectric properties it is less studied than PZT. Heremans et al. [85] reported
on the piezoelectric properties and the phase diagram for various PHT ceramics and Schorn
et al. [86] reported on polarization and fatigue properties compared to PZT.
By doping PHT with lanthanum the La
3+
ions occupy the A-sites, since their ion radius (1.15

A) is similar to those of the Pb


2+
(1.2

A) (Table 2.2) [87].
TABLE 2.2: Occupation of the perovskite unit cell of lanthanum doped lead hafnate titanate
(PLHT).
A-ion B-ion O-ion
Pb
2+
or La
3+
Ti
4+
or Hf
4+
O
2
14 2 Ferroelectric Materials
TABLE 2.3: Occupation of the perovskite unit cell of barium strontium titanate (BST).
A-ion B-ion O-ion
Ba
2+
or Sr
2+
Ti
4+
O
2
2.5 Barium Strontium Titanate (BST)
BST is a combination of two perovskite materials barium titanate (BTO) and strontium titanate
(STO). The A-site of the ABO
3
lattice is shared by Ba
2+
and Sr
2+
ions, whereas the B-site is
occupied by the Ti
4+
-ions (Table 2.3). Since BST crystallizes in the ABO
3
lattice, it is also a
ferroelectric material, but unlike PZT the phase transition temperature can be much lower and
depends strongly on the ratio between the BTO and STO. Figure 2.7 shows the lattice constant
of pure BTO dependent on the temperature. The transition from the cubic (paraelectric) state
to the tetragonal (ferroelectric) phase occurs at 396 K. On the other hand, pure STO has a
cubic shape at room temperature, because the phase transition from cubic to tetragonal occurs
at 105 K [88, 89].
When cooling down from temperatures well above the critical temperature T
C
, the center ion
of the cubic unit cell is increasingly mobile to a shift along an applied electric eld, i. e. the
polarization increases. The dielectric permittivity
r
increases with decreasing temperature
according to:

r
=
C
Curie
T T
0
(2.8)
Temperature [K]
BaTiO
3
-phase: rhombohedral orthorhombic tetragonal cubic
L
a
t
t
i
c
e

c
o
n
s
t
a
n
t

[

]
FIGURE 2.7:
Lattice constant of BaTiO
3
as a function of the temperature [90].
2.5 Barium Strontium Titanate (BST) 15
FIGURE 2.8:
Susceptibility of
Ba
1x
Sr
x
TiO
3
ceramic as
function of composition and
temperature [91].
known as the Curie-Weiss-Law. C
Curie
is the Curie-Weiss constant and T
0
is the Curie-Weiss
temperature, which is slightly lower than the critical or phase transition temperature T
C
.
In the mixed material system Ba
1x
Sr
x
TiO
3
the Curie-Weiss constant as well as the Curie-
Weiss temperature are dependend on the mixing ratio between BTO and STO. Figure 2.8 shows
the susceptibility of BST for different compositions dependend on the temperature. At room
temperature the maximum susceptibility is observed for x=0.3, which makes this composition
specically interesting for the use as high permittivity material.
16 2 Ferroelectric Materials
17
3 Thin Film Deposition
T
he deposition of thin lm functional layers on different substrates is an important step in
micro- and nanoelectronics. The next chapter gives an general overview over different
deposition methods with focus on the deposition from the liquid phase for ferroelectric thin
lms and presents the microstructural analysis of the deposited thin lms.
To fulll the demands of a broad spectrum of applications currently a couple of different
deposition methods are under investigation. These are dominated by the deposition from the
vapor phase, but there are also techniques starting with a liquid phase. Special attention is
paid to the covering of three dimensional structures like surface steps or holes in the substrate.
Furthermore, the scalability to full wafer size is very important for the implementation of
ferroelectric thin lms into the eld of integrated circuits. Figure 3.1 summarizes the most
important deposition techniques.
With Physical Vapor Deposition (PVD) a target of the desired material composition is placed
into a vacuum chamber and becomes pulverized so that a gas is formed, containing molecules,
Physical Vapor Deposition
Chemical
Vapor
Deposition
Chemical
Solution
Deposition
Evaporation /
MBE
Sputtering PLD
CVD /
MOCVD
CSD
Mechanism
of production
of depositing
species
Thermal
energy
Momentum
transfer
Thermal
energy
Chemical
reaction
Chemical
reaction
Deposition
rate
High, up to
7500 nm/min
Low Moderate
Moderate, up
to 250
nm/min


Deposition
species
Atoms and
ions
Atoms and
ions
Atoms, ions
and clusters
Precursor
molecules
dissociate
into atoms
Precursor
molecules
dissociate
into atoms
Covering of
complex
shaped
objects
Poor
Nonuniform
thickness
Poor Good Moderate
Scalable to
wafer size
Up to large Up to large Limited Up to large Up to large

Low
FIGURE 3.1:
Some characteristics of deposition methods for ferroelectric thin lms (modied after [92])
18 3 Thin Film Deposition
ions and free electrons. The particles than diffuses to the substrate, where they are deposited.
Thereby the microstructure and the crystallinity of the lm is controlled from amorphous to
epitaxial or from coarse- to ne grained lms depending on numerous process conditions like
pressure, reactor atmosphere, substrate temperature etc. Evaporation is achieved by transferring
excessive heat to the target by conventional heating, by a focused electron beam or by a high
energy laser (pulsed laser deposition; PLD). Sputtering by highly energized ions (mostly argon
or oxygen) is another way to atomize the target surface. Sputtering and PLD are commonly
used methods for successful deposition of various perovskites like BST [93, 94], STO [95, 96]
or PZT [9799].
The methods mentioned before need a target of the desired material composition, whereas
molecular beam epitaxy (MBE) uses multiple targets. Each of them contains one pure element.
By evaporating two or more materials at the same time and controlling with individual shutters,
the deposition is very exible in composition and sequence of materials.
However, PVD techniques are limited in the structure size that can be successfully deposited
and due to the direct line between the target and the substrate, a conformal coverage of three
dimensional structured substrate surfaces can not be achieved. For smaller structure sizes
(i.e. high density applications) is the chemical vapor deposition (CVD) preferable. For the
deposition of materials with metallic elements such as PZT and BST a number of special
precursors in the form of organometallic compounds are developed and a special method the
so called metal-organic chemical vapor deposition (MOCVD) has therefore evolved. The
precursors are in separated bubblers at elevated temperatures ( 100C) and pressure of a few
mbar. These conditions allow a vapor-phase mixing and the transport to the heated substrate
in the reaction chamber by a carrier gas where the precursor dissolves and the atoms form a
crystalline thin lm.
3.1 Chemical Solution Deposition
The methods described above come along with enormous technical efforts and mostly very poor
exibility in material composition. A low cost method, overcoming those disadvantages is the
chemical solution deposition (CSD). Here, the substrate is coated by a liquid precursor using
spin-coating or dip-coating. The commonly used CSD methods are sol/gel and metal organic
decomposition (MOD) with a wide spectrum of hybrid methods in between.
CSD based deposition methods are basically executed in the following manner:
3.2 Microstructural Analysis 19
1. Preparation of precursor solutions
2. Coating of the substrate
3. Heat treatment to pyrolyze the wet lm
4. Final crystallization annealing
The preparation of the precursor solution is a chemical process whereby the raw material
such like lead-acetate, zirconium-n-propoxide or titanium-i-propoxide are mixed, dissolved by
addition of a solvent and then temperature treated in an appropriate way. The lm is formed
by dropping a certain amount of precursor solution on the substrate, which is then rotated to
distribute the liquid homogeneous over the wafer using a conventional spin coater. Thereby
the lm thickness depends on the viscosity of the precursor and the rotation speed. In the
third step the wet lm is dried and pyrolyzed by heating at moderate temperatures, e.g. by
placing the substrate on a hot plate. To deposit thick lms without changing the viscosity of the
precursor solution the spinning and pyrolysis step are repeated several times. Finally, the lm
is crystallized at elevated temperatures (typically between 600 C and 800 C). Sol gel thin
lms have been successfully demonstrated with PZT and other perovskite materials [100102].
One of the main advantages of chemical solution deposition is the very exible choice
of material compositions since the preparation of the precursor solution is fast and each desired
material composition is possible by mixing the starting components with the desired ratio.
Furthermore, no special and cost expensive technical effort is necessary. Standard CMOS
equipment like spin coaters and diffusion furnaces are sufcient to cover large amounts of
wafers.
3.2 Microstructural Analysis
To investigate the crystallographic texture and the phase purity of the deposited lms, X-ray
diffraction (XRD) using the diffractometer XPERT (Phillips) with a CuK

cathode in Bragg-
Brentano geometry ( 2) has been accomplished [103]. In this conguration the counter
records lattice planes parallel to the lm surface. Comparing the results with those of powder
diffractometer databases
1
gives insight into the degree of preferential orientation of the lm.
However, the lattice constants of ceramics differ slightly from those of thin lms, hence the
1
e.g. database of International Center of Diffraction Data (ICDD)
20 3 Thin Film Deposition
XRD peaks appear not exactly at the same angle [104, 105].
The lm thickness and morphology are characterized by Scanning Electron Microscopy (SEM).
All pictures are made with a Gemini 982 (Zeiss) with eld emission cathode.
For the investigation of the allocation of the included materials in a thin lm a quadrupole mass
spectrometer (Hiden EQP 500) together with a reactive ion beam etching system (RIBE, Oxford
Ionfab 300 plus) is used. The thin lm is etched physically with an inert argon beam and at the
same time the mass spectrometer analyzes the released particles of the lm. Hence, in case of
PZT one can distinguish between titanium rich and zirconium rich phases in the lm.
3.2.1 Lead Zirconate Titanate (PZT)
It is known that the properties of thin lms diverge from those of bulk PZT. Therefore an in-
tensive investigation of the piezoelectric thin lm properties depending on composition, lm
thickness etc. has been conducted in recent years. It is reported that PZT thin lms close to the
MPB with a ratio of 45 % zirconium and 55 % titanium and (111) orientation show the highest
piezoelectric coefcient d
33
compared to other Zr/Ti ratios [23, 106, 107]. Therefore, further
investigations are mainly dealing with this composition.
PZT thin lms with various compositions and different thicknesses are prepared by chemical
solution deposition on platinum coated silicon substrates. The lms are prepared on a (100)
oriented silicon wafer (1 inch x 1 inch), which is wet oxidized to 450 nm thickness. On
top is a 100 nm thin platinum electrode ((111) orientation) with a 10-20 nm thin titanium
dioxide adhesion layer. The starting compounds Lead(II)-Acetate, Ti(IV)-isopropoxide and
Zr(IV)-propoxide are mixed with regard to the desired Zr/Ti-ratio dissolved in ethylenglycol-
monobutylether (EGMBE) and then treated in an appropriate way to get a solution, which is
spined onto the substrate. The exact route is shown in the ow chart (Figure 3.2). A pyrolysis
step is performed after each coating whereas the lm is crystallized after three coatings. In
a last step 100 nm thick platinum electrodes are sputtered on top. Figure 3.3 (a) displays the
cross view of a PZT(45/55) layer, where the wafer is covered six times with the stock-solution
and two times crystallized at 700 C. The lm grows in columnar grains with an average grain
size of around 150 nm on the platinum electrode. The thickness is 223 nm. If the sample
is coated twelve times the resulting lm is still dense and of columnar structure with around
twice the thickness (Figure 3.3 (b)). After up to 30 coatings the lm is still columnar and
a thickness of 1325 nm is reached, but there are some pores included at the grain bound-
aries (Figure 3.3 (c)). Nevertheless, if the dilution of the stock-solution is reduced one can
3.2 Microstructural Analysis 21
Lead(II)-Acetate
Zirconium(IV)-n-propoxide
Titanium(IV)-i-propoxide
Reflux for 2,5h at 130C
in Ar-Atmosphere
Dissolving in EGMBE
Vacuum-Distillation
[Removing of by-products)]
Hydrolysis I (EGMBE + HNO
3
)
Hydrolysis II (EGMBE + H
2
O)
Dissolving the Gel in EGMBE
Stock-Solution (c = 1M)
Addition of EGMBE
[to adjust the final concentration]
Dilution of the Stock-Solution &
Filtration with 0,2m PTFE-Filter
Spin-coating at 3000 rpm
onto (Si/SiO
2
/TiO
2
/Pt)-Substrate
Drying and Pyrolysis on
200C & 400 C Hotplates
for 2 min
Crystallization in O
2
at 700C for 5 min
Multiple coating
Pb(Zr
x
,Ti
1-x
)O
3
FIGURE 3.2:
Flow chart for the deposi-
tion of PZT thin lms.
reach lms with more than 2 m. The PZT lm in Figure 3.3 (d) is produced with three parts
stock-solution and one part EGMBE resulting in the same grain size and a thickness of 2400 nm.
The crystal structure of the lms is characterized by XRD. Some exemplary results for
PZT(45/55) lms with different thicknesses are given in Figure 3.4. The measurements are
slightly shifted vertically to give a clearer view. The dominant peak a 40 indicates the Pt
electrode and shows (111) orientation. For this reason the PZT grows also in (111) orientation
which is indicated by the peak nearby. A smaller signal is detected at around 22 signifying
an contingent of (100) oriented cells in the PZT. Other peaks belong to the silicon substrate.
Note, with increasing lm thickness the height of the peaks also increases, especially visible in
the PZT (111) signal, because a thicker lm gives a better signal. However, the ratio between
(111) and (100) orientation stays identical. Therefore the measurements show that PZT lms
deposited with the CSD method maintain the orientation at least for lms up to 700 nm and are
mainly (111) oriented.
22 3 Thin Film Deposition
(a)
PZT
Pt
TiO
2
SiO
2
(b)
(c) (d)
FIGURE 3.3:
SEM pictures of different PZT(45/55) thin lms with various thicknesses from (a) 223 nm,
(b) 481 nm, (c) 1325 nm, (d) 2400 nm. (a) to (c) are deposited with a mix ratio of 1:1
(stock solution : EGMBE), whereas (d) is deposited with three parts stock-solution : one
part EGMBE.
SEM and XRD experiments give an insight of the texture and reveal a steady growth of the lm.
No interruptions are visible for subsequent coatings or annealing steps. Apparently, each PZT
layer nucleates nearly "epitaxially" in each grain on the previous layer. However, characteriza-
tion using a mass spectrometer during dry etching reveals a compositional gradient. Figure 3.5
shows the counts of the mass spectrometer during the dry etching from top to bottom electrode
of a 600 nm lm with 15 coatings PZT(45/55) and annealing always after three coatings. The
Zr content decreases continuously from the surface and increases rapidly after three coatings,
3.2 Microstructural Analysis 23
20 25 30 35 40 45 50
PZT
(101)
Pt
(111)K

708 nm
604 nm
481 nm
363 nm
255 nm
121 nm
PZT
(200)
Pt
(111)
PZT
(111)
Si
(200)
PZT
(100)
I
n
t
e
n
s
i
t
y

[
a
.
u
.
]
2 [deg. ]
PZT 45/55
FIGURE 3.4:
XRD measurement of PZT
45/55 thin lm with differ-
ent thicknesses
which is the point where the crystallization takes place (e.g. 4. RTA). On the contrary, the
Ti content exhibit an increasing concentration the surface to deeper layers and exhibits sharp
drops at the points, where the lm is treated in the RTA for crystallization. This behavior repeats
for each annealing step. The composition gradient reects the fact that for Ti rich compounds
the activation energy for nucleation is smaller and the free energy of formation is more neg-
ative [108, 109]. Considering the whole lm, an overall decrease of the Ti content is found.
Hence, the composition of PZT lms vary within the layer.
3.2.2 Lanthanum doped Lead Hafnate Titanate (PLHT)
The precursor preparation for PLHT is based on the preparation of the PZT precursor. The
raw material zirconium(IV)-n-propoxide is replaced by hafnium(IV)-n-butoxide, but an addi-
5
.

R
T
A
4
.

R
T
A
3
.

R
T
A
2
.

R
T
A
C
o
u
n
t
s

[
a
.
u
.
]
Ti
Zr
growth direction
s
u
r
f
a
c
e
1
.

R
T
A
b
o
t
t
o
m

e
l
e
c
t
r
o
d
e
FIGURE 3.5:
Zr/Ti distribution within a
600 nm thin PZT(45/55) lm.
15 coatings are deposited and
crystallized with ve annealing
steps.
24 3 Thin Film Deposition
tional stabilization with acetylacetone is needed. To dope the pure PHT an adequate amount
of lanthanum(III)-acetylacetonate is added in the beginning (Figure 3.6). Thin lms with
PLHT(x/30/70) and PLHT(x/45/55) basic composition and a doping amount of La x = 2.5 %,
5 %, 7.5 % and 10 % are deposited and characterized by SEM and XRD.
Figure 3.7 displays PLHT(x/45/55) thin lms with various La amount. All lms consist of six
coatings with two crystallization steps resulting in a lm thickness of 250 nm. The picture in
Figure 3.7 (a) on the left side shows the cross section of a pure PHT(45/55) lm. Like PZT
the lm is dense and of columnar grain growth. A look to the right side of the picture denotes
the top view and reveals that the grains are of irregular shape with a grain size from 200 nm to
500 nm. Figure 3.7 (b) and (c) show PLHT(2.5/45/55) and PLHT(7.5/45/55) lms, respectively,
which are also dense and exhibit irregular columnar grains, but of smaller grain size. (in the
range between 30 nm and 300 nm). Films with 10 % La show slightly different growth prop-
erties (Figure 3.7 (d)). From the cross view it looks like the grains are not of columnar growth
Lead(II)-Acetate
Hafnium (IV)-n-butoxide
Titanium(IV)-i-propoxide
(Lanthanum(III)-acetylacetonate)
Reflux for 3h at 130C
in Ar-Atmosphere
Vacuum-Distillation
[Removing of by-products)]
Stabilization with
Acetylacetone
Dissolving the Gel in 1-BuOH
Stock-Solution (c = 1M)
Addition of 1-BuOH
[to adjust the final concentration]
Crystallization in O
2
at 700C for 5 min
Dilution of the Stock-Solution &
Filtration with 0,2m PTFE-Filter
Spin-coating at 3000 rpm
onto (Si/SiO
2
/TiO
2
/Pt)-Substrate
Pyrolysis on 350 C Hotplate
for 2 min
Multiple coating
Pb(Hf
x
,Ti
1-x
)O
3
((Pb,La)(Hf
x
,Ti
1-x
)O
3
)
FIGURE 3.6:
Flow chart for the deposi-
tion of La doped PHT thin
lms.
3.2 Microstructural Analysis 25
(a) (b)
(c) (d)
FIGURE 3.7:
SEM Pictures of PLHT(x/45/55) lms with various La doping concentrations (a) pure PHT
(b) 2.5 % La (c) 7.5 % La (d) 10 % La (left side: cross view; right side: top view).
anymore, instead the lm exhibit polycrystalline character. From the top view it can be seen
that the grains are even more irregular, but the lm is still dense.
XRD measurements of a pure PHT (45/55) lm on platinum reveal a (111) and also a strong
(101) orientation, but with increasing La concentration the (101) peak decreases and the (100)
peak as well as the (111) orientation increases (Figure 3.8 (a)). Thereby the ratio between (111)
and (100) increases steady so that the (111) orientation becomes dominant with increasing La
doping. This trend is intercepted for PLHT(10/45/55) lms. Here, the (100) orientation in-
creases dramatically and the (111) peak decreases to the same level so that both orientations
are coexistent in this lm. For comparison also PLHT(30/70) lms are characterized (Fig-
ure 3.8 (b)). They show a similar behaviour and are mainly (111) oriented apart from the lm
26 3 Thin Film Deposition
(a)
20 25 30 35 40 45 50
PHT
(101)
Si
(200)
Pt
(111)K

Pt
(111)
PHT
(111)
PHT
(200)
PHT
(100)
0 % La
2.5 % La
5 % La
7.5 % La
10 % La
PLHT(x/45/55)
I
n
t
e
n
s
i
t
y

[
a
.
u
.
]
- 2 [deg.]
(b)
20 25 30 35 40 45 50
PHT
(200)
Pt
(111)
PHT
(111)
Si
(200)
PHT
(101)
PHT
(100)
Pt
(111)K

0 % La
2.5 % La
5 % La
PLHT(x/30/70)
I
n
t
e
n
s
i
t
y

[
a
.
u
]
- 2 [deg.]
FIGURE 3.8:
XRD measurements of (a) PLHT(45/55) and (b) PLHT(30/70) with various La doping.
with 10 % La, where also the amount of (100) and (111) oriented cells is approximately the
same.
3.2 Microstructural Analysis 27
3.2.3 Barium Strontium Titanate (BST)
The preparation of the BST precursor solution starts with a reux step of Ba- and Sr-carbonate
followed by the addition of stabilized titanium(IV)-butoxide (Figure 3.9). Spin-coating and
crystallization for 10 minutes at 700 C in an oxygen atmosphere results in a thickness of
9 nm per coating. A minimum of three coatings is necessary to deposit dense lms [110].
By repeating this procedure for 14 times a lm thickness of 120 nm is reached. Figure 3.10
shows two pictures of BST(30/70) and BST(55/45) on platinum electrodes. Both exhibit dense,
columnar grains with an average grain size of 50 nm.
The XRD measurement reveals a dominant (111) orientation for the BST(70/30) lm and only
a small amount of (100) cells (Figure 3.11), whereas the BST(55/45) lm exhibits almost no
(111) orientation. The lm is preferential (100) and (110) oriented.
Addition of 1-BuOH
[to adjust the final concentration]
Stock-Solution (c = 0,1 M)
Spin-coating at 4000 rpm
onto (Si/SiO
2
/TiO
2
/Pt)-Substrate
Crystallization in O
2
at 700C for 10 min
(Ba
x
,Sr
1-x
)TiO
3
Multiple Coating
Ba-Carbonate
Sr-Carbonate
Reflux for 10h
at 140 C
Titanium(IV)-
butoxide
Stabilizing with Acetylacetone &
1-BuOH
Addition of Propionic acid &
Propionic anhydride
FIGURE 3.9:
Flow chart for
the deposition of
BST thin lms.
28 3 Thin Film Deposition
(a) (b)
FIGURE 3.10:
SEM pictures of 120 nm thin BST lms: (a) BST(70/30) (b) BST(55/45).
20 25 30 35 40 45 50
BST(70/30)
BST(55/45)
I
n
t
e
n
s
i
t
y

[
a
.
u
.
]
- 2
BST
(110)
BST
(100)
BST
(200)
Pt
(111)
BST
(111)
Pt
(111)Kb
FIGURE 3.11:
XRD measurement
of BST(70/30) and
BST(55/45).
29
4 Material Characterization with Respect to MEMS Devices
T
his chapter presents the electrical and electromechanical characterization of ferroelectric
thin lms prepared on silicon substrates. (Thin lms deposited on metal foils are charac-
terized in chapter 7.5.) A detailed overview is given over the measurement methods, followed
by the characterization of the materials regarding their application in piezoelectric MEMS or
dielectric working devices.
4.1 Electrical Characterization Methods
The samples are contacted in a probe station (Cascade Summit 9600), which is equipped with a
temperature control from -50 C to 200 C and BNC cables providing access to the used mea-
surement equipment e.g. LCR bridge (HP 4194A). The polarization properties of the lms are
characterized with the aixACCT TF analyzer 2000 operating in virtual ground mode [111].
For the integration of ferroelectric materials one major concern is the reliability. Fatigue, which
means a loss of switchable polarization with increasing numbers of switching cycles, is still
a drawback for the successful incorporation of ferroelectric thin lms (especially in FeRAM
technology). Since the polarization is directly related to the piezoelectric properties, also the
integration into piezoelectric devices suffers from these failure mechanism and is therefore of
special interest. To characterize the sample, it is exposed to a signal sequence of bipolar pulses
whereat complete switching is essential [112]. This fatigue treatment is interrupted at regular
points for hysteresis measurements.
Large signal (polarization) measurements and small signal (capacitance) measurements are per-
formed, whereby in the latter case the material behaves like a linear, time invariant, parallel
plate capacitor. So, the permittivity can be calculated by
C =
0

r
A
d
(4.1)
where
0
denotes the permittivity of free space,
r
the permittivity of the ferroelectric material
and Aand d the capacitor area and thickness. The permittivity of ferroelectrics depends strongly
on the polarization and therefore the small signal is superimposed with a larger bias signal. To
measure a full CV curve the bias voltage is changed stepwise and a capacitance measurement
is performed at each step.
30 4 Material Characterization with Respect to MEMS Devices
4.2 Electromechanical Characterization Methods
For the characterization of the electromechanical properties several techniques are established.
One of them, often applied to bulk ceramics, but also to piezoelectric thin lms, analyzes the
impedance spectrum that arises if the material is excited by an electric eld with increasing
frequency [113]. Another popular method uses the direct piezoelectric effect. Thereby a stress
is applied to the sample and the generated charge is measured and integrated to calculate the
piezoelectric coefcient [114119]. A third method uses the converse piezoelectric effect by
means of optical, interferometric principles [120123]. Thereby, the piezoelectric lmis excited
by applying an electric eld and generating a displacement due to equation 2.6.
For the measurements a double beam laser interferometer with resolution of 0.2 pm is
used Figure 4.1. The laser beam of a He Ne-laser (wavelength 632.8 nm) is rotated with a
lambda/2-plate and then divided by the polarizing beam splitter (PBS1) into a measurement-
and a reference beam. The measurement beam leads through a lambda/4-plate and the lens
HeNe-Laser
Isolator
M1
Lambda/2 plate
PBS1
PBS2
PBS3
BS.4
M2
M3
M4
Sample
Lambda/4 plate
L1
L2
Lambda/4 plate
Lambda/4 plate
Piezo actuator
+reference mirror
L3
Photodiode
FIGURE 4.1:
Beam path of the double beam laser interferometer used to determine the piezoelectric
properties of thin lms [124].
4.3 Lead Zirconate Titanate (PZT) 31
(L1) to the polished backside of the sample, which is placed perpendicular to the beam. The
beam is reected and distracted by PBS1 to the mirrors M2 and M3 since the polarization of
the beam is two times turned 45 by the lambda/4-plate. Deected at PBS2, passing the second
lambda/4-plate and L2 leads the beam to the top-side of the sample where it hits the top contact
and is then reected toward M4. From here the beam is directed to the photodiode passing the
beam splitter 4 (BS4). The reference beam is deected from PBS3 toward a reference mirror
passing a lambda/4-plate, where the beam is reected passing PBS3 again and is then deected
by BS4 to the photodiode, where the supperposition of the measurement and reference beam
causes an interference pattern.
If an electric eld is applied to the sample the measurement beam becomes shorter due to the
dilation of the piezoelectric layer and therefore the intensity of the interference pattern changes,
which is measured by the photodetector. To keep the measurement conditions constant, the
reference mirror elongates or shortens the length of the reference beam, if the optical devices
moves due to mechanical vibrations or thermally induced instabilities (more details are given
in [124, 125]). One of the reasons to use a double beam laser interferometer is to eliminate
measurement errors because of sample bending since the piezoelectric stress of the clamped
lms not only results in a displacement of the lm but also induces strong bending in the
substrate [126, 127]. If the sample bends, the beam length on the backside elongates exactly
the same amount as the beam length is shortened on the front side resulting in an elimination
of the bending error.
Electromechanical large signal and small signal measurements are performed with this setup,
whereby typical measurement conditions are (i) large signal measurements: 0 to 10 V at
f=123 Hz and (ii) small signal measurements: bias signal 0 to 10 V at 1Hz, supperimposed
with a small signal of 100 mV at 8000 Hz.
4.3 Lead Zirconate Titanate (PZT)
Electrical Characterization
Figure 4.2 (a) displays an exemplary hysteresis measurement of a 150 nm thin PZT(45/55) lm.
The sample shows a pronounced hysteresis with a remanent polarization P
r
= 16 C/cm
2
and
a coercive voltage of V
C
= 0.7 V , which corresponds to a coercive eld of E
C
= 50 kV/cm.
Measurements on lms with various PZT compositions prove, that changing the Zr/Ti ratio
32 4 Material Characterization with Respect to MEMS Devices
(a)
5 4 3 2 1 0 1 2 3 4 5
45
30
15
0
15
30
45
PZT(45/55)


Voltage [V]
P
o
l
a
r
i
z
a
t
i
o
n

[

C
/
c
m

]
(b)
25 30 35 40 45 50 55
10
15
20
25
30
35
40


P
r

[

C
/
c
m
2
]
Zr content [%]
FIGURE 4.2:
(a) P-V characteristic of a 150 nm thin PZT(45/55) lm. (b) Remanent polarization of PZT
lms dependent on the Zr content.
to Zr rich compositions results in slanted hysteresis graphs with lower remanent polarization
and smaller coercive voltages. Figure 4.2 (b) summarizes the remanent polarization vs. Zr
content. PZT(30/70) exhibit a remanent polarization of around 35 C/cm
2
. With increasing Zr
content a monotonous decrease of the remanent polarization is observed. Ti rich compositions
are therefore the main candidates for non-volatile memory applications since the remaining
polarization is used for read and write operations [128].
Also, small signal measurements are performed on various PZT thin lms to determine the di-
electric permittivity (oscillation level = 50 mV, 10 kHz). Figure 4.3 (a) shows a typical C(V)
curve for PZT(45/55) thin lms. The measurement shows that the permittivity strongly depends
on the applied bias voltage and exhibits two maxima of
r
= 1300 around the coercive voltage.
Without an applied electric eld decreases the permittivity down to
r
= 1150 and by exceed-
ing the coercive voltage a minimum value of around 300 is reached. This tunable behavior
is observed on PZT lms of all compositions whereby the minimum value in voltage satura-
tion is always around 300, but the maximum and the initial permittivity (without an applied
electric eld) are strongly affected by the Zr/Ti ratio. Figure 4.3 (b) shows the permittivity at
E=0 kV/cm vs. the zirconium content and a strong increase is obseved, if the lms changes to
zirconium rich compositions.
4.3 Lead Zirconate Titanate (PZT) 33
(a)
-5 -4 -3 -2 -1 0 1 2 3 4 5
200
400
600
800
1000
1200
1400
Voltage [V]

r
PZT 45/55
(b)
30 35 40 45 50 55 60
200
400
600
800
1000
1200
1400
1600
1800
Zr content [%]

r
FIGURE 4.3:
(a) Measurement of the dielectric permittivity vs. applied bias voltage for PZT(45/55)
(150 nm). (b) Dielectric permitivity at E = 0 kV/cm as function of the zirconium content.
Electromechanical Characterization
Figure 4.4 (a) displays two electromechanical small signal measurements of PZT(30/70)
and PZT(45/55) lms (300 nm). PZT(45/55) exhibit a maximum d
33
= 115 pm/V whereas
PZT(30/70) exhibit a d
33
below 50 pm/V. In Figure 4.4 (b) a plot of the remanent d
33
vs.
the zirconium content is shown. If the Zr/Ti ratio shifts to a higher zirconium content the
piezoelectric coefcient increases and the maximum is measured for PZT(45/55). Beyond this
compositions the piezoelectric coefcient decreases. This corresponds with the estimation of
the piezoelectric coefcient d
31
using
d
31
= 2
0

R
P
r
Q
12
. (4.2)
with the electrostrictive coefcient Q
12
= 3.1 10
2
m
4
/C
2
[129].
PZT(45/55) lms are characterized with regard to the lm thickness. The detailed electro-
mechanical investigation is mainly on lms with thicknesses below 700 nm, because it is ex-
pected that this is the technical relevant range in order to keep the driving voltages low. An
electric eld of 200 kV/cm corresponds to 14 V, if a lm thickness of 700 nm is considered.
The d
33
of a selection of different PZT(45/55) thicknesses dependent on the electric eld is
presented in Figure 4.5. The measurements are almost identical, showing the distinctive behav-
ior of the electromechanical small signal measurements, which means symmetric graphs and
a negative slope of d
33
for E >> E
C
. Therefore it can be concluded that the piezoelectric
coefcient d
33
is independent of the lm thickness.
34 4 Material Characterization with Respect to MEMS Devices
(a)
-300 -200 -100 0 100 200 300
-120
-90
-60
-30
0
30
60
90
120
d
3
3

[
p
m
/
V
]
Electric field [kV/cm]
PZT(30/70)
PZT(45/55)
(b)
20 30 40 50
20
40
60
80
100
r
e
m
.

d
3
3

[
p
m
/
V
]
Zr content [%]
FIGURE 4.4:
(a) Piezoelectric coefcient d
33
of PZT(30/70) compared with PZT(45/55) (lm thickness
300 nm). (b) d
33
as function of the Zr content.
Theoretically, the strain can be calculated using equation 2.6 (contact forces applied by the
probe needles are neglected). However, the lm is not a perfect crystal, and clamping on the
substrate hinders the PZT to evolve the full piezoelectric potential [77]. Therefore, the strain
of the lms is investigated by performing electromechanical large signal measurements. Fig-
ure 4.6 (a) shows the results of various lms. The measurements turn out that the strain is totally
independent on the lm thickness and therefore the displacement is also independent on the lm
thickness, if the applied voltage is constant.
S
3
=
t
t
= d
33
E
3
= d
33
U
3
t
= t = d
33
U
3
(4.3)
with t representing the total displacement, t the lm thickness and U the applied voltage. On
the other hand, the total displacement is strongly dependent on the lm thickness at the same
electric eld. The thicker the lm the higher the displacement. Figure 4.6 (b) displays the total
-400 -300 -200 -100 0 100 200 300 400
-100
-80
-60
-40
-20
0
20
40
60
80
100
121 nm
481 nm
604 nm
d
3
3

[
p
m
/
V
]
Electric field [kV/cm]
FIGURE 4.5:
d
33
measurements of PZT(45/55)
thin lms with various thicknesses
(4V bias signal).
4.3 Lead Zirconate Titanate (PZT) 35
(a)
-400 -200 0 200 400
-1
0
1
2
3
4
121 nm
481 nm
604 nm
S
t
r
a
i
n

[
1
/
1
0
0
0
]
Electric field [kV/cm]
(b)
-400 -200 0 200 400
-400
0
400
800
1200
1600
D
i
s
p
l
a
c
e
m
e
n
t

[
p
m
]
Electric Field [kV/cm]
121 nm
481 nm
604 nm
FIGURE 4.6:
Electromechanical large signal measurements on PZT(45/55) thin lms with various thick-
ness: (a) Strain vs. electric eld (b) Displacement vs. electric eld.
displacement vs. the electric eld and reveals a maximum displacement of around 1.4 nm at
200 kV/cm for a 604 nm thin lm, whereas the 121 nm lm reveal only 0.25 nm displacement
at E = 200 kV/cm.
4.3.1 Electromechanical Fatigue
As ferroelectric actuators are system-enabling components, long-term reliability is of para-
mount industrial concern. It needs to be ensured that the device will be stable over a long
time period and number of operation cycles depending on the application. Besides MEMS
packaging, the mechanical stability of the supporting substrate, the integrated smart material
needs to remain their functionality. To cover the reliability aspects of the integration, a closer
look to the fatigue behavior in terms of the electrical and electromechanical properties is neces-
sary [130133].
It is known, that the polarization of PZT lms decreases with an increasing number of switching
cycles, if platinumelectrodes are used. In Figure 4.7 (a) a typical result on a 481 nm thin sample
is shown for several polarization measurements after a different number of cycles. In the ini-
tial state the material is clearly ferroelectric and shows a remanent polarization of 23 C/cm
2
.
By increasing the number of switching cycles the hysteresis curve becomes shallow and the
remanent polarization decreases, whereas the coercive eld remains constant. After 10
9
cycles
36 4 Material Characterization with Respect to MEMS Devices
almost no ferroelectric properties are left. Figure 4.7 (b) summarizes the results for the piezo-
electric fatigue measurements. Like the polarization, the measured graph becomes shallow and
d
33
decreases with an increasing number of cycles down to a d
33
= 35 pm/V after 10
9
cycles.
It is obvious that there is a relation between the piezoelectric properties and the polarization.
If one look more into detail of the development of the remanent polarization and the remanent
d
33
it is found that there is no continuous decrease. Both parameters remain constant until
10
6
switching cycles before a strong decrease occurs (Figure 4.8 (a)). After 10
8
cycles the
fatigue mechanism seems to be completed and at least P
r
remain constant on a low level. This
fatigue effect is found for all samples with a tendency that in thinner lms the fatigue of the
piezoelectric coefcient starts earlier than the fatigue of the polarization [134]. However, Gerber
et al. [135] performed similar fatigue characterization on 130 nm PZT(30/70) and PZT(40/60)
thin lms. The fatigue of both parameters starts simultaneous at 10
5
switching cycles. Hence,
further investigation is needed to clarify this point.
Another interesting point is the comparison of the values in the initial state and in the fatigued
state. A 255 nm lm shows a constant d
33
of 87 pm/V at 0 V bias voltage before the fatigue
starts. After the fatigue is completed a d
33
of 57 pm/V is left. This means that the d
33
in the
fatigued state has still 65 %of its initial piezoelectric abilities. The 708 nmlmshows a stronger
fatigue behavior. After 10
8
cycles just 22 % of the initial d
33
value is left. The comparison of
the initial remanent polarization with the fatigued remanent polarization after 10
8
cycles gives
a similar behavior. In thinner lms, the difference between the initial and fatigued state is less
(a)
-200 -100 0 100 200
-40
-20
0
20
40
P
o
l
a
r
i
z
a
t
i
o
n

[

C
/
c
m

]
Electric Field [kV/cm]
initial
1E7
1E8
1E9
(b)
-200 -100 0 100 200
-100
-80
-60
-40
-20
0
20
40
60
80
100
d
3
3

[
p
m
/
V
]
Electric field [kV/cm]
initial
1E6
1E7
5E7
1E8
1E9
FIGURE 4.7:
(a) Polarization measurement and (b) piezoelectric coefcient d
33
of a 481 nm PZT(45/55)
thin lm after different numbers of fatigue cycles.
4.3 Lead Zirconate Titanate (PZT) 37
(a)
10
1
10
3
10
5
10
7
10
9
80
60
40
20
0
20
40
60
80
40
30
20
10
0
10
20
30
40
d
3
3

[
p
m
/
V
]
Number of cycles
P
r

[

C
/
c
m

]
(b)
100 200 300 400 500 600 700
10
20
30
40
50
60
70
80
90
rem. d
33
P
r
L
o
s
s

@

1
0
8

c
y
c
l
e
s

[
%
]
Film thickness [nm]
FIGURE 4.8:
(a) Comparison between P
r
and d
33
(@ 0 V) for a 708 nm PZT(45/55) thin lm. (b)
Piezoelectric and polarization losses vs. lm thickness.
than in thicker lms. Figure 4.8 (b) summarizes the loss of d
33
and the remanent polarization
after 10
8
cycles vs. the lm thickness. The losses are dependent on the lm thickness whereas
the piezoelectric coefcient loss is stronger than the loss of polarization. Hence, the decrease
of the small signal parameter d
33
and the decrease of the polarization, which is a large signal
parameter, originate from different effects.
Avoiding fatigue is an essential issue in memory devices as well as in piezoelectric devices.
Since ferroelectric materials exhibit a symmetric displacement it is not necessary to drive piezo-
(a)
-300 -200 -100 0 100 200 300
-100
-80
-60
-40
-20
0
20
40
60
80
100
d
3
3

[
p
m
/
V
]
Electric field [kV/cm]
virgin
1E6
1E8
(b)
10
2
10
4
10
6
10
8
10
10
-100
-80
-60
-40
-20
0
20
40
60
80
100
d
3
3

[
p
m
/
V
]
Number of cycles
bipolar
unipolar
FIGURE 4.9:
(a) Piezoelectric coefcient d
33
of a 255 nm PZT(45/55) thin lm after different numbers
of unipolar fatigue cycles. (b) Comparison of the effect of bipolar and unipolar voltage
pulses to d
33
(481 nm lm thickness).
38 4 Material Characterization with Respect to MEMS Devices
electric devices with bipolar voltages. Hence, the piezoelectric response is measured with
unipolar voltage pulses used for the fatigue procedure. The unipolar pulses always range be-
tween 0 V and a maximum bias voltage, dependent on the lm thickness. Applying unipolar
pulses mean that the sample does not switch between negative and positive polarization. Fig-
ure 4.9 (a) shows the measurement result for the d
33
coefcient of a 255 nm thin lm. After
10
8
cycles the graph has still the same shape. Repeating the measurements with other lms
gives the same result. Figure 4.9 (b) compares the remanent d
33
in case of bipolar and unipolar
fatigue pulses for a 481 nm lm. No decrease of the piezoelectric properties is observed after
10
9
unipolar cycles.
4.4 Lanthanum doped Lead Hafnate Titanate (PLHT)
In this section the electrical and electromechanical properties of PHT are investigated. Schorn
et al. [86] focused the research on pure PHT(30/70) and examined the electrical properties
with regard to FeRAM applications. He found a similar behavior to PZT(30/70). Therefore,
electromechanical measurements are performed on PHT(30/70) with and without La doping.
Since the characterization of PZT with a Zr/Ti ratio of 45/55 prooved to be the best material for
piezoelectric applications the emphasis is on the electrical and electromechanical characteriza-
tion of PHT(45/55) with additional doping.
Electrical Characterization
A study on pure PHT(45/55) is performed in comparison to pure PZT(45/55). The polarization
measurements show a similar behavior (Figure 4.10 (a)). Both materials exhibit a hysteresis
loop with a coercive eld of E
C
50 kV/cm and a remanent polarization of P
r
25 C/cm
2
.
Figure 4.10 (b) displays polarization measurements performed on lms with various La
doping concentrations. All lms exhibit hysteresis loops, but the shape of the curves varies
from a broad, square hysteresis to a small, slim hysteresis loop accompanied with a strong
decrease of P
r
if the La concentration increases. The remanent polarization is reduced from
P
r
= 25 C/cm
2
(no La doping) to P
r
= 6 C/cm
2
(10 % La). At the same time the
decrease of E
C
is much less.
Small signal measurements are performed on the different lms and are summarized in
Figure 4.11 (b). Pure PHT(45/55) shows the typical two maxima and a strong dependence on
the applied electric eld. Thereby it exhibits the highest dielectric permittivity of
r
= 1250
4.4 Lanthanum doped Lead Hafnate Titanate (PLHT) 39
(at E = 0 kV/cm). Films with higher amounts of La exhibit the same strong dependence
on the electric eld, but their maximum permittivity is decreased. Nevertheless, in the high
electric eld regime (E E
C
) the measurements are identical. Furthermore, one notices
that the maxima come closer together and there is almost no difference any more for the lm
doped by 10 % La. Another fact to be mention here, is the difference between appliying a
positive or negative electric eld to bring the material into saturation. In Figure 4.11 (b) two
measurement cycles are plotted for each lm. The curves for the pure PHT lm are identical,
but the lm with 10 % La doping shows a difference in the absolute values of the maxima. If
a positive electric eld is applied and then reduced, the material passes the higher maximum.
If the material is in negative saturation and the electric eld is reversed then the dielectric
permittivity reaches the smaller maximum. Nonuniform distribution of the high amount of
La within the lm can be the reason for this effect. Further studies need to be done on this issue.
Electromechanical Characterization
Measurements of the piezoelectric coefcient are performed on PHT(45/55) and PHT(30/70)
thin lms with various La doping. Figure 4.12 (a) shows the result of small signal measure-
ments. They exhibit a strong hysteresis shape. Pure PHT (square dots) exhibits a maximum
d
33
100pm/V, which is analog to pure PZT of the same composition, but also it shows a
very strong decrease of d
33
with increasing applied electric elds. At 550 kV/cm the material
has lost 50 % of its initial d
33
value.
(a)
-600 -400 -200 0 200 400 600
-50
-40
-30
-20
-10
0
10
20
30
40
50
P
o
l
a
r
i
s
a
t
i
o
n

[

C
/
c
m
2
]
Electric field [kV/cm]
PZT(45/55)
PHT(45/55)
(b)
-600 -400 -200 0 200 400 600
-50
-40
-30
-20
-10
0
10
20
30
40
50
P
o
l
a
r
i
s
a
t
i
o
n

[

C
/
c
m
2
]
Electric field [kV/cm]
PLHT(45/55)
0.0 % La
5.0 % La
10.0 % La
FIGURE 4.10:
(a) Comparison of the polarization between PZT(45/55) and PHT(45/55) thin lms
(150 nm) (b) Polarization vs. electric eld of PHT(45/55) lms with various amount of
La doping. (Measurements taken at 100 Hz.)
40 4 Material Characterization with Respect to MEMS Devices
-600 -400 -200 0 200 400 600
0
200
400
600
800
1000
1200
1400

r
Electric field [kV/cm]
PLHT(45/55)
0.0 % La
5.0 % La
10.0 % La
FIGURE 4.11:
Dielectric permittivity vs. elec-
tric eld of PLHT(x/45/55) lms
with various amounts of La doping
(50 mV oscillation level, 10 kHz
measurement frequency.
Also the characteristics of the electromechanical small signal measurements are comparable
to the electrical large signal measurements, if lms with various La doping concentrations are
considered. The maximumd
33
decreases with increasing La amount and the shape of the curve
becomes smaller, while almost no difference exists between 2.5 % and 5 % La doping. The
characteristic of the 10 % La doped lms looks different. The material exhibits no hysteresis
behavior, instead it shows a slim loop. A linear increase of d
33
is observed until a maximum
value of d
33
= 63 pm/V is reached at 200 kV/cm and then the piezoelectric coecient remains
constant in the high voltage regime.
For comparison a number of La doped PHT(30/70) lms are characterized by electromechan-
ically small signal measurements, whose results are plotted in Figure 4.12 (b). PHT(30/70)
exhibits a square hysteresis behavior with a maximum of d
33
50 pm/V and a negative slope
(a)
-600 -400 -200 0 200 400 600
-100
-80
-60
-40
-20
0
20
40
60
80
100
d
3
3

[
p
m
/
V
]
Electric field [kV/cm]
PLHT(45/55)
0.0 % La
5.0 % La
10.0 % La
(b)
-400 -200 0 200 400
-60
-40
-20
0
20
40
60
d
3
3

[
p
m
/
V
]
Electric field [kV/cm]
PLHT(30/70)
0.0 % La
2.5 % La
5.0 % La
FIGURE 4.12:
(a) d
33
vs. electric eld of PHT(45/55) lms with various amounts of La doping. (b) d
33
vs. electric eld of PHT(30/70) lms with various amounts of La doping.
4.4 Lanthanum doped Lead Hafnate Titanate (PLHT) 41
(a)
-600 -400 -200 0 200 400 600
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
D
i
s
p
l
a
c
e
m
e
n
t

[
n
m
]
Electric Field [kV/cm]
PLHT (45/55)
0.0 % La
(b)
-600 -400 -200 0 200 400 600
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
D
i
s
p
l
a
c
e
m
e
n
t

[
n
m
]
Electric Field [kV/cm]
PLHT (45/55)
10.0 % La
FIGURE 4.13:
Displacement vs. electric eld of PHT(45/55) lms: (a) without La doping (b) with 10 %
La doping (f
bias
= 123 Hz).
within higher electric elds. With increasing La concentration the d
33
remains nearly constant,
but the curve becomes smaller and the coercive eld decreases. These measurements prove that
PHT(45/55) generally is better qualied for piezoelectric applications than PHT(30/70).
How the different behavior of the piezoelectric coefcient affects the strain and displacement
respectively is shown in Figure 4.13 (a) and (b). Considering positive applied electric elds
the comparison of the undoped PLHT(0/45/55) lm with the 10 % La doped lm exhibits
some differences. The pure lm shows a higher displacement, which is expected, because the
d
33
is higher. One also observes minima at E
C
and a curved graph due to the decreasing
piezoelectric coefcient in the range of high applied electric elds. The measurement of the
10 % La doped lm looks different. The displacement shows a quadratic dependence on the
applied electric eld and is therefore more electrostrictive than piezoelectric. Further, the curve
shows a closed behavior instead of an opened buttery loop.
The characterization can be concluded with the observation that PHT behaves similarly
to PZT and can be used for piezoelectric devices. Whether La doping is useful depends
on the request of the device. On one hand, pure PHT(45/55) exhibits the highest d
33
, but
the piezoelectric coefcient decreases with increasing elds and the strain is of non-linear
behavior. On the other hand PLHT(10/45/55) shows a smaller d
33
, but it develops linear and
remains constant in the high electric eld regime. A device driven above 200 kV/cm will work
hysteresis free and exhibit a linear behavior. In addition, the electrical losses decrease linearly
42 4 Material Characterization with Respect to MEMS Devices
with increasing La doping concentration. Hence, the use of PZT or PLHT depends strongly
on whether maximum displacement, linear movement or optimized power consumption is
required for the desired device.
4.5 Barium Strontium Titanate (BST)
BST is discussed with respect to its application in devices for infrared imaging.
Electrical Characterization
The investigation starts with an elaborate characterization of the dependence of the dielectric
permittivity on the applied voltage. The measurement of a 120 nm thin BST(70/30) lm
is presented in Figure 4.14. The square symbols depict a curve, which is taken at room
temperature. A strong dependence of
r
on the applied voltage is observed with a maximum
of more than 400. Only one permittivity maximum is visible, since BST is in the paraelectric
phase above room temperature. Furthermore, the maximum is slightly shifted to negative
voltages. There is no exact explanation for this unbalanced behavior, but it is probably due to
stress variations of the top and bottom electrode.
To characterize the dependence of the permittivity on the temperature, various measurements
are carried out. The temperature range was chosen from -20 C to 200 C. With increasing
temperature the graph attened and the maximum permittivity values decrease strongly. At
200 C
r
drops to 67 % of the initial value at room temperature. In Figure 4.15 the square
6 5 4 3 2 1 0 1 2 3 4 5 6
150
200
250
300
350
400

r
Voltage [V]
BST(70/30)
25C
60 C
130 C
200 C
FIGURE 4.14:
Dielectric permittivity vs.
voltage of a BST(70/30)
thin lm (V
osc
= 50 mV,
f
osc
= 10 kHz). The graphs
are monitored in the range
from room temperature to
200 C.
4.5 Barium Strontium Titanate (BST) 43
-30 0 30 60 90 120 150 180 210
200
240
280
320
360
400

r
Temperature [C]
BST(70/30)
BST(55/45)
FIGURE 4.15:
Comparison of the dielectric permit-
tivity (@ 0 V) vs. temperature of
BST(70/30) and BST(55/45).
symbols depict the progression of
r
(at 0 V) with increasing temperature of the BST(70/30)
lm. The permittivity decreases nearly linear from
r
= 400 down to
r
= 240. The round
symbols summarize the measurements for a BST(55/45) thin lm showing a similar behavior
but generally BST(55/45) exhibits a smaller permittivity.
Concluding the electrical and electromechanical characterization presented in chapter 4
leads to the result that PZT(45/55) or PHT(45/55) with an amount of 10 % La doping are
good suited materials for the application in electromechanic driven MEMS. Both compositions
exhibit large piezoelectric coefcients whereby doping with La changes the material from
ferroelectric to relaxor behavior and therefore electrostrictive behavior. The effect of fatigue
can be successfully avoided, if devices using PZT on platinum electrodes are driven with
unipolar voltages.
For bolometer applications BST(70/30) is a suitable material, since at room temperature its
permittivity depends linear on temperature changes and the permittivity is higher than for
BST(55/45).
44 4 Material Characterization with Respect to MEMS Devices
45
5 Technology
T
he following chapter describes various technologies, that are develped or improved during
the course of this thesis in order to integrate ferroelectric thin lms into silicon based
microsystems. The spectrum enfolded lithography, silicon bulk- and surface micromachining,
sacricial techniques, plasma etching and electroplating.
Two typical device designs are shown in Figure 5.1. A ferroelectric material is deposited
between two electrodes on a membrane (Figure 5.1 (a)). Therefore technologies for patterning
metals and ferroelectrics as well as silicon structuring are required. Another design bases on
cantilevers with an overlapping metal contact (Figure 5.1 (b)) and therefore additional to lateral
material deposition and structring also vertical deposition and structruring technologies are
required.
The basics of silicon MEMS microfabrication such as photolithography, pattern transfer with
dry etching, wet etching techniques and thin lm deposition (e.g. SiO
2
, Si
3
N
4
, poly-Si, Al,
Au etc.) have been reviewed in the literature [136140], but up to date the microfabrication
of microsystems using ceramic materials suffers from inadequate micromachining processes,
only few references have been published [141143].
5.1 Photolithography
MEMS usually consit of a stack of different material layers, which are conformally deposited on
each other and photolithograhy is used for the structuring [144, 145]. Since different structuring
methods are applied it is necessary to use various photoresists matching the requirements of
the process in terms of resist thickness, feature size, selectivity and temperature stability. The
Si
Contact
Si
Electrode
Ferroelectric
film
(a)
SiO
2
(b)
FIGURE 5.1:
Basic structures of ferroelectric MEMS: (a) on membrane (b) cantilever with contact.
46 5 Technology
TABLE 5.4: Parameters of positive lithography processes
Resist Resist- Spinning- Prebake Exposure- Development
thickness Speed C time time
@90 (AZ 826mif)
[m] [rpm.] [min.] [sec.] [sec.]
AZ 5214E 1.4 4000 5 7 40
TI xlift 1.7 3000 5 40 60 diluted
3:1 PGMEA
AZ 5214E 3.0 1000 7 16 60
TI xlift 4.8 2500 20 80 120
AZ 4562 6.8 4000 7 40 90
TI xlift 8.0 1200 40 160 180
process parameters for positive and negative lithography processes are summarized in Table 5.4
and Table 5.5.
The resists of the AZ series and the TI xlift resist vary mainly due to the maximum resist
thickness and sustain maximum temperatures around 130 C, whereas the nlof resist withstands
temperatures up to 250 C, but has a minimum thickness of 2 m, which restricts the minimum
feature size.
TABLE 5.5: Parameters of negative lithography processes
Resist Resist- Spinning- Prebake Exposure- Reversal- Flood- Develop-
thickness Speed time bake Exposure ment
[m] [rpm.] [min.] [sec.] [min.] [sec.] [sec.]
AZ 5214E 1.4 4000 5@90 C 4.5 2@115 C 14.5 35
TI xlift 1.7 3000 5@90 C 30 2@130 C 100 120
nlof 2020 2 2500 5@20 C 25 1@110 C 30
5@90 C
AZ 5214E 3.0 1000 7@90 C 12.5 2@115 C 30 45
nlof 2020 4 1000 5@20 C 35 1@110 C 35
5@90 C
TI xlift 4.8 2500 20@90 C 40 2@130 C 120 360
TI xlift 8.0 1200 40@90 C 55 2@130 C 160 600
nlof 2070 8 2500 5@20 C 45 1@110 C 45
5@90 C
5.2 Silicon Bulk Micromachining 47
5.2 Silicon Bulk Micromachining
Silicon bulk etching techniques are used to remove silicon selectively to metals, SiO
2
, Si
3
N
4
etc. and have been broadly applied in the fabrication of micromachined sensors and actuators.
The available etching methods are categorized into three categories in terms of state of the
etchant: wet, vapor, and plasma. Silicon etching from the vapor phase is conducted using
xenon diuoride (XeF
2
) [146, 147] and more informations about plasma etching are given in
section 5.3.
Within silicon wet etching one distinguishes between isotropic and anisotropic etch reactants.
The rst group consists of mixtures from hydrouoric acid (HF), nitric acid (HNO
3
) and acetic
acid (CH
3
COOH) and etches independently of the silicon crystal orientation. To the second
group belong inorganic alkaline etchants like potassium hydroxide (KOH) and organic alkaline
etchants such as tetramethylammonium hydroxide (TMAH) [148150]. Both chemical groups
exhibit unequal etch rates depending on the silicon crystal orientation and contain OH

-ions and
H
2
O-molecules, which are necessary for the reaction. In a rst step the Si-atoms react with the
OH

-ions and deliver electrons to the conduction band (Eq. 5.1). In a second step the electrons
react with the H
2
O-molecules by creating H
2
and OH

-ions, while the solid Si-complex forms


a soluble Si-complex with the aid of OH

-ions (Eq. 5.2).


Si + 2OH

Si(OH)
2+
2
+ 4e

(5.1)
Si(OH)
2+
2
+ 4e

+ 4H
2
O Si(OH)
2
6
+ 2H
2
(5.2)
TMAH belongs to the anisotropic Si etchants, whose working principle is illustrated in Fig-
ure 5.2. If the process is applied to a (100) oriented wafer the vertical etch rate is much higher
than the lateral etch rate resulting in a typical angel of = 54.74 between the surface and
the sidewall, which is an important integration aspect. In addition it is possible to etch per-
pendicular trenches, if the Si substrate is of (110) orientation. The reason for this behavior
lies in the different number of atomic bonds of the crystal directions. A (111) oriented plane
has one atomic bond, whereas a (110) or (100) plane exhibits two bonds per atom. Therefore,
more energy is necessary to release a Si atom from the (111) surface, resulting in the described
geometries.
The silicon substrates used within this work are of (100) orientation and have a thickness of
675 m. Experiments with various TMAH concentrations and different temperatures proved an
etch rate of 32 m/h, if a 20 % TMAH etch solution is used at 80 C. A picture of such a cavity
is presented in Figure 5.3 (a), where SiO
2
acts as hard mask. Alongside a sample is presented
48 5 Technology

(100) (110)
FIGURE 5.2:
Geometry of TMAH etching in (100) and (110) oriented wafers.
which is etched at the same temperature but with 10 % TMAH concentration (Figure 5.3 (b)).
A higher etch rate is observed, but the surface is rough which turns out to be regular pyramidic
shaped hillocks. An increase of the temperature generally results in an increase of the etch rate.
Due to a better surface quality and better process control the etch process with 20 % TMAH
solution at 80 C is chosen for the device fabrication later on.
(a) (b)
FIGURE 5.3:
SEM pictures of a silicon cavity etched at 80 C with: (a) 20 % (b) 10 % TMAH solution.
The inset in (b) indicates a rough surface formed by Si pyramides.
5.3 Surface Micromachining 49
5.3 Surface Micromachining
Wet etching techniques make use of hazardous chemicals, which are often of isotropic nature
and exhibit high etch rates, thereby making it difcult to control the process. Dry etching or
plasma etching techniques on the other hand enable a very good control of the process and
therefore they lead to improved etch proles, e.g. deep trenches with steep edges, avoidance of
underetching and accurately etch stops.
Dry etching processes uses inert or reactive gases, which are ionized in a low pressure reactor
to form a plasma. For surface micromachining a dry etching system (Microsys from Roth und
Rau) is used, which is equipped with an electron cyclotron resonance (ECR) plasma source and
can be operated in two modes: (i) ECR mode and (ii) RF mode. Some technical data of the
system are given in Table 5.6.
In ECR-mode the plasma is generated by an electromagnetic eld (2.4 GHz), which is coupled
into the chamber by an antenna (Figure 5.4) and ionize the gas, which is led in through the
upper gas inlet. Furthermore, the plasma is densied by a magnetic eld. The electrical
impedance of the plasma, which depends on the process parameters (e.g. pressure, power) has
Microwave
Generator
Tuner
Magnet
Plasma
Vacuum Chamber
Gas Ring
Wafer
Gas Inlet
He-Cooling
Load-Lock
Vacuum
Pump
Antenna
RF-Generator
FIGURE 5.4:
Schematic drawing of the plasma etching system used for structuring of thin lms and
different materials.
50 5 Technology
to be matched to the internal impedance of the microwave source. By changing the geometry of
the waveguide using tuner stubs, it is possible to optimize the induced power. To yield physical
or chemical etching the plasma is directed to the wafer by an RF-eld. The wafer forms one
electrode and the reaction chamber itself the opposite electrode. By applying the RF-eld
(13.54 MHz) the ions and the electrons are accelerated in opposite directions during the rst
half of the period and a potential difference arises. This potential difference maintains in the
second half of the periode due to the different masses of the electrons compared to the ions and
due to the different areas of the electrodes. Hence, the wafer is charged more negatively than
the reaction chamber [151]. Positive charged ions from the plasma accelerates to the wafer,
where they attack the surface due to physical impact or by chemical reaction with the material
and the formation of volatile products. The magnitude of the physical impact is controlled by
the applied RF-power. The ion ow in direction of the wafer represents a plasma themselves
and therefore a matching network is necessary to adjust the induced RF-power. Strong physical
ion impact on the wafer surface leads to strong heating, which easily exceeds the temperature
to which photoresist is stable ( 120

C). Therefore, the wafer is cooled from the backside
with helium.
In RF-mode, the gas or gas mixture respectively enters the chamber through the gas ring
nearby the wafer and the plasma is ignited and maintained by the RF-eld applied to the
chamber and wafer. Since, the distance between plasma and wafer is reduced the ions have less
kinetic energy and therefore the physical impact of the ions is reduced. Furthermore, the ion
impact is not strongly perpendicular to the wafer surface. Hence, RF generated plasmas are
suitable for isotropic, reactive etch processes.
TABLE 5.6: Technical data: MicroSys plasma etching system.
max. microwave power 1200 W
max. RF power 600 W
typ. pressure 1 - 100 bar
cooling -30 C to 20 C
provided gases Ar
O
2
CHF
3
(Triuoromethane)
CF
4
(Tetrauoromethane)
SF
6
(Sulfur Hexauoride)
He (only for cooling)
5.3 Surface Micromachining 51
Pt bottom
trench
SiO
2
residues of
photoresist
Pt/PZT/Pt
FIGURE 5.5:
Trench formation during plasma
etching due to a inhomogeneous dis-
turbance of the electric potential.
To appraise the quality of an etch process some characteristic aspects are considered. Selectivity
compares the etch rate of the thin lm that is etched with the etch rate of the masking layer or
surrounding materials.
selectivity =
etch rate of the material to be etched
etch rate of the masking layer
(5.3)
A second criteria is the aspect ratio. It describes the ratio between the vertical etch depth to the
undercut of the masking layer.
aspect ratio =
etch depth
undercut
(5.4)
The aspect ratio characterizes the shape of a trench: The higher the aspect ratio the steeper the
sidewalls of a trench.
The third important parameter is the etch homogeneity of a wafer. The etch rate in the center of
a wafer may be different from the etch rate at the border. Supplementary, the etch process can
be inhomogeneous in the range of the structure size due to varying conductance of the involved
materials and densication of the electric eld at edges. Figure 5.5 shows a SEM picture of a
Pt/PZT/Pt stack, which is protected by photoresist. Close to the border of this stack the lower
Pt is removed, which means the etch rate is higher in this area. The inset identies the strong
impact at the corner, which is etched in a way, that after the processing two tips are formed.
The appearance of fences is another problem in combination with dry etching processes. Fences
arise if removed material redeposits on the sidewalls of the protecting photoresist instead of
being pumped outside the reaction chamber together with the reactive gas (Figure 5.6 (a)). The
52 5 Technology
(a)
substrate
photoresist
thin film
+
+
+
+
+
+
+
(b)
resist
PZT
fence
FIGURE 5.6:
(a) Formation of fences during dry etching processes. (b) Fences formed at the sidewall of
photoresist.
fences in Figure 5.6 (b) have been emerged during PZT etching with non-optimized parameters.
On the right hand side one notices the photoresist, which is also partly removed during the
etching.
Special attention has to be paid to the temperature during the etch process. High physical ion
impact is combined with high energy transfer from the ions to the substrate. Whereas most
of the involved materials like Pt, Si or PZT withstand temperatures of several hundred C, the
photoresist is mostly stable up to 120 C. Temperatures above this point leads to melting of
the resist combined with loos in shape. The pattern to be transfered into the substrate becomes
larger than designed on the original photomask. Furthermore, the resist may be burned and
therefore it is impossible to remove it with conventional dissolvents or in an oxygen plasma
dependent on the degree of combustion. In Figure 5.5 still some residues of the photoresist
are on the structure and therefore further processing is not wise. To avoid this problem an
automated chopping technique is induced consisting of etch steps and cooling steps with pure
He backside cooling.
5.3.1 Plasma Etching of Pt and BST
Dry etching of Pt and BST can be performed in chlorine (Cl
2
), CF
4
or Ar containing plas-
mas [152158].
Pt layers are structured using a pure Ar plama, which is generated by the ECR source (parame-
5.3 Surface Micromachining 53
TABLE 5.7: Parameter for Pt and BST etch process
Pressure ECR RF Bias Gas Etch Selectivity
power power voltage ow rate to resist
[bar] [W] [W] [V] [sccm] [nm/min]
Pt 5.5 600 50 110 35 Ar 9.4 0.3
BST 5.5 600 50 110 35 Ar 4.5 0.15
ters are given in Table 5.7), whereby the milling is due to the physical impact of the ions. A
relatively low RF-power is chosen in order to keep the temperature low, concerning the tem-
perature budget of the masking photoresist. The process exhibit an etch rate of 9.4 nm/min.
Calculating the total etch time from this etch rate enables to stop the etching precisely on the
underlying layer. The etch rate of the resist is around 30 nm/min, which is noncritical since the
resist is at least 1.4 m thick.
The etching of BST thin lms is performed with the same process and exhibits an etch rate of
4.5 nm/min.
5.3.2 Plasma Etching of PZT
For plasma etching of PZT various gas combinations are applied, such as
Cl
2
, CCl
4
, C
2
F
6
, HBr, CF
4
, CF
2
Cl
2
, SF
6
[159162]. Alternative processes uses CF
4
in
combination with Ar [163, 164]. Thereby the Ar
+
ions break the metal-oxide bonds releasing
Pb, Zr and Ti into the crystal. XPS measurements reveal that the metals then form volatile
halide compounds [165167].
Experiments using CF
4
and Ar turn out the parameters given in Table 5.8 are the best in terms
of etch rate and selectivity to Pt. Higher etch rates can easily be obtained by increasing the
power, but this induces high wafer temperatures, which exceed the temperature budget of the
photoresist. The etch rate of Pt is 4.2 nm/min and the etch rate of photoresist is in the range
of 148 nm/min to 210 nm/min, depending on the photoresist. Therefore a resit thickness of
5.4 m is sufcient to transfer the lithography mask into a 255 nm PZT layer.
Reduction of spontaneous polarization, induced during thin lm etching due to pinning of do-
mains and remaining of metal halides on the surface [168170] is curred by heating the lm
above the crystallization temperature.
54 5 Technology
TABLE 5.8: Parameter for PZT etch process
Pressure ECR RF Bias Gas Etch Selectivity Selectivity
power power voltage ow rate to Pt to Resist
[bar] [W] [W] [V] [sccm] [nm/min]
PZT 3.5 800 50 197 12 Ar 7 1.6 0.06
38 CF
4
5.3.3 Plasma Etching of SiO
2
and Si
3
N
4
SiO
2
and Si
3
N
4
are two key materials in modern MEMS fabrication. Since these materials are
modications from Si and utilized in conventional CMOS technology it is just a small step, to
employ them in MEMS fabrication. Nevertheless, the electrical and mechanical properties vary
from those of Si and therefore these materials are used as dielectric layer, as mechanical support
layer or as encapsulation layers. Furthermore, the chemical properties are different from those
of Si and SiO
2
and Si
3
N
4
are widely used as hard mask requiring highly selective etching over
Si [171, 172].
Because uorine atoms etch Si faster than SiO
2
, it is difcult to achieve etch selectivity of silicon
dioxide over silicon in a pure CF
4
or SF
6
discharge. An unsaturated, polymer forming gas feed
is usually employed to pattern oxide on silicon layers, while an unsaturated halocarbon gas (e.g.
CHF
3
) discharge results in the formation of a uorocarbon layer on exposed silicon during
oxide etching. Since there is no available reaction with silicon that can gasify the polymer
lm, a fairly thick layer ( 15 nm) accumulates on the silicon surface and prevents chemical
etching [173]. Here, fast selective etching of SiO
2
over Si is desired and therefore a low RF-
power process with 50 % CHF
3
and 50 % CF
4
is applied (Table 5.9).
Si
3
N
4
is etched by both uorine-atom-containing plasma and CF
4
unsaturated gas plasma and
shows etching characteristics intermediate between those of silicon and SiO
2
[174]. Since Si
3
N
4
TABLE 5.9: Parameters for SiO
2
and Si
3
N
4
etch processes
Pressure ECR RF Bias Gas Etch Selectivity
power power voltage ow rate to resist
[bar] [W] [W] [V] [sccm] [nm/min]
SiO
2
10 1000 30 180 30 CHF
3
38 0.4
30 CF
4
Si
3
N
4
7 1200 40 177 30 CF
4
30
5.3 Surface Micromachining 55
is widely used as hard mask for silicon bulk micromachining (e.g. wet etching using TMAH) a
formation of a protecting layer on top of the silicon has to be avoided and therefore pure CF
4
is
used at low RF-power to maintain a smooth silicon surface (Table 5.9).
5.3.4 Anisotropic Silicon Etching
For on-chip integration, the sensing or actuated elements are typically dened after circuit fab-
rication. This has benets in permitting the use of standard technology and also in minimizing
the wafer processing after the fabrication of the microsystems. For the processing of anisotropic
structures several approaches are used to inhibit lateral etching during the process and thereby
maximize the aspect ratio. The most successful techniques are all based on sidewall passivation
and a wide range of chemistries, mostly uorine based are known [175180].
This technique can be understood by considering a model of a SF
6
/O
2
dry etching process.
Within the plasma, free radicals of S
x
F
y
and

O are created:
SF
6
+ e

S
x
F
y
+
+ S
x

F
y
+

F + 2e

(5.5)
O
2
+ e

O
+
+

O + 2e

(5.6)
The free oxygen radicals react with the silicon on the surface and create a passivation layer in
form of an oxide lm:

O + Si
(s)
SiO
n(sf)
(5.7)
where (s) and (sf) indicate surface and surface lm respectively. The surface passivation layer
is then removed by the plasma prior to the etching of the Si with uorine:
SiO
n(sf)
+

F SiO
n(sf)
F (5.8)
SiO
n(sf)
nF ion energy SiF
x(ads)
+ SiO
x
F
y(ads)
(5.9)
where the uorine adsorbs (F
ads
) onto the surface and the ion bombardment plays the critical
role in the removal of the passivation lm by enhancing the adsorption, reaction and desorption.
Now, the uorine can proceed with silicon etching and desorption as a gas (g):
Si +

F Si nF (5.10)
Si nF ion energy SiF
x(ads)
(5.11)
Si nF SiF
x(g)
(5.12)
56 5 Technology
TABLE 5.10: Parameters for anisotropic Si etch processes
Pressure ECR RF Bias Gas Etch Selectivity
power power voltage ow rate to resist
[bar] [W] [W] [V] [sccm] [nm/min]
Si 10 1000 30 170 100 SF
6
614 6.1
10 O
2
The addition of 10 % O
2
in a SF
6
plasma is suggested to promote the forming of vertical
trenches with high etch rates, due to sidewall pasivation [181]. Experiments turn out the process
parameters given in Table 5.10 are a good compromise between etch rate and anisotropy.
Figure 5.7 shows the cross section of a sample etched by this process. A smooth surface and
a silicon etch rate of 614 nm/min are observed. The aspect ratio amounts to 1.5, whereby the
masking material is Pt with photoresist on top. The photoresit is not burned and exhibits an
etch rate of 100 nm/min. This process enables deep silicon etching and is applied to etch deep
cavities or creating membranes.
5.3.5 Isotropic Silicon Etching
Front side micromachining can also be applied to produce membranes or to release cantilevers
from the silicon substrate. It is achieved by means of lateral, nearly isotropic dry etching of
the silicon. Figure 5.8 gives a schematic overview. First, a oxide or nitride layer is deposited
on the silicon, which later serves as substrate (Figure 5.8 (a)). Photoresist is patterned onto
the substrate to dene an etch window before the oxide layer is removed by dry etching (Fig-
ure 5.8 (b)). In the last step, the cantilever is released by isotropic dry etching of the silicon
Si
Resist Pt
FIGURE 5.7:
Cross section of anisotropic etched
silicon with process parameters
given in Table 5.10.
5.3 Surface Micromachining 57
Silicon Substrate
Silicon Substrate
Resist
Silicon Substrate
Resist
Silicon oxide or nitride film
(a)
(b)
(c)
FIGURE 5.8:
Schematics of the process ow for
the fabrication of suspended sili-
con oxide and nitride membranes:
(a) deposition of the oxide/nitride
lm (b) deposition of photoresist (c)
isotropic dry etching of silicon sub-
strate to provide release of the struc-
ture.
under the structure (Figure 5.8 (c)). Therefore, the process has to be optimized with respect to
the lateral etch rate, the selectivity to the photoresist on the front side and SiO
2
membrane.
Isotropic silicon etching is reported using xenon diuoride (XeF
2
) gas [182] or SF
6
based
plasma etching [183], whereby isotropic etch proles are achieved with high pressures and
chemical dry etching (> 53 bar) [184]. Due to some technical features of the dry etching
system microwave generated plasmas are avoided in this pressure range. Hence, the following
(a)
20 40 60 80 100
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
E
t
c
h

r
a
t
e

[
n
m
/
m
i
n
]
Pressure [bar]
vertical
horizontal
A
s
p
e
c
t

r
a
t
i
o
(b)
SiO
2
Si
FIGURE 5.9:
(a) Etch rate and aspect ratio vs. pressure (Bias voltage adjusted to 60 V, 100 sccm SF
6
)(b)
Cross section of an isotropic etched silicon substrate at 100 bar.
58 5 Technology
(a)
Pt
SiO
2
Si
(b)
Pt
Si
SiO
2
FIGURE 5.10:
Pt surface and SiO
2
cross section of a sample etched at (a) 100 bar (bias voltage 60 V)
and (b) 120 bar (bias voltage 85 V).
experiments are conducted using the RF-mode.
The rst result presented here, concentrates on the etch rate and the aspect ratio depending on
the pressure. At low pressures (20 bar) the vertical etch rate is around 300 nm/min and the
horizontal etch rate 80 nm/min, which gives an aspect ratio of 3.5 and therefore an anisotropic
behavior (Figure 5.9 (a)). The vertical etch rate increases nearly by a factor of four, if the
pressure is at 100 bar. In the same way the lateral etch rate is enhanced, but the increase is
not so strong, resulting in a lowered aspect ratio of 1.5. Figure 5.9 (b) shows a cross section
of an under-etched SiO
2
membrane with a round prole and a silicon surface of good quality.
The SiO
2
layer is usually covered by a stack of Pt/ferroelectric lm/Pt. Long term etching is
neccessary to achieve the required undercuts up to 50 m. Therefore, the experiment is repeated
with a Pt electrode on the SiO
2
to investigate the resistance of Pt to the etch parameter. In
Figure 5.10 (a) one can see the result: No etching of the Pt layer is visible. This is conrmed by
experiments with etch times of several hours. Hence, the selectivity is very high and satisfactory
for device fabrication. Beyond, the initial thickness of the SiO
2
layer is 450 nm and remains
TABLE 5.11: Parameter for isotropic Si etch processes
Pressure ECR RF Bias Gas Etch Selectivity Selectivity
power power voltage ow rate to Pt to resist
[bar] [W] [W] [V] [sccm] [nm/min]
Si 100 - 110 60 50 SF
6
580 10
5.4 HF-Vapor Etching 59
after the process. For some reason, the vertical etch rate is reduced to 580 nm/min. To make
the process faster, the pressure and the RF power are slightly increased. A sample can be seen
in Figure 5.10 (b). Indeed, the etch rate increases but the Pt surface has become very rough
indicating physical impact. For this reason the process working at 100 bar is found to be the
optimum. All parameters are summarized in Table 5.11.
5.4 HF-Vapor Etching
Additional to isotropic silicon surface micromachining and anisotropic silicon bulk microma-
chining a technique is developed to release free standing structures, which is based on a SiO
2
sacricial layer.
SiO
2
is a well known material for sacricial etching [136, 139, 185]. Common methods use
hydrouoric acid (HF) to remove the SiO
2
under the structure, but surface tension while drying
often causes permanent sticking of the microstructures.
Plasma etching can overcome this drawback, but another problem is observed. The lateral size
of a typical cantilever is in the range of hundreds of micrometers, but the sacricial SiO
2
is less
than 1 m thick. Due to shielding effects, the plasma etch technique is not suitable to remove
the SiO
2
from such a small horizontal slit.
Si
SiO
2
gaseous: HF + H O
2
(a)
gaseous: HF + H O
2
(b)
~~~~~~~~~~~~~~~~~~~~~~~~~
liquid: H O + HF
2
Si
SiO
2
gaseous: HF + H O
2
(c)
~~~~~~~~~~~~~~~~~~~~~~~~~
liquid: H O + HF + H SiF
2
Si
SiO
2
SiF
4
(d)
2 6
gaseous: HF + H O
~~~~~~~~~~~~~~~~~~~~~~~~~
liquid: H O + HF + H SiF
2
Si
SiF
4
2 6
2
FIGURE 5.11:
Chemical reaction of HF in vapor phase with SiO
2
.
60 5 Technology
The use of HF in the vapor phase has the potential to yield high etch rates, high lateral un-
deretching, a very good selectivity between Si and SiO
2
, and avoids stiction if properly ap-
plied [186, 187].
Etching in HF vapor phase follows the same chemical reactions than etching in the liquid phase:
SiO
2
+ 4HF SiF
4
+ 2H
2
O (5.13)
or
SiO
2
+ 6HF H
2
SiF
6
+ 2H
2
O (5.14)
A schematic of this process is shown in Figure 5.11. Initially, a SiO
2
surface is exposed to a
vapor phase mixture of H
2
O and HF (Figure 5.11 (a)). If the partial pressures are sufcient
then a condensed lm of HF and H
2
O will form and continue to grow on the SiO
2
surface
(Figure 5.11 (b)). Etching proceeds with the formation of H
2
SiF
6
and additional water (Fig-
ure 5.11 (c)). Although the partial pressure of SiF
4
over diluted H
2
SiF
6
: HF : H
2
O solutions
is relatively low, some SiF
4
is formed during the etching process. When the etching is complete
and the HF and H
2
O reactants are switched off, the liquid H
2
SiF
6
: HF : H
2
O lm can be
evaporated and a released structure remains (Figure 5.11 (d)).
The experiments are performed with silicon-on-insulator substrates (SOI). The wafer consists
of a 625 m thick handle silicon layer, a 1 m thick buried oxide layer (BOX) and a 3 m
thick device silicon layer. The device silicon, which later serves as substrate, is structured down
(a)
1 m
SiO
2
3 m
Device - Si
Si
Si
(b)
IR-heater
~~~~~~~~~~~~~~
~
~
~
~
~
~
~
~
~
~
~
~
set
act.
40% HF (l)
~~~~~~~~ ~~~~~~~~
ultrasonic water quench
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
HF/H O (g)
2
sample
EuroTherm
temperature
controller
thermo couple
temperature
measurement
FIGURE 5.12:
(a) Sample for HF vapor experiments. (b) Schematic drawing of the experimental setup for
HF vapor etching.
5.4 HF-Vapor Etching 61
thermo couple
hotplate
temperature
controller
ultrasonic
water quench
IR-heater
box with
liquid HF
and sample
FIGURE 5.13:
Picture of the experimental
setup for HF vapor etching.
to the BOX, which is therefore exposed to the HF-vapor (Figure 5.12(a)). The experimental
setup is shown in Figure 5.12(b). A box lled with HF (concentration of 40 %) is placed into
a temperature controlled ultrasonic waterbath while the sample is mounted into a teon holder
upside down approximately 5 cm over the HF. The temperature of the sample is independently
controlled by a thermocouple, a control unit (EuroTherm) and an infrared radiator. Infrared
heating is chosen for safety reasons because the container has to be closed so that thermal
radiation avoids additional cable feedthroughs. Figure 5.13 shows a picture of the experimental
setup. The samples are placed on a hotplate after HF treatment to volatilize the remaining water
and HF on the sample.
Since a chemical reaction without plasma assistance is responsible for removing the SiO
2
, no
shielding effects limit the underetching. Nevertheless, attention has to be paid to adhesion
issues because liquid H
2
O and HF are formed during etching in the horizontal slit and leads to
stiction. Therefore, an equilibrium state between the necessary amount of water at the surface
for the reaction and avoidance of a liquid lm between the device silicon and the silicon handle
layer needs to be established. Heating the water bath in a range between room temperature and
50 C and therefore heating the HF controls the density of the HF vapor in the chamber. Thus,
the HF is transported to the SiO
2
and forms volatile products. Thereby heating of the sample
establishes the equilibrium state and prevents adhesion due to the formation of a liquid lm.
Figure 5.14 (a) shows the cross section of a sacricial etch process. One can clearly distinguish
62 5 Technology
(a)
device Si
handle Si
SiO
2
(b)
device Si
handle Si
SiO
2
FIGURE 5.14:
(a) SEM picture of an under etched structure. (b) Magnication of the buried SiO
2
layer.
between the handle Si, the device Si and the BOX layer. The device layer is structured with
an isotropic dry etching process before etcing in HF vapor for two hours, which results in an
undercut of 39 m. Figure 5.14 (a) shows the magnication of the etch border. There are no
residues on the Si surface and no damage of the silicon is visible resulting in a very good surface
quality.
The achievable lateral etch rate is in the range between 4 and 12 m/h, if the temperature
of the liquid HF is 50 C and the sample temperature varies from 65 to 80 C (square dots
in Figure 5.15). A decrease of the etch rate is observed for higher temperatures, because the
reaction speed is reduced due to a reduction of liquid HF and water in the slit. On the other
hand, experiments below 65 C often exhibit stiction problems due to the generation of to much
65 70 75 80
0
5
10
15
20
25
30
H
o
r
i
z
o
n
t
a
l

e
t
c
h

r
a
t
e

[

m
/
h
]
Sample temperature [C]
HF 50 C
HF 50 C + ultra sonic assisted
FIGURE 5.15:
Etch rate vs. sample temperature
(square dots: without ultra sonic as-
sistance; round dots: with ultrasonic
assistance).
5.5 Stress Compensation 63
liquid H
2
O and HF within the sacricial slit. However, vapor generation assisted by ultra sonic
excitation results in a higher vapor density and the etch rate is doubled at the same sample
temperature (round dots in Figure 5.15). The maximum lateral etch rate is 20 m/h resulting
in a very good surface quality, qualifying this technique to release movable structures from the
substrate.
5.5 Stress Compensation
While the deposition of thin lms on top of a substrate mechanical stress is induced into the sys-
tem. This is a serious problem in the processing of MEMS, since it leads to an initial deection
of fragile, freestanding structures like membranes and cantilevers. Thereby tensile stress leads
to a concave deection and compressive stress results in a convex deection of membranes.
Stress arises from different sources. Intrinsic stress T
int
depends on parameters like layer thick-
ness or the microstructure. Extrinsic stress T
ext
occurs during the processing e.g. the lattice
parameters of PZT changes with the temperature and therefore stress is induced during the
crystallization process. The third part is determined by different thermal expansion coefcients
and is call thermal stress T
therm
[23]. However, since the entire stress denes the deection of
the structures a detailed investigation has been undertaken to determine the stress and achieve
an appropriate stress compensation.
Stress compensation is achieved by the nal deposition of a material, which induces opposite
stress to balance the overall stress in the system. Low stress LPCVD-Si
3
N
4
can be used for this
task. Alternative SiO
2
also works for stress compensation and since it mostly severs as device
substrate it is part of the device anyway and one process step is saved.
0 30 60 90 120 150 180 210 240
0
100
200
300
400
500
600
700
800
900
1000
Oxidation time [min]
O
x
i
d
e

t
h
i
c
k
n
e
s
s

[
n
m
]
FIGURE 5.16:
SiO
2
thickness vs. oxidation time.
Oxidation is undertaken in O
2
/H
2
atmosphere at 1050 C.
64 5 Technology
Because the internal stress depends on the layer thickness [188], investigations are performed
with different oxide thicknesses. SiO
2
is deposited on Si in a oxygen and hydrogen containing
atmosphere at 1050 C (wet oxidizing). Figure 5.16 gives the correlation between oxidation
time and SiO
2
thickness. The Si reacts very fast with the oxygen at the beginning and a high
deposition rate is observed. The reaction slows down with increasing oxidation time and even-
tually a point of saturation is reached after 180 minutes resulting in a layer thickness of 980 nm.
A widely used method to determine stress within thin lms is to measure the induced curvature
of the substrate before and after lm deposition [189]. The stress is then calculated with the aid
of the Stoney formula [190, 191]
T
film
=
E
Si
t
2
Si
6 (1
Si
) t
film
(
1
r

1
r
0
) (5.15)
where
film
is the stress of the thin lm, E
Si
is the Youngs modulus of the silicon substrate,

Si
the Poissons ratio of the silicon substrate, h
Si
the thickness of the wafer, h
film
the thickness
of the thin lm, r
0
denotes the initial substrate radius before lm deposition and r is the radius
after lm deposition, respectively.
Measurements of the substrate bow are undertaken with a DEKTAK surface prolometer on
various combinations of PZT lm thickness and SiO
2
thickness. Figure 5.17 and Figure 5.18
presents measurements taken on two different systems performed on one inch substrates. In Fig-
ure 5.17 the rst measurement is performed after the deposition of 75 nm SiO
2
. The curvature
becomes a slight convex shape, which indicates that the deposition of SiO
2
induces compressive
stress. The next measurement is undertaken after the deposition of the 110 nm thin platinum
bottom electrode with the TiO
2
adhesion layer. The curvature of the substrate has strongly
changed from convex to concave and therefore high tensile stress is induced by the deposition
of Pt. Next, six coatings PZT (255 nm) are deposited resulting in a slight increase of the tensile
-12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12
-1200
-1000
-800
-600
-400
-200
0
200
75 nm SiO
2
110 nm Pt/TiO
2
255 nm PZT
100 nm Pt

D
e
f
l
e
c
t
i
o
n

[
n
m
]
Probe position [mm]
FIGURE 5.17:
Curvature of the wafer af-
ter different process steps:
75 nm SiO
2
, 125 nm PZT
and 100 nm top and bottom
Pt.
5.5 Stress Compensation 65
-12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12
-200
0
200
400
600
800
1000
1200
1400
780 nm SiO
2
110 nm Pt/TiO
2
125 nm PZT
100 nm Pt

D
e
f
l
e
c
t
i
o
n

[
n
m
]
Probe position [mm]
FIGURE 5.18:
Curvature of the wafer af-
ter different process steps:
780 nm SiO
2
, 255 nm PZT
and 100 nm top and bottom
Pt.
stress. It seems that the deposition of PZT on Pt do not affect the system very strong. The nal
measurement, after Pt top electrode sputtering reveal again a strong increase of the concave
deection to a maximum of 1150 nm.
The next system presented in Figure 5.18 takes into account that 75 nm SiO
2
do not induce suf-
cient compressive stress to balance the strong tensile stress mainly induced by the Pt layers.
Therefore the system is build up on a 780 nm SiO
2
lm turning out a maximum convex deec-
tion of 1.3 m, which equals a compressive stress of 342 MPa, if E
Si
is assumed to 131GPa,
Si
= 0,23 [136] and h
Si
= 675 m. Sputtering of the bottom electrode results in a attening of the
wafer deection, which means that the tensile stress induced by the Pt reduces the compressive
stress of the SiO
2
. To calculate the stress in the entire systemh
film
is formed by the addition of
the thickness of SiO
2
and Pt. The overall stress is reduced to 164 MPa. Since PZT has only a
minor contribution to the stress this sample is processed with a 125 nm lm reducing the overall
stress to 123 MPa. After the nal deposition of the top electrode the deection measurement
turns out a almost at prole and the calculation reveal a remaining stress of 0.6 MPa. In other
words, wet oxidized SiO
2
with a thickness of 780 nm is suitable to compensate tensile stress,
which is induced during the fabrication mainly by the deposition of Pt.
66 5 Technology
5.6 Electroplating of Freestanding Copper Contacts
The next process contributes the aim of the fabrication of integrated micro switches for mi-
crowave applications. In order to keep the ohmic losses low and therefore the microwave losses
small, the signal circuits and contacts needs to be fabricated from a very good conducting ma-
terial with a thickness in micrometer range to avoide the skin effect. Hence, copper is a good
choice, since it posses a high electric conductance ( = 56 m
1
mm
2
) and can be electro-
plated with high deposition rates and a large thickness at low costs compared to other deposition
methods e.g. evaporation. Additionally, thick copper ensures mechanical stability, which is nec-
essary since the contacts are freestanding.
The fabrication process of such high frequency contacts is described in Figure 5.19. First, pho-
toresist is spread over the substrate and patterned dening the overlap of the contacts (Fig-
ure 5.19 (a)). Thereby a postbake is important to round the edges of the resist, so that a
(a)
Substrate
Resist
Substrate
Resist
Copper platingbase
(b) Resist
(c) electoplated
copper
(d)
(e) (f)
Substrate
Resist
Substrate
Resist
Substrate
Resist
Substrate
FIGURE 5.19:
Fabrication scheme of freestanding copper contacts by electroplating.
5.6 Electroplating of Freestanding Copper Contacts 67
thin copper layer (100 nm), working as plating base and deposited by evaporation, covers the
whole wafer without intersection. A second photoresist is patterned on the plating base (Fig-
ure 5.19 (b)). Within the next step, copper is grown inside the photoresist trenches by electro-
plating in a bath of coppersulphatepentahydrate (CuSO
4
5H
2
O), sulfuric acid (H
2
SO
4
) and
deionized water (Figure 5.19 (c)). The growth rate depends on the current density and is around
38 nm/min, if the current density is 2 mA/cm
2
. Low deposition rates support the growth of
stress free Cu with a good surface quality. After electroplating several micrometer of copper
the photoresist is removed using acetone (Figure 5.19 (d)). The contacts are still shorted by the
connecting platingbase and for removing it, the whole sample is exposed to an inert Ar plasma.
Thereby, the electroplated copper is also affected, but since the contacts are several micrometer
thick and only 100 nm needs to be removed this is an allowable process step (Figure 5.19 (e)).
In the nal step, the photoresist underneath the electroplated copper needs to be removed.
Photoresist can be removed in oxygen and uorine containing plasmas [192]. Therefore a
process with CF
4
and O
2
is developed (Table 5.12). To yield an acceptable lateral etch rate
for removing the photoresist under the bridge a pressure of 400 bar is established. The low
copper
contact
underlying
metal
silicon
silicon
FIGURE 5.20:
Picture of electroplated copper contact on Pt base. The magnications depict the end of
the freestanding contact and the transmission from base to freestanding part respectively.
68 5 Technology
TABLE 5.12: Parameters for isotropic photoresist etch processes
Pressure ECR RF Bias Gas Etch
power power voltage ow rate
[bar] [W] [W] [V] [sccm] [nm/min]
Photoresist 400 - 15 25 60 O
2
12 - 25
30 CF
4
bias voltage prevents physical sputtering so that the underlying and surounding layer are not
affected when the resist is completely removed (Figure 5.19 (f)).
Figure 5.20 shows SEM pictures of an electroplated copper contact. The upper picture shows
the whole contact with the copper base attacht to a metalization on the silicon substrate (right
side) and the overhanging end (left side). Thereby the contact overlap a metallization on the
silicon. The magnication to the left side enlarges the end of the freestanding part. Clearly
to see is the separation between contact and metalization. The right magnication shows the
transition from the copper base to the overhanging part. One can see the rounded shape, due to
the rounded sacricial photoresist.
69
6 Piezoelectric Cantilever Structures on Silicon Substrates
P
iezoelectric cantilevers are composed of a sandwich structure with a piezoelectric layer
between two electrodes on top of a substrate (Figure 6.1). An electric eld applied to the
electrodes leads to an enlargement of the lm in direction of the electric eld and a contraction
perpendicular to the applied eld due to the converse piezoelectric effect. The enlargement par-
allel to the electric eld is neglected since the lm thickness is in the range of nanometers and
therefore the displacement is in the range of picometers. Here, more interesting is the piezo-
electric effect in horizontal direction. Indeed d
31
is only around half of d
33
, but the effect works
in lateral direction along the cantilever dimensions and therefore the contraction is applied to
an large area in the range of several hundred micrometers, which induces bending in the system
since the piezoelectric lm is clamped on top of the substrate. Therefore, the direction of the
movement is controlled by the sequence of substrate and actuated layer, and is upwards, if the
substrate is beneath the piezoelectric lm.
6.1 Cantilevers Fabricated by Silicon Bulk Micromachining
This subsection reports on the development and processing of cantilevers as movable part in
integrated micro-relays. Basically the idea consists of a separation of the piezoelectric activation
and the signal circuit. A schematic drawing is shown in Figure 6.2 indicating the piezoelectric
thin lm between two Pt electrodes on a Si/SiO
2
substrate, the signal contact formed by a
metalization at the end of the beam and two overlapping contacts on the surrounding substrate.
su
b
s
tra
te
piezo
e
le
c
tr
ic

la
y
e
r
d
31
d
33
P
electrodes
+
FIGURE 6.1:
Working principle of piezoelectric cantilever due to clamping on the substrate.
70 6 Piezoelectric Cantilever Structures on Silicon Substrates
Pt electrodes
PZT
SiO
2
Si
m
e
ta
l
signal
contact
FIGURE 6.2:
Concept of an integrated piezoelectric driven micro switch with separation of actuation and
signal line fabricated using silicon bulk micromachining.
The cantilever is released from the silicon substrate by a cavity etched from the back side. One
main advantage of this concept is the separation between the switch actuation and the signal
circuit which promise good contact properties, the prevention of crosstalk due to the electrically
isolation and offers the possibility for the use in RF-circuits since thick and highly conductive
metals like copper and gold can be used for the signal contact.
The process ow is illustrated in Figure 6.3 and is based on the technologies described in chap-
ter 5. The fabrication starts with the wet oxidation of a (100) oriented silicon wafer on front and
back side, followed by the deposition of 10 nm TiO
2
as adhesion layer and 100 nm Pt on top
(Figure 6.3 (a)). The SiO
2
on the backside is structured with a photoresist mask and ammonium
uoride etching mixture. The 880 nm thick SiO
2
layer will act as hard mask for the next step.
Here, the main part of the silicon is etched with 20 % TMAH. Usually this is the last step in
cantilever processing, whereas the SiO
2
at the front side works as etch stop. It has proved that
this is a very sensitive step, since TMAH attacks also PZT and therefore a sample protection
mount is needed. This is very delicate, since leakage of the mount or cracking of the remaining
membrane due to internal or external stress damage the front side. Most important during this
step is a remaining membrane thickness of around 100 m (Figure 6.3 (b)). This ensures the
mechanical stability for the ongoing processing, e.g. clamping on the vacuum chuck to spread
6.1 Cantilevers Fabricated by Silicon Bulk Micromachining 71
Pt/TiO
2
(a)
(b)
Si
Si
(c)
Si
(d)
Si
(e)
Si
(f)
Si
SiO
2
PZT
FIGURE 6.3:
Schematic drawing of the process ow of a cantilever beam using silicon bulk microma-
chining and silicon surface micromachining (cross section).
photoresist over the wafer. Next, the top side is coated with 255 nm PZT by CSD. Double side
lithography is used to align the Pt top contacts to the cavities on the backside whereby the Pt
is structured by lift-off (Figure 6.3 (c)). The PZT lm is protected by a photoresist mask and
then patterned by dry etching. Due to the etch selectivity between PZT and resist during this
process the mask has to be at least 4.3 m thick (Figure 6.3 (d)). Figure 6.3 (e) claries the
rst part of the release step. After etching the platinum layer around the structure and removing
of the surrounding silicon dioxide, a trench is etched 5.6 m deep into the silicon. A second
silicon etch step is applied from the backside of the wafer to release the structure, by etching
the remaining membrane until the cavity from the backside reaches the trench at the front side
(Figure 6.3 (f)). If a high frequency suitable metal is needed at the perpendicular tip, it can be
deposited with one additional mask and process step after Pt top electrode structuring.
This method is very exible for the fabrication of devices with different substrate thicknesses,
since the thickness is determined by the etch process and no further deposition step or additional
lithography mask is needed. Furthermore, cantilevers basing on SiO
2
substrates are limited to
a substrate thickness of a few micrometers due to the limit of wet oxidation (compare Fig-
72 6 Piezoelectric Cantilever Structures on Silicon Substrates
silicon window
base for
relay-contacts
1
5
0
50
FIGURE 6.4:
Picture of a 478 m long
and 50 m wide released
cantilever.
ure 5.16). The fact is important, because the substrate affects strongly the cantilever properties.
Figure 6.4 shows a picture of a 475 m long cantilever with a breadth of 50 m. The
piezoelectric part is 350 m long and the remaining 125 m are consumed by the metalization
for the signal contact and the gap between the two electrodes. The dark area around the
structure is the shadow of the silicon window and the two structures on both sides are the bases
for the overlapping contacts. Internal stress is successfully avoided with this concept.
Quasi-static results
The cantilever performance is tested using a laser vibrometer (POLYTEC OFV 3001 vibrom-
eter controller, POLYTEC OFV 512 ber interferometer) in combination with a function
generator (HP3314A) and a digital oscilloscope (TDS684).
Figure 6.5 (a) depicts a displacement measurement of a cantilever with a length of 450 m.
The curves have the typical symmetric shape, when using a ferroelectric material. Either with
positive or negative applied voltages the deection is positive, due to the change of the poling
direction. The measurement is taken with 10 V (10 Hz) and reveals a maximum deection
of 5 m. Figure 6.5 (b) shows the displacement results of three cantilevers with a length
of 300 m and widths of 50 m, 100 m and 200 m, respectively. The measured curves
are identical and the measurements exhibit a deection of 2.5 m. Therefore the deection
depends strongly on the beam length, but is totally independent on the beam width.
The measurements are supported by FEM simulations using the program ANSYS (material pa-
rameters are given in Table 6.13). The cantilever geometry is reduced to a two dimensional
6.1 Cantilevers Fabricated by Silicon Bulk Micromachining 73
(a)
-10 -8 -6 -4 -2 0 2 4 6 8 10
0
1
2
3
4
5
D
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a
c
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m
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t

[

m
]
Voltage [V]
(b)
-10 -8 -6 -4 -2 0 2 4 6 8 10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
width 200 m
width 100 m
width 50 m
D
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[

m
]
Voltage [V]
FIGURE 6.5:
(a) Displacement measurement of a cantilever (overall length 450 m, width 200 m,
active PZT length 325 m). (b) Displacement measurements of 300 m long cantilevers
with different width (10 Hz).
model, because the structure width has no impact on the result. However the length of the
piezoelectric inactive, perpendicular contact at the cantilever end needs to be taken into ac-
count. Therefore, the material density of those elements is triplicated. Furthermore, the model
is simplied by merging the silicon dioxide layer and the silicon layer to one layer and the
simulations take into account that the measurements are performed in the middle of the signal
contact. Figure 6.6 compares computed displacements with measured deections and shows
that the calculations matches the measurements very well. The simulated displacements and
the measured deections are almost identical for a 350 m and a 450 m long structure, which
are supported by 6.5 m substrate. Simulations for different beam length show a continuous
increase of the deection with increasing length. Furthermore, the impact of the substrate thick-
ness is investigated and shows that thicker substrates leads to a decrease of the deection. At the
TABLE 6.13: Material parameter used for FEM simulations [24, 74, 90, 193].
E e
31
e
33
e
15
[g/cm
3
] [GPa] [C/m
2
] [C/m
2
] [C/m
2
]
Si 2.33 131 0.23 - - -
SiO
2
2.33 131 0.28 - - -
Pt 21.45 173 0.39 - - -
PZT 7.5 95 0.3 -3.6 13.3 13.2
74 6 Piezoelectric Cantilever Structures on Silicon Substrates
300 350 400 450 500 550 600
0
5
10
15
20
25
30
35
40
45
2 m
9 m
6.5m D
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m
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[

m
]
Length [m]
FEM simulation
measurement
FIGURE 6.6:
Comparison of FEM simulations
with displacement measurements
for different cantilever length by
variation of the substrate thickness
(10 V, 100 nm Pt, 255 nm PZT).
other hand, 2 m thin substrates and a beam length of 550 m leads to a deection of 40 m.
Dynamic results
The dynamic properties of the cantilevers are investigated. Figure 6.7 (a) shows the displace-
ment as a function of the frequency of the applied eld. The measurements are taken from a
350 m long structure with a unipolar voltage between 0 V and 1 V. Each rounded symbol
depicts the maximum value of a complete displacement measurement at the certain frequency.
Since the applied voltage is only 1 V, the deection is small, nevertheless at 46.3 kHz a large
resonance peak occurs. It becomes so huge that the measurement setup reach its limit and
therefore it is not possible to get the correct displacement value. However, a measurement error
can be excluded, because in resonance the shape of the displacement becomes elliptic due to the
phase shift of /2. Thereby, the longer axis of the ellipse is in vertical position. In Figure 6.7 (b)
one can see a measurement at 45.2 kHz, just below resonance. The curve has already the shape
of an ellipse with its longer axis from bottom left to top right, which means that the phase shift
is smaller than /2. A measurement taken slightly above resonance (Figure 6.7 (c)) shows an
ellipse with the longer axis from bottom right to top left, corresponding to a phase shift larger
than /2. Furthermore, in Figure 6.7 (a) one can obtain a second peak, which appears at half of
the resonance frequency at 23.1 kHz.
These results are conrmed by FEM simulations of the eigenfrequencies (Figure 6.7 (d)). The
resonance frequencies increase steadily if the structures become shorter. A maximumfrequency
of 65.8 kHz can be found for the 300 m long cantilever and is going down to 20.6 kHz for
the 550 m long structure, if a substrate thickness of 6.5 m is simulated. Higher resonance
frequencies can be reached, if the substrate thickness is changed, e.g. a 300 m long cantilever
with a substrate thickness of 9 m has an eigenfrequency of around 100 kHz.
6.1 Cantilevers Fabricated by Silicon Bulk Micromachining 75
(a)
20 25 30 35 40 45 50 55
0
2
4
6
8
10

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m
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[

m
]
Frequency [kHz]
(b)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
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[

m
]
Voltage [V]
45263 Hz
(c)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
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[

m
]
Voltage [V]
47368 Hz
(d)
300 350 400 450 500 550 600
0
10
20
30
40
50
60
70
80
90
100 9 m
6.5 m
R
e
s
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n
a
n
t

f
r
e
q
u
e
n
c
y

[
k
H
z
]
Length [m]
FEM Simulation
Measurement
2 m
FIGURE 6.7:
Various displacement measurements of a 350 m long cantilever. The measurements are
taken with unipolar voltages between 0 V and 1 V. (a) Maximum displacement vs. fre-
quency of the applied electric eld. (b) Displacement measurement just below resonance
frequency. (c) Displacement measurement just above resonance frequency. (d) FEM simu-
lations and frequency measurements vs. cantilever length depending on different substrate
thicknesses.
Mechanical results
Because of the large peak at the resonance frequency only 1 V is applied for the dynamic mea-
surements. If higher electric elds are used, the deection becomes so large that the mechanical
stress in the material, especially in the silicon, exceeds the breakage stress and causes the de-
struction of the device. Simulations reveal that a breakage stress of around 300 to 350 MPa
corresponds to a displacement of 30 m. Figure 6.8 shows a simulated stress distribution in the
area around the xed support on the silicon. The maximum stress appears at the border between
76 6 Piezoelectric Cantilever Structures on Silicon Substrates
FIGURE 6.8:
Simulated stress distribution. Mag-
nied area around the transition
from the silicon bulk to the can-
tilever (length 350 m).
the freestanding beam and the silicon wafer. Experiments prove that the cantilever is destroyed
exactly in this area, if the device operates in resonance frequency at 2 V, which corresponds to
a displacement larger than 30 m.
Contact forces calculated with FEM show that a switch contact located in a distance of 3 m
will be closed with a contact force of 31 N, if the cantilever is 450 m long and 100 m
wide. This is in the range, which is reported with electrostatic switch concepts, but the applied
voltages are signicantly reduced [40].
6.2 Cantilevers Fabricated by Silicon Surface Micromachining
The release of cantilevers by wet backside etching limits the integration density since the dis-
tance between the structures is determined by the thickness of the wafer and the etch angle
of the side wall. Structure release from the front side avoids this problem and waives on wet
chemicals, since dry etching with XeF
2
[194] or isotropic plasma etching is applied [195].
The concept is similar to the concept proposed in the section before (Figure 6.9), where a T-
structure separates the contact actuation from the contact itself. However, no large hole is etched
into the wafer instead only the part of the silicon underneath the cantilever is removed with the
silicon dioxide serving as substrate for the Pt/PZT/Pt stack.
The fabrication sequence for this cantilever is sketched in Figure 6.10. The silicon is wet ox-
idized to a thickness of 780 nm, a 100 nm Pt bottom electrode with a TiO
2
adhesion layer is
sputtered and a 255 nm PZT layer is deposited by CSD (Figure 6.10 (a)). In the next step, a
100 nm Pt top electrode is deposited and structured using lift-off technique (Figure 6.10 (b)).
Figure 6.10 (c) describes the dry etching patterning. The PZT around the top electrode is re-
moved, followed by the dry etching of the bottom electrode and the SiO
2
in a window around
6.2 Cantilevers Fabricated by Silicon Surface Micromachining 77
SiO
2
Si
electrodes
PZT
signal contact
FIGURE 6.9:
Concept of an integrated piezoelectrically driven micro relay fabricated by silicon surface
micromachining.
the cantilever. Thereby, the photoresist has to withstand both etch processes. Finally, the release
is performed, which is done by an isotropic silicon etch process (see section 5.3.5). The silicon
under the cantilever is removed from both sides (Figure 6.10 (d)) and the remaining SiO
2
serves
as substrate.
Figure 6.11 (a) shows a SEM picture which denotes the progress of underetching during the
process (this example does not include the T-structure for RF-switches). One can see four
cantilevers, 50 m in width, still supported by concave shaped silicon. During the long term
process the Pt layer is also working as a hard mask to protect the silicon fromthe top. Photoresist
cannot be successfully used since the release process takes several hours dependent on the width
of the structures. Figure 6.11 (b) shows a set of cantilevers ranging from 50 to 1000 m in
length and 50 m in width. The deection of the 1000 m cantilever is due to a lack of stress
compensation, since this structures are fabricated on a 450 nm thick SiO
2
substrate whereby the
whole stack is 900 nm thin [196].
78 6 Piezoelectric Cantilever Structures on Silicon Substrates
Si
(a) SiO
2
PZT (b) Pt
(c) (d)
FIGURE 6.10:
Schematic drawing of the process ow of a cantilever beam using isotropic dry etching
techniques.
However, the T-cantilever in Figure 6.12 (a) is supported from a 780 nm SiO
2
substrate and
therefore the stress compensation is improved. The overall length of the structure is 625 m
whereby the perpendicular contact bar is 100 m wide, 300 m long and the gap to the the
actuation part is 25 m. Therefore, an active piezoelectric length of 500 m contributes to
the actuation. Figure 6.12 (b) shows a displacement measurement, which exhibits a symmetric
behavior and a maximum deection of 22 m at 8 V. The displacement is larger than found for
(a)
Si Si support
top Pt/
PZT
bottom Pt/
SiO
2
(b)
FIGURE 6.11:
(a) Picture of cantilevers during the release process. (b) Released cantilevers with length
up to 1000 m and 50 m in width.
6.3 Cantilevers Fabricated on Silicon On Insulator Substrates 79
(a)
(b)
-10 -8 -6 -4 -2 0 2 4 6 8 10
0.0
5.0
10.0
15.0
20.0
25.0
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t

[

m
]
Voltage [V]
FIGURE 6.12:
(a) Freestanding T-cantilever with a length of 625 m and 100 mwidth. (b) Displacement
measurement.
the example in section 6.1, because here the structure is longer and the substrate is thinner.
6.3 Cantilevers Fabricated on Silicon On Insulator Substrates
Silicon on insulator (SOI) substrates consist of a silicon wafer (referred as handle silicon) with a
buried SiO
2
layer (BOX) and a second Si layer on top (referred as device silicon). Therefore the
buried SiO
2
can be used as a sacricial material. The application of SOI substrates is a recent
approach for the fabrication of MEMS. Nevertheless, some studies are undertaken [197199]
and several devices based on silicon are demonstrated e.g. optical silicon accelerometers [200],
a comb-drive actuator [201] and micromirror arrays [202].
The combination of SOI substrates with the integration of ferroelectric lms enables new fabri-
cation methods and functionalities of MEMS.
The technique is demonstrated using a classic cantilever design corresponding to Figure 6.13,
where Figure 6.13 (a) displays the top view of the nal device and Figure 6.13 (b) -(e) show
the cross view. The used SOI substrate has a 1 m thick BOX layer and a 3 m silicon device
layer, which is wet oxidized in a rst step to enable adhesion between the bottom electrode
(TiO
2
/Pt) and the silicon. Next, the deposition of 255 nm PZT and the structuring of a 100 nm
Pt top electrode by lift-off follows (Figure 6.13 (b)). Within the next steps, the PZT, the bottom
electrode and the SiO
2
layer are structured. Each of those dry etching steps require a unique
photoresist mask while over-etching into the device silicon is desired (Figure 6.13 (c)). Before
the release, the remaining silicon needs to be etched down to the BOX. Therefore, a photoresist
80 6 Piezoelectric Cantilever Structures on Silicon Substrates
(a)
(b)
(c)
(d) (e)
(b)-(e) (b)-(e)
PZT
Pt
SiO
2
device Si
handle Si
resist
FIGURE 6.13:
Cantilever processing by sacricial technique (a) top view (b)-(e) cross section.
mask is applied, which will not be removed after this step (Figure 6.13 (d)) to protect the
cantilever, while releasing the structure from the silicon handle layer by removing the BOX
layer in HF vapor (Figure 6.13 (e)).
Figure 6.14 shows the cross section through a cantilever during the release process. One
can distinguish between the handle silicon, the device silicon and the BOX in the middle of
the cantilever, which is not fully removed at this time. On top of the device silicon the Pt
electrodes, the PZT layer and the photoresist are visible. The steps, visible at the left and right
side of the device silicon are due to the over-etching into the silicon with the SiO
2
etch step
and the following trench etching down to the BOX, whereby the edges are not symmetric since
the nal mask is not properly aligned. The protection by photoresist is sometimes insufcient
because sometimes the wet oxidized silicon is removed with the HF vapor etching. In the
6.3 Cantilevers Fabricated on Silicon On Insulator Substrates 81
FIGURE 6.14:
SEM picture of a cross section dur-
ing the HF vapor release step.
magnied area (upper right corner) no SiO
2
is visible between the Pt/PZT/Pt stack and the
device silicon. It is assumed that HF ions diffuse through the resist during the long term vapor
etching, since the photoresist is not dense enough.
Cantilevers up to 400 m in width have been demonstrated with this technique (Fig-
ure 6.15 (a)) and stiction is successfully avoided. The very long structures are slightly
predeected due to small stress and a large ratio between cantilever length and thickness. Light
reections are visible in the etch window, indicating a very high surface quality in terms of
roughness. This result is supported by Figure 6.15 (b) where the bottom side of a cantilever is
presented. The silicon is not attacked at all and no residual SiO
2
is observed indicating a very
high selectivity between Si and SiO
2
.
(a)
(b)
FIGURE 6.15:
(a) A set of cantilevers 400 m in width. (b) Bottom side of a fully released cantilever.
82 6 Piezoelectric Cantilever Structures on Silicon Substrates
(a)
8 6 4 2 0 2 4 6 8
0
5
10
15
20
25
30
35
Cantilever dimensions
800 m x 50 m
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[

m
]
Voltage [m]
(b)
0 1 2 3 4 5 6 7 8 9
0
5
10
15
20
25
30
35
40
max. Displacement
FEM Simulation
m
a
x
.

D
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[

m
]
Voltage [V]
(c)
1 2 3 4 5 6 7 8
0
10
20
30
40
50
60
70
80
90
100
110
m
a
x
.

D
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p
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a
c
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m
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t

[

m
]
Frequency [kHz]
(d)
-6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6
0
10
20
30
40
50
60
70
80
90
Cantilever dimensions
1600 m x 160 m
D
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[

m
]
Voltage [V]
FIGURE 6.16:
Measurements taken at a cantilever of 800 m length and 50 m width with a 255 nm
PZT layer (a)-(c). (a) Displacement vs. voltage (measured at 100 Hz). (b) Maximum
displacement vs. applied signal (100 Hz) compared to FEM simulations. (c) Maximum
displacement measured at certain frequencies with 3 V alternating signal. (d) Displacement
vs. voltage characteristic of a 1600 m long cantilever at reduced driving voltage of 5 V
(100 Hz).
Measurements are performed at cantilevers with different length and width. Figure 6.16 (a)
shows the displacement of an 800 m long cantilever. The buttery-shaped curve is slightly
shifted to positive voltages and reveals a maximum deection of 31 m at 8 V. The maximum
achievable displacement depends on the amplitude of the applied signal and shows a linear
increase. Furthermore, the measurements are in very good agreement with FEM simulations
(Figure 6.16 (b)). In Figure 6.16 (c) a plot of the maximum displacement at certain frequencies
is shown, while the applied signal is 3 V. The maximum deection of 104 m is measured at
the resonance frequency of 5 kHz, which is around ve times more than measured at lower
6.3 Cantilevers Fabricated on Silicon On Insulator Substrates 83
(a)
0 200 400 600 800 1000 1200 1400 1600
0
20
40
60
80
100
120
140
6
7
8
9
10
11
12
13
m
a
x
.

D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Length [m]

C
o
n
t
a
c
t

f
o
r
c
e

[

N
]
(b)
0 200 400 600 800 1000 1200 1400 1600
0
10
20
30
40
50
60
70
80
90
100
110
R
e
s
o
n
a
n
c
e

f
r
e
q
u
e
n
c
y

[
k
H
z
]
Length [m]
FIGURE 6.17:
(a) FEM simulation of maximum displacement and contact force in a distance of 10 m, if
8 V are applied to cantilevers in the range from 200 m to 1600 m and 100 m in width.
(b) Simulated resonance frequency dependent on cantilever length.
frequencies.
Figure 6.16 (d) shows the displacement of a 1600 m long structure (160 m wide, 3.4 m
thick, 255 nm PZT). The driving voltage is reduced to 5 V, nevertheless the displacement in-
creases to 79 m, due the large cantilever dimensions. A resonance is obtained at 1.5 kHz
and both measurement results are in very good agreement with simulations, which turn out a
maximum displacement of 85 m and a resonance frequency of f
r
= 1.5 kHz).
Further simulations reveal the potential of this technique since large areas can be under-etched
and the processing of very long structures is possible, if an appropriate substrate thickness is
given. Figure 6.17 (a) shows calculations of the maximum displacement dependent on the
cantilever length if a driving voltage of 8 V is applied. A 200 m long structure reveals a
displacement of only 1.8 m, but a high resonance frequency of 114.5 kHz (Figure 6.17 (b)).
From the measurements it is known that the displacement in resonance increases by a factor of
ve compared to lower frequencies, hence fast switching with a deection of 9 m is possible.
Increasing the cantilever length leads to a quadratically increase of the maximum deection,
whereas the resonance frequency decreases. The maximum achievable deection is calculated
to 137 m for a cantilever with a length of 1600 m .
Additionally calculations are performed on the contact force, if the contact is assumed to be
in a distance of 10 m to achieve a satisfying open resistance [23]. In case of quasi-static
operation 600 m long structures produce a force of 12.2 N (shorter cantilevers do not reach
a deection of 10 m) and the contact force is reduced, if the cantilever becomes longer
84 6 Piezoelectric Cantilever Structures on Silicon Substrates
(Figure 6.17 (a)).
Concluding chapter 6, three methods for integrating ferroelectric thin lms into MEMS
are presented. Thereby, the main difference is dened by the release of the structures since this
is one challenging process, if PZT is used in combination with silicon micromachining.
The rst process bases on silicon bulk micromachining and releases the cantilever from the
back side. Therefore, double side lithography is needed. The integration density is limited by
the thickness of the wafer since anisotropic wet etching using TMAH leads to hopper shaped
cavities. On the other hand, the mechanical properties can easily be changed with the same
set of lithography masks by varying the substrate thickness via adjusting the time of silicon
plasma etching and additionally this technique does not limit the cantilever width due to a limit
of silicon under-etching.
The second process uses isotropic dry etching to release the cantilever structures. The plasma
is applied from the front side and little space around the cantilever is needed for the release
process. Hence, the integration density is much higher. Characteristically to the process is
the use of a SiO
2
substrate, whose thickness is adjusted to yield a proper mechanical stress
compensation.
The third release process focuses on SOI substrates. Thereby, the substrate is dened by the
thickness of the device silicon layer, while HF vapor is used to etch the buried oxide in order
to release the cantilever. This process posses the capability of a high integration density due
to the application of surface micromachining, gives a very good surface quality and allows the
fabrication of structures up to 400 m in width. However, etching of the SiO
2
layer between
the bottom electrode and the device silicon is still a problem and further investigations need
to be done on this task. Nevertheless, various cantilevers are fabricated and characterized.
Operation voltages below 10 V cause a deection of 80 m and resonance frequencies of
46 kHz are observed. A contact force of 12 N is predicted, if the contact is in a distance of
10 m.
85
7 Devices
T
his chapter presents the integration of ferroelectric thin lms into a variety of MEMS.
Thereby, the devices takes advantage of the special material characteristics presented in
chapter 4 and are fabricated with the technologies described in chapter 5.
7.1 Integrated Piezoelectric Driven Micro-Relays
This section demonstrates a piezoelectric driven micro-relay with integrated PZT thin lms.
The concept follows the proposed design described in chapter 6.2 and is enhanced in the way
that it is changed from a single side suspended cantilever to a double side suspended bridge
in order to ensure highly mechanical stability and sufciently control of the mechanical stress.
The contact is formed by a perpendicular metalization and two overlapping copper bridges
(Figure 7.1). The device can be used in two ways: (i) The contact is closed and therefore a
micro-relay is realized. (ii) The conguration is used as variable air capacitor, whereby the total
capacitance is composed of two serial air capacitances and its value is changed by alternating
the distance h between the perpendicular contact and the copper contact. The total capacitance
C is
C(V ) =
1
2

0
A
h(V )
(7.1)
where Adescribes the overlapping area between the copper contacts and the perpendicular met-
alization.
To ensure high integration density the micro-relay is designed using silicon surface microma-
chining to release the cantilever from the substrate.
Si
SiO
2
Pt
copper contact
metalization
PZT
FIGURE 7.1:
Bridge concept of a piezo-
electric driven micro-relay.
86 7 Devices
(a)
Pt bottom layer
Pt top
PZT
(b)
SiO
2
(c)
Si
(d)
copper bridge
FIGURE 7.2:
Processing of the micro-relay: (a) Plasma etching of the Pt top electrode and the PZT
layer. (b) Plasma etching of the Pt bottom electrode. (c) Opening of the SiO
2
window. (d)
Electroplating of the copper bridges using sacricial technique.
The processing starts with the deposition of 255 nm PZT by CSD on a Pt/TiO
2
/SiO
2
/Si sub-
strate followed by sputter deposition of a 100 nm Pt bottom electrode layer. Next, the top
electrode, the switch contact and the PZT are structured by dry etching (Figure 7.2 (a)) fol-
lowed by a new mask to texture the bottom electrode (Figure 7.2 (b)). The following mask
denes the areas where the SiO
2
substrate is etched while the bridge will be released later on
(Figure 7.2 (c)). Before releasing the bridge structure, two overlapping copper contacts are
formed by electroplating. Thereby, the insertion of vias is required to enable the oxygen plasma
to remove the sacricial photoresist under the whole contact. Finally, the bridge is released by
isotropic underetching using SF
6
plasma (Figure 7.1).
Figure 7.3 shows the double side suspended cantilever. The SiO
2
windows indicate the area
from where the bridge is under etched by dry etching to release the structure from the silicon.
The dimensions are of the same size than the cantilever itself and ensure the potential of a high
7.1 Integrated Piezoelectric Driven Micro-Relays 87
(a)
(b)
SiO
2
copper contact
with vias
Si
top electrode
relay
contact
FIGURE 7.3:
(a) Photo of a double side suspended bridge with copper bridges. (b) Enlargement of the
central part.
integration density. In Figure 7.3 (b) one can clearly see the electroplated copper contacts with
vias. The copper is around 3 m thick, which gives a good mechanical stability and low ohmic
resistance. Also visible is the separation of the actuation part and the signal line perpendicular
in the middle. Piezoelectric bridges from 400 m to 1400 m length and a width of 40 m have
been fabricated.
The fabricated bridge structures are characterized by laser vibrometer measurement, whereby
the laser spot is adjusted to the middle of the bridge and the device is driven with a frequency
of 10 Hz. To avoid displacement limitation by the copper contacts the characterization is done
(a)
-10 -8 -6 -4 -2 0 2 4 6 8 10 12
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Voltage [V]
(b)
0 1 2 3 4 5 6 7 8 9 10
0
1
2
3
4
5
6
7
8
9
10
11
length 1000 m; width 40 m
Laser measurement @ 10 Hz
FEM simulation
m
a
x
.

D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Voltage [V]
FIGURE 7.4:
(a) Displacement vs. voltage measurement of a 1000 m long bridge (40 m width) mea-
sured at 10 Hz and (b) maximum displacement at different voltages compared with FEM
calculation.
88 7 Devices
400 600 800 1000 1200 1400
0
2
4
6
8
10
12
14
9 V
8 V
7 V
6 V
5 V
4 V
m
a
x
.

D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Cantilever length [m]
FIGURE 7.5:
Maximum displacement of bridges
with different lengths dependent on
the applied voltage (10 Hz).
without them. One of the measurements recorded for a 1000 m long bridge is presented in
Figure 7.4 (a). The overall length of the freestanding part is 1000 m, resulting in an actu-
ated length of 470 m per side. The displacement vs. voltage characteristic shows the typical
buttery loop related to PZT. Special attention has to be paid to the reversed shape of the mea-
surement. After processing, the bridges are slightly bent upwards due to mechanical stress. By
applying an electric eld to the Pt electrodes, the PZT contracts on both sides so that the SiO
2
substrate contracts and becomes shorter, resulting in a downward movement of the bridge. For
this reason, the displacement is negative, but since the total distance between the copper con-
tacts and the bridge determines the insulation characteristic, it is only important that the switch
is initially closed and opens if an electric eld is applied. The 1000 m long structure possess
a deection of 8.5 m if 10 V are applied.
Figure 7.4 (b) compares the maximum deection of the bridge for different amplitudes deter-
mined by laser measurements and calculated by FEM. The plot depicts a very good agreement
in the low voltage regime whereas for voltages larger than 5 V a deviation of the measured
displacement from the calculated result occurs. The calculated deection increases linearly
since the piezoelectric properties are assumed to be constant. In fact, the d
33
decreases with
increasing electric elds (section 2.3) and therefore the deection increases not linearly.
Figure 7.5 compares the deection of bridges with different length and applied signals. As ex-
pected, extending the bridges results in an increase of the amplitude with a linear behavior. The
maximum is obtained for a 1400 m long cantilever, which shows a displacement of 13.3 m.
The dynamic properties are also investigated. Therefore, displacement measurements with
1.5 V oscillation level are accomplished in a wide frequency range. The maximum ampli-
tude of each measurement is plotted in Figure 7.6 (a) for a 800 m long structure. A large
7.1 Integrated Piezoelectric Driven Micro-Relays 89
(a)
11 12 13 14 15 16
0.0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Driving frequency [kHz]
length 800 m
witdh 40 m
oszillation level 1.5 V
(b)
0 1 2 3
0.0
0.5
1.0
1.5
2.0
2.5
D
r
i
v
i
n
g

v
o
l
t
a
g
e

[
V
]
Time [ms]

D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
FIGURE 7.6:
Frequency measurements taken with a 800 m long bridge: (a) Displacement vs. electrical
excitation frequency measurement. (b) Step response, if unipolar voltage pulse with a pulse
width of 1 ms are applied.
peak is obtained at 15.1 kHz, where the amplitude increases about a factor of six. However,
this is the electrical excitation frequency. The mechanical resonance frequency is two times the
electrical frequency because during one electrical period the bridge deects two times in the
same direction. A second method to determine the eigenfrequencies of such structures is a step
response measurement (Figure 7.6 (b)). Thereby, voltage pulses with a pulse width of 1 ms are
applied to the structure and the oscillation of the bridge is independently recorded. Therefrom
the resonance frequency can be determined. Note, that these measurements are undertaken with
unipolar voltages to measure the eigenfrequency. A comparison of the two measurement meth-
ods with FEM calculations is presented in Figure 7.7, where the resonance frequency is plotted
vs. the bridge length. Measurements and simulation are in good agreement, giving a maximum
resonance frequency of more than 100 kHz for 400 mlong structures and an exponential decay
400 600 800 1000 1200 1400
0
10
20
30
40
50
60
70
80
90
100
110
120
Frequency sweep measurement
Step response measurement
FEM Simulation
R
e
s
o
n
a
n
t

f
r
e
q
u
e
n
c
y

[
k
H
z
]
Cantilever length [m]
FIGURE 7.7:
Resonance frequency depending on
the bridge length measured by fre-
quency sweep and step response
measurement compared to FEM
simulations.
90 7 Devices
for longer structures down to 13 kHz if the structure is 1400 m long.
7.2 Piezoelectric Driven Microwave Switches 91
7.2 Piezoelectric Driven Microwave Switches
The micro-relay described in the section before offers the possibility to realize an integrated
switch in a microwave circuit. The bridge deection is large enough to by-pass a distance of
several micrometers and therefore to achieve a sufcient insulation between the copper contacts
and the bridge, if the relay is open. Furthermore, the application of surface micromachining
enables a high integration density and the possibility to place the micro-relay within unused
areas between microwave signal lines.
One commonly used microwave test design has the structure of a coplanar wave guide (CPW).
This is a planar design which exhibit low dispersion. Thereby, a signal line is anked by paral-
lel ground planes on each side and the microwave propagates in the substrate as well as in the air.
The design is presented in Figure 7.8. At a rst glance, one notices the three signal
lines on a Si/SiO
2
substrate, whereby the tapering at the ends of the middle line and the
broadening of the two outer signal lines matches the requirements of the probe tips used for
microwave measurements. In the area between those signal lines, a micro-relay is placed on
each side. The relay design is changed in the way that the perpendicular contact of the bridge
signal lines
piezoelectric bridge
Si window
SiO
2
Pt/PZT/Pt
bridge
contact
FIGURE 7.8:
Concept of a MV-switch in coplanar waveguide conguration based on the loaded line
principle.
92 7 Devices
is turned by 90 to increase the integration density (compare to Figure 7.1). This goes to the
expense of the length of the piezoelectric active layer, if the overall bridge length remains
constant. However, the characterization in section 7.1 prooved that the deection is still large
enough. The copper contacts are directly attached to the signal lines and not opposite to each
other. Instead, they are shifted to the side overlapping the whole bridge assuring a large contact
area and good contact properties.
In the state of open micro-relays, a microwave launched at one side of the structure will
propagate along the gaps between center and outer signal lines and at the other side released.
Thereby, ideally all energy is transmitted from one side to the other, if no ohmic losses occur
within the structure and the CPW matches adequately the requirements of the measurement
probe tips. If the piezoelectric bridge shortens the copper contacts, the switch is closed and
therefore the CPW transmission characteristics will change dramatically. In closed state, the
signal lines are shortened in the middle, which blocks the signal propagation and yields high
reection. Thus, the microwave signal is highly attenuated. Such MEMS switches can be
employed in various microwave applications, e.g. lters and multiplexers.
Figure 7.9 displays the electric eld distribution within the cavities under the piezoelectric
bridges, the silicon substrate, and the air in cross-sectional view. The electric eld is simulated
at 25 GHz by using the software CST Microwave Studio. Due to some simulation constraints,
Si substrate
middle line
ground plane
Pt/PZT/Pt/SiO
2
cavity
FIGURE 7.9:
Vector representation of the electric eld distribution in the cross section of the CPW with
integrated piezoelectric bridges and air cavities.
7.2 Piezoelectric Driven Microwave Switches 93
the PZT lm is modeled by a 2 m thick dielectric layer with a permittivity of
r
= 800 en-
closed between the Pt bottom and top electrodes. This model is close to reality, and additional
simulations prove that the thickness and permittivity of the PZT lm has only minor impact on
the device performance. This is important, since a change of permittivity of the PZT comes
along with a DC electric eld to be applied to the PZT lm in order to activate the micro-
relay due to converse piezoelectric effect (compare Figure 4.3). The electric eld is mainly
concentrated in the cavities between the middle line and the ground plane, where the vector
orientation appears almost parallel to the substrate surface. At the middle line and the ground
plane, the eld is normally oriented to boundary surfaces of metalization. As seen in the gure,
the Pt/PZT/Pt/SiO
2
stack does not signicantly disturb the eld distribution. No elds can
invade the PZT lm, even if this lm is very thick. This has two reasons: First, the boundary
conditions at the air/lm boundaries do not allow the occurrence of high eld amplitudes in
the dielectric lm due to the enormous difference of the two dielectric constants (air and PZT).
Second, the electric eld is shortened across the Pt top and bottom electrodes.
The fabrication of such a MW-switch is similar to the fabrication of the micro-relay. First, the
piezoelectric bridges are formed by the deposition of PZT on a Pt/SiO
2
/Si substrate and the
forming of Pt top electrodes. After the structuring of the PZT, the bottom Pt and the denition
of the Si window by etching the SiO
2
in this area, the signal lines are formed by electroplating.
In a rst step the structures of the signal lines are dened by lithography, which is followed
by the deposition of a copper plating base. In the second step the copper bridges are dened
using a second layer of photoresist and then thick copper is grown by electroplating (see section
Figure 5.19). After removal of the photoresist and the plating base the piezoelectric bridges are
released by isotropic underetching.
Figure 7.10 shows the top view of a fabricated CPW with two integrated micro-relays. This
example possesses a distance of 200 m between the middle and the ground lines, whereby
the gap narrows at the end to 50 m. The piezoelectric bridges are 60 m in width and the
silicon window is 1400 m long. The picture on the right hand side depicts a magnication
of the switch contacts. It shows the separated contact bar on the piezoelectric bridge and the
copper contacts with vias. Since one can see the contact bar through the vias it is ensured that
all sacricial photoresist is removed.
The transmission characteristic of the device is shown in Figure 7.11 (a). If the switches are
open, the insertion loss is nearly 0 dB in the range from 0 to 35 GHz and the RF signal can
pass the structure without any signicant loss, independent of the frequency. If the switches are
94 7 Devices
middle line
ground plane
SiO substrate
2
Si window
Cu contact bridge
contact bar
cantilever top electrode
cantilever bottom electrode
FIGURE 7.10:
Top view of a MW design with two embedded cantilever bridges and magnication of the
center part around the copper contacts.
closed and therefore the middle line and ground plane are shortened, the insertion loss is very
high at frequencies below 2 GHz. Above this frequency the insertion loss ranges from -35 dB to
-10 dB, which still provides highly attenuation of the passing microwave signal. Figure 7.11 (b)
shows the return loss of the structure. In opened state, the return loss is very high at low
frequencies and decreases with higher frequencies reaching a minimum at 20 GHz. If the
contacts are shortened the return loss is nearly 0 dB at low frequencies and increases slightly
with increasing frequencies. However, the difference between open and closed state is at least
10 dB.
7.2 Piezoelectric Driven Microwave Switches 95
(a)
0 5 10 15 20 25 30 35
-80
-70
-60
-50
-40
-30
-20
-10
0
open
closed
I
n
s
e
r
t
i
o
n

l
o
s
s

[
d
B
]
Frequency [GHz]
S
21
(b)
0 5 10 15 20 25 30 35
-40
-35
-30
-25
-20
-15
-10
-5
0
open
closed
R
e
t
u
r
n

l
o
s
s

[
d
B
]
Frequency [GHz]
S
11
FIGURE 7.11:
(a) Transmission coefcient (S
21
) and (b) reection coefcient (S
11
) of MW circuit with
embedded 1400 m long micro-switches (simulations).
Further miniaturization requires to shorten the length of the piezoelectric bridges. Therefore
the microwave characteristics are simulated for bridge length shortened down to 600 m.
In this case the contact distance is still sufcient, since the deection of the bridge is 4 m
(compare Figure 7.5). For the reason of the abbreviate piezoelectric bridges the whole CPW
and the cavities become shorter. Figure 7.12 (a) presents the transmission characteristic of
the CPW in open conguration. The insertion loss is slightly improved, if the cavity size
is reduced to a length of 600 m. Obviously, the air cavities cause some slight impedance
(a)
0 5 10 15 20 25 30 35
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
1400 m
600 m
I
n
s
e
r
t
i
o
n

l
o
s
s

[
d
B
]
Frequency [GHz]
S
21
(b)
0 5 10 15 20 25 30 35
-40
-35
-30
-25
-20
-15
-10
-5
0
600 m
1400 m
R
e
t
u
r
n

l
o
s
s

[
d
B
]
Frequency [GHz]
S
11
FIGURE 7.12:
Comparison of (a) transmission coefcient (S
21
) and (b) reection coefcient (S
11
) of MW
circuits with micro-relay bridges of different length (600 m, 1400 m) in open congu-
ration.
96 7 Devices
mismatch due to the change of the characteristic impedance of the CPW along the cavities.
At shorter cavity lengths, the inuence on the transmission characteristic is reduced. The
reection characteristics for open relay contacts are shown in Figure 7.12 (b). In the range up
to 20 GHz the return loss is improved by around 8 dB.
The transmission and reection characteristics for the MW-structure with closed micro-relays
exhibit no signicant difference between the employment of 1400 m or 600 m long piezo-
electric bridges. Hence, the reduction of the length of the micro-relays leads to a reduction of
device size and furthermore improves the microwave switching characteristics.
This section presented a novel concept of piezoelectric actuated MW-switches. Piezoelectric
activation leads to a signicant reduction of the driving voltage compared to electrostatic
actuation. Thereby, good switching properties are veried by simulations showing a switching
level better than 20 dB for frequencies below 20 GHz.
7.3 Thin Film Bulk Acoustic Wave Resonators 97
7.3 Thin Film Bulk Acoustic Wave Resonators
Beside micro-relays, TFBARs have recently attracted the attention of research labs and industry
in the eld of mobile communication.
In principle, a TFBAR consist of a piezoelectric lm with a thickness of about /2, if being
the acoustic wave length in the piezoelectric material. An alternating electric eld applied to the
piezoelectric lm generates acoustic waves, which propagates within the material and excite the
fundamental thickness mode resonance. Besides good piezoelectric properties, a good acoustic
insulation is requested in order to keep the losses low. There are two principles: The rst
one uses an acoustic Bragg reector consisting of n-pairs of high and low acoustic impedance
layers of AlN and SiO
2
[203]. The second principle bases on membrane structures to achieve
isolation from the substrate. The membranes are fabricated either by removing the silicon from
the backside [204] or by sacricial etching [205].
A TFBAR can be calculated with the resonant spectrum method proposed by Zhang et al. [113].
Thereby the piezoelectric layer represents an electric impedance, which is terminated by two
acoustic impedances (Figure 7.13 (b)). One acoustic impedance is comprised by the top elec-
trode and the other by the combination of bottom electrode and substrate. The electric im-
pedance is denoted by
Z
in
=
V
I
=
1
jC
0

1
k
2
t

(z
1
+ z
2
) sin + j2 (1 cos )
(z
1
+ z
2
) cos + j (1 + z
1
z
2
) sin

, (7.2)
where C
0
=
s
33
A
l
is the static capacitance of the resonator. A is the area of the electrodes,
s
33
(a)
RF
electrode piezoelectric film
(b)
Z
top
electrode
bottom
electrode
piezoelectric
film
substrate
Z
Z
I
1
2
in
V
FIGURE 7.13:
(a) Schematic drawing of a bulk acoustic resonance in a piezoelectric plate. (b) Network
of elements contributing to the impedance of a TFBAR.
98 7 Devices
2 3 4 5 6 7 8 9 10 11
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
200 nm
120 nm
160 nm
80 nm
40 nm
C
a
p
a
c
i
t
a
n
c
e

[
p
F
]
Frequency [GHz]
FIGURE 7.14:
Calculation of the resonance behav-
ior of TFBARs using different BST
lm thicknesses (capacity area 6 x 6
m, bias voltage 8 V).
and l are the permittivity and thickness of the piezoelectric layer; k
2
t
is the electromechanical
coupling coefcient of the piezoelectric layer; = t/v is the phase delay of the longitudinal
acoustic wave with the sound velocity v of the piezoelectric layer and is the angular frequency.
Furthermore, z
1
is the normalized acoustic impedance of the top electrode
z
1
=
Z
1
Z
0
(7.3)
and z
2
is the normalized acoustic impedance of the bottom electrode and the substrate
z
2
=
Z
2
Z
0
, (7.4)
with the acoustic impedance Z
0
= Av of the piezoelectric material incorporating the specic
material density . The acoustic impedance of the top electrode is denoted by
Z
1
= jZ
e1
tan
e1
with Z
e1
= A
e1
v
e1
and
e1
=
t
e1
v
e1
, (7.5)
and the combined acoustic impedance of bottom electrode and substrate by
Z
2
= j
Z
sb
tan
sb
+ Z
e2
tan
e2
1 (Z
sb
/Z
e2
) tan
e2
tan
sb
, (7.6)
thereby
Z
e2
= A
e2
v
e2
and Z
sb
= A
sb
v
sb
(7.7)
denotes the acoustic resistance and

e2
=
l
e2
v
e2
and
sb
=
t
sb
v
sb
(7.8)
the phase shift.
Calculations of TFBARs based on the electrostrictive behavior of BST are presented in Fig-
ure 7.14. Thereby the permittivity corresponds to an applied bias voltage of 8 V, due to the
7.3 Thin Film Bulk Acoustic Wave Resonators 99
dependence of the dielectric and electrostrictive properties on the applied electric eld (Fig-
ure 4.14 and [206]). The simulations are performed on thin lms with different thicknesses and
turn out a strong variations of the resonance frequency. The use of 40 nm thin lms leads to a
distinctive resonance peak at 7.7 GHz. With increasing lm thickness the resonance frequency
decreases down to 4.2 GHz, if the lm is 200 nm thick. Besides a decrease of the resonance
frequency the resonance peak becomes smaller and further the capacitance becomes smaller.
For the characterization of high frequency structures a device design is needed, which matches
the requirements of the signal analyzer. In this work the concept of a CPW in combination
with a sacricial technique is chosen to achieve a satisfactorily acoustic isolation. A schematic
drawing of the design is shown in Figure 7.15, whereby the distance between top- and bottom
electrode (50 m) is determined by the microwave probe tips. The capacitor is formed by
overlapping the top and bottom electrode with the piezoelectric material in between. Since
it is essential that the impedance of the device matches the impedance of the analyzer and
ferroelectric materials exhibit a large permittivity the dimensions of the capacitors have to be
small and decreases down to 2 x 2 m. Hence, to avoid shorting of the electrodes due to
alignment errors (the maximum resolution of the available optical lithography is 1 m),
the area of the piezoelectric material exceeds the area of the bottom electrode and the total
capacitance is dened by the size of the top electrode.
The fabrication starts on a 450 nm wet oxidized silicon wafer with a 100 nm thin platinum
layer. In a rst step, the platinum is structured by dry etching to form the bottom electrode
and then covered with 80 nm BST(70/30) by CSD. After the deposition, the BST is patterned
with dry etching and the Pt top electrode is structured by lift-off to form the capacitor. Finally
bottom electrode
top electrode
piezoelectric
material
SiO
window for
underetching
2
FIGURE 7.15:
Schematic drawing of TFBAR de-
sign using membrane technology
for acoustic isolation.
100 7 Devices
bottom electrode
top
electrode
BST
windows for underetching
SiO
2
FIGURE 7.16:
Picture of TFBAR device using BST as active material.
the membrane needs to be fabricated by underetching. Therefore photoresist is spread over
the wafer and two windows nearby the capacitor are formed. The HF-vapor process is applied
to remove the SiO
2
underneath the bottom electrode, so that the PT/BST/PT stack is fully
released, forming a membrane without any substrate. Photoresist is working for protection
since the area to be under-etched is very small and therefore the processing takes only a couple
of minutes.
Figure 7.16 shows a picture of a TFBAR structure. It is taken before the nal release
step and shows the CPW concept with a center line (top electrode) and the surrounding ground
line (bottom electrode). On the right hand side, the magnication of the parallel plate capacitor
structure shows the bottom electrode, covered with BST and the overlapping top electrode (20
x 20 m), whereby this stack is anked by windows for the underetching.
4.0 4.0 4.5 5.0 5.0 5.5 6.0 6.0 6.5 7.0 7.0 7.5 8.0 8.0 8.5 9.0 9.0
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
0.65
Frequency [GHz]
on Si/SiO
2
substrate without substrate
6.2 GHz
C
a
p
a
c
i
t
a
n
c
e

[
p
F
]
FIGURE 7.17:
Measurement of BST based TFBAR
(capacity area 6 x 6 m, bias volt-
age 8 V).
7.3 Thin Film Bulk Acoustic Wave Resonators 101
(a)
4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
0.25
0.30
0.35
0.40
0.45
0.50
measurement
simulation
C
a
p
a
c
i
t
a
n
c
e

[
p
F
]
Frequency [GHz]
(b)
4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
0.2
0.3
0.4
0.5
0.6
0.7
measurement
simulation
C
a
p
a
c
i
t
a
n
c
e

[
p
F
]
Frequency [GHz]
FIGURE 7.18:
Comparison of measurements with the simulation of a 6 x 6 m small TFBAR structure.
(a) On Si/SiO
2
substrate (b) Acoustically isolated (bias voltage 8 V).
Figure 7.17 (a) shows two capacitance measurements taken on a 6 x 6 m small structure with
an applied bias voltage of 8 V in order to activate the electrostrictive behavior of the BST. The
rst curve is taken without acoustic isolation on the Si/SiO
2
substrate and shows a resonance
around 6 GHz, whereby the resonance peak is distributed over the range from 5 GHz to 7 GHz.
The second measurement is performed on an under-etched structure and exhibits a large distinc-
tive resonance peak at 6.2 GHz. The bandwidth is much smaller due to the enhanced acoustic
insulation.
Calculations performed for the same capacitor conguration are in good agreement with the
measurements. Figure 7.18 (a) compares the measurement with the calculation of a TFBAR
structure with underlying substrate, if a bias voltage of 8 V is applied. The simulation shows
slightly higher capacity values, but the resonance peak appears at the same frequency and is
of the same broadened shape. Figure 7.18 (b) shows the comparison of calculation and mea-
surement, if the structure is acoustically isolated. The simulation shows exactly the measured
capacity and the resonance peak appears at the same frequency and is of the same narrow shape.
Since TFABRs using BST base on electrostriction and furthermore the permittivity of BST
is strongly dependent on the applied electric eld, the performance of a TFBAR can be
additionally alternated by the bias voltage. Figure 7.19 summarizes TFBAR measurements
performed with bias voltages between 0 V and 10 V. Without an applied electric eld BST
exhibits the highest permittivity, but on the other hand the electrostrictive effect is low and
therefore no resonance caused by acoustic waves is visible. If a bias voltage of 2 V is applied
102 7 Devices
4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
b
i
a
s

v
o
l
t
a
g
e
10 V
8 V
6 V
4 V
2 V
0 V
C
a
p
a
c
i
t
a
n
c
e

[
p
F
]
Frequency [GHz]
FIGURE 7.19:
Measurements indicating the inu-
ence of the bias voltage on the TF-
BAR performance (capacity area 6 x
6 m).
to the structure the capacitance decreases, but also a resonance starts to form at 6.2 GHz. By
further increase of the bias voltage, the capacitance decreases, whereby the capacitance change
becomes continuously smaller with higher voltages. Additionally the resonance peak becomes
more and more pronounced, but appears still at the same frequency. This behavior enables one
additionally degree of freedom in RF circuits. The total capacity can be changed whereby the
resonance remains constant.
In conclusion, the integration of BST thin lms in surface micromachined TFBAR is
successfully demonstrated. Through the application of the HF vapor etch technique it is
possible to remove the substrate completely and therefore to achieve an acoustically full
isolated membrane. Thereby the working principle takes advantage of the electrostrictive
behavior of BST and the measurements are in good agreement with the performed simulations.
7.4 Dielectric Bolometers for Infrared Detection 103
7.4 Dielectric Bolometers for Infrared Detection
The devices presented before utilizes the piezoelectric effect. Another very interesting effect
exhibited by ferroelectric materials is their strong permittivity dependence on the temperature.
This effect can be used to detect infrared (IR) radiation and therefore to fabricate infrared imag-
ing sensors.
This section presents the fabrication and characterization of a ferroelectric thin lm based inte-
grated dielectric bolometer working at room temperature.
Figure 7.20 shows the schematic of an one pixel dielectric bolometer. Two ferroelectric parallel
plate capacitors are fabricated whereby a top electrode connect them. One capacitor is placed
on a membrane and the other one on the silicon bulk.
The two bottom electrodes are connected to an alternating signal of 2.5 V with a phase shift
of 180 (Figure 7.21). The two capacitors C
f
and C
ref
are identical at the same temperature
and therefore by applying the alternating signal to the bottom electrodes the voltage at the inter-
section node equals zero. If the temperature changes due to infrared radiation, the permittivity
of the ferroelectric lm on the membrane changes immediately because the membrane is ther-
mally insulated and therefore the heat cannot dissipate. On the other hand, the lm on the bulk
is radiated with the same intensity of IR radiation, but the generated heat dissipates into the
silicon and the temperature of the lm remains constant. Therefore the two capacitors have a
different capacitance, which leads to an electrical potential V = 0 at the intersection node. The
potential is amplied by a lock-in amplier and displayed on an oscilloscope.
In the dielectric operation mode, materials exhibiting a permittivity change due to temperature
changes around room temperature are desired and therefore, based on the material characteri-
zation in chapter 4, BST seems to be a good candidate [207, 208].
The fabrication starts with a silicon wafer, which is covered with 450 nm SiO
2
on both sides
and has a 50 nm Pt layer on the front side. In a rst step, the bottom electrode is structured by
Dielectric
layer
Si - bulk
SiO
2
membrane
C
f
C
ref
Top electrode
+ 2.5 V
20 kHz
- 2.5 V
20 kHz
FIGURE 7.20:
Schematic drawing of a one pixel di-
electric bolometer.
104 7 Devices
Lock-in Oscilloscope
+ 2.5 V
20 kHz
- 2.5 V
20 kHz
Chopper
I
R
-
s
o
u
r
c
e
C
f
on membrane
C
ref
on bulk
FIGURE 7.21:
Measurement principle of a dielectric bolometer.
dry etching (Figure 7.22 (a)). In the second step, the rst part of the membrane is etched using
double side photolithography and dry etching of the SiO
2
hardmask on the backside followed by
a silicon wet etching step using TMAH. Thereby, for further processing a remaining membrane
thickness of around 100 m is necessary (Figure 7.22 (b)). On the so prepared substrate a BST
thin lm is deposited by CSD. Special attention is paid to a sufcient covering of the bottom
electrode ange to assure a conformal deposition. Furthermore, the top electrode is deposited
by lift-off, generating two parallel plate capacitors by the overlapping area and a contact pad
Si - bulk
Pt electrodes
(a) (b)
Dielectric
layer
Top electrode
(c)
SiO
2
membrane
(d)
FIGURE 7.22:
Fabrication ow of a dielectric thin lm bolometer.
7.4 Dielectric Bolometers for Infrared Detection 105
(a)
(b)
Contact pad
Capacitor
on membrane
Capacitor
on bulk
Bottom electrode covered with BST
FIGURE 7.23:
(a) Picture of a sample with different bolometer structures. (b) Magnied view to the
parallel plate capacitors on bulk and membrane.
in some distance to the membrane. This ensures mechanical stability during measurement with
probe needles (Figure 7.22 (c)). Since now the bottom electrode is covered by the ferroelectric
lm the layer is removed in the area of the bottom contacts either by dry or wet etching using
photoresist as a mask. In the nal step the remaining silicon membrane is etched from the
backside by dry etching (Figure 7.22 (d)). The processed bolometers use a 100 nm BST(70/30)
thin lm with Pt top and bottom electrodes.
Figure 7.23 (a) shows a picture of a sample with various bolometer structures. A complete
structure has the form of a "T" with contact pads at each end. In Figure 7.23 (b) the area
around the parallel plate capacitors is magnied. The length of the capacitor boarders ranges
from 10 m to 600 m. The membrane is not visible from the front side but the dotted square
signies the area.
For characterization of the bolometers a measurement setup is developed (Figure 7.24). The
picture shows the open measurement setup with a sample placed in the middle of a hotplate
and contacted with three probe needles. To reduce the noise arising from the wiring between
probe needle and lock-in amplier an additional operational amplier is inserted directly at
the probe needle. The hotplate is used to simulate different ambient temperatures besides room
temperature. In closed state the sample is radiated from the IR-radiator trough an aperture in the
lid. Thereby, the distance of the IR source is variable to perform measurements with a variable
radiation power density. The aperture is periodically opened and shutted with a chopper in the
range from 1 Hz to 100 Hz.
Figure 7.25 (a) shows one measurement result. The chopper opens and closes the aperture
106 7 Devices
IR source
Chopper
Sample
Hotplate
Aperture
FIGURE 7.24:
Picture of the
open bolometer
measurement
setup with IR-
radiator, chopper
and sample on
a hotplate. In
closed state the
IR-radiator and
chopper are
placed directly
over the bolome-
ter sample.
periodically, whereby the chopper position is recorded by a photo sensor. When the chopper
opens the aperture, the temperature of the sample surface rises due to IR radiation and the
permittivity of the BST lm decreases, which causes a capacitance change of the capacitor on
the membrane and therefore a potential arises at the bolometer top contact. After rising, the
output signal remains constant for the same period as the chopper signal opens the aperture and
the capacitor on the membrane is heated to equilibrium state. When the IR radiation is shutted
the output signal decreases immediately. The detected output signal is within the range of mV,
which is assumed to be sufcient for signal processing. In Figure 7.25 (b) two measurements
are taken before and after the nal membrane etching step from the back side. The bolometer
(a)
0.0 0.5 1.0 1.5
0
10
20
30
40
50
60
70
C
h
o
p
p
e
r

s
i
g
n
a
l
Time [ms]

O
u
t
p
u
t

s
i
g
n
a
l

[
m
V
]
(b)
0 10 20 30 40 50 60 70 80 90 100
0
20
40
60
80
100
thin membrane
thick
membrane
S
i
g
n
a
l

[
m
V
]
Time [ms]
BST 70/30
FIGURE 7.25:
(a) Chopper signal and response of bolometer structure. (b) Two measurements performed
on the same bolometer structure before and after nal membrane etching.
7.4 Dielectric Bolometers for Infrared Detection 107
(a)
2 3 4 5 6 7 8
1.5
2.0
2.5
3.0
3.5
4.0
O
u
t
p
u
t

s
i
g
n
a
l

[
m
V
]
Radiated power density [mW/cm
2
]
(b)
0.0 0.1 0.2 0.3 0.4 0.5
-4
-2
0
2
4
Ir source
Room lighting
Daylight
O
u
t
p
u
t

s
i
g
n
a
l

[
m
V
]
Time [s]
FIGURE 7.26:
(a) Bolometer signal vs. IR power density. (b) Output signal dependent on different IR-
radiation: With IR radiator, with room light and with daylight. (Measurements taken with-
out an additional operational amplier.)
with a membrane thickness of around 100 m already shows an output signal. It shows a steep
rising slope, but the falling slope is less steep due to the large thermal capacitance of the silicon
substrate. A second measurement performed at a bolometer structure with a thinner membrane
shows a signal whose amplitude is doubled. Compared to the structure on the thick membrane
the rising and falling slopes are more steep.
To characterize the sensibility of the device the distance between the bolometer and the IR ra-
diator is continuously increased. (The measurement is taken without the additional operational
amplier close to the contact needle). From the technical data of the IR source one knows that
the radiated power at room temperature is P = 2.76 W. If spherical radiation is assumed, the
power density L in a distance r can be calculated by:
L =
P
4r
2
. (7.9)
Figure 7.26 (a) presents the output signal depending on the radiated power density. First, the
output signal increases continuously with an increase of the power density, but at a certain value
the output signal remains constant. From this is concluded that the capacitor on the membrane
is in an equilibrium state. Figure 7.26 (b) compares three measurements taken at different
conditions. The rst one is performed with the IR source in a distance of 5.3 cm generating
a distinctive signal. The second measurement is done without any IR source, but only the
radiation from the room lightning passes the aperture, if the chopper opens. The signal is much
smaller but still detectable. The third measurement is undertaken only with the daylight in
108 7 Devices
0 20 40 60 80 100
30
40
50
60
70
80
90
100
O
u
t
p
u
t

s
i
g
n
a
l

[
m
V
]
Chopper frequency [Hz]
FIGURE 7.27:
Output signal vs. chopper fre-
quency.
the laboratory and although the signal has decreased it is clearly detectable. This proves that
the bolometer exhibits a high sensitivity and can be used for infrared imaging, if the fact is
considered that the measurement is taken without the additional amplier.
The chopper frequency is also an important property for infrared imaging is. Image processing
requires a certain number of pictures per second and therefore the bolometer signal is investi-
gated with regard to the chopper frequency. Figure 7.27 shows a linear decrease of the output
signal, if the period of radiation and non radiation becomes shorter. However, at a frequency of
100 Hz the signal is still 35 mV and therefore detectable. The nal characterizations deals with
the dependence of the bolometer signal on the ambient temperature (Figure 7.28). The result
shows that an increased ambient temperature leads to a continuous loss of the signal amplitude
in the range up to 120 C, but there is still a detectable signal, even without the operational
amplier.
0.0 0.1 0.2 0.3 0.4 0.5
6
4
2
0
2
4
6

O
u
t
p
u
t

s
i
g
n
a
l

[
m
V
]
Time [s]
40 C
60 C
100 C
120 C
FIGURE 7.28:
Bolometer signal depen-
dent on the ambient tem-
perature.
7.4 Dielectric Bolometers for Infrared Detection 109
Concluding this section, dielectric bolometers have been successfully fabricated by sur-
face and silicon bulk micromachining using BST thin lms. The characterization turns out
detectable signals even if the bolometer is radiated only with daylight and the devices work at
least up to a frequency of 100 Hz. Therefore dielectric bolometers based on BST(70/30) are
suitable for the use in infrared imaging.
110 7 Devices
7.5 Piezoelectric Cantilevers on Metal Foil Substrates
This section describes the deposition of PZT thin lms on exible metal foils in order to benet
from the piezoelectric properties in a wide range of macro devices by maintaining low operation
voltages.
The experiments in the following section concentrate on stainless steel foils with a thickness
of 50 m, whereby different bottom electrode congurations are investigated: Deposition of
PZT directly on stainless steel, deposition of PZT on platinum coated stainless steel to provide
a similar surface to standard deposition on silicon substrates and nally the deposition of PZT
on stainless steel with a lanthanum nickel oxide (LNO) diffusion barrier [209, 210]. The PZT
precursor solution and the deposition procedure is the same as described in section 3.2.1. Since
the focus is on piezoelectric devices, PZT(45/55) is chosen for this task.
Figure 7.29 (a) shows the top view of a 500 nm PZT lm on Pt coated stainless steel and reveals
a dense lm with a grain size between 50 - 100 nm. XRD measurements reveal the crystal-
lographic orientation of PZT on different bottom electrode congurations (Figure 7.30 (b)).
Films prepared directly on stainless steel exhibit a random orientation with amounts of (100),
(101) and (111) orientation. PZT deposited on a LNO layer is less oriented and exhibits only
(100) and (101) orientation, whereas lms deposited on Pt covered foils show (100) and (101)
orientation, but also a strong (111) orientation, which is adapted from the Pt layer.
Polarization measurements up to E = 400 kV/cm on these lms are presented in Figure 7.31.
The lm directly deposited on the foil shows a hysteresis curve with a remanent polarization
of 33 C/cm
2
, which is more than on Pt/Si substrates with PZT(45/55), where usually values
around 26 C/cm
2
are achieved. One possible explanation is a reduced stress due to clamping
FIGURE 7.29:
Top view of a 500 nm PZT lm on
stainless steel with a Pt layer.
7.5 Piezoelectric Cantilevers on Metal Foil Substrates 111
20 25 30 35 40 45
PZT(101)
500 nm PZT on:
stainless steel with Pt
stainless steel with LaNiO
3
stainless steel
I
n
t
e
n
s
i
t
y

[
a
.
u
.
]
-2 [deg.]
PZT(100)
PZT(111) Pt(111)
FIGURE 7.30:
XRD measurements of PZT
lms (500 nm) on metal foils
with various bottom elec-
trode congurations (directly
on stainless steel, stainless
steel with an LaNiO
3
barrier,
stainless steel with platinum).
of the lm since the metal foils are more exible than usually used silicon substrates. The us-
age of an LNO diffusion barrier leads also to a P
r
= 33 C/cm
2
, but the hysteresis behavior is
less pronounced and the curve is not closed in the high voltage regime, instead the polarization
decreases. This indicates high electric losses. A further advanced result is achieved with Pt
coated stainless steel foils. Indeed the remanent polarization shows no further increase, but the
coercive eld decreases by one half to 4 V (80 kV/cm), similar to the coercive eld obtained
on Pt/Si substrates. Therefore, this hysteresis curve shows a steep drop around the coercive
eld, an increasing polarization in the high voltage regime and a closed behavior in saturation.
Furthermore, the polarization values are higher than on LNO and PZT directly deposited on
stainless steel. The results of the experiments suggest that PZT lms with 12 or more coatings
-25 -20 -15 -10 -5 0 5 10 15 20 25
-60
-40
-20
0
20
40
60
P
o
l
a
r
i
z
a
t
i
o
n

[

C
/
c
m
2
]
Voltage [V]
500 nm PZT on:
stainless steel
stainless steel with LaNiO
3
stainless steel with Pt
FIGURE 7.31:
Polarization measurements
taken at 500 nm PZT lms
deposited on stainless steel
with various bottom electrode
congurations.
112 7 Devices
-25 -20 -15 -10 -5 0 5 10 15 20 25
-50
-40
-30
-20
-10
0
10
20
30
40
50
P
o
l
a
r
i
z
a
t
i
o
n

[

C
/
c
m
2
]
Voltage [V]
FIGURE 7.32:
Polarization of a 750 nm thick
PZT lm deposited on 200 nm
Pt on top of polished stainless
steel.
on Pt coated stainless steel are a good candidates for the fabrication of piezoelectric devices
using metal foils.
However, due to the relatively thick substrate of 50 m and leakage currents due to the sur-
face roughness, thicker lms are desired to increase the piezoelectric force and to reduce the
electrically losses. Figure 7.32 shows the polarization measurement performed on a sample
with 750 nm PZT deposited on polished stainless steel covered with a 200 nm Pt electrode.
The hysteresis curve is symmetric and reveals an improvement of the remanent polarization to
38 C/cm
2
.
After material characterization piezoelectric cantilevers are fabricated using a method which
goes without complicated and cost extensive technologies. A one inch piece of metal foil is
polished and then sputtered with a Pt electrode. Afterwards 750 nm PZT are deposited by CSD
Cantilevers
Probe
needles
FIGURE 7.33:
Picture of two cantilevers contacted
with probe needles in the laser mea-
surement setup.
7.5 Piezoelectric Cantilevers on Metal Foil Substrates 113
(a)
-30 -20 -10 0 10 20 30
0
2
4
6
8
10
D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Voltage [V]
(b)
0 2000 4000 6000 8000
0
2
4
6
8
10
12
30 V
20 V
10 V
D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Length [m]
(c)
500 600 700 800 900
0
5
10
15
20
25
30
35
40
45
50
55
D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Frequency [Hz]
(d)
0 2000 4000 6000 8000
0
1000
2000
3000
4000
5000
R
e
s
o
n
a
n
c
e

f
r
e
q
u
e
n
c
y

[
H
z
]
Length [m]
FIGURE 7.34:
Measurements of cantilevers coated with 750 nm PZT on top of a Pt coated 50 m thick
stainless steel foil (all cantilevers are 500 m in width). (a) Displacement vs. voltage
measurement of an 8000 m long structure. (b) Displacement vs. cantilever length at
different driving voltages. (c) Displacement vs. frequency sweep of a 6000 m long
structure. (d) Resonance frequency vs. cantilever length.
and nally a number of Pt strips serving as top contact are deposited by lift-off technology.
The length of those top electrodes is between 600 to 8000 m and the width between 100 to
500 m. Finally, the foil is cutted with a wafer saw into cantilevers. No further micromachining
is necessary. Figure 7.33 shows a picture with two of those cantilevers. For displacement
measurements the structures are mounted in the laser measurement setup and contacted with
probe needles.
Measurements of the cantilevers reveal the typical buttery shaped displacement curves, if PZT
is used for the piezoelectric activation (Figure 7.34 (a)). Measurements with different ampli-
114 7 Devices
(a)
0 2000 4000 6000 8000
0
5
10
15
20
25
30
35
3x
stainless steel substrate
50 m 35 m
10 V
20 V
30 V
D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Length [m]
(b)
2000 3000 4000 5000 6000 7000 8000
0
500
1000
1500
2000
50 m stainless steel
35 m stainless steel
R
e
s
o
n
a
n
c
e

f
r
e
q
u
e
n
c
y

[
H
z
]
Length [m]
FIGURE 7.35:
Inuence of the substrate thickness on cantilevers with various length. (a) Displacement
vs. cantilever length (b) Resonance frequency vs. cantilever length.
tudes are undertaken and show that an 8000 m long structure exhibits a maximum displace-
ment of 10 m. Note, here the substrate is 50 m and the PZT is clearly below 1 m thick,
so that the ratio between the active layer and the substrate is very large. Further displacement
measurements are performed on structures with different length and the maximum deection
at 10 V, 20 V and 30 V are displayed in Figure 7.34 (b). Thereby, the deection increases
steadily with a quadratic behavior. Besides deection measurements, resonance frequencies are
of special interest in such long structures. Frequency dependent displacement measurements at
unipolar voltages with an amplitude of 5 V are undertaken and one example is plotted in Fig-
ure 7.34 (c), whereby each point depicts the maximum displacement at the certain frequency.
The cantilever is 6000 m long and at low frequencies the displacement is small due to the
low driving voltage but at 683 Hz the displacement increases to more than 50 m. Thereby the
displacement measurement reveals a circle as expected in resonance (compare section 6.1). In
Figure 7.34 (d) the resonance frequencies of all cantilevers are plotted and reveal a decreasing
behavior with increasing cantilever length, while the maximum of 4760 Hz is observed for a
600 m long structure.
In the next paragraph the inuence of the substrate thickness is investigated in detail. A 750 nm
PZT lm is deposited on a 35 m thick stainless steel substrate from which cantilevers are
fabricated as described before. Comparing the results of displacement measurements turns out
an increase of the deection by a factor of three. The maximum observed deection from a
8000 m long structure is 32 m , if 30 V are applied (Figure 7.35 (a)). The comparison of the
7.5 Piezoelectric Cantilevers on Metal Foil Substrates 115
(a)
-12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12
-50
-40
-30
-20
-10
0
10
20
30
40
50
P
o
l
a
r
i
z
a
t
i
o
n

[

C
/
c
m
2
]
Voltage [V]
(b)
3000 4000 5000 6000 7000 8000 9000
0
2
4
6
8
10
12
14
16
18
20
6.6 V
10 V
10 V
15 V
D
i
s
p
l
a
c
e
m
e
n
t

[

m
]
Length [m]
35 m stainless steel
750 nm PZT
500 nm PZT
FIGURE 7.36:
(a) Polarization measurement of a 500 nm PZT lm on a Pt coated polished steel foil.
(b) Displacement vs. cantilever length of cantilevers with different PZT thicknesses.
resonance frequencies reveals that cantilevers fabricated on thinner substrates exhibit a lower
resonance frequency (Figure 7.35 (b)), due to their weaker structure.
After enhancing the total displacement by reducing the substrate thickness the next aim is the
reduction of the driving voltage. Since the polished stainless steel substrates exhibit a lower
surface roughness also the problem with spikes penetrating the PZT and shorting the structures
is reduced. Therefore, the deposition of thinner PZT is possible and the same electric elds
are reached at lower operation voltages. Figure 7.36 (a) shows a polarization measurement,
which is undertaken at a 500 nm PZT lm on a Pt coated stainless steel substrate (35 m).
The top electrode has a size of 2.4 mm
2
and the hysteresis shape of the curve proves that the
lm is dense over this large area. Figure 7.36 (b) shows the comparison of the displacement
of structures with 500 nm PZT to those coated with 750 nm PZT. Applying the same electric
eld to the cantilevers results in almost the same displacement, but the total driving voltage is
reduced by 2/3 from 15 V to 10 V and from 10 V to 6.6 V respectively.
116 7 Devices
117
8 Conclusions
8.1 Summary
T
he present work deals with the integration of ferroelectric thin lms into microsystems
based on silicon and the use of this material class on low cost metal foils. The special
piezoelectric and dielectric properties of those functional materials are utilized for the fabri-
cation of integrated microwave and infrared applications in order to replace commonly used
components and to enhance the performance.
Ferroelectric thin lms are deposited and characterized in the rst part of this work:
Due to the piezoelectric properties lead zirconate titanate (PZT) and lead hafnate titanate
(PHT) lms are deposited using chemical solution deposition (CSD) mainly in a thickness
range between 100 nm and 700 nm. Performing electromechanical measurements it could be
shown that PZT with a ratio of 45 % Zr and 55 % Ti, close to the morphotropic phase boundary,
exhibits the highest piezoelectric coefcient d
33
=115 pm/V compared to other compositions
and is therefore intensively investigated. Further measurements prove that the piezoelectric
properties are independent on the lm thickness until the microstructure is affected.
Reliability is a major concern for the integration of ferroelectric thin lms. For the rst time
the electromechanical fatigue is measured by double beam laser interferomtry and compared to
electrical fatigue. It is found that the electrical polarization loss and the loss of d
33
are identical
in thick lms, but the loss of d
33
becomes less than the loss of polarization with decreasing lm
thicknesses, if the material is operated with bipolar voltage pulses. The drawback of fatigue
is successfully avoided by applying unipolar (non-switching) voltage pulses, which is possible
in MEMS, since the electromechanical strain is always directed in the positive direction. The
piezoelectric coefcient remains constant until at least 10
9
cycles and therefore PZT(45/55) is
chosen for the application in MEMS.
PZT(45/55) lms deposited on platinum covered stainless steel foils grow with preferential
(111) orientation and exhibit a remanent polarization of P
r
= 38 C/cm
2
, which is 1/3 more
than observed on platinumcoated silicon substrates. Since the polarization and the piezoelectric
effect are coupled it can be concluded that the piezoelectric coefcient is also improved and
the deposition of PZT on exibel stainless steel foils opens a new eld of applications for
electromechanical operated microsystems.
118 8 Conclusions
For the rst time PHT thin lms are characterized with regard to the application in MEMS. The
experiments are concentrated on the composition of 45 % Ha and 55 % Ti, since similar elec-
trical and electromechanical properties compared to PZT are expected. Additional lanthanum
doping leads to slim hystreresis curves during polarization switching and electromechanical
measurements conrm this behavior for the piezoelectric coefcient, causing a change from
piezoelectric to electrostrictive behavior with increasing La amount. Films with 10 % La
doping turn out an electric eld independent piezoelectric coefcient of d
33
=60 pm/V and
strain measurements exhibit a nearly linear behavior above 200 kV/cm, which is advantageous
for the application in MEMS.
In a second task, a technology platform is developed for the integration of ferroelectric
thin lms into silicon based microsystems.
Plasma etching with Ar and CF
4
in combination with photolithography is applied for the
pattering of PZT, BST and Pt layers. To release cantilever and membrane structures from the
substrate silicon bulk micromachining and silicon surface micromachining are applied. Liquid
TMAH etches silicon anisotropic with an etch rate of 32 m/h, if it is diluted to 20 % at 80 C.
Two newly developed processes belong to the group of surface micromachining processes and
uses either a SF
6
containing plasma or HF vapor. In the rst case the cantilever structures
are released by an isotropic etch process, which removes the silicon under the stuctures from
both sides until the cantilever is free. The release of cantilever structures by HF vapor etching
implies the use of silicon on insulator (SOI) substrates. The burried oxide layer is removed
by HF vapor, seperating the silicon device layer which serves as cantilever substrate from the
silicon handle layer. The advantage of HF vapor compared to liquid HF is the avoidance of
adhesion by maintaining a good surface quality. A further advantage of SOI wafers is the
exactly dened device layer, which can be thicker than achievable with SiO
2
substrate layers.
The application of those surface micromachining technologies leads to a several times higher
integration density.
Cantilevers with length between 50 m and 1600 m and overall thicknesses below 1 m
are fabricated using the described technologies. The width of the cantilevers are in the range
between 40 m and 400 m, whereby the width is not limited, if backside etching with TMAH
is used. A maximum quasi-static deection of 79 m is obtained from the 1600 m long
structure if a voltage of only 5 V is applied. This is the highest deection ever observed at
such low voltages and several times more than can be achieved with electrostatic actuation
principles. A maximum resonance frequency of 46.3 kHz is measured for single side suspended
8.1 Summary 119
cantilevers (350 m long, 6.5 m thick), which is an important fact, since in resonance, the
driving voltage reduces by a factor of six while maintaining high deection.
All displacement and resonance frequency measurements are in good agreement with FEM
simulations and therefore the model is used to calculate a sufcient contact force of 12.2 N,
for a contact clearance of 10 m.
To form integrated micro-switches from piezoelectric actuated cantilevers, for the rst time
freestanding metal contacts are integrated on the same substrate. The complex process is based
on the application of sacricial photoresist in combination with electroplating of copper.
The combination of ferroelectric thin lms together with the application of the devel-
oped technologies and freestanding copper contacts enables the fabrication of a variety of
devices:
1. A novel concept of a piezoelectric driven micro-relay with a galvanic separation be-
tween driving circuit and signal contact is demonstrated by extending the concept of a
single side suspended cantilever to a double side suspended bridge. This is advantageous
in terms of mechanical stability and stress compensation. A deection of 13.3 m and a
maximum resonance frequency of 100 kHz are measured and conrmed by FEM simula-
tions.
2. For the rst time a piezoelectric driven MW-switch is processed by embedding two
micro-relays in a complex microwave test design in form of a coplanar wave guide
(CPW). Thereby, the application of the newly invented silicon surface micromachin-
ing technologies yield the possibility to placed the micro-relays between the center and
ground lines to short the CPW signal lines in order to change the microwave transmission
characteristics. The switching level is determined to be better than 20 dB up to 20 GHz.
3. Further devices working in microwave range are thin lm bulk acoustic resonators
(TFBARs). A novel design in combination with electrostrictive BST, which is used for
the rst time in TFBARs, shows a capacitance characteristic with a pronounced peak at
6.2 GHz. Acoustically isolation is achieved by underetching the membrane, which solely
consists of the electrode and the BST lm. The measured results are supported by theo-
retical considerations.
This novel process avoids the deposition of a reector stack or a membrane etched with
complex silicon bulk micromachining. By the application of BST lms one additional de-
120 8 Conclusions
gree of freedom is achieved since the permittivity of BST depends on the applied electric
eld (tunability) and therefore the overall capacitance of the TFBAR can be changed.
4. BST thin lms are also applied for the processing of a dielectric bolometer for infrared
applications. Measurements up to 100 Hz using a chopper technique prove a high sensi-
tivity by detecting the infrared radiation of day light.
5. For the rst time exible stainless steel foils are coated with PZT using the CSD methode
in order to fabricate piezoelectric cantilevers on metal foil substrates. A number of
cantilevers are processed and the structures are up to 8 mm long and 0.5 mm in width.
Measurements show a maximum displacement of 32 m on 35 m thick substrates. A
reduction of the driving voltage by 1/3 is achieved by the reduction of the PZT lm
thickness due to an improved substrate surface.
The experiments opens a new eld for the application of piezoelectric thin lms, since
the device processing is not reliant on expensive micromachining technologies but rather
the use of ne mechanical techniques is sufcient.
8.2 Outlook
The present thesis provides the essential technologies for the design and fabrication of
future microsystems. Thereby, the approach to use piezoelectric micro-relays in microwave
applications is especially encouraging, since it promise low operating voltages, low power
consumption and high reliability. By using a number of micro-relays in an appropriate
microwave circuit design the fabrication of numerous MW-devices is possible e.g. multi-bit
reecting phase shifters. Thereby, several micro-switches are in parallel conguration inserted
in a microwave signal line. By closing single switches the transmission characteristic changes
and therefore the signal phase shifts by a certain degree.
The deposition of PZT thin lms on metall foils is also an encouraging idea. Detailed
investigations are suggested to conrme the explanation for the improved ferroelectric proper-
ties on stainless steel substrates. A further goal is the reduction of the PZT lm thickness by
improving the substrate surface in order to reduce the operation voltage.
Manifold devices are possible e.g. controllable micromirrors, moveable spirals or cantilevers,
which bends in both directions, since the front and backside can be coated with PZT and
electrodes.
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Lebenslauf

Persnliche Daten
Name: Carsten Kgeler
Geburtsdatum: 20. August 1973
Geburtsort: Rheda-Wiedenbrck
Familienstand: ledig

Schulbildung
08/80 07/84 Grundschule Rheda-Wiedenbrck
08/84 06/90 Realschule Rheda-Wiedenbrck
08/90 06/93 Stdtische Kollegschule fr Metall- und Elektroberufe
Bielefeld

Wehrdienst
07/93 06/94 Panzergrenadierbataillon 212, Augustdorf

Studium
10/94 06/01 Studium der Elektrotechnik an der Rheinisch-
Westflischen Technischen Hochschule Aachen

Berufliche Ttigkeit

07/01 - 07/06 Wissenschaftlicher Mitarbeiter am Institut fr
Werkstoffe der Elektrotechnik der RWTH-Aachen

seit 08/06 Wissenschaftlicher Mitarbeiter am Forschungszentrum
J lich

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