ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

Lecture Summary Module 4

Embedded System Design Issues Learning Outcome: an ability to design and implement a microcontroller-based embedded system Learning Objectives: 4-1. design an interface that allows a microcontroller port pin to control a D.C. load (e.g., motor) 4-2. describe how optical isolation can be used to protect microcontroller port pins used as either inputs or outputs 4-3. describe how a scanned keypad works 4-4. describe the operation of a rotary pulse generator (RPG) and cite some potential applications 4-5. describe how a stepper motor works and be able to distinguish between full- and half-step modes 4-6. describe how port expansion can be accomplished using shift registers 4-7. design an interface that allows a microcontroller to communication with an LCD 4-8. design a regulated power supply 4-9. form a project team consisting of 2-4 students 4-10. choose a project idea and write a proposal 4-11. design the hardware and software necessary to realize the project idea 4-12. design, fabricate, and test a printed circuit board (honors contract) 4-13. package the finished system 4-14. demonstrate the projects functionality to the course staff 4-15. write a formal report documenting the embedded system design process

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

Lecture Summary Module 4-A

PCB Fabrication and Layout Basics Reference: Motorola App Note AN1259, PADS Tutorials (Sparkfun) overview copper foil laminated onto substrate (typically FR4 fiberglass reinforced epoxy) etch resist applied, pattern exposed, uncured resist washed off (nasty chemicals) drilling and plating how vias (connections between layers) are made solder mask prevents copper from corroding and (excess) solder from sticking silkscreen (legend) printed labels, component outlines typical tolerances 1 mil = 0.001 inch drill hole size variance; +5 to -3 mils drill hole alignment: 5 mils relative to center smallest drill size 20 mil layer-to-layer alignment 3 mils minimum annular ring 5 mils minimum pad size = drill hole size + 20 mils smallest trace/space 6/6 mils (8/8 preferred) solder mask registration 3 mils silkscreen registration 10 mils basic layout guidelines use minimum trace/space of 10/12 mils power/ground traces should be as big as possible (at least 40-60 mils, 100 mils better) decoupling capacitors should be placed as close to each IC as possible use surface mount components where possible to save space provide space and mechanical support for connectors, heat sinks, and standoffs use headers to provide access to key signals (as well as spare microcontroller pins) EMI considerations sources microcontrollers, ESD, transmitters, transients, AC supplies, lightning clock circuitry usually biggest generator of wide-band noise coupling through wires (PCB traces) running through a noisy environment through common impedances (shared power supply and ground wires) through electromagnetic radiation designing for electromagnetic compatibility (EMC) goal is for circuit to not adversely affect its environment and to not be adversely affected by its environment remedies decrease emissions requires proper system design and possibly shielding increase immunity decrease susceptibility to noise by hardening circuit design and using shielding 2

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

EMI considerations, continued separation of circuits on a PCB pay attention to potential routing of circuits between subsystems high current/voltage digital analog

Separation of digital circuitry (left) from high current/voltage AC circuitry (right)and what happens if a trace is undersized! ground layout is the most important PCB layout design consideration - most EMI problems can be resolved using practical and efficient grounding methods noise can be coupled into other circuits by common impedance dynamic DC offset can be created that produces a high-frequency AC component of noise (affects low-level analog circuitry like preamps and ATD inputs) ground layout design tips separate digital logic and low-level analog circuits provide as many parallel pathways to ground as possible (ground plane) use single-point/star-point grounding if cant use ground plane use short/wide traces to reduce trace inductance use 45 turns rather than 90 turns to reduce transmission reflections (caused by impedance mismatch at corner) decrease size of ground loops as much as possible (single-point power system)

Single-point power system for 2-layer PCB 3

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

EMI considerations, continued IC decoupling capacitor placement as physically close to IC as possible for surface mount components, place halfway between power and ground use 0.1 F for system frequencies up to 15 MHz above 15 MHz, use 0.01 F decoupling capacitors power terminal decoupling (bulk) capacitor placement as physically close to power input terminal/connector as possible purpose of bulk capacitor is to help recharge the IC decoupling capacitors value is not critical (10 F typical), but may need multiple bulk capacitors if have a large number of ICs also include 0.1 F capacitor to decouple high-frequency noise at power input terminal high frequency noise filters use if additional filtering needed to isolate a circuit for noise place filter as physically close to part as possible ferrite beads can also be used to filter out unwanted system noise signal layout clock, reset, and interrupt lines are the most sensitive digital signals if analog and digital signals must be mixed, make sure the lines cross (on opposite sides of the board) at 90 angles (to reduce cross-coupling) ATD performance can be adversely affected by reference voltage lines (route directly from power supply and LPF using 1 K resistor and 1.0 F capacitor) follow manufactureers guidelines for crystal or ceramic resonator layout guidelines (may also need discrete components for PLL filter) 4

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

Lecture Summary Module 4-B

External Microcontroller Interfaces switching D.C. loads o basic BJT circuit with low side (NPN) device (current controlled switch) ICmax continuous VCE breakdown hFE (D.C. current gain) IC = hFE x IB use Darlington to get large IC with large hFE use optical isolation to protect microcontroller pin from switching circuit failure

Optically isolated BJT

Vcc VL

VL
LOAD

R2 active low port pin

NPN BJT

R1 Assume switching 1 amp load, and that h of transistor o basic MOSFET circuit with low side N-channel device (voltage controlled switch) IDmax continuous VDS breakdown rDS(on)

VL
LOAD

voltage-controlled switch N-channel power MOSFET

Port Pin

D S

o inductive loads require arc suppression diode Energy stored in an inductive load must be dissipated, otherwise the inductive kickback can damage the switching device.

VL

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

optical isolation of inputs o helps prevent overvoltage and ESD-induced damage o eliminates ground loops

| +

Vcc L = closed H = open

Isolated Power Supply (or Battery)

Remote Switch

scanned keypad (matrix)

row return lines

Scan lines are active low (and mutually exclusive) key press determined by concatenation of scan and row return codes, and using as look-up table index (may have to debounce in software). rotary pulse generator (RPG)

active low column scan lines

Determine direction of rotation by concatenating previous and current codes, and using as look-up table index

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

position control o numerous applications o complications inertia/loading holding vs. step current gear backlash o reasons steppers are a good choice resolution speed wide torque range available simple/efficient drive circuitry o full and half step modes

standard (parallel port) LCD interface

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

digitally controlled potentiometer (example: Xicor) o drop in replacement for analog potentiometer o saved wiper position loaded on power-up o can save up to 4 wiper positions o 2-wire serial interface o 10-bit resolution

digital thermometer (example: DS18S20) o unique 64-bit serial code o 9-bit resolution o 0.5 C accuracy (-10 C to +85 C) o 1-wire serial interface (need to toggle DDR bit) o multidrop capability for distributed applications o no additional external components required switch debouncer (example: MAX6816) o use where need to debounce SPST switch contacts o single/dual/octal versions available o version with tri-state outputs and change-of-state sensing available o higher-than-normal input voltage tolerance

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

Lecture Summary Module 4-C

Basic Regulated Power Supply Design

basic unregulated DC power supplies half-wave supply transformer secondary voltage (RMS) amount of ripple proportional to load and inversely proportional to C analysis based on amount of ripple willing to tolerate

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

full-wave supply transformer secondary voltage (RMS) amount of ripple proportional to load and inversely proportional to C analysis based on amount of ripple willing to tolerate

whats in an unregulated DC wall wart

10

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

linear regulator circuits basic positive voltage linear regulator 78xx series ripple tolerance dropout voltage key parameters from data sheet

11

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

basic negative voltage linear regulator 79xx series can co-exist w/ + supply if have center-tapped transformer (same basic parameters as + supply IC) analysis ripple tolerance and dropout voltage vs. C needed efficiency calculation

heat sink thermal resistance (lower is better) sized based on temperature rise willing to tolerate cooler operation leads to longer life (reliability analysis later) aside: difference between TO220 and TO3 packages

low dropout linear regulator low means 0.3V rather than 2.5V can tolerate less ripple, means larger C needed regulated output not as clean (more noise) significantly more efficient than standard 78xx linear regulator 12

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

Lecture Summary Module 4-D

Hardware and Software Development Tips Reference: Various on-line sources memory models primary differences between general-purpose and embedded processor memory models flat (no memory hierarchy, no virtual memory) non-infinite SRAM data space and flash program space non-homogeneous memory types SRAM read/write (volatile unless battery backup used) Flash read only (non-volatile in-circuit, sector erasable and reprogrammable) EEPROM non-volatile, read mostly (in-circuit byte erasable and reprogrammable) how differences in memory models influence way in which HLL code written dont use too high a level of abstraction avoid use of big library routines (e.g. printf) avoid dynamic memory allocation avoid complex data structures avoid recursive constructs watch declaration (char, int, long) treat C like a macro-assembly language remember that floating point support is generally emulated by lengthy software routines remember that using table lookup might be a better approach for transcendental functions (sin, cos, tan, log) than calculation via software emulation discussion topics key characteristics of real time system mission critical timing constraints service latencies known and tightly bounded typically event-driven require low overhead context switching meaning of fail safe in the context of embedded software A fail-safe or fail-secure device is one that, in the event of failure, responds in a way that will cause no harm to other devices or danger to personnel examples application code organization polled program-driven (no interrupts) round robin polling loop simple, but potentially large (loosely bounded) latency interrupt- (event-) driven all processing in response to interrupts CPU can sleep in-between interrupts, reducing power dissipation command- or flag-driven (also referred to as state machine) hybrid of program- and interrupt-driven 13

ECE 362 IMPACT

Microprocessor System Design and Interfacing

2013 by D. G. Meyer

service routines/code blocks activated by command strings received flags set by interrupt service routines real-time OS kernel (driven by timer interrupt) data structure provides list of currently enabled tasks timer interrupt used to determine when tasks rolled in/out can vary relative priority of enabled tasks by changing time slice allocation dealing with random behavior random digital input values check internal/external pull devices (resistors), check for cold solder joints consistently wrong digital input values check programming of port pins, potential ESD damage reading same value from adjacent pins check for solder bridges, cold solder joints, floating adjacent pins (flux between pads w/ no solder = capacitor) values output dont appear on port pins check programming of port pins and drive register (where applicable), also if open drain some output pins always low/high stuck at faultnot good same value output on adjacent pins check for solder bridges, damaged chip analog input values always zero check ADC reference voltage, programming, device driver analog input values are random check programming/device driver lower two bits (or so) of analog values read are random this is normal SCI/SPI not receiving/transmitting data most likely a programming or configuration issue (use logic analyzer to check Tx and Rx) SCI is alive, but cant talk to PC com port make sure using RS232 (not RS232C), that Tx-A connected to Rx-B (and vice-versa), and that a NULL MODEM cable is used applications run for a few seconds and then crash check for random sources of interrupts and stack creep microcontroller gets too warm for comfort check for fighting, input signals too close to VILmax and VIHmin, excessive sourcing/sinking current avoid really stupid tricks (RST) do not solder parts, attach wires, connect probes, etc. while your board is powered up temporary short circuits can instantly fry port pins, other components the soldering iron tip is GROUNDED do not attempt to probe pads of surface mount parts nothing to hook on to this is why you need headers do not connect port pins directly to power supply rails to obtain a 1 or 0 power supply always wins, port pin always loses always use a pull -up/-down resistor (10 K is a good value) for testing ADC inputs, use a potentiometer do not attempt to power different parts of your circuit with different external supplies small voltage @ infinite current = blown trace / burnt finger look around room for permanently scared ECE 362 students use a SINGLE power supply for all logic components 14