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1. INTRODUCTION
1.1 EMBEDDED SYSTEMS:
Embedded systems are designed to do some specific task rather than be a general-purpose computer for multiple tasks.Some also has real time performance constraints that must be met, for reason such as safety and usability; others may ha e lo! or no performance re"uirements, allo!ing the system hard!are to be simplified to reduce costs. #n embedded system is not al!ays a separate block - ery often it is physically built-in to the de ice it is controlling. The soft!are !ritten for embedded systems is often called firm!are, and is stored in read-only memory or flash con ector chips rather than a disk dri e. $t often runs !ith limited computer hard!are resources% small or no keyboard, screen, and little memory. &SM based !ireless home appliances monitoring and control using &SM,!hich enables the user to remotely control s!itching of domestic appliances. 'ust by dialing keypad of remote telephone, from !here you are calling you can perform () * (++ operation of the home appliances
Schematic diagram:
1.!.! Micr"c"(tr"&&er:
The microcontroller #T78S2, !ith 6ull up resistors at 6ort/ and crystal oscillator of ,,./28- M9: crystal in con;unction !ith couple of capacitors of is placed at ,7th < ,8th pins of 78S2, to make it !ork =e>ecute? properly
1.!.+ IR recei,er:
TS(6 is an $5 recei er. $t acts an input de ice. Ae r using three sensors .$t senses the $5 signal reflected by the obstacle and gi es the instruction to microcontroller. $t is connected port-./, p-., and p-.- pins of microcontroller.
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!. MICROCONTRO
!.1 INTRODUCTION:
ER HARD-ARE
DESCRIPTION
# Micro controller consists of a po!erful 16U tightly coupled !ith memory =5#M, 5(M or E65(M?, arious $ * ( features such as Serial ports, 6arallel 6orts, Timer*1ounters, $nterrupt 1ontroller, 3ata #c"uisition interfaces-#nalog to 3igital 1on erter =#31?, 3igital to #nalog 1on erter =#31?, e erything integrated onto a single Silicon 1hip. $t does not mean that any micro controller should ha e all the abo e said features on chip, 3epending on the need and area of application for !hich it is designed, The ()-19$6 features present in it may or may not include all the indi idual section said abo e.
ER:
$n ,87,,$ntel corporation introduced an 7 bit microcontroller called the 7/2,.This microcontroller had ,-7 bytes of 5#M,@B bytes of on-chip 5(M, t!o timers, one serial port and @ ports=each 7-bits !ide?all on single chip. #t that time it !as also referred to as a Csystem on a chipD. The 7/2, is an 7-bit processor, meaning that the 16U can !ork on only 7-bits of data at a time. 3ata larger than 7-bits has to be broken into 7-bit pieces to be processed by the 16U. The 7/2, can ha e a ma>imum of E@B bytes of 5(M, many manufacturers ha e put only @Bbytes on chip. The ma1"r 2eat$re3 "4 .56it Micr" c"(tr"&&er ATME .7C01: 7 Bit 16U optimi:ed for control applications E>tensi e Boolean processing =Single - bit 4ogic? 1apabilities. (n - 1hip +lash 6rogram Memory (n - 1hip 3ata 5#M Bi-directional and $ndi idually #ddressable $*( 4ines Multiple ,E-Bit Timer*1ounters +ull 3uple> U#5T Multiple Source * 0ector * 6riority $nterrupt Structure (n - 1hip (scillator and 1lock circuitry. (n - 1hip EE65(M (ne Serial communication port www.final-yearproject.com | www.finalyearthesis.com
CPU
Bus control
OSCILLATO R
BUS CONTROL
4 I/O PORTS
SERIAL PORT
PO P2 P1 P3
TXD
RXD
The 67812, pro ides the follo!ing standard features% @B bytes of +lash, ,-7 bytes of 5#M, .- $*( lines, t!o ,E-bit timer*counters, fi e ector t!o-le el interrupt architecture, a full duple> serial port, and on-chip oscillator and clock circuitry. $n addition, the 67812, is designed !ith static logic for operation do!n to :ero fre"uency and supports t!o soft!are selectable po!er sa ing modes. The $dle Mode stops the 16U !hile allo!ing the 5#M, timer*counters, serial port and interrupt system to continue functioning. The 6o!er-do!n Mode sa es the 5#M contents but free:es the oscillator disabling all other chip functions until the ne>t hard!are reset.
(0033)H
RESE T
001BH
+ig @
0013H
000BH
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0003H
!.).! Data Mem"r': The right half of +igure . sho!s the internal and e>ternal data memory spaces a ailable on 6hilips +lash microcontrollers. +ig.E sho!s a hard!are configuration for accessing up to -B bytes of e>ternal 5#M. $n this case, the 16U e>ecutes from internal flash. 6ort/ ser es as a multiple>ed address*data bus to the 5#M, and . lines of 6ort are used to page the 5#M. The 16U generates 53 and A5 signals as needed during e>ternal 5#M accesses. Fou can assign up to E@B bytes of e>ternal data memory. E>ternal data memory addresses can be either , or -bytes !ide. (ne-byte addresses are often used in con;unction !ith one or more other $*( lines to page the 5#M, as sho!n in +ig.E. T!o-byte addresses can also be used, in !hich case the high address byte is emitted at 6ort-.
+ig 2
!.+ RE:ISTERS:
$n the 16U, registers are used to store information temporarily. That information could be a byte of data to be processed, or an address pointing to the data to be fetched. The ast ma;ority of 7/2, registers are 7Gbit registers. $n the 7/2, there is only one data type% 7bits. The 7bits of a register are should in the diagram from the www.final-yearproject.com | www.finalyearthesis.com
MSB =most significant bit? 3H to the 4SB =least significant bit? 3/. Aith an 7-bit data type, any data larger than 7bits must be broken into 7-bit chunks before it is processed.
Since there are a large number of registers in the 7/2,, !e !ill concentrate on some of the !idely used general-purpose registers and co er special registers in future chapters. 3H 3E 32 3@ 3. 3- 3, 3/
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+ig E
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0/e' o''e t#'+ $' 8011231 to $' e3ter'$% 4e4ory- "ort 0 "ro5#*es bot/ $**ress $'* *$t$)
P"rt 1= 6ort , occupies a total of 7-pins =pins,-7?. $t can be used as input or output. $n contrast to port /, this port does not need any pull-up resistors since it already has pullup resistors internally. Upon reset, port, is configured as an input port. P"rt !: 6ort - occupies a total 7 pins =pins -,--7?. $t can be used as input or output. 9o!e er, in 7/.,-based systems, port- is also designated as #7-#,2, indicating its dual function. Since an 7/2,*., is capable of accessing E@B bytes of e>ternal memory, it needs a path for the ,E bits of the address. P"rt ) 6ort . occupies a total of 7 pins =pins ,/-,H?. $t can be used as input or output. 6. does not need any pull-up resistors, ;ust as 6, and 6- did not. #lthough 6ort . is configured as an input port upon reset, this is not the !ay it is most commonly used. 6ort . has the additional function of pro iding some e>tremely important signals such as interrupts. The belo! table pro ides these alternate functions of 6.. information applies to both 7/2, and 7/., chips. This is
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Table RST: 5eset input. # high on this pin for t!o machine cycles !hile the oscillator is running resets the de ice. A E>PRO:: 6rior to each reading from e>ternal memory, the microcontroller !ill set the lo!er address byte =#/-#H? on 6/ and immediately after that acti ates the output #4E. Upon recei ing signal from the #4E pin, the e>ternal register =H@91T.H. or H@91T.H2 circuit is usually embedded? memori:es the state of 6/ and uses it as an address for memory chip. $n the second part of the microcontrollerKs machine cycle, a signal on this pin stops being emitted and 6/ is used no! for data transmission =3ata Bus?. $n this !ay, by means of only one additional =and cheap? integrated circuit, data multiple>ing from the port is performed. This port at the same time used for data and address transmission. PSEN: 6rogram Store Enable is the read strobe to e>ternal program memory. Ahen the #T7812, is e>ecuting code from e>ternal program memory, 6SE) is acti ated t!ice each machine cycle, e>cept that t!o 6SE) acti ations are skipped during each access to e>ternal data memory. EA><PP: E>ternal #ccess Enable =E#? must be strapped to &)3 in order to enable the de ice to fetch code from e>ternal program memory locations starting at ////9 up to
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++++9. )ote, ho!e er, that if lock bit , is programmed, E# !ill be internally latched on reset. E# should be strapped to 011 for internal program e>ecutions. This pin also recei es the ,-- olt programming enable oltage =066? during +lash programming, for parts that re"uire ,-- olt 066. XTA 1 a(d XTA !: The 7/2, has an on-chip oscillator but re"uires an e>ternal clock to run it. Most often a "uart: crystal oscillator is connected to inputs LT#4,=pin,8? and LT#4-=pin,7?. The "uart: crystal oscillator connected to LT#4, and LT#4- also needs t!o capacitors of ./pf alue. (ne side of each capacitor is connected to the ground as sho!n in fig,. TIMERS: (n-chip timing*counting facility has pro ed the capabilities of the microcontroller for implementing the real time application. These includes pulse counting, fre"uency measurement, pulse !idth measurement, baud rate generation, etc,. 9a ing sufficient number of timer*counters may be a need in a certain design application. The 7/2, has t!o timers*counters. They can be used either as timers to generate a time delay or as counters to count e ents happening outside the microcontroller. 4et discuss ho! these timers are used to generate time delays and !e !ill also discuss ho! they are been used as e ent counters. BASIC RE:ISTERS O2 THE TIMER: Both Timer / and Timer , are ,E bits !ide. Since the 7/2, has an 7-bit architecture, each ,E-bit timer is accessed as t!o separate registers of lo! byte and high byte. TIMER / RE:ISTERS: The ,E-bit register of Timer / is accessed as lo! byte and high byte. the lo! byte register is called T4/=Timer / lo! byte?and the high byte register is referred to as T9/=Timer / high byte?.These register can be accessed like any other register, such as #,B,5/,5,,5-,etc.for e>ample, the instruction DM(0 T4/, M@+Dmo es the alue @+9 into T4/,the lo! byte of Timer /.These registers can also be read like any other register.
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3,, 3,/
38
37
3H
3E
32
3@
3.
3-
3,
3/
T4/
Timer , is also ,E-bit register is split into t!o bytes, referred to as T4, =Timer , lo! byte? and T9, =Timer , high byte?.these registers are accessible n the same !ay as the register of Timer /. TMOD ?timer m"de@ RE:ISTER: Both timers / and , use the same register, called TM(3, to set the arious timer operation modes. TM(3 is an 7-bit register in !hich the lo!er @ bits are set aside for Timer / and the upper @ bits for Timer ,.in each case; the lo!er - bits are used to set the timer mode and the upper - bits to specify the operation.
TCON RE:ISTER: T1() controls the timer*counter operations. The lo!er four bits of T1() cater to interrupt functions, but the upper four bits are for timer operations. The details of the T1() register are sho!n belo!. MSB
T61 IT0 TR1 T60 TR0 IE1 IT1
4SB
IE0
Seria& C"mm$(icati"(: 1omputers can transfer data in t!o !ays% parallel and serial. $n parallel data transfers, often 7 or more lines =!ire conductors? are used to transfer data to a de ice that is only a fe! feet a!ay. E>amples of parallel transfers are printers and hard disks; each uses cables !ith many !ire strips. #lthough in such cases a lot of data can be transferred in a short amount of time by using many !ires in parallel, the distance cannot be great. To transfer to a de ice located many meters a!ay, the serial method is
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used. $n serial communication, the data is sent one bit at a time, in contrast to parallel communication, in !hich the data is sent a byte or more at a time. communication of the 7/2, is the topic of this chapter. only a fe! !ires. SBU2 RE:ISTER: SBU+ is an 7-bit register used solely for serial communication in the 7/2,. +or a byte of data to be transferred ia the TL3 line, it must be placed in the SBU+ register. Similarly, SBU+ holds the byte of data !hen it is recei ed by the 7/2,Ks 5L3 line. SBU+ can be accessed like any other register in the 7/2,. SCON ?3eria& c"(tr"&@ regi3ter The S1() register is an 7-bit register used to program the start bit, stop bit, and data bits of data framing, among other things. The follo!ing describes arious bits of the S1() register SM/ SM, SM5E) TB7 5B7 T$ 5$ Serial The 7/2, has serial
communication capability built into it, there by making possible fast data transfer using
!.A INTERRUPTS:
# single microcontroller can ser e se eral de ices. There are t!o !ays to do that% $)TE55U6TS or 6(44$)&. PO IN:: $n polling the microcontroller continuously monitors the status of a gi en de ice; !hen the status condition is met, it performs the ser ice .#fter that, it mo es on to monitor the ne>t de ice until each one is ser iced. #lthough polling can monitor the status of se eral de ices and ser e each of them as certain condition are met. INTERRUPTS: $n the interrupts method, !hene er any de ice needs its ser ice, the de ice notifies the microcontroller by sending it an interrupts signal. Upon recei ing an interrupt signal, the microcontroller interrupts !hate er it is doing and ser es the de ice. The program associated !ith the interrupts is called the interrupt ser ice routine =$S5?.or interrupt handler.
$n reality, only fi e interrupts are a ailable to the user in the 7/2,, but many manufacturersK data sheets state that there are si> interrupts since they include reset .the si> interrupts in the 7/2, are allocated as abo e. ,. -. Re3et. Ahen the reset pin is acti ated, the 7/2, ;umps to address T#" i(terr$%t3 are 3et a3ide 4"r the timer3 % one for Timer / and one location ////.this is the po!er-up reset. for Timer ,.Memory location ///B9 and //,B9 in the interrupt ector table belong to Timer / and Timer ,, respecti ely. .. T!o interrupts are set aside for hard!are e>ternal harder interrupts. 6in number ,-=6..-? and ,.=6...? in port . are for the e>ternal hard!are interrupts $)T/ and $)T,,respecti ely.These e>ternal interrupts are also referred to as EL, and EL-.Memory location ///.9 and //,.9 in the interrupt ector table are assigned to $)T/ and $)T,, respecti ely. @. Serial communication has a single interrupt that belongs to both recei e and transmit. The interrupt ector table location //-.9 belongs to this interrupt. Regi3ter3: $nterrupt Enable 5egister 3H 3E 32
ET2
3@
3.
ES
3ET1
3,
EX1
3/
ET0
EA (( EX0
I(terr$%t %ri"rit' $%"( re3t: Ahen the 7/2, is po!ered up, the priorities are assigned according to the belo! table. in the belo! table !e see, for e>ample, that if e>ternal hard!are interrupts / and , are acti ated at the same time, e>ternal interrupt / =$)T/? is responded to first. (nly after $)T/ has been ser iced is $)T, ser iced, since $)T, has the lo!er priority. $n reality, the priority scheme in the table is nothing but an internal polling se"uence in !hich the 7/2, polls the interrupts in the se"uence listed in the belo! table and responds accordingly. 7/2,*2- $nterrupt 6riority upon 5eset 9ighest to 4o!est 6riority E>ternal $nterrupt / Timer $nterrupt / E>ternal $nterrupt , =$)T/? =T+/? =$)T,?
Timer $nterrupt ,
=T+,?
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Serial 1ommunication Timer -=7/2- only? Setting interrupts priority !ith the $6 register
=5$JT$? T+-
communication capability built into it, there by making possible fast data transfer using
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RS!)! %i(3: 5S-.- cable, commonly referred to as the 3B--2 connector. $n labeling, 3B-26 refers to the plug connector =male? and 3B--2S is for the socket connector =female?. Since not all the pins are used in 61 cables, $BM introduced the 3B-8 0ersion of the serial $*( standard, !hich uses 8 pins only, as sho!n in table. DB57 %i( c"((ect"r ,-.@2 EH78 =(ut of computer and e>posed end of cable?
!.1/ TRANSMIT:
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3ata transmission in form of pulse train automatically starts on the pin 5L3 at the moment the data has been !ritten to the SBU+ register. $n fact, this process starts after any instruction being performed on this register. Upon all 7 bits ha e been sent, the bit T$ in the S1() register is automatically set.
!.11 RECEI<E:
Starts data recei ing through the pin 5L3 once t!o necessary conditions are met% bit 5E)N, and 5$N/ =both bits reside in the S1() register?. Upon 7 bits ha e been recei ed, the bit 5$ =register S1()? is automatically set, !hich indicates that one byte is recei ed.
Since, there are no ST#5T and ST(6 bits or any other bit e>cept data from the SBU+ register, this mode is mainly used on shorter distance !here the noise le el is minimal and !here operating rate is important. # typical e>ample for this is $*( port e>tension by adding cheap $1 circuit = shift registers H@91282, H@9128H and similar?.
$n Mode, ,/ bits are transmitted through or in follo!ing manner% ST#5T a bit through TL3 5L3 the recei ed
=al!ays /?, 7 data bits =4SB first? and a ST(6 bit =al!ays ,? last. The ST#5T bit is not registered in this pulse train. $ts purpose is to start data recei ing mechanism. (n recei e the ST(6 bit is automatically !ritten to the 5B7 bit in the S1() register. TRANSMIT: # se"uence for data transmission ia serial communication is automatically started upon the data has been !ritten to the SBU+ register. End of , byte transmission is indicated by setting the T$ bit in the S1() register.
RECEI<E: 5ecei ing starts as soon as the ST#5T bit =logic :ero =/?? appears on the pin 5L3. The condition is that bit 5E)N,and bit 5$N/. Both of them are stored in the S1() register. The 5$ bit is automatically set upon recei ing has been completed.
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The Baud rate in this mode is determined by the timer 1 overflow time. MODE !
SM!: SM- is the 32 bit of the S1() register. This bit enables the multiprocessing 1apability of the 7/2,. +or our applications, !e !ill make SM-N/ since !e are not using the 7/2, in a multi processor en ironment. REN: The 5E) =recei e enable? bit is 3@ of the S1() register. The 5E) bit is also referred to as S1().@ since S1() is a bit-addressable register. Ahen the 5E) bit is high, it allo!s the 7/2, to recei e data on the 5L3 pin of the 7/2,. #s a result if !e !ant the 7/2, to both transfer and recei e data, 5E) must be set to ,. By making 5E)N/, the recei er is disabled. Making 5E)N, or 5E)N/ can be achie ed by the instructions CSETB S1().@D and C145 S1().@D, respecti ely. )otice that these instructions use the bit-addressable features of the register S1(). This bit can be used to block any serial data reception and is an e>tremely important in the S1() register.
TB.: TB7 =transfer bit 7? is bit 3. of S1(). $t is used for serial modes - and .. Ae make TB7N/ since it is not used in our applications. RB.:
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5B7 =recei e bit 7? is bit 3- of the S1() register. $n serial mode ,, this bit gets a copy of the stop bit !hen an 7-bit data is recei ed. This is =as is the case for TB7? is rarely used anymore. $n all our applications !e !ill make 5B7N/. 4ike TB7, the 5B7 bit is also used in serial modes - and ..
$s T$ N N , 1lr T$ ST(6
RX OOP:
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Body Temperature Monitoring Using an SMS-Based Telemedicine System ST#5T $nitiali:ation% 4oad S+5s !ith 5especti e alues
$s 5$ N N , 1lr 5$
+ig H
+ig 7
2EATURES: reference
6arallel con erter Successi e appro>imation #31 0oltage-to-+re"uency #31 $ntegrating #31
APP ICATIONS O2 ADC: 3igital camera or scanner uses #*3 con erters to transform the ariable 1ell phone and digital desk phone has an #31 con erter that con erts
charges in 113 and 1M(S chips into the binary data that represent pi>els. the pressure of sound !a es into 61M code Etc. Easy interface to all microprocessors (perates ratio metrically or !ith 2 031 or analog span ad;usted oltage
)o :ero or full-scale ad;ust re"uired 7-channel multiple>er !ith address logic /0 to 20 input range !ith single 20 po!er supply (utputs meet TT4 oltage le el specifications #31/7/7 e"ui alent to MMH@18@8 #31/7/8 e"ui alent to MMH@18@8-,
2UNCTIONA DESCRIPTION: The #31/7/7 sho!n in figure can be functionally di ided into - basic sub circuits. These t!o sub circuits are an analog multiple>er and an #*3 con erter. The multiple>er uses 7 standard 1M(S analog s!itches to pro ide to up to 7 analog inputs. The s!itches are selecti ely turned on, depending on the data latched into a .-bit multiple>er address register. (nce E(1 does go high this signals the interface logic that the data resulting from the con ersion is ready to be read. The output enable=(E? is then raised high. This enables the T5$-ST#TE outputs, allo!ing the data to be read. +igure sho!s the timing diagram.
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1()T5(4 4(&$1
+ig 8
+ig ,/
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CONNECTION DIA:RAM:
INTER2ACIN: O2 ADC /./. TO MICRO CONTRO ER:
S1 $)/ $), $)$). $)@ $)2 $)E $)H #4E E(1 19# 19B
#31
EMBE33E3 1()T5(44E5
191
3ata=3/-3H?
+ig ,, S1 =1hip Selection?% By using this selection Bit you can select the 1hip. #fter selecting this bit the chip is ready to do operation. By using 9$&9 =,? you can select this pin as an acti e high.
Table @
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+ig ,-
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). :SM MODEMS
# &SM modem can be an e>ternal modem de ice, such as the Aa ecom +#ST5#1B Modem. $nsert a &SM S$M card into this modem, and connect the modem to an a ailable serial port on your computer. # &SM modem can be a 61 1ard installed in a notebook computer, such as the )okia 1ard 6hone. # &SM modem could also be a standard &SM mobile phone !ith the appropriate cable and soft!are dri er to connect to a serial port on your computer. 6hones such as the )okia H,,/ !ith a 345-. cable, or arious Ericsson phones, are often used for this purpose.
+ig ,.
TEMPERATURE RAN:E: (perating temperature% from --//1 to J22/1 Storage temperature% from --2/1 to JH//1 I(ter(a& diagram "4 :SM m"dem:
+ig ,@ I(3ta&&i(g the m"dem: To install the modem, plug the de ice on to the supplied SM6S #dapter. +or #utomoti e applications fi> the modem permanently using the mounting slots =optional as per your re"uirement dimensions?.
+ig ,2 Make sure that the e;ector is pushed out completely before accessing the S$M 1ard holder do not remo e the S$M card holder by force or tamper it =it may permanently damage?. 6lace the S$M 1ard 6roperly as per the direction of the installation. $t is ery important that the S$M is placed in the right direction for its proper !orking condition www.final-yearproject.com | www.finalyearthesis.com
+ig ,E
!ill potentially be a large number of BTSs deployed, thus the re"uirements for a BTS are ruggedness, reliability, portability, and minimum cost. NET-ORC SUBSYSTEM: The central component of the )et!ork Subsystem is the Mobile ser ices S!itching 1enter =MS1?. $t acts like a normal s!itching node of the 6ST) or $S3), and additionally pro ides all the functionality needed to handle a mobile subscriber, such as registration, authentication, location updating, hando ers, and call routing to a roaming subscriber..
).!.)MAX5!)!:
The M#L-.- from Ma>im !as the first $1 !hich in one package contains the necessary dri ers =t!o? and recei ers =also t!o?, to adapt the 5S--.- signal oltage le els to TT4 logic. $t became popular, because it ;ust needs one oltage =J20? and generates the necessary 5S--.- oltage le els =appro>. -,/0 and J,/0? internally. This greatly simplified the design of circuitry. 1ircuitry designers no longer need to design and build a po!er supply !ith three oltages =e.g. -,-0, J20, and J,-0?, but could ;ust pro ide one J20 po!er supply, e.g. !ith the help of a simple H7>/2 oltage con erter. Typically a pair of a dri er*recei er of the M#L-.- is used for
There are not enough dri ers*recei ers in the M#L-.- to also connect the 3T5, 3S5, and 313 signals. Usually these signals can be omitted !hen e.g. communicating !ith a 61Qs serial interface. $f the 3TE really re"uires these signals either a second M#L-.- is needed, or some other $1 from the M#L-.- family can be used =if it can be found in consumer electronic shops at all?
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+ig ,H
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4.1 LC OPERATION!
$n recent years the 413 is finding !idespread use replacing 4E3s=se ensegment 4E3s or other multisegment 4E3s?.This is due to the follo!ing reasons% ,. -. .. The declining prices of 413s. The ability to display numbers, characters and graphics. This is in contract to $ncorporation of a refreshing controller into the 413, there by relie ing the
4E3s, !hich are limited to numbers and a fe! characters. 16U of the task of refreshing the 413. $n the contrast, the 4E3 must be refreshed by the 16U to keep displaying the data. @. +.! Ease of programming for characters and graphics.
CD PIN DESCRIPTION:
The 413 discussed in this section has ,@ pins. The function of each pins is
gi en in table. PIN DESCRIPTION 2OR CD: 6in symbol $*( www.final-yearproject.com | www.finalyearthesis.com 3escription
, .
----
5S
5SN/ to select command register 5SN, to select data register 5*AN/ for !rite 5*AN, for read Enable The 7-bit data bus The 7-bit data bus The 7-bit data bus The 7-bit data bus The 7-bit data bus The 7-bit data bus The 7-bit data bus The 7-bit data bus
2 E H 7 8 ,/ ,, ,,. ,@
LC
CO ES! 1ommand to 413 $nstruction 5egister 1lear display screen 5eturn home 3ecrement cursor $ncrement cursor Shift display right Shift display left 3isplay off, cursor off 3isplay off, cursor on 3isplay on, cursor off 3isplay on, cursor on 3isplay on, cursor blinking Shift cursor position to left Shift cursor position to right Shift the entire display to the left
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,1 7/ 1/ .7
Shift the entire display to the right +orce cursor to beginning of ,st line +orce cursor to beginning of -nd line - lines and 2>H matri> Table E
+.+ CD INTER2ACIN::
+ig ,7 Se(di(g c"mma(d3 a(d data t" CD3 #ith a time de&a'% To send any command from table - to the 413, make pin 5SN/,for data, make 5SN,.Then send a high to lo! pulse to the E pin to enable the internal latch of the 413.
can by broken do!n into a series of blocks, each of !hich performs a particular function. # d.c po!er supply !hich maintains the output oltage constant irrespecti e of a.c mains fluctuations or load ariations is kno!n as C5egulated 3.1 6o!er SupplyD
5. TRANSFORMERS
# transformer is an electrical de ice !hich is used to con ert electrical po!er from one ectrical circuit to another !ithout change in fre"uency. www.final-yearproject.com | www.finalyearthesis.com
Transformers con ert #1 electricity from one oltage to another !ith little loss of po!er. Transformers !ork only !ith #1 and this is one of the reasons !hy mains electricity is #1. Step-up transformers increase in output oltage, step-do!n transformers decrease in output oltage. Most po!er supplies use a step-do!n
transformer to reduce the dangerously high mains oltage to a safer lo! oltage. The input coil is called the primary and the output coil is called the secondary. There is no electrical connection bet!een the t!o coils; instead they are linked by an alternating magnetic field created in the soft-iron core of the transformer. The t!o lines in the middle of the circuit symbol represent the core. Transformers !aste ery little po!er so the po!er out is =almost? e"ual to the po!er in. )ote that as oltage is stepped do!n current is stepped up. The ratio of the number of turns on each coil, called the turnKs ratio, determines the ratio of the oltages. # step-do!n transformer has a large number of turns on its primary =input? coil !hich is connected to the high oltage mains supply, and a small number of turns on its secondary =output? coil to gi e a lo! output oltage. A( E&ectrica& Tra(34"rmer:
0.1 RECTI2IER:
# circuit !hich is used to con ert a.c to dc is kno!n as 5E1T$+$E5. The process of con ersion a.c to d.c is called CrectificationD
,. 1entre tap full !a e rectifier. -. Bridge type full bridge rectifier. 2$&&5#a,e recti4ier: +rom the abo e comparison !e came to kno! that full !a e bridge rectifier as more ad antages than the other t!o rectifiers. So, in our pro;ect !e are using full !a e bridge rectifier circuit. Bridge 5ectifier% # bridge rectifier makes use of four diodes in a bridge arrangement to achie e full-!a e rectification. This is a !idely used configuration, both !ith indi idual diodes !ired as sho!n and !ith single component bridges !here the diode bridge is !ired internally.# bridge rectifier makes use of four diodes in a bridge arrangement as sho!n in fig =a? to achie e full-!a e rectification. This is a !idely used configuration, both !ith indi idual diodes !ired as sho!n and !ith single component bridges !here the diode bridge is !ired internally. 2$&& #a,e recti4ier:
+ig -/=#? O%erati"(: 3uring positi e half cycle of secondary, the diodes 3- and 3. are in for!ard biased !hile 3, and 3@ are in re erse biased as sho!n in the fig=b?. The current flo! direction is sho!n in the fig =b? !ith dotted arro!s.
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+ig -/=B? 3uring negati e half cycle of secondary oltage, the diodes 3, and 3@ are in for!ard biased !hile 3- and 3. are in re erse biased as sho!n in the fig=c?. The current flo! direction is sho!n in the fig =c? !ith dotted arro!s. Re,er3e 6ia3ed 4$&& #a,e recti4ier:
+ig -/=1?
2I TER:
# +ilter is a de ice !hich remo es the a.c component of rectifier output but allo!s the d.c component to reach the load CAPACITOR 2I TER: Ae ha e seen that the ripple content in the rectified output of half !a e rectifier is ,-,R or that of full-!a e or bridge rectifier or bridge rectifier is @7R such high percentages of ripples is not acceptable for most of the applications. 5ipples can be remo ed by one of the follo!ing methods of filtering.
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=a? # capacitor, in parallel to the load, pro ides an easier by Gpass for the ripples oltage though it due to lo! impedance. #t ripple fre"uency and lea e the d.c.to appears the load. =b? #n inductor, in series !ith the load, pre ents the passage of the ripple current =due to high impedance at ripple fre"uency? !hile allo!ing the d.c =due to lo! resistance to d.c? +iltering is performed by a large alue electrolytic capacitor connected across the 31 supply to act as a reser oir, supplying current to the output !hen the arying 31 oltage from the rectifier is falling. The capacitor charges "uickly near the peak of the arying 31, and then discharges as it supplies current to the output. +iltering significantly increases the a erage 31 oltage to almost the peak alue =,.@ S 5MS alue?. To calculate the alue of capacitor=1?, 1 N TUV.UfUrU5l Ahere, f N supply fre"uency, r N ripple factor, 5l N load resistance RE:U ATOR: 0oltage regulator $1s is a ailable !ith fi>ed =typically 2, ,- and ,20? or ariable output oltages. The ma>imum current they can pass also rates them. )egati e oltage regulators are a ailable, mainly for use in dual supplies. Most regulators include some automatic protection from e>cessi e current =Qo erload protectionQ? and o erheating =Qthermal protectionQ?. Reg$&at"r:
+ig -,
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;. SO2T-ARE DESCRIPTION
CEI SO2T-ARE:
Beil de elopment tools for the 7/2, Microcontroller #rchitecture support e ery le el of soft!are de eloper from the professional applications engineer to the student 'ust learning about embedded soft!are de elopment The industry-standard Beil 1 1ompilers, Macro #ssemblers, 3ebuggers, 5ealtime Bernels, Single-board 1omputers, and Emulators support all 7/2, deri ati es and help you get your pro;ects completed on schedule. SIMU ATION: The W0ision Simulator allo!s you to debug programs using only your 61 using simulation dri ers pro ided by Beil and arious third-party de elopers. # good simulation en ironment, like W0ision, does much more than simply simulate the instruction set of a microcontroller X it simulates your entire target system including interrupts, startup code, on-chip peripherals, e>ternal signals, and $*(. Ahen starting a ne! pro;ect, simply select the microcontroller you the de ice database and the W ision $3E sets all compiler, assembler, linker, and memory options for you. )umerous e>ample programs are included to help you get started !ith
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7. FUTURE ENHANCEMENT
The field of robotics has created a large class of robots !ith basic physical and na igational competencies. #t the same time, society has begun to mo e to!ards incorporating robots into e eryday life, from entertainment to health care. Moreo er, robots could free a large number of people from ha:ardous situations, essentially allo!ing them to be used as replacements for human beings. Many of the applications being pursued by #$ robotics researchers are already fulfilling that potential. $n addition, robots can be used for more commonplace tasks such as ;anitorial !ork. Ahereas robots !ere initially de eloped for dirty, dull, and dangerous applications, they are no! being considered as personal assistants. 5egardless of application, robots !ill re"uire more rather than less intelligence, and !ill thereby ha e a significant impact on our society in the future as technology e>pands to ne! hori:ons.
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.. CONC USION
The pro;ect CBody Temperature Monitoring Using an SMS-Based Telemedicine SystemD has been successfully designed and tested. $t has been de eloped by integrating features of all the hard!are components used. 6resence of e ery module has been reasoned out and placed carefully thus contributing to the best !orking of the unit. Secondly, using highly ad anced $1Ks and !ith the help of gro!ing technology the pro;ect has been successfully implemented.
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7. BIB IO:RAPHY
The 7/2, Micro controller and Embedded Systems -Muhammad #li Ma:idi 'anice &illispie Ma:idi The 7/2, Micro controller #rchitecture,6rogramming < #pplications -Benneth '.#yala +undamentals of Micro processors and Micro computers -B.6a an Micro processor #rchitecture, 6rogramming < #pplications -Uday S.&aonkar Electronic 1omponents -3.0.6rasad Re4ere(ce3 "( the -e6: !!!.national.com !!!.atmel.com !!!.microsoftsearch.com !!!.geocities.com
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