A Reconfigurable Architecture for Multi-Context Application

Manoel E. de Lima, Remy E. SantAnna, Abel G. Filho, Abner Barros, Paulo Guedes, Julio A. Filho, Raimundo Barreto and Claudianne Rabelo Centro de n!orm"ti#a $ C n %ni&ersidade Federal de Pernambu#o P.'. Bo( )*+, - Cidade %ni&ersit"ria Phone. /++ 0*, 12),*310, Fa(. /++ 0*, 12),*31* Re#i!e - PE $ Bra4il 5mel, res, a6s!, 7a6, 8oa!, rbs, #mr9#in.u!7e.br:
Abstract. A re#on!i6urable #om7uter 7resents the !a#ility o! #han6in6 !un#tions a##ordin6 to the la#;s o! the a77li#ation. Based on re#on!i6urable de&i#es, this a77roa#h #an redu#e #osts, es7e#ially in terms o! hard<are im7lementation. =he de&elo7in6 o! 7lat!orms <ith re#on!i6urable hard<are and 7ro6rammable #ontrol de&i#es, #an be used in se&eral a77li#ations as in a hard<are>so!t<are #odesi6n a77roa#h, !or small and lar6e desi6ns. =his <or; des#ribes an im7lementation o! a multi-#onte(t system in a re#on!i6urable en&ironment. =he 7lat!orm des#ri7tion is 7resented, as <ell as the re#on!i6uration method. A biolo6i#al a77li#ation has been de&elo7ed usin6 the 7ro7osed 7lat!orm. Satis!a#tory results ha&e been rea#hed and are des#ribed in this 7a7er. Key words. Re#on!i6urable Com7utin6, FPGA, Mi#ro#ontrollers, Codesi6n, Biolo6i#al A77li#ations.

Introduction

=raditional ele#troni# #om7utin6 7resents t<o methods !or the e(e#ution o! al6orithms. =he !irst uses AS Cs 5A77li#ation S7e#i!i# nte6rated Cir#uits: to 7er!orm the o7erations in hard<are. 'n#e time it is de&elo7ed !or a s7e#i!i# #om7utation, its &ery !ast and e!!i#ient. ?o<e&er, #annot be modi!ied !or another a77li#ation. =his !or#es a re-desi6n o! a ne< #hi7, !or a ne< !un#tionality, in an e(7ensi&e 7ro#ess. So!t<are a77roa#hes 7resent ad&anta6es su#h as !le(ibility and lo< #ost !or im7lementation o! #om7le( !un#tions. ?o<e&er, it 7resents limitations, su#h as di!!i#ult to e(7lore 7arallelism and hi6h s7eed a77li#ations. =hese 7ro#esses are im7lemented in de&i#es su#h as mi#ro7ro#essors and mi#ro#ontrollers.'n the other hand, re#on!i6urable #om7utin6 is intended to !ill the 6a7 bet<een hard<are and so!t<are, a#hie&in6 7otentially mu#h hi6her 7er!orman#e than so!t<are, <hile maintainin6 a hi6her le&el o! !le(ibility than hard<are @+A,@BA, @,1A. =his <or; aims the 7rototy7in6 o! a multi #onte(t 7roblem in a re#on!i6urable 7lat!orm #alled Chameleon. =his 7lat!orm allo<s into a ?C>SC methodolo6y to im7lement ra7id 7rototy7in6 o! di6ital systems in a sin6le or multi #onte(t a77roa#h. Chameleons !un#tionality and ho< to im7lement a multi #onte(t desi6n on it are 7resented. Parti#ullary a biote#hnolo6y a77li#ation !o#usin6 biosensors <ill be des#ribed in details as a #ase study. Su#h ar#hite#tures and de&i#es has been de&elo7ed and a77lied in se&eral areas su#h as ima6e 7ro#essin6,

di6ital si6nal 7ro#essin6, ele#troni#, audio and &ideo a77li#ations, biote#hnolo6y, and so on. n this 7a7er, a brie! des#ri7tion o! Chameleon 7rototy7in6 board ar#hite#ture is 7resented in se#tion 2. =he 7ro7osed methodolo6y and desi6n !lo< !or multi#onte(t 7rototy7in6 is #o&ered at se#tion 1. Se#tion 3 des#ribes the 7lat!orm monitor 7ro6ram. A biolo6i#al a77li#ation, !or monitorin6 a 7ie4oele#tri# biosensor is 7resented as a #ase study in se#tion + in order to demonstrate the methodolo6y. Final #on#lusions are 7resented in se#tion B.

Architecture Overview

=he Chameleon ar#hite#ture @,+A #om7rises a 7rototy7in6 board and CAD tools that hel7 the desi6nin6 and testin6 o! di6ital systems. =he basi# 7rototy7in6 board is #om7osed o! a so!t<are and a hard<are #om7onent that share a #ommon memory and a #ommuni#ation #hannel, as de7i#ted in Fi6ure ,.
Data
Osc Dis7lay biosensors

D/A Serial
C

FPGA

A>D

Address

RAM RAM

EPROM

Fi6. , $ Chameleon Ar#hite#ture

the Chameleon en&ironment. =he desi6n !lo< o! this methodolo6y is de7i#ted in Fi6ure 2. So!t<are 7ro#esses are e(e#uted in a lo< #oast o!!-the-shel! mi#ro#ontroller, *0+,-#om7atible !amily@,BA. t #an run 7ro#esses usin6 an ad hoc a77roa#h or yet usin6 run-time ;ernels to 7ro&ide more !un#tionality to the system, e.6. the =iny Real =ime '7eratin6 System !rom Eeil n# @2A, @3A. =he hard<are 7ro#esses are im7lemented on a sin6le re#on!i6urable array element based on a subset o! the FC3000 Filin( Series @,A. =his subset #an su77ort #ir#uits bet<een 1000 to ,1000 eGui&alent Filin( 6ates, de7endin6 on the #hi7 7art @,0A. =<o memory ban;s, #om7osed o! a B3 Ebyte 7ro6ram memory and a B3 Ebyte data memory, 7ro&ide stora6e s7a#e to ;ee7 the FPGA #on!i6uration and mi#ro#ontroller 7ro6ram as <ell as &ariables and any dynami# 7ro#ess in!ormation. =he 7ro6ram memory is s7lit in t<o 7arts. one non-&olatile that stores a resident boot 7ro6ram 5monitor:, and another, im7lemented in a SRAM memory used to tem7orarily hold user a77li#ation 7ro6rams. =he resident 7ro6ram initially #ontrols the serial inter!a#e, &ia mi#ro#ontroller, in order to re#ei&e both the FPGA #on!i6uration and mi#ro#ontroller a77li#ation 7ro6ram !rom the host PC. An *-bit data bus and a ,B-bit address bus 7ro&ide data e(#han6in6 bet<een the main 7ro#essor, the FPGA and memory ban;s. A bi-dire#tional asyn#hronous #ontrol bus is also a&ailable to mana6e the set o! #ommon #ontrol si6nals bet<een hard<are and so!t<are #om7onents. Some o! the CAD tools 7resent in the system are #ommer#ial and some ha&e been s7e#ially #reated to be used in the Chameleon en&ironment @*A, @,HA. At the moment the system uses Foundation Series and FAC= 5FPGA CAD tools by Filin( to 6enerate a FPGA #on!i6uration !ile !rom an initial I?DL s7e#i!i#ation or s#hemati# entry. =he mi#ro#ontroller 7ro6ram, <hi#h is <ritten in C or assembly lan6ua6e, is #om7iled usin6 Eeil So!t<are n#. #om7iler. Further details about these subsystems and other !eatures #an be seen in the se#tions to !ollo<.
so!t<are J.# hard<are J.&hd

*0+, C #om7iler

Foundation I?DL Com7iler

Simulator

Simulator

Standard Lin;er

FAC=

E(e#utable

J.bit

Mer6er

board
J.e(e J.bit

#ontroller FPGA

Fi6. 2 $ Desi6n Flo<

Be!ore a 7rototy7in6, a 7artitionin6 ta;en 7la#e in order to s7lit the so!t<are and hard<are 7ro#ess based on a #oast !un#tion. =he hard<are>so!t<are 7artitionin6 #oast !un#tion must ta;e into a##ount 7arameters su#h as s7eed and area, so that the #om7utation-massi&e 7ro#esses are im7lemented in hard<are and the lo<-s7eed, #ontrol-based 7ro#esses are le!t in so!t<are, <hile re6ardin6 the FPGAs area limitation. Currently, the hard<are>so!t<are
7artitionin6 is still 7er!ormed manually but it <ill be in#or7orated to the P S? 7artitionin6 methodolo6y @1A, @)A, @,)A. 'n#e the 7artitionin6 is 7er!ormed,

hard<are and so!t<are 7ro#esses #an be se7arately #om7iled and simulated.

=he hard<are #om7onent I?DL #ode is then !ed throu6h 7ro6rams !rom Foundation and FAC= 5FPGA CAD tools by Filin(: to 6enerate a FPGA #on!i6uration !ile 7ro7er to the s7e#i!i# Filin( #hi7 7resent on the Chameleon board 5see Fi6ure 2:. =he mi#ro#ontroller 7ro6ram, <hi#h is <ritten in C or assembly lan6ua6e, is #om7iled usin6 Eeil So!t<are n#. Pro!essional De&elo7ment Eit 5PDE:. =he resultin6 ob8e#t !ile #an be used !or simulation and debu66in6 on a PC or #ross-debu66ed usin6 a s7e#ial board #ontrolled throu6h a PC serial 7ort, still usin6 Eeils PDE. A!ter this, the e(e#utable5s: !ile5s: in FPGA and mi#ro#ontroller !rom a 7arti#ular a77li#ation are mer6ed and stored in #ores library in host 5PC:. An a77li#ation may #ontain se&eral #on!i6uration !iles to hard<are and so!t<are #om7onents as sho<n in Fi6ure 1.

roposed Methodolog!

=his se#tion des#ribes the su66ested methodolo6y !or a multi#onte(t 7rototy7in6 on #hameleon.=he de&elo7ment en&ironment is #om7osed not only o! the 7rototy7in6 board but also o! CAD tools, some o! <hi#h are #ommer#ial and some that ha&e been s7e#ially #reated to be used in

Core li rar!
Serial Biosensors Image Process Signal Process
Acoustic %iosensor

" #he Monitor progra$

Core Sele#tor itstream

Temperature

& 'A
Reconfigurable Hardware

PC #Data ase$

Codesing Arc"itecture

Fi6. 1 $ Con!i6uration Files

Cith the use o! re#on!i6urable de&i#es, is 7ossible to 7ro&ide a77li#ation cores in a !ast <ay and <ith the same !un#tionality 7resent on AS Cs. =hese re#on!i6urable de&i#es, ma77in6 al6orithms in e(e#ution time, may 7ro&ide solutions under demand ar#hite#ture.=his a77roa#h #an be seen as a hi6h inte6ration so!t<are and hard<are model, <here hard<are cores may be swapped, mana6ed by mi#ro#ontroller, de7endin6 on the the a77li#ation For ea#h ne< a77li#ation the so!t<are and hard<are 7ro#esses are 7re&iously #om7iled and synthesi4ed res7e#ti&ely. Must be obser&ed that, as sho<in6 in !i6ure 3, !or ea#h ne< a77li#ation, a set o! so!t<are and hard<are cores (bitstreams) are #hosen !or do<nload on the 7rototy7in6 board a##ordin6 to the a77li#ation and its #onstrains. A main 7ro#ess in the mi#ro#ontroller mana6es all so!t<are and FPGA #on!i6urations reGuired. De7endin6 on the a77li#ation, s7e#ial transdu#ers>#on&erters also need to be ada7ted to the 7lat!orm in order to 6enerate the ri6ht di6ital data entry to the FPGA.

=he mi#ro#ontroller o! the 7lat!orm #ontrols, &ia the monitor 7ro6ram, the FPGA #on!i6uration, #ommuni#ation 7ro#ess <ith the host and the stora6e o! the di!!erent FPGA #on!i6uration and so!t<are 7ro#ess in the RAM memory as <ell. As de7i#ted in Fi6ure 3, ea#h ne< a77li#ation #an #ontain se&eral #on!i6uration !iles !or hard<are and so!t<are #om7onents. =he s#hedulin6 !or e(e#ution o! these 7ro#esses in RAM is mana6ed by the a77li#ation so!t<are trou6h the mi#ro#ontroller, a##ordin6 to the seGuen#e o! the 7ro#ess in the a77li#ation. =his s#hedulin6 is 7er!ormed !or any hi6h le&el tool or by hand and it isnt dis#ussed in this <or;. nitially the user #hooses the a77li#ation. Ea#h set o! 7ro#ess o! ea#h ne< a77li#ation stored in the host database, must be trans!erred 5do<nload: to the 7rototy7in6 board RAM &ia a serial #ommuni#ation lin;. 'n#e the hard<are and so!t<are #ores in the memory, the monitor trans!ers the e(e#ution 7ointer !or the main routine. =hus the user a77li#ation is !inally e(e#uted. Any routine e(e#ution in so!t<are or any ne< FPGA #on!i6uration is #ontrolled by the so!t<are #om7onents. Any so!t<are #ores #an use monitor routines su#h as serial #ommuni#ation and FPGA #on!i6uration. At the end o! ea#h a77li#ation, the #ontrol returns to the monitor and a ne< one a77li#ation #an be 7er!ormed. Fi6ure + sho<s the a77li#ation e(e#ution !lo< in the board.
Core (ownload ,es )nd &ile* ,es Another &ile* +ot Monitor transfer control to the application -witch Ra$ Configure & 'A +ot )nd -oftware and hardware cores Returns to $onitor

)xecute user code

Application

Fi6. + $ Monitor Pro6ram sta6es =he RAM is ma77ed into reser&ed blo#;s !or ea#h 7art o! the monitor, a77li#ation so!t<are and hard<are #ores &ariables and s7e#ial interru7t &e#tors. At this moment only 2Ebytes are reser&ed !or the so!t<are #ores, <hat is enou6h !or small a77li#ations. =a;in6 into a##ount the FPGA FC300+ #hi7 !rom Filin(, the system is able to stored until 3 distin#ts hard<are #on!i6uration 5#ore: !or ea#h ne< a77li#ation. =he monitor and au(iliary routines ta;e only 3Ebytes.=he memory s7a#e addressed by the monitor is de7i#ted in the Fi6ure B. =he &e#tors area re7resents a re7ository o! interru7t &e#tors that #an be used by the monitor to #ontrol e(e#ution o!

s<

h< h<

s< h< s<

s<

h< h< h<

PC Database A77li#ation A, B and C

s< h<

so!t<are and hard<are cores

Fi6. 3 - Pattern #on!i6uration 5#ores:

standard interru7t !un#tion, su#h #ommuni#ation, timers, and so on.

Core N

as

serial

./1 (igital -ignal rocessing Module

///
Core 2 Core ,

+B;bytes 5?ard<are Cores:

2;bytes 2;bytes 2;bytes 2;bytes

Monitor &ariables monitor mirror

%ser 7ro6ram

5So!<are Cores:

Ie#tors

Fi6. B $ Chameleon Memory S7a#e

. Case stud!
A biolo6i#al a77li#ation has been used as #ase study. A system to determine humoral res7onse a6ainst Streptococcus pneumoniae a!ter &a##ination has been de&elo7ed in the 7lat!orm. =he 7rin#i7le o! this method is based on the de#reasin6 o! the resonan#e !reGuen#y o! os#illatin6 Guart4 #rystal in the bindin6 o! the mass on #oated sur!a#e durin6 the measure. n this #ase, a Guart4 #rystal mi#robalan#e 5KCM: biosensor, o7eratin6 in ,0M?4 o! resonan#e !reGuen#y, in a F A system 5Flo< n8e#tion Analysis:, has been used @HA, @,*A. An os#illator #ir#uit has been de&elo7ed !or t<o de&i#es KCM 5A= ele#trodes: <ith !reGuen#ies around ,0M?4. =<o resonant #rystals <ere used, one as <or; ele#trode and another as re!eren#e ele#trode, in <ay to #om7ensate the #urrent e!!e#ts o! me#hani#al os#illations and Ldri!tsL o! #hain. =he s#hemati# dia6ram o! the ele#troni# #ir#uit is sho<n 0"1 0.1 in Fi6ure ).
051 011 Chameleon FPGA 031

=he si6nal 7ro#essin6 !or immunodia6nosti#s by biosensors 7ro7osed <as de&elo7ed based on a hard<are>so!t<are #odesi6n a77roa#h, aimin6 a better hard<are>so!t<are 7ro#esses inte6ration and 7er!orman#e. =he so!t<are #om7onent <as des#ribed in C lan6ua6e, and im7lemented in a mi#ro#ontroller ntel *0C12 @,,A #om7onent. =he hard<are #om7onents <ere im7lemented in a Filin( FPGA FC30,0E Series @,2A, and their #odes <ritten in I?DL @,3A. =hree di!!erent #odesi6n a77roa#hes <ere im7lemented and analy4ed in this #ase study in order to sho< ho< the ar#hite#ture may be !le(ible and suitable !or su#h ;ind o! a77li#ation. n the three a77roa#hes, the #rystals data a#Guisitions are made throu6h the FPGA. =he e(7eriments are des#ribed as !ollo<s. a. =he FPGA is used in t<o sta6es. nitially it #olle#ts data !rom biosensors, and later, in a se#ond sta6e, a!ter its re#on!i6uration, #al#ulates the rela(ation o! the system M b. =he FPGA is only used to #olle#t data !rom biosensors, and the mi#ro#ontroller to #al#ulate the rela(ation o! the system M #. =he FPGA is used to #olle#t data !rom biosensors and to #al#ulate the rela(ation o! the system in an only sta6e 5<ithout re#on!i6uration:.

./2

Results

041 5,: 52: 51: 53: 5+: 5B: 5): 5*: 5H:

Chameleon Plat!orm 's#illator Cir#uit Board Cir#uit Po<er Board Reset System Po<er 'n>'!! Serial Communi#ation Crystal Resonant Re!eren#e Crystal Resonant Cor; F A System

Oscillator

AC > DC

021 021 031

n the three a77roa#hes, the so!t<are #om7onent <as im7lemented in C and the hard<are ones in I?DL. =he 7ro#edures ta;e into a##ount that the bitstream si4e 6enerated by Filin( synthesis tools !or FPGA has the same si4e !or ea#h s7e#i!i# #hi7 !amily, inde7endent o! the I?DL #ode. =he #on!i6uration time !or the FPGA FC30,0E is B,.* ms. n the !irst a77roa#h 5item 5a::, the FPGA has been used to 6et and treat the si6nals !rom the biosensors, as <ell as to #al#ulate the &arian#e and the standard de&iation. n this #ase, the mi#ro#ontroller !irstly #on!i6ures the FPGA to 6et and treat the si6nals. A!ter that, in a se#ond sta6e, the mi#ro#ontroller re#on!i6ures the FPGA and send the data to it to de&iation standard #al#ulation. Ea#h ne< #on!i6uration ta;es a77ro(imately B,.* ms. =he three #odes si4e, one !or so!t<are and t<o !or hard<are, are sho<n in table ,. As the t<o FPGAs 7ro#esses are inde7endent, and in order to analyses the

Fi6. ) - Case study ar#hite#ture

re#on!i6uration, the t<o 7ro#esses 5Main and Rela(ation: <ere #onsidered as t<o distin#t bitstreams.

(escription Main Code si4e Number o! lines Number o! CLBs Number o! 'Bs

& 'A Relaxation 22.+;bytes 2+0 2)H5BHQ: ,3522Q: 22.+;bytes 220 215+Q: ,3522Q:

C rogra$ ,.0 ;byte 1+0 -

#able 1 - Code si4e

n the se#ond a77roa#h, item 5b:, the FPGA <as used only to 6et the data !rom the biosensors, and the mi#ro#ontroller to #al#ulate the rela(ation o! the system 5de&iation standard:. =his 7ro#ess ta;es a77ro(imately ).B+ ms. =he #odes !or this se#ond a77roa#h #an be seen in =able 2.
(escription Code si4e Number o! Lines CLB 'Bs Main 6C"717) 22.+;bytes 220 215+Q: ,3522Q: C 2.+ ;byte 320 -

solution, sin#e the time s7ent !or re7ro6rammin6 <as bi66er than the time reGuired !or the #al#ulation in the mi#ro#ontroller. ?o<e&er, the time ta;en !or #al#ulation in mi#ro#ontroller is <orst than the time reGuired !or the #al#ulation in the FPGA <ith no re#on!i6uration ste7. =hus, !or this 7arti#ular a77li#ation, the de&iation standard should be #al#ulated in the FPGA in a only sta6e. 'n the other hand, the use o! FPGA is needed any<ay, be#ause o! the hi6h-s7eed inter!a#e to 6et and treat the biosensor si6nals. =he hard<are>so!t<are ar#hite#ture 7resented is 6eneri# !or a lar6e number o! biosensor im7lementation issues and other a77li#ations. Certainly, more #om7le( biosensor data #al#ulation #an ta;e the ad&anta6es o! the FPGA re#on!i6uration strate6y su66ested in this <or;s.

3 Conclusions
A re#on!i6urable ar#hite#ture !or multi #onte(t a77li#ation has been su66ested. =he methodolo6y ta;es into a##ount a re#on!i6urable a77roa#h based on lo< #ost de&i#es. A mi#ro#ontroller>FPGA 7lat!orm based on Chameleon 7rototy7in6 7lat!orm has been im7lemented to &alidate the ar#hite#ture. A #ase study has been 7resented and the results <ere satis!a#tory. =he 7lat!orm sho<s to able to im7lement small desi6ns in a hard<are>so!t<are #odesi6n a77roa#h !or a77li#ations that reGuire !ast >' inter!a#e and 7ro#essin6, <ell as slo< 7ro#ess and lin; #ommuni#ation. =heses as7e#ts 6i&es to the 7lat!orm 6ood #hara#teristi#s !or 7rototy7in6 o! edu#ation and sim7le industrial a77li#atian desi6ns.

#able 2 - Mi#ro#ontroller rela(ation time

n a third a77roa#h, item5#:, se#tion 1.,, ta;in6 the FPGA to read the data and #al#ulate the rela(ation o! the system in only ste7, <ithout rela(ation, the 7ro#ess ta;es only B.0) s, and the #odes si4e are similar to those 7resented in table 2. =he system relation time !or the three a77roa#hes #an be seen in =able 1.
Approaches #i$e 1 #odes 5Comuni#. 5mi#ro#:/ B,.*ms Di!5FPGA: / Rela( 5FPGA5#o7ro#ess::: ).B+ms/B,.*ms 2 #odes 5Com., Rela(5mi#ro#: / Di!. 5FPGA:: B.0)ms/B,.*ms 2 #odes 5Com. 5mi#ro#: / Di!. Rela( 5FPGA:

2 References
@,A Filin(, L=he Pro6ramable Lo6i# Data Boo;L, Filin( in#., ,HHB. @2A EE L So!t<are in#. 7ro!essional de&elo7ment ;it manuals. @1A Barros, E. et al., L?ard<are>So!t<are Codesi6n in the P S? 7ro8e#tL, 7ro#edin6s o! the Bra4ilian Cor;sho7 on ?ard<are>So!t<are Codesi6n. @3A Eeil <eb site. htt7.>><<<.;eil.#om @+A ?au#;, S. $ O=he !uture o! re#on!i6urable systemsP, Eeynote Address,+th Canadian #on!eren#e on !ield 7ro6rammable de&i#es, Montreal

#able 3 - Relationshi7 amon6 the three a77roa#hes

=he results o! the e(7eriment on humoral res7onse a6ainst Streptococcus pneumoniae a!ter &a##ination, based on a Guart4 #rystal mi#robalan#e a77roa#h, are the same as 7re&iously rea#hed in laboratory@ A. Based on the e(7eriments <e #an obser&e that, in some #ases, the FPGA re#on!i6uration be#omes a bottlene#;. n this #ase study, !or instan#e, the use in t<o sta6es !or the FPGA <as not a suitable time

@BA ?au#;, S. $ O=he holes o! FPGAs in re7ro6ramable systemsP, 7re#eedin6s o! EEE, &ol. *B, No 3, 77 B,+-B1*. @)A Ma#iel P. R., E. Barros, M. de Lima, D. S. da Sil&a, LResour#e Sharin6 Estimation by Petri Nets in P S? Codesi6n SystemL, ?PC 2000 S7e#ial =ra#; on Petri Nets and Per!orman#e E&aluation in ?PC2000 , Cashin6ton @*A Barros, Edna N.M Lima, M. E.M AraR8o, C. C.M Sil&a, D. S.M Ma#iel, P. R. M., OCo-Sysnthesis and Prototy7in6 Su77ortin6 the Desi6n o! Re#on!i6urable SystemP, 77. +3-B), 2000. @HA Dutra, Rosa A. F., ODesen&ol&imento de Biossensores em BioGuSmi#a ClSni#a e munodia6nTsti#oP $ PhD =hesis$ Centro de CiUn#ias BiolT6i#as $ %FPE - ,HHH. @,0A Filin(, LCount Ca7a#ity FPGAsL,FAPP0+H, I,.,. Metri#s !or

@,*A Dutra, R.F.M Castro, C. M. ?. B.M A4e&edo C. R.M Iinhas, E.M Mala6ueVo, E.M Melo, E. ?. M.M Lima Filho, J. L.M Eennedy, J. F., 8 mmobili4ation o! 7neumo#o##al 7olysa##haride &a##ine on sili#on o(ide <a!er !or an a#ousti#al biosensor 9 Biosensors and Bioele#troni#sP, Iolume ,+, ssues H-,0, No&ember 2000, Pa6es +,,-+,3 . @,HA Lima, M. EM Barros, E.M Ma#iel P. M.M Sil&a, D. S., Rosenstiel, C., OResour#e Sharin6 Estimation by Petri Nets in P S? Co -desi6n SystemP, ?PC2000, 77.1),-1)B, 2000.

@,,A S#hult4, =homas C.M O C and the *0+, $ ?ard<are, Modular Pro6rammin6 and Multitas;in6P Se#ond Edition $Iol , - ,HH*. @,2A Filin( <eb site. htt7.>><<<>(ilin(.#om @,1A OEldred6e, J., ?ut#hin6s, B., ORun-=ime Re#on!i6uration. A Method !or Enhan#in6 the Fun#tional Density o! SRAM-Based FPGAsL, in Journal of VLSI Signal Processing, Iolume ,2, ,HHB. Pa6es B)-*B @,3A Pellerim, D. , =aylor, D. - OI?DL Made easyP First Edition, - ,HH* @,+A De Lima, M. E., D. S. Sil&a, D. G. Ramalho, A. I. Bur6os, OChameleon- . A Ra7id Proroty7in6 Multi-FPGA Plat!orm !or P S? Codesi6n SystemP, SBMi#ro2000 - FI nternational Con!eren#e on Mi#roele#troni#s and Pa#;a6in6P, 77. *B-H,. @,BA =he *0+, <eb htt7.>><<<.*0+2.#om. 7a6e tutorial at

@,)A Lima, M. EM Barros, E.M Ma#iel P. M.M Sil&a, D. S., Rosenstiel, C., OResour#e Sharin6 Estimation by Petri Nets in P S? Co-desi6n SystemP, ?PC2000, 77.1),-1)B.