Datasheet LCD CAR

Version : 1.
PW036XS3
TECHNICAL MODEL
SPECIFICATION NO. : PW036XS3
Customers Confirmation Customer Date By
PVIs Confirmation Confirmed By Prepared By

FOR MORE INFORMATION:
AZ DISPLAYS, INC. 75 COLUMBIA, ALISO VIEJO, CA, 92656 Http://www.AZDISPLAYS.com
Date : Jan. 10 , 2005 This technical specification is subject to change without notice. Please return 1 copy with your signature on this page for approval.
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:1
PW036XS3
TECHNICAL
SPECIFICATION
CONTENTS
NO.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 -
ITEM
Cover Contents Application Features Mechanical Specifications Mechanical Drawing of TFT-LCD module Input / Output Terminals Pixel Arrangement and Input Connector Pin No. Absolute Maximum Ratings Electrical Characteristics Power On Sequence Optical Characteristics Handling Cautions Reliability Test Block Diagram Packing Revision History Appendix
PAGE
1 2 3 3 3 4 5 6 7 7 17 17 20 21 22 23 25 26
PW036XS3
1. Application This technical specification applies to 3.6 color TFT-LCD module , PW036XS3. The applications of the panel are car TV, portable DVD, GPS, multimedia applications and other AV systems..
2. Features . Amorphous silicon TFT-LCD panel with LED Backlight unit. . Compatible with NTSC & PAL system . Pixel in stripe configuration . Slim and compact . Image Reversion : Up/Down and Left/Right . Support Multi Video Display Mode (With PVI timing controller : PVI-1004C) 3. Mechanical Specifications Parameter Screen Size Display Format Active Area Dot Pitch Pixel Configuration Outline Dimension Surface Treatment Weight Specifications 3.6 (16:9 diagonal) 960234 78.24(H) 45.864(V) 0.0815 (H)0.196 (V) Stripe 89.47(W) 58.09(H) 3.6(D)(typ.) Anti Glare 405 Unit inch dot mm mm mm g
PW036XS3
4. Mechanical Drawing of TFT-LCD Module
PI TAPE NO BENDING AREA
PW036XS3
5. Input / Output Terminals TFT-LCD Module Connector FPC Down Connect , 30Pins , Pitch : 0.5 mm Pin No Symbol I/O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GLED1 VLED1 GLED2 VLED2 GND VCC VEE VGH STVD STVU CKV U/D OE3 OE2 OE1 VCOM STHL VSS2 VR VG VB VSS1 VDD2 CPH1 CPH2 CPH3 VDD1 R/L OEH STHR I I I I I I I I/O I/O I I I I I I I/O I I I I I I I I I I I/O Description Ground for LED backlight Supply voltage of LED backlight Ground for LED backlight Supply voltage of LED backlight Ground for logic circuit Supply voltage of logic control circuit for gate driver Negative power for gate driver Positive power for gate driver Vertical start pulse Vertical start pulse Shift clock for gate driver Up / Down control for gate driver Output enable for gate driver Output enable for gate driver Output enable for gate driver Common electrode voltage Start pulse for source driver Ground for analog circuit Video Input R Video Input G Video Input B Ground for digital circuit Supply power of analog circuit Sampling and shift clock for source driver Sampling and shift clock for source driver Sampling and shift clock for source driver Supply power for digital circuit Left / Right control for source driver Output enable for source driver Start pulse for source driver Note 5-8 Note 5-3 Note 5-4 Note 5-5 Note 5-1 Note 5-1 Note 5-8 Remark
Note 5-2
Note 5-6
Note 5-7 Note 5-2 Note 5-2
Note 5-1 U/D STVD Vcc Input GND Output Note 5-2 R/L STHL Vcc output GND input
STVU output input
scanning direction down to up up to down
STHR input output
scanning direction left to right right to left
PW036XS3
The definitions of Note 5-1,5-2
U/D(PIN 12)=Low R/L(PIN 28)=High U/D(PIN 12)=High R/L(PIN 28)=Low
Note 5-3 : VCC TYP.+3.3V Note 5-4 : VEE TYP.-12V Note 5-5 : VGH TYP.+17V Note 5-6 : VDD2 TYP.+5V Note 5-7 : VDD1 TYP.+3.3V Note 5-8 : ILED1 , ILED2 TYP.=20mA 6. Pixel Arrangement and Input Connector Pin NO. Line 1
Row 1 Row 2 Row 3 Row 4 Line 960
R
R
G
G
B
B
R
R
G
G
B
B
R
R
G
G
B
B
R
R
G
G
B
B
Row 233 Row 234
Gate driver
Source driver
Input FPC
Pin 30
Pin 1
PW036XS3
7. Absolute Maximum Ratings : The followings are maximum values , which if exceeded, may cause faulty operation or damage to the unit. Parameter Supply Voltage For Source Driver Symbol VDD2 VDD1 VCC Supply Voltage For Gate Driver VGH-VEE H Level VGH L Level VEE Analog Signal Input Level Storage Temperature Operation Temperature Notes 7-1 : Analog Input Voltage means VR,VG,VB. Notes 7-2 : Operating Temperature define that contrast, response time, other display optical character are Ta=+25. 8. Electrical Characteristics 8-1) Operating Condition Parameter Supply Voltage For Source Driver Analog Logic H level L level Supply Voltage For Gate Driver Logic Analog Signal input Level (VR , VG , VB) Digital input voltage Digital output voltage ViAC ViDC H level L level H level L level VIH VIL VOH VOL 0.7 VDD1 -0.3 0.7 VDD1 -0.3 Symbol VDD2 VDD1 VGH VEE DC VEE AC VCC +3.0 MIN. +4.5 +3.0 +15 -13 Typ. +5.0 +3.3 +17 -12 +6.0 +3.3 +4.0 2.5 +6.0 VDD1 0.3 VDD1 VDD1 0.3 VDD1 +3.6 +4.2 MAX. +5.5 +3.6 +19 -10.5 Unit V V V V VP-P V V V V V V V Remark VR,VG,VB MIN. -0.3 -0.3 -0.3 -0.3 -0.3 -16 -0.2 -10 0 GND = 0 VTa = 25 MAX. Unit Remark +5.8 V +7.0 +6.0 +40.0 +25.0 +0.3 VDD1+0.2 +70 +60 V V V V V V Note 7-2 Note 7-1
DC Component of VEE AC Component of VEE Note8-1 AC Compoment Note8-3 DC Compoment Note8-3
AC Component VP-P of V COM VCOM DC Component 1.2 V VCOM DC of VCOM Note 8-2 Note 8-1 :The typical value of Logic circuit supply power VCC & VDD1 is 3.3 0.3V , if customer choice 5.0 0.5V , the panel power consumption will increase about 10mW . Note 8-2 :PVI strongly suggests that the VCOM DC level shall be adjustable , and the adjustable level range is 1.2V1V , every modules VCOM DC level shall be carefully adjusted to show a best image performance. VCOM AC
PW036XS3
Note 8-3: Both NTSC and PAL system Video Signal input waveform is based on 8 steps gray scale.
White Black
White Black
4.00.2V
White
White
8-2) Recommended driving condition for LED backlight Parameter Supply voltage of LED backlight Supply current of LED backlight Backlight Power Consumption Symbol VLED1 VLED2 ILED1 ILED2 PLED 360 Min TYP MAX GND = 0 V Ta = 25 Unit Remark V mA 456 mW IL = 20 mA Note 8-4 Note 8-5
9.6 20
384
11.4
Note 8-4 : LED B/L applied information , please refer to the appendix at the end . Note 8-5 : PLED = VLED1* ILED1 + VLED2* ILED2 .
VLED1
GLED1
VLED2
8-3) Power Consumption Parameter Supply current for Gate Driver (Hi level)
GLED2
Symbol Conditions TYP. MAX Unit Remark IGH VGH +17V 0.08 0.12 mA Supply current for Gate Driver (Low level) IEE VEE -12V 0.3 0.45 mA VEE center voltage Supply current for Source Driver(Digital) IDD1 mA VDD1+3.3V 1.2 3.0 Supply current for Source Driver(Analog) Supply current for Gate Driver (Digital) LCD Panel Power Consumption Backlight Power Consumption Total Power Consumption PLED IDD2 ICC VDD2+5V 7.0 44.3 384 10.0 68.3 456 mA mA mW mW VCC +3.3V 0.005 0.008
428.3 524.3 mW
PW036XS3
8-4) Timing Characteristics Of Input Signals Characteristics Rising time Falling time High and low level pulse width CPH pulse duty STH setup time STH hold time STH pulse width STH period OEH pulse width Sample and hold disable time OEV pulse width CKV pulse width Clean enable time Horizontal display timing range STV setup time STV hold time STV pulse width Horizontal lines per field Vertical display start Vertical display timing range VCOM rising time VCOM falling time VCOM delay time RGB delay time Symbol tr tf tCPH tCWH tSUH tHDH tSTH tH tOEH tDIS1 tOEV tCKV tDIS2 tDH tSUV tHDV tSTV tV tSV tDV trCOM tfCOM tDCOM tDRGB Min. 147 30 20 20 61.5 400 400 256 Typ. 156 50 1 63.5 1.6 4.4 12 32 6 320 262 3 234 Max. 10 10 166 70 65.5 1 268 5 5 3 1 Unit ns ns ns % ns ns tCPH s s s s s s tCPH/3 ns ns tH tH tH tH s s s s Remark
CPH1~CPH3 CPH1~CPH3 STHR,STHL STHR,STHL STHR,STHL STHR,STHL OEH OEV CKV
STVU,STVD STVU,STVD
PW036XS3
8-5) Signal Timing Waveforms
tf
tr
90% 10%
90%
10%
g n i m i t k c o l c g n i l p m a S 1 8 . g i F
tHDH
tSUH
tSTH
tCWH
STHL(R)
50%
50%
CPH1
tCPH
CPH2 (L)
CPH3 (L)
PW036XS3
Input (STHL/STHR)
Output (STHR/STHL)
CPH1
Fig. 8-2 Horizontal display timing range
tDH
PW036XS3
White
Blank Black
1H
VIA
VIAC
tH
Black
VEE DC
V(R,G,B) VIDC
STHL(R)
OE 1,2,3
(HSY)
CKV
OEH
VCOM
VC DC
VEE
Blank
Fig. 8-3 (a) Horizontal timing
VEE AC
VC AC
White
PW036XS3
90%
10%
tfCOM
OE 1, 2, 3
V(R,G,B)
STHL(R)
(HSY)
CKV
OEH
VCOM
GL
Note : The falling edge of OEV should be synchronized with the falling edge of OEH
tCKV
tDCOM
trCOM
90%
tOEH
50%
tOEV
tDIS2
10%
V GL DC
tDRGB
Fig. 8-3 (b) Detail horizontal timing
tSTH
1H
tDIS1
GL AC
PW036XS3
t H2V
tCKV
STVU(D)
CKV
Fig. 8-4 Vertical shift clock timing
t S1V
1H
PW036XS3
Vertical timing (From up to down)
tsv
VCOM (Odd field)
VCOM (Even field)
V(R,G,B)
(HSY)
(VSY)
STVU
Fig. 8-5 (a) Vertical timing (From Up to Down)
Display on panel first line
PW036XS3
Vertical timing (From down to up)
tsv
VCOM (Odd field)
VCOM (Even field)
V(R,G,B)
(HSY)
(VSY)
STVD
Fig. 8-5 (b) Vertical timing (From Down to Up)
Display on panel first line
PW036XS3
9. Power On Sequence The Power on Sequence only effect by VCC,VSS,VDD,VEE and VGH, the others do not care.
VGH
VDD,VCC
VSS(0V)
VEE
OFF
ON
OFF
T1 T2
Logic signal RGB-Video signal
T3 T4
1) 10msT1<T2 2) 0ms<T3T410ms 10. Optical Characteristics 10-1) Specification: Parameter Viewing Angle Contrast Ratio Response time Uniformity Brightness White x y Rise Fall Symbol Horizontal 21, 22 Vertical 11 12 CR Tr Tf Condition CR10 At optimized Viewing angle =0 U =0 =0 MIN. 45 30 10 200 ----70 200 0.27 0.30 TYP. MAX. 55 --35 --15 --350 10 25 80 --20 50 ms ms Ta = 25 Unit Remarks deg deg Note 10-1 deg Note 10-2 Note 10-4
cd/ 250 Note 10-3 0.30 0.33 0.33 0.36 Chromaticity 10000 hrs Note 10-5 LED Backlight Life (+25) Note 10-5 : Constant current 20mA for each loop , and the center brightness must more than 50% of initial brightness value .
PW036XS3
Note 10-1 : The definitions of viewing angles
Note 10-2 : CR
Luminance when Testing point is White Luminance when Testing point is Black (Testing configuration see 10-2 ) Contrast Ratio is measured in optimum common electrode voltage.
Note 10-3 : :1. Topcon BM-7(fast) luminance meter 1.0field of view is used in the testing (after 10 minutes operation).
Note 10-4 : The definition of response time :

White Black White
100% 90%
Brightness
10% 0%
Tr Tf
PW036XS3
10-2) Testing configuration
BM-7(fast)
Caution: 1. Environmental illumination 1 lux 2. Before test CR, Vcom voltage must be adjusted carefully to get the best 500mm CR.
R,G,B signal
input
Pattern generator
LCD
Backlight
LCD Display
Testing Point
Testing Point
Pattern A
Pattern B
RGB waveform
Vcom
R, G, B Waveform of Pattern A at Testing Point

63.6 s
63.6 s
Vw=1.3V +/- 0.2V
R, G, B Waveform of Pattern B at Testing Point

63.6 s 63.6 s
RGB waveform
Vcom
Vb=5.0V +/- 0.2V
PW036XS3
11. Handling Cautions 11-1) Mounting of module a) Please power off the module when you connect the input/output connector. b) Please connect the ground pattern of the inverter circuit surely. If the connection is not perfect, some following problems may happen possibly. 1.The noise from the backlight unit will increase. 2.The output from inverter circuit will be unstable. 3.In some cases a part of module will heat. c) Polarizer which is made of soft material and susceptible to flaw must be handled carefully. d) Protective film (Laminator) is applied on surface to protect it against scratches and dirt. It is recommended to peel off the laminator before use and taking care of static electricity. 11-2) Precautions in mounting a) Wipe off water drops or finger grease immediately. Long contact with water may cause discoloration or spots. b) TFT-LCD module uses glass which breaks or cracks easily if dropped or bumped on hard surface. Please handle with care. c) Since CMOS LSI is used in the module. So take care of static electricity and earth yourself when handling. 11-3) Others a) Do not expose the module to direct sunlight or intensive ultraviolet rays for many hours. b) Store the module at a room temperature place. c) The voltage of beginning electric discharge may over the normal voltage because of leakage current from approach conductor by to draw lump read lead line around. d) If LCD panel breaks, it is possibly that the liquid crystal escapes from the panel. Avoid putting it into eyes or mouth. When liquid crystal sticks on hands, clothes or feet. Wash it out immediately with soap. e) Observe all other precautionary requirements in handling general electronic components.
PW036XS3
12. Reliability Test No 1 2 3 4 5 6 7 8 9 Test Item High Temperature Storage Test Low Temperature Storage Test High Temperature Operation Test Low Temperature Operation Test High Temperature & High Humidity Operation Test Thermal Cycling Test (non-operating) Vibration test (non-operating) Shock Test(non-operating) Electrostatic Discharge Test (non-operating) Test Ta = +70, 240 hrs Ta = -10, 240 hrs Ta = +60, 240 hrs Ta = 0, 240 hrs Condition
Ta = +50, 80%RH, 240 hrs -10 +70 , 200 Cycles 30 min 30 min Frequency : 10 ~ 55Hz Amplitude : 1mm , sweep time : 11 mins Test period : 6 cycles for each direction of X,Y, Z 100G , 6ms , 3cycles for each direction of X,Y,Z 200pF, 0 Machine mode = 200V 1 time / each terminal
Ta: ambient temperature Note : The protective film must be removed before temperature test.
[Criteria] Under the display quality test conditions with normal operation state, there should be no change which may affect practical display function.
PW036XS3
13. Block Diagram
14.1 LCD Module Diagram
LCD Panel
V Driver (Gate)
H Driver (Source)
Back-light
30 PIN Input
PW036XS3
14. Packing
PW036XS3
PW036XS3 Revision History

Rev. 1.0 1.1 Issued Date Jul. 06 , 2004 Jan.10 , 2005 Revised Contents NEW Modify : Page04 : Mechanical Drawing of TFT-LCD Module(No Bending Area) Add: Page21 : Note : The protective film must be removed before temperature test. Delete: Page21 : Indication of Lot Number Label( Oracle system induction)
PW036XS3
Appendix
LED B/L Application Circuit
VLED1 (Pin 02) 15 + 0.5V

0.1F 47F 25V LED
0.1F 47F 25V
VLED2 (Pin 04) 15 + 0.5V

LED
20K 5%
VC1 VB1
20K 5%
GLED1 (Pin 01)
VC2 VB2
GLED2 (Pin 03)
1KVR
2SC2412 20mA , 1V
0.1F
1KVR
2SC2412 20mA , 1V
VE2
VE1
0.1F
2K 5%
49.9 ,1% 1/16W
2K 5%
49.9 ,1% 1/16W

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Version : 1.

SPECIFICATION NO. : PW036XS3

Customers Confirmation Customer Date By

PVIs Confirmation Confirmed By Prepared By

PI TAPE NO BENDING AREA

Note 5-7 Note 5-2 Note 5-2

STVU output input

scanning direction down to up up to down

STHR input output

scanning direction left to right right to left

Row 233 Row 234

DC Component of VEE AC Component of VEE Note8-1 AC Compoment Note8-3 DC Compoment Note8-3

CPH1~CPH3 CPH1~CPH3 STHR,STHL STHR,STHL STHR,STHL STHR,STHL OEH OEV CKV

Fig. 8-2 Horizontal display timing range

Fig. 8-3 (a) Horizontal timing

Fig. 8-3 (b) Detail horizontal timing

Fig. 8-4 Vertical shift clock timing

VCOM (Odd field)

VCOM (Even field)

Fig. 8-5 (a) Vertical timing (From Up to Down)

Display on panel first line

VCOM (Odd field)

VCOM (Even field)

Fig. 8-5 (b) Vertical timing (From Down to Up)

Display on panel first line

Logic signal RGB-Video signal

Note 10-4 : The definition of response time :

R, G, B Waveform of Pattern A at Testing Point

Vw=1.3V +/- 0.2V

R, G, B Waveform of Pattern B at Testing Point

Vb=5.0V +/- 0.2V

14.1 LCD Module Diagram

PW036XS3 Revision History

VLED1 (Pin 02) 15 + 0.5V

VLED2 (Pin 04) 15 + 0.5V

GLED1 (Pin 01)

GLED2 (Pin 03)

49.9 ,1% 1/16W

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