OP200

Dual Low Offset, Low Power
Operational Amplifier
OP200
Data Sheet
PIN CONNECTIONS
Low input offset voltage: 75 V maximum

Low offset voltage drift, over 55C < TA < +125C
0.5 V/C maximum
Low supply current (per amplifier): 725 A maximum
High open-loop gain: 5000 V/mV minimum
Low input bias current: 2 nA maximum
Low noise voltage density: 11 nV/Hz at 1 kHz
Stable with large capacitive loads: 10 nF typical
OUT A
IN A 1
16
+IN A 2
15
NC
NC 3
14
NC
V 4
13
V+
NC 5
12
NC
+IN B 6
11
NC
IN B 7
10
OUT B
NC 8
NC
NC = NO CONNECT
00322-001
FEATURES
OUT A
IN A
+IN A
OP200
A
B
V+
OUT B
IN B
+IN B
00322-002
Figure 1. 16-Lead SOIC (S-Suffix)
Figure 2. 8-Lead PDIP (P-Suffix)

8-Lead CERDIP (Z-Suffix)
GENERAL DESCRIPTION
The OP200 is the first monolithic dual operational amplifier
to offer OP77 type precision performance. Available in the
industry standard 8-lead pinout, the OP200 combines precision
performance with the space and cost savings offered by a dual
amplifier.
The OP200 features an extremely low input offset voltage of
less than 75 V with a drift below 0.5 V/C, guaranteed over
the full military temperature range. Open-loop gain of the OP200
exceeds 5,000,000 into a 10 k load; input bias current is under
2 nA; CMRR is over 120 dB; and PSRR is below 1.8 V/V. On-chip
Zener zap trimming is used to achieve the extremely low input
offset voltage of the OP200 and eliminates the need for offset
pulling.
Rev. E
Power consumption of the OP200 is low, with each amplifier

drawing less than 725 A of supply current. The total current
drawn by the dual OP200 is less than one-half that of a single
OP07, yet the OP200 offers significant improvements over this
industry-standard op amp. The voltage noise density of the
OP200, 11 nV/Hz at 1 kHz, is half that of most competitive
devices.
The OP200 is pin compatible with the OP221, LM158,
MC1458/MC1558, and LT1013.
The OP200 is an ideal choice for applications requiring multiple
precision op amps and where low power consumption is critical.
For a quad precision op amp, see the OP400.
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Tel: 781.329.4700 19782012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
OP200
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications Information .............................................................. 12
Pin Connections ............................................................................... 1
Dual Low Power Instrumentation Amplifier ......................... 12
General Description ......................................................................... 1
Precision Absolute Value Amplifier ......................................... 12
Revision History ............................................................................... 2
Precision Current Pump ............................................................ 12
Specifications..................................................................................... 4
Dual 12-Bit Voltage Output DAC ............................................ 13
Electrical Characteristics ............................................................. 4
Dual Precision Voltage Reference ............................................ 13
Absolute Maximum Ratings ............................................................ 7
Programmable High Resolution Window Comparator ........ 14
Thermal Resistance ...................................................................... 7
Outline Dimensions ....................................................................... 15
ESD Caution .................................................................................. 7
Ordering Guide .......................................................................... 16
Typical Performance Characteristics ............................................. 8
REVISION HISTORY
9/12Rev. D to Rev. E
2/04Data Sheet changed from Rev. A to Rev. B.
Changed Table 2 Conditions from VS = 15 V to VS = 15 V ...... 4

Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 16
OP200F Deleted.................................................................. Universal

Changes to Ordering Guide .............................................................5
Changes to Figure 4 ...........................................................................8
Updated Outline Dimension ........................................................ 11
2/09Rev. C to Rev. D
Change to Large Signal Voltage Gain, Table 2 .............................. 4
8/08Rev. B to Rev. C
Updated Format .................................................................. Universal
Changes to Features Section............................................................ 1
Changes to Table 1 and Table 2 ....................................................... 4
Changes to Table 3 and Table 4 ....................................................... 5
Deleted Table 7; Renumbered Sequentially................................... 5
Changes to Figure 15 ........................................................................ 9
Changes to Figure 21 ...................................................................... 10
Changes to Figure 30 and Figure 31............................................. 12
Changes to Programmable High Resolution Window
Comparator Section, Figure 33, and Figure 34........................... 13
Changes to Figure 35 ...................................................................... 14
Updated Outline Dimensions ....................................................... 15
4/02Data Sheet changed from Rev. 0 to Rev. A.

Edits to Features.................................................................................1
Edits to General Description ...........................................................1
Edits to Ordering Information ........................................................1
Edits to Pin Connections ..................................................................1
Edits to Absolute Maximum Ratings ..............................................2
Edits to Package Type .......................................................................2
Rev. E | Page 2 of 16
Data Sheet
OP200
V+
BIAS
OUT
VOLTAGE
LIMITING
NETWORK
IN
Figure 3. Simplified Schematic (One of Two Amplifiers Shown)
00322-003
+IN
OP200
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 15 V, TA = 25C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Input Offset Voltage
Long-Term Input Voltage Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density 1
Input Noise Current
Input Noise Current Density
Input Resistance Differential Mode
Input Resistance Common Mode
Large Signal Voltage Gain
Symbol
Conditions
Min
VOS
IOS
IB
en p-p
en
in p-p
in
RIN
RINCM
AVO
25
0.1
0.05
0.1
0.5
22
11
15
0.4
10
125
VCM = 0 V
VCM = 0 V
0.1 Hz to 10 Hz
fO = 10 Hz
fO = 1000 Hz
0.1 Hz to 10 Hz
fO = 10 Hz
VO = 10 V
RL = 10 k
RL = 2 k
OP200A/E
Typ
Max
5000
2000
Min
75
80
0.1
0.05
0.1
0.5
22
11
15
0.4
10
125
1.0
2.0
36
18
12000
3700
OP200G
Typ
Max
3000
1500
200
3.5
5.0
Unit
V
V/mo
nA
nA
V p-p
nV/Hz
nV/Hz
pA p-p
pA/Hz
M
G
7000
3200
M/mV
M/mV
OP200A
Typ
Max
Unit
45
0.2
0.15
0.9
125
0.5
2.5
5.0
V
V/C
nA
nA
Sample tested.
VS = 15 V, 55C TA +125C for OP200A, unless otherwise noted.

Table 2.
Parameter
Average Input Offset Voltage Drift
Input Bias Current
Large Signal Voltage Gain
Input Voltage Range 1

Common-Mode Rejection Ratio
Capacitive Load Stability
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current Per Amplifier
OUTPUT CHARACTERISTICS
Output Voltage Swing
1
Symbol
VOS
TCVOS
IOS
IB
AVO
IVR
CMRR
Conditions
VCM = 0 V
VCM = 0 V
VO = 10 V
RL = 10 k
RL = 2 k
VCM = 12 V
AV = 1
PSRR
ISY
VS = 3 V to 18 V
No load
VO
RL = 10 k
RL = 2 k
Min
3000
1000
12
115
9000
2700
12.5
130
8
0.2
600
12
11
Guaranteed by CMRR test.
12.4
12
V/mV
V/mV
V
dB
nF
3.2
775
V/V
A
V
V
Data Sheet
OP200
VS = 15 V, TA = 25C, unless otherwise noted.

Table 3.
Parameter
Channel Separation 2
Input Capacitance
POWER SUPPLY
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
1
2
Symbol
Conditions
Min
IVR
CMRR
CS
CIN
VCM = 12 V
VO = 20 V p-p, fO = 10 Hz
12
120
123
OP200A/E
Typ
Max
AV = 1, no oscillations
13
135
145
3.2
10
PSRR
ISY
VS = 3 V to 18 V
No load
0.4
570
VO
RL= 10 k
RL = 2 k
SR
GBP
Min
12
110
123
1.8
725
OP200G
Typ
Max
13
130
145
3.2
10
0.6
570
Unit
V
dB
dB
pF
nF
5.6
725
V/V
A
12
11
12.6
12.2
12
11
12.6
12.2
V
V
0.1
0.15
500
0.1
0.15
500
V/s
kHz
AV = 1

Guaranteed but not 100% tested.
VS = 15 V, 40C TA +85C, unless otherwise noted.

Table 4.
Parameter
Average Input Offset Voltage Drift
Input Bias Current
Large-Signal Voltage Gain

POWER SUPPLY
1
Symbol
VOS
TCVOS
IOS
IB
AVO
IVR
CMRR
Conditions
VCM = 0 V
VCM = 0 V
VO = 10 V
RL= 10 k
RL = 2 k
VCM = 12 V
AV = 1, no oscillations
PSRR
ISY
VS = 3 V to 18 V
No load
VO
RL = 10 k
RL = 2 k
Min
3000
1500
12
115
Max
35
0.2
0.08
03
100
0.5
2.5
5.0
10,000
3200
12.5
130
10
0.15
600
12
11
OP200E
Typ
12.4
12
Min
OP200G
Typ
Max
110
0.6
0.1
0.5
2000
1000
12
105
3.2
775
5000
2500
12.5
130
10
0.3
600
12
11
300
2.0
6.0
10.0
12.4
12.2
Unit
V
V/C
nA
nA
V/mV
V/mV
V
dB
nF
10.0
775
V/V
A
V
V
OP200
Data Sheet
1/2
OP200
V1 20V p-p @ 10Hz
50
50
1/2
OP200
00322-004
CHANNEL SEPARATION = 20 log
V2
V1
V2/1000
Figure 4. Channel Separation Test Circuit
1/2
OP200
10k
1/2
OP200
eOUT TO SPECTRUM
ANALYZER
eOUT (nV/Hz) = 2 eOUT (nV/Hz) 101
Figure 5. Noise Test Schematic
00322-005
100
Data Sheet
OP200
ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE
Table 5.
Parameter
Supply Voltage
Differential Input Voltage
Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
Lead Temperature (Soldering, 60 sec)
Junction Temperature Range (TJ)
Operating Temperature Range
OP200A
OP200E, OP200G
Table 6.
Rating
20 V
30 V
Supply voltage
Continuous
65C to +150C
300C
65C to +150C
Package Type
8-Lead CERDIP (Z Suffix)
8-Lead Plastic DIP (P Suffix)
16-Lead SOIC (S Suffix)
1
JC
16
37
27
Unit
C/W
C/W
C/W
JA is specified for worst-case mounting conditions, that is, JA is specified for

device in socket for CERDIP and PDIP packages; JA is specified for device
soldered to printed circuit board for SOIC package.
ESD CAUTION
55C to +125C
40C to +85C
JA1
148
96
92
Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
OP200
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS

VS = 15V
250
INPUT OFFSET CURRENT (pA)
200
150
100
1.0
4.0
3.0
2.0
0
75
5.0
00322-009
50
00322-006
CHANGE IN OFFSET VOLTAGE (V)
300
TA = 25C
VS = 15V
50
125
TA = 25C
VS = 15V
50
INPUT BIAS CURRENT (nA)
0.8
40
30
20
0.6
0.4
00322-007
50
25
25
50
75
100
0
15
125
00322-010
0.2
10
10
5.0
5.0
10
15
COMON-MODE VOLTAGE (V)
TEMPERATURE (C)
Figure 7. Input Offset Voltage vs. Temperature
Figure 10. Input Bias Current vs. Common-Mode Voltage

140
TA = 25C
VS = 15V
VS = 15V
00322-008
50
25
25
50
75
100
120
100
80
60
40
20
125
00322-011
COMMON-MODE REJECTION (dB)
INPUT BIAS CURRENT (nA)
100
1.0
VS = 15V
3
75
75
Figure 9. Input Offset Current vs. Temperature
60
INPUT OFFSET VOLTAGE (V)
25
TEMPERATURE (C)
Figure 6. Warm-Up Drift
0
75
25
50
TIME (Minutes)
10
100
1k
10k
FREQUENCY (Hz)
TEMPERATURE (C)
Figure 11. Common-Mode Rejection vs. Frequency
Figure 8. Input Bias Current vs. Temperature
100k
Data Sheet
OP200
100
1.18
TA = 25C
VS = 15V
10
100
1.16
1.14
1.12
1.10
1.08
00322-015
10
00322-012
TOTAL SUPPLY CURRENT (mA)
VOLTAGE NOISE DENSITY (nV/Hz)
TWO AMPLIFIERS
TA = 25C
1.06
2
1k
FREQUENCY (Hz)
Figure 12. Voltage Noise Density vs. Frequency
14
18
Figure 15. Total Supply Current vs. Supply Voltage

1.16
1000
TA = 25C
VS = 15V
TWO AMPLIFIERS
VS = 15V
10
100
1.15
1.14
1.13
1.12
1.11
75
1k
00322-016
00322-013
TOTAL SUPPLY CURRENT (mA)
CURRENT NOISE DENSITY (fA/Hz)

100
10
SUPPLY VOLTAGE (V)
50
25
FREQUENCY (Hz)
25
50
75
100
125
TEMPERATURE (C)
Figure 13. Current Noise Density vs. Frequency
Figure 16. Total Supply Current vs. Temperature
NEGATIVE SUPPLY
120
100
80
60
POSITIVE SUPPLY
40
20
00322-017
00322-014
NOISE VOLTAGE (400nV/DIV)
POWER SUPPLY REJECTION (nA)
140
TA = 25C
0
0.1
10
10
100
1k
10k
FREQUENCY (Hz)
TIME (SEC)
Figure 14. 0.1 Hz to 10 Hz Noise
Figure 17. Power Supply Rejection vs. Frequency
100k
OP200
Data Sheet
140
TA = 25C
VS = 15V
120
CLOSED-LOOP GAIN (dB)
0.6
0.5
0.4
0.3
100
AV = 1000
80
AV = 100
60
AV = 10
40
AV = 1
0.2
00322-018
0.1
75
20
50
25
25
50
75
100
00322-021
POWER SUPPLY REJECTION (V/V)
0.7
0
1
125
10
100
TEMPERATURE (C)
Figure 18. Power Supply Rejection vs. Temperature
100k
1M
30
TA = 25C
VS = 15V
VS = 15V
RL = 2k
5000
25
V p-p AT 1%
DISTORTION
OUTPUT SWING (V)
4000
3000
2000
15
10
00322-019
50
25
25
50
75
100
00322-022
1000
0
75
20
0
10
125
100
Figure 19. Open-Loop Gain vs. Temperature

140
PHASE
90
40
GAIN
135
180
0
20
10
100
1k
10k
100k
TOTAL HARMONIC DISTORTION (%)
60
00322-020
80
PHASE SHIFT (Degrees)
100
20
10k
100k
Figure 22. Maximum Output Swing vs. Frequency
TA = 25C
VS = 15V
120
1k
FREQUENCY (Hz)
TEMPERATURE (C)
1M
AV = 100
AV = 10
0.1
AV = 1
0.01
TA = 25C
VS = 15V
VOUT = 10V p-p
RL = 2k
0.001
100
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20. Open-Loop Gain and Phase Shift vs. Frequency
Figure 23. Total Harmonic Distortion vs. Frequency
00322-023
OPEN-LOOP GAIN (V/mV)
10k
Figure 21. Closed-Loop Gain vs. Frequency
6000
OPEN-LOOP GAIN (dB)
1k
FREQUENCY (Hz)
10k
Data Sheet
OP200
50
TA = 25C
VS = 15V
45
40
FALLING
OVERSHOOT (%)
35
30
25
RISING
20
15
5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
5.00V
CAPACITIVE LOAD (nF)
100s
TA = 25C
VS = 15V
AV = +1
00322-027
00322-024
10
Figure 27. Large Signal Transient Response
Figure 24. Overshoot vs. Capacitive Load

29
TA = 25C
VS = 15V
27
26
SINKING
25
TA = 25C
VS = 15V
AV = +1
24
SOURCING
00322-025
23
22
0
20mV
TIME (Minutes)
Figure 25. Short-Circuit Current vs. Time
00322-028
SHORT-CIRCUIT CURRENT (mA)
28
5s
Figure 28. Small Signal Transient Response
150
130
120
110
TA = 25C
VS = 15V
AV = +1
100
100
1k
10k
100k
20mV
FREQUENCY (Hz)
Figure 26. Channel Separation vs. Frequency
5s
Figure 29. Small Signal Transient Response, CLOAD = 1 nF
00322-029
90
10
00322-026
CHANNEL SEPARATION (dB)
140
OP200
Data Sheet
APPLICATIONS INFORMATION
The OP200 is inherently stable at all gains and is capable of
driving large capacitive loads without oscillating. Nonetheless,
good supply decoupling is highly recommended. Proper supply
decoupling reduces problems caused by supply line noise and
improves the capacitive load driving capability of the OP200.
DUAL LOW POWER INSTRUMENTATION

AMPLIFIER
A dual instrumentation amplifier that consumes less than 33 mW
of power per channel is shown in Figure 30. The linearity of the
instrumentation amplifier exceeds 16 bits in gains of 5 to 200 and is
better than 14 bits in gains from 200 to 1000. CMRR is above
115 dB (gain = 1000). Offset voltage drift is typically 0.2 V/C
over the military temperature range, which is comparable to the
best monolithic instrumentation amplifiers. The bandwidth of
the low power instrumentation amplifier is a function of gain
and is shown in Table 7.
PRECISION ABSOLUTE VALUE AMPLIFIER

The circuit in Figure 31 is a precision absolute value amplifier
with an input impedance of 10 M. The high gain and low TCVOS
of the OP200 ensure accurate operation with microvolt input
signals. In this circuit, the input always appears as a commonmode signal to the op amps. The CMRR of the OP200 exceeds
120 dB, yielding an error of less than 2 ppm.
+15V
C2
0.1pF
C1
30pF
2
1/2
OP200AZ
R2
2k
00322-031
The maximum output current of the precision current pump

shown in Figure 32 is 10 mA. Voltage compliance is 10 V
with 15 V supplies. Output impedance of the current transmitter exceeds 3 M with linearity better than 16 bits.
8
1
R3
10k
VOUT
2
7
R1
10k
15V
5k
5k
20k
VIN
+
40,000
VOUT = 5 +
RG
VIN + VREF
00322-030
RG
2
1/2
OP200EZ
R5
100
IOUT
3
+15V
R4
1k
Figure 30. Dual Low Power Instrumentation Amplifier
The output signal is specified with respect to the reference

input, which is normally connected to analog ground. The
reference input can be used to offset the output from 10 V
to +10 V if required.
R1
10k
8
7
1/2
OP200EZ
6
IOUT =
VIN
VIN
=
= 10mA/V
RS 100
15V
Figure 32. Precision Current Pump
00322-032
VREF
D1
1N4148
6
20k
VOUT
0V < VOUT < 10V
PRECISION CURRENT PUMP
1/2
OP200AZ
1/2
OP200AZ
Figure 31. Precision Absolute Value Amplifier
3
5
1/2
OP200AZ
5
VIN
15V
+15V
C2
0.1pF
Bandwidth
150 kHz
67 kHz
7.5 kHz
500 Hz
+
VIN
D1
1N4148
Table 7. Gain Bandwidth

Gain
5
10
100
1000
R3
1k
R1
1k
Data Sheet
OP200
DUAL 12-BIT VOLTAGE OUTPUT DAC
DUAL PRECISION VOLTAGE REFERENCE
The dual output DAC shown in Figure 33 is capable of providing

untrimmed 12-bit accurate operation over the entire military
temperature range. Offset voltage, bias current, and gain errors
of the OP200 contribute less than 1/10 of an LSB error at 12 bits
over the military temperature range.
A dual OP200 and a REF43, a 2.5 V reference, can be used to

build a 2.5 V precision voltage reference. Maximum output
current from each reference is 10 mA with load regulation
under 25 V/mA. Line regulation is better than 15 V/V and
output voltage drift is under 20 V/C. Output voltage noise
from 0.1 Hz to 10 Hz is typically 75 V p-p. R1 and D1 ensure
correct startup.
5V
21
VDD
RFB A 3
DAC A
1/2
DAC8221
IOUT A 2
DAC8221
10V
REFERENCE
VOLTAGE
VREF A
2
1/2
OP200AZ
OUT A
DAC DATA BUS

PIN 6 (MSB) TO PIN 17 (LSB)
RFB B 23
DAC B
1/2
DAC8221
22 VREF B
18
19
DAC
CONTROL
20
IOUT B 24
6
1/2
OP200AZ
OUT B
5
DAC A/DAC B
AGND 1
CS
WR
00322-033
DGND
5
Figure 33. Dual 12-Bit Voltage Output DAC

+5V
R1
22k
D1
1N914
+2.5V
+5V
2
VOUT
REF43
TRIM
GND 4
6
5
2
3
8
1/2
OP200AZ
R3
10k
5V
6
5
1/2
OP200AZ
R4
5k
2.5V
Figure 34. Dual Precision Voltage Reference
00322-034
VIN
R3
10k
OP200
Data Sheet
range. A dual CMOS 12-bit DAC, the DAC8221, is used in the
voltage switching mode to set the upper and lower thresholds
(DAC A and DAC B, respectively).
PROGRAMMABLE HIGH RESOLUTION WINDOW

COMPARATOR
The programmable window comparator shown in Figure 35 is
easily capable of 12-bit accuracy over the full military temperature
15V
VIN
21
VDD
10V
REFERENCE
VOLTAGE
2 IOUT A
DAC A
1/2
DAC8221
VREF A
4
R1
10k
1/2
OP200AZ
1
D1
1N4148
DAC DATA BUS

PIN 6 (MSB) TO PIN 17 (LSB)
15V
R2
10k
18
DAC
CONTROL
SIGNALS
19
20
IOUT B
DAC B
1/2
DAC8221
VREF B 22
D1
1N4148
5
6
1/2
OP200AZ
TTL OUT
R4
10k
Q1
2N2222
DAC A/DAC B
CS
WR
DGND
5
AGND
00322-035
24
5V
R2
10k
Figure 35. Programmable High Resolution Window Comparator
Data Sheet
OP200
OUTLINE DIMENSIONS
0.005 (0.13)
MIN
8
0.055 (1.40)
MAX
5
0.310 (7.87)
0.220 (5.59)
1
0.100 (2.54) BSC

0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX

0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
SEATING
PLANE
15
0
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 36. 8-Lead Ceramic Dual In-Line Package [CERDIP]

(Q-8)
Z-Suffix
Dimensions shown in inches and (millimeters)
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
COMPLIANT TO JEDEC STANDARDS MS-001

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 37. 8-Lead Plastic Dual In-Line Package [PDIP]

(N-8)
P-Suffix
Dimensions shown in inches and (millimeters)
070606-A
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
OP200
Data Sheet
10.50 (0.4134)
10.10 (0.3976)
16
7.60 (0.2992)
7.40 (0.2913)
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
45
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
8
0
0.33 (0.0130)
0.20 (0.0079)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
03-27-2007-B
Figure 38. 16-Lead Standard Small Outline Package [SOIC_W]

Wide Body
(RW-16)
S-Suffix
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
OP200AZ
OP200EZ
OP200GPZ
OP200GS
OP200GSZ
OP200GSZ-REEL
1
TA = 25C VOS Max (V)

75
75
200
200
200
200
Temperature Range
55C to +125C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
Z = RoHS Compliant Part.
19782012 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D00322-0-9/12(E)
Package Description
8-Lead CERDIP
8-Lead CERDIP
8-Lead PDIP
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
Package Option
Z-Suffix (Q-8)
Z-Suffix (Q-8)
P-Suffix (N-8)
S-Suffix (RW-16)
S-Suffix (RW-16)
S-Suffix (RW-16)

OP200

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OP200

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Dual Low Offset, Low Power

Low input offset voltage: 75 V maximum

Figure 1. 16-Lead SOIC (S-Suffix)

Figure 2. 8-Lead PDIP (P-Suffix)

Power consumption of the OP200 is low, with each amplifier

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Applications Information .............................................................. 12

Pin Connections ............................................................................... 1

Dual Low Power Instrumentation Amplifier ......................... 12

General Description ......................................................................... 1

Precision Absolute Value Amplifier ......................................... 12

Revision History ............................................................................... 2

Precision Current Pump ............................................................ 12

Dual 12-Bit Voltage Output DAC ............................................ 13

Electrical Characteristics ............................................................. 4

Dual Precision Voltage Reference ............................................ 13

Absolute Maximum Ratings ............................................................ 7

Programmable High Resolution Window Comparator ........ 14

Thermal Resistance ...................................................................... 7

Outline Dimensions ....................................................................... 15

ESD Caution .................................................................................. 7

Ordering Guide .......................................................................... 16

Typical Performance Characteristics ............................................. 8

2/04Data Sheet changed from Rev. A to Rev. B.

Changed Table 2 Conditions from VS = 15 V to VS = 15 V ...... 4

OP200F Deleted.................................................................. Universal

4/02Data Sheet changed from Rev. 0 to Rev. A.

Figure 3. Simplified Schematic (One of Two Amplifiers Shown)

VS = 15 V, 55C TA +125C for OP200A, unless otherwise noted.

Input Voltage Range 1

Guaranteed by CMRR test.

VS = 15 V, TA = 25C, unless otherwise noted.

Guaranteed by CMRR test.

VS = 15 V, 40C TA +85C, unless otherwise noted.

Input Voltage Range 1

Guaranteed by CMRR test.

V1 20V p-p @ 10Hz

CHANNEL SEPARATION = 20 log

Figure 4. Channel Separation Test Circuit

eOUT (nV/Hz) = 2 eOUT (nV/Hz) 101

Figure 5. Noise Test Schematic

ABSOLUTE MAXIMUM RATINGS

JA is specified for worst-case mounting conditions, that is, JA is specified for

Stresses above those listed under Absolute Maximum Ratings

TYPICAL PERFORMANCE CHARACTERISTICS

INPUT OFFSET CURRENT (pA)

CHANGE IN OFFSET VOLTAGE (V)

INPUT BIAS CURRENT (nA)

COMON-MODE VOLTAGE (V)

Figure 7. Input Offset Voltage vs. Temperature

Figure 10. Input Bias Current vs. Common-Mode Voltage

COMMON-MODE REJECTION (dB)

INPUT BIAS CURRENT (nA)

Figure 9. Input Offset Current vs. Temperature

INPUT OFFSET VOLTAGE (V)

Figure 6. Warm-Up Drift

Figure 11. Common-Mode Rejection vs. Frequency

Figure 8. Input Bias Current vs. Temperature

TOTAL SUPPLY CURRENT (mA)

VOLTAGE NOISE DENSITY (nV/Hz)

Figure 12. Voltage Noise Density vs. Frequency

Figure 15. Total Supply Current vs. Supply Voltage