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8254: Programmable Interval Timer

The Intel 8254 is a counter/timer device designed to solve the common timing control problems in microcomputer system design. It provides three independent 16-bit counters each capable o! handling cloc" inputs up to 1# $%&. 'll modes are so!t(are programmable. The 8254 is a super set o! the 825). The 8254 uses %$*+ technology and comes in a 24 , pin plastic or -./0I1 pac"age. Salient Features: -ompatible (ith 'll Intel and $ost *ther $icroprocessors %andles Inputs !rom 0- to 1# $%& 8 $%& 8254 $%& 8254 , 2 +tatus /ead-2ac" -ommand +i3 1rogrammable -ounter $odes Three Independent 16 , 2it -ounters 2inary or 2-0 -ounting +ingle 4 55 +upply 'vailable in .61/.++ +tandard Temperature /ange Pin Configuration of 8254:

Pin Description of 8254: 1in description o! the Inter 8254 programmable internal timer is as given belo(7

Functional Description of 8254: General The 8254 is a programmable interval timer/counter designed !or use (ith Intel microcomputer systems. It is a general purpose multi-timing element that can be treated as an array o! I/* ports in the system so!t(are. The 8254 solves one o! the most common problems in any microcomputer system the generation o! accurate time delays under so!t(are control. Instead o! setting up timing loops in so!t(are the programmer con!igures the 8254 to match his re8uirements and programs one o! the counters !or the desired delay. '!ter the desired delay the 8254 (ill interrupt the -19. +o!t(are overhead is minimal and variable length delays can easily be accommodated. +ome o! the other counter/timer !unctions common to microcomputers (hich can be implemented (ith the 8254 are7 /eal time cloc" .vent-counter 0igital one-shot 1rogrammable rate generator +8uare (ave generator 2inary rate multiplier -omple3 (ave!orm generator -omple3 motor controller

Internal loc! Diagram of 8254:

Data bus buffer: This )-state bi-directional 8-bit bu!!er is used to inter!ace the 8254 to the system bus :see !igure sho(n above; "ea#$%rite logic: The /ead/<rite =ogic accepts inputs !rom the system bus and generates control signals !or the other !unctional bloc"s o! the 8254. '1 and '# select one o! the three counters or the -ontrol <ord /egister to be read !rom/(ritten into. ' >lo(? on the /0 input tells the 8254 that the -19 is reading one o! the counters. ' >lo(? on the </ input tells the 8254 that the -19 is (riting either a -ontrol <ord or an initial count. 2oth /0 and </ are 8uali!ied by -+@ /0 and </ are ignored unless the 8254 has been selected by holding -+ lo(. Control %or# register: The -ontrol <ord /egister :see !igure above; is selected by the /ead/<rite =ogic (hen ' 1 '# A 11. I! the -19 then does a (rite operation to the 8254 the data is stored in the -ontrol <ord /egister and is interpreted as a -ontrol <ord used to de!ine the operation o! the -ounters. The -ontrol <ord /egister can only be (ritten to@ status in!ormation is available (ith the /ead-2ac" -ommand. C&'(T)" *+ C&'(T)" ,+ C&'(T)" 2 These three !unctional bloc"s are identical in operation so only a single -ounter (ill be described. The internal bloc" diagram o! a single counter is sho(n in Bigure above. The -ounters are !ully independent. .ach -ounter may operate in a di!!erent $ode. The -ontrol <ord /egister is sho(n in the !igure@ it is not part o! the -ounter itsel! but its contents determine ho( the -ounter operates. The status register sho(n in !igure belo( (hen latched contains the current contents o! the -ontrol <ord /egister and status o! the output and null count !lag. :+ee detailed e3planation o! the /ead- 2ac"

command.; The actual counter is labeled -. :!or >-ounting .lement?;. It is a 16 , bit presettable synchronous do(n counter. *=$ and *== are t(o 8 , bit latches. *= stands !or >*utput =atch?@ the subscripts $ and = stand !or >$ost signi!icant byte? and >=east signi!icant byte? respectively. 2oth are normally re!erred to as one unit and called Cust *=. These latches normally >!ollo(? the -. but i! a suitable -ounter =atch -ommand is sent to the 8254 the latches >latch? the present count until read by the -19 and then return to >!ollo(ing? the -.. *ne latch at a time is enabled by the counterDs -ontrol =ogic to drive the internal bus. This is ho( the 16 , bit -ounter communicates over the 8 , bit internal bus. Eote that the -. itsel! cannot be read@ (henever you read the count it is the *= that is being read. +imilarly there are t(o 8-bit registers called -/$ and -/= :!or >-ount /egister?;. 2oth are normally re!erred to as one unit and called Cust -/. <hen a ne( count is (ritten to the -ounter the count is stored in the -/ and later trans!erred to the -.. The -ontrol =ogic allo(s one register at a time to be loaded !rom the internal bus. 2oth bytes are trans!erred to the -. simultaneously. -/$ and -/= are cleared (hen the -ounter is programmed. In this (ay i! the -ounter has been programmed !or one byte counts :either most signi!icant byte only or least signi!icant byte only; the other byte (ill be &ero. Eote that the -. cannot be (ritten into@ (henever a count is (ritten it is (ritten into the -/. The -ontrol =ogic is also sho(n in the diagram. -=Fn G'T.n and *9Tn are all connected to the outside (orld through the -ontrol =ogic. 8254 s-stem interface The 8254 is a component o! the Intel $icrocomputer +ystems and inter!aces in the same manner as all other peripherals o! the !amily. It is treated by the systemDs so!t(are as an array o! peripheral I/* ports@ three are counters and the !ourth is a control register !or $*0. programming. 2asically the select inputs '# '1 connect to the '# '1 address bus signals o! the -19. The -+ can be derived directly !rom the address bus using a linear select method. *r it can be connected to the output o! a decoder such as an Intel 82#5 !or larger systems. &perational #escription :general '!ter po(er-up the state o! the 8254 is unde!ined. The $ode count value and output o! all -ounters are unde!ined. %o( each -ounter operates is determined (hen it is programmed. .ach -ounter must be programmed be!ore it can be used. 9nused counters need not be programmed. 1rogramming the 8254 -ounters are programmed by (riting a -ontrol <ord and then an initial count. The -ontrol <ords are (ritten into the -ontrol <ord /egister (hich is selected (hen ' 1 '# A 11. The -ontrol <ord itsel! speci!ies (hich -ounter is being programmed.

Figure: 8254 System Interface

Bollo(ing table sho(s !e( possible programming se8uences.

"ea# &perations: It is o!ten desirable to read the value o! a -ounter (ithout disturbing the count in progress. This is easily done in the 8254. There are three possible methods !or reading the counters7 a simple read operation the -ounter =atch -ommand and the /ead-2ac" -ommand. .ach is e3plained belo(. The !irst method is to per!orm a simple read operation. To read the -ounter (hich is selected (ith the ' 1 '# inputs the -=F input o! the selected -ounter must be inhibited by using either the G'T. input or e3ternal logic. *ther(ise the count may be in the process o! changing (hen it is read giving an unde!ined result. Counter latc. comman#: The second method uses the >-ounter =atch -ommand? =i"e a -ontrol <ord this command is (ritten to the -ontrol <ord /egister (hich is selected (hen '1'# A 11. 'lso li"e a -ontrol <ord the +-# +-1 bits select one o! the three -ounters but t(o other bits 05 and 04 distinguish this command !rom a -ontrol <ord. The selected -ounterDs output latch :*=; latches the count at the time the -ounter =atch -ommand is received. This count is held in the latch until it is read by the -19 :or until the -ounter is reprogrammed;. The count is then unlatched automatically and the *= returns to HH!ollo(ingDD the counting element :-.;. This allo(s reading the contents o! the -ounters >on the !ly? (ithout a!!ecting counting in progress. $ultiple -ounter =atch -ommands may be used to latch more than one -ounter. .ach latched -ounterDs *= holds its count until it is read. -ounter =atch -ommands do not a!!ect the programmed $ode o! the -ounter in any (ay. I! a -ounter is latched and then some time later latched again be!ore the count is read the second -ounter =atch -ommand is ignored. The count read (ill be the count at the time the !irst -ounter =atch -ommand (as issued. <ith either method the count must be read according to the programmed !ormat@ speci!ically i! the -ounter is programmed !or t(o byte counts t(o bytes must be read. The t(o bytes do not have to be read one right a!ter the other@ read or (rite or programming operations o! other -ounters may be inserted

bet(een them. 'nother !eature o! the 8254 is that reads and (rites o! the same -ounter may be interleaved@ !or e3ample i! the -ounter is programmed !or t(o byte counts the !ollo(ing se8uence is valid. 1. 2. 3. 4. Read least significant byte. Write new least significant byte. Read m st significant byte. Write new m st significant byte.

I! a -ounter is programmed to read/(rite t(o-byte counts the !ollo(ing precaution applies7 ' program must not trans!er control bet(een reading the !irst and second byte to another routine (hich also reads !rom that same -ounter. *ther(ise an incorrect count (ill be read. "ea#/bac! comman#: The third method uses the /ead-2ac" -ommand. This command allo(s the user to chec" the count value programmed $ode and current states o! the *9T pin and Eull -ount !lag o! the selected counter: s;. The command is (ritten into the -ontrol <ord /egister and has the !ormat sho(n in Bigure 1#. The command applies to the counters selected by setting their corresponding bits 0) 02 01 A 1.

Figure ! unter "atc#ing ! mmand F rmat

The read-bac" command may be used to latch multiple counter output latches :*=; by setting the -*9ET bit 05 A # and selecting the desired counter:s;. This single command is !unctionally e8uivalent to several counter latch commands one !or each counter latched. .ach counterDs latched count is held until it is read :or the counter is reprogrammed;. The counter is automatically unlatched (hen read but other counters remain latched until they are read. I! multiple count read-bac" commands are issued to the same counter (ithout reading the count all but the !irst are ignored@ i.e. the count (hich (ill be read is the count at the time the !irst read-bac" command (as issued. The read-bac" command may also be used to latch status in!ormation o! selected counter:s; by setting +T'T9+ bit 04 e #. +tatus must be latched to be read@ status o! a counter is accessed by a read !rom that counter. The counter status !ormat is sho(n in Bigure. 2its 05 through 0# contain the counterDs programmed $ode

e3actly as (ritten in the last $ode -ontrol <ord. *9T19T bit 0I contains the current state o! the *9T pin. This allo(s the user to monitor the counterDs output via so!t(are possibly eliminating some hard(are !rom a system.

Figure Read$%ac& ! mmand F rmat

Figure Status %yte

E9== -*9ET bit 06 indicates (hen the last count (ritten to the counter register :-/; has been loaded into the counting element :-.;. The e3act time this happens depends on the $ode o! the counter and is described in the $ode 0e!initions but until the count is loaded into the counting element :-.; it canDt be read !rom the counter. I! the count is latched or read be!ore this time the count value (ill not re!lect the ne( count Cust (ritten. The operation o! Eull -ount is sho(n in Bigure belo(7 Figure 'ull ! unt ()erati ns

I! multiple status latch operations o! the counter:s; are per!ormed (ithout reading the status all but the !irst are ignored@ i.e. the status that (ill be read is the status o! the counter at the time the !irst status read-bac" command (as issued. 2oth count and status o! the selected counter:s; may be latched simultaneously by setting both -*9ET and +T'T9+ bits 05 04 A #. This is !unctionally the same as issuing t(o separate read-bac" commands at once and the above discussions apply here also. +peci!ically i! multiple count and/or status read-bac" commands are issued to the same counter:s; (ithout any intervening reads all but the !irst are ignored. This is illustrated in Bigure belo(. I! both count and status o! a counter are latched the !irst read operation o! that counter (ill return latched status regardless o! (hich (as latched !irst. The ne3t one or t(o reads :depending on (hether the counter is programmed !or one or t(o type counts; return latched count. +ubse8uent reads return unlatched count.

Figure Read . %ac& ! mmand /0am)le

0o#es of 8254 1In a S.ort2: 8254 o!!ers !ollo(ing modes o! operation7 1. $ode #7 interrupt on terminal count 2. $ode 17 hard(are retriggerable one-shot ). $ode 27 rate generator 4. $ode )7 s8uare (ave mode 5. $ode 47 so!t(are triggered strobe 6. $ode 57 hard(are triggered strobe :retriggerable; "ea#$3rite &perations Summar-: /ead/ <rite operations summary is given belo(7

Reference: Intel 8254 *r grammable Inter+al ,imer -ata s#eet

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