Chapter 8

O.C., O.D. AND TRISTATE GATES

Lesson 1

OPEN COLLECTOR GATE

Outline
Open Collector gate circuit Open Collector gate features Open Collector gate applications

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Internal Active pull up in TTL NAND Circuit with NPN Transistor A T T

+5V
R Rc
T Active Pull up

V+CC

Logic 1 or 0
Next stages TTL inputs

F
RE
T

V-EE

VCE

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Open Collector TTL NAND Circuit with provision for external active or passive pull up to V+high

+5V
T

F
RE
T

V-EE

VCE

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Next stages TTL inputs

External Pull up Rc

V+high

Logic 1 or 0

Output Stage Voltage pull up for output state 1

External passive or active resistor circuit Active device is preferred in place of pull
up resistances like R p in order to reduce power dissipation because a resistive element causes Joule loss Pull up increases the loading and thus fan-out
Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Outline
Open Collector gate circuit Open Collector gate features Open Collector gate applications

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Open Collector Gate Features

Ability to work at Voltage levels of V

which is greater than 5V in the TTL gates. Voltages of operations can be as per need, for example, 12V. Rp >> V p / (Maximum IOL) so that T does not draw an excessive current. Maximum IOL = Maximum permissible isink current through T.
Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

p,

Open Collector Gate Features

Both isource and isink controlled externally. Fan-out to the connected stages as per
requirement. 10000 A i.e. 10 mA through an LED whatever may be the co gate TTL family A higher power LED also by keeping Vp = 12V and choosing Rp appropriately .

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Open Collector Gate Features

Increased noise margins for 0 and 1 A higher gate speed if a reduced Rp

(active resistor) compared to one internally used 4k in 74 or 74 LS families

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Open Collector Gate Features

interconnect output of the various

gates through a common line by a special circuit called wired OR circuit.

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Outline
Open Collector gate circuit Open Collector gate features Open Collector gate applications

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Open Collector TTL NAND Circuit with provision for external active or passive pull up through LED and 330 to V+CC

+5V
R

V+cc

330 External Pull up

Rled

F
RE
T

V-EE

VCE

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Teletype loop
Let Vp up to +12V and keep Rp above 200 Ohm. Let us look at the application of this. If Vp = 5V and Rp = 250 Ohm, then a 20mA can source from such an arrangement to an O.C. gate. In Teletype current loop based digital whereby 16mA to 20 mA is treated as logic '1'. If V p = 12V, we can also treat state '1' for V ~ of 12V instead.
Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Driving dc Motor
Let Vp up to +12V and keep Rp above 2000 Ohm. Let us look at the application of this. If Vp = 5V and Rp = 2500 Ohm, then a 2 mA can source from such an arrangement to an O.C. gate. If the output F connects a power transistor, in which collector current drives a motor, then OC gate can be used to drive the motor.
Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Summary

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

 O.C. gate TTL circuit has external

active or passive pull up O.C. gate used for the increased fanout, higher voltage, current operations and lower propagation delay

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

End of Lesson 1 on

OPEN COLLECTOR GATE

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006

Thank you

Ch08L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006