Final Report Santana Final PDF

Smart Antenna Terminal - SANTANA Final Report
This project was funded by the German Ministry of Education and Research (BMBF) under administration of the German Aerospace Center (DLR) covered by research contracts 50YB0101 and 50YB0104.
Christian Hunscher EADS Astrium GmbH Michael Thiel, Achim Dreher Institut fr Kommunikation und Navigation DLR, Oberpfaffenhofen Sybille Holzwarth IMST GmbH Leif C. Stange, Holger Pawlak, Alexander Molke, Arne F. Jacob Institut fr Hochfrequenztechnik TU Braunschweig
Final Report SANTANA
Table of Contents
Table of Contents
1 INTRODUCTION 1
SYSTEM-SPECIFICATION 2.1 2.2 2.3 Introduction Choice of the Reference Scenario Compilation of the Specifications Frequency Bands Key Parameters of the transmit function Key Parameters of the receive function Additional Functions Open Matters Resume and Perspective
2 2 2 4 4 5 5 5 6 6 7 7 11 16 16 17
2.3.1 2.3.2 2.3.3 2.3.4 2.3.5 2.4 3
ANTENNA ELEMENT AND ARRAY, RECEIVE FUNCTION 3.1 3.2 3.3 Antenna element Antenna array Appendix Antenna element data Sequential rotation repeated rotation and 180-270 interchange
3.3.1 3.3.2
ANTENNA ELEMENT AND ARRAY, TRANSMIT FUNCTION 4.1 Antenna element
19 19
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4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.2 4.2.1 4.2.2 4.2.3 4.2.4 4.2.5
Objective Concept RF-to-antenna interface Measurements Results Antenna array Objective Concept Simulation model of the demonstrator Calculation of large arrays Results
19 19 20 20 21 21 21 21 22 22 24
BEAMFORMING 5.1.1 5.1.2 5.1.3 5.1.4 Nulling Side lobe level reduction Decoupling Calibration
25 25 26 27 29
BEAMSTEERING AND DATA PROCESSING 6.1 6.2 Objective Beamsteering algorithms
30 30 30
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6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 6.3
Concept DOA estimation Simulations Evaluation of measured data Estimation of computation time
30 31 31 33 35 36 37 37 38 38 38 39 40 40 40 41 41 41 42
Baseband hardware (transmit terminal) PC Baseband Mainboard Tx Channel Board Tx Distribution Board Baseband hardware (receiver terminal) Rx Distribution Board Rx Channel Board Baseband Mainboard PC
6.3.1 6.3.2 6.3.3 6.3.4 6.4 6.4.1 6.4.2 6.4.3 6.4.4 6.5 6.5.1 6.5.2 6.5.3
Data Processing Objective Concept Implementation
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Table of Contents
6.6 7
List of Abbreviations
43 44 44 45 45 57 66 66 72 76 76 76 78
RF-ELECTRONICS, ARCHITECTURE AND INTEGRATION 7.1 7.2 7.2.1 7.2.2 7.3 7.3.1 7.3.2 7.3.3 7.4 System Architecture RF-Electronics Receiver Transmitter
Integration Ka-band Frontend IF Interface IF part
Test and Measurement Receiver-frontend Transmitter-frontend
7.4.1 7.4.2
TEST AND MEASUREMENT 8.1 8.2 8.3 8.4 Objective Rx-Terminal Tx-Terminal Results
80 80 80 83 85 86
CONCLUSION
REFERENCES
87
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Introduction
Introduction
The demand for broadband data communication will increase rapidly in the next years. Satellite systems offer unique possibilities to connect professional mobile users to broadband data networks and services. The targeted markets are users on aircraft, ships and cars. High bandwidths must be utilized to realize the projected high data rates. Therefore, the attention of system providers will eventually move to systems operating in the Ka-band. The terminal antennas must meet complex requirements like high antenna gain, fast target acquisition and tracking, interferer cancellation and handling of several satellites at the same time. Here, smart antenna terminals employing digital beamforming are most promising. These antennas are very flexible and can be reconfigured easily to new mission profiles. The goal of the project Smart Antenna Terminal was the development, realization and test of demonstrators of broadband terminal antennas using digital beamforming in the Ka-band. These demonstrators can be used as building blocks for larger terminal antennas. This project is a followup project of two earlier concept studies Aktive Antenne fr die Multimediakommunikation ber Satellit and Frontend- und Antennentechnologie fr Ka-Band-Breitband-Multimedia Terminals ([1], [2]). In these concept studies the technological aspects were investigated and concepts for realization of terminal antennas were developed. The results of the concept studies showed clearly that the realization of digital beamforming terminal antennas, which are built up entirely of standard components, is quite a technological challenge. This is a result of the high packing density due to small wavelengths at Ka-band frequencies. Many function blocks like signal routing and efficient cooling of the electronics had to be integrated with little space available. This special aspect of system integration is discussed in detail in chapter 7, RF-Electronics, Architecture and Integration. The technical results of this project are described in the order of work packages. Each chapter summarizes the work package results. The system-specification (chapter 2) is presented first, which is the frame for the following work packages. The following work packages (chapters 3 through 7) describe the development, realization and tests of components of the terminal antenna. The antenna elements for the receive- and transmit function are described in chapters 3 and 4, respectively. Here, a miniaturized waveguide feed is suggested for both the receiver and transmitter. In chapter 5 the algorithms for array beamforming and interferer cancellation are presented in detail. Algorithms for beamsteering and the required hardware for baseband data processing for both receiver and transmitter are explained in chapter 6. In this chapter the development of a graphical user interface is explained, too. The RF-electronics, system architecture and integration of the Rx and Tx modules are described in detail in chapter 7. Here, circuit components and measurements of the complete analog part including RF and IF electronics are given. After this presentation of the terminal antenna components the fully assembled Rx and Tx modules (including analog and digital part) were tested thoroughly. These measurements are presented in the last work package Test and Measurement in chapter 8. Here, antenna diagrams of individual antenna elements and measurements of complete array pattern are described. A conclusion and outlook is given in chapter 9.
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System-Specification
2
2.1
Introduction
The development of a smart antenna terminal stands against the background of a growing demand for broadband communication systems for aeronautical applications (Catchwords: "Internet in the Sky", "In-flight Entertainment"). Traditional systems, as being tested by flight carriers currently, operate in the L band or the Ku band (e.g. via INMARSAT or EUTELSAT satellites). As transmission bandwidth in these bands is limited, the use of higher frequency bands is envisaged for such systems. Therefore SANTANA concentrated on the 20/30 GHz band (Ka band) where services via satellite will be offered in a foreseeable time. The development project straitens on the technology development at the terrestrial aspect, more precisely on a terminal that can be mounted on a vessel or a plane as a mobile platform. Provision is made for digital beam forming (DBF) as an additional feature, that offers clear advantages over mechanical beam steering on a moved object (i.e. plane environment). Goal of the work packages 3100 and 5100 with EADS Astrium GmbH in charge was to choose a suitable reference scenario to derive a system specification for a future terminal from it. At the phase of the project lapsed now only a technology sample, respectively a subgroup of the terminal, has been realized. But it was already taken care that future requirements are considered at this phase.
2.2
Choice of the Reference Scenario
The reference scenario for the SANTANA terminal antenna has been selected by following aspects: Ka band link to provide sufficient bandwidth for data rates in double-digit range (several Megabytes) Availability of reliable system data Probability of realization in near future (< 5 years)
These criteria reduced the numerous systems that had been acquired by an antecedent study with an internet investigation to a few. As the probability of realization of constellations with LEO (low earth orbiting) and MEO (medium earth orbiting) satellites reduced notedly, the selection concentrated on geostationary systems. Finally the EUROSKYWAY system has been selected.
06.03.2004 / Christian Hunscher, EADS Astrium GmbH
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Below the key specifications of this satellite system are condensed: Up- and downlink at 20/30 GHz frequency range Minimum available operational bandwidth 500 MHz respectively Data rates of 32.8 Mb/s downlink and 2 Mb/s uplink The satellite is positioned over Europe (5 east) EIRP (effective isotropic radiated power) at edge of coverage 54.2 dBW at minimum Satellites G/T (gain over temperature) 13 dB/K Calculations for the data link with the available key data under the assumption of clear sight have been carried out. These where based upon the additional assumptions below: Quadrature phase shift key (QPSK) as modulation method Coding gain 5 dB Bit error rate 10-6
Uplink
satellite G/T: Bit error rate: Coding gain: Polarization margin: Bit rate Needed EIRP (min) 200 kb/s 32.5 dBW 13 dB/ K 10-6 5 dB 3 dB 640 kb/s 37.5 dBW 2560 kb/s 43.5 dBW
Table 2-1: Link-Budget Uplink.
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The results for the uplink and the downlink are shown in Table 2-1 and Table 2-2. The necessary EIRP and G/T at the terminal are displayed in connection to the bit rate. For the downlink following assumptions have been made additionally: The low noise amplifier (LNA) of the terminal has a noise figure of 2.5 dB Additional losses between amplifier and antenna input of 0.5 dB Antenna is directed at a temperature of 20 K in an environment with 290 K Downlink Bit rate LNA noise figure losses LNA/antenna gain (min) T0 Tsky G/T min 1.4 dB/K 4.4 dB/K 26.3 dBi 29.3 dBi 5 Mb/s 10 Mb/s 15 Mb/s 2.5 dB 0.5 dB 31.1 dBi 290 K 20 K 6.2 dB/K 9.5 dB/K 16.3 dB/K 34.4 dBi 41.2 dBi 32Mb/s 155 Mb/s
Table 2-2: Link-Budget Downlink.
2.3
Compilation of the Specifications
Additionally to the information acquired from the reference scenario and the link budgets, further data has been used. These were either taken from surveys running in parallel, i.e. NATACHA (Network Architecture and Technologies for Airborne Communication of Internet High Bandwidth) study that is being worked out under the 5th EU frame program, or assumptions of possible user scenarios.
2.3.1
Frequency Bands
Due to the high gap between transmit and receive band in the Ka band (> 10 GHz) the use of shared components would lead to suboptimal solutions respectively an increased risk. Regarding this it was decided to use separate transmit and receive antennas at an early phase of the project already. This has the following advantages: Optimized concepts for components in individual frequency ranges
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Separation of signals with high and low power Reduced design risk The design was defined to have the frequency range of 20.5-30 GHz as transmit and 19./-20.2 GHz as the receive band.
2.3.2
Key Parameters of the transmit function
To avoid complex pointing manoeuvres at the terminal side respectively to assure a transmission at arbitrary relative movements circular polarization has been preferred compared to linear polarization. Transmit and receive system work each with orthogonal polarization namely left hand circular polarization (LHCP) or right hand circular polarization (RHCP). The unwanted polarization shall be minimized by design. In bore sight an axial ratio not higher than 1.2 has been defined. The antenna gain and the transmit power that define the EIRP together conform to the desired transfer rate (vide Table 2-1). It has to be taken into account that the antenna diagram conforms to national and international regulations, i.e. ETSI regulations.
2.3.3
Key Parameters of the receive function
The terminal will be operated in the frequency range of 19.7-20.2 GHz for the receive function. The definition of the polarization direction should be orthogonal to the transmit function. Here the unwanted cross polarization has to be minimized too. To keep the noise level as low as possible all side lobes (as well as the typically occurring grating lobes of phased array antennas) have to be minimized. The gain conforms to the desired receiving data rate (see Table 2-2) that will be notedly higher as in the transmission case due to the asymmetric transmission behavior of the aimed application.
2.3.4
Additional Functions
To keep the transmission upright in movement a permanent tracking of the satellite is necessary. Hereunto an electronic respectively digital technique is preferred due to the relatively inert behavior of mechanical systems. It is known under the term DBF (digital beam forming). This system is in principle capable to track multiple satellites respectively to manage a hand over between satellites. Furthermore the terminal shall be examined concerning the features below: Possibility to vary EIRP
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Integration capability in an airborne environment regarding the manufacturers instructions, constrictions to height, width and volume, thermal behavior or power consumption.
2.3.5
Open Matters
With regard to an aeronautical application it is important to clarify in which phases of the mission a data transmission is desired. Hereto an input from potential users (i.e. airlines) is necessary. Anyway a data link must be guaranteed in the regular flight phases (except start, landing and manoeuvre phases). As the relative position between mounted antenna and satellite varies a reliable data transmission must be possible within a defined angular range. As generally known the antenna gain degrades with increasing angle of scan. The scanning ability is already taken into account in the design of the terminal. Admittedly it has to be clarified what are the physical limits. An angular range of 60 would be desirable. Other open matters that shall be examined closer at the subsequent project are the thermal budget (for specific applications) as possibly necessary regulations for frequency allocation.
2.4
Resume and Perspective
Within the framework of the work packages WP3100 and WP5100 a realistic reference scenario for a possible application of the SANTANA terminal has been selected. Calculations based on this scenario have been done for uplink and downlink. All important parameters have been compiled into a specification. As this is a development project these terminal specifications are no hard requirements as known from typical commercial antenna projects. In fact they are a guideline for the development that it can orientate at realistic basic conditions. The specification is quasi a framework that will be adapted with actuality respectively to new input from the space segment or availabilities in the component segment. Test requirements of the various development phases can be derived from the superordinate specification.
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Antenna element and array, receive function
To fulfill the requirements of mobile communications in the field of broadband satellite systems and to achieve the high data rates, it was defined to realize the terminal antennas with digital beamforming technology at the beginning of the project. Furthermore the antennas are realized in a modular architecture to enable the replacement of modules in case of failure and also to be able to increase directivity of the antenna if needed by adding modules. The receive elements are realized in microstrip technology with aperture coupling, whereas the details of the design had to be developed. A linear polarized element has been chosen for that. The smallest unit in the array is a subarray consisting of 2x2 single elements for which the orientation and arrangement had to be investigated. To obtain circular polarization the principle of sequential rotation has been applied. Based on simulations the array performance regarding bandwidth, polarization, gain, radiation pattern, mutual coupling and possible scanning range had to be estimated. The initial phase of the project concludes with an optimized single radiator and a complete design of the planar array. Finally a technology-demonstrator had to be built up at the end of the project. Before this, the single radiators had to be fabricated and tested. Information about the fabrication process should be obtained by assembling different prototypes, especially regarding the realization of the antennas in the high frequency range (20 GHz). The experience is used for the assembly of the demonstrator, which consists of the single radiators optimized throughout the preceding project phase.
3.1
Antenna element
Based on the system specifications the development of the single antenna element was done. The radiating element is a linear polarized patch. The wanted circular polarization is achieved through the sequential rotation in the array, see section 3.2. Furthermore the design of the single element was mainly determined by the fact, that a thick ground plane between RF-layer and antenna layer was needed. The thick ground plane was introduced to remove the heat from the active RFcomponents and also to guarantee stability of the antenna. Therefore the single element consists of an aperture-coupled radiator on top layer and the RF-circuitry on bottom layer, which contains the feeding of the antenna itself. The main difficulty in designing the antenna element was the transition between RF-layer and antenna layer. Finally the solution in Figure 3-1 was chosen for different reasons. This solution contains a minimum number of substrate layers and with respect to fabrication via and coaxial connections where not considered. The RF-signal is fed in the microstrip line from which it is aperture coupled to a circular ceramic filled waveguide and then again the signal is aperture coupled to the radiator itself. The coupling through a rectangular waveguide has been designed in [3]. Here the circular waveguide dimension was chosen to support the dominant H11 mode only and the length should be approximately H11/2 to support an optimum coupling. Figure 3-2 shows the cutoff values of the radius over the dielectric constant of the ceramic inlay. The minimum radius must be above the red curve to support the dominant mode and below the blue curve to suppress higher order modes. In the plot the limits are given for 19.0 GHz and 21.0 GHz, whereas the bandwidth used is 19.7-20.2 GHz. For this the limiting range of the radius will be relieved. The simulations in Figure 3-2 have been performed using software developed at DLR [4]. The radiator itself is a square patch and simplifies the design. The usage of a square against a
06.03.2004 / Michael Thiel, Achim Dreher, DLR
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rectangular patch is advantageous regarding the sequential rotation and the related properties of the array [1]. Furthermore it is possible to achieve a relative broadband design.
radiator substrate waveguide ground with slot conductive adhesive thick groundplane conductive adhesive substrate microstrip line ground with slot
a)
b)
Figure 3-1: a) Cross-section of single element radiator. b) 3D-view of the single element radiator.
x 10-3 4 3.5 Radius [m] 0 3 Cutoff Radius H -Mode at f =19 GHz u 11 Cutoff Radius E -Mode at fo = 21 GHz 01 Radius Tolerance
2.5 2
0 = 1.6 mm, eps = 11
1.5 1 0.5 0 2 4 6 8 10 12 14 16 18
Dielectric Constant
Figure 3-2: Cutoff radius for dominant H11 mode and next higher order E01 mode.
A three-dimensional view is given in Figure 3-1 b), which is taken from simulation with Ansoft HFSS. The simulation was done with HFSS, which is based on the finite element method. Losses and conductivities of all materials where taken into account as well as the finite thickness of metallizations. Altogether three different combinations of slot and stub dimensions where used, whereas the dependency of the return loss of these designs was almost identical. The simulation is shown in Figure 3-3 and the dimensions are given in appendix, section 3.3. The chosen materials and the thickness of the substrate layers were determined by design criteria like bandwidth or avoidance of scan blindness [1].
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In addition a tolerance analysis was performed. For most of the parameters the bandwidth from 19.7-20.2 GHz could be maintained while changing the value by +/- 0.05 mm. Sensitive parameters are the microstrip line width, the patch dimension and the length of the slot on the antenna layer. Due to the fact that the etching tolerances are below 0.05 mm, i.e. in the range of 0.02 mm, the deviations of the parameters where not critical. Furthermore it was of great importance, that the adjustment of the layers to each other was realized as well as possible so they are not shifted with respect to each other more than 0.025-0.05 mm. Also a deviation of material properties could change the design. Especially a deviation of more than 5 % in case of the ceramic inlay of the waveguide could lead to restrictions in the matching of the antenna. A deviation of the antenna layer substrate permittivity had a stronger influence on the performance compared to a deviation of the microstrip layer material and led to a shift in resonance frequency.
Figure 3-3: Simulated reflection coefficient.
a)
b)
Figure 3-4: Fabricated single element radiator with K-connector. View from a) microstrip layer and b) antenna layer.
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The fabricated single element radiator with K-connector is shown in Figure 3-4 and a wire model of the fabricated single element is shown in Figure 3-5. This model gives a better impression of the real size of the patch, waveguide, slots and microstrip line in three-dimensional view.
Figure 3-5: Wire model of the fabricated single element.
Figure 3-6 shows the comparison between simulation and measurement of the reflection coefficient. The measurement was performed in time domain and due to time domain gating the connector effect could be removed in the measurement. A very good agreement can be seen. In general small deviations in resonant frequency could be obtained due to small changes of material properties, which can be compensated by the broadband design.
Figure 3-6: Simulation and measurement of single element with setup 2.
A field plot with coaxial connector is given in Figure 3-7. The coupling from microstrip line to the waveguide and then to the patch can be seen. The patch itself is looking downwards in the given view.
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Figure 3-7: Field plot of single element with coaxial connector in cross sectional view.
The comparison between simulations and measurement of the radiation pattern is given in Figure 3-8. The simulations where done with a smaller groundplane dimension compared to the single element sample (Figure 3-1). Therefore radiation effects due to the finite ground plane are not exactly reproduced. Because the radiator will be embedded in the array these effects will be minimized later on. Also a very good agreement with simulations can be seen as well as a sufficient suppression of the cross-polar component.
a)
b)
Figure 3-8: Radiation pattern in a) E-plane and in b) H-plane.
3.2
Antenna array
During the design phase of the antenna array the main goal was to achieve the desired right- or lefthand circular polarization and also to fulfill the definitions given in the system specifications. General criteria to avoid scan blindness or achieve a wanted bandwidth were included in the single antenna element design. The circular polarization is achieved by using the principle of sequential
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rotation in the array, see Figure 3-12 a). At first a comparison between the behavior of rectangular and square elements was performed. From simulations it could be seen that the use of rectangular elements is not advantageous because for large scan angles the axial ratio is further decreased as stated in [1]. Another degree of freedom initially considered in the simulations was the element spacing in the array. It could be seen that in any case a constant element spacing should be used (Figure 3-9 a)). Another possibility is to keep the spacing in the subarray and use the distance of subarrays to each other as a design parameter (Figure 3-9 b)) or to keep the distance between subarrays and vary the element spacing in the subarray (Figure 3-9 c)). These possibilities did not show any improvements. In case of a constant overall element spacing the optimum was found for 0.5 0. For a reduction of the spacing an improved suppression of the grating lobe could be achieved, whereas at the same time the axial ratio in the main lobe was decreased. Also the available space for placing the RF-circuitry would be reduced by reducing the element spacing and therefore it was fixed to 0.5 0.
a)
b)
c)
Figure 3-9: a) Unique element spacing. b) Element spacing in subarray 0.5 0 and subarray spacing reduced. c) Subarray spacing is 0 and element spacing in subarray reduced.
To be able to simulate large arrays and to estimate the scan angle range for which the directivity is sufficient and the side lobes are suppressed to a certain limit, an own software (SEQAR) was developed with Matlab. The single element patterns are simulated using commercial software and added in case of large arrays using the array factor and the orientation of the element to obtain the far field of the complete array. Mutual coupling effects have been included later only, for application of decoupling algorithms, see section 5.1.3. Studies on mutual coupling can also be found at the end of the present chapter. Using the sequential rotation in combination with linear polarized elements to obtain circular polarization leads to grating lobes in the cross-polar component while scanning the main beam. When scanning towards 45 in the diagonal plane the grating lobe is even equal to the desired main lobe. This effect can be suppressed by disturbing the symmetry in the array. Possible solutions are spiral arrangements of the elements (Figure 3-10) or shifted subgroups (Figure 3-11) in the array. After many simulations with different arrangements and array sizes it could be seen that the best solution to suppress the grating lobe in the cross-polar component is a scheme with repeated rotation and interchange of the 180 and 270 rotated single elements and also subarrays as shown in Figure 3-12b) on [5]. For that is increasing the array to 8x8 the 4x4 arrangement from Figure 3-12b) is rotated as a unit by changing the positions of the 4 different 2x2 subarrays. The 16x16 element array is set up by rotating the 8x8 subarrays, where the positions of the 4 different 4x4 subarrays are changed and so on. More details about this are given in appendix section 3.3.2. Due to the cancellation of the symmetry the power of the grating lobe is subdivided in several lobes with lower amplitude as can be seen in Figure 3-13. The maximum level
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of the grating lobes in the cross-polar component is suppressed to 14.4 dB compared to the main lobe level in the co-polar component.
a)
b)
c)
Figure 3-10: Spiral arrangement with a) 8 elements, b) 9 elements and c) 16 elements.
Figure 3-11: Shifted subgroups in a sequential array arrangement.

d = 0.50
270 0
180
270 0 270 0
180
0 90 180 270 180 0 0 0 90 180 270
0 90 270
180 270 270 90 90 0
90 180
90 180
subarray
270 0
90
90
180
a)
b)
Figure 3-12: Sequential rotation with a) classic scheme and b) scheme with repeated rotation and interchange of 180 and 270 rotated single elements and subarrays.
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From further research on the limitations of the array it was found that a scan angle of about 50 is possible while suppressing the grating lobe by 12 dB, the side lobes by 15 dB and with a loss of directivity of about 3 dB. The presented estimations have been generated with an array size of 32x32 elements. An improvement can be obtained when the array size is increased.
a)
b)
Figure 3-13: Projection of radiation pattern of a 32x32 element array with left-hand circular polarization and scanning angle of (, )=(245,45) with a) classic sequential rotation and b) scheme with repeated rotation and 180/270 interchange.
Excitation of Port 2 Excitation of Port 1
Figure 3-14: Mutual coupling in a 4x4 element array.
Mutual coupling effects are of great importance in array analysis and have been studied separately. A full wave analysis of a 4x4 element module showed that the coupling is less than -15.0 dB. Figure 3-14 shows the mutual coupling for different excitations. The coupling to the neighboring elements is given for excitation of each element. The influence of the coupling can be seen as a field
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representation in Figure 3-15. The worst case coupling in neighboring elements was around -15.0 dB in this example.
a)
b)
Figure 3-15: Simulation of mutual coupling effects in a 4x4 element module. a) Arrangement by using repeated sequential rotation. b) Representation of field intensity and excitation of element 15.
The sequential rotation is more effective for large arrays and was not used in case of the 4x4 module technology-demonstrator. This is because in case of classical sequential rotation the directivity is 2.0 dB above the one for repeated rotation scheme. The fabricated module is shown in Figure 3-16. For fabrication of the module a special procedure had to be set up. The etching and assembly was done on an enlarged carrier, similar to the size of the single element carrier (Figure 3-4) and then the carrier was reduced to the size seen in Figure 3-16. Other fabricational aspects are mentioned in section 3.1 for the single element and have to be taken into account for the antenna array in the same way.
a)
b)
Figure 3-16: 4x4 module seen from a) antenna layer and b) microstrip layer before assembly of RFdevices.
Due to the modular approach there will be diffraction effects at the edges between the single modules. There may be an influence on the radiation pattern and therefore on the desired axial ratio, which has to be taken into account in future work.
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3.3
3.3.1
Appendix
Antenna element data
The layered structure seen from top to bottom is defined in the listing and Figure 3-1: Patch element (copper) RT/Duroid 5880, Slot layer Adhesive layer Metal core CuZn63 + ceramic Adhesive layer Slot layer RT/Duroid 6010LM Microstrip line (copper) 0.017 0.787 0.017 0.10 3.80 3.20 0.10 0.017 0.254 0.017 mm mm mm mm mm mm mm mm mm mm r=2.2 r=2.5 r=11.0 r=2.5 r=10.2 tan()=0.0009 tan()=0.004 tan()=0.002 (Emerson&Cuming Eccostock HiK500F) tan()=0.004 tan()=0.0023
The material for the microstrip layer (RO6010LM) was predefined by filter designs for RF circuitry. All dimensions of slots, microstrip line and patch are defined in Figure 3-17, Figure 3-18 and listed in Table 3-1.
Figure 3-17: Dimensions on top layer (patch layer).
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Figure 3-18: Dimensions on bottom layer (microstrip layer).
Setup 1 Stub_length Line_width Slot_length_line Slot_width_line Patch_length Patch_width Slot_length_patch Slot_width_patch 0.55 mm 0.23 mm 2.235 mm 0.375 mm 3.925 mm 3.925 mm 1.938 mm 0.431 mm 0.5 mm
Setup 2 0.23 mm 2.235 mm 0.375 mm 3.925 mm 3.925 mm 1.938 mm 0.431 mm
Setup 3 0.675 mm 0.23 mm 2.25 mm 0.25 mm 3.925 mm 3.925 mm 1.938 mm 0.431 mm
Table 3-1: Listing of dimensions.
3.3.2
Sequential rotation - repeated rotation and 180-270 interchange
As a further example the arrangement of the antenna elements of a 16x16 element array with the sequential rotation scheme presented in Figure 3-12 b) is now shown in Figure 3-19. Starting from the 2x2 subarray in the lower left corner the 4x4 array is created using the rotational scheme. The 8x8 array is created by using the 4x4 module for rotation and so on. The numbers 1, 2, 3, 4 mark the four different 2x2 arrangements and the letters A, B, C, D the four different 4x4 modules from which the array is set up. It is important to note the additional interchange of the 180 and 270 rotated elements and subarrays. While increasing the size of the array following the presented scheme, the length and width is doubled each time. To obtain length and width different from 2 n elements, unnecessary elements are removed, starting from a larger size compared to the desired one.
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2 C 4
1 D
3 D 4 B
3 A 1
4 B
2 C 1 A
Figure 3-19: 16x16 array with sequential rotation and the scheme with repeated rotation and interchanged 180 and 270 elements and subarrays.
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Antenna element and array, transmit function
4
4.1
4.1.1

Antenna element
Objective
The objective of this work package is the design of an antenna element, which can be used to realize large, digitally steered, circularly polarized antenna arrays. Since the element distance in the array is only half a wavelength, and each element has to be equipped with its own transmitting circuitry, it is important for the design of such an element to use for the antenna feed as well as for the RF-to-antenna interconnect designs that occupy little space.
4.1.2
Concept
truncated corners
substrate
elliptical slot in ground plane
thick metal plate circular waveguide ceramically loaded
Figure 4-1: Circularly polarized patch element with RF-to-antenna interface.
The antenna element consists of a circularly polarized patch element, as depicted in Figure 4-1. The circular polarization of the patch is achieved by truncating the corners of the patch. The antenna is fed by an annular aperture in the ground plane, which is excited by the cylindrical, ceramically filled waveguide located beneath this aperture. The shape of the antenna aperture is complex, since there are two different parameters to be matched, the return loss of the antenna as well as its axial ratio.
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4.1.3
RF-to-antenna interface
A metal plate is located between the antenna layer and the RF-circuitry layer. The ceramically loaded circular waveguide is used to connect these layers, as depicted in Figure 4-2. The ceramic load of the waveguide reduces the required physical dimensions of the waveguide. Figure 4-2 also shows the return loss of the antenna element including the RF-to-antenna interface. In addition to good matching of the operation frequency band, the waveguide transition does suppress the image frequency band of the transmitting circuit. This has been achieved by defining the dimensions of the waveguide in such a way that the frequency band is below the cut-off frequency of the waveguide.
antenna
0
-5
-10
circular waveguide thick metal plate RF substrate
S11 [dB]
image freq. band
-15
-20
from RF circuit
-25
operating freq. band

25 26 27 28 29 30 frequency [GHz]
-30
Figure 4-2: Cross sectional view and return loss of the antenna element and the interface.
4.1.4
Measurements
0 -2 S11 [dB] -4 -6 -8 -10 28 29 30 freq [GHz] 31 32
gain [dBi]
-5
-10 RHCP LHCP
-15
-20 -90 -60 -30 0 angle [deg] 30 60 90
Figure 4-3: Return loss of the antenna element including SMP-connector and RF-to-antenna interface and far field pattern of the antenna at 29.75 GHz.
The antenna element has been built up and measured including the RF-to-antenna interface. Figure 4-3 shows the measured return loss of the antenna element. The operating frequency range is slightly shifted, due to the mismatch of the SMP connector used for the measurements, which could
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not be included in the calibration of the measurement set-up. Figure 4-3 also shows the measured radiation pattern of the antenna element at 29.75 GHz. The cross polar suppression is about 10 dB.
4.1.5
Results
Within this work package, a successful design of a single antenna element, which is well suited to realize large antenna arrays has been carried out. This antenna element forms the basis of the array design of the complete array, which will be described in the following chapter.
4.2
4.2.1
Antenna array
Objective
The objective of this work package is the design of large antenna arrays on the basis of the antenna element described in the previous chapter. Basically, there are two different design aspects to be distinguished. On one hand, the far field pattern of large antenna arrays has to be predicted including mutual coupling effects between the elements. On the other hand, a 44 antenna array has to be designed and built up. This array will be used in the technology demonstrator.
4.2.2
Concept
270
180
270
180
270
180
90
90
90
270
180
270
180
90
90
Figure 4-4 Sequential rotation of the antenna elements.
The array configuration is based on the sequential rotation of the antenna elements. Figure 4-4 shows this principle. Within a 22 elements block, the elements are rotated at a time by 90. To achieve in-phase excitation of all elements, the elements are fed with the appropriate phase
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differences, as depicted in the drawing. That way, the polarization behavior of the antenna is enhanced.
4.2.3
Simulation model of the demonstrator
Thorough FDTD simulations [6] of a 44 antenna array including the waveguide feed were performed to calculate the far field pattern of this array while considering the mutual coupling effects between the elements. This array size complies with the size of the array used for the demonstrator. It is possible to individually assign to the elements in the model any amplitude or phase, thus making it possible to calculate different steering directions or apply special amplitude tapers. Field visualizations for two different steering angles are exemplarily depicted in Figure 4-5. This model serves also as a basis to predict the far field patterns of larger arrays (e.g. 6464 elements), as described in the next paragraph.
Figure 4-5: Far field patterns of the 4x4 antenna array, set at two different radiation directions simulated with FDTD simulator EmpireTM [6].
4.2.4
Calculation of large arrays
To predict the radiation pattern of large antenna arrays including mutual coupling effects between the elements, it is common to include first order coupling effects by direct neighbors. This first order model has been expanded for arrays with sequentially rotated elements. Figure 4-6 shows on the left side the standard model, where one active element (marked in red) is loaded by passive elements (marked in yellow) in its direct neighborhood. The radiation pattern of this element is used as a basis to calculate large arrays. The extended model on the right side shows that if sequential rotation is applied, there are four different cases of neighboring elements to be distinguished. For each of the elements marked in red, the radiation pattern has to be calculated. The results of these calculations are then used as a basis for predicting the performance of large, sequentially rotated antenna arrays.
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90
180 270 180
90
180
90 0 90
270
180
270
90
180 270 180
90
180
270
180
270
Figure 4-6: Simulation models to determine first order coupling effects.
The influence of these coupling effects are exemplarily shown in Figure 4-7 and Figure 4-8. In the first graph, the calculation of the 6464 array has been performed without coupling effects, in the second graph, the coupling effects have been considered. If coupling effects are included, a small sidelobe becomes visible when scanning the beam of the array by 60.
50 40 30
Directivity [dB]
0 deg 60 deg
20 10 0 -10 -20 -30 -90.00
-60.00
-30.00
0.00 angle [deg]
30.00
60.00
90.00
Figure 4-7: Calculation of a 64x64 array without coupling effects.

50 40 30
Directivity [dB]
"0 deg" "60 deg"
20 10 0 -10 -20 -30 -90.00
-60.00
-30.00
0.00 angle [deg]
30.00
60.00
90.00
Figure 4-8: Calculation of a 64x64 array including coupling effects.
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4.2.5
Results
Within this work package, an antenna concept has been developed which allows steering of the antenna array while maintaining a good polarization behavior of the array. A simulation model of a complete 4x4 array has been built up to characterize the behavior of the technology demonstrator. In addition, to predict the performance of larger antenna arrays, a program has been developed to include first order coupling effects in sequentially rotated arrays.
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Beamforming
Beamforming
Using digital beamforming enables to control amplitude and phase of each element separately. Actually these data are transmitted to a PC or an integrated CPU using I- and Q-channels to do the beamforming in receive mode. The principle of beamforming is shown in Figure 5-1. The parallel signal flow is collected in the vector x(t). The different weighting of single channels with the weights combined in vector wH results in a desired signal flow, which represents the reception of a signal from a certain direction after superposition. The radiation pattern is being optimized in the described way, so that only signals from one ore several directions are received, whereas from others they can be suppressed.
Radiating elements
x(t)
wH
y(t)
Beamforming
Figure 5-1: Principle of a beamforming system.
In detail the scan angle, beam width, side lobe level and nulls can be controlled with different methods. Furthermore the mutual coupling effects can be compensated up to a certain degree if the weights are chosen appropriately. Before this there should be a calibration to equalize the deviations between amplitude and phase values of different channels, caused by of e.g. hardware drifts.
5.1.1
Nulling
The avoidance of the data reception from unwanted interferers can be realized by positioning nulls in the radiation pattern. At the same time the main lobe of the radiation pattern is steered. The sample matrix method (SMI) is suited for this task and therefore was implemented ([7], [9]). At the same time several nulls can be produced and also several main lobes. These lobes do not have to be generated in one diagram. In receive mode an arbitrary number of patterns can be produced at the same time. For this a parallel processing of data is needed and for each pattern the weights have to be defined separately. Simulations on described beamforming processing were performed on the 4x4 module defined in Figure 5-2. In Figure 5-2 b) the pattern is shown for a diagonal scan. The directivity is about 15.3 dB. With classical sequential rotation the grating lobe in the cross-polar component comes up very high again. As mentioned before the classical scheme is used for the 4x4 demonstrator because of the higher directivity. Applying the SMI-algorithm to create one or two nulls at the position of the side lobes, the pattern in Figure 5-3 is obtained. The nulls can be
Page 25
Beamforming
positioned precisely, and the number of possible nulls is dependent on the overall elements in the array. In case of one null a directivity D of 15 dB and in case of two nulls of 14.8 dB is achieved.
a)
b)
Figure 5-2: a) Antenna module with 4x4 elements. b) Radiation pattern with beam scanning towards (, )=(45,30) and left-circular polarization.
a)
b)
Figure 5-3: Nulling with SMI at a) (, )=(135,30) and b) (, )=(135,30) and (, )=(-45,30).
5.1.2
Side lobe level reduction
For side lobe level reduction the Chebychev weighting was used in the array ([8], [9]). The weighting method can be applied separately or in combination with the SMI algorithm. An
Page 26
Beamforming
optimum by applying the Chebychev weighting is obtained for a side lobe level of around -20 dB. For a lower level the directivity is decreased because much power is transmitted in the side lobes and for a higher level the main lobe is broadened, which leads to a reduced directivity too. Figure 5-4 shows the application of the algorithm without (D=14.7 dB) and with additional usage of SMI for nulling (D=14.5 dB). The side lobes are suppressed by 20 dB over the complete pattern.
a)
b)
Figure 5-4: Side lobe level reduction with a) Chebychev and b) Chebychev and nulling with SMI at (, )=(135,30) and (, )=(-45,30).
5.1.3
Decoupling
The mutual coupling effects in an array may lead to a degradation of the radiation pattern. Choosing the weights appropriately can lead to a partial compensation of these effects. The pattern of the single element is changed when it is embedded in the array. Taking into account the knowledge of the changed pattern enables again to form the desired beam with different weights compared to the case where no mutual coupling is assumed i.e. to apply decoupling. The patterns of all elements, when embedded in the array, are given in the matrix G, whereas the isolated patterns are stored in the matrix GI. The coupling matrix C is used to express the embedded patterns with the isolated ones [9]
G = C GI
Taking into account the embedded patterns instead of the isolated ones for beamforming leads to corrected weights
w cor = C 1 w
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Beamforming
The result is as if just the normal weights are applied to the isolated patterns. The radiation pattern without mutual coupling is given in Figure 5-5 a). Taking into account the deformed radiation patterns due to the mutual coupling effects the pattern in Figure 5-5 b) is obtained. Clearly the changes can be seen, e.g. in the axial ratio or in regions which where previously colored in dark blue.
a)
b)
Figure 5-5: Radiation pattern a) without mutual coupling and b) with mutual coupling.
After the application of a decoupling algorithm the pattern in Figure 5-6 is reconstructed. The regions are again colored in dark blue and also in the axial ratio the reconstruction can be seen.
Figure 5-6: Radiation pattern with mutual coupling and decoupling.
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Beamforming
5.1.4
Calibration
The usage of the described beamforming methods is successful if the beamforming weights can be realized at the antenna elements in amplitude and phase. Variations and deviations of the channels are introduced due to e.g. temperature drifts of the active RF-components. These deviations have to be taken into account by using a calibration method. The concept of calibrating the receive array is shown in Figure 5-7. After the signal processing a plane wave received from a satellite is not a plane wave any more. The calibration is done in the way that the plane wave is reconstructed by equalizing the phase and amplitude values of the different channels. The calibration is a software calibration and therefore can be done in operation whenever it is necessary and therefore a continuous beamforming procedure can be guaranteed.
A D
20 GHz Empfnger
DDC
Einfallende ebene Welle

20 GHz Empfnger A
DDC
20 GHz Empfnger
A D
DDC
DBF
20 GHz Empfnger
A D
DDC
Equalizer
Figure 5-7: Concept for calibration of the receive array.
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Beamsteering and Data Processing
6
6.1

Objective
The objective of this work package is the development of the beam steering algorithms and the required baseband hardware for the receiver and transmitter part of the terminal.
6.2
6.2.1
Beamsteering algorithms
Concept
The concept of the beamsteering is shown in Figure 6-1 in the case of reception. The direction, from which the satellite signal is received, is determined by the DOA estimator using I/Q values, which are then delivered to the beamforming algorithm. With this information, the antenna beam is pointed towards the desired satellite. Additionally, the DOA estimator determines the directions from which other weaker signals are received. These directions are interpreted as distortions and can then be weighted by the beamforming algorithms with nulls in the radiation pattern. The direction determined for the reception is equal to the direction for the transmission, because in both cases, the same satellite will be used. Therefore, the determined DOA is used in both cases, reception and transmission, for the control of the antenna beam.
Antenna array
Satellite
AD conversion
ZF
RF and IF components
HF
Direction of arrival (DOA)
Digital down conversion (DDC)
Digital beamforming Corrected I/Q values To baseband processing
I/Q values Coefficients Calibration and decoupling DOAestimation DOA Beamforming algorithms
To transmitter
Figure 6-1: Concept of beam steering for the case of reception.
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6.2.2
DOA estimation
To perform the DOA estimation, the 2D-MUSIC algorithm has been selected and implemented. The essential steps of the algorithm include: Estimation of covariance matrix from the I/Q values of array output signals Determination of the eigenvalues and eigenvectors of covariance matrix Calculation of the so-called angular spectrum of 2D-MUSIC Determination of DOAs from the angular spectrum by the search of global and local maximums The beamsteering during the initial satellite search as well as during the satellite tracking can be realized by the DOA estimator. For the satellite search, the DOA estimator can be applied on the complete half hemisphere (scan region) if no a-priori information about the satellite position relative to the attitude of the antenna is known. For the satellite tracking the scan region can be reduced to a small region near the direction previously estimated.
6.2.3
Simulations
Simulations were done in order to verify the chosen DOA estimation algorithm. Because of the small antenna beam of an antenna array with a large number of antenna elements and the low margin in the link budget, the estimation accuracy has to be sufficiently high. The Figure 6-2 shows the influence of the parameters: SNR (for different scenarios), number of array elements (4x4, 8x8, 14x14) and the number of I/Q values used for the determination of the covariance matrix on the accuracy of estimation (the mean value of the estimation error and the variance are presented in the picture). As a result, the estimation accuracy is improved by increasing the number of array elements and the number of used I/Q values. Increasing these parameters acts as a prolonged averaging of the noisy array output signals so that the estimated covariance matrix represents the statistical properties of the random noise process more accurately. A lower SNR value as in the case of the rain scenario (worst case) decreases the estimation accuracy.
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Figure 6-2: Dependency of estimation accuracy with respect to different parameters.
Uniformly distributed amplitude and phase errors were taken into account in order to investigate the robustness of the estimator against the deviations of hardware parameters. Figure 6-3 presents a part of the 2D-MUSIC spectrum if non of the previously mentioned errors exist. In this case, one clear peak is present in the spectrum where the direction of the desired signal source is expected. In the neighborhood of that peak, a slight increase is visible, which can be associated with the interference signal whose power is 3dB lower than the power of the desired signal. The distinction between the desired source direction and the interferer direction by means of the spectrum becomes increasingly difficult when the amplitude and phase errors increase as much as indicated in Figure 6-4. The errors are assumed here to be much larger than those, which remain after a thorough hardware calibration. The reason for this is to show the limits of the algorithm when using the SNR values mentioned before.
Wanted signal: Az=-20, El=40, SNR=-26.8dB Interferer: Az=-10, El=20, SNR=-29.8dB Random errors: Amplitude: Phase:
0dB 0deg
Figure 6-3: 2D-MUSIC spectrum without amplitude and phase errors.
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Wanted signal: Az=-20, El=40, SNR=-26.8dB Interferer: Az=-10, El=20, SNR=-29.8dB Random errors: Amplitude: Phase:
0...6dB 0...10deg
Figure 6-4: 2D-MUSIC spectrum with amplitude and phase errors.
For the comparison, the 2D Unitary ESPRIT algorithm was also implemented but in case of very low SNR in the real link budget, the estimation error was at tens of degree and therefore unusable for the DOA estimation.
6.2.4
Evaluation of measured data
The implemented DOA estimation algorithm, 2D MUSIC, was applied to the measured data. The measurements will be described in chapter 8 in details. The coordinate system used for the evaluation of the data as well as the trajectory the Rx antenna array was rotated along, is illustrated in Figure 6-5.
z Estimated DOA Elevation Trajectory
Zenith
Antenna Array y Azimuth x
Figure 6-5:Coordinate system used for evaluation.
The recorded I/Q values were the input for the DOA estimation algorithms: 2D MUSIC and 2D Unitary ESPRIT. The latter was used for comparison only. Examinations showed that in real scenarios (low SNR), only the MUSIC Algorithm produces reliable results, while the Unitary ESPRIT Algorithm fails. The resulting DOA estimates and the DOA errors are presented in Figure 6-6 and Figure 6-7, respectively. The angular range with small DOA errors is bigger for the MUSIC algorithm than for the ESPRIT algorithm, especially in the interesting area around the zenith. The slight horizontal offset of about 3 deg between the exact value and the estimates can be
Page 33
found also in the measured radiation patterns. This indicates that this offset was already present in the measurement setup.
Figure 6-6: DOA estimates.
Figure 6-7: DOA error.
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6.2.5
Estimation of computation time
The computation time for the selected MUSIC algorithm was estimated from PC simulations using built-in mathematical functions of linear algebra and then scaled according to a DSP with 1 GFLOPS performance (e.g. TMS320C6701 from Texas Instruments with a core frequency at 167 MHz). The real performance of the DSP algorithm cannot be determined exactly until it is not implemented on the particular DSP platform.
Figure 6-8: Estimated computation time.
The Figure 6-8 shows the estimated computation time under the above assumptions for different array sizes distinguishing between three algorithm steps. The calculation of the angular spectrum including the determination of maximums seems to be the most time consuming algorithm step. However, it has to be pointed out that the computation time depicted in this figure refers to a complete scan over half of the hemisphere. The size of the scan region can be reduced considerably during the satellite tracking to a small region near the direction previously estimated. This increases the update rate and thus reduces the response time of the tracking by decreasing the calculation time. For example, assuming a scan region of 55 with 0.5 resolution, it takes only about 50 ms. The computation time of the covariance matrix and the eigenvalues is mainly dependent on the array size and estimation accuracy. The results depicted in Figure 6-8 are a somehow remarkable since the computation time of the covariance matrix compared to the computation of eigenvalues and eigenvectors is higher in case of 14x14 array and lower in case of 16x16 array. The reason for this behavior is most probably the implementation of the built-in functions used for the simulation. Increasing the number of array elements implies increasing computation time. But the number of required array elements used for calculation of DOA estimates does not need to be the total number of array elements. I.e. only a subset of the entire antenna array is required for a sufficient DOA estimation reducing the computation time. As the simulations showed, an array size of about 14x14 should be sufficient for the given scenarios.
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6.3
Baseband hardware (transmit terminal)
The following baseband hardware has been developed and assembled to control the beam steering of the 16 transmit antennas (RF and IF part).
RF (Tx) IF (Tx)
Tx Distribution Board
4* I/Q-DAC 4* VGC-DAC
Tx Channel Board
Tx Channel Board
Tx Channel Board
Tx Channel Board
COM y
Configuration and Software download beamforming data Test
USB <-> FIFO Interface FPGA
COM x
RS-232 Driver
Microcontroller
Flash Memory (FPGA configuration)

PC
CPLD
Baseband Mainboard
Figure 6-9:Overview of the transmit terminal components.
The baseband hardware consists of the following components: PC Baseband Mainboard 4 Tx Channel Boards Tx Distribution Board
The following chapters describe these components.
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6.3.1
PC
The main functionality of the PC-Software is to transmit the beam steering data to the Baseband Mainboard.
6.3.2
Baseband Mainboard
The Baseband Mainboard carries the necessary components for the control of the four Tx Channel Boards. The Tx Channel Boards are vertical mounted into the channel board slots. The PC can transmit steering data or receive status information over a RS-232-Interface. Separate voltage regulators on the Baseband Mainboard generate the voltage for the RF and IF part. The Baseband Mainboard can be used in both the transmit and the receive terminal. This is achieved by the use of two different assembly variations, thus saving development time for the hardware. There are different configurations for the programmable logic (CPLD, FPGA), and different MCU software for the transmit and receive terminal is used. If the Baseband Mainboard is used for the receive terminal, Rx Channel Boards are vertical mounted into the channel board slots.
Figure 6-10: Baseband Mainboard (top view).
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6.3.3
Tx Channel Board
Every Tx Channel Board contains the necessary DACs for the generation of the I/Q-Signals and the VGC-Signals for four antennas.
Figure 6-11: TX Channel Board.
Four Tx Channel Boards are vertically mounted on a Baseband Mainboard to control 16 transmit antennas.
6.3.4
Tx Distribution Board
The Tx Distribution Board connects the four Tx Channel Boards with the four IF boards (developed by IHF).
6.4
Baseband hardware (receiver terminal)
The following baseband hardware has been developed and assembled to control the beam steering of the 16 receive antennas.
Page 38

RF (Rx) IF (Rx)
Rx Distribution Board
4*ADC DDC FPGA

Rx Channel Board
4*ADC DDC FPGA

Rx Channel Board
4*ADC DDC FPGA

Rx Channel Board
4*ADC DDC FPGA

Rx Channel Board
USB
I/Q Data Configuration and Software download
USB <-> FIFO Interface
COM y
COM x
Test
RS-232 Driver
Microcontroller
FPGA
Flash Memory (FPGA configuration)
CPLD
Baseband Mainboard
PC
Figure 6-12: Overview of the receive terminal components.
The baseband hardware consists of the following components: Rx Distribution Board 4 Rx Channel Boards Baseband Mainboard PC
The following chapters describe these components.
6.4.1
Rx Distribution Board
The Rx Distribution Board distribute the 16 IF-Signals to the four Rx Channel Boards.
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6.4.2
Rx Channel Board
Every Rx Channel Board contains four ADCs for the sampling of the IF-Signals from four antennas. The FPGA contains four digital down conversion units. Every unit computes the I/QSignals from the sampled IF-Signal. Four Rx Channel Boards are vertically mounted on a Baseband Mainboard.
Figure 6-13:RX Channel Board.
6.4.3
Baseband Mainboard
The Baseband Mainboard in the receiver terminal and the transmitter terminal has different configurations for the programmable logic (FPGA, CPLD) and different MCU Software. Four Rx Channel Boards are vertically mounted into the channel board slots. The PC receives the I/Q-Signals from every antenna channel over a USB-Interface or the status of the hardware over a RS-232-Interface. Separate voltage regulators on the Baseband Mainboard generate the voltage for the IF part.
6.4.4
PC
One feature of the PC software is the offline calibration of the receive terminal. Another feature is the generation and visualization of the radiation pattern of the antenna from the stored I/Q-Values of every antenna.
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6.5
6.5.1
Data Processing
Objective
The complex receiver and transmitter hardware requires the development of special control and acquisition software for the PC, which allows efficient measurement procedures. In the following, the control and acquisition software for the receiver part is described, since it is much more extensive than the software for the transmitter part, which only configures the transmitter hardware.
6.5.2
Concept
Figure 6-14 shows the concept of the control and acquisition software for the receiver part. This consists of a main module, which can access the receiver hardware as well as the software algorithms via appropriate interfaces. Among the Matlab algorithms, the algorithm called "DOA Estimation Algorithm" was developed by IMST, the others came from the project partner DLR. The entire LabWindows program code and the firmware of the receiver hardware were developed by IMST.
Rx Digital Hardware Serial Interface Interface to MatlabTM S1 Main Module with GUI (Master) MMI DOA Estimation algorithm Callback Functions S3 Hardware Driver Rx S2 Firmware
PC
Calibration algorithm Decoupling algorithm Beamforming algorithm
Mass Storage
(Measured data)
User MatlabTM (M-Code) LabWindowsTM (C-Code)
Figure 6-14: Software concept for the receiver part.
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6.5.3
Implementation
Some parts of the software are implemented in LabWindows, and the other parts exist as Matlab code. The interface between the software and the user is realized as a GUI (Figure 6-15 and Figure 6-16). It provides a real-time monitoring of the measured I/Q values during the calibration, the calculation of calibration coefficients, support during the recording of radiation patterns and the visualization of such appropriate diagrams. The measured values and calibration coefficients can be logged and recorded automatically. The software optionally exports the measured and displayed data to a text file or Matlab file for post-processing.
Figure 6-15: GUI "Calibration".
Figure 6-16: GUI "Beamforming".
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6.6
ADC CPLD CW DAC DDC DOA FF FIFO FPGA GUI I/Q IF LOS MCU
List of Abbreviations
Analogue-to-Digital Converter Complex Programmable Logic Device Continuous Wave Digital-to-Analogue Converter Digital Down Conversion Direction Of Arrival Far Field First In First Out Memory Field Programmable Gate Array Graphical User Interface Real and imaginary part of a complex signal Intermediate Frequency Line-Of-Sight Microcontroller Unit
MUSIC Multiple SIgnal Classification NWA PC RF Rx SNR Tx USB Network Analyzer Personal Computer Radio Frequency Receive Signal-to-Noise Ratio Transmit Universal Serial Bus
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RF-Electronics, Architecture and Integration
7
7.1

System Architecture
Most of the requirements for the system architecture and construction can be derived from the targeted project goals and the given state of the art, which were subject of earlier investigations and concept studies [1], [2]. The main objective of SANTANA was to demonstrate digital beamforming (DBF) in the Ka-band frequency range, which constantly gains importance for data communications due to the larger bandwidths available. DBF requires all antenna elements to be equipped with dedicated receiver and/or transmitter circuitry, because the individual element signals have to be controlled in a beamforming processor to allow maximum flexibility in beam generation and manipulation. In combination with the high frequencies and small wavelengths at Ka-band the integration density of the electronic circuitry is very high, since the antenna array surface area is determined by the wavelength of operation (half-wavelength spacing, see antenna chapter). One way to meet this integration density problem is to employ highly integrated MMICs and chipsets designed exclusively for the given application. In SANTANA this way was not pursued, since it usually leads to very high personnel expenses and fabrication costs. The project main goal was rather to prove the feasibility of DBF in Ka-band using only standard components that were readily commercially available. The integration density of many of these components stays considerably behind what is technologically feasible. For this reason the receiver and the transmitter arrays have been separated.
Figure 7-1: Modular terminal architecture.
The array construction follows a hybrid tile/brick approach, as suggested in [1]. The frontend, consisting of the Ka-band part of the electronic circuitry is arranged in a layer parallel to the array surface (tile), whereas the IF circuitry is integrated perpendicularly (brick).
06.03.2004 / L. C. Stange, H. Pawlak, A. Molke, A. F. Jacob, IHF, TU Braunschweig
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The overall construction of the terminal is based on a modular architecture, depicted in Figure 7-1. In this concept the terminal is subdivided into several modules containing a certain number of antenna elements together with their associated complete analog RF and IF circuitry. All crossmodule functions like power supply, clock and local oscillator signal generation, cooling and digital signal processing are implemented in the module base plate. This way the terminal size can be adapted to the application (link budget) and failed elements can be replaced very quickly. Furthermore, the yield is increased, which is very important with emerging technologies. On the other hand the modular architecture also allows to set a realistic and reasonable goal in the framework of SANTANA: the development, design, fabrication and test of a single module as terminal demonstrator. Since the terminal is all built up of identical modules, the major task of developing the terminal is already covered by the provision of a single module. In order to consequently follow this idea the module design is oriented towards the integration in a larger array, wherever possible. The number of elements contained in the module has been determined to 4 x 4 = 16. With a halfwavelength inter-element spacing this results in a module footprint of 30 x 30 mm and 20 x 20 mm for the receiver and the transmitter module, respectively. This size already poses a challenge with respect to yield and complexity but allows all important and critical aspects of the module to be tested and evaluated thoroughly.
7.2
7.2.1
7.2.1.1
RF-Electronics
Receiver
Circuit Architecture
Based on the investigations conducted in the course of the concept study [1] a heterodyne receiver circuit was selected. The main advantages of the heterodyne architecture over the homodyne or direct-conversion circuit are a better channel selectivity and greater flexibility in distributing the gain on different intermediate frequency (IF) stages. The potential of direct-conversion receivers lies in the monolithic integration, because external filters are only needed at the input and output of the receiver, while the heterodyne circuit requires filtering in intermediate frequency stages. Consequently the direct-conversion approach has gained some importance for large volume applications in mobile communications in the frequency range up to approx. 6 GHz [10]. Figure 7-2 shows a block diagram of the heterodyne circuit. The received signal coming from the antenna element at around 20 GHz passes the antenna feed (AF). In the RF frontend it is amplified and downconverted to a first intermediate frequency around 880 MHz. On this stage the channel is pre-selected and major part of the variable amplification is applied. The signal is downconverted a second time to a standard intermediate frequency at 70 MHz, where the channel selection is completed. Additional amplifiers ensure a signal level at the IF output that is suitable for the buffered analog-to-digital converters (ADC) in the digital signal processing part.
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The analog IF signal is bandpass-sampled and the final downconversion to baseband is done digitally (digital downconverter - DDC) in the signal processor. This avoids impairments caused by DC-offsets and I/Q imbalances present in any analog I/Q downconverter [11].
Figure 7-2: Block diagram of the receiver circuit.
The two local oscillator (LO) signals are generated externally (e.g. in the terminal baseplate) and distributed to all elements in the module by means of a passive feed network.
7.2.1.2
Circuit Components
The selection of components and the design of the circuit are strongly interdependent. As general guidelines for the selection of components the following criteria were used (in no particular order): Availability Price Supply requirements (power and uniformity of voltages) Fitness for targeted circuit concept Size (package or die, as applicable) Electrical performance
Especially the frequency plan, i.e. the choice of intermediate frequencies, is driven by the availability of suitable standard components, since the development of custom-made circuits was prohibitive with respect to cost and timeframe. The frequency and bandwidth determining devices like filters and oscillators had to be selected from the components intended for standard communication systems. The selection had to orientate primarily at the large bandwidth required. Thus, for these components the variety to choose from is rather small. Other devices like amplifiers and mixers usually exhibit a more broadband characteristic and consequently are not tied to a special communication standard, resulting in a larger assortment of possible candidates.
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Of course, in the Ka-band frequency range the number of available components is much smaller than for lower frequencies, because there are no mass markets to be served yet. The frontend consists of a low-noise amplifier (LNA) [12] and a subharmonically pumped mixer (MIX1) with integrated LO signal amplifier, requiring an input pump power of only 5 dBm [13]. These two features facilitate the generation and distribution of the first LO signal significantly: the losses in the feed network decrease with frequency and the low LO input power requirement eliminates the need to incorporate amplifiers in the feed network. The overall power of the LO signal fed to the module can stay below 15 dBm and can thus be generated with standard amplifiers. In contrast, most passive MMIC mixers require a pump power per chip in excess of 10 dBm, which would call for total input power of more than 25 dBm. The pre-selection of the channel in the first IF stage is done with a surface-acoustic-wave (SAW) filter with 25 MHz bandwidth (CSF1, CDMA communication standard). In addition a chain of lowpower and low-noise amplifiers (IFA1/2/3) and a digital variable attenuator (ATT) with a control range of 28 dB in 4 dB steps provide the major signal gain. The second downconverter is an active low-power Gilbert-cell mixer (MIX2) with a conversion gain of 14 dB. On the second IF stage at 70 MHz another SAW filter with 20 MHz bandwidth is used as channel-select filter (CSF2). It is followed by two general-purpose amplifiers (IFA4/5) with higher output power capabilities. Additionally (not shown in Figure 7-2) an image-reject filter was envisioned to be incorporated between the Ka-band LNA and the first mixer to improve image rejection of the frontend, in case it should be necessary. Since standard filters for Ka-band were not available at all, a custom design has been done on ceramic alumina substrate with gold metallization. The filter is based on a 2nd order Chebyshev design with folded resonators and a coupling section between the input and the output, which introduces additional zeros in the response and so improves the stopband characteristic in the image frequency band. In the final circuit implemented the antenna waveguide feed provides sufficient image rejection due to its resonant behavior, so the filter was not needed.
5 0 -5 S11, S21 [dB] -10 -15 -20 -25 -30 -35 -40 15 17.5 20 Frequency [GHz] 22.5 25
Figure 7-3: Left: image-reject filter characteristic (simulation dashed, measurement solid), right: filter layout.
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7.2.1.3
Receiver System Simulation
The components that were finally selected are listed in Table 7-1 with some performance figures from the data sheets that have all been verified by measurements. With these data a level budget can be calculated in order to estimate the overall noise figure and the dynamic range. The input signal and noise powers depend on the satellite system, the link budget and on the background noise that is collected by the antenna. The link and noise parameters are compiled in. These are based on a geostationary satellite according to the Euroskyway system. For the background noise temperature a rainy sky is assumed as worst case. The system noise figure is primarily governed by the noise characteristic of the first component in the receiver chain, namely the LNA MMIC. Although the following first downconverter exhibits a rather high conversion loss and consequently a high noise figure, it does not contribute significantly to the system noise figure due to the relatively high gain of the LNA. With a feed loss of 0.5 dB the overall noise figure arrives at approx. 4 dB.
Device AF LNA MIX1 IFA1 CSF1 IFA2 ATT IFA3 MIX2 CSF2 IFA4 IFA5 Part Microstrip HMC 262 HMC 337 RF 2323 855728 RF 2323 HMC 230 RF 2323 MAX 2681 854669 RF 2325 RF 2325 Manufacturer (IHF) Hittite Hittite RF Microdevices SawTek RF Microdevices Hittite RF Microdevices Maxim SawTek RF Microdevices RF Microdevices Gain [dB] -0.5 19.5 -9 20 -4 20 -8 20 14 -15 19 19 -11 -11 -1 -1 27 27 -27 -18 -6 7 12 -27 -18 7 -15 1 -27 -6.5 7 -18 26 28 7 P1dB [dBm] IP3 [dBm] Supply [mA]
Table 7-1: Receiver components and performance data.
Parameter Frequency Distance to satellite Satellite EIRP Atmospheric attenuation Depolarization loss Attenuation due to rain Sky temperature Rain temperature Channel bandwidth
Value 19.9GHz 36 000 km 54.2 dBW 0.5 dB 0.5 dB 7.5 dB 20 K 275 K 20 MHz
Table 7-2: Link and noise parameters for level budget calculation.
Figure 7-4 shows the level budget of the receiver with the input compression and 3rd-order intercept points of all active components. All signal (Pinc incident power) and noise (In NP input noise
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power) values are referred to the input of the respective devices. Accounting for an antenna element gain of 4 dB the signal enters the receiver with a power of approx. 123 dBm, while the input noise power is at 101 dBm (over 20 MHz IF bandwidth), giving an input signal-to-noise ratio (SNR) of approx. 22 dB. This means that the wanted signal disappears below the thermal noise floor due to the low gain of the single antenna element. (Only the coherent combination of all the element signals in the digital signal processor recovers the signal out of the noise.) At the output of the receiver chain the SNR has been further degraded by the noise generated in the active devices to approx. 25 dB. With the variable attenuator set to -8 dB gain the output noise power arrives at about 3 dBm. Together with the amplification of the buffer amplifier at the input to the ADC this level is adequate to make good use of the ADC input dynamic range, while still leaving some margin accounting for the statistical nature of noise, that could drive the ADC into saturation. For estimating the dynamic range of the receiver it is common practice to assume the maximum allowable signal level to be reached, when the signals generate 3rd-order intermodulation products at levels equaling the system noise floor [14]. When taking into account this criterion a spurious-free dynamic range (SFDR) of 20 dB is obtained, which should be sufficient for this application.
20 0 Power level [dBm] -20 -40 -60 -80 -100 -120 -140
IX 1 IF A1 C SF 1 IF A2 AT T IF A3 M IX 2 C SF 2 IF A4 IF A5 (A D C ) AF LN M A
Pinc [dBm] In IP3 [dBm] In NP [dBm] In 1dB [dBm]
Figure 7-4: Receiver level budget.
7.2.1.4
Prototypes and Measurements
Both the Ka-band frontend and the IF part have been built up as prototypes to verify their performance before incorporation into the module. Furthermore, a complete 1-element frontend with antenna element and waveguide feed has been fabricated to test the interconnection and its effect on the frontend (impedance match, image rejection etc.).
7.2.1.4.1 Frontend-circuitry
The LNA MMIC being the most critical component for overall receiver noise figure has been characterized extensively in order to check for it meeting the specified performance.
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Figure 7-5 shows the results of a on-chip network analyzer measurement. The gain (|S21|) as well as the output return loss (-|S22|) are lower than expected from the datasheet ([12], typical values), while the other parameters are close to specified. The noise performance has been evaluated using a spectrum analyzer equipped with a special noise figure measurement option. In Figure 7-6 the gain and the noise figure obtained from this measurement are depicted. The measured noise figure on the order of 3 dB between 19 and 21 GHz is significantly higher than the datasheet figure describing the typical performance, but it still stays below the maximum noise figure specified for this frequency range. It must be noted, however, that the measurement uncertainty is on the order of 1 dB.
30
|S(1,1)| [dB]
-10
|S(2,1)| [dB] 16 18 20 22 Frequency [GHz] 24
20
-20
10
-30
16
18 20 22 Frequency [GHz]
24
0 -10 |S(1,2)| [dB] |S(2,2)| [dB] 16 18 20 22 Frequency [GHz] 24 -20 -30 -40 -50
-10
-20
-30
16
24
Figure 7-5: S-parameter measurement results for frontend LNA MMIC.
10 8 Noise Figure [dB] 6 4 2 0 17
25 20 15 10 5 0 23
18
22
Figure 7-6: Gain and noise figure measurement results for frontend LNA MMIC.
Gain [dB]
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Since it was not clear whether the image-reject filter would be needed to improve overall image rejection or can be discarded thanks to sufficient filtering by the antenna feed, several frontend prototypes have been built up with and without image-reject filters. The circuits were assembled with Rogers RT/duroid 6010 and RO 3010 as interconnection substrates on a brass carrier. The available space and the configuration of the chips residing in recesses cut into the substrates already orientated along the requirements valid for the 4x4 module frontend. At the RF inputs and outputs microstrip-to-coplanar line transitions are used to allow the circuit to be measured on a waferprobing station with coplanar probes. Before bonding the RF interconnects to the substrate, the MMICs were characterized by direct on-chip probing. Figure 7-7 shows one of the prototypes during measurement on the probing station.
Figure 7-7: Left: circuit prototype on probe station, right: magnified view on the MMIC circuitry.
In Figure 7-8 a measurement of the conversion gain of the frontend circuit in the receive frequency band from 19.7 to 20.2 GHz is shown for different LO pump power levels. The measured characteristic is in accordance with the expected performance from the datasheets. The conversion gain is greater than 10 dB for LO levels of > 5 dB, gain flatness is better than 0.5 dB. For testing the interconnection of the frontend circuit and the antenna element a single-element module has been fabricated. It consists of the antenna element designed by DLR together with the circular waveguide feed and the frontend MMIC circuitry (c.f. section 7.3, Integration). DC power is supplied to the module by miniature plugs, the RF interfaces (LO input and IF output) are established by SMA coaxial connectors. The module was tested in a CW free-space transmission measurement in the laboratory with a rectangular horn as transmitting antenna. A spectrum analyzer was used as IF receiver. Figure 7-9 depicts the module from both sides. In Figure 7-10 the measured conversion gain over frequency is shown. The conversion gain of approx. 15 dB for a LO pump power of 4 dBm now includes the additional gain of the antenna element. By comparison with onchip conversion gain measurements carried out on the same MMIC chipset the single antenna element gain can be estimated to approx. 5 dBi.
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12 10 Conv. Gain [dB] 8 6 4 2 0 19.6 -7 dBm -6 dBm -5 dBm -4 dBm -3 dBm -2 dBm 19.8 20 Frequency [GHz] 20.2 20.4
Figure 7-8: Conversion gain vs. receive band frequency of a frontend circuit prototype.
Figure 7-9: Single-element module prototype: antenna side (left), circuit side (right).
20
15 Conv. Gain [dB]
10
19.4
19.6
19.8 20 20.2 Frequency [GHz]
20.4
20.6
Figure 7-10: Conversion gain (incl. antenna element gain) vs. receive band frequency of singleelement module prototype. 06.03.2004 / L. C. Stange, H. Pawlak, A. Molke, A. F. Jacob, IHF, TU Braunschweig Page 52
The single-element module allows the image rejection of the waveguide feed to be estimated by comparing the conversion gain in the receive band to that in the image band and taking into account the chipset characteristic. A performance comparison of the waveguide feed with the image reject filter in terms of image suppression is shown in Figure 7-11. The data are plotted over frequency in the receive band (rather than the image band). The filter exhibits a higher suppression for the lower part of the frequency range (away from the receive band), but it degrades towards higher frequencies to only 10 dB. The suppression caused by the feed is on the order of 15 dB and decreases only slightly in the vicinity of the receive band. Therefore, the extra filter was not needed in the final module prototype.
30 25 Image rejection [dB] 20 15 10 5 0 19
waveguide filter
19.5
20 20.5 RF Frequency [GHz]
21
Figure 7-11: Contributions of waveguide and filter to image suppression vs. receive band frequency.
On the final 4x4 module frontend all chipsets have been characterized in direct on-chip measurements to verify their functionality prior to final module assembly. Figure 7-12 shows the conversion gain for all 16 chipsets on the first fabricated module. The variation range of these measured data is approx. 3 dB, which is an important figure for the assessment of the overall module performance that will be outlined later.
20
Conversion Gain [dB]
15
10
19.6
19.8 20 Frequency [GHz]
20.2
20.4
Figure 7-12: Conversion gain data of 4x4 module frontend chipsets (on-chip measurements).
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Final Report SANTANA 7.2.1.4.2 Intermediate frequency circuit
After testing all IF devices separately on simple evaluation boards (see Figure 7-13), the IF circuitry has been built up as a single-element prototype on RO4003 RF substrate. Figure 7-14 shows a photograph of the prototype board. Since the components and the circuit performed as expected from the simulations and calculations and the noise characteristic is not critical for the overall receiver noise performance, no detailed measurement results are being presented here.
Figure 7-13: Evaluation boards for IF components.
Figure 7-14: Prototype of IF circuitry.
The final IF board is a multilayer structure made of standard printed-circuit board (PCB) material FR-4 and is depicted in Figure 7-15. It carries 4 element-circuits, two on each side. Additionally linear low-drop voltage regulators are provided on the board, separately for each element-circuit in order to avoid supply noise contamination from the digital circuitry. Because of persistent problems with parasitic oscillations that used to build up on the final IF board prototypes due to the high gain of the intermediate frequency stages, the first amplifier (IFA1) was
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omitted from the IF element circuit. This measure eliminated the oscillation problems without compromising the general functionality of the element-circuit.
Figure 7-15: Prototype of IF circuitry. 7.2.1.4.3 Local oscillator synthesizers
For the heterodyne receiver circuit with double frequency downconversion two local oscillator signal sources are required. These signals are generated by two central synthesizers and distributed to all element in the module over passive feed networks. The first LO signal at around 9.5 GHz could not be directly generated because a suitable integrated voltage controlled oscillator (VCO) was not available as a standard component. Hence, a VCO operating around 4.75 GHz followed by a frequency doubler was employed. A block diagram of the circuit is depicted in Figure 7-16.
Figure 7-16: Block diagram of 9.5 GHz synthesizer.
The VCO is controlled by an integrated phase-locked loop (PLL), which in turn is locked to a quartz oscillator. A part of the VCO output signal is fed back through a Wilkinson divider (WD) to the PLL, where it is scaled down to a lower frequency in order to allow a phase/frequency comparison with the stable quartz reference signal. The other part of the output signal is amplified and doubled in frequency by a passive diode doubler to yield an output at 9.5 GHz with an output power of approx. 12 dBm. The second output for the 5 GHz signal from the VCO is only provided for test purposes. Figure 7-17 shows a photograph of the synthesizer prototype. Since only a central synthesizer is needed for each frequency the requirements on the physical dimensions are not very restrictive.
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Figure 7-18 shows the measured one-sided output noise spectrum of the synthesizer together with the phase noise characteristic simulated using the PLL design software provided by the manufacturer of the PLL circuit. The agreement between measurement and simulation is very good.
Figure 7-17: 9.5 GHz synthesizer prototype.
-60 -70 Phase Noise [dBc/Hz] -80 -90 -100 -110 -120 -130 -140 1 10 100 1000 Frequency Offset [kHz] 10000 measurement simulation
Figure 7-18: Phase noise output spectrum of 9.5 GHz synthesizer (measurement and simulation) vs. frequency offset from the carrier.
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Figure 7-19: 950 MHz synthesizer prototype.
For the second LO synthesizer operating at 950 MHz (see Figure 7-19) the output signal could be generated directly, eliminating the need for any frequency multipliers. With this exception the block diagram and the qualitative results obtained are very similar, so they will not be presented here.
7.2.2
7.2.2.1
Transmitter
Overview
Figure 7-20: Block diagram of the transmitter circuitry.
The electronics of the transmitter is built up in a two-stage heterodyne architecture. Figure 7-20 shows a block diagram of the complete transmitter electronics including IF circuitry. The I/Qsignals are generated digitally and modulated onto the IF carrier frequency of 880 MHz. The chosen modulator can be used for various digital and analog modulation schemes. After modulation the signal is filtered by a SAW-filter. The output power of the first stage can be adjusted by a gain control amplifier in a wide range of 50 dB. This gain control amplifier is controlled by the DSP processing unit. The IF-hardware is built up using standard SMD-components, which limit the maximal packing density. A brick-architecture was used for the IF-part. The following RF stage upconverts the modulated IF-signal to the specified transmit band (29.5 to 30.0 GHz). For upconversion a subharmonically pumped mixer is used. The advantages are reduced losses and simplified feed design due to lower LO frequencies (14.31 to 14.56 GHz). A filter should be placed behind the mixer to suppress the image frequency. Here, a specialized filter was designed. Later it turned out that the required space on the RF frontend could not be allocated. Therefore, the concept of the discrete filter has been omitted and the resonant waveguide interconnect was used for
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filtering (c.f. chapter 4, Antenna element and array). Afterwards, the signal is amplified and fed to the antenna interconnect. A tile-architecture was used for the RF-part.
7.2.2.2
RF circuitry and prototypes
The RF circuitry consists of a subharmonically pumped mixer, the discrete filter (optional) and an amplifier. First the design of the discrete filter is described. Afterwards, the characteristics of the mixer and amplifier which are commercially available components are explained in detail. The size of the filter should be as small as possible in order to save space. Alumina has been chosen as filter substrate for its high dielectric constant and the possibility to realize very small lines and gaps. The structure itself is a second order directional filter based on a split ring resonator design with minimized dimensions (size of filter-structure: 1.4 x 1.2 mm) [15]. For simulation the software tool ADS Momentum was used. The filter structure and the measured filter response are shown in Figure 7-21. The principal advantage of the design is its flexibility. The power can be coupled in on both sides of port one and can be coupled out on both sides of port two. The unused ends of each coupling line are terminated in an open circuit. The measured insertion loss is 4.0 dB, the image rejection is greater than 30.0 dB at midband frequency (29.75 GHz). As already mentioned no space was available in the final design of the RF frontend for the discrete filter. For details concerning the filtering characteristics of the waveguide interconnect see chapter 4, Antenna element and array.
Figure 7-21: Filter structure and measured filter response.
The requirements for the amplifier MMIC were high gain, high output power level and low current consumption (i.e. heat generation). Therefore, a medium power amplifier was used as output stage. A high power amplifier could not be used in the current design because these amplifiers need a driver amplifier for pre-amplification (additional space requirement). On the other hand commercially available high power amplifiers have a high current consumption and produce a large amount of heat which has to be dissipated. The amplifier CHA2098b (UMS) was chosen. This device has a small-signal gain of 19.0 dB, an output power level of + 16 dBm and a typical current consumption of 150 mA. The requirements of the subharmonical mixer were loss conversion loss,
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high 1 dB compression point and third order intercept point level. Here, the mixer HMC264 (Hittite) was chosen. The specifications for this mixer are: 10 dB conversion loss, +6 dBm 1 dB compression point and +13 dBm IP3 level. The amplifier MMIC has been tested individually (verification of scattering-parameters) prior to fabrication of channel prototypes because these high gain devices are susceptible to parasitic oscillations. After the successful test of the amplifier several prototypes of one complete RF channel have been fabricated. The technology of assembly is similar to the process used for the receiver circuitry and is not repeated here.
Figure 7-22: Prototype Tx (single RF channel w/o antenna).
A photograph of one realized channel prototype including subharmonic mixer, discrete filter and amplifier is shown in Figure 7-22. The small lines, which can be seen in the photograph, are 50 Ohm microstrip transmission lines for RF connection of the MMICs. The larger lines are for DC supply. Since the RF signals are contacted by coplanar probes, coplanar waveguide-to-microstrip transitions are required (not shown in Figure 7-22). Broadband transitions for the RF, LO and IF center frequencies were designed, which employ quarter-wave radial stubs [17]. The DC supply voltages were contacted by needles placed onto a pad on the prototype substrate.
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Figure 7-23: Power conversion of the prototype channel (w/o filter).
For operation a DC supply voltage of 3.8 V for both the amplifier and the mixer is needed. The amplifier needs an additional gate voltage of approximately - 0.2 V. The extra effort of bringing a second voltage to the chip is compensated by the possibility of tuning the output power of the amplifier via the gate bias level. The mixer requires a LO drive level of - 4.0 dBm (condition for optimal conversion gain). The current consumption under these drive conditions is approximately 150 mA. The measured RF performance (power conversion) of a prototype channel without discrete filter is depicted in Figure 7-23. The measured small-signal gain is 9 dB (10 dB conversion loss of the mixer and 19 dB gain of the amplifier). At an IF input power level of + 5 dBm the circuit saturates. The RF output power at this input power level is ca. + 8.5 dBm. The performance remains approximately constant over the whole transmit band, however slightly decreasing when moving towards higher frequencies. The saturation is mainly caused by the mixer. The amplifier is operated in the linear region. For nonlinear characterization two-tone-measurements were carried out (f = 30 MHz). The measured intermodulation ratio was 16.5 dB for an IF power level of + 5 dBm.
7.2.2.3
Single channel module
Figure 7-24: Single channel module Tx (backside, front view).
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In order to test the complete RF circuitry including the waveguide interconnect a single channel module has been built (photographs shown in Figure 7-24). First, a brass plate with alignment holes and a precision fit for the ceramic inset of the waveguide has been fabricated. The ceramic was inserted and both the antenna and electronics substrates were glued onto the plate. The MMICs for one upconverter channel (without filter) were assembled, consequently. Additional SMD bypass capacitors were added. Measurements were done in the laboratory for first characterization. The fixed intermediate frequency was upconverted to the transmit band (cw-operation only). A rectangular horn was used as receiving antenna. The estimated EIRP (upper sideband) of the single channel module obtained from the laboratory measurements is shown in Figure 7-25. The bandpass behavior of the antenna interconnect can be seen. The passband is shifted towards lower frequencies and the passband bandwidth is larger than expected. The image rejection of the electronics and antenna interconnect was measured with a spectrum analyzer to 15.9 dB at 29.5 GHz. The results show the functionality of the chosen concept for the architecture and the feeding concept of the antenna.
Figure 7-25: EIRP of single channel module.
The gain of the antenna element estimated from the EIRP measurements was 4.0 dBi (including losses of the waveguide feed). More elaborated measurements of the single channel module including antenna diagrams were performed in an anechoic chamber. These measurements were carried out at the facilities of IMST GmbH and confirmed the preliminary results obtained from the laboratory measurements. In order to improve the passband response of the antenna interconnect the interface structure was optimized (c.f. chapter 4, Antenna element and array).
7.2.2.4
IF circuitry
The IF circuitry consists of an analog I/Q-modulator, a SAW-filter and a gain control amplifier as described in the overview (see block diagram in Figure 7-20). First the devices are described briefly. Afterwards the layout of the final IF PCBs is explained. Test results of the IF PCBs are presented after a description of the necessary test-setup.
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The most important requirement for the modulator was high linearity to introduce as little distortion as possible. Here, the analog I/Q-modulator AD8346 (Analog Devices) has been chosen. The amplitude balance of this device is 0.2 dB and the phase error 1 degree. This modulator can be used in the frequency range from 0.8 to 2.5 GHz and has a current consumption of 45 mA. For the bandpass filter, which is placed directly behind the modulator, a low-loss SAW-filter has been chosen (Sawtek 855782). This filter has a bandwidth of 25 MHz and an insertion loss of 1.8 dB (typical value). The stopband attenuation is specified to 38 dB. The requirements for the gain control amplifier were: high gain control range, high output power and low current consumption. Here, the RF2381 (RF Micro Devices) has been chosen. This device has a gain control range of 50 dB, an output power of +8 dBm (modulated signal, average signal power) and maximum current consumption of 50 mA. The amplifier requires a gain control voltage of 0.0 to 2.2 V, which is generated by a DAC in the DSP unit. The current in the gain control path is negligible. Since the normal operation of this device is in the 1880 MHz band, the matching networks at the input and output terminal have been redesigned for a center frequency of 880 MHz.
Figure 7-26: Output power vs. gain control voltage of RF2381.
The measured performance (880 MHz operation) of the amplifier is shown in Figure 7-26. The output power is plotted versus the gain control voltage Vgc for three different input power levels. The maximum attenuation of the device (33 dB) is almost independent of the input power level. The maximum output power is approximately + 19 dbm (0 dBm input power).
Figure 7-27: IF circuitry test-setup.
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Prototype IF channels have been built up after the successful device tests. An analog rather than a digital test-setup has been used because the digital test-setup would have required specialized hardware that was not available. However, all relevant information can be extracted from the analog test-setup depicted in Figure 7-27. Here, an amplitude modulation is generated to test the IF channels. The three necessary voltages are derived from the supply voltage VDD by division. A crystal oscillator, which generates a 4 MHz voltage (square waveform), drives a balun built up of discrete components. The balun is necessary to transform the single-ended output of the crystal oscillator to the balanced inputs of the modulator. Additionally, the modulator inputs must be biased for proper operation. Here, special attention must be paid to the DC offsets. Therefore, the bias networks must be designed with care. Under these drive conditions the modulator generates an amplitude modulation of the fundamental wave. Due to the square waveform of the oscillator many harmonics are expected in the output spectrum.
Figure 7-28: Photograph of final IF PCB.
After the successful tests of the prototype IF channels the IF PCBs were designed. Figure 7-28 shows a photograph. The layout of the PCBs is described in the following. Each IF board consists of four independent channels, two of them arranged on top and two on the bottom. Figure 7-28 shows the topside view of the PCB. The connectorstrip with 40 pins in the lower left establishes the contact to the Tx distribution board, the connectorstrip with 26 pins in the upper right provides contact to the manifold board. The 880 MHz LO signal is supplied via a MC-Card connector and distributed to the four IF channels. The IF boards are 5 layer PCBs built up of standard FR4 laminate. The innermost layer is used mainly for supply voltages while the other two buried layers form groundplanes. Here, some additional coplanar waveguides are inserted into the groundplanes to ease the signal routing on the top- and bottomside. Beside transmission lines for signal routing the top- and bottomlayer include solder joints for all devices and connectors.
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Figure 7-29: Measured IF output spectrum (exemplary channel).
After assembly of the IF PCBs tests were carried out with the same test-setup used for the prototype channels (see block diagram in Figure 7-27). One exemplary measurement is depicted in Figure 7-29. Since the modulation frequency is 4 MHz the main side bands are located at 876 and 884 MHz, respectively. The output spectrum exhibits many peaks beside the carrier, which can be explained by the square waveform of the crystal oscillator. A square waveform has many harmonics in the spectrum, which are modulated onto the carrier. The power level of the main side bands is +7 dBm, which is a sufficient drive level for the subharmonic mixer of the RF stage. The offset of the SAW-filter can be seen in the output spectrum by the increase in the noise floor around the carrier frequency. The measured isolation of the channels was > 40.0 dB.
7.2.2.5
LO synthesizer
Figure 7-30: Block diagram of the LO circuitry.
The LO signals are generated on dedicated synthesizer PCBs and distributed to each channel of the module for synchronization purposes. A phased-locked loop (PLL) is used for signal generation. The block diagram is shown in Figure 7-30. The output of the VCO (MOS-1826PV by MiniCircuits) is stabilized by a feedback loop employing a standard PLL-IC (ADF4112 by Analog Devices) with a crystal oscillator (SG615 by Seiko Epson) providing the reference frequency of 20 MHz. The PLL was designed by means of a simulation tool provided by the manufacturer of the PLL-IC.
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Figure 7-31: Block diagram of the multiplier.
In order to have a LO signal in the specified band (14.31 14.56 GHz) the output of the PLL must be multiplied by eight. Here, a multiplier was realized (block diagram see Figure 7-31) consisting of a preamplifier (RF2324 by Mini-Circuits), a passive 2x multiplier (KBA-20 by Mini-Circuits) and an active 4x multiplier (HMC370LP4 by Hittite). Afterwards the signal is filtered to remove harmonics generated by the multiplication and amplified (two amplifiers HMC441LM1 by Hittite are used to achieve both high gain and output power level).
Figure 7-32: Photograph of synthesizer and multiplier boards.
Photographs of the realized synthesizer and multiplier PCBs are shown in Figure 7-32. The actual layout follows the recommendations of the manufacturers. Coplanar transmission lines have been preferred in the layouts to have a good connection to ground and to reduce electromagnetic interference. Standard SMD components are used for assembly. For bringing RF signals from and to the PCBs standard SMA-microstrip connectors are used.
Figure 7-33: Phase noise and spectrum LO.
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Figure 7-33 shows the simulated and measured performance of the inner PLL-circuit at a frequency of 1.78 GHz. The measurement is in good agreement with the simulation. In Figure 7-33 the spectrum after multiplication (without power amplifier) can be seen, too. The frequency output is clear (no spurious signals near the carrier). The output power level after amplification is +17 dBm. For the IF stage a second LO at a fixed frequency of 880 MHz is necessary. The design is similar to that of the 15 GHz-LO (without multiplier and filter). Only the VCO must be exchanged. After amplification (RF2381) the output of the PLL-circuit can be used directly to feed the IF circuitry.
7.3
Integration
In this section electronics integration aspects of the SANTANA module will be discussed. It will be highlighted how the different parts of the RF circuitry (Ka-band frontend, IF-part, LO distribution) are arranged and interconnected to obtain a highly compact 4x4-element module meeting the stringent space requirements. Since the general design architecture of the Rx and the Tx module are identical, both parts will be treated jointly. Particularities or special features of one part will be addressed where necessary. The partitioning of the electronic circuitry into the Ka-band frontend and the IF circuit that has been used throughout the sections dealing with the Rx and Tx electronic circuitry also reflects in the physical construction of the module. The MMIC circuits up to and including the first down-/ upconverter mixers are integrated following a tile architecture [16] and assembled in a layer parallel to the antenna surface. Together with the planar microstrip antenna elements the Ka-band electronic circuitry forms an entity which will henceforth be termed the Ka-band frontend part the module. Owing to the limited integration density of the standard packaged devices available for the lower frequency ranges the IF part had to be arranged perpendicularly to the antenna surface resembling a brick architecture [16]. The interconnection of these two parts is established by special solderless connectors together with multi-layer printed-circuit boards the manifold boards that provide signal routing and distribution.
7.3.1
Ka-band Frontend
A schematic view of the frontend architecture is shown in Figure 7-34. The core of the frontend tile is a metal plate giving mechanical rigidity to the module. This aluminum plate serves as a carrier for the antenna elements on its upper side and the frontend electronic circuitry on its backside. Beyond providing structural support the aluminum carrier plate also serves as socket for the waveguide feeds to the antenna elements and as a heat spreader for the receiver or an active liquid-cooled heatsink (coldplate) for the transmitter frontend tile.
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Figure 7-34: Module construction schematic.
7.3.1.1
Antenna feed
The antenna layer consists of a single substrate with microstrip patches on top (c.f. chapters 3 and 4, Antenna element and array). The interconnection of the antenna elements to the RF circuits is established by circular waveguides drilled in the metal plate. Cylindrical ceramic fills in the waveguides are used to reduce their physical dimension to account for the high packaging density. The waveguides are slot-coupled to the antenna elements on the antenna side and to microstrip lines leading to the RF circuits on the electronics side. For that purpose rectangular or annular coupling slots are etched into the groundplanes of the antenna as well as the frontend substrate and both substrates are attached to the metal plate using silver-filled isotropically conductive adhesive. A precise alignment of the substrates to the aluminum plate is vital for a good performance of the interconnect. To this end alignment pins located at the periphery of the substrates are used in the manual fabrication. From several experiments it could be shown that this method offers mechanical tolerances of better than 100 m, which, based on tolerance simulations, can be considered sufficient for the structures. Owing to its resonant nature the waveguide antenna feed features a pronounced filter characteristic and thereby contributes significantly to the image rejection performance of the frontend (c.f. section 7.2, RF-Electronics). This is why a separate image-reject filter could finally be dispensed with, thereby slightly alleviating the integration complexity. For proving the feasibility of this interconnect back-to-back test structures incorporating 4 microstrip-slot-waveguide transitions have been designed and tested. In Figure 7-35 the simulation is compared with the measurement results for an exemplary transition at 20 GHz for Rx. It can be stated that the agreement is good, the measured input/output reflections (S11) are very close to the simulated values. Only the measured S21 exceed the simulated, partly because the losses could not be completely modeled in the simulation (e.g. substrate losses). The measured insertion loss total to about 3.5 dB for the complete test structure, which allows the losses of a single transition to be estimated to about 1.5 dB (assuming another 0.5 dB line losses).
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5 0 -5 S11, S21 [dB] -10 -15 -20 -25 -30 -35 -40 16 18 20 22 Frequency [GHz] 24
Figure 7-35: Waveguide interconnect test structure Left: simulation (dashed) and measurement results (solid), Right: simulation model.
7.3.1.2
RF electronics integration
Figure 7-36 shows a photograph of the Rx module frontend RF-side fully populated with 32 MMICs (16 LNAs, 16 Mixers) together with their 32 RF-bypass capacitors on a footprint of 30 x 30 mm. The 16 element-circuits are partitioned into four identical 2x2-subgroups. Within each subgroup the four associated circuits are arranged in a 90-rotation-symmetric configuration accounting for the sequential-rotation approach employed to obtain circular polarization (c.f. chapters 3 and 4, Antenna element and array). The area in the centers of the 4 subgroups accommodates all electrical connections to or from the frontend circuitry (power supply, IF, and LO signals). The first LO signal at 9.5 GHz is supplied to each subgroup and is distributed to the element-circuits through a passive microstrip 1:4-divider network on the frontend substrate. All other electrical connections (DC and IF) are made individually for each element.
Figure 7-36: Rx module frontend RF-side.
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Figure 7-37 shows a photograph of the fully populated Tx module RF-side. For the Tx frontend tile the total available footprint of only 20 x 20 mm is even smaller, especially since additional space had to be reserved for coolant supply (inlet and outlet) to the aluminum plate, that serves as a cold plate. Again, 32 MMICs, 64 bypass capacitors and a host of passive structures like the waveguide interconnect, power dividers, LO / IF feed circuitry had to be accommodated. In contrast to the frontend design of the receiver a regular configuration of the 16 element-circuits was not possible due to the space limitations. The element-circuits were placed in such a way as to keep a maximum distance from the waveguide feeding lines being the most critical elements. Wherever possible the MMICs were arranged in a straight configuration to allow direct wire bonding from chip to chip. In three cases, however, the mixer MMICs had to be rotated slightly to grant more space to the IF feed circuitry. The LO signal is fed to five central feed points and distributed to all sixteen channels over miniaturized power dividers (1:2, 2 x 1:3, 2 x 1:4).
Figure 7-37: Tx module frontend RF-side.
Figure 7-38 shows a magnified view of an element-circuit, exemplary for the Rx frontend. The frontend substrate is based on a ceramic-filled polymer (PTFE) laminate (Rogers RO3010) and features a relatively high permittivity of r = 10.2 to minimize physical RF line lengths. The MMIC chips reside in recesses cut into the frontend substrate. They are bonded to the aluminum plate using conductive adhesives with intermediate molybdenum tabs [18]. These tabs are used to match the coefficient of thermal expansion of the GaAs material while maintaining good electrical and thermal contact between the MMIC and the metal plate. The MMICs are interconnected to the frontend substrate using gold wire wedge-bonding technology. The copper conductor traces on the frontend substrate are gold-plated to ensure reliable bond connections.
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Figure 7-38: Rx element-circuit layout.
A milled aluminum cover protects the frontend electronic circuitry and also shields it electromagnetically. For the Rx frontend this cover also features a cross of partition walls that separate the four subgroups of elements. Thereby four smaller cavities are spanned above the MMC circuitry to shift possible package resonances to higher frequencies and to reduce crosstalk between subgroups.
7.3.1.3
Cooling system
The MMICs of the transmitter frontend generate a heat of nominally 10 W which results in a heat flux of 2.5 W/cm2. Several cooling concepts have been investigated to remove this rather high heat flux. Early estimations indicated that only a liquid cooling system has the necessary capacity to remove the heat. Figure 7-39 shows a schematic cross section of the cooling concept used for the transmitter. The carrier is fabricated as a cold plate [19]. Water is flowing through a straight duct drilled into the carrier. For design of the cold plate the software ANSYS was used, which allows complete CFD-simulations (computational fluid dynamics). The calculations are carried out in two steps. First the fluid dynamics of the water flow for a given input pressure, heat flux and geometry are calculated (the flow is laminar since the used pressures are small). In a second step the temperatures of both the water flow and the carrier are calculated. Several carriers were built for thermal tests (a photograph of an early brass carrier in shown in Figure 7-39). The diameter of the duct ranges from 1.2 mm to 1.6 mm in the final carrier design. During the tests the heat generated by the MMICs was simulated by a power resistor. It turned out that the suggested concept is very efficient to remove the heat, even when using low water flow rates. The thermal resistance of the cold plate vs. water flow rate is plotted in Figure 7-39. For water flow rates greater than 100 ml/min the thermal resistance is lower than 1.2 K/W.
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Figure 7-39: Cooling Frontend Tx.
Additional simulations were done to investigate the effect of spreading resistance since the MMICs act as a distributed heat source. Therefore, an additional thermal resistance must be taken into account. In a first approach steady state simulations were carried out with ANSYS to determine the influence of the height of the carrier (heat spreader). The effect is rather low for a carrier height of greater than 2.0 mm. Further on, the spreading resistance for the cold plate has been calculated. The thermal resistance, which must be added to the measured resistance of the cold plate, is lower than 0.4 K/W. The heat generated in the receiver frontend totals to about 3 W, giving a heat flux of 0.33 W/cm. Although this is considerably lower than for the transmitter, it could not be removed using a simple passive cooling system (natural air cooling). As a solution to this problem a forced air cooling concept was chosen that foresees the cavities above the MMIC chips to be ventilated by cool air. Since the metal cover over the frontend circuitry is in good thermal contact with the carrier plate, an efficient heat transfer is guaranteed. For proving the concept prior to integration into the module demonstrator, a simple but realistic test structure has been built. It consists of a complete frontend package (carrier plate with RF substrate and cover). Only the MMIC are substituted by surfacemounted chip resistors of roughly the same size, which act as heat sources. Figure 7-40 shows a photograph of the carrier plate populated with the chip resistors. For the test the chip resistors are connected to a voltage source adjusted so as to obtain a heat dissipation comparable to the heat power generated by the MMICs. Figure 7-41 shows the excess temperature with respect to ambient vs. the supply voltage of the fan used for producing the forced air flow. As a first approximation the flow rate can be assumed proportional to the supply voltage.
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Figure 7-40: Frontend tile with chip resistors for thermal test.
40
Excess Temperature [K]
35 30 25 20 15 10
10
12
Fan Supply Voltage [V]

Figure 7-41: Thermal test measurement results: excess temperature w.r.t. ambient vs. fan supply voltage.
7.3.2
IF Interface
As was already noted above, due to the limited integration density achievable with the standard packaged semiconductor devices used in the IF part electronics, the IF printed-circuit boards (PCB) had to be arranged perpendicularly to the frontend tile (brick architecture). At the interface between these two building blocks of the module a translating structure had to be used to provide signal interconnection, distribution, and routing. This adaptor structure consists of high-density connectors to the frontend (fuzz-buttons), a multilayer PCB (manifold) and high-density connectors to the IF part (PCB connectors).
7.3.2.1
Fuzz-button interconnect
Fuzz-buttons are made of randomly wound thin wire (typically 25 m gold-plated copper-beryllium wire) formed into a cylindrical shape, shown in Figure 7-42. These can be inserted into holes in a
06.03.2004 / L. C. Stange, H. Pawlak, A. Molke, A. F. Jacob, IHF, TU Braunschweig Page 72
dielectric spacer socket and compressed between two PCBs to provide electrical connection between them. Due to their small size (250 .. 500 m diameter, variable height) fuzz-button connectors can be used for medium to high-density interconnect applications. Furthermore, they are reliable and solderless, consequently allowing simple disassembly. When used in suitable configurations fuzz-button transitions are also suitable for broadband signal transmission up to microwave frequencies.
Figure 7-42: Fuzz-buttons with PTFE spacer socket.
In order to test their usefulness in this frequency range extensive tests have been conducted. The transitions designed and tested consist of 50 3-wire and 2-wire lines of fuzz-buttons inserted into a PTFE spacer. The conductor pads on the connecting PCB substrates are arranged in a coplanar configuration, which is transformed into a microstrip line structure using vias to ground. Figure 7-43 shows a comparison between measured and simulated characteristic of an exemplary 3-wire transition. It can be seen that simulation and measurement fundamentally agree. This broadband interconnect is usable up to frequencies of 20 GHz with insertion losses well below 2 dB. Since the highest frequency in the intended application framework is 15 GHz (half the LO frequency of Tx upconverter) the fuzz-buttons interconnect has been selected for the frontend connections. Since 2wire fuzz-button configurations show a somewhat lower performance, these are only employed for the lower-frequency IF interconnects in the transmitter module.
0 -5
S11, S21 [dB]
-10 -15 -20 -25 -30
10
15
20
25
Frequency [GHz]
Figure 7-43: Comparison of simulation (dashed) and measurement (solid) for microstrip to3-wire line interconnect.
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In the receiver module four octagonal fuzz-button spacer sockets (see Figure 7-42) are press-fit into the metal cover over the frontend. This is illustrated in Figure 7-44 by a photograph of the covered Rx frontend with the spacer sockets removed from the cover. The fuzz-button contact structures on the frontend substrates can clearly be seen through the four octagonal cutouts in the cover. For the transmitter module a single fuzz-button spacer socket extends over the whole area of the frontend substrate with cutaways for the MMIC chipsets, as shown if Figure 7-45. This was necessary because of the little space available on the transmitter frontend substrate.
Figure 7-44: Rx frontend with cover.
Figure 7-45: Tx module fuzz-button spacer socket .
The manifold boards are multilayer PCBs with 6 layers made of Rogers RO 4003 microwave laminate. Figure 7-46 shows a photograph of the populated receiver manifold together with an illustration of the different transmission line layers, not showing the intermediate groundplanes to aid clarity. Also not shown is the outer conductor layer of the manifold toward the frontend that consists of the fuzz-button pad patterns matching those on the frontend substrate. The top layer in the illustration is the outer conductor layer of the manifold directed towards the IF part. As can be seen in Figure 7-46 (photograph) the PCB connectors to the IF part are soldered onto this layer. The middle layer in the illustration provides routing of all DC and IF lines between the fuzzbutton contacts and the PCB connectors. The last layer is responsible for distributing the LO signal from the miniature coaxial connector in the center of the manifold board (see photograph) to the
four fuzz-button feed points. The construction of the transmitter manifold is very similar to that of the receiver and, hence, not addressed in further detail here.
Figure 7-46: Left: Rx manifold multiplayer PCB, Right: illustration of transmission line layers.
The PCB interconnect to the IF boards that carries the IF signals and DC supply lines for each element individually has also been investigated with respect to its RF characteristics. Figure 7-47 shows a test structure for this right-angle interconnect with the measured characteristic. The interconnect under test actually consists of two RF transitions over the PCB connector: from the microstrip line on base PCB onto the upright board and back again. It appears that this interconnect is usable for frequencies up to 1.8 GHz with reflection losses below 10 dB and insertion losses of less than 0.5 dB per transition. At the selected IF frequency of 880 MHz the insertion loss per transition amounts to only 0.1 dB. Since 4 IF signals are to be fed over the connector (4 IF channels per IF board) its crosstalk and isolation characteristics have also been investigated. With 2 rows of grounded pins between adjacent transitions the isolation is typically better than 60 dB.
Figure 7-47: Right-angle PCB interconnect, left: test structure, right: measured characteristics .
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7.3.3
IF part
Figure 7-48: Module completely assembled with IF boards.
The module IF electronic circuitry for the 16 elements are distributed over 4 IF PCBs each carrying 4 circuits, 2 on each side of the board. The interconnection to the frontend is established by the right-angle PCB connectors, as noted above. The PCBs are FR-4 multilayer boards with a special 5layer stack-up. The inner layer can be used as a common supply plane. In the module the 4 boards are arrayed side-by-side, as shown in Figure 7-48 for the receiver module. In the center between the two inner cards the first LO signal is fed to the manifold board using a semi-rigid coaxial cable. At the interface of the IF part to the digital signal processor another set of PCB connectors is used for the mechanical and electrical interconnection. This includes the feed of the second LO signals, which are supplied to each IF board individually. The module can be fitted with a protective metal housing for the IF part that may contain additional partition walls for separating the PCBs in order to reduce crosstalk between the element-circuits.
7.4
7.4.1
Test and Measurement

Receiver-frontend
After fabrication and assembly of the complete module frontend it was characterized separately (without the IF part). For this purpose a special test adapter has been designed which is shown in Figure 7-49. It is a receptacle for the manifold PCB connectors and provides access to the 16 element IF signals via coaxial connectors and allows each element-circuit to be powered individually.
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Figure 7-49: Left: test adapter with frontend attached, right: test adapter backside.
For the test a continuous-wave (CW) signal was radiated from a transmitting antenna, a rectangular horn, and directed at the frontend. The conversion gain was recorded using a spectrum analyzer as IF receiver for the frontend output signals at a constant intermediate frequency of 900 MHz over the signal frequency in the receive band from 19.6 GHz to 20.3 GHz. The measurement results are shown in Figure 7-50 for all elements.
25 20 Conversion Gain [dB] 15 10 5 0
19.6
19.8 20 Frequency [GHz]
20.2
20.4
Figure 7-50: Frontend conversion gain, measurement results.
In this measurement the conversion gain is referred to the air interface, i.e. it also includes the gain of the respective antenna element, because the frontend circuits are directly connected to the antennas. All 16 elements present a signal at the IF outputs. It is apparent, however, that two elements depart significantly from the rest, one to lower and one to higher gain. When excluding these two elements, the average conversion gain is, as predicted by simulations, approx. 15 dB in the lower part of the frequency band with a slight decrease to higher frequencies. This is partly due to the chipset characteristics, but seems also be caused by a shift in the narrow-band transmission maximum of some waveguide interconnects. A consequence is that the variation of element conversion gain also increases from approx. 6 dB at the lower end of the band to considerable 10 dB at higher frequencies. For comparison the (same) chipsets have been characterized in direct onchip measurements after assembly, but before final interconnection to the frontend substrate. These
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measurements (c.f. section 7.2, RF-Electronics) showed variations of 3 dB. Taking into account this result it appears that the waveguide interconnects are the main source of variation. However, the major uncertainty in the fabrication does not stem from the demanding mechanical tolerances, that could be met very precisely, but rather from the conductive bonding of the substrates to the carrier plate. This could not be carried out with sufficient reproducibility and uniformity in the manual fabrication process employed. A significant improvement is expected when using stamped conductive bonding film and a professional multiplayer press.
7.4.2
Transmitter-frontend
Figure 7-51: Complete transmitter module.
The fabrication of the transmitter frontend was a technological challenge since the packaging density is increased due to higher frequencies in comparison with the receiver frontend. The tests were carried out in two steps. In the first step all sixteen RF channels were characterized by coplanar RF probes. Here, a mean output power of + 6 dBm at midband frequency (29.75 GHz) was measured. The deviations between the channels were 3 dB. These deviations can be ascribed to tolerances of the MMIC devices and the assembly technology. In the second step the complete frontend module including waveguide interconnect, fuzz-button vertical interconnects and signal distribution manifold was tested. An 880 MHz cw signal was used as IF signal for the tests. A special test adapter was designed, which feeds the test signal and the necessary DC voltages to the frontend module. Under these drive conditions the output of the RF frontend is simply a cw signal in the transmit band. The frequency can be adjusted by the first LO. A rectangular horn was used as receiving antenna, which in turn was connected to a spectrum analyzer. All channels were characterized independently from each other. The measurements showed that most channels had a slightly reduced receive power level, which otherwise confirmed the specification, but some channels showed a strongly decreased power level. The reasons for the reduced power level could be traced to problems concerning the assembly technology, which did not yield reliable and longterm stable bonds during the assembly of the first demonstrator. Therefore, the insertion loss of certain bonds was very high, which is the explanation for the reduced power level. The deviations
between the good channels was 11 dB. This is the total deviation, including, the deviations of the MMIC devices. The bonds cannot be responsible for this rather high deviation. Since the MMIC devices were successfully tested before, the only possible source for the deviation is the waveguide interconnect. The most likely explanation is as described in the receiver section before the manual fabrication of the waveguide interconnect, especially the gluing of the substrates onto the carrier plate in the region of the waveguide interconnect. During the later tests of the first demonstrator, a leakage of the liquid cooling system occurred. MMIC devices are sensitive to water, so the performance of most channels were reduced and some channels broke down completely. To circumvent the problem air cooling (forced convection) has been used for the first demonstrator. The air cooling was sufficient in this case since the power consumption of the module was reduced due to the failures. With these measures the good channels of the complete transmitter module (including IF electronics) were successfully tested.
Figure 7-52: Channel measurements of second demonstrator.
The following analysis of the technological problems showed ways for further optimization. The problems concerning assembly technology (bonds) and cooling could be eliminated by simple means. The improvements mentioned above led to the assembly of a second demonstrator. Figure 7-52 shows the power level at the output of the horn antenna of the sixteen channels of the second demonstrator. No channel failures occurred. The deviations in the lower transmit band are ca. 11 dB, in the higher transmit band ca. 8 dB. Thus, the performance of the second demonstrator is considerably better than that of the first demonstrator.
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8
8.1

Objective
The objective of this work package is the test and measurement of the complete Rx- and Txterminal system. For a successful measurement of the complete terminals, it is necessary to thoroughly elaborate the measurement set-up, and to develop adjusted measurement software and user interfaces.
8.2
Rx-Terminal
Figure 8-1: Rx-terminal under test: anechoic chamber of IMST.
Figure 8-1 shows the Rx-terminal under test on the positioner of the anechoic chamber of IMST. The measurement set-up differs from the standard measurement set-up used for the measurement of passive antennas (Figure 8-2). A fixed horn antenna is used as transmitting antenna, whereas the Rx-terminal is mounted on the positioner. The received signals of each of the elements are converted by the terminal down to baseband level. The output of the terminals consequently consists of the digitized IQ signals of each single element. A PC is used to continuously register and store the measured data.
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I/Q signal of each channel Baseband Unit
horn antenna
20 GHz, linear 20 GHz, CW
Rx terminal
RF Unit IF Unit
PC 2
data storage
NWA
Tx signal drive
positioner
and controller sync. TTL sync.
beam forming beam steering
PC 1
Figure 8-2: Rx- terminal measurement setup.
Figure 8-3 shows the graphical user interface of the measurement software visualizing the IQ signals of the uncalibrated systems. By this means, the signal of each element can be observed during the measurement, thus making it easy to evaluate the signal quality (amplitude, noise...). In addition, possible errors (e.g. signal overdrive, channel failure) can be easily recognized and eliminated (see Figure 8-3).
signal overdrive!
noisy channel! channel failure! low magnitude!
Figure 8-3: Using the measurement software to evaluate of the signal quality of each channel.
Prior to the actual measurements, the system has to be calibrated. To achieve this, the signals of all channels have to be adjusted to a reference channel. In Figure 8-4, such a calibration process is exemplarily depicted. The left side shows the uncalibrated IQ signals, whereas the right side shows the signals of the calibrated system. In this example, channel 7 has been chosen as reference. The blue arrows represent the complex calibration coefficients used.
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Figure 8-4: Received Signals of each channel prior to (right) and after (left)the calibration process.
The signals of the calibrated systems can now be summed up to generate the radiation pattern of the antenna. Since the signals of all channels are known, all kinds of beam forming algorithms can be applied. Figure 8-5 exemplarily shows the radiation pattern of the receiving antenna for some selected steering directions of the beam. The antenna beam can also be steered in any other direction, if the appropriate phase shifts are applied. In addition, the side lobe level can be controlled by applying amplitude tapers. (e.g. Chebychev, Taylor, Raised Cosine).
20 15
Magnitude [dB]
10 5 0 -5 -10 -90 -60 -30 0

angle [deg]
30 15 0 -15 -30
30
60
90
Figure 8-5: Generation of different radiation patterns by applying appropriate phase shifts.
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8.3
Tx-Terminal
Figure 8-6: Tx-terminal under test: anechoic chamber of IMST.
Figure 8-6 shows the Tx-terminal under test on the positioner of the anechoic chamber of IMST. Again, the measurement setup differs from a common antenna measurement setup (see Figure 8-7). The fixed horn antenna is now used as receiving antenna. The Tx-terminal is mounted on the positioner. The PC is used to address the terminal and thus the IQ modulators of each single channel with a fixed character. This means that the transmitted signal complies to an unmodulated (CW) signal, which can be received and evaluated with the NWA.
horn antenna
30 GHz, linear
30 GHz, CW
Tx terminal
RF Unit IF Unit Baseband Unit
Rx
NWA
NWA Control Rx Signal
PC 2 positioner
and controller single I/Q Character (CW) beam fixed during FF measurement
PC 1
measurement data storage sync.
Figure 8-7: Tx- terminal measurement setup.
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180 135 90 45 phase 0 -45 -90 -135 -180 0 100 200 300 400 timesteps 500 600 700 800
Figure 8-8: Phase of the Tx-channels prior to phase calibration.
To calibrate the system, firstly, all channels are successively switched on, and the phase and amplitude values of the transmitted signals are logged. Figure 8-8 shows this process for the signal phase. In the intermediate time slots, the signal of the reference channel is transmitted. That way, the stability of the measurement can be controlled over the time. The signal differences relative to the reference channel are used as calibration data input. In a second step, the channels are again successively switched on. As depicted in Figure 8-9, the signal phases are now on the same level. The only exceptions are the two channels, which showed technical failures, and thus could not be calibrated.
180 135 90 45 phase 0 -45 -90 -135 -180 0 100 200 300 400 timesteps 500 600 700 800
Figure 8-9: Phase of the Tx-channels after phase calibration.
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0 -5
magnitude [dB]
-10 -15 -20 -25 -30 -90 -60 -30 0

angle [dB]
30 20 10 0 -10 -20 -30
30
60
90
Figure 8-10: Radiation patterns of the antenna at selected steering directions.
After the calibration process, the far field patterns of the array have been measured at different steering angles. Figure 8-10 shows the respective antenna patterns at selected steering directions. The measurement results validate that each element is digitally addressable in amplitude and phase, and also calibrated successfully.
8.4
Results
Within this work package, the test and measurement of the complete Rx- and Tx- Terminal has been carried out successfully. The measurements demonstrate not only the functionality of the antenna itself, but also the functionality of the complete transmitter and receiver chain. The technology demonstrator validates that active antennas on the basis of digital beam forming in Ka-band are feasible today.
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Conclusion
Conclusion
In order to prove the functionality of a terminal antenna employing digital beamforming in the Kaband the link-budget was revised in a first step. The result of the earlier concept study [1] suggested a modular approach to build up the complete terminal antenna. Small antenna building blocks are used to increase the yield and ease the exchange of damaged channels. Demonstrators of these antenna building blocks were realized during this project for both the receive- and transmit function. A miniaturized antenna feed was designed, which incorporates a circular waveguide with ceramic inset. The antenna feed is the same for receiver and transmitter. After the definition of the antenna feed extensive investigations of the properties of large arrays were carried out. Algorithms for beamforming and beamsteering were developed and tested. The necessary hardware for data processing was development and tested. Further on, a graphical user interface for the antenna control software was created. The RF and IF electronics for transmitter and receiver was developed, realized and tested. Here, miniaturization of each circuit component was a key issue. As expected the focus of the project was on module architecture and integration, since many function blocks had to be realized with little space available. In particular the RF frontends should be pointed out, which incorporate the waveguide interconnects, MMIC devices, bond wires and a host of passive structures and supply lines. Efficient cooling systems have been developed for both receiver and transmitter. Prior to assembly of the complete modules including the digital part, the analog electronics have been tested separately. The measurements proved the functionality of the chosen concept. The deviations in the channels are no hindrance for operation since they can be nulled by use of the digital attenuators (Rx) and gain control amplifiers (Tx) on the IF boards. The fully assembled modules were measured in an anechoic chamber. Here, the modules had to be calibrated, first. Antenna diagrams of each antenna element and the complete array were recorded. Many additional measurements were carried out (e.g. array circularity). The results of these measurements show that the chosen integration technology is able to handle the high packing density at Ka-band frequencies. Further on, critical technological issues could be identified, which are described in detail in section 7.4. All relevant project goals could be achieved. In a follow-up project, which can take immediate use of the project results, the integration technology should be revised again to reduce or eliminate the measured deviations in the channels. After that a larger terminal antenna built up of several improved modules can be used for measurements in more realistic scenarios employing moving targets (e.g. cars and aircraft). For further information please refer to the project description of the follow-up project SANTANA 2. The results of the project SANTANA are useful in the area of satellite communications and other areas, in which adaptive antenna systems employing digital beamforming can be used. Because these areas are important markets of the future it is profitable to invest in further technology development and evaluation. The partnership of research institutions and companies has been proven very effective since the technological results can be used in the medium term for the development of new products or as a basis for new research projects.
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References
References
[1] C. Hunscher, R. Mayer, A.F. Jacob, L.C. Stange, A. Dreher, L. Richard und N. Niklasch, Schlussbericht zum BMBF-Vorhaben Aktive Antenne fr die Multimediakommunikation ber Satellit, 2001 (FKZ 50 Y 0004). R. Baggen, R. Gieron, S. Holzwarth und O. Kersten, Schlussbericht zum BMBFVorhaben Frontend- und Antennentechnologie fr Ka-Band-Breitband Multimedia Terminals, 2001 (FKZ 50 YB 0005). P.R. Haddad and D.M. Pozar, Analysis of two aperture-coupled cavitiy-backed antennas, IEEE Trans Antennas Propagat., vol 45, pp. 1717-1726, December 1997. M. Thiel, Die Analyse von zylinderkonformen und quasi-zylinderkonformen Antennen in Streifenleitungstechnik, Oberpfaffenhofen: Forschungsbericht DLR-FB 2002-25 (Dissertation, TU Mnchen), 2002. P.S. Hall and M.S. Smith, Sequentially rotated arrays with reduced sidelobe levels, Electronic Letters, Vol. 28, No. 18, pp. 1761-1763, 27th August 1992. IMST GmbH, "User and Reference Manual for the 3D EM Time Domain Simulator Empire", http://www.empire.de/empire.pdf, November 2003. I.S. Reed, J.D. Mallet and L.E. Brennan, Rapid convergence rate in adaptive arrays, IEEE Trans. on AES, Vol. 10, pp. 853-863, November 1974. F.-I Tseng and D.K. Cheng, Invariant scannable planar arrays with an invariant sidelobe level, Proc. of the IEEE, Vol. 56, no. 11, pp. 1771-1778, November 1968. M. Clergeaud and M. Thiel, Algorithms for beamforming and beamsteering of adaptive antennas for satellite communications and navigation, Oberpfaffenhofen: Interner Bericht DLR-IB 554-03/08, 2003. A. Loke and F. Ali, Direct Conversion Radio for Digital Mobile Phones Design Issues, Status, and Trends, IEEE Transactions On Microwave Theory and Techniques, vol. 50, no. 11, Nov. 2002. J. Litva and T.K. Lo, Digital Beamforming in Wireless Communications, Artech House, 1996. Datasheet HMC 262, Hittite Microwave Corp., MA, USA. Datasheet HMC 337, Hittite Microwave Corp., MA, USA. J. Tsui, Digital Techniques for Wideband Receivers, 2nd Ed., Artech House, 2001. H. Howe, Stripline Circuit Design, Artech House, Massachusetts, 1974. S. Sanzgiri, D. Bostrom, W. Pottenger, and R.Q. Lee, A Hybrid Tile Approach for Ka Band Subarray Modules, IEEE Transactions on Antennas and Propagation, vol. 43, no. 9, Sept. 1995.
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G. P. Gauthier, L. P. Katehi, G. M. Rebeiz, W-Band finite ground coplanar waveguide (FGGPW) to microstrip line transition, IEEE-MTT-S Int. Microwave Symp. Dig., 1998, pp. 107109. Application Note: MIC Assembly Techniques, Hittite Microwave Corp., MA, USA. Schtze, Ilgen, Final Report BMBF-Project Integriertes Mikrokhlsystem fr elektronische Baugruppen, 1999 (FKZ 16 SV 299/2, Verbund-Nr. 01001590).
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Smart Antenna Terminal - SANTANA Final Report

Final Report SANTANA

2.3.1 2.3.2 2.3.3 2.3.4 2.3.5 2.4 3

ANTENNA ELEMENT AND ARRAY, TRANSMIT FUNCTION 4.1 Antenna element

Final Report SANTANA

BEAMSTEERING AND DATA PROCESSING 6.1 6.2 Objective Beamsteering algorithms

Final Report SANTANA

6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 6.3

Data Processing Objective Concept Implementation

Final Report SANTANA

Integration Ka-band Frontend IF Interface IF part

Test and Measurement Receiver-frontend Transmitter-frontend

Final Report SANTANA

Final Report SANTANA

Choice of the Reference Scenario

06.03.2004 / Christian Hunscher, EADS Astrium GmbH

Final Report SANTANA

Table 2-1: Link-Budget Uplink.

06.03.2004 / Christian Hunscher, EADS Astrium GmbH

Final Report SANTANA

Table 2-2: Link-Budget Downlink.

Compilation of the Specifications

06.03.2004 / Christian Hunscher, EADS Astrium GmbH

Final Report SANTANA

Key Parameters of the transmit function

Key Parameters of the receive function

06.03.2004 / Christian Hunscher, EADS Astrium GmbH

Final Report SANTANA

Resume and Perspective

06.03.2004 / Christian Hunscher, EADS Astrium GmbH

Final Report SANTANA

Antenna element and array, receive function

Antenna element and array, receive function

06.03.2004 / Michael Thiel, Achim Dreher, DLR

Final Report SANTANA

Antenna element and array, receive function

0 = 1.6 mm, eps = 11

06.03.2004 / Michael Thiel, Achim Dreher, DLR

Final Report SANTANA

Antenna element and array, receive function

Figure 3-3: Simulated reflection coefficient.

06.03.2004 / Michael Thiel, Achim Dreher, DLR

Final Report SANTANA

Antenna element and array, receive function

Figure 3-5: Wire model of the fabricated single element.

Figure 3-6: Simulation and measurement of single element with setup 2.

06.03.2004 / Michael Thiel, Achim Dreher, DLR

Final Report SANTANA

Antenna element and array, receive function

Figure 3-8: Radiation pattern in a) E-plane and in b) H-plane.

06.03.2004 / Michael Thiel, Achim Dreher, DLR

Final Report SANTANA

Antenna element and array, receive function

06.03.2004 / Michael Thiel, Achim Dreher, DLR

Final Report SANTANA

Antenna element and array, receive function

Figure 3-10: Spiral arrangement with a) 8 elements, b) 9 elements and c) 16 elements.

Figure 3-11: Shifted subgroups in a sequential array arrangement.

0 90 180 270 180 0 0 0 90 180 270

180 270 270 90 90 0

06.03.2004 / Michael Thiel, Achim Dreher, DLR

Final Report SANTANA