Range 00 0F 10 1F 20 2F 30 3F 40 4F 50 5F 60 6F 70 7F 80 8F 90 9F A0 AF B0 BF C0 CF D0 DF E0 FF

Category/Subsystem Debug codes: Can be used by any PEIM/driver for debug Host Processors Memory/Chipset Recovery Reserved for future use I/O Busses: PCI, USB, ISA, ATA, etc. Not currently used Output Devices: All output consoles Reserved for future use (new output console codes) Input devices: Keyboard/Mouse Reserved for future use (new input console codes) Boot Devices: Includes fixed media and removable media. Reserved for future use Boot device selection E0 - EE: Miscellaneous codes F0 FF: FF processor exception

Port 80h POST codes

POST Code 00 - 0F 10 - 1F 10 11 12 13 14 15 16 17 19 1F

Description of POST Operation Debug Codes: can be used by any PEIM/driver for debug Host Processor Power-on initialization of the host processor (Boot Strap Processor) Host processor Cache initialization (including APs) Starting Application processor initialization SMM initialization LAN initialization Exit early platform init driver SMBUS driver initialization Entry to SMBUS execute read/write Entry to CK505 programming Unrecoverable CPU error

20 - 2F 21 22 23 24 25 26 27 28 2F 30 - 3F 30 31 34 35 3F 50 - 5F 50 51 52 53 57 58 59 5A 5B 5C 5D 5F

Memory / Chipset Initializing a chipset component Reading SPD from memory DIMMs Detecting presence of memory DIMMs Programming timing parameters in the memory controller and the DIMMs Configuring memory Optimizing memory settings Initializing memory, such as ECC init Testing memory No memory detected or no useful memory detected Recovery Crisis Recovery has initiated per User request Crisis Recovery has initiated by software (corrupt flash) Loading recovery capsule Handing off control to the recovery capsule Unable to recover I/O Busses (PCI, USB, ISA, ATA, etc.) Enumerating PCI busses Allocating resources to PCI bus Hot Plug PCI controller initialization Reserved for PCI Bus Resetting USB bus Reserved for USB Resetting PATA/SATA bus and all devices Reserved for ATA Resetting SMBUS Reserved for SMBUS Unrecoverable I/O bus error There are currently no valid POST codes in the 60 - 6F range.

60 - 6F

If you see a POST code in this range, it should be read as B0 - BF. (On a 7-segment LED display, the 'b' looks like a 6). Example:

70 - 7F 70 71 72 78 79 7A 7F 90 - 9F 90 91 92 93 94 95 98 99 9A 9B 9F B0 - BF B0 B1 B2 B3 B8 B9 BA BC

Output Devices Resetting the VGA controller Disabling the VGA controller Enabling the VGA controller Resetting the console controller Disabling the console controller Enabling the console controller Unrecoverable output device error Input Devices Resetting keyboard Disabling keyboard Detecting presence of keyboard Enabling the keyboard Clearing keyboard input buffer Instructing keyboard controller to run Self Test (PS2 only) Resetting mouse Disabling mouse Detecting presence of mouse Enabling mouse Unrecoverable input device (keyboard or mouse) error Boot Devices Resetting fixed media Disabling fixed media Detecting presence of a fixed media (IDE hard drive detection etc.) Enabling/configuring a fixed media Resetting removable media Disabling removable media Detecting presence of a removable media (IDE, CD-ROM detection, etc.) Enabling/configuring a removable media

BF D0 - DF Dy E0 - FF E0 E2 E1, E3 E4 E5 E6 E7 E8 E9 EB EF F4 F5 F8 F9 FA FF

Unrecoverable boot device error Boot Device Selection Trying boot selection y (y=0 to 15) Miscellaneous Codes Started dispatching PEIMs (emitted on first report of EFI_SW_PC_INIT_BEGIN EFI_SW_PEI_PC_HANDOFF_TO_NEXT) Permanent memory found Reserved for PEI/PEIMs Entered DXE phase Started dispatching drivers Started connecting drivers Waiting for user input Checking password Entering BIOS setup Calling Legacy Option ROMs Boot/S3 resume failure Entering Sleep state Exiting Sleep state EFI boot service ExitBootServices ( ) has been called EFI runtime service SetVirtualAddressMap ( ) has been called EFI runtime service ResetSystem ( ) has been called Processor exception

Typical Port 80h POST sequence Port 80h code values typically increase during the boot process. The early codes are for subsystems closer to the processor and the later codes are for peripherals. Generally, the order of initialization is Processor -> Memory -> Busses -> Output/Input Devices -> Boot Devices. The sequence of POST is system-specific.

POST Code 21 22 23 25 28 34

Description Initializing a chipset component Reading SPD from memory DIMMs Detecting presence of memory DIMMs Configuring memory Testing memory Loading recovery capsule

E4 12 13 50 51 92 90 94 95 EB 58 5A 92 90 94 5A 28 90 94 E7 01 00

Entered DXE phase Starting Application processor initialization SMM initialization Enumerating PCI busses Allocating resourced to PCI bus Detecting the presence of the keyboard Resetting keyboard Clearing keyboard input buffer Keyboard Self Test Calling Video BIOS Resetting USB bus Resetting PATA/SATA bus and all devices Detecting the presence of the keyboard Resetting keyboard Clearing keyboard input buffer Resetting PATA/SATA bus and all devices Testing memory Resetting keyboard Clearing keyboard input buffer Waiting for user input INT 19 Ready to boot