Syllabus for ECEN 3250 : Circuits/Electronics 3

The following are a few items of information and statements of policy regarding this course. Please read this carefully. It will be assumed henceforth that you are in possession of this information and are prepared to abide by it. ECEN 3250: Circuits/Electronics 3 will be conducted in a manner as has been done during the past few years: it consists of lecture classes, recitations, laboratory periods and office hours. The topics of all three teaching mechanisms will be presented in an integrated manner; this teaching environment will maximize the students learning experience. !e will rely on two textboo"s and laboratory notes handed out during class or laboratory periods. Textboo"s: #$ Microelectronic Circuits, Fifth Edition, %edra&%mith, '((), *xford +niversity Press. '$ SPICE, Second Edition, ,oberts&%edra, #--., *xford +niversity Press. Prere/uisite for this class is the mastery of *hm s law, 0irchhoff s voltage and current laws, operational amplifiers, 1oolean algebra 21oolean identities, truth table, 3e 4organ s 5aws$, and 6ourier analysis. 7omewor" will be assigned a wee" at a time. 7omewor" assignments for every wee" are due !ednesday at the beginning of the class period, and will be graded by a T8. In addition to regular class attendance, it is very important that you do the homewor" and attend recitation sessions in which the solution approaches to upcoming homewor" problems will be discussed. The experience you gain in doing the homewor" will improve your scores on the /uizzes, tests and the final examination. It cannot be stressed too strongly that facility and sophistication in use of the theory is ac/uired only by regularly doing the homewor" in a course involving this type of sub9ect matter. ,ecitation The main purpose of recitation is to answer students /uestions of general interest, and to reinforce and augment topics learned during the lecture. :uizzes, tests and final examination: There will be ) /uizzes 2#( minutes each$, ; tests 2<( minutes each$ and the final examination 2' and a half hours$. 8ll /uizzes, tests and final examination are =closed>boo"?. 7owever, students can prepare for the final exam one page of handwritten material. The solutions of the homewor" assignments will be made available. 8fter each test the solutions of the test problems will be given to students. The weight of the homewor" assignments is <@, the ) /uizzes are worth #(@, the test and midterm are #<@, final exam is '(@, and the laboratory performance is worth ;(@. 2Total is A(@$

8 final bit of advice: 1y its very nature this type of course is very se/uential; i.e., what we deal with in class on a given day rests heavily upon an understanding and mastery of what went on the day before and the wee" before that. The moral is clear: "eep up with the homewor" and review the sub9ect matter already discussed in class. Bood luc", and I m loo"ing forward to wor"ing with you.

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Important Information for Students

#$ Disability If you /ualify for accommodations because of a disability, please submit a letter to me from 3isability %ervices in a timely manner so that your needs may be addressed. 3isability %ervices determines accommodations based on documented disabilities. Contact: ;(;>)-'>AD.#, !illard ;'', or www.Colorado.E3+&disabilityservices '$ Reli ious !bser"ances Campus policy regarding reli ious obser"ances re/uires that faculty ma"e every effort to reasonably and fairly deal with all students who, because of religious obligations, have conflicts with scheduled exams, assignments or re/uired attendance. In this class, please contact instructor two wee"s in advance so that your religious observances can be accommodated. %ee policy details at http:&&www.colorado.edu&policies&facFrelig.html ;$ #ppropriate $earnin En"ironment %tudents and faculty each have responsibility for maintaining an appropriate learnin en"ironment% %tudents who fail to adhere to behavioral standards may be sub9ect to discipline. 6aculty have the professional responsibility to treat students with understanding, dignity and respect, to guide classroom discussion and to set reasonable limits on the manner in which students express opinions. %ee policies at http:&&www.colorado.edu&policies&classbehavior.html and at http:&&www.colorado.edu&studentaffairs&9udicialaffairs&code.htmlGstudentFcode )$ #cademic Inte rity &olicy 8ll students of the +niversity of Colorado at 1oulder are responsible for "nowing and adhering to the academic inte rity policy of this institution. Hiolations of this policy may include: cheating, plagiarism, aid of academic dishonesty, fabrication, lying, bribery, and threatening behavior. 8ll incidents of academic misconduct shall be reported to the 7onor Code Council 2honorIcolorado.edu; ;(;>.'<>''.;$. %tudents who are found to be in violation of the academic integrity policy will be sub9ect to both academic sanctions from the faculty member and non>academic sanctions 2including but not limited to university probation, suspension, or expulsion$. 8dditional information on the 7onor Code can be found at http:&&www.colorado.edu&policies&honor.html and at http:&&www.colorado.edu&academics&honorcode&

ECEN 3250/Fall 2005 Circuits/Electronics 3: #C'I(E DE(ICE CIRC)I'S 5ecture: 4!6 #:(( J#:<( pm, ,oom ECC, #(< 5ab: T,, in ,oom ECEE 'A# %ec #: ':((>;:<( pm; %ec ': ):((><:<( pm; %ec ;: .:((>A:<( pm > 8ssignments J FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF Kote: the recitation will mainly be used to answer /uestions of general concern and for wor"ing example homewor" problems. *ee+ , - 28ugust '' J 8ugust 'D$ 'opics: Introduction to course, diodes Concepts: Course environment, expectations, ideal diode, terminal characteristics of diodes $aboratory: 5ecture: Introduction to P%pice&%pice #ssessment: 7omewor" G# *ee+ , 2 28ugust '- J %eptember '$ 'opic: 3iodes Concepts: 8nalysis of diode circuits. constant voltage>drop model, battery L resistance model, small>signal model. zener diodes $aboratory: 5ab G #: 1asic diode circuits #ssessment: 7omewor" G', /ui0 , *ee+ , 3 2%eptember D J %eptember -$ 25abor 3ay: %eptember <$ 'opic: 3iodes Concepts: ,ectifier circuits. pea" rectifiers and filter capacitors $aboratory: 5ab G ': ,ectifiers #ssessment: 7omewor" G; *ee+ ,1 2%eptember #' J %eptember #D$ 'opic: 3iodes Concepts: 5imiting and clamping circuits. physical operation of diodes, pn 9unction $aboratory: 5ab G ;: Power supplies #ssessment: 'est ,-; 7omewor" G)

*ee+ ,5 2%eptember #- J %eptember ';$ 'opic: 4*%6ETs Concepts: Physical operation of 4*%6ETs, characteristics of enhancement 4*%6ETs $aboratory: 5ab G ): Konlinear circuits with diodes and operational amplifiers #ssessment: 7omewor" G<

*ee+ ,2 2%eptember 'D J %eptember ;($ 'opic: 4*%6ET% Concepts: 4*%6ET Circuits at 3C, 4*%6ET small>signal amplifiers $aboratory: 5ab G <: 6ET characteristics #ssessment: /ui0 ,2, 7omewor" GD

*ee+ ,3 2*ctober ; J *ctober .$ 'opic: 4*%6ETs Concepts: 4*%6ET biasing, discrete 4*%6ET amplifier configurations $aboratory: 5ab G D: C3)((. %pecifications, 4*%6ET amplifier configurations #ssessment: 7omewor" G.

*ee+ ,4 2*ctober #( J *ctober #)$ 26all 1rea" #(&#;>#(&#)$ 'opic: 4*%6ETs Concepts: 4*%6ET constant current sources, 4*%6ET body 2substrate$ effect $aboratory: 5ab G .: 4*%6ET current sources #ssessment: 'est ,2; 7omewor" GA

*ee+ ,5 2*ctober #. J *ctober '#$ 'opic: 4*%6ETs Concepts: 3iscrete 4*%6ET amplifier configurations $aboratory: 5ab G .: 4*%6ET current sources 2continued$ #ssessment: 7omewor" G-

*ee+ ,-0 2*ctober ') J *ctober 'A$ 'opic: 4*%6ETs Concepts: 4*%6ET IC amplifier configurations, C4*% inverters $aboratory: 5ab G A: 8ctive>load, common>drain amplifier #ssessment: /ui0 , 3, 7omewor" G#( <

*ee+ ,-- 2*ctober ;# J Kovember )$ %pring 1rea", Ko Classes *ee+ ,-2 2Kovember . J Kovember ##$ 'opic: 4*%6ETs Concepts: C4*% inverter dynamics, C4*% fabrication process, $aboratory: 5ab G A: 8ctive>load, common>drain amplifier 2continued$ #ssessment: 7omewor" G ##

*ee+ ,-3 2Kovember #) J Kovember #A$ 'opic: 3igital 4*%6ET circuits Concepts: C4*% logic gates, pass transistor logic $aboratory: 5ab G -: C4*% logic gates #ssessment: 'est , 3; 7omewor" G#'

*ee+ ,-1 2Kovember '# J Kovember '<$ 2Than"sgiving ##&')>##&'<$ 'opic: 3igital 4*%6ET circuits Concepts: 3ynamic 5ogic, differential 4*%6ET amplifiers $aboratory: 5ab G -: C4*% logic gates 2continued$ #ssessment: 7omewor" G#;

*ee+ ,-5 2Kovember 'A J 3ecember '$ 'opic: 1MTs Concepts: Physical structure and modes of operation of 1MTs $aboratory: 5ab G #(: 1MTs as a switch; gating circuit for dimmer switch #ssessment: /ui0 ,1. 7omewor" G#)

*ee+ ,-2 23ecember < J 3ecember A$ 'opic: 1MTs Concepts: 3C analysis of 1MT transistor circuits, dc biasing of 1MT amplifiers, transistor as a small>signal amplifier, transistor as a switch $aboratory: 5ab G ##: Two>stage, discrete audio>fre/uency 1MT amplifier #ssessment: 7omewor" G#<

6inal E7#8: 6riday 3ecember -, '((< from .:;( a.m. to #(:(( a.m.