ECE380 Digital Logic

Optimized Implementation of Logic Functions: Multilevel Synthesis and Analysis

Electrical & Computer Engineering

Dr. D. J. Jackson Lecture 15-1

Multilevel NAND & NOR circuits

Two-level circuits consisting of AND and OR gates can easily be converted to networks that can be realized only NAND and NOR gates
A two-level AND-OR (SOP) circuit can be realized (directly) as a two-level NAND-NAND circuit A two-level OR-AND (POS) circuit can be realized (directly) as a two-level NOR-NOR circuit

The same approach can be used for multilevel networks

Electrical & Computer Engineering

Dr. D. J. Jackson Lecture 15-2

AND-OR to NAND-NAND example

Electrical & Computer Engineering

Dr. D. J. Jackson Lecture 15-3

OR-AND to NOR-NOR example

Electrical & Computer Engineering

Dr. D. J. Jackson Lecture 15-4

Multilevel example
x 1 x 2 x 3 x 4 x 5 x 6 f

x 7

Circuit with AND and OR gates

Electrical & Computer Engineering Dr. D. J. Jackson Lecture 15-5

Multilevel example (NAND)

x 1 x 2 x 3 x 4 x 5 x 6

x 7 Inversions needed to convert to NANDs Note the inversion bubbles added to the output of every AND gate and to the input of every OR gate. Also, the inversion bubbles are always placed in pairs.

Electrical & Computer Engineering

Dr. D. J. Jackson Lecture 15-6

Multilevel example (NAND)

x 1 x 2 x 3 x 4 x 5 x 6

x 7

Conversion to a NAND-gate circuit

Electrical & Computer Engineering Dr. D. J. Jackson Lecture 15-7

Multilevel example (NOR)

x 1 x 2 x 3 x 4 x 5 x 6

x 7

Inversions needed to convert to NORs Note the inversion bubbles added to the output of every OR gate and to the input of every AND gate. Also, the inversion bubbles are always placed in pairs.
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 15-8

Multilevel example (NOR)

x2 x1

x3 f x4 x5 x6

x7

Conversion to a NOR-gate circuit

Electrical & Computer Engineering Dr. D. J. Jackson Lecture 15-9

Multilevel conversion process

The basic topology (wiring) of a circuit does not change substantially when converting from AND and OR gates to either NAND or NOR gates It may be necessary to insert additional gates (to serve as NOT gates) that implement inversions not absorbed as a part of other gates in the circuit The resulting circuit may not be minimum (i.e. such as a minimum 2-level NAND-NAND or NOR-NOR network)
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 15-10

Multilevel conversion example

What is the NAND only equivalent of the following circuit?

Electrical & Computer Engineering

Dr. D. J. Jackson Lecture 15-11

Analysis of multilevel circuits

In the previous examples, we synthesized multilevel circuits How can we easily determine a function that a given multilevel circuit implements?
For two-level circuits we simply wrote out the SOP or POS form equation from the circuit This is easy to visualize for two-level circuits This is more difficult for multilevel circuits because it is difficult to write an expression for the circuit by inspection

We can write an expression for a function by analyzing it at intermediate points in the circuit
Write expressions for each of these subfunctions Combine the subfunctions together into a single function
Electrical & Computer Engineering Dr. D. J. Jackson Lecture 15-12

Multilevel circuit analysis

Label the output of every gate as a subfunction
X1 X1 X2 X1 X3 X4 X3
Electrical & Computer Engineering

P4 P1 P2 P3

P5
Dr. D. J. Jackson Lecture 15-13

Multilevel circuit analysis

Combine (and simplify if possible) these functions
P1=x1+x2 P2=x1x3 P3=P1P2x4=(x1+x2)x1x3x4=x1x3x4+x2x1x3x4 = x1x3x4 P4=(x1P3)=(x1x1x3x4)= (x1x3x4)= x1+x3+x4 P5=x3x4 f=P3+P4+P5= (x1x3x4)+(x1x3x4)+(x3x4)=1

Electrical & Computer Engineering

Dr. D. J. Jackson Lecture 15-14