Embedded based customized wireless message circular system for college, industries.

CHAPTER 1 INTRODUCTION
1.1 INTRODUCTION
In this world of knowledge everything around us is run by Computing Systems. The technical Brilliance and Developments in different fields has led to a drastic change in our lives especially in the communications field. Due to various changes in technologies many systems have come up with breathtaking developments. ne amongst them is the !mbedded Systems. It Its applications provide

is the evolution or further development of computing system.

tremendous opportunities for creative use of computer technology. "lmost every new system introduced in the market is an e#ample of !mbedded System. "n embedded system is a combination of computer circuitry and software that is built into a product for purposes such as control$ monitoring and communication without human intervention. !mbedded systems are at the core of every modern electronic product$ ranging from toys to medical e%uipment to aircraft control systems. In contrast to general&purpose computers$ embedded systems perform a narrow range of pre&defined tasks. Thus$ they usually do not have any of the typical computer peripheral devices such as a keyboard$ display monitor$ serial connections$ mass storage 'e.g.$ hard disk drives($ etc. or any kind of user interface software$ unless re%uired by the product in which they are used in. This can make it possible to greatly reduce the comple#ity$ si)e and cost and increase the robustness of embedded systems as compared with general purpose systems.

1.2 RF MODULE:
System is instantly updated&&lag time between the physical movement of the product and the pdate to the system is removed$ thus reducing errors and allowing for *real&time* ad+ustments. ,ith this level of data communication$ "ccuplus -. allows for cross docking of products that don/t stay in the warehouse for more than a few hours.

1.3 SYSTEMS
" system is something that maintains its e#istence and functions as a whole through the interaction of its parts. !.g. Body$ 1ankind$ "ccess Control$ etc. " system is a part of the world that a person or a group of persons during some time interval and for some purpose choose to regard as a whole$ consisting of interrelated components$ each component characteri)ed by properties that are selected as being relevant to the purpose.

SYSTEM CONSTITUENTS:

HARDWARE

SOFTWARE

HUMANWARE

Fig: 1 System Co stit!e ts 1." EM#EDDED SYSTEMS:

"n em$e%%e% system can also be e#plained as a special&purpose system in which the computer is completely encapsulated by or dedicated to the device or system it controls. 2nlike a general&purpose computer$ such as a personal computer$ an embedded system performs one or a few pre&defined tasks$ usually with very specific re%uirements. Since the system is dedicated to specific tasks$ design engineers can optimi)e it$ reducing the si)e and cost of the product. !mbedded systems are often mass&produced$ benefiting from economies of scale

,e can define an embedded system as 4a computing device built into a device that is not a computer$ and meant for doing specific computing tasks5.

"n embedded system is a special purpose computer system usually built into an environment connected to systems through sensors$ actuators and other I6 interfaces.

!mbedded system must meet timing and other constraints imposed on it by environment. In this we can use "T78S91 1icro controller.

E&AMPLES OF EM#EDDED SYSTEMS:

"utomatic teller machines '"T1s( Cellular telephones and telephone switches :andheld calculators :andheld computers :ousehold appliances$ including microwave ovens$ washing machines$ television sets$ D;D players and recorders

1edical e%uipment <ersonal digital assistant ;ideogame consoles Computer peripherals such as routers and printers

OR'ANISATION OF THESIS:
The following will be a brief description of the contents of the report. Chapter 1 deals with the block diagram of message circular system and brief introduction about hardware components. Chapter 3 gives a detailed e#planation about the hardware components that are used in the pro+ect. Chapter3 gives a brief description about >CD. Chapter9 describes Serial Communication. Chapter? describes the Software/s we used in the pro+ect.

CHAPTER 2
2. #(o)* %i+g,+m o- Em$e%%e% $+se% )!stomi.e% /i,e(ess mess+ge )i,)!(+, system -o, )o((ege0 i %!st,ies. 2.1.1 TRANSMIT #LOC1 DIA'RAM:

< ,!- CI-C2IT DC 9;

D"T" <"SSI@A T:- 2A: I@ "I;I" "@T!@" C 12<T!- - <C

-. TB 1 D2>! 2"-T or S!-I"> C 112@IC"TI @ 1IC- C @T- >>!78S91

!@C D!-

Fig: 2.1 #(o)* %i+g,+m o- T,+ smitte,

2.1.2 RECEI2E #LOC1 DIA'RAM:

< ,!- CI-C2IT DC 9 ;

D"T" -!C!I;! T-: 2A: "I-

-. -!C!I;! 1 D2>!

1IC- C @T- >>!78S91 D!C D!>CD 0C1? DIS<>"D

Fig: 2.2 #(o)* %i+g,+m o- Re)ei3e,

2.2 HARD4ARE DETAILS:

The above figure shows the !mbedded based customi)ed wireless message circular system block diagram.It mainly consists 1. 1icro controller 0. <ower Supply 3. !ncoder =. Decoder 9. -. 1 D2>! 'TB$ -B( ?. >CD Display 2nit

MICRO 5 CONTROLLER:
"tmel6<hillips 78S91$ 7 bit 1icro controller from MCS561 Intel family$ 7F bytes of .lash$ 09? bytes of -"1.It has =G pins configuration and other components interfaced to its ports. In addition$ the "T78S91 is designed with static logic for operation down to )ero fre%uency and supports two software selectable power saving modes. The Idle 1ode stops the C<2 while allowing the -"1$ timer6counters$ serial port$ and interrupt system to continue functioning. The "tmel "T78S91 is a powerful microcontroller which provides a highly&fle#ible and cost&effective solution to many embedded control applications.

LCD DISPLAY UNIT:

>CD is fle#ible controller and can be used with 7 bit or = bit. 1icro controller using the data and control lines 1icro controller displays selected item and other calculated results on its screen.

PO4ER SUPPLY:
The <ower Supply unit is used to provide a constant 9 volts -egulated Supply to different IC/s this is standard circuits using e#ternal 10 ;DC adapter and fi#ed 3&pin voltage regulator. Diode is added in series to avoid -everse ;oltage <rotection

ENCODER:
"n encoder is a device$ circuit$ transducer$ software program$ algorithm or person that converts information from one format or code to another$ for the purposes of standardi)ation$ speed$ secrecy$ security$ or saving space by shrinking si)e.

DECODER:
" decoder is a device which does the reverse of an encoder$ undoing the encoding so that the original information can be retrieved. The same method used to encode is usually +ust reversed in order to decode. In digital electronics$ a decoder can take the form of a multiple&input$ multiple&output logic circuit that converts coded inputs into coded outputs$ where the input and output codes are different. e.g. n&to&0n$ binary&coded decimal decoders. !nable inputs must be on for the decoder to function$ otherwise its outputs assume a single *disabled* output code word.

RF MODULE 7T&0 R&8:

-adio fre%uency '-.( is a fre%uency or rate of oscillation within the range of about 3 :) to 3GG A:). This range corresponds to fre%uency of alternating current electrical signals used to produce and detect radio waves. Since most of this range is beyond the vibration rate that most mechanical systems can respond to$ -. usually refers to oscillations in electrical circuits or electromagnetic radiation.

CHAPTER53 HARD4ARE DETAILS

3.1 PO4ER SUPPLY
The <ower Supply unit is used to provide a constant 9 volts -egulated Supply to different IC/s this is standard circuits using e#ternal 10 ;DC adapter and fi#ed 3&pin voltage regulator. Diode is added in series to avoid -everse ;oltage <rotection.

#LOC1 DIA'RAM:

Fig: 3.1 #(o)* %i+g,+m o- Po/e, S!99(y 3.1.1 STEP DO4N TRANSFORMER:
,hen "C is applied to the primary winding of the power transformer it can either be stepped down or up depending on the value of DC needed. In our circuit the transformer of 03Gv619&G&19v is used to perform the step down operation where a 03G; "C appears as 19; "C 8

across the secondary winding.

ne alteration of input causes the top of the transformer to be

positive and the bottom negative. The ne#t alteration will temporarily cause the reverse. The current rating of the transformer used in our pro+ect is 0". "part from stepping down "C voltages$ it gives isolation between the power source and power supply circuitries.

3.1.2 RECTIFIER UNIT:

In the power supply unit$ rectification is normally achieved using a solid state diode. Diode has the property that will let the electron flow easily in one direction at proper biasing condition. "s "C is applied to the diode$ electrons only flow when the node and cathode is negative. -eversing the polarity of voltage will not permit electron flow. " commonly used circuit for supplying large amounts of DC power is the bridge rectifier. " bridge rectifier of four diodes '=CI@=GGE( are used to achieve full wave rectification. Two diodes will conduct during the negative cycle and the other two will conduct during the positive half cycle. The DC voltage appearing across the output terminals of the bridge rectifier will be somewhat lass than 8GH of the applied rms value. @ormally one alteration of the input voltage will reverse the polarities. pposite ends of the transformer will therefore always be 17G deg out of phase with each other. .or a positive cycle$ two diodes are connected to the positive voltage at the top winding and only one diode conducts. "t the same time one of the other two diodes conducts for the negative voltage that is applied from the bottom winding due to the forward bias for that diode. In this circuit due to positive half cycleD1 I D0 will conduct to give 1G.7v pulsating DC. The DC output has a ripple fre%uency of 1GG:). Since each altercation produces a resulting output pulse$ fre%uency J 0C9G :). The output obtained is not a pure DC and therefore filtration has to be done.

3.1.3 FILTERIN' UNIT:

.ilter circuits which are usually capacitors acting as a surge arrester always follow the rectifier unit. This capacitor is also called as a decoupling capacitor or a bypassing capacitor$ is used not only to Kshort/ the ripple with fre%uency of 10G:) to ground but also to leave the fre%uency of the DC to appear at the output. " load resistor -1 is connected so that a reference to the ground is maintained. C1-1 is for bypassing ripples. C0-0 is used as a low pass filter$ i.e. it passes only low fre%uency signals and bypasses high fre%uency signals. The load resistor should be 1H to 0.9H of the load.

1G

1GGGf609v 1Gf609v 1 f

L for the reduction of ripples from the pulsating. L for maintaining the stability of the voltage at the load side. $ L for bypassing the high fre%uency disturbances.

3.1." :;<6 2OLTA'E RE'ULATORS:

The >1E7BB series of three terminal regulators is available with several fi#ed output voltages making them useful in a wide range of applications. ne of these is local on card

regulation$ eliminating the distribution problems associated with single point regulation. The voltages available allow these regulators to be used in logic systems$ instrumentation$ :i.i$ and other solid state electronic e%uipment. "lthough designed primarily as fi#ed voltage regulators these devices can be used with e#ternal components to obtain ad+ustable voltages and currents. The >1E7BB series is available in an aluminum T &3 package which will allow over 1.G" load current if ade%uate heat sinking is provided. Current limiting is included to limit the peak output current to a safe value. Safe area protection for the output transistor is provided to limit internal power dissipation. If internal power dissipation becomes too high for the heat sinking provided$ the thermal shutdown circuit takes over preventing the IC from overheating. Considerable effort was e#panded to make the >1E7BB series of regulators easy to use and minimi)e the number of e#ternal components. It is not necessary to bypass the output$ although this does improve transient response. Input bypassing is needed only if the regulator is located far from the filter capacitor of the power supply. .or output voltage other than 9;$ 10; and 19; the >111E series provides an output voltage range from 1.0; to 9E;.

Fe+t!,es:
utput current in e#cess of 1" Internal thermal overload protection @o e#ternal components re%uired utput transistor safe area protection Internal short circuit current limit "vailable in the aluminum T &3 package

11

Fig: 3.2 9(+sti) P+)*+ge o- 2o(t+ge Reg!(+to, 3.1.6 THREE TERMINAL POSITI2E 2OLTA'E RE'ULATOR:
These voltage regulators are monolithic integrated circuits designed as fi#edMvoltage regulators for a wide variety of applications including local$ onMcard regulation. These regulators employ internal current limiting$ thermal shutdown$ and safeMarea compensation. ,ith ade%uate heat sinking they can deliver output currents in e#cess of 1.G ". "lthough designed primarily as a fi#ed voltage regulator$ these devices can be used with e#ternal components to obtain ad+ustable voltages and currents. utput Current in !#cess of 1.G " @o !#ternal Components -e%uired Internal Thermal verload <rotection Internal Short Circuit Current >imiting utput Transistor SafeM"rea Compensation utput ;oltage ffered in 0H and =H Tolerance "vailable in Surface 1ount D0<"F and Standard 3M>ead Transistor

3.1.= STANDARD APPLICATION

Fig: 3.3 MC:;&& 2o(t+ge Reg!(+to,

10

" common ground is re%uired between the input and the output voltages. The input voltage must remain typically 0.G ; above the output voltage even during the low point on the input ripple voltage. BB& These two digits of the type number indicate nominal voltage. Cin& is re%uired if regulator is located an appreciable distance from power supply filter. C & is not needed for stabilityN however$ it does improve transient response. ;alues of less than G.1 m. could cause instability.

3.1.: TRANSFORMER:

Fig: 3." T,+ s-o,me,

Transformers convert "C electricity from one voltage to another with little loss of power. Transformers work only with "C and this is one of the reasons why mains electricity is "C. Step&up transformers increase voltage$ step&down transformers reduce voltage. 1ost power supplies use a step&down transformer to reduce the dangerously high mains voltage '03G; in 2F( to a safer low voltage.

13

The input coil is called the 9,im+,y and the output coil is called the se)o %+,y. There is no electrical connection between the two coils$ instead they are linked by an alternating magnetic field created in the soft&iron core of the transformer. The two lines in the middle of the circuit symbol represent the core.

Fig: 3.6 Ste9 Do/ T,+ s-o,me,

Transformers waste very little power so the power out is 'almost( e%ual to the power in. @ote that as voltage is stepped down current is stepped up.

The ratio of the number of turns on each coil$ called the t!, >s ,+tio$ determines the ratio of the voltages. " step&down transformer has a large number of turns on its primary 'input( coil which is connected to the high voltage mains supply$ and a small number of turns on its secondary 'output( coil to give a low output voltage.

1=

CIRCUIT DIA'RAM:

Fig: 3.= Ci,)!it Di+g,+m O- Po/e, S!99(y 3.1.; CIRCUIT DESCRIPTION:

The O9 volt power supply is based on the commercial E7G9 voltage regulator IC.This IC contains all the circuitry needed to accept any input voltage from 7 to 17 volts and produce a steady O9 volt output$ accurate to within 9H 'G.09 volt(. It also contains current&limiting circuitry and thermal overload protection$ so that the IC wonPt be damaged in case of e#cessive load currentN it will reduce its output voltage instead. The 1GGGQf capacitor serves as a *reservoir* which maintains a reasonable input voltage to the E7G9 throughout the entire cycle of the ac line voltage. The two rectifier diodes keep recharging the reservoir capacitor on alternate half&cycles of the line voltage$ and the capacitor is %uite capable of sustaining any reasonable load in between charging pulses.

19

The 1GQf and .G1Qf capacitors serve to help keep the power supply output voltage constant when load conditions change. The electrolytic capacitor smooths out any long&term or low fre%uency variations. :owever$ at high fre%uencies this capacitor is not very efficient. Therefore$ the .G1Qf is included to bypass high&fre%uency changes$ such as digital IC switching effects$ to ground. The >!D and its series resistor serve as a pilot light to indicate when the power supply is on. I like to use a miniature >!D here$ so it will serve that function without being obtrusive or distracting while IPm performing an e#periment. I also use this >!D to tell me when the reservoir capacitor is completely discharged after power is turned off. Then I know itPs safe to remove or install components for the ne#t e#periment.

3.2 MICRO CONTROLLER

"tmel6<hillips 78S91$ 7 bit 1icro controller from MCS561 Intel family$ 7F bytes of .lash$ 09? bytes of -"1.It has =G pins configuration and other components interfaced to its ports. In addition$ the "T78S91 is designed with static logic for operation down to )ero fre%uency and supports two software selectable power saving modes. The Idle 1ode stops the C<2 while allowing the -"1$ timer6counters$ serial port$ and interrupt system to continue functioning. The "tmel "T78S91 is a powerful microcontroller which provides a highly&fle#ible and cost&effective solution to many embedded control applications.

1?

#LOC1 DIA'RAM OF ;?S61 MICROCONTROLLER

Fig: 3.: #LOC1 DIA'RAM OF ;?S61 MICROCONTROLLER

1E

3.2.1 DESCRIPTION OF ;?S61 MICROCONTROLLER

78S91 contains a non&volatile .>"S: program memory that is parallel programmable. 78S91.7&bit 1icro controller from 1CS&91 Intel family$ with =k bytes of flash and 107 bytes of internal -"1 had been used. It has a =G&pin configuration and other components are interfaced to its ports. The 1icro controller takes input from the e#ternal sources and routes them to the appropriate devices as programmed in it. Fe+t!,es 78S91 Central <rocessing 2nit n&chip .>"S: <rogram 1emory Compatible with 1CS&91R <roducts 7F Bytes of In&System <rogrammable 'IS<( .lash 1emory !nduranceL 1GGG ,rite6!rase Cycles

=.G; to 9.9; perating -ange .ully Static peration Speed up to 33 1:) Three&level <rogram 1emory >ock 09? # 7&bit Internal -"1 30 <rogrammable I6 >ines Three 1?&bit Timer6Counters !ight Interrupt Sources .ull Duple# 2"-T Serial Channel .raming error detection "utomatic address recognition

>ow&power Idle and <ower&down 1odes Interrupt -ecovery from <ower&down 1ode Dual Data <ointer <ower&off .lag

17

3.2.2 DESCRIPTION OF #LOC1 DIA'RAM: CPU

The microcontroller consists of eight&bit ">2 with associated like register "$ register B$ <S, 'program status word($ S<'stack pointer($ and a 1?&bit <C'program counter( and a 1?&bit DT<'data pointer( register.

ALU
The ">2 performs arithmetic and logic functions on 7&bit variables. The ">2 can perform addition$ subtraction$ multiplication and division and the logic unit can perform logical operations. "n important and uni%ue feature of the microcontroller architecture is that the ">2 can also manipulate one bit as well as 7&bit data types. Individual bits may be set$ cleared$ complemented$ moved$ tested and used in logic computation.

ACCUMULATOR:
It is written as register " or "cc. It is an 7bit -egister the "ccumulator$ as its name suggests$ is used as a general register to accumulate the results of a large number of instructions. It can hold an 7&bit '1&byte( value and stores the result of the arithmetic operations such as addition$ subtraction$ multiplication and division and the logic unit can perform logical operations. The "ccumulator can be the source or destination register for logical operations. The "ccumulator has several e#clusive functions such as rotate$ parity computationN testing for G$ sign acceptor etc. and so on.

PRO'RAM COUNTER 7PC8:

The <rogram Counter '<C( is a 0&byte address which tells the 78S91 where the ne#t instruction to e#ecute is found in memory. ,hen the 78S91 is initiali)ed <C always starts at GGGGh and is incremented each time an instruction is e#ecuted. It is important to note that <C isn/t always incremented by one. Since some instructions re%uire 0 or 3 bytes the <C will be incremented by 0 or 3 in these cases

18

PS4 7PRO'RAM STATUS 4ORD8 RE'ISTER:

The program status word '<S,( register is on 7&bit register. It is also referred to as the flag register. The -S register select bits '-S1 I -SG( are used for selecting one of the bank registers.

CD <S,.E "C .G <S,.? <S,.9

Carry .lag. "u#iliary Carry .lag. .lag G available to the user for general purpose. -egister Bank selector bit 1. -egister Bank selector bit G. verflow .lag. 2sable as a general purpose flag. <arity flag. Set6cleared by hardware each instruction cycle to indicate an odd6even number of K1/ bus in the accumulator.

-S1 <S,.= -SG <S,.3 ; <S,.0 M < <S,.1 <S,.G

0G

3.3 PIN DESCRIPTION

PIN DIA'RAM:

Fig: 3.; PIN DIA'RAM OF MICRO CONTROLLER 01

3.3.1 AT;?S61 PIN DESCRIPTION 2CC

Supply voltage.

'ND:
Around.

PORT <
<ort G is an 7&bit open drain bidirectional I6 port. "s an output port$ each pin can sink eight TT> inputs. ,hen 1s are written to port G pins$ the pins can be used as high impedance inputs. <ort G can also be configured to be the multiple#ed low order address6data bus during accesses to e#ternal program and data memory. In this mode$ <G has internal pullups. <ort G also receives the code bytes during .lash programming and outputs the code bytes during program verification. !#ternal pullups are re%uired during program verification.

PORT 1
<ort 1 is an 7&bit bidirectional I6 port with internal pullups. The <ort 1 output buffers can sink6source four TT> inputs. ,hen 1s are written to <ort 1 pins$ they are pulled high by the internal pullups and can be used as inputs. "s inputs$ <ort 1 pins that are e#ternally being pulled low will source current 'II>( because of the internal pullups. In addition$ <1.G and <1.1 can be configured to be the timer6counter 0 e#ternal count input '<1.G6T0( and the timer6counter 0 trigger input '<1.16T0!B($ respectively$ as shown in the following table. <ort 1 also receives the low&order address bytes during .lash programming and verification.

00

3.1 T+$(e -o, 9o,t < PORT 2

<ort 0 is an 7&bit bidirectional I6 port with internal pullups. The <ort 0 output buffers can sink6source four TT> inputs. ,hen 1s are written to <ort 0 pins$ they are pulled high by the internal pullups and can be used as inputs. "s inputs$ <ort 0 pins that are e#ternally being pulled low will source current 'II>( because of the internal pullups. <ort 0 emits the high&order address byte during fetches from e#ternal program memory and during accesses to e#ternal data memory that use 1?&bit addresses '1 ;B SD<T-(. In this application$ <ort 0 uses strong internal pullups when emitting 1s. During accesses to e#ternal data memory that use 7&bit addresses '1 ;B S -I($ <ort 0 emits the contents of the <0 Special .unction -egister. <ort 0 also receives the high&order address bits and some control signals during .lash programming and verification.

PORT 3
<ort 3 is an 7&bit bidirectional I6 port with internal pullups. The <ort 3 output buffers can sink6source four TT> inputs. ,hen 1s are written to <ort 3 pins$ they are pulled high by the internal pullups and can be used as inputs. "s inputs$ <ort 3 pins that are e#ternally being pulled low will source current 'II>( because of the pullups. <ort 3 also serves the functions of various special features of the "T78S91$ as shown in the following table. <ort 3 also receives some control signals for .lash programming and verification.

03

3.2 T+$(e -o, 9o,t 3

RST
-eset input. " high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives :igh for 8? oscillator periods after the ,atchdog times out. The DIS-T bit in S.- "2B- 'address 7!:( can be used to disable this feature. In the default state of bit DIS-T $ the -!S!T :IA: out feature is enabled.

ALE@PRO'
"ddress >atch !nable '">!( is an output pulse for latching the low byte of the address during accesses to e#ternal memory. This pin is also the program pulse input '<- A( during .lash programming. In normal operation$ ">! is emitted at a constant rate of 16? the oscillator fre%uency and may be used for e#ternal timing or clocking purposes. @ote$ however$ that one ">! pulse is skipped during each access to e#ternal data memory. If desired$ ">! operation can be disabled by setting bit G of S.- location 7!:. ,ith the bit set$ ">! is active only during a 1 ;B or 1 ;C instruction. therwise$ the pin is weakly pulled high. Setting the ">!&disable bit has no effect if the microcontroller is in e#ternal e#ecution mode.

PSEN:
<rogram Store !nable '<S!@( is the read strobe to e#ternal program memory. ,hen the "T78S91 is e#ecuting code from e#ternal program memory$ <S!@ is activated twice each

0=

machine cycle$ e#cept that two <S!@ activations are skipped during each access to e#ternal data memory.

EA@2PP:
!#ternal "ccess !nable. !" must be strapped to A@D in order to enable the device to fetch code from e#ternal program memory locations starting at GGGG: up to ....:. @ote$ however$ that if lock bit 1 is programmed$ !" will be internally latched on reset. !" should be strapped to ;CC for internal program e#ecutions. This pin also receives the 10&volt programming enable voltage ';<<( during .lash programming.

&TAL1:
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

&TAL2:
utput from the inverting oscillator amplifier.

09

T+$(e 3.3 "T78S91 S.- 1ap and -eset ;alues

3.3.2 OSCILLATOR CHARACTERISTICS:

BT">1 and BT">0 are the input and output$ respectively$ of an inverting amplifier which can be configured for use as an on&chip oscillator$ as shown in .igure 1. !ither a %uart) crystal or ceramic resonator may be used. To drive the device from an e#ternal clock source$ BT">0 should be left unconnected while BT">1 is driven as shown in .igure 0. There are no re%uirements on the duty cycle of the e#ternal clock signal$ since the input to the internal clocking circuitry is through a divide&by&two flip&flop$ but minimum and ma#imum voltage high and low time specifications must be observed.

0?

Fig: 3.? CIRCUIT DIA'RAM OF CRYSTAL OSCILLATOR

OSCILLATOR CONNECTIONS:

Fig: 3.1< Fig O- Os)i((+to, )o

e)tio

0E

3.3.3 At;?S61: TYPES OF MEMORY:

The 78S91 has three very general types of memory The memory types are 1emory$ !#ternal Code 1emory$ and !#ternal -"1 n&Chip

Fig: 3.11 #ASIC #LOC1 DIA'RAM OF AT;?S61 O 5CAi9 Memo,y refers to any memory 'Code$ -"1$ or other( that physically e#ists on the microcontroller itself. n&chip memory can be of several types$ but wePll get into that shortly. EBte, +( Co%e Memo,y is code 'or program( memory that resides off&chip. This is often in the form of an e#ternal !<- 1. EBte, +( RAM is -"1 memory that resides off&chip. This is often in the form of standard static -"1 or flash -"1. Co%e Memo,y is the memory that holds the actual 78S91 program that is to be run. This memory is limited to ?=F and comes in many shapes and si)esL Codememory may be found on& chip$ either burned into the microcontroller as - 1 or !<- 1. Code may also be stored completely off&chip in an e#ternal - 1 or$ more commonly$ an e#ternal !<- 1. .lash -"1

07

is also another popular method of storing a program. ;arious combinations of these memory types may also be used&&that is to say$ it is possible to have =F of code memory on&chip and ?=k of code memory off&chip in an !<- 1.,hen the program is stored on&chip the ?=F ma#imum is often reduced to =k$ 7k$ or 1?k. This varies depending on the version of the chip that is being used. !ach version offers specific capabilities and one of the distinguishing factors from chip to chip is how much - 16!<- 1 space the chip has.

3.3." E&TERNAL RAM:

"s an obvious opposite of Internal -"1$ the 78S91 also supports what is called !#ternal -"1."s the name suggests$ !#ternal -"1 is any random access memory which is found off& chip. Since the memory is off&chip it is not as fle#ible in terms of accessing$ and is also slower. .or e#ample$ to increment an Internal -"1 location by 1 re%uires only 1 instruction and 1 instruction cycle. To increment a 1&byte value stored in !#ternal -"1 re%uires = instructions and E instruction cycles. In this case$ e#ternal memory is E times slowerT,hat !#ternal -"1 loses in speed and fle#ibility it gains in %uantity. ,hile Internal -"1 is limited to 107 bytes '09? bytes with an 7G90($ the 78S91 supports !#ternal -"1 up to ?=F.

3.3.6 ON5CHIP MEMORY:

"s mentioned$ the 78S91 includes a certain amount of on&chip memory. n&chip memory is really one of two typesL Internal -"1 and Special .unction -egister 'S.-( memory. The layout of the 78S91Ps internal memory is presented in the following memory map..

08

"s is illustrated in above map$ the 78S91 has a bank of 107 bytes of Internal -"1. This Internal -"1 is found on&chip on the 78S91 so it is the fastest -"1 available$ and it is also the most fle#ible in terms of reading$ writing$ and modifying it/s contents. Internal -"1 is volatile$ so when the 78S91 is reset this memory is cleared. 3.3.= RE'ISTER #AN1S: The 78S91 uses 7 *-* registers which are used in many of its instructions. These *-* registers are numbered from G through E '-G$ -1$ -0$ -3$ -=$ -9$ -?$ and -E(. These registers are generally used to assist in manipulating values and moving data from one memory location to another the "ccumulator. Thus if the "ccumulator '"( contained the value ? and -= contained the value 3$ the "ccumulator would contain the value 8 after this instruction was e#ecuted.:owever$ as the memory map shows$ the *-* -egister -= is really part of Internal -"1. Specifically$ -= is address G=h. This can be see in the bright green section of the memory map.But$ the 78S91 has four distinct register banks. ,hen the 78S91 is first booted up$ register bank G 'addresses GGh through GEh( is used by default. :owever$ your program may instruct the 78S91 to use one of the alternate register banksN i.e.$ register banks 1$ 0$ or 3. In this case$ -=

3G

will no longer be the same as Internal -"1 address G=h. .or e#ample$ if your program instructs the 78S91 to use register bank 3$ *-* register -= will now be synonomous with Internal -"1 address 1Ch. The concept of register banks adds a great level of fle#ibility to the 78S91$ especially when dealing with interrupts 'wePll talk about interrupts later(. :owever$ always remember that the register banks really reside in the first 30 bytes of Internal -"1.

3.3.: #IT MEMORY:

The 78S91$ being a communications&oriented microcontroller$ gives the user the ability to access a number of bit variables. These variables may be either 1 or G. There are 107 bit variables available to the user$ numberd GGh through E.h. The user may make use of these variables with commands such as S!TB and C>-. .or e#ample$ to set bit number 0= 'he#( to 1 you would e#ecute the instructionL S!TB 0=h It is important to note that Bit 1emory is really a part of Internal -"1. In fact$ the 107 bit variables occupy the 1? bytes of Internal -"1 from 0Gh through 0.h. Thus$ if you write the value ..h to Internal -"1 address 0Gh you/ve effectively set bits GGh through GEh. Bit variables GGh through E.h are for user&defined functions in their programs. :owever$ bit variables 7Gh and above are actually used to access certain S.-s on a bit&by&bit basis.

31

3.3.; ;?S61: #ASIC RE'ISTERS ACCUMULATOR:

The "ccumulator$ as it/s name suggests$ is used as a general register to accumulate the results of a large number of instructions. It can hold an 7&bit '1&byte( value and is the most versatile register the 78S91 has due to the shear number of instructions that make use of the accumulator. 1ore than half of the 78S91/s 099 instructions manipulate or use the accumulator in some way.

CRC RE'ISTERS:
The *-* registers are a set of eight registers that are named -G$ -1$ etc. up to and including -E.These registers are used as au#illary registers in many operations. To continue with the above e#ample$ perhaps you are adding 1G and 0G. The original number 1G may be stored in the "ccumulator whereas the value 0G may be stored in$ say$ register -=. To process the addition you would e#ecute the command

C#C RE'ISTER:
The *B* register is very similar to the "ccumulator in the sense that it may hold an 7&bit '1&byte( value.The *B* register is only used by two 78S91 instructionsL 12> "B and DI; "B. Thus$ if you want to %uickly and easily multiply or divide " by another number$ you may store the other number in *B* and make use of these two instructions. "side from the 12> and DI; instructions$ the *B* register is often used as yet another temporary storage register much like a ninth *-* register.

DATA POINTER 7DPTR8:

The Data <ointer 'D<T-( is the 78S91 only user&accessable 1?&bit '0&byte( register. The "ccumulator$ *-* registers$ and *B* register are all 1&byte values. D<T-$ as the name suggests$ is used to point to data. It is used by a number of commands which allow the 78S91 to access e#ternal memory. ,hen the 78S91 accesses e#ternal memory it will access e#ternal memory at

30

the address indicated by D<T-.,hile D<T- is most often used to point to data in e#ternal memory$ many programmers often take advantge of the fact that it/s the only true 1?&register available. It is often used to store 0&byte values which have nothing to do with memory locations.

PRO'RAM COUNTER 7PC8:

The <rogram Counter '<C( is a 0&byte address which tells the 78S91 where the ne#t instruction to e#ecute is found in memory. ,hen the 78S91 is initiali)ed <C always starts at GGGGh and is incremented each time an instruction is e#ecuted. It is important to note that <C isn/t always incremented by one. Since some instructions re%uire 0 or 3 bytes the <C will be incremented by 0 or 3 in these cases

STAC1 POINTER 7SP8:

The Stack <ointer$ like all registers e#cept D<T- and <C$ may hold an 7&bit '1&byte( value. The Stack <ointer is used to indicate where the ne#t value to be removed from the stack should be taken from.,hen you push a value onto the stack$ the 78S91 first increments the value of S< and then stores the value at the resulting memory location.,hen you pop a value off the stack$ the 78S91 returns the value from the memory location indicated by S<$ and then decrements the value of S<.

TIMER < AND TIMER 1:

The 4Timer5 or 4 counter 4 function is selected by control bits C6T in the special function register T1 D. These two timer6counters have operating moses$which are selected by bit&pairs '1161G( in T1 D. 1odes G$1$ and 0 are the same for both timer6counters. 1ode 3 is different.

33

TMOD 7Time, Mo%e Registe,8:

E A"T! ? C6T 9 11 = 1G 3 A"T! 0 C6T 1 11 G 1

A"T!L ,hen set$ start and stop of timer by hardware ,hen reset$ start and stop of timer by software

C6TL

Cleared for timer operation Set for counter operation

M1

M<

MODE

OPERATIN' MODE

13&bit timer mode

1?&bit timer mode

7&bit timer mode

Split timer mode

TCON 7Time, Co t,o( Registe,8:

"ddress J77: Bit addressable E ? 9 = 3 0 1 G

T.1

T-1

T.G

T-G

I!1

IT1

I!G

ITG

3=

T.L

Timer overflow flag. Set by hardware when the timer6counter overflows. It is cleared by hardware$ as the processor vectors to the interrupt service routine.

T-L I!L

Timer run control bit. Set or cleared by software to turn timer or counter on6off. Set by C<2 when the e#ternal interrupt edge ':&to&> transition( is detected. It is cleared by C<2 when the interrupt is processed.

ITL

Set6cleared by software to specify falling edge6low&level triggered e#ternal interrupt.

39

3." ENCODERS 7HT ="<8

"n encoder is a device$ circuit$ transducer$ software program$ algorithm or person that converts information from one format or code to another$ for the purposes of standardi)ation$ speed$ secrecy$ security$ or saving space by shrinking si)e.

FEATURES
perating voltageL 0.=;U10; >ow power and high noise immunity C1 S technology >ow standby current Three words transmission Built&in oscillator needs only 9H resistor !asy interface with an -. or infrared transmission media 1inimal e#ternal components

Fig: 3.12 #ASIC #LOC1 DIA'RAM OF ENCODER The 317encoders are a series of C1 S >SIs for remote control system applications. They are capable of encoding 17 bits of information which consists of @ address bits and 17V@ data bits. !ach address6data input is e#ternally trinary programmable if bonded out. It is otherwise set 3?

floating internally. ;arious packages of the 317 encoders offer fle#ible combinations of programmable address6data to meet various application needs. The programmable address6 data is transmitted together with the header bits via an -. or an infrared transmission medium upon receipt of a trigger signal. The capability to select a T! trigger type or a D"T" trigger type further enhances the application fle#ibility of the 317 series of encoders.

PIN ASSI'NMENT
TE T,igge, Ty9e

Fig: 3.13 PIN DIA'RAM OF ENCODER

3E

Notes:

D10UD1E

are

data T!

input is

and the

transmission transmission

enable enable

pins pin

of of

the the

:T?17E6:T?0GE6:T?0=E. :T?GG6:T?=G6:T?7G.

3.".1 FUNCTIONAL DESCRIPTION: O9e,+tio

The 317series of encoders begins a three&word transmission cycle upon receipt of a transmission enable 'T! for the :T?GG6:T?=G6:T?7G or D10UD1E for the :T?17E6:T?0GE6:T?0=E$ active high(. This cycle will repeat itself as long as the transmission enable 'T! or D10UD1E( is held high. nce the transmission enable falls low$ the encoder output completes its final cycle and then stops as shown below.

Fig: 3.1 4A2E FORMS OF ENCODER

37

3.6 DECODER
" decoder is a device which does the reverse of an encoder$ undoing the encoding so that the original information can be retrieved. The same method used to encode is usually +ust reversed in order to decode. In digital electronics$ a decoder can take the form of a multiple&input$ multiple& output logic circuit that converts coded inputs into coded outputs$ where the input and output codes are different. e.g. n&to&0n$ binary&coded decimal decoders. !nable inputs must be on for the decoder to function$ otherwise its outputs assume a single *disabled* output code word.

A99(i)+tio s
Burglar alarm system Smoke and fire alarm system Aarage door controllers Car door controllers Car alarm system Security system Cordless telephones ther remote control systems

Fe+t!,es
perating voltageL 0.=;U10; >ow power and high noise immunity C1 S technology >ow standby current Capable of decoding 17 bits of information <airs with : >T!F/s 317 series of encoders 7U17 address pins GU7 data pins Trinary address setting Two times of receiving check Built&in oscillator needs only a 9H resistor ;alid transmission indictor !asily interface with an -. or an infrared transmission medium 38

1inimal e#ternal components

3.6.1 'ENERAL DESCRIPTION:

The 317 decoders are a series of C1 S >SIs for remote control system applications. They are paired with the 317 series of encoders. .or proper operation a pair of encoder6decoder pair with the same number of address and data format should be selected 'refer to the encoder6 decoder cross reference tables(. The 317 series of decoders receives serial address and data from that series of encoders that are transmitted by a carrier using an -. or an I- transmission medium. It then compares the serial input data twice continuously with its local address. If no errors or unmatched codes are encountered$ the input data codes are decoded and then transferred to the output pins. The ;T pin also goes high to indicate a valid transmission. The 317 decoders are capable of decoding 17 bits of information that consists of @ bits of address and 17M@ bits of data. To meet various applications they are arranged to provide a number of data pins whose range is from G to 7 and an address pin whose range is from 7 to 17. In addition$ the 317 decoders provide various combinations of address6data number in different packages.

Fig: 3.1" PIN DIA'RAM OF DECODER

=G

Pi Des),i9tio :

=1

A99(i)+tio s:
Burglar alarm system Smoke and fire alarm system Aarage door controllers Car door controllers Car alarm system Security system Cordless telephones ther remote control systems

3.= RF MODULE 7T&0 R&8

-adio fre%uency '-.( is a fre%uency or rate of oscillation within the range of about 3 :) to 3GG A:).This range corresponds to fre%uency of alternating current electrical signals used to produce and detect radio waves. Since most of this range is beyond the vibration rate that most mechanical systems can respond to$ -. usually refers to oscillations in electrical circuits or electromagnetic radiation

S9e)i+( 9,o9e,ties o- RF e(e)t,i)+( sig +(s:

!lectrical currents that oscillate at -. have special properties not shared by direct current signals. ne such property is the ease with which it can ioni)e air to

create a conductive path through air. This property is e#ploited by Phigh fre%uencyP units used in electric arc welding. "nother special property is an electromagnetic force that drives the -. current to the surface of conductors$ known as the skin effect. "nother property is the ability to appear to flow through paths that contain insulating material$ like the dielectric insulator of a capacitor. The degree of effect of these properties depends on the fre%uency of the signals. N+me !#tremely low fre%uency !>. Sym$o( R+ ge 3 to 3G :) 4+3e(e gtA 1G$GGG km to 1GG$GGG km A99(i)+tio s audible 0GO :)$ communication with submarines

=0

Super low fre%uency 2ltra low fre%uency ;ery low fre%uency >ow fre%uency 1edium fre%uency :igh fre%uency ;ery high fre%uency 2ltra high fre%uency Super high fre%uency !#tremely high fre%uency

S>.

3G to 3GG :) 3GG :) to 3 k:) 3 to 3G k:) 3G to 3GG k:) 3GG to 3GGG k:) 3 to 3G 1:) 3G to 3GG 1:) 3GG to

1$GGG km to 1G$GGG km 1GG to 1GGG km

audible$ "C power grids '9G hert) and ?G hert)( audible$ communication with mines audible range 0G :) to 0G k:) 'to

2>.

;>.

1G to 1GG km

be audible$ energy must be simply converted to sound(

>.

1 to 1G km

international broadcasting$ navigational beacons$ low.!navigational beacons$ "1

1.

1GG m to 1 km broadcasting$ maritime and aviation communication 1G to 1GG m shortwave$ citi)ensP band radio .1 broadcasting$ broadcast television$ aviation broadcast television$ mobile 1G to 1GG cm telephones$ wireless networking$ microwave ovens 1 to 1G cm wireless networking$ radar$ satellite links. microwave data links$ radio

:.

;:.

1 to 1G m

2:.

3GGG 1:)

S:.

3 to 3G A:)

!:.

3G to 3GG A:)

1 to 1G mm

astronomy$ remote sensing$ advanced weapons systems$ advanced security scanning

3.= Table for fre%uency of -. The T,S&=3= and -,S&=3= are e#tremely small$ and are e#cellent for applications re%uiring short&range -. remote controls. The transmitter module is only 163 the si)e of a standard postage stamp$ and can easily be placed inside a small plastic enclosure.

=3

T,S&=3=L The transmitter output is up to 7m, at =33.801:) with a range of appro#imately =GG foot 'open area( outdoors. Indoors$ the range is appro#imately 0GG foot$ and will go through most walls....

. T,S&=3=" The T,S&=3= transmitter accepts both linear and digital inputs$ can operate from 1.9 to 10 ;olts&DC$ and makes building a miniature hand&held -. transmitter very easy. The T,S&=3= is appro#imately the si)e of a standard postage stamp.

Fig:3.16 T4S5"3" Pi Di+g,+m

==

Sample Transmitter "pplication Circuit

Fig: 3.1= CIRCUIT DIA'RAM OF T4S "3" -,S&=3=L The receiver also operates at =33.801:)$ and has a sensitivity of 3u;. The -,S&=3= receiver operates from =.9 to 9.9 volts&DC$ and has both linear and digital outputs.

3.=.1 Re)ei3e, Mo%!(e : R4S53:15= 7"33.?2 MHD8:

.re%uency -angeL =33.80 1:W 1odulate 1odeL "SF Circuit ShapeL >C =9

Date -ateL =7GG bps SelectivityL &1G? dB Channel SpacingL 11:W Supply ;oltageL 9; :igh Sensitivity <assive Design. Simple To "pply with >ow !#ternal Count.

-,S&=3= -eceiver

Fig:3.1: R4S5"3" Pi Di+g,+m Note: .or ma#imum range$ the recommended antenna should be appro#imately 39cm long. To convert from centimeters to inches && multiply by G.383E. .or 39cm$ the length in inches will be appro#imately 39cm # G.383E J 13.EE89 inches long. ,e

=?

tested these modules using a 1=*$ solid$ 0= gauge hobby type wire$ and reached a range of over =GG foot. Dour results may vary depending on your surroundings.

Fig:3.1; S+m9(e Re)ei3e, A99(i)+tio Ci,)!it .

=E

CHAPTER 5" LCD 7LIEUID CRYSTAL DISPLAY8

".1 DESCRIPTION:
>CD is fle#ible controller and can be used with 7 bit or = bit. 1icro controller using the data and control lines 1icro controller displays selected item and other calculated results on its screen. >CDs can add a lot to your application in terms of providing an useful interface for the user$ debugging an application or +ust giving it a *professional* look. The most common type of >CD controller is the :itachi ==E7G$ which provides a relatively simple interface between a processor and an >CD. 2sing this interface is often not attempted by ine#perienced designers and programmers because it is difficult to find good documentation on the interface$ initiali)ing the interface can be a problem and the displays themselves are e#pensive.

".2 PIN DIA'RAM:

Fig: ".1 #LOC1 DIA'RAM OF LCD

=7

PIN DESCRIPTION:
"s you would probably guess from this description$ the interface is a parallel bus$ allowing simple and fast reading6writing of data to and from the >CD.

Pi s 1 0 3 = 9 ? E & 1= Around ;cc Contrast ;oltage

Des),i9tio

*-6S* VInstruction6-egister Select *-6,* V-ead6,rite >CD -egisters *!* Clock Data I6 <ins

"bove is the %uite simple schematic pin diagram. The >CD panelPs !nable and Register Select is connected to the Control <ort. The Control <ort is an open collector 6 open drain output. ,hile most <arallel <orts have internal pull&up resistors$ there are a few which donPt. Therefore by incorporating the two 1GF e#ternal pull up resistors$ the circuit is more portable for a wider range of computers$ some of which may have no internal pull up resistors. ,e make no effort to place the Data bus into reverse direction. Therefore we hard wire the R/W line of the >CD panel$ into write mode. This will cause no bus conflicts on the data lines. "s a result we cannot read back the >CDPs internal Busy .lag$ which tells us if the >CD has accepted and finished processing the last instruction. This problem is overcome by inserting known delays into our program.

=8

The 1Gk <otentiometer controls the contrast of the >CD panel. @othing fancy here. Dou can use a bench power supply set to 9v or use a onboard O9 regulator. The 0 line # 1? character >CD modules are available from a wide range of manufacturers and should all be compatible with the :D==E7G. The diagram to the right$ shows the pin numbers for these devices. ,hen viewed from the front$ the left pin is pin 1= and the right pin is pin 1. >CDs can be added %uite easily to an application and use as few as three digital output pins for control. "s for cost$ >CDs can be often pulled out of old devices or found in surplus stores for less than a dollar. The most common connector used for the ==E7G&based >CDs is 1= pins in a row$ with pin centers G.1GG* apart.

=.1 wave form of >CD Data "s you would probably guess from this description$ the interface is a parallel bus$ allowing simple and fast reading6writing of data to and from the >CD. This waveform will write an "SCII Byte out to the >CDPs screen. The "SCII code to be displayed is eight bits long and is sent to the >CD either four or eight bits at a time. If four&bit mode is used$ two *nibbles* of data 'Sent high four bits and then low four bits with an *!* Clock pulse with each nibble( are sent to make up a full eight&bit transfer. The *!* Clock is used to initiate the data transfer within the >CD.

9G

Sending parallel data$ as either four or eight bits are the two primary modes of operation. ,hile there are secondary considerations and modes$ deciding how to send the data to the >CD is most critical decision to be made for an >CD interface application. !ight&bit mode is best used when speed is re%uired in an application and at least ten I6 pins are available. .our&bit mode re%uires a minimum of si# bits. To wire a microcontroller to an >CD in four&bit mode$ +ust the top four bits 'DB=&E( are written to. The *-6S* bit is used to select whether data or an instruction is being transferred between the microcontroller and the >CD. If the Bit is set$ then the byte at the current >CD *Cursor* <osition can be read or written. ,hen the Bit is reset$ either an instruction is being sent to the >CD or the e#ecution status of the last instruction is read back 'whether or not it has completed(. The different instructions available for use with the ==E7G are shown in the table belowL R@S R@4 D: D= D6 D" D3 D2 D1 D< = G G G G G G G G G 1 1 9 G G G G G G G G 1 G 1 1= 13 10 11 1G 8 G G G G G G G G G G G G G G G G G G G G G G G G G 1 G G 7 G 1 E <ins 1 Clear Display C -eturn Cursor and >CD to :ome <osition I st,!)tio @Des),i9tio

1 ID S Set Cursor 1ove Direction D C B !nable Display6Cursor C 1ove Cursor6Shift Display C Set Interface >ength

1 SC -> C C

1 D> @ .

1 " " " " " " 1ove Cursor into CA-"1

1 " " " " " " " 1ove Cursor to Display B. C C C C C C C <oll the *Busy .lag* ,rite a Character to the Display at the Current Cursor <osition

D D D D D D D D

D D D D D D D D -ead the Character on the Display at the

91

Current Cursor <osition

*C* & @ot 2sed6Ignored. This bit can be either *1* or *G* Set Cursor 1ove DirectionL ID & Increment the Cursor "fter !ach Byte ,ritten to Display if Set S & Shift Display when Byte ,ritten to Display !nable Display6Cursor D & Turn Display n '1(6 ff 'G( C & Turn Cursor n '1(6 ff 'G( B & Cursor Blink n '1(6 ff 'G( 1ove Cursor6Shift Display SC & Display Shift n '1(6 ff 'G( -> & Direction of Shift -ight '1(6>eft 'G( Set Interface >ength D> & Set Data Interface >ength 7'1(6='G( @ & @umber of Display >ines 1'G(60'1( . & Character .ont 9#1G'1(69#E'G( <oll the *Busy .lag* B. & This bit is set while the >CD is processing 1ove Cursor to CA-"16Display " & "ddress -ead6,rite "SCII to the Display D & Data -eading Data back is best used in applications$ which re%uired data to be moved back and forth on the >CD 'such as in applications which scroll data between lines(. The *Busy .lag* can be polled to determine when the last instruction that has been sent has completed processing. This simplifies the application because when data is read back$ the microcontroller I6 pins have to be alternated between input and output modes.

90

.or most applications$ there really is no reason to read from the >CD. "s well as making my application software simpler$ it also frees up a microcontroller pin for other uses. Different >CDs e#ecute instructions at different rates. In terms of options$ it is seen that a 9#1G >CD display. This means that the *.* bit in the *Set Interface Instruction* should always be reset 'e%ual to *G*(. Before you can send commands or data to the >CD module$ the 1odule must be initiali)ed. .or eight&bit mode$ this is done using the following series of operationsL 1. ,ait more than 19 msecs after power is applied. 0. ,rite G#G3G to >CD and wait 9 msecs for the instruction to complete 3. ,rite G#G3G to >CD and wait 1?G usecs for instruction to complete =. ,rite G#G3G "A"I@ to >CD and wait 1?G usecs or <oll the Busy .lag 9. Set the perating Characteristics of the >CD ,rite *Set Interface >ength* ,rite G#G1G to turn off the Display ,rite G#GG1 to Clear the Display ,rite *Set Cursor 1ove Direction* Setting Cursor Behavior Bits ,rite *!nable Display6Cursor* I enable Display and ptional Cursor In describing how the >CD should be initiali)ed in four bit mode$ will specify writing to the >CD in terms of nibbles. This is because initially$ +ust single nibbles are sent 'and not two$ which make up a byte and a full instruction(. "s mentioned above$ when a byte is sent$ the high nibble is sent before the low nibble and the *!* pin is toggled each time four bits is sent to the >CD. To initiali)e in four bit modeL 1. ,ait more than 19 msecs after power is applied. 0. ,rite G#G3 to >CD and wait 9 msecs for the instruction to complete 3. ,rite G#G3 to >CD and wait 1?G usecs for instruction to complete =. ,rite G#G3 "A"I@ to >CD and wait 1?G usecs 'or poll the Busy .lag( 9. Set the perating Characteristics of the >CD

93

?. ,rite G#G0 to the >CD to !nable .our Bit 1ode "ll following instruction6Data ,rites re%uire two nibble writesL ,rite *Set Interface >ength* ,rite G#G16G#GG to turn off the Display ,rite G#GG6G#G1 to Clear the Display ,rite *Set Cursor 1ove Direction* Setting Cursor Behavior Bits ,rite *!nable Display6Cursor* I enable Display and ptional Cursor nce the initiali)ation is complete$ the >CD can be written to with data or instructions as re%uired. !ach character to display is written like the control bytes$ e#cept that the *-6S* line is set. During initiali)ation$ by setting the *S6C* bit during the *1ove Cursor6Shift Display* command$ after each character is sent to the >CD$ the cursor built into the >CD will increment to the ne#t position 'either right or left(. @ormally$ the *S6C* bit is set 'e%ual to *1*( along with the *-6>* bit in the *1ove Cursor6Shift Display* command for characters to be written from left to right 'as with a *Teletype* video display(. 1ost >CD displays have a ==E7G and support chip to control the operation of the >CD. The ==E7G is responsible for the e#ternal interface and provides sufficient control lines for si#teen characters on the >CD. The support chip enhances the I6 of

the ==E7G to support up to 107 characters on an >CD. .rom the table above$ it should be noted that the first two entries '*7#1*$ *1?#1*( only have the ==E7G and not the support chip. This is why the ninth character in the 1?#1 does not *appear* at address 7 and shows up at the address that is common for a two line >CD. It includes the =G characters by = line '*=G#=*( >CD because it is %uite common. @ormally$ the >CD is wired as two =G#0 displays. The actual connector is normally si#teen bits wide with all the fourteen connections of the ==E7G in common$ e#cept for the *!* 'Strobe( pins. The *!* strobes are used to address between the areas of the display used by the two devices. The actual pin outs and character addresses for this type of display can vary between manufacturers and display part numbers.

9=

Fig: ".2 MO2IN' CURSOR LCD DISPLAY @ote that when using any kind of multiple ==E7G >CD display$ you should probably only display one ==E7GPs Cursor at a time. Cursors for the ==E7G can be turned on as a simple underscore at any time using the *!nable Display6Cursor* >CD instruction and setting the *C* bit. donPt recommend using the *B* '*Block 1ode*( bit as this causes a flashing full character s%uare to be displayed and it really isnPt that attractive. The >CD can be thought of as a *Teletype* display because in normal operation$ after a character has been sent to the >CD$ the internal *Cursor* is moved one character to the right. The *Clear Display* and *-eturn Cursor and >CD to :ome <osition* instructions are used to reset the CursorPs position to the top right character on the display. To move the Cursor$ the *1ove Cursor to Display* instruction is used. .or this instruction$ bit E of the instruction byte is set with the remaining seven bits used as the address of the character on the >CD the cursor is to move to. These seven bits provide 107 addresses$ which matches the ma#imum number of >CD character addresses available. The table above should be used to determine the address of a character offset on a particular line of an >CD display.

99

The last aspect of the >CD to discuss is how to specify a contrast voltage to the Display. I typically use a potentiometer wired as a voltage divider. This will provide an easily variable voltage between Around and ;cc$ which will be used to specify the contrast 'or *darkness*( of the characters on the >CD screen. Dou may find that different >CDs work differently with lower voltages providing darker characters in some and higher voltages do the same thing in others. There are a variety of different ways of wiring up an >CD. "bove$ I noted that the ==E7G could interface with four or eight bits. To simplify the demands in microcontrollers$ a shift register is often used 'as is shown in the diagram below( to reduce the number of I6 pins to three.

.igL=.3 Shift -egister >CD Data ,rite This can be further reduced by using the circuit shown below in which the serial data is combined with the contents of the shift register to produce the *!* strobe at the appropriate interval. This circuit *"@Ds* 'using the 1F resistor and I@81= diode( the output of the si#th *D&.lip .lop* of the E=>S1E= and the *Data* bit from the device writing to the >CD to form the *!* Strobe. This method re%uires one less pin than the three wire interface and a few more instructions of code.

9?

.igL=.= Shift -egister >CD Data ,rite !

.igL=.0 >CD Shift -egister >CD Data ,rite ! normally use a E=>S1E= wired as a shift register 'as is shown in the schematic

diagram( instead of a serial&in6parallel&out shift register. This circuit should work without any problems with a dedicated serial&in6parallel&out shift register chip$ but the timings6clock polarities may be different. ,hen the E=>S1E= is used$ note that the data is latched on the rising 'from logic *low* to *high*( edge of the clock signal..

9E

In the diagram to the right$ It is shown that how the shift register is written to for this circuit to work. Before data can be written to it$ the shift register is cleared by loading every latch with )eros. @e#t$ a *1* 'to provide the *!* Aate( is written followed by the *-6S* bit and the four data bits. nce the is loaded in correctly$ the

*Data* line is pulsed to Strobe the *!* bit. The biggest difference between the three wire and two wire interface is that the shift register has to be cleared before it can be loaded and the two wire operation re%uires more than twice the number of clock cycles to load four bits into the >CD. 2sing this circuit with the <IC 1icro$ 7G91 and ";- and it really makes the wiring of an >CD to a microcontroller very simple. " significant advantage of using a shift register$ like the two circuits shown here$ data to the >CD is the lack of timing sensitivity that will be encountered. The biggest issue to watch for is to make sure the *!* StrobePs timing is within specification 'ie greater than =9G nsecs($ the shift register loads can be interrupted without affecting the actual write. This circuit will not work with pen&Drain only outputs ne note about the >CDPs *!* Strobe is that in some

documentation it is specified as *high* level active while in others$ it is specified as falling edge active.

97

CHAPTER56 SERIAL COMMUNICATION

6.1 INTRODUCTION:
The simplest form of communication is a direct connection between two computers. " network will simultaneously connect a large number of computers on a network. Data can be transmitted one bit at a time in series$ this is called serial communication. The communications often have limited distances$ from a few feet to thousands of miles6kilometers. The Serial <ort is harder to interface than the <arallel <ort. In most cases$ any device you connect to the serial port will need the serial transmission converted back to parallel so that it can be used. This can be done using a 2"-T. n the software side of things$ there are many more registers that you have to attend to than on a Standard <arallel <ort. 'S<<( 1. Serial Cables can be longer than <arallel cables. The serial port transmits a P1P as &3 to &09 volts and a PGP as O3 to O09 volts where as a parallel port transmits a PGP as Gv and a P1P as 9v. Therefore the serial port can have a ma#imum swing of 9G; compared to the parallel port which has a ma#imum swing of 9 ;olts. Therefore cable loss is not going to be as much of a problem for serial cables than they are for parallel. 0. Dou donPt need as many wires than parallel transmission. If your device needs to be mounted a far distance away from the computer then 3 core cable '@ull 1odem Configuration( is going to be a lot cheaper that running 18 or 09 core cable. :owever you must take into account the cost of the interfacing at each end. 3. Infra -ed devices have proven %uite popular recently. Dou may of seen many electronic diaries and palmtop computers which have infra red capabilities build in. :owever could you imagine transmitting 7 bits of data at the one time across the room and being able to 'from the devices point of view( decipher which bits are whichX Therefore serial transmission is used where one bit is sent at a time. IrD"&1 'The first infra red specifications( was capable of 119.0k baud and was interfaced

98

into a 2"-T. The pulse length however was cut down to 361?th of a -S030 bit length to conserve power considering these devices are mainly used on diaries$ laptops and palmtops. =. 1icrocontrollerPs have also proven to be %uite popular recently. 1any of these have in built SCI 'Serial Communications Interfaces( which can be used to talk to the outside world. Serial Communication reduces the pin count of these 1<2Ps. nly two pins are commonly used$ Transmit Data 'TBD( and -eceive Data '-BD( compared with at least 7 pins if you use a 7 bit <arallel method 'Dou may also re%uire a Strobe(.

6.2 HARD4ARE PROPERTIES:

Devices which use serial cables for their communication are split into two categories. These are DC! 'Data Communications !%uipment( and DT! 'Data Terminal !%uipment.( Data Communications !%uipment are devices such as your modem$ T" adapter$ plotter etc while Data Terminal !%uipment is your Computer or Terminal. The electrical specifications of the serial port is contained in the !I" '!lectronics Industry "ssociation( -S030C standard. It states many parameters such as M

1. " *Space* 'logic G( will be between O3 and O09 ;olts. 0. " *1ark* '>ogic 1( will be between &3 and &09 ;olts. 3. The region between O3 and &3 volts is undefined. =. "n open circuit voltage should never e#ceed 09 volts. 'In -eference to A@D( 9. " short circuit current should not e#ceed 9GGm". The driver should be able to handle this without damage. 'Take note of this oneT(

?G

Fig:5.1 DB9: View looking into male connector

Fig:6.2 DB9: View looking into female connector "bove is no where near a complete list of the !I" standard. >ine Capacitance$ 1a#imum Baud -ates etc are also included. .or more information please consult the !I" -S030&C standard. It is interesting to note however$ that the -S030C standard specifies a ma#imum baud rate of 0G$GGG B<ST$ which is rather slow by todayPs standards. " new standard$ -S&030D has been recently released. Serial <orts come in two *si)es*$ There are the D&Type 09 pin connector and the D&Type 8 pin connector both of which are male on the back of the <C$ thus you will re%uire a female connector on your device. Below is a table of pin connections for the 8 pin and 09 pin D&Type connectors.

6.3 MA&232:
The 1"B030 is a dual driver6receiver that includes a capacitive voltage generator to supply !I"&030 '!lectronic Industries "ssociation( voltage levels from a single 9&; supply. !ach receiver converts !I"&030 inputs to 9&; TT>6C1 S levels. These receivers have a typical threshold of 1.3 ; and a typical hysteresis of G.9 ;$ and can accept Y3G&; inputs. !ach driver converts TT>6C1 S input levels into !I"&

?1

030 levels. The driver$ receiver$ and voltage&generator functions are available as cells in the Te#as Instruments >in"SIC. >ibrary.

6." RS232:
Information being transferred between data processing e%uipment and peripherals is in the form of digital data which is transmitted in either a serial or parallel mode. <arallel communications are used mainly for connections between test instruments or computers and printers$ while serial is often used between computers and other peripherals. Serial transmission involves the sending of data one bit at a time$ over a single communications line. In contrast$ parallel communications re%uire at least as many lines as there are bits in a word being transmitted 'for an 7&bit word$ a minimum of 7 lines are needed(. Serial transmission is beneficial for long distance communications$ whereas parallel is designed for short distances or when very high transmission rates are re%uired.

St+ %+,%s
ne of the advantages of a serial system is that it lends itself to transmission over telephone lines The serial digital data can be converted by modem$ placed onto a standard voice&grade telephone line$ and converted back to serial digital data at the receiving end of the line by another modem. fficially$ -S&030 is defined as the

4Interface between data terminal e%uipment and data communications e%uipment using serial binary data e#change.5 This definition defines data terminal e%uipment 'DT!( as the computer$ while data communications e%uipment 'DC!( is the modem. " modem cable has pin&to&pin connections$ and is designed to connect a DT! device to a DC! device.

6.6 INTERRUPT
" single micro M controller can serve several devices. In the inturrpt menthod$ when ever any device needs its service the device notifies the microcontroller by sending it an interrupt signal. 2nit receiving an interrupt signal$ the microcontroller interrupts what ever it is doing and serves the devices. The program associated with the interrupt is called the interrupt service routine 'IS-(.The advantage of interrupts is that the microcontroller can serve many devices based on the priority assigned to it.

?0

?3

CHAPTER = SOFT4ARE MODULES

=.1 EM#EDDED C A99(i)+tio 7)o )e9t8: !mbedded&system enthusiasts may use the board
to store temperature$ relative humidity '-:($ and dew&point data on a 09?kbit eeprom. !ach data is accompanied with an optional time&stamp. It is possible to design a fancy menu with icons$ setup screens$ min&ma# data display$ or even a help menu for <C connection.

=.1.1 INTRODUCTION:
This chapter introduces the Feil C compiler for the Cygnal C7G91.G0G board. ,e assume some familiarity with the C programming language to the level covered by most first courses in the C language. !#perienced C programmers who have little e#perience with the C7G91.G0G architecture should become familiar with the system. The differences in programming the C7G91.G0G in C compared to a standard C program are almost all related to architectural issues. These e#planations will have little meaning to those without an understanding of the C7G91.G0G chip. The Feil C compiler provided with the Cygnal C7G91.G0G board does not come with a floating point library and so the floating point variables and functions should not be used. :owever if you re%uire floating point variables a full license for the Feil C compiler can be purchased.

=.1.2 RE'ISTER DEFINITIONS0 INITIALIDATION AND STARTUP CODE

C is a high level programming language that is portable across many hardware architectures. This means that architecture specific features such as register definitions$ initiali)ation and start up code must be made available to your program via the use of libraries and include files. .or the 7G91 chip you need to include the file ,eg61.A or using the Cygnal C7G91.G0G&TB development board include the file );<61-<2<.AL r These files contain all the definitions of the C7G91.G0G registers.

The standard initiali)ation and startup procedures for the C7G91.G0G are contained in

?=

st+,t!9.+61. This file is included in your pro+ect and will be assembled together with the compiled output of your C program. .or custom applications$ this start up file might need modification. Fi )(!%e G,eg61.AH Fi )(!%e Z );<61-<2<.A [

#+si) C 9,og,+m st,!)t!,e:

The following is the basic C program structureN all the programs you will write will have this basic structure. @oteL "ll variables must be declared at the start of a code block$ you cannot declare variables among the program statements. Dou can test this program in the Cygnal ID! connected to the C7G91.G0G development board. Dou won/t see anything happening on the board$ but you can step through the program using the debugger.

=.1.3 PRO'RAMMIN' MEMORY MODELS:

The C7G91.G0G processor has 10? Bytes of directly addressable internal memory and up to ?= Fbytes of e#ternally addressable space. The FeilT1 C compiler has two main C programming memory models$ S1">> and >"-A! which are related to these two types of memory. In the S1">> memory model the default storage location is the 10? Bytes of internal memory while in the >"-A! memory model the default storage location is the e#ternally addressed memory. @@5555555555555555555555555555555555555555555555555 @@ #+si) $(+ * C 9,og,+m tA+t %oes otAi g @@ otAe, tA+ %is+$(e tAe /+t)A %og time, @@5555555555555555555555555555555555555555555555555 @@ I )(!%es @@5555555555555555555555555555555555555555555555555 Fi )(!%e G);<61-<2<.AH @@ SFR %e)(+,+tio s 3oi% m+i 73oi%8 I @@ %is+$(e /+t)A%og time, 4DTCN J <B%eK 4DTCN J <B+%K

?9

/Ai(e718K @@ Sto9s 9,og,+m te,mi +ti g + % @@ ,est+,ti g L @@5555555555555555555555555555555555555555555555555

The default memory model re%uired is selected using the 9,+gm+ compiler control directiveL"ny variable declared in this file 'such as the variable X above( will be stored in the internal memory of the C7G91.G0G. The choice of which memory model to use depends on the program$ the anticipated stack si)e and the si)e of data. If the stack and the data cannot fit in the 107 Bytes of nternal memory then the default memory model should be >"-A!$ otherwise S1">> should be used.Det another memory model is the C 1<"CT memory model. This memory model is not discussed in this chapter. 1ore information on the compact model can be found in the document Cx51 Compiler Users Guide for eil!" #oftware. Dou can test the different memory models with

the Cygnal ID! connected to the C7G91.G0G TB development board. >ook at the symbol view after downloading your program and see in which memory addresses the compiler has stored your variables.

=.1." O2ERRIDIN' THE DEFAULT MEMORY MODEL:

The default memory model can be overridden with the use of FeilT1 C programming language e#tensions that tell the compiler to place the variables in another location. The two main available language e#tensions are %+t+ and B%+t+L The integer variable X and character variable Initial are stored in the internal memory while the integer variable Y and character variable SInitial are stored in the e#ternal memory overriding any default memory model. F9,+gm+ sm+(( i t &K i t %+t+ &K )A+, %+t+ I iti+(K i t B%+t+ YK )A+, %+t+ SI iti+(K C7G91.G0G C <rogramming 9 Constant variables can be stored in the read& only code section of the C7G91.G0G using the )o%e language e#tensionL In general$

??

access to the internal memory is the fastest$ so fre%uently used data should be stored here while less fre%uently used data should be stored on the e#ternal memory. The memory storage related language e#tensions$ $%+t+0 and associated data types $it$ s$it$ s-, and s-,1= will be discussed in the following sections. "dditional memory storage language e#tensions including$ 9%+t+ and i%+t+0 are not discussed in this chapterN refer to the document Cx51 Compiler Users Guide for eil!" #oftware for information on this.

=.1.6 #IT52ALUED DATA:

Bit&valued data and bit&addressable data must be stored in the bit addressable memory space on the C7G91.G0G 'G#0G to G#0.(. This means that bit& valued data and bit addressable data must be labelled as such using the $it$ s$it and $%+t+. Bit& addressable data must be identified with the $%+t+ language e#tensionL The integer variable B declared above is bit&addressable. "ny bit valued data must be given the $it data type$ this is not a standard C data typeL The bit&valued data flag is declared as above. )o st )A+, )o%e CRJ<BDEK i t $%+t+ &K $it -(+gK ? Chapter ? C7G91.G0G C <rogramming The s$it data type is used to declare variables that access a particular bit field of a previously declared bit&addressable variable. X7flag declared above is a variable that references bit E of the integer variable X. Dou cannot declare a bit pointer or an array of bits. The bit valued data segment is 1? bytes or 107 bits in si)e$ so this limits the amount of bit&valued data that a program can use.

=.1.= SPECIAL FUNCTION RE'ISTERS:

"s can be seen in the include files );<61-<2<.A or ,eg61.A$ the special function registers are declared as a s-, data type in FeilT1 C. The valuein the declaration specifies the memory location of the registerL !#tensions of the 7G91 often have the low byte of a 1? bit register preceding the high byte. In this scenario it is possible to declare a 1? bit special function register$ s-,1=$ giving the address of the low byteL The memory location of the register used in the declaration must be a constant rather than a variable or e#pression.

?E

$%+t+ &K s$it &:-(+g J &M:K @N $it : o- &N@ @N #YTE Registe, N@ s-, P< J <B;<K s-, P1 J <B?<K s-,1= TMR3RL J <B?2K@@ Time,3 ,e(o+% 3+(!e s-,1= TMR3 J <B?"K@@ Time,3 )o! te,

=.2 1EIL SOFT4ARE =.2.1 INTRODUCTION

"n assembler is a software tool designed to simplify the task of writing computer programs. It translates symbolic code into e#ecutable ob+ect code. This ob+ect code may then be programmed into a microcontroller and e#ecuted. "ssembly >anguage programs translate directly into C<2 instructions which instruct the processor what operations to perform. Therefore$ to effectively write assembly programs$ you should be familiar with both the microcomputer architecture and the assembly language. "ssembly language operation codes 'mnemonics( are easily remembered. Dou can also symbolically e#press addresses and values referenced in the operand field of instructions. Since you assign these names$ you can make them as meaningful as the mnemonics for the instructions. .or e#ample$ if your program must manipulate a date as data$ you can assign it the symbolic name D"T!. If your program Contains a set of instructions used as a timing loop 'a set of instructions e#ecuted repeatedly until a specific amount of time has passed($ you can name the instruction group TI1!-V> <.

"n assembly program has three constituent partsL 1. 1achine instructions 0. "ssembler directives 3. "ssembler controls " m+)Ai e i st,!)tio is a machine code that can be e#ecuted by the

machine. Detailed discussion of the machine instructions can be found in the hardware manuals of the 7G91 or derivative microcontroller.

?7

Assem$(e, %i,e)ti3es are used to define the program structure and symbols$ and generate non&e#ecutable code 'data$ messages$ etc.(. "ssembler directives instruct the assembler how to process subse%uent assembly language instructions. Directives also provide a way for you to define program constants and reserve space for variables. Assem$(e, )o t,o(s set the assembly modes and direct the assembly flow. "ssembler controls direct the operation of the assembler when generating a listing file or ob+ect file. Typically$ controls do not impact the code that is generated by the assembler. Controls can be specified on the command line or within an assembler source file.

=.2.2 DIRECTI2E CATE'ORIES

The Ax61 assembler has several directives that permit you to define symbol values$ reserve and initiali)e storage$ and control the placement of your code. The directives should not be confused with instructions. They do not produce e#ecutable code$ and with the e#ception of the DB$ D, and DD directives$ they have no direct effect on the contents of code memory. These directives change the state of the assembler$ define user symbols$ and add information to the ob+ect file. The following table provides an overview of the assembler directives. <age refers to the page number in this user/s guide where you can find detailed information about the directive. Di,e)ti3e @ P+ge Fo,m+t Des),i9tio #IT 11= symbols BIT address Define a bit address in bit data space.

#SE' 111 BS!A \"T absolute address] Define an absolute segment within the Bit address space.

CODE 11= symbols C D! code address "ssign a symbol name to a specific "ddress in the code space.

CSE' 111 CS!A \"T absolute address] Define an absolute segment within the Code addresses space.

?8

DATA 11= symbol D"T" data address assign a symbol name to a specific n&chip data address.

D# 118 \labelL] DB expression \, expr ...] Aenerate a list of byte values.

D#IT 100 \labelL] DBIT expression -eserve a space in bit units.

DD 101 \labelL] DD expression \, expr ...] Aenerate a list of double word values . DS 103 \labelL] DS expression -eserve space in byte units.

DS# 10= \labelL] DSB expression -eserve space in byte units.

DSD 10? \labelL] DSD expression -eserve space in double word units . DSE' 111 DS!A \"T absolute address] Define an absolute segment within the Indirect internal data space. Shaded directives and options are available only in "B91 and "091.

DS4 109 \labelL] DS, expression -eserve space in word unitsN "dvances the location counter of the current segment.

D4 10G \labelL] D, expression \$ expr. ...] Aenerate a list of word values. END 13? !@D Indicate end of program.

EEU 113 !^2 expression Set symbol value permanently.

E2EN 13= !;!@ !nsure word alignment for variables.

E&TRN 131

E&TERN !BT-@ class \L type] 'symbol \...]( Defines symbols referenced in the current module that are defined in other modules. .

EG

Several new variants of the 7G91 e#tend the code and6or #data space of the classic 7G91 with address e#tension registers. The following table shows the memory classes used for programming the e#tended 7G91 devices. These memory classes are available for classic 7G91 devices when you are using memory banking with the >B91 linker6locater. In addition to the code banking known from the B>91 linker6locater$ the >B91 linker6locator supports also data banking for Bdata and code areas with standard 7G91 devices.

Table ?.1 The memory prefi#es DL IL BL CL BGL .. B31L cannot be used at "#91 assembler level. The memory prefi# is only listed for better understanding. The LB61 linker6locater and several Debugging tools$ for e#ample the Q;ision0 Debugger$ are using memory prefi#es to identify the memory class of the address. If you are using

E1

the Dallas 38G contiguous mode the address space for C D! can be CLGGGG & CLG#.......

:. FLO4 CHART:

I 9!t is gi3e to tAe 9e,so +( )om9!te,

<C

2"-T

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1IC- C @T- >>!-

>CD

O!t9!t is %is9(+ye% o LCD

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Fig: =.1 FLO4 CHART OF PROOECT

;. RESULT:

E3

?. SCHEMATIC DIA'RAM:
U5 VCC R4 1 1 D5 BR D!E VN ! N D VOUT " 220H D4 "MM

&5 1 2 2 " C8 1000uF/25V

LM7805

C7 10uF/25V

C9 0.1uF

2 CON2

VCC

1 C R4 RES STOR S $ 9 9 8 7 % 5 4 " 2 VCC &1 C" 7 8 9 10 11 12 1" 14 2 15 VCC 0.1uF VCC5V VCC 24 17 18 19 VCC 20 21 22 1" 14 15 ANTEENA R* 1% 9 10 R2 "90# 11 2" 1 2 " 4 5 % 7 &7 D" VT 8 "MM 2 1 'uzz() 21 22 2" 24 25 2% 27 28 10 11 12 1" 14 15 1% 17 40 "1 U2 A4 A5 A% A7 A8 A9 A0 A1 A2 A" DN OSC2 U2 AD10 AD11 AD12 AD1" AD14 AD15 AD1% AD17 $2.0/A8 $2.1/A9 $2.2/A10 $2."/A11 $2.4/A12 $2.5/A1" $2.%/A14 $2.7/A15 $".0/R*D $".1/T*D $".2/ NTO $"."/ NT1 $".4/TO $".5/T1 $".%/WR $".7/RD "9 "8 "7 "% "5 "4 "" "2

&" 4 " 2 1

$0.0/AD0 $0.1/AD1 $0.2/AD2 $0."/AD" $0.4/AD4 $0.5/AD5 $0.%/AD% $0.7/AD7

VC C E A /V $ $

VD D

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1 $1.0 2 $1.1 VCC $1.2 $1." $1.4 $1.5 $1.% $1.7 " 4 5 % 7 8

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OSC1 VSS

RF RECEIVER

12

29 "0 $SEN A+E/$RO! C8 ""$F 19 Y1 C9 ""$F 11.0592M hz 18 *TA+2 ! N D *TA+1

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RST

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20

1<. CONCLUSION
The pro+ect PEm$e%%e% $+se% )!stomi.e% /i,e(ess mess+ge )i,)!(+, system -o, )o((ege0 i %!st,iesQ has been successfully designed and tested. Integrating features of all the hardware components used have developed it. <resence of every module has been reasoned out and placed carefully thus contributing to the best working of the unit. .inally we can successfully send the data from the main office room to all classrooms or banks$ railway stations$ industries etc.

E9

11. FUTURE SCOPE

,ireless message circular system is mainly used to send the data from one place to the other place using transmitter and the receiver using the -. technology . In future we can implement this pro+ect by connecting AS1 modem to receiver section and send message to user mobile number$where AS1 modem is connected to the computer system.

E?

12. #I#LIO'RAPHY:
7G91&1IC- C @T- >>!- "@D !1B!DD!D SDST!1.<g.@o.10G&09G

& 1ohd. "li 1a)idi

The 7G91 1IC- &C @T- >>!& "yala

<- A-"11I@A "@D C2ST 1IWI@A T:! 7G91 & 1yke <redko

4E#SITES REFERRED

www.atmel.databook.com www.keil.com www.google.com

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