Error control srini After having achieved the timing error tolerance, there is a need to make the system

resilient to other transient and permanent errors like soft errors. To immune the system from errors that occur in communication we use error detection codes like CRC, parity or error correction codes like hamming codes. Although all these codes are available, we need to select the one which has the lowest power and area consumption and the scheme that introduces minimum traffic overhead. Error detection can be performed either as an end to end scheme or a switch to switch scheme (ss). In the end to end scheme (ee), the sender and the receiver have one or more packet buffer which store the packets transmitted or received respectively. The receiver sends the ACK/NACK signal to the sender. Retransmission is done on reception of NACK. The ACK/NACK signals should be piggybacked to minimize the traffic overhead. Sequence identifiers are used to detect duplicate packets. In the switch to switch scheme, error detection hardware is added to each switch. The error check codes can be added to each flit or to each packet. Both schemes have their own pros and cons as will be discussed. In the switch to switch flit level error detection scheme (ssf), there are two sets of buffers at the input of a switch: queuing buffers used for credit based flow control and retransmission buffer. The hybrid scheme consists of single bit error correction and multibits error detection. To evaluate the performance of all these schemes we use power consumption analysis. We use the flit error rate and operating voltagefor the analysis keeping any one fixed and varying the other .It is seen that the ee-par scheme has higher power consumption than ee-crc and the hybrid scheme since the latter have a lower error detection capability hence they require a higher operating voltage to achieve the same flit error rate.The hybrid scheme has lower power consumption at high residual it errorrates and the ee-crc has lower power consumption for lower residual error rates. The packet buffer requirements significantly impact the power consumption. It is seen that as the average hop count for data transfer increases, the power overhead of ss-flit based scheme increases as more traffic passes through each switch thereby consuming more power on the buffers. The flit based scheme also incurs more power consumption as the number of flits per packets increase as the ratio of total useful bits to overhead bits decrease. In conclusion, switch level detection are power efficient when link lengths are small and when end to end scheme require large buffers. When the error rate increases the hybrid error control has higher performance than other schemes. Future work.: a novel scheme must be developed using the adv of all.