IBPS IT Officer Model Questions Computer System Architecture MCA Bank

Computer System Architecture MCQ
1. Which is an important data transfer technique :

a. CPU
b. DMA
c. CAD
d. one of these
!. Which de"ice can be thou#ht of as transducers $hich can sense physica% effects and con"ert them into
machine&tractab%e data:
a. Stora#e de"ices
b. Periphera% de"ices
c. 'oth
d. one
(. Which de"ices are usua%%y desi#ned on the comp%e) e%ectromechanica% princip%e:
a. Stora#e de"ices
b. Periphera% de"ices
c. *nput de"ices
d. A%% of these
+. Which dis, is one of the important *-. de"ices and its most common%y used as permanent stora#e
de"ices in any processor:
a. /ard dis,
b. .ptica% dis,
c. Ma#neto dis,
d. Ma#neto .ptica% dis,
0. *n stora#e de"ices PC ha"e hard dis, ha"in# capacities in the ran#e of 11111:
a. 1!2' to 102'
b. 102' to !32'
c. !32' to 432'
d. 432' to 402'
5. Which dis, is a (.0&inch dis,ette $ith a capacity of 1.++M':
a. Soft dis,
b. 6%oppy dis,
c. 'oth
d. one
7. Which has a %ar#e stora#e capacity of ! to42':
a. Ma#netic tape
b. Ma#netic dis,
c. Soft dis,
d. 6%oppy dis,
4. Which dis, read the data by ref%ectin# pu%ses of %aser beams on the surface:
a. Ma#netic dis,
b. Soft dis,
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c. 6%oppy dis,
d. .ptica% dis,
8. Data access time of optica% dis, "aries from !33 to (03minutes $ith transfer rate of 11111111:
a. 1(39'-s to +339'-s
b. 1(39'-s to 0339'-s
c. 1039'-s to 5339'-s
d. 1039'-s to 4339'-s
13. AD type f%ash memory data stora#e de"ices inte#rated $ith a 1111111 interface:
a. A:M
b. ;A
c. US'
d. D'MS
11. Which dis, is based on the same princip%e as the optica% dis,:
a. .ptica% dis,
b. Ma#netic dis,
c. Ma#neto&optica% dis,
d. A%% of these
1!. WA stands for:
a. Wide area net$or,
b. Word area net$or,
c. Wor%d area net$or,
d. Windo$ area net$or,
1(. :he human&interacti"e *-. de"ices can be further cate#ori<ed as1111:
a. Direct
b. *ndirect
c. 'oth
d. one
1+. *-. de"ices are cate#ori<ed in ! parts are:
a. Character de"ices
b. '%oc, de"ices
c. umera% de"ices
d. 'oth a = b
10. UA>: stands for:
a. Uni"ersa% asynchroni<ation recei"er-transmitter
b. Uni"ersa% asynchronous recei"er-transmitter
c. United asynchronous recei"er-transmitter
d. Uni"ersa% automatic recei"er-transmitter
15. Which are fo%%o$in# pointin# de"ices:
a. ;i#ht pen
b. ?oystic,
c. Mouse
d. A%% of these
17. 6u%% form of ;@D:
a. ;i#ht emittin# diode
b. ;i#ht encounter destination
c. ;i"e emittin# diode
d. one of these
14. *n1111111 mouse $e use pair of ;@D:
a. .ptica%
b. Di#ita%
c. Ana%o#
d. A%% of these
18. 111111is de"ice that is desi#ned for #amin# purposes and based on princip%e of e%ectricity:
a. ?oy
b. Stic,
c. ?oystic,
d. one of these
!3. ?oystic, uses shaft potentiometers for:
a. A&B D*>@C:*.
b. .n%y A direction
c. .n%y B direction
d. A%% of these
!1. 6u%% form of ADC:
a. Ana%o# to di#ita% con"erter
b. Di#ita% to ana%o# con"erter
c. Accumu%ator di#ita% con"erter
d. A%% of these
!!. A system that enab%es computer to reco#ni<e human "oice ca%%ed:
a. Coice system
b. Coice input system
c. *nput system
d. one of these
!(. ! common%y used "oice input systems are:
a. Micro
b. Microphone
c. Coice reco#nition soft$are
d. 'oth b = c
!+. .ptica% scanner de"ices are:
a. M*C>
b. .M>
c. .C>
d. A%% of these
!0. M*C> stands for:
a. Ma#netic in, character reco#nition
b. Ma#netic initiate character reco#nition
c. 'oth a = b
d. one of these
!5. 1111111technique is used in e"a%uatin# obDecti"e ans$er sheets:
a. .ptica% Mar, >eader
b. .ptica% Mar,er >eader
c. .ptica% Mar,er >eadin#
d. A%% of these
!7. 1111111technique he%p in ban,in# sector:
a. .C>
b. .M>
c. M*C>
d. one of these
!4. 111111camera records ima#eE con"erts it into di#ita% format "ia ADC and stores it on a frame buffer:
a. Cideo
b. Without "ideo
c. Audio
d. one of these
!8. Sensors are111111 type of de"ices:
a. *nteracti"e
b. on&interacti"e
c. *nteraction
d. *ntermediate
(3. .utput de"ices common%y referred as:
a. :ermina%s
b. /ost
c. >ecei"ers
d. Senders
(1. :ermina%s c%assified in to ! types are:
a. /ard copy
b. Soft copy
c. 'oth a = b
d. one of these
(!. CDU stands for:
a. Cideo disp%ay unit
b. Cisua% disp%ay unit
c. Cisua% data unit
d. one of these
((. A monitor consists of :
a. A>U
b. '>:
c. C>:
d. A>U
(+. ;CD stands for:
a. ;iquid crysta% disp%ay
b. ;iquid cata%o# disp%ay
c. ;iquid crysta% data
d. ;iquid code disp%ay
(0. :he si<e of monitor ran#es from:
a. 1!&1! inch
b. 1!&!1 inch
c. !1&1! inch
d. !1&11 inch
(5. >an#e of co%or depends on:
a. umber of bits code %ines $ith each pi)e%
b. umber of bits associated $ith each pi)e%
c. umber of instructions associated $ith each pi)e%
d. umber of code associated $ith each pi)e%
(7. Which parameter defines number of times e%ectron beam scans screen in a second:
a. >efresh rate
b. Data transfer rate
c. Pitch rate
d. A%% of these
(4. >efresh rate refresh screen up to:
a. (3 /< per frame
b. (( /< per frame
c. ++ /< per frame
d. !3 /< per frame
(8. Printer speed is 111111pa#es per minute:
a. 1(
b. 1!
c. 11
d. 13
+3. Printer is a:
a. /ardcopy
b. Softcopy
c. 'oth a = b
d. one of these
+1. ;aser printer is type of:
a. *mpact printer
b. on&impact printer
c. 'oth a = b
d. one of these
+!. 111111printer print 1!3 to !33 characters per second:
a. Dot&matri)
b. ;aser
c. ;ine
d. one of these
+(. *n1111111 printin#E each character is printed on the paper by stri,in# a pin or hammer a#ainst an in,ed
ribbon:
a. on&impact printin#
b. *mpact printin#
c. 'oth a = b
d. one of these
++. Dot matri) printer is ! types is:
a. Daisy $hee%s
b. Matri) printer
c. /i#h qua%ity matri) printer
d. 'oth a = c
+0. *n daisy $hee% printer can print +3 character-second and bo%d characters are achie"ed by o"erprintin# the
te)t:
a. 6our times
b. Doub%e
c. .nce
d. :hrice
+5. 1111111printers spray tiny drop%ets of co%oured in,s on the paper and pattern depends on ho$ no<<%e
sprays the in,:
a. *n,Det printer
b. ;aser printer
c. Daisy $hee%
d. Dot matri) printer
+7. ;aser printer is a type of :
a. *mpact printin#
b. on&impact printin#
c. 'oth a = b
d. one of these
+4. 111111are used for printin# bi# chartsE dra$in#sE maps and ( dimensiona% i%%ustrations specia%%y for
architectura% and desi#nin# purposes:
a. Printers
b. P%otters
c. Spea,ers
d. Mouse
+8. DAC stands for:
a. Di#ita% to ana%o# con"erter
b. Ana%o# to di#ita% con"erter
c. .n%y di#ita% con"erter
d. .n%y ana%o# con"erter
03. *n te)t to speechE speech is synthesi<ed usin# %oo,up tab%e of111111 and these c%ubbed to#ether to
form1111111:
a. PhonemesE Words
b. PhonemesE Sentences
c. CharacterE Phonemes
d. WordE Character
01. 111111interface is an entity that contro%s data transfer from e)terna% de"iceE main memory and or CPU
re#isters:
a. *-. interface
b. CPU interface
c. *nput interface
d. .utput interface
0!. :he operatin# mode of *-. de"ices is1111111 for different de"ice:
a. Same
b. Different
c. .ptimum
d. Medium
0(. :o reso%"e prob%ems of *-. de"ices there is a specia% hard$are component bet$een CPU and1111111 to
super"ise and synchroni<e a%% input output transfers:
a. Soft$are
b. /ard$are
c. Periphera%
d. one of these
0+. *-. modu%es are desi#ned $ith aims to:
a. Achie"e de"ice independence
b. /and%e errors
c. Speed up transfer of data
d. /and%e dead%oc,s
e. @nab%e mu%ti&user systems to use dedicated de"ice
f. A%% of these
00. *D@ is a111111111 contro%%er:
a. Dis,
b. 6%oppy
c. /ard
d. one of these
05. *n de"icesE contro%%er is used for111111:
a. 'ufferin# the data
b. Manipu%ate the data
c. Ca%cu%ate the data
d. *nput the data
07. 'y $hich si#na% f%o$ of traffic bet$een interna% and e)terna% de"ices is done:
a. .n%y contro% si#na%
b. .n%y timin# si#na%
c. Contro% and timin# si#na%
d. one of these
04. *n de"ices ! status reportin# si#na%s are:
a. 'USB
b. >@ADB
c. 'oth a = b
d. one of these
08. *-. modu%e must reco#ni<e a111111 address for each periphera% it contro%s:
a. ;on#
b. Same
c. Unique
d. 'i##er
53. @ach interaction b-$ CPU and *-. modu%e in"o%"es:
a. 'us arbitration
b. 'us re"o%ution
c. Data bus
d. Contro% si#na%s
51. Which are + types of commands recei"ed by an interface:
a. Contro%E statusE data outputE data input
b. .n%y data input
c. Contro%E f%a#E data outputE address arbitration
d. Data inputE data outputE status bitE decoder
5!. :$o $ays in $hich computer buses can communicate $ith memory in case of *-. de"ices by usin#:
a. Separate buses for memory and *-. de"ice
b. Common bus for memory and *-. de"ice
c. both a = b
d. none of these
5(. :here are ! $ays in $hich addressin# can be done in memory and *-. de"ice:
a. *so%ated *-.
b. Memory&mapped *-.
c. 'oth a = b
d. one of these
5+. Ad"anta#es of iso%ated *-. are:
a. Common%y usab%e
b. Sma%% number of *-. instructions
c. 'oth a = b
d. one of these
50. *n 1111111 addressin# technique separate address space is used for both memory and *-. de"ice:
a. Memory&mapped *-.
b. *so%ated *-.
c. 'oth a = b
d. one of these
55. 1111111is a sin#%e address space for storin# both memory and *-. de"ices:
a. Memory&mapped *-.
b. *so%ated *-.
c. Separate *-.
d. .ptimum *-.
57. 6o%%o$in# are the disad"anta#es of memory&mapped *-. are:
a. Ca%uab%e memory address space used up
b. *-. modu%e re#ister treated as memory addresses
c. Same machine intersection used to access both memory and *-. de"ice
d. A%% of these
54. Who determine the address of *-. interface:
a. >e#ister se%ect
b. Chip se%ect
c. 'oth a = b
d. one of these
58. ! contro% %ines in *-. interface is:
a. >DE W>
b. >DEDA:A
c. W>E DA:A
d. >DE M@M.>B
73. *n *-. interface >S1 and >S3 are used for se%ectin#:
a. Memory
b. >e#ister
c. CPU
d. 'uffer
71. *f CPU and *-. interface share a common bus than transfer of data b-$ ! units is said to be:
a. Synchronous
b. Asynchronous
c. C%oc, dependent
d. Decoder independent
7!. A%% the operations in a di#ita% system are synchroni<ed by a c%oc, that is #enerated by:
a. C%oc,
b. Pu%se
c. Pu%se #enerator
d. 'us
7(. Asynchronous means:
a. ot in step $ith the e%apse of address
b. ot in step $ith the e%apse of contro%
c. ot in step $ith the e%apse of data
d. ot in step $ith the e%apse of time
7+. 11111111is a sin#%e contro% %ine that informs destination unit that a "a%id is a"ai%ab%e on the bus:
a. Strobe
b. /andsha,in#
c. Synchronous
d. Asynchronous
70. What is disad"anta#e of strobe scheme:
a. o surety that destination recei"ed data before source remo"es it
b. Destination unit transfer $ithout ,no$in# $hether source p%aced data on data bus
c. CanFt said
d. 'oth a = b
75. *n1111111 technique has 1 or more contro% si#na% for ac,no$%ed#ement that is used for intimation:
a. /andsha,in#
b. Strobe
c. 'oth a = b
d. one of these
77. :he ,eyboard has a1111111111 asynchronous transfer mode:
a. Para%%e%
b. Seria%
c. .ptimum
d. one
74. *n 1111111transfer each bit is sent one after the another in a sequence of e"ent and requires Dust one %ine:
a. Seria%
b. Para%%e%
c. 'oth a = b
d. one of these
78. Modes of transfer b-$ computer and *-. de"ice are:
a. Pro#rammed *-.
b. *nterrupt&initiated *-.
c. DMA
d. Dedicated processor such as *.P and DCP
e. A%% of these
43. 111111operations are the resu%ts of *-. operations that are $ritten in the computer pro#ram:
a. Pro#rammed *-.
b. DMA
c. /andsha,in#
d. Strobe
41. 1111111is a dedicated processor that combines interface unit and DMA as one unit:
a. *nput&.utput Processor
b. .n%y input processor
c. .n%y output processor
d. one of these
4!. 111111is a specia% purpose dedicated processor that is desi#ned specia%%y desi#ned for data transfer in
net$or,:
a. Data Processor
b. Data Communication Processor
c. DMA Processor
d. *nterrupt Processor
4(. 111111processor has to chec, continuous%y ti%% de"ice becomes ready for transferrin# the data:
a. *nterrupt&initiated *-.
b. DMA
c. *.P
d. DCP
4+. *nterrupt&dri"en *-. data transfer technique is based on111111 concept:
a. .n demand processin#
b. .ff demand processin#
c. 'oth a = b
d. one of these
40. Which technique he%ps processor to run a pro#ram concurrent%y $ith *-. operations:
a. *nterrupt dri"en *-.
b. DMA
c. *.P
d. DCP
45. ( types of e)ceptions are:
a. *nterrupts
b. :raps
c. System ca%%s
d. A%% of these
47. Which e)ception is a%so ca%%ed soft$are interrupt:
a. *nterrupt
b. System ca%%s
c. :raps
d. A%% of these
44. User pro#rams interact $ith *-. de"ices throu#h:
a. .peratin# system
b. /ard$are
c. Cpu
d. Microprocessor
48. Which tab%e hand%e store address of interrupt hand%in# subroutine:
a. *nterrupt "ector tab%e
b. Cector tab%e
c. Symbo% %in, tab%e
d. one of these
83. Which technique is used that identifies the hi#hest priority resource by means of soft$are:
a. Daisy chainin#
b. Po%%in#
c. Priority
d. Chainin#
81. 11111111interrupt estab%ishes a priority o"er the "arious sources to determine $hich request shou%d be
entertained first:
a. Priority interrupt
b. Po%%in#
c. Daisy chainin#
d. one of these
8!. 11111method is used to estab%ish priority by seria%%y connectin# a%% de"ices that request an interrupt:
a. Po%%in#
b. Daisy chainin#
c. Priority
d. one of these
8(. *n daisy chainin# de"ice 3 $i%% pass si#na% on%y if it has:
a. *nterrupt request
b. o interrupt request
c. 'oth a = b
d. one of these
8+. CAD stands for:
a. Cector address
b. Symbo% address
c. ;in, address
d. one of these
80. 1111111interrupt method uses a re#ister $hose bits are set separate%y by interrupt si#na% for each de"ice:
a. Para%%e% priority interrupt
b. Seria% priority interrupt
c. 'oth a = b
d. one of these
85. 111111re#ister is used $hose purpose is to contro% status of each interrupt request in para%%e% priority
interrupt:
a. Mass
b. Mar,
c. Ma,e
d. Mas,
87. :he ADed output of bits of interrupt re#ister and mas, re#ister are set as input of:
a. Priority decoder
b. Priority encoder
c. Priority decoder
d. Mu%tip%e)er
84. Which ! output bits of priority encoder are the part of "ector address for each interrupt source in para%%e%
priority interrupt:
a. A3 and A1
b. A3 and A!
c. A3 and A(
d. A1 and A!
88. What is the purpose
133. of A3 and A1 output bits of priority encoder in para%%e% priority:
a. :e%% data bus $hich de"ice is to entertained and stored in CAD
b. :e%% subroutine $hich de"ice is to entertained and stored in CAD
c. :e%% subroutine $hich de"ice is to entertained and stored in SAD
d. :e%% pro#ram $hich de"ice is to entertained and stored in CAD
131. When CPU in"o,es a subroutine it performs fo%%o$in# functions:
a. Pushes updated PC contentGreturn addressH on stac,
b. ;oads PC $ith startin# address of subroutine
c. ;oads PC $ith startin# address of A;U
d. 'oth a = b
13!. DMAC stands for:
a. Direct memory access contro%%er
b. Direct memory accumu%ator contro%%er
c. Direct memory access content
d. Direct main access contro%%er
13(. *.P stands for:
a. *nput output processor
13+. DCP stands for:
a. Data communication processor
130. Which may be c%assified as a processor $ith the direct memory access capabi%ity that communicates
$ith *-. de"ices:
a. DCP
b. *.P
c. 'oth
d. one
135. :he processor that communicates $ith remote termina%s %i,e te%ephone or any other seria%
communication media in seria% fashion is ca%%ed 111111:
a. DCP
b. *.P
c. 'oth
d. one
137. *nstruction that are used for readin# from memory by an *.P ca%%ed 1111111:
a. Commands
b. '%oc, dia#ram
c. *nterrupt
d. one of these
134. Data communication $ith a remote de"ice a specia% data communication is used1111111:
a. Mu%tiprocessor
b. Seria% communication
c. DCP
d. *.P
138. C>C stands for:
a. Cyc%ic redundancy chec,
113. Which is used for synchronous dataE P*D is process *DE fo%%o$ed by messa#eE C>C code and @.P
indicatin# end of b%oc,:
a. DCP
b. C>C
c. *.P
d. SBC
111. Which is common%y used in hi#h Ispeed de"ices to rea%i<e fu%% efficiency of communication %in,:
a. :ransmission
b. Synchronous communication
c. Mu%tiprocessor
d. A%% of these
11!. Mu%tiprocessor use 11111111 than t$o CPUs assemb%ed in sin#%e system unit:
a. .ne or More
b. :$o or More
c. .ne or .ne
d. :$o or :$o
11(. Which refers the e)ecution of "arious soft$are process concurrent%y:
a. Mu%tiprocessor
b. Seria% communication
c. DCP
d. *.P
11+. Which is used for this and ,no$n as hi#h speed buffer e)ist $ith a%most each processJ
a. Primary
b. >AM
c. Cache
d. one of these
110. Data and instructions are accessed from %oca% memory and #%oba% memory that is used by11111:
a. *nternet$or,in# faci%ities
b. *nterconnection faci%ities
c. 'oth a = b
d. one of these
115. Mu%tiprocessor uses %ar#e caches but %imited process that shares11111111
a. Memory bus
b. Sin#%e memory bus
c. Doub%e memory bus
d. one of these
117. Distributed are shares a%so referred to as ti#ht%y coup%ed and %oose%y coup%ed mu%tiprocessor
respecti"e%y and hence ca%%ed 1111111111
a. Coup%ed mu%tiprocessor
b. Shared mu%tiprocessor
c. Distributed mu%tiprocessor
d. one of these
114. Which consist if a numbers of processor can be accessed amon# "arious shared memory modu%esJ
a. Coup%ed memory mu%tiprocessor
b. Shared memory mu%tiprocessor
c. Distributed memory mu%tiprocessor
d. one of these
118. Which ,eeps a number of processors in $hich "irtua% stora#e space is assi#ned for redundant
e)ecution:
a. Coup%ed memory mu%tiprocessor
b. Shared memory mu%tiprocessor
c. Distributed memory mu%tiprocessor
d. one of these
1!3. :he memory capacity in system is considered because the connectin# processors are used111111:
a. et$or,
b. *nternet
c. *ntranet
d. one of these
1!1. *ntercrosses arbitration system for mu%tiprocessor shares a 111111111:
a. Primary bus
b. Common bus
c. Domain bus
d. A%% of these
1!!. Which is used to decentra%i<e the decision to a"ai% #reater f%e)ibi%ity to the system that ma,es
processor or microprocessor in a "ery short:
a. Arbitration
b. Centra%i<ed
c. 'oth a = b
d. one of these
1!(. Which is si#na% te%%s that an arbitration of the access bus is possib%e durin# interprocessin#:
a. D'A
b. 'AP
c. 'A
d. one of these
1!+. Which si#na% bus request :
a. 'AP
b. 'A
c. 'A;
d. D'A
1!0. Which si#na% on the bus indicates that request from process arbitration is to be processed:
a. 'A;
b. '>@Q
c. 'M+
d. D'A
1!5. Which si#na% is e)chan#e information by bus:
a. '@C/
b. 'M+
c. 'A;
d. A%% of these
1!7. Which si#na% on bus app%ies K1 to the priority of reso%ution circuits of the arbitration desi#nate a ne$
arbitration:
a. 'M+
b. 'A;
c. 'A
d. D'A
1!4. Which si#na% create ( %ines of bus in $hich si#na%s from the encoded number of processors:
a. 'M1 to 'M(
b. 'A;
c. 'oth
d. one of these
1!8. Which si#na% request the "a%idation si#na% ma,e acti"e if its %o#ic %e"e% is 3 and "a%idate si#na%s from
'M1 to 'M(:
a. 'A;
b. 'M+
c. 'A
d. A%% of these
1(3. Which si#na% represents synchroni<ation si#na% decided by interprocess arbitration $ith a certain
de%ay or si#na% DMA:
a. 'A;
b. 'A
c. 'oth
d. one of these
1(1. *n $hich condition on%y one process ho%ds a resource at a #i"en time:
a. Mutua% e)c%usion
b. /o%d and $ait
c. 'oth
d. one of these
1(!. *n $hich condition one process ho%ds the a%%ocated resources and other $aits for it:
a. o preemption
b. /o%d and $ait
c. Mutua% e)c%usion
d. A%% of these
1((. *n $hich condition resource is not remo"ed from a process ho%din#:
a. Synchroni<ation prob%em
b. o preemption
c. /o%d and $ait
d. one of these
1(+. *n $hich condition busy $aitin#E pro#rammer errorE dead%oc, or circu%ar $ait occurs in
interprocessin#:
a. Synchroni<ation prob%em
b. o preemption
c. /o%d and $ait
d. one of these
1(0. Mechanism can be referred to as addin# a ne$ faci%ity to the system hence ,no$n as 1111111:
a. Process
b. Arbitration
c. 'oth a = b
d. one of these
1(5. Which is a mechanism used by the .S to ensure a systematic sharin# of resources amon#st
concurrent resources:
a. Process synchronous
b. Process system
c. Process synchroni<ation
d. A%% of these
1(7. 111111111 is basica%%y sequence of instructions $ith a c%ear indication of be#innin# and end for
updatin# shared "ariab%es
a. Critica% section
b. @ntry section
c. >emainder section
d. A%% of these
1(4. Which pro"ides a direct hard$are support to mutua% e)c%usion
a. :est&and&setG:SH
b. S$ap instruction
c. Wait instruction
d. Si#na% instruction
1(8. A process $aitin# to enter its critica% section may ha"e to $ait for undu%y1111111:
a. Short time or may ha"e to $ait fore"er
b. ;on# time or may ha"e to $ait fore"er
c. Short time or may ha"e to $ait for %on# time
d. ;on# time or may ha"e to $ait for short time
1+3. Which is a modified "ersion of the :S instruction $hich is desi#ned to remo"e busy& $aitin#:
a. S$ap instruction
b. Wait instruction
c. Si#na% instruction
d. 'oth b = c
1+1. PC' stands for:
a. Process contro% b%oc,
1+!. 1111 #ets acti"ated $hene"er the process encounters a busy condition code:
a. Wait instruction
b. Si#na% instruction
c. 'oth a = b
d. one of these
1+(. 11111 are ne$ and mutua%%y e)c%usi"e operation:
a. Wait instruction
c. 'oth a = b
d. one of these
1++. 1111111 #ets acti"ated $hene"er a process %ea"es the critica% re#ion and the f%a# is set to fa%se:
a. Wait instruction
c. 'oth a = b
d. one of these
1+0. Which represent an abstraction of many important ideas in mutua% e)c%usion:
a. Process synchronous
b. Process system
c. Semaphores
d. A%% of these
1+5. A semaphore is a 111111 inte#er "ariab%e upon $hich t$o atomic operations $ait and si#na% are
defined:
a. e#ati"e inte#er
b. on& e#ati"e inte#er
c. Positi"e inte#er
d. one of these
1+7. Which operation is e)ecuted as soon as a process e)its from a critica% section:
a. Wait
b. Si#na%
c. 'oth a = b
d. one of these
1+4. CC> stands for:
a. Conditiona% critica% re#ion
1+8. 11111111 is a contro% structure in a hi#h&%e"e% pro#rammin# %an#ua#e:
a. CPU
b. A;U
c. DD>
d. CC>
103. :he e)c%usion bet$een processes is ensured by a third semaphore ca%%ed111111:
a. Mute)
b. Mutua%
c. Memory
d. A%% of these
101. 111111 semaphore pro"ides mutua% e)c%usion for accesses to the buffer poo% and is initia%i<ed to the
"a%ue:
a. Mute)
b. Mutua%
c. Memory
d. A%% of these
10!. Which processes access and manipu%ate the shared data concurrent%y:
a. Micro processes
b. Se"era% processes
c. 'oth
d. one of these
10(. Which section is basica%%y a sequence of instruction $ith a c%ear indication of be#innin# and end for
updatin# shared "ariab%es:
a. >acin# section
b. Critica% section
c. 'oth
d. one of these
10+. *n $hich section on%y one process is a%%o$ed to access the shared "ariab%e and a%% other ha"e to $ait:
a. Critica% section
b. >acin# section
c. @ntry section
d. >emainder section
100. Which are the prob%em of critica% section:
a. Mutua% e)c%usion
b. Pro#ress
c. 'ounded $ait
d. A%% of these
105. Which section refer to the code se#ment of a process that is e)ecuted $hen the process intends to
enter its critica% section:
a. Critica% section
b. @ntry section
c. >eminder section
d. one of these
107. Which section refer to the code se#ment $here a shared resource is accessed by the process:
a. >eminder section
b. @ntry section
c. 'oth
d. one of these
104. Which section is the remainin# part of a processFs code:
a. >acin# section
b. Critica% section
c. @ntry section
d. >eminder section
108. /o$ many conditions for contro%%in# access to critica% section:
a. !
b. +
c. (
d. 0
153. Which instruction pro"ides a direct hard$are support to mutua% e)c%usion:
a. SP instruction
b. :S instruction
c. 'oth
d. one of these
151. Which instruction a%so impro"es the efficiency of the system:
a. S$ap instruction
b. :S instruction
c. 'oth
d. one of these
15!. Which instruction a%%o$s on%y one concurrent process to enter the critica% section:
a. >P instruction
b. SP instruction
c. :S instruction
d. one of these
15(. Which section prob%em can be so%"ed simp%y in a uniprocessor en"ironment if the $e are ab%e to
pre"ent the occurrence of interrupt durin# the modification of a shared "ariab%e:
a. @ntry section
b. Critica% section
c. on&critica% section
d. one of these
e.
15+. :he prob%em of readers and $riters $as first formu%ated by 11111111:
a. P.?. Courtois
b. 6./eymans
c. D.;. Parnas
d. A%% of these
150. Which is a situation in $hich some process $ait for each otherFs actions indefinite%y:
a. .peratin# system
b. Dead%oc,
c. Mute)
d. one of these
155. 111111111system hand%es on%y dead%oc,s caused by sharin# of resources in the system:
a. .peratin# system
b. Dead%oc,
c. Mute)
d. one of these
157. A dead%oc,s occurs $hen the ho$ many conditions are met:
a. 1
b. !
c. (
d. +
154. Which are the characteristics of dead%oc,s:
a. Mutua% e)c%usion
b. /o%d and $ait
c. o pre&emption
d. Circu%ar $ait
e. A%% of these
158. >A2 stands for:
a. >esource a%%ocation #raph
173. /o$ many e"ents concernin# >A2 can occur in a system:
a. 1
b. !
c. (
d. +
171. Which are the e"ents concernin# >A2 can occur in a system:
a. >equest for a resource
b. A%%ocation of a resource
c. >e%ease of resource
d. A%% of these
17!. /o$ many methods for hand%in# dead%oc,s:
a. 1
b. !
c. (
d. +
17(. Which are the method for hand%in# dead%oc,s:
a. Dead%oc, pre"ention
b. Dead%oc, a"oidance
c. Dead%oc, detection
d. A%% of these
17+. /o$ many condition that shou%d be met in order to produce a dead%oc,:
a. !
b. +
c. 5
d. 4
170. Which are the condition that shou%d be met in order to produce a dead%oc,:
a. Mutua% e)c%usion
b. /o%d and Wait
c. o preemption
d. Circu%ar $ait
e. A%% of these
175. *n protoco% each process can ma,e a request on%y in an 11111111:
a. *ncreasin# order
b. Decreasin# order
c. 'oth a = b
d. one of these
177. *n protoco% abo"e mentioned 11111111protoco% are used then the circu%ar $ait&condition can not
ho%d:
a. 1
b. !
c. (
d. +
174. Which state refers to a state that is not safe not necessari%y a dead%oc,ed state:
a. Safe state
b. Unsafe state
c. 'oth a = b
d. one of these
178. 11111111 a direct arro$ is dra$n from the process to the resource rectan#%e to represent each
pendin# resource request:
a. :S
b. SP
c. CC>
d. >A2
143. :he attributes of a fi%e are:
a. ame
b. *dentifier
c. :ypes
d. ;ocation
e. Si<e
f. Protection
#. :imeE date and user identification
h. A%% of these
141. :he "arious fi%e operation are:
a. Cratin# a fi%e
b. Writin# a fi%e
c. >eadin# a fi%e
d. >epositionin# $ithin a fi%e
e. De%etin# a fi%e truncatin# a fi%e
f. A%% of these
14!. Which operations are to be performed on a directory are:
a. Search for a fi%e
b. Create a fi%e
c. De%ete a fi%e
d. ;ist a directory
e. >ename a fi%e
f. :ra"erse the fi%e system
#. A%% of these
14(. Which memory is assemb%ed bet$een main memory and CPU:
a. Primary memory
b. Cache memory
c. 'oth a = b
d. one of these
14+. Which is considered as semi&conductor memory E $hich is made up of static >AM:
a. Primary memory
b. Cache memory
c. 'oth a = b
d. one of these
140. Which is one of the important *-. de"ices and is most common%y used as permanent stora#e de"ice
in any processor:
a. Soft dis,
b. /ard dis,
c. 'oth a = b
d. one of these
145. 111111 can read any printed character by comparin# the pattern that is stored in the computer:
a. SP
b. CC>
c. >A2
d. .C>
147. Which system is a typica% e)amp%e of the readers and $riters prob%em:
a. Air%ine reser"ation system
b. Airport reser"ation system
c. 'oth
d. one of these
144. Which %oc, can arise $hen t$o processes $ait for phone ca%%s from one another:
a. Spine %oc,
b. Dead %oc,
c. 'oth
d. one of these
148. Which %oc, is more serious than indefinite postponement or star"ation because it affect more than
one Dob:
a. Dead%oc,
b. Spine%oc,
c. 'oth
d. one of these
1. A number system that uses on%y t$o di#itsE 3 and 1 is ca%%ed the11111111111:
a. .cta% number system
b. 'inary number system
c. Decima% number system
d. /e)adecima% number system
!. *n $hich computersE the binary number are represented by a set of binary stora#e de"ice such as f%ip f%op:
a. Microcomputer
b. Persona% computer
c. Di#ita% computer
d. A%% of these
(. A binary number can be con"erted into 111111111:
a. 'inary number
b. .cta% number
c. Decima% number
d. /e)adecima% number
+. Which system is used to refer amount of thin#s:
a. umber system
b. umber $ords
c. umber symbo%s
d. A%% of these
0. 111111111are made $ith some part of bodyE usua%%y the hands:
a. umber $ords
b. umber symbo%s
c. umber #estures
d. A%% of these
5. 1111111111are mar,ed or $ritten do$n:
a. umber system
b. umber $ords
c. umber symbo%s
d. umber #estures
7. A number symbo% is ca%%ed a 11111111111:
a. Arabic numera%s
b. umera%s
c. 'oth
d. one of these
4. 3E1E! E( E+E0E5 E7E4 and 8 numera%s are ca%%ed:
a. Arabic numera%s
b. Strin# numera%s
c. Di#it numera%s
d. one of these
8. /o$ many system of arithmeticE $hich are often used in di#ita% system:
a. 0
b. 5
c. (
d. +
13. Which are the system of arithmeticE $hich are often used in di#ita% system:
a. 'inary di#it
b. Decima% di#it
c. /e)adecima% di#it
d. .cta% di#it
e. A%% of these
11. *n any systemE there is an ordered set of symbo%s a%so ,no$n as11111111111:
a. Di#ita%
b. Di#it
c. 'oth
d. one of these
1!. Which is #enera% has t$o parts in number system:
a. *nte#er
b. 6raction
c. 'oth
d. one of these
1(. MSD stand for:
a. Most si#nificant di#it
b. Many si#nificant di#it
c. 'oth a and b
d. one of these
1+. ;SD stand for:
a. ;ess si#nificant di#it
b. ;east si#nificant di#it
c. ;oss si#nificant di#it
d. one of these
10. :he 11111 and 11111111 of a number is defined as the number of different di#its $hich can occur in each
position in the system:
a. 'ase
b. >adi)
c. 'oth
d. one of these
15. Which system has a base or radi) of 13:
a. 'inary di#it
b. /e)adecima% di#it
c. Decima% di#it
d. .cta% di#it
17. @ach of the ten decima% di#its1111111111:
a. 1 throu#h 13
b. 3 throu#h 8
c. ! throu#h 11
d. A%% of these
14. :he binary number system is a%so ca%%ed a 1111111111:
a. 'ase one system
b. 'ase t$o system
c. 'ase system
d. 'inary system
18. :he t$o symbo%s 3 and 1 are ,no$n as:
a. 'ytes
b. 'its
c. Di#it
d. A%% of these
!3. *n $hich countin#E sin#%e di#it are used for none and one:
a. Decima% countin#
b. .cta% countin#
c. /e)adecima% countin#
d. 'inary countin#
!1. *n $hich numera% e"ery position has a "a%ue ! times the "a%ue f the position to its ri#ht:
a. Decima%
b. .cta%
c. /e)adecima%
d. 'inary
!!. A binary number $ith + bits is ca%%ed a111111111:
a. 'it
b. 'ytes
c. ibb%e
d. one of these
!(. A binary number $ith 4 bits is ca%%ed as a11111111111:
a. 'ytes
b. 'its
c. ibb%e
d. A%% of these
!+. *n $hich di#it the "a%ue increases in po$er of t$o startin# $ith 3 to %eft of the binary point and decreases
to the ri#ht of the binary point startin# $ith po$er &1:
a. /e)adecima%
b. Decima%
c. 'inary
d. .cta%
!0. Which system is used in di#ita% computers because a%% e%ectrica% and e%ectronic circuits can be made to
respond to the states concept:
a. /e)adecima% number
b. 'inary number
c. .cta% number
d. Decima% number
!5. Which addition is performed in the same manner as decima% addition:
a. 'inary
b. Decima%
c. 'oth
d. one of these
!7. 111111in a%% di#ita% systems actua%%y performs addition that can hand%e on%y t$o number at a time:
a. >e#ister
b. circuit
c. di#ita%
d. A%% of these
!4. Which machine can perform addition operation in %ess than 1 ms:
a. Di#ita% machine
b. @%ectronic machine
c. 'oth
d. one of these
!8. 11111111is the in"erse operation of addition:
a. Addition
b. Mu%tip%y
c. Subtraction
d. Di"ide
(3. 11111111of a number from another can be accomp%ished by addin# the comp%ement of the subtrahend to
the minuend:
a. Subtraction
b. Mu%tip%y
c. Di"ide
d. A%% of these
(1. Comp%ement the subtrahend by con"ertin# a%% 1111111111and a%% 1111111111:
a. 1Fs to 3Fs
b. 3Fs to 1Fs
c. 'oth
d. one of these
(!. @ach de"ice represent :
a. 1 bit
b. ! bit
c. ( bit
d. + bit
((. A 3 in the si#n bit represents a 1111111111111 and a 1 in the si#n bit represents a 111111111111:
a. Positi"e number
b. e#ati"e number
c. 'oth
d. one of these
(+. /o$ many main si#n number binary codes are used:
a. +
b. 0
c. (
d. 5
(0. Which are the types of binary codes number:
a. Si#n ma#nitude
b. 1Fs comp%ement code
c. !Fs comp%ement code
d. A%% of these
(5. /o$ many types of addition in the !Fs comp%ement system:
a. (
b. +
c. 0
d. 5
(7. Which are the types of addition in the !Fs comp%ement system:
a. 'oth number positi"e
b. A Positi"e number and a sma%%er ne#ati"e number
c. A ne#ati"e number and a sma%%er positi"e number
d. 'oth number ne#ati"e
e. A%% of these
(4. /o$ many important ideas to notice about these odometer readin#s:
a. 1
b. !
c. (
d. +
(8. Which are the types of important ideas to notice about these odometer readin#s:
a. :he MS' is the si#n bit :3 for a Ksi#n and 1 for a I si#n
b. :he ne#ati"e number represent the !Fs comp%ement of the positi"e number
c. 'oth
d. A%% of these
+3. Which is an a%#orithm or techniques used to mu%tip%y t$o numbers:
a. Addition a%#orithm
b. Subtraction a%#orithm
c. Mu%tip%ication a%#orithm
d. A%% of these
+1. Which a%#orithm are used dependin# on the si<e of the numbers:
a. Simp%e a%#orithm
b. Specific a%#orithm
c. 'oth
d. one of these
+!. Which a%#orithm is named after Co%,er Strassen:
a. Strassen a%#orithm
b. Matri) a%#orithm
c. 'oth
d. one of these
+(. Strassen a%#orithm $as pub%ished in 11111111111:
a. 1857
b. 1858
c. 1847
d. 1843
++. Which a%#orithm is used for matri) mu%tip%ication:
a. Simp%e a%#orithm
c. Strassen a%#orithm
d. Addition a%#orithm
+0. Which a%#orithm is a di"ided and conquer a%#orithm that is asymptotica%%y faster:
a. Simp%e a%#orithm
c. Strassen a%#orithm
d. Addition a%#orithm
+5. Which method required 4 mu%tip%ication and + addition:
a. Mu%tip%ication
b. Usua% mu%tip%ication
c. 'oth
d. one of these
+7. Which a%#orithm is a mu%tip%ication a%#orithm $hich mu%tip%ies t$o si#ned binary numbers in !Fs
comp%ement notation:
a. Usua% mu%tip%ication
b. 'oothFs mu%tip%ication
c. 'oth
d. one of these
+4. Which a%#orithm inc%udes repeated addition of t$o predetermined "a%ues A and S to a product P and then
performs a ri#ht$ard arithmetic shift on P:
a. 'oothFs a%#orithm
b. Usua% a%#orithm
c. Mu%tip%ication a%#orithm
d. one of these
+8. Which a%#orithm in mathematics e)presses the outcome of the process of di"ision of inte#ers by another:
a. Addition a%#orithm
b. Mu%tip%ication a%#orithm
c. Di"ision a%#orithm
d. one of these
03. Which a%#orithm is used to find 2CD of t$o inte#ers:
a. Mu%tip%ication a%#orithm
b. Di"ision a%#orithm
c. Addition a%#orithm
d. Simp%e a%#orithm
01. Which a%#orithm is used as a #enera% "ariant of a theoremsE in the domain of inte#ra% numbers:
a. Mu%tip%ication a%#orithm
b. Di"ision a%#orithm
c. Addition a%#orithm
d. Simp%e a%#orithm
0!. /o$ many main approaches to a%#orithm for di"ision:
a. !
b. (
c. +
d. 0
0(. /o$ many a%#orithm based on add-subtract and shift cate#ory:
a. !
b. +
c. (
d. 5
0+. Which are the a%#orithm based on add-subtract and shift cate#ory:
a. >estorin# di"ision
b. on&restorin# di"ision
c. S>: di"ision
d. A%% of these
00. Se"era% methods for con"ertin# a 11111111111:
a. Decima% number to a binary number
b. 'inary number to a decima% number
c. .cta% number to a decima% number
d. /e)adecima% number to a binary number
05. A popu%ar method ,no$s as doub%e&dabb%e method a%so ,no$s as 111111111:
a. Di"ided&by&one method
b. Di"ided&by&t$o method
c. 'oth
d. one of these
07. Which method is used to con"ert a %ar#e decima% number into its binary equi"a%ent:
a. Doub%e dabb%e method
b. Di"ided&by&t$o&method
c. 'oth
d. one of these
04. *n this methodE the decima% number is 111111111:
a. >epeated%y di"ided by +
b. >epeated%y di"ided by !
c. >epeated%y di"ided by 1
d. one of these
08. :he con"ersion of decima% fraction to binary fraction may be accomp%ished by usin# 11111111111:
a. Se"era% techniques
b. Simp%e techniques
c. 'oth
d. one of these
53. Which system $as used e)tensi"e%y by ear%y mini computers:
a. Decima% number
b. .cta% number
c. /e)adecima% number
d. 'inary number
51. ( bit binary numbers can be represented by 111111111111:
a. 'inary number
b. Decima% number
d. .cta% number
5!. A number system that uses ei#ht di#itsE3E1E!E(E+E0E5E and 7 is ca%%ed an 11111111:
a. 'inary number system
b. Decima% number system
c. .cta% number system
d. one of these
5(. Which system each di#it has a $ei#ht correspondin# to its position:
a. /e)adecima% number system
b. 'inary number system
d. .cta% number system
5+. Which odometer is a hypothetica% de"ice simi%ar to the odometer of a car:
a. 'inary
b. Decima%
c. /e)adecima%
d. .cta%
50. An 1111111111can be easi%y con"erted to its decima% equi"a%ent by mu%tip%yin# each octa% di#it by
positiona% $ei#ht:
a. 'inary number
b. .cta% number
d. Decima% number
55. :he simp%e procedure is to use 11111111111 :
a. 'inary&trip%et method
b. Decima%&trip%et method
c. .cta%&trip%et method
d. A%% of these
57. Which system #roups number by si)teen and po$er of si)teen:
a. 'inary
b. /e)adecima%
c. .cta%
d. one of these
54. Which number are used e)tensi"e%y in microprocessor $or,:
a. .cta%
b. /e)adecima%
c. 'oth
d. one of these
58. Which number is formed from a binary number by #roupin# bits in #roups of +&bit each startin# at the
binary point:
a. 'inary
b. .cta%
c. Decima%
d. /e)adecima%
73. Which number system has a base of 15 :
a. 'inary number system
b. .cta% number system
d. /e)adecima% number system
71. Countin# in he)E each di#it can be increment from1111111111:
a. 3 to 6
b. 3 to 2
c. 3 to /
d. 3 to ?
7!. Which number can be con"erted into binary numbers by con"erted each he)adecima% di#it to + bits binary
equi"a%ent usin# the code:
a. 'inary number
b. Decima% number
c. .cta% number
d. /e)adecima% number
7(. .ne $ay to con"ert from decima% to he)adecima% is the 111111111:
a. Doub%e dabb%e method
b. /e) dabb%e method
c. 'inary dabb%e method
d. A%% of these
7+. 'inary numbers can a%so be e)pressed in this same notation by 111111111representation:
a. 6%oatin# point
b. 'inary point
c. Decima% point
d. A%% of these
70. /o$ many parts of f%oatin# point representation of a number consists:
a. +
b. !
c. (
d. 0
75. :he first part of f%oatin# point represents a si#ned fi)ed point number ca%%ed:
a. @)ponent
b. Di#it
c. umber
d. Mantissa
77. :he second part of f%oatin# point desi#nates the position of the decima% point and is ca%%ed:
a. Mantissa
b. 'inomia%
c. .cta%
d. @)ponent
74. :he fi)ed point mantissa may be 1111111or1111111111:
a. 6raction
b. *nte#er
c. 'oth
d. one of these
78. :he number of bit required to e)press111111111 and 1111111 are determined by the accuracy desired from
the computin# system :
a. @)ponent
b. Mantissa
c. 'oth
d. one f these
43. Which part is not physica%%y indicated in the re#ister:
a. 'inary
b. Decima%
c. .cta%
d. one of these
e.
41. :he e)ponent contains the decima% number :
a. K30
b. K3(
c. K3+
d. K37
4!. :he first or the inte#er part is ,no$n as11111111:
a. @)ponent
b. *nte#er
c. 'inomia%
d. one of these
4(. /o$ many bits of mantissa :
a. +
b. 4
c. 13
d. 15
4+. /o$ many bit of e)ponent:
a. +
b. 5
c. 4
d. 13
40. Which number is said to be norma%i<ed if the more si#nificant position of the mantissa contains a non <ero
di#it:
a. 'inary point number
b. Mantissa point number
c. 6%oatin# point number
d. one of these
45. Which operation $ith f%oatin# point numbers are more comp%icated then arithmetic operation $ith fi)ed
point number :
a. ;o#ica% operation
b. Arithmetic operation
c. 'oth
d. one of these
1. 11111 is a command #i"en to a computer to perform a specified operation on some #i"en data:
a. An instruction
b. Command
c. Code
d. one of these
!. An instruction is #uided by11111 to perform $or, accordin#:
a. PC
b. A;U
c. 'oth a and b
d. CPU
(. :$o important fie%ds of an instruction are:
a. .pcode
b. .perand
c. .n%y a
d. 'oth a = b
+. @ach operation has its 11111 opcode:
a. Unique
b. :$o
c. :hree
d. 6our
0. $hich are of these e)amp%es of *nte% 4345 opcodes:
a. M.C
b. ADD
c. SU'
d. A%% of these
5. 1111111specify $here to #et the source and destination operands for the operation specified by the
1111111:
a. .perand fie%ds and opcode
b. .pcode and operand
c. Source and destination
d. Cpu and memory
7. :he source-destination of operands can be the1111111 or one of the #enera%&purpose re#ister:
a. Memory
b. .ne
c. both
d. one of these
4. :he comp%ete set of op&codes for a particu%ar microprocessor defines the111111 set for that processor:
a. Code
b. 6unction
c. Modu%e
d. *nstruction
8. Which is the method by $hich instructions are se%ected for e)ecution:
a. *nstruction se%ection
b. Se%ection contro%
c. *nstruction sequencin#
d. A%% of these
13. :he simp%est method of contro%%in# sequence of instruction e)ecution is to ha"e each instruction e)p%icit%y
specify:
a. :he address of ne)t instruction to be run
b. Address of pre"ious instruction
c. 'oth a = b
d. one of these
11. As the instruction %en#th increases 11111111 of instruction addresses in a%% the instruction is1111111:
a. *mp%icit inc%usion
b. *mp%icit and disad"anta#eous
c. @)p%icit and disad"anta#eous
d. @)p%icit and disad"anta#eous
1!. 111111is the sequence of operations performed by CPU in processin# an instruction:
a. @)ecute cyc%e
b. 6etch cyc%e
c. Decode
d. *nstruction cyc%e
1(. :he time required to comp%ete one instruction is ca%%ed:
a. 6etch time
b. @)ecution time
c. Contro% time
d. A%% of these
1+. 11111is the step durin# $hich a ne$ instruction is read from the memory:
a. Decode
b. 6etch
c. @)ecute
d. one of these
10. 11111111is the step durin# $hich the operations specified by the instruction are e)ecuted:
a. @)ecute
b. Decode
c. 'oth a= b
d. one of these
15. Decode is the step durin# $hich instruction is111111:
a. *nitia%i<ed
b. *ncremented
c. Decoded
d. 'oth b = c
17. :he instruction fetch operation is initiated by %oadin# the contents of pro#ram counter into the111111 and
sends11111 request to memory:
a. Memory re#ister and read
b. Memory re#ister and $rite
c. Data re#ister and read
d. Address re#ister and read
14. :he contents of the pro#ram counter is the 1111111 of the instruction to be run:
a. Data
b. Address
c. Counter
d. one of these
18. :he instruction read from memory is then p%aced in the1111111 and contents of pro#ram counter is111111
so that it contains the address of1111111 instruction in the pro#ram:
a. Pro#ram counterE incremented and ne)t
b. *nstruction re#isterE incremented and pre"ious
c. *nstruction re#isterE incremented and ne)t
d. Address re#isterE decremented and ne)t
!3. @)ecution of instruction specified by instruction to perform:
a. .peration
b. .perands
c. 'oth a = b
d. one of these
!1. 1111111 is a symbo%ic representation of discrete e%ements of information:
a. Data
b. Code
c. Address
d. Contro%
!!. 2roup of binary bitsG3=1H is ,no$n as:
a. 'inary code
b. Di#it code
c. Symbo%ic representation
d. one of these
!(. A #roup of + binary bits is ca%%ed:
a. ibb%e
b. 'yte
c. Decima%
d. Di#it
!+. 'CD uses binary number system to specify decima% numbers:
a. 1&13
b. 1&8
c. 3&8
d. 3&13
!0. :he 111111 are assi#ned accordin# to the position occupied by di#its:
a. Co%ume
b. Wei#ht
c. Mass
d. A%% of these
!5. $hat is the 'CD for a decima% number 008:
a. L3131 3131 1331M
'CD
b. L3131 3331 1313M
c. L3131 1331 1331M
d. L1331 1313 3131M
!7. 11111111are the codes that represent a%phabetic charactersE punctuation mar,s and other specia%
characters:
a. A%phanumeric codes
b. ASC** codes
c. @'CD*C codes
d. A%% of these
!4. Abbre"iation ASC** stands for:
a. American standard code for information interchan#e
b. Abbre"iation standard code for information interchan#e
c. 'oth
d. one of these
!8. /o$ many bit of ASC** code:
a. 5
b. 7
c. 0
d. 4
(3. Which code used in transferrin# coded information from ,eyboards and to computer disp%ay and printers:
a. ASC**
b. @'CD*C
c. 'oth
d. one of these
(1. Which code used to represent numbersE %ettersE punctuation mar,s as $e%% as contro% characters:
a. ASC**
b. @'CD*C
c. 'oth
d. one of these
(!. abbre"iation @'CD*C stand for:
a. @)tended binary coded decima% interchan#e code
b. @)terna% binary coded decima% interchan#e code
c. @)tra binary coded decima% interchan#e code
d. one of these
((. /o$ many bit of @'CD*C code:
a. 7
b. 4
c. 0
d. 8
(+. Which code the decima% di#its are represented by the 4+!1 'CD code preceded by 1111:
a. ASC**
b. @'CD*C
c. 'oth
d. one of these
(0. 111111111 has the property that corruptin# or #arb%in# a code $ord $i%% %i,e%y produce a bit strin# that is
not a code $ord:
a. @rror de%etin# codes
b. @rror detectin# codes
c. @rror strin# codes
d. one of these
(5. Which is method used most simp%e and common%y:
a. Parity chec, method
b. @rror detectin# method
c. 'oth
d. one of these
(7. Which is the method of parity:
a. @"en parity method
b. .dd parity method
c. 'oth
d. one of these
(4. :he abi%ity of a code to detect sin#%e errors can be stated in term of the 111111111:
a. Concept of distance
b. @"en parity
c. .dd parity
d. one of these
(8. :he first n bit of a code $ord ca%%ed 1111111111 may be any of the !
n
n& bit strin# minimum error bit:
a. *nformation bits
b. Strin# bits
c. @rror bits
d. A%% of these
+3. A code in $hich the tota% number of 1s in a "a%id GnK1H bit code $ord is e"enE this is ca%%ed an 1111111111:
a. @"en parity code
b. .dd parity code
c. 'oth
d. one of these
+1. A code in $hich the tota% number of 1s in a "a%id GnK1Hbit code $ord is odd and this code is ca%%ed
an1111111111:
a. @rror detectin# code
b. @"en parity code
c. .dd parity code
d. one of these
+!. a code is simp%y a subset of the "ertices of the 11111:
a. n bit
b. n cube
c. n sin#%e
d. n doub%e
+(. Which method is used to detect doub%e errors and pinpoint erroneous bits:
a. @"en parity method
b. .dd parity method
c. Chec, sum method
d. A%% of these
++. A code that is used to correct error is ca%%ed an 111111111:
a. @rror detectin# code
b. @rror correctin# code
c. 'oth
d. one of these
+0. A recei"ed 11111111111$ith a bit error $i%% be c%oser to the ori#ina%%y transmitted code $ord than to any
other code $ord:
a. Code $ord
b. on code $ord
c. Decodin#
d. A%% of these
+5. Which code $ord $as ori#ina%%y transmitted to produce a recei"ed $ord is ca%%ed:
a. on code $ord
b. Code $ord
c. Decodin#
d. one of these
+7. :he hard$are that does this is an 11111111:
a. @rror detectin# decoder
b. @rror correctin# decoder
c. 'oth
d. one of these
+4. /ammin# codes $as de"e%oped in 1111111111:
a. 180(
b. 1803
c. 18+0
d. 1805
+8. 111111111111 bet$een t$o code $ords is defined as the number of bits that must be chan#ed for one code
to another:
a. /ammin# codes
b. /ammin# distance
c. 'oth
d. one of these
03. *t is actua%%y a method for constructin# codes $ith a minimum distance of 1111:
a. !
b. +
c. (
d. 0
01. :he bit position in a 11111111111 can be numbered from 1 throu#h !
i
&1:
a. /ammin# code $ord
b. /ammin# distance $ord
c. 'oth
d. one of these
0!. @ach chec, bit is #rouped $ith the information bits as specified by a111111111111:
a. Parity chec, code
b. Parity chec, matri)
c. Parity chec, bit
d. A%% of these
0(. :he pattern of #roups that ha"e odd parity ca%%ed the 111111111must match one of the of co%umns in the
parity chec, matri):
a. Syndrome
b. Dynodes
c. 'oth
d. one of these
0+. Which are desi#ned to interpret a specified number of instruction code:
a. Pro#rammer
b. Processors
c. *nstruction
d. .pcode
00. Which code is a strin# of binary di#its:
a. .p code
b. *nstruction code
c. Parity code
d. .perand code
05. :he %ist of specific instruction supported by the CPU is termed as its 111111111111:
a. *nstruction code
b. Parity set
c. *nstruction set
d. one of these
07. 1111111111is di"ided into a number of fie%ds and is represented as a sequence of bits:
a. instruction
b. instruction set
c. instruction code
d. parity code
04. Which unit is necessary for the e)ecution of instruction:
a. :imin#
b. Contro%
c. 'oth
d. one of these
08. Which unit pro"ide status E timin# and contro% si#na%:
a. :imin# and contro% unit
b. Memory unit
c. Chace unit
d. one of these
53. Which unit acts as the brain of the computer $hich contro% other periphera%s and interfaces:
a. Memory unit
b. Cache unit
c. :imin# and contro% unit
d. one of these
51. *t contains the 111111111111stac, for PC stora#e durin# subroutine ca%%s and input-output interrupt
ser"ices:
a. Se"en& %e"e% hard$are
b. @i#ht& %e"e% hard$are
c. .ne& %e"e% hard$are
d. :hree& %e"e% hard$are
5!. Which unit $or,s as an interface bet$een the processor and a%% the memories on chip or off& chip:
a. :imin# unit
b. Contro% unit
c. Memory contro% unit
d. A%% of these
5(. :he ma)imum c%oc, frequency is1111111:
a. +0 M/N
b. 03 M/N
c. 0! M/N
d. 54 M/N
5+. 11111111 is #i"en an instruction in machine %an#ua#e this instruction is fetched from the memory by the
CPU to e)ecute:
a. A;U
b. CPU
c. MU
d. A%% of these
50. Which cyc%e refers to the time period durin# $hich one instruction is fetched and e)ecuted by the CPU:
a. 6etch cyc%e
b. *nstruction cyc%e
c. Decode cyc%e
d. @)ecute cyc%e
55. /o$ many sta#es of instruction cyc%e:
a. 0
b. 5
c. +
d. 7
57. Which are sta#es of instruction cyc%e:
a. 6etch
b. Decode
c. @)ecute
d. Deri"e effecti"e address of the instruction
e. A%% of these
54. Which instruction are (! bits %on# E $ith e)tra 15 bits:
a. Memory reference instruction
b. Memory reference format
c. 'oth
d. one of these
58. Which is addressed by si#n e)tendin# the 15&bit disp%acement to (!&bit:
a. Memory address
b. @ffecti"e memory address
c. 'oth a and b
d. one of these
73. Which are instruction in $hich t$o machine cyc%e are required:
a. *nstruction cyc%e
b. Memory reference instruction
c. 'oth
d. one of these
71. Which instruction are used in mu%tithreaded para%%e% processor architecture:
c. 'oth
d. one of these
7!. Which instruction are arran#ed as per the protoco%s of memory reference format of the input fi%e in a
simp%e ASC** sequence of inte#ers bet$een the ran#e 3 to 88 separated by spaces $ithout formatted te)t and
symbo%s:
c. 'oth
d. one of these
7(. 111111111111 is an e)terna% hard$are e"ent $hich causes the CPU to interrupt the current instruction
sequence:
a. *nput interrupt
b. .utput interrupt
c. 'oth
d. one of these
7+. *S> stand for:
a. *nterrupt sa"e routine
b. *nterrupt ser"ice routine
c. *nput sta#es routine
d. A%% of these
70. Which interrupt ser"ices sa"e a%% the re#ister and f%a#s:
a. Sa"e interrupt
b. *nput-output interrupt
c. Ser"ice interrupt
d. A%% of these
75. *>@: stand for:
a. *nterrupt enter
b. *nterrupt return
c. *nterrupt de%ete
d. one of these
77. Which are benefit of input-output interrupt:
a. *t is an e)terna% ana%o#y to e)ceptions
b. :he processor initiates and perform a%% *-. operation
c. :he data is transferred into the memory throu#h interrupt hand%er
d. A%% of these
74. Which are the not causes of the interrupt:
a. *n any sin#%e de"ice
b. *n processor po%% de"ices
c. *t is an e)terna% ana%o#y to e)ception
d. one of these
78. Which are the causes of the interrupt:
a. *n any sin#%e de"ice
b. *n processor po%% de"ices
c. *n a de"ice $hose *D number is stored on the address bus
d. A%% of these
43. Which are the functionin# of *-. interrupt:
a. :he processor or#ani<es a%% the *-. operation for smooth functionin#
b. After comp%etin# the *-. operation the de"ice interrupt the processor
c. 'oth
d. one of these
41. 111111111$ith $hich computers perform is $ay beyond human capabi%ities:
a. Speed
b. Accuracy
c. Stora#e
d. Cersati%ity
4!. 111111111 of a computer is consistent%y:
a. Speed
b. Accuracy
c. Stora#e
d. Cersati%ity
4(. 2*2. stand for:
a. 2arba#e&in&#arba#e&out
b. 2arba#e&in #arba#e&occur
c. 'oth
d. one of these
4+. /o$ many basic operations of "ersati%ity:
a. 0
b. 5
c. +
d. 7
40. Which are the operation of "ersati%ity:
a. e)chan#e of information $ith the outside $or%d "ia *-. de"ice
b. :ransfer of data interna%%y $ith in the centra% processin# unit
c. Performs of the basic arithmetic operations
d. A%% of these
45. 111111111111 of information in a human brain and a computer happens different%y:
a. *nte%%i#ence
b. Stora#e
c. Cersati%ity
d. Di%i#ence
47. Which are the basic operation for con"ertin#:
a. *nputtin#
b. Storin#
c. Processin#
d. .utputtin#
e. Contro%%in#
f. A%% of these
44. :he contro% unit and arithmetic %o#ic unit are ,no$ as the 11111111111:
a. Centra% pro#ram unit
b. Centra% processin# unit
c. Centra% primary unit
d. one of these
48. Which unit is comparab%e to the centra% ner"ous system in the human body:
a. .utput unit
b. Contro% unit
c. *nput unit
d. A%% of these
83. 11111111111 of the primary memory of the computer is %imited:
a. Stora#e capacity
b. Ma#netic dis,
c. 'oth
d. one of these
81. *nformation is hand%ed in the computer by 111111111:
a. @%ectrica% di#it
b. @%ectrica% component
c. @%ectronic bit
d. one of these
8!. 3 and 1 are ,no$ as 11111111111:
a. 'yte
b. 'it
c. Di#its
d. Component
8(. 3 and 1 abbre"iation for:
a. 'inary di#it
b. .cta% di#it
c. 'oth
d. one of these
8+. /o$ many bit of nibb%e #roup:
a. 0
b. +
c. 7
d. 4
80. /o$ many bit of bytes:
a. (
b. +
c. 5
d. 4
85. Which is the most important component of a di#it computer that interprets the instruction and processes
the data contained in computer pro#rams:
a. MU
b. A;U
c. CPU
d. PC
87. Which part $or, as a the brain of the computer and performs most of the ca%cu%ation:
a. MU
b. PC
c. A;U
d. CPU
84. Which is the main function of the computer:
a. @)ecute of pro#rams
b. @)ecution of pro#rams
c. 'oth
d. one of these
88. /o$ many maDor component ma,e up the CPU:
a. +
b. (
c. 5
d. 4
133. Which re#ister ho%ds the current instruction to be e)ecuted:
a. *nstruction re#ister
b. Pro#ram re#ister
c. Contro% re#ister
d. one of these
131. Which re#ister ho%ds the ne)t instruction to be e)ecuted:
b. Pro#ram re#ister
c. Pro#ram contro% re#ister
d. one of these
13!. @ach instruction is a%so accompanied by a11111111111:
a. Microprocessor
b. Microcode
c. 'oth
d. one of these
13(. Which are microcomputers common%y used for commercia% data processin#E des,top pub%ishin# and
en#ineerin# app%ication:
a. Di#ita% computer
b. Persona% computer
c. 'oth
d. one of these
13+. Which microprocessor has the contro% unitE memory unit and arithmetic and %o#ic unit:
a. Pentium *C processor
b. Pentium C processor
c. Pentium *** processor
d. one of these
130. :he processin# speed of a computer depends on the 1111111111of the system:
a. C%oc, speed
b. Motoro%a
c. Cyri)
d. one of these
135. Which microprocessor is a"ai%ab%e $ith a c%oc, speed of 1.5 2/N:
a. Pentium ***
b. Pentium **
c. Pentium *C
d. A%% of these
137. Which processor are used in the most persona% computer:
a. *nte% corporationFs Pentium
b. Motoro%a corporationFs
c. 'oth
d. one of these
1. >:; stands for:
a. >andom transfer %an#ua#e
b. >e#ister transfer %an#ua#e
c. Arithmetic transfer %an#ua#e
d. A%% of these
!. Which operations are used for additionE subtractionE incrementE decrement and comp%ement function:
a. 'us
b. Memory transfer
c. Arithmetic operation
d. A%% of these
(. Which %an#ua#e is termed as the symbo%ic depiction used for indicatin# the series:
a. >andom transfer %an#ua#e
b. >e#ister transfer %an#ua#e
c. Arithmetic transfer %an#ua#e
d. A%% of these
+. :he method of $ritin# symbo% to indicate a pro"ided computationa% process is ca%%ed as a:
a. Pro#rammin# %an#ua#e
b. >andom transfer %an#ua#e
c. >e#ister transfer %an#ua#e
d. Arithmetic transfer %an#ua#e
0. *n $hich transfer the computer re#ister are indicated in capita% %etters for depictin# its function:
a. Memory transfer
b. >e#ister transfer
c. 'us transfer
d. one of these
5. :he re#ister that inc%udes the address of the memory unit is termed as the 1111:
a. MA>
b. PC
c. *>
d. one of these
7. :he re#ister for the pro#ram counter is si#nified as11111:
a. MA>
b. PC
c. *>
d. one of these
4. *n re#ister transfer the instruction re#ister as:
a. MA>
b. PC
c. *>
d. one of these
8. *n re#ister transfer the processor re#ister as:
a. MA>
b. PC
c. *>
d. >*
13. /o$ many types of micro operations:
a. !
b. +
c. 5
d. 4
11. Which are the operation that a computer performs on data that put in re#ister:
a. >e#ister transfer
b. Arithmetic
c. ;o#ica%
d. A%% of these
1!. Which micro operations carry information from one re#ister to another:
b. Arithmetic
c. ;o#ica%
d. A%% of these
1(. Micro operation is sho$n as:
a. >1&O>!
b. >1P&>!
c. 'oth
d. one
1+. *n memory transfer %ocation address is supp%ied by1111 that puts this on address bus:
a. A;U
b. CPU
c. MA>
d. MD>
10. /o$ many types of memory transfer operation:
a. 1
b. !
c. (
d. +
15. .peration of memory transfer are:
a. >ead
b. Write
c. 'oth
d. one
17. *n memory read the operation puts memory address on to a re#ister ,no$n as :
a. PC
b. A;U
c. MA>
d. A%% of these
14. Which operation puts memory address in memory address re#ister and data in D>:
a. Memory read
b. Memory $rite
c. 'oth
d. one
18. Arithmetic operation are carried by such micro operation on stored numeric data a"ai%ab%e in11111:
a. >e#ister
b. Data
c. 'oth
d. one
!3. *n arithmetic operation numbers of re#ister and the circuits for addition at 11111:
a. A;U
b. MA>
c. 'oth
d. one
!1. Which operation are imp%emented usin# a binary counter or combinationa% circuit:
b. Arithmetic
c. ;o#ica%
d. A%% of these
!!. Which operation are binary typeE and are performed on bits strin# that is p%aced in re#ister:
a. ;o#ica% micro operation
b. Arithmetic micro operation
c. 'oth
d. one
!(. A micro operation e"ery bit of a re#ister is a:
a. Constant
b. Cariab%e
c. 'oth
d. one
!+. Which operation is e)treme%y usefu% in seria% transfer of data:
c. Shift micro operation
d. one of these
!0. Which %an#ua#e specifies a di#ita% system $hich uses specified notation:
b. Arithmetic
c. ;o#ica%
d. A%% of these
!5. *> stands for:
a. *nput representation
b. *ntermediate representation
c. 'oth
d. one
!7. /D; stands for:
a. /uman description %an#ua#e
b. /ard$are description %an#ua#e
c. /ard$are description %and
d. one of these
!4. CPCC stands for:
a. Cariab%e portab%e C compi%er
b. Cery portab%e C compi%er
c. 'oth
d. one
!8. *n re#ister transfer $hich system is a sequentia% %o#ic system in $hich f%ip&f%ops and #ates are constructed:
a. Di#ita% system
b. >e#ister
c. Data
d. one
(3. /i#h %e"e% %an#ua#e C supports re#ister transfer technique for111111 app%ication:
a. @)ecutin#
b. Compi%in#
c. 'oth
d. one
(1. A counter is incremented by one and memory unit is considered as a co%%ection of 1111111:
a. :ransfer re#ister
b. Stora#e re#ister
c. >:;
d. A%% of these
(!. Which is the strai#ht for$ard re#ister transfer the data from re#ister to another re#ister temporari%y:
a. Di#ita% system
b. >e#ister
c. Data
d. >e#ister transfer operations
((. *n or#ani<ation of a di#ita% system re#ister transfer of any di#ita% system therefore it is ca%%ed:
a. Di#ita% system
b. >e#ister
c. Data
d. >e#ister transfer %e"e%
(+. :he binary information of source re#ister chosen by:
a. Demu%tip%e)er
b. Mu%tip%e)er
c. 'oth
d. one
(0. Which contro% transfer passes the function "ia contro%111111:
a. ;o#ic
b. .peration
c. Circuit
d. A%% of these
(5. >e#ister are assumed to use positi"e&ed#e&tri##ered 11111:
a. 6%ip&f%op
b. ;o#ics
c. Circuit
d. .peration
(7. *D@ stands for:
a. *nput de"ice e%ectronics
b. *nte#rated de"ice e%ectronic
c. 'oth
d. one
(4. A:A stands for:
a. Ad"ance techno%o#y attachment
b. Ad"ance teach attachment
c. 'oth
d. one
(8. :he memory bus is a%so referred as111111:
a. Data bus
b. Address bus
c. Memory bus
d. A%% of these
+3. /o$ many parts of memory bus:
a. !
b. (
c. 0
d. 5
+1. A three state #ate defined as:
a. Ana%o# circuit
b. Ana%o# fundamenta%s
c. 'oth a=b
d. Di#ita% circuit
+!. *n ( state #ate t$o states act as si#na%s equa% to:
a. ;o#ic 3
b. ;o#ic 1
c. one of these
d. 'oth a = b
+(. *n ( state #ate third position termed as hi#h impedance state $hich acts as:
a. .pen circuit
b. C%ose circuit
c. one of these
d. A%% of abo"e
++. *n e"ery transferE se%ection of re#ister by bus is decided by:
a. Contro% si#na%
b. o si#na%
c. A%% si#na%
d. A%% of abo"e
+0. e"ery bit of re#ister has:
a. ! common %ine
b. ( common %ine
c. 1 common %ine
d. none of these
+5. DD>! stands for:
a. Doub%e data rate !
b. Data doub%e rate !
c. Dynamic data rate !
d. Dynamic doub%e rate !
+7. SD>AM stands for:
a. System dynamic random access memory
b. Synchronous dynamic random access memory
c. 'oth
d. one
+4. Which is referred as a sequentia% circuit $hich contains the number of re#ister as per the protoco%:
a. >:;
b. >AM
c. MA>
d. A%% of these
+8. Which operation refer bit$ise manipu%ation of contents of re#ister:
d. one of these
03. Which symbo% $i%% be used to denote an micro operation:
a. GQH
b. G"H
c. 'oth
d. one
01. $hich symbo% $i%% be denote an AD micro operation:
a. GQH
b. G"H
c. 'oth
d. one
0!. Which operation are associated $ith seria% transfer of data:
d. one of these
0(. :he bits are shifted and the first f%ip&f%op recei"es its binary information from the11111:
a. Seria% output
b. Seria% input
c. 'oth
d. one
0+. /o$ many types of shift micro operation:
a. !
b. +
c. 5
d. 4
00. Which shift is a shift micro operation $hich is used to shift a si#ned binary number to the %eft or ri#ht:
a. ;o#ica%
b. Arithmetic
c. 'oth
d. one of these
05. $hich shift is used for si#ned binary number:
a. ;o#ica%
b. Arithmetic
c. 'oth
d. one of these
07. Arithmetic %eft shift is used to mu%tip%y a si#ned number by11111:
a. .ne
b. :$o
c. :hree
d. A%% of these
04. :he "ariab%e of1111111 correspond to hard$are re#ister:
a. >AM
b. >:;
c. A;U
d. MA>
08. *n $hich shift is used to di"ide a si#ned number by t$o:
a. ;o#ica% ri#ht&shift
b. Arithmetic ri#ht shift
c. ;o#ica% %eft shift
d. Arithmetic %eft shift
53. /o$ e"o%"ed in re#ister transfer %an#ua#e and $here:
a. Chirsfraser 1843
b. ?.da"idson 1843
c. Chirs fraser 18!3
d. ?.da"idson 18!3
e. A and '
f. ' and C
#. C and D
mputer System Architecture MCQ 3(
1. 1111111is the first step in the e"o%ution of pro#rammin# %an#ua#es:
a. machine %an#ua#e
b. assemb%y %an#ua#e
c. code %an#ua#e
d. none of these
!. Mnemonic refers to:
a. *nstructions
b. Code
c. Symbo%ic codes
d. Assemb%er
(. Mnemonic represent:
a. .peration codes
b. Strin#s
c. Address
d. one of these
+. :o represent addresses in assemb%y %an#ua#e $e use:
a. Strin# characters
b. Arrays
c. Structure
d. @num
0. Assemb%er $or,s to con"ert assemb%y %an#ua#e pro#ram into machine %an#ua#e :
a. 'efore the computer can e)ecute it
b. After the computer can e)ecute it
c. *n bet$een e)ecution
d. A%% of these
5. 11111111#eneration computers use assemb%y %an#ua#e:
a. 6irst #eneration
b. :hird #eneration
c. second #eneration
d. fourth #eneration
7. Assemb%y %an#ua#e pro#ram is ca%%ed:
a. .bDect pro#ram
b. Source pro#ram
c. .riented pro#ram
d. A%% of these
4. :o in"o,e assemb%er fo%%o$in# command are #i"en at command %ine:
a. R he%%o.s &o he%%o.o
b. Ras he%%o.s Io o
c. R as he%%o Io he%%o.o
d. R as he%%o.s Io he%%o.o
8. 'y $hom address of e)terna% function in the assemb%y source fi%e supp%ied by 111111 $hen acti"ated:
a. Assemb%er
b. ;in,er
c. Machine
d. Code
13. An111111 &o option is used for:
a. *nput fi%e
b. @)terna% fi%e
c. .utput fi%e
d. one of these
11. :he assemb%er trans%ates ismorphica%%y111111 mappin# from mnemonic in these statements to machine
instructions:
a. 1:1
b. !:1
c. (:(
d. +:1
1!. Assemb%er $or,s in111111 phases:
a. 1
b. (
c. !
d. +
1(. :he assemb%er in first pass reads the pro#ram to co%%ect symbo%s defined $ith offsets in a tab%e1111111:
a. /ash tab%e
b. Symbo% tab%e
c. 'oth a= b
d. one of these
1+. *n second passE assemb%er creates 1111111in binary format for e"ery instruction in pro#ram and then refers
to the symbo% tab%e to #i"in# e"ery symbo% an111111 re%atin# the se#ment.
a. Code and pro#ram
b. Pro#ram and instruction
c. Code and offset
d. A%% of these
10. $hich of the ! fi%es are created by the assemb%er:
a. ;ist and obDect fi%e
b. ;in, and obDect fi%e
c. 'oth a = b
d. one of these
15. *n $hich code is obDect fi%e is coded:
a. ;in, code
b. Decima% code
c. Assemb%y code
d. 'inary code
17. $hich type of errors are detected by the assemb%er:
a. synta) error
b. %o#ica% error
c. run time error
d. none of these
14. M.C@ AA 'A in this ;*@S .6 C.D@ $hat type of error is dec%ared:
a. Undec%ared identifier M.C@
b. undec%ared identifier AA
c. Accept as a command
d. ot %oo, in symbo% tab%e
18. *n #i"en %ines of code M.C AAE'; ha"e different type of operands accordin# to assemb%er for 4345
architecture these identifiers must be of:
a. Different type on%y in byte
b. Same type either in $ord or byte
c. 'oth a = b
d. one of these
!3. What type of errors are not detected by assemb%ers:
a. Synta) error
b. >un time error
c. ;o#ica% error
d. A%% of these
!1. 111111ser"es as the purpose of documentation on%y:
a. ;ist
b. obDect
c. %in,
d. code
!!. An assemb%er is a uti%ity pro#ram that performs:
a. *sometric trans%ation
b. *somorphic trans%ation
c. *sochoric trans%ation
d. one of these
!(. Assemb%ers are of ! types:
a. 1 pass
b. ! pass
c. both a = b
d. none of these
!+. CP-CMS assemb%y %an#ua#e $as $ritten in 11111111assemb%er:
a. S-(+3
b. S&(03
c. S-(!3
d. S-(53
!0. ASM&/ $ide%y used 11111assemb%er:
a. S-(73
b. S-(43
c. S-(83
d. S-(53
!5. Assemb%er is a1111111:
a. *nterpreter
b. :rans%ator
c. @)chan#er
d. one of these
!7. A1111111 processor contro%s repetitious $ritin# of sequence:
a. Macro
b. Micro
c. ano
d. A%% of these
!4. *'M&(53 type %an#ua#e is e)amp%e $hich supportin#111111 %an#ua#e:
a. Micro
b. Macro
c. 'oth a = b
d. one of these
!8. 111111111 is attached to usin# macro instruction definition:
a. ame
b. Definition
c. *dentifier
d. A%% of these
(3. @D of macro definition by:
a. AM@
b. M@D
c. DA:A
d. M@M.>B
(1. Process of rep%acin# the sequence of %ines of codes is ,no$n as:
a. @)pandin# die macro
b. @)pandin# tri macro
c. :etra macro
d. one of these
(!. A pro#ram that %in,s se"era% pro#rams is ca%%ed:
a. ;in,er
b. ;oader
c. :rans%ator
d. one of these
((. 1111111address is not assi#ned by %in,er:
a. Abso%ute
b. >e%ati"e
c. 'oth a = b
d. one of these
(+. 11111111address is pro"ided by %in,er to modu%es %in,ed to#ether that startin# from111111:
a. Abso%ute and 3
b. >e%ati"e and 3
c. >e%ati"e and 1
d. >e%ati"e and (
(0. A %in,er is a%so ,no$n as:
a. 'inder
b. ;in,a#e editor
c. 'oth a = b
d. one of these
(5. ;oadin# is 1111111 $ith the tas, of stora#e mana#ement of operatin# system and most%y preformed after
assemb%y:
a. 'ound
b. @)panded
c. ."er%aps
d. A%% of these
(7. 1111111contain %ibrary pro#ram ha"e to be indicated to the %oader:
a. @)terna%%y defined
b. *nterna%%y defined
c. @)ecutab%e fi%e
d. A%% of these
(4. *t is the tas, of the 11111111to %ocate e)terna%%y defined symbo%s in pro#ramsE %oad them in to memory by
p%acin# their 1111111of symbo%s in ca%%in# pro#ram:
a. ;oader and name
b. ;in,er and "a%ues
c. ;in,er and name
d. ;oader and "a%ues
(8. ;in,er creates a %in, fi%e containin# binary codes and a%so produces1111111 containin# address information
on %in,ed fi%es:
a. ;in, map
b. Map tab%e
c. Symbo% map
d. one of these
+3. ho$ many types of entities contained by assemb%er to hand%e pro#ram:
a. +
b. !
c. (
d. 0
+1. $hich of the fo%%o$in# are types of assemb%er entities:
a. Abso%ute entities
b. >e%ati"e entities
c. .bDect pro#ram
d. A%% of these
+!. 11111111ha"e addresses $here instructions are stored a%on# $ith address of $or,in# stora#e:
a. >e%ati"e entities
b. Abso%ute entities
c. 'oth a = b
d. one of these
+(. Abso%ute entities are 1111111111$hom "a%ue si#nify stora#e %ocations that are independent of resu%tin#
machine code:
a. umeric constants
b. Strin# constants
c. 6i)ed addresses
d. .peration codes
e. A%% of these
++. A modu%e contains machine code $ith specification on111111:
a. >e%ati"e addresses
b. Abso%ute addresses
c. .bDect pro#ram
d. one of these
+0. After actua% %ocations for main stora#e are ,no$nE a 111111adDusts re%ati"e addresses to these actua%
%ocations:
a. >e%ocatin# %oader
b. ;ocatin# %oader
c. Defau%t %oader
d. one of these
+5. *f there is a modu%e from sin#%e source&%an#ua#e on%y that does not contain any e)terna% referencesE it
doesnFt need a %in,er to %oad it and is %oaded111111:
a. *ndirect%y
b. Direct%y
c. @)tendin#
d. one of these
+7. Modern assemb%ers for >*SC based architectures ma,e optimi<ation of instruction schedu%in# to ma,e use
of CPU 1111111efficient%y:
a. Pipe%ine
b. Without pipe%ine
c. 'oth a = b
d. one of these
+4. $hich are of the fo%%o$in# modern assemb%ers:
a. M*PS
b. Sun SPA>C
c. /P PA&>*SC
d. )45G)5+H
e. a%% of these
+8. /o$ many types of %oop contro% structures in C %an#ua#e:
a. +
b. 0
c. !
d. (
03. :ypes of %oop contro% statements are:
a. 6or %oop
b. Whi%e %oop
c. Do&$hi%e %oop
d. A%% of these
01. P*nitia% "a%ueO is1111111 $hich initia%i<es the "a%ue of "ariab%e:
a. Assi#nment e)pression
b. Condition "a%ue
c. *ncrement-decrement
d. one of these
0!. :he format ST4dU is used to print1111111 "a%ues in a %ine:
a. 11
b. 13
c. 8
d. 1!
0(. PConditionO is a 111111111e)pression $hich $i%% ha"e "a%ue true or fa%se:
a. >e%ationa%
b. ;o#ica%
c. 'oth a = b
d. one of these
0+. P*ncrementO is the11111111 "a%ue of "ariab%e $hich $i%% be added e"ery time:
a. *ncrement
b. Decrement
c. @)pandin#
d. one of these
00. 1111111is the statement b%oc, of for %oop %ies inside b%oc, of another for %oop:
a. ested for %oop
b. ested $hi%e %oop
c. ested do&$hi%e %oop
d. one of these
05. SPA>C stands for:
a. Sca%ab%e pro#rammer architecture
b. Sca%ab%e processor architecture
c. Sca%ab%e point architecture
d. one of these
07. 6u%% form of M*PS assemb%er is:
a. Microprocessor $ithout inter%oc,ed pipe%ine sta#e
b. Microprocessor $ith inter%oc,ed pipe%ine sta#e
c. 'oth a = b
d. one of these
04. 1111111 statement b%oc, is e)ecuted at%east once for any "a%ue of the condition:
a. 6or statement
b. Do&$hi%e statement
c. Whi%e statement
d. one of these
08. 1111111statement is an unconditiona% transfer of contro% statement:
a. 2oto
b. Continue
c. S$itch
d. A%% of these
53. *n 2oto statement the p%ace to $hich contro% is transferred is identified by a statement111111:
a. ;abe%
b. Disp%ay
c. 'rea,
d. one of these
51. :he continue statement is used to transfer the contro% to the11111111 of a statement b%oc, in a %oop:
a. @nd
b. 'e#innin#
c. Midd%e
d. one of these
5!. :he1111111111 statement is used to transfer the contro% to the end of statement b%oc, in a %oop:
a. Continue
b. 'rea,
c. S$itch
d. 2oto
5(. 11111111function is used to transfer the contro% to end of a pro#ram $hich uses one ar#umentG H and ta,es
"a%ue is <ero for1111111 termination and non&<ero for 1111111termination:
a. @)itG HEnorma%E abnorma%
b. 'rea,E norma%E abnorma%
c. 'oth a = b
d. one of these
5+. :o desi#n a pro#ram it requires1111111:
a. Pro#ram specification
b. Code specification
c. *nstruction specification
d. Prob%em specification
50. :estin# he%ps to ensure 1111111of the pro#ram for use $ithin a system:
a. Qua%ityE accuracy and e)cept
b. Qua%ityE accuracy and acceptance
c. Desi#nE assurance and acceptance
d. Qua%ityE accuracy and de"e%opment
55. An unstructured pro#ram uses a 11111111 approach to so%"e prob%ems:
a. ;inear
b. :op do$n
c. 'oth a = b
d. one of these
57. *n a comp%e) pro#ramE the 111111o"er%aps:
a. 'ranchin#
b. Condition
c. 'oth a = b
d. one of these
54. /o$ many structures structured pro#rams are $ritten:
a. (
b. !
c. 1
d. 5
58. fo%%o$in# are structured pro#rams $ritten in simp%e structures:
a. Sequence
b. Se%ection
c. *teration
d. A%% of these
73. *teration a%so ca%%ed:
a. >epetition
b. Strai#ht
c. Se%ection
d. Sequence
71. *n 11111111instructions are fo%%o$ed one after the other in the preset order in $hich they appear $ithin
pro#ram:
a. Sequence
b. Se%ection
c. 'rea,
d. *teration
7!. 1111111means that one of t$o a%ternati"e sequences of instruction is chosen based on %o#ica% condition:
a. Sequence
b. Se%ection
c. >epetition
d. one of these
7(. 111111111is sequence of instructions is e)ecuted and repeated any no. of times in %oop unti% %o#ica%
condition is true:
a. *teration
b. >epetition
c. 'oth a = b
d. one of these
7+. A 11111111is a sma%% pro#ram tested separate%y before combinin# $ith fina% pro#ram:
a. Modu%e
b. '%oc,
c. se%ection
d. none of these
70. 1111111uses "arious symbo%s to represent function $ithin pro#ram and is 1111111representation:
a. 6%o$chartE pictoria%
b. A%#orithmE pictoria%
c. Pictoria%E f%o$chart
d. one of these
75. 111111A"oid crossin# f%o$ %ines:
a. 6%o$chart
b. A%#orithm
c. 'oth a = b
d. one of these
77. A f%o$ chart is dra$n from top to bottom and11111:
a. >i#ht to %eft
b. .n%y ri#ht
c. ;eft to ri#ht
d. .n%y %eft
74. 6%o$chart that e)ceed pa#e shou%d be proper%y %in,ed usin# 11111111to portions of f%o$chart on
different pa#es:
a. Connectors
b. *nterconnections
c. Connections
d. one of these
78. 11111111is usefu% to prepare detai%ed pro#ram documentation:
a. 6%o$chart
b. A%#orithm
c. 'oth a = b
d. one of these
43. Pseudo means:
a. *mitation
b. *mitate
c. *n imitation
d. one of these
41. Preparin# the pseudocode requires 1111111time than dra$in# f%o$chart:
a. ;ess
b. More
c. .ptimum
d. one of these
4!. :here is 11111standard for preparin# pseudocode instructions:
a. o
b. +
c. !
d. 5
4(. 111111are used to trans%ate hi#h %e"e% %an#ua#e instructions to a machine code:
a. :rans%ators
b. *nterpreters
c. Compi%ers
d. one of these
4+. :he compi%er 1111111trans%ate a pro#ram code $ith any synta) error:
a. Can
b. Cannot
c. Without
d. one of these
40. 'efore chec,in# the pro#ram for errors in trans%atin# code into machine %an#ua#e the hi#h %e"e% %an#ua#e
code is %oaded into111111111:
a. >e#ister
b. Memory
c. Data
d. CPU
45. After compi%ation of the pro#ram Ethe operatin# system of computer acti"ates:
a. ;oader
b. ;in,er
c. Compi%er
d. one of these
47. :he %in,er has uti%ities needed for 11111111$ithin the trans%ated pro#ram:
a. *nput
b. .utput
c. Processin#
d. A%% of these
44. 6%o$chart is a1111111 representation of an a%#orithm:
a. Symbo%ic
b. Dia#rammatic
c. 'oth a = b
d. one of these
48. *n f%o$ chart symbo%s the 1111111operation represents the direction of f%o$:
a. Connector
b. ;oopin#
c. Arro$s
d. Decision ma,in#
83. Which re#ister is memory pointer:
a. Pro#ram counter
b. *nstruction re#ister
c. Stac, pointer
d. Source inde)
81. /o$ many approaches are used to desi#n contro% unit:
a. !
b. (
c. +
d. 0
8!. Which are the fo%%o$in# approaches used to desi#n contro% unit:
a. /ard$ired contro%
b. Micropro#rammed contro%
c. 'oth a = b
d. one of these
8(. Cache memory is %ocated bet$een main memory and11111:
a. CPU
b. Memory
c. 'oth a = b
d. one of these
e.
8+. 1111111arro$ represents the "a%ue obtained by e"a%uatin# ri#ht side e)pression-"ariab%e to the %eft side
"ariab%e:
a. 6orth
b. *nbet$een
c. 'ac,
d. one of these
80. A 11111111 is $ritten as separate unitE apart from main and ca%%ed $hene"er necessary:
a. Subroutine
b. Code
c. '%oc,
d. one of these
85. 1111111uses the stac, to store return address of subroutine:
a. CPU
b. Microprocessor
c. re#ister
d. memory
87. A subroutine is imp%emented $ith ! associated instructions:
a. CA;;
b. >@:U>
c. 'oth a = b
d. one of these
84. Ca%% instruction is $ritten in the 111111pro#ram:
a. Main
b. Procedures
c. Pro#ram
d. Memory
88. >eturn instruction is $ritten in1111111 to $ritten to main pro#ram:
a. Subroutine
b. Main pro#ram
c. 'oth a = b
d. one of these
133. When subroutine is ca%%ed contents of pro#ram counter is %ocation address of 1111111instruction
fo%%o$in# ca%% instruction is stored on 11111111and pro#ram e)ecution is transferred to111111 address:
a. on e)ecutab%eE pointer and subroutine
b. @)ecutab%eE Stac, and Main pro#ram
c. @)ecutab%eE Queue and Subroutine
d. @)ecutab%eE Stac, and Subroutine
131. A subroutine ca%%ed by another subroutine is ca%%ed:
a. ested
b. 6or %oop
c. 'rea,
d. Continue
13!. :he e)tent nestin# in subroutine is %imited on%y by:
a. umber of a"ai%ab%e Stac, %ocations
b. umber of a"ai%ab%e Addressin# %ocations
c. umber of a"ai%ab%e CPU %ocations
d. umber of a"ai%ab%e Memory %ocations
13(. Which are of the fo%%o$in# instructions of hard$are subroutines:
a. SCA;
b. SA*:
c. 'oth a = b
d. one of these
13+. *mportance in %oca% "ariab%e and inde) re#isters in subroutine does11111:
a. A%ter
b. ot a%ter
c. 'oth a = b
d. one of these
130. Mar,ers in subroutine cannot be accepted as %imits $hereas this mar,ers stands for:
a. :op of stac,
b. 'ottom of stac,
c. Midd%e of stac,
d. A%% of these
135. Subroutines are p%aced in identica% section to ca%%er so that SCA; and SA*: 1111111o"erpass di"ison
%imits:
a. DonFt
b. Does
c. Cross
d. 'y
137. 111111111subroutine dec%aration come after procedure announcement:
a. 2%oba%
b. ;oca%
c. 'oth a = b
d. one of these
134. subroutines are in"o,ed by usin# their11111111 in a subroutine ca%% statement and rep%acin# forma%
parameters $ith11111111 parameters:
a. *dentifier and forma%
b. *dentifier and actua%
c. @)pression and ar#uments
d. one of these
138. Parameters can be stac,ed by 11111111Dust as $ith procedures:
a. Asteris,GVH
b. Arro$
c. ;ine
d. Pipe%ine
113. :he subroutines are determined by functionin# of 11111111instructions:
a. SCA; and SA*:
b. on%y SCA;
c. on%y SA*:
d. none of these
111. Ca%% is11111111 subroutine ca%%:
a. Conditiona%
b. Unconditiona%
c. 'oth a = b
d. one of these
11!. A f%a# is a 111111111that ,eep trac, of a chan#in# condition durin# computer run:
a. Memory
b. >e#ister
c. Contro%%er
d. one of these
11(. When a subroutine is 11111111the parameters are %oaded onto the stac, and SCA; is e)ecuted:
a. @)ecuted
b. *n"o,ed
c. @nded
d. Started
11+. Subroutine is ca%%ed 1111111:
a. *n Same pro#ram
b. *n e)terna% pro#ram
c. 'oth a = b
d. one of these
110. *f interna% subroutine is ca%%ed #%oba% data is used to pass "a%ues definin# parameters bet$een
111111111pro#ram and defined 1111111:
a. Main and subroutine
b. ;oca% and subroutine
c. 2%oba% and subroutine
d. 2%oba% and main
115. *n $hat type of subroutine actua% parameters are passed throu#h the main pro#ram to forma%
parameters in the re%ated subroutine:
a. *nterna%
b. @)terna%
c. 'oth a = b
d. one of these
117. 'y definin# the 111111111re#ister as %ast in first out stac, the sequence can hand%e nested
subroutines:
a. S
b. ?
c. >
d. :
114. :he 111111stac, can be +&$ord memory addressed by ! bits from an up-do$n counter ,no$n as the
stac, pointer:
a. 6*6.
b. P*P.
c. S*S.
d. ;*6.
118. #etchar :: *. char in this #i"en function $hat is indicated by *. char:
a. $hen #etchar is in"o,ed it returns a character
b. $hen #etchar is e)ecuted it returns a character
c. both a = b
d. none of these
1!3. *f $e define putchar function in putchar :: char &O *. G H synta) than character input as an ar#ument
and returns11111:
a. Usefu% "a%ue
b. 2et output
c. 2et no output
d. one of these
1!1. :he front pane% disp%ay pro"ides %i#hts as #reen ;@D represent 11111 and red ;@D represent 11111for
de"ice pro#rammer $ho $rites input-output basic:
a. 'usy and @rror
b. @rror and 'usy
c. 'usy and 'usy
d. @rror and @rror
1!!. :he input data for processin# uses the standard input de"ice $hich by defau%t is a 11111111:
a. Mouse
b. Scanner
c. 9eyboard
d. Monitor
1!(. :he processed data is sent for output to standard 11111111de"ice $hich by defau%t is computer
screen:
a. *nput
b. .utput
c. 'oth a = b
d. one of these
1!+. @ach instruction is e)ecuted by set of micro operations termed as:
a. Micro instructions
b. Mini instructions
c. 'oth a = b
d. one of these
1!0. 6or each micro operation the contro% unit #enerates set of111111 si#na%s:
a. Contro%
b. Address
c. Data
d. one of these
1!5. Sequence of microinstructions is termed as micro pro#ram or11111111:
a. /ard$are
b. Soft$are
c. 6irm$are
d. one of these
1!7. :he micro pro#ram is an 11111111$ritten in microcode and stored in firm$are $hich is a%so
referred as11111111111:
a. *nterpreter and contro% memory
b. :rans%ator and contro% store
c. :rans%ator and contro% memory
d. *nterpreter and :rans%ator
1!4. Compared to hard$areE firm$are is 11111111to desi#n micro pro#rammed or#ani<ation:
a. Difficu%t
b. @asier
c. 'oth a= b
d. one of these
1!8. Compared to soft$areE firm$are is 1111111to $rite:
a. @asier
b. Difficu%t
c. Mediator
d. .ptimum
1(3. 111111111pro#ram con"erts machine instructions into contro% si#na%s:
a. Contro% memory pro#ram
b. Contro% store pro#ram
c. 'oth a = b
d. .n%y memory
1(1. $ho coined the term micro pro#ram in 1801:
a. :.C. Wi%,es
b. M.C. Wi%,es
c. S.C. Wi%,es
d. D.C. Wi%,es
1(!. $hat is fu%% form of @DSAC:
a. @%ectronic de%ay source accumu%ator ca%cu%ator
b. @%ectronic de%ay stora#e automatic code
c. @%ectronic destination source automatic ca%cu%ator
d. @%ectronic de%ay stora#e automatic ca%cu%ator
1((. Who %ed to de"e%opment of read Ion%y ma#netic core matri) for use in contro% unit of sma%% computer
at *'MFs %aboratory:
a. ?ohn 6airc%ou#hFs
b. ?ohny fairc%ou#h
c. Mr. >edc%iff
d. M.C. Wi%,es
1(+. 6rom1851&185+ ?ohn fairc%ou#hFs research p%ayed an important ro%e to pursue fu%% ran#e of
compatib%e computers as system:
a. System-(53
b. System-+53
c. System-053
d. System-743
1(0. @ach microinstructions cyc%e is made of ! parts:
a. 6etch
b. @)ecute
c. Code
d. 'oth a = b
1(5. .ne of use of micropro#rammin# to imp%ement 11111111 of processor in *nte% 43)45 and Motoro%a
543)3 processors $hose instruction set are e"o%"ed from (53 ori#ina%:
a. Contro% structure
b. Without contro%
c. Contro% unit
d. .n%y contro%
1(7. :he function of these microinstructions is to issue the micro orders to111111:
a. CPU
b. Memory
c. >e#ister
d. Accumu%ator
1(4. Micro&orders #enerate the1111111 address of operand and e)ecute instruction and prepare for
fetchin# ne)t instruction from the main memory:
a. Physica%
b. @ffecti"e
c. ;o#ica%
d. a%% of abo"e
1(8. Which of the fo%%o$in# ! tas, are performed to e)ecute an instruction by MCU:
a. Microinstruction e)ecution
b. Microinstruction sequencin#
c. 'oth a = b
d. one of these
1+3. What is the purpose of microinstruction e)ecutions:
a. 2enerate a contro% si#na%
b. 2enerate a contro% si#na% to compi%e
c. 2enerate a contro% si#na% to e)ecute
d. A%% of these
1+1. Which microinstruction pro"ide ne)t instruction from contro% memory:
b. Microinstruction 'uffer
c. Microinstruction decoder
d. Microinstruction Sequencin#
1+!. Which are the fo%%o$in# components of micropro#ramed units to imp%ement contro% process:
b. Microinstruction address #eneration
c. Contro% store micropro#ram memory
d. Microinstruction 'uffer
e. Microinstruction decoder
f. A%% of these
1+(. Microcodes are stored as firm$are in 1111111:
a. Memory chips
b. >e#isters
c. accumu%ators
d. none of these
1++. A contro% memory is111111 stored in some area of memory:
a. Contro% instruction
b. Memory instruction
c. >e#ister instruction
d. one of these
1+0. A computer ha"in# $ritab%e contro% memory is ,no$n as111111111:
a. Static micro pro#rammab%e
b. Dynamic micro pro#rammab%e
c. 'oth a = b
d. one of these
1+5. :he contro% memory contains a set of $ords $here each $ord is:
a. Microinstruction
b. Pro#ram
c. Sets
d. A%% of these
1+7. Durin# pro#ram e)ecution content of main memory under#o chan#es andE but contro% memory
has111111 micropro#ram:
a. Static
b. Dynamic
c. Compi%e time
d. 6i)ed
1+4. What happens if computer is started :
a. *t e)ecutes SCPUU micropro#ram $hich is sequence of microinstructions stored in
>.M
b. *t e)ecutes ScodeU micropro#ram $hich is sequence of microinstructions stored in
>.M
c. *t e)ecutes SbootU micropro#ram $hich is sequence of microinstructions stored in
>.M
d. *t e)ecutes Sstrap %oaderU micropro#ram $hich is sequence of microinstructions
stored in >.M
1+8. Contro% memory is part of 111111 that has addressab%e stora#e re#isters and used as temporary
stora#e for data:
a. >.M
b. >AM
c. CPU
d. Memory
103. /o$ many modes the address in contro% memory are di"ided:
a. !
b. (
c. 0
d. 7
101. $hich of the fo%%o$in# is interrupt mode:
a. :as, mode
b. @)ecuti"e mode
c. 'oth a = b
d. one of these
10!. Mode of addresses in contro% memory are:
a. @)ecuti"e mode
b. :as, mode
c. 'oth a = b
d. one of these
10(. Addresses in contro% memory is made by1111 for each re#ister #roup:
a. Address se%ect %o#ic
b. Data se%ect %o#ic
c. Contro% se%ect %o#ic
d. A%% of these
10+. :here are ho$ many re#ister #roups in contro% memory:
a. (
b. 0
c. 5
d. 4
100. What type of circuit is used by contro% memory to interconnect re#isters:
a. Data routin# circuit
b. Address routin# circuit
c. Contro% routin# circuit
d. one of the these
105. Which memory is used to copy instructions or data current%y used by CPU:
a. Main memory
b. Secondary memory
c. Cache memory
d. one of these
107. Copy of instruction in cache memory is ,no$n as:
a. @)ecution cache
b. Data cache
c. *nstruction cache
d. A%% of these
104. Copy of data in cache memory is ca%%ed:
a. Data cache
b. @)ecution cache
c. Address cache
d. Contro% cache
108. What are ! ad"anta#es of cache memory:
a. >eduction of a"era#e access time for CPU memory
b. >eduction of band$idth of a"ai%ab%e memory of CPU
c. 'oth a = b
d. one of these
153. .n $hat method search in cache memory used by the system:
a. Cache directin#
b. Cache mappin#
c. Cache contro%%in#
d. Cache in"a%idation
151. 111111process starts $hen a cpu $ith cache refers to a memory:
a. Main memory
b. @)terna% memory
c. Cache
d. A%% of these
15!. When cache process starts hit and miss rate defines in cache directory:
a. durin# search reads
b. durin# search $rites
c. durin# rep%ace $rites
d. durin# findin# $rites
15(. *n cache memory hit rate indicates:
a. Data from requested address is not a"ai%ab%e
b. Data from requested address is a"ai%ab%e
c. Contro% from requested address is a"ai%ab%e
d. Address from requested address is not a"ai%ab%e
15+. *n cache memory miss rate indicates:
a. A"ai%abi%ity of requested data
b. A"ai%abi%ity of requested address
c. on&A"ai%abi%ity of requested data
d. on&A"ai%abi%ity of requested address
150. Which ( areas are used by cache process:
a. SearchE updatin#E in"a%idation
b. WriteE updatin#E in"a%idation
c. SearchE readE updatin#
d. *n"a%idationE updatin#E requestin#
155. Updatin# $rites to cache data and a%so to 1111111:
a. Directories
b. Memory
c. >e#isters
d. 6o%ders
157. *n"a%idation $rites on%y to11111 and erases pre"ious%y residin# address in memory:
a. 6o%ders
b. Memory
c. Directory
d. 6i%es
154. 1111111machine instruction creates branchin# to some specified %ocation in main memory if resu%t of
%ast A;U operation is Nero or Nero f%a# is set:
a. 'ranch on .ne
b. 'ranch on :hree
c. 'ranch on ine
d. 'ranch on Nero
158. 6u%% form of CA>:
a. Contro% address re#ister
b. Content address re#ister
c. Condition accumu%ator resource
d. Code address re#ister
173. :$o types of microinstructions are:
a. 'ranchin#
b. on&branchin#
c. 'oth a = b
d. one of these
171. Which are ( $ays to determine address of ne)t micro instruction to be e)ecuted:
a. e)t sequentia% address
b. 'ranchin#
c. *nterrupt testin#
d. A%% of these
17!. 'ranchin# can be11111111:
a. Conditiona%
b. Unconditiona%
c. 'oth a = b
d. one of these
17(. *n $hich branchin# condition is tested $hich is determined by status bit of A;U:
a. Unconditiona%
b. Conditiona%
c. 'oth a = b
d. one of these
17+. $hich branch is achie"ed by fi)in# status bit that output of mu%tip%e)er is a%$ays one:
a. Unconditiona%
b. Conditiona%
c. ;oopin#
d. A%% of these
170. Which re#ister is used to store addresses of contro% memory from $here instruction is fetched:
a. MA>
b. 'A>
c. CA>
d. DA>
175. Contro% >.M is the contro% memory that ho%ds:
a. Contro% $ords
b. Memory $ords
c. Mu%tip%e)ers
d. Decoders
177. .pcode is the machine instruction obtained from decodin# instruction stored in:
a. Stac, pointer
b. Address pointer
c. *nstruction re#ister
d. *ncrementer
174. 'ranch %o#ic determines $hich shou%d be adopted to se%ect the ne)t111111 "a%ue amon# possibi%ities:
a. CA>
b. 2A>
c. /A>
d. :A>
178. 11111111 #enerates CA>K1 as possibi%ity of ne)t CA> "a%ue:
a. Decrementer
b. *ncrementer
c. Postfi)
d. Prefi)
143. 11111111used to ho%d return address for operations of subroutine ca%% branch:
a. :'>
b. /D>
c. SD>
d. S'>
141. Which of fo%%o$in# ! types of computer system considered by micro pro#rammed unit:
a. Micro %e"e% computers
b. Machine %e"e% computers
c. 'oth a = b
d. one of these
14!. 6o%%o$in# are the components of micro pro#rammed contro% unit:
a. Subroutine re#ister
b. Contro% address re#ister
c. Memory .f 1!4 $ords $ith !3 bits per $ords
d. A%% of these
14(. Carious machine %e"e% components are:
a. Address re#ister
b. Pro#ram counter
c. Data re#ister
d. Accumu%ator re#ister
e. Memory of !9E15 bits-$ord >AM
f. Mu%tip%e)ers
#. A%% of these
14+. Data transfers are done usin#:
a. Mu%tip%e)er s$itchin#
b. Demu%tip%e)er s$itchin#
c. Adder s$itchin#
d. Subtractor s$itchin#
140. PC can be %oaded from11111:
a. '>
b. C>
c. A>
d. :>
145. Which functions are performed by CU:
a. Data e)chan#e b-$ CPU and memory or *-. modu%es
b. @)terna% operations
c. *nterna% operations inside CPU
d. 'oth a = c
147. Which are interna% operations inside CPU:
a. Data transfer b-$ re#isters
b. *nstructin# A;U to operate data
c. >e#u%ation of other interna% operations
d. A%% of these
144. /o$ many paths ta,en by mo"ement of data in CU:
a. (
b. +
c. 0
d. !
148. ! data paths in CU are:
a. *nterna% data paths
b. @)terna% data paths
c. 'oth a = b
d. one of these
183. 1111111is the data paths %in, CPU re#isters $ith memory or *-. modu%es:
a. @)terna% data paths
b. *nterna% data paths
c. 'orea% data paths
d. @)chan#e data paths
181. 111111is data paths there is mo"ement of data from one re#ister to another or b-$ A;U and a
re#ister:
a. @)terna%
b. 'orea%
c. *nterna%
d. @)chan#e
18!. Which is the input of contro% unit:
a. Master c%oc, si#na%
b. *nstruction re#ister
c. 6%a#s
d. Contro% si#na%s from bus
e. A%% of these
18(. *f 1111111f%a# is set then contro% unit issues contro% si#na%s that causes pro#ram counter to be
incremented by 1:
a. Nero
b. .ne
c. :hree
d. @i#ht
18+. Which contro% unit is imp%emented as combinationa% circuit in the hard$are:
a. Micropro#rammed contro% unit
b. /ard$ired contro% unit
c. '%oc,pro#rammed contro% unit
d. Macropro#rammed contro% unit
180. Micropro#rams are usua%%y stored in:
a. >.M
b. >AM
c. SAM
d. SA
185. Amon# them $hich is the faster contro% unit:
a. /ard$ired
b. Micropro#rammed
c. 'oth a = b
d. one of these
187. 6or C*SC architecture1111111 contro%%ers are better:
a. Micropro#rammed
b. /ard$ired
c. 'etter$ired
d. one of these
184. 6u%% form of 6SM is:
a. 6inite state machine
b. 6i) state machine
c. 6un source meta%
d. A%% of these
188. >u%es of 6SM are encoded in:
a. >.M
b. >andom %o#ic
c. Pro#rammab%e %o#ic array
d. A%% of these
!33. *n >*SC architecture access to re#isters is made as a b%oc, and re#ister fi%e in a particu%ar re#ister can
be se%ected by usin#:
a. Mu%tip%e)er
b. Decoder
c. Subtractor
d. Adder
!31. .utputs of instruction-data path in CU are:
a. >e# >-W
b. ;oad->e#&>e#
c. A;U function se%ect
d. ;oad contro%
e. >ead contro%
f. *> ;atch
#. ?UMP-'ranch-e)t PC
h. A%% of these
!3!. .ne %ast bit of contro% output is for contro% of1111111 state:
a. Minor
b. MaDor
c. Mi)er
d. one of these
!3(. 6o%%o$in# are + maDor states for W%oadF are:
a. 6etch
b. Decode
c. Memory
d. Write bac,
e. A%% of these
!3+. ?ump has ( maDor states are:
a. 6etch
b. Decode
c. Comp%ete
d. A%% of these
!30. 11111111 state ,eeps trac, of position re%ated to e)ecution of an instruction:
a. MaDor
b. Minor
c. 'oth a = b
d. one of these
!35. An instruction a%$ays starts $ith state111:
a. 1
b. !
c. (
d. 3
!37. Decodin# of an instruction in >*SC architecture means decision on $or,in# of contro% unit for:
a. >emainder of instructions
b. Di"isor of instructions
c. Di"idend of instructions
d. one of these
!34. Which contro% is used durin# startin# of instruction cyc%e:
a. Write
b. >ead
c. >-W
d. one of these
!38. 11111111function se%ect ta,es op code in *> trans%atin# to function of A;U and it may be compact
binary code or one %ine per A;U:
a. A;U
b. CPU
c. Memory
d. Cache
!13. 11111111is dependent on instruction type in CU:
a. ?ump
b. 'ranch
c. e)tPC
d. A%% of these
!11. 1111111111dependent on instruction and maDor state and a%so comes in startin# of data fetch state as
$e%% as $rite bac, sta#e in CU:
a. >e#ister read
b. >e#ister $rite
c. >e#ister >-W
d. A%% of these
!1!. 1111111dependence o"er op&code in CU:
a. ;oad re#ister
b. ;oad >e#->e#
c. .n%y ;oad
d. one of these
!1(. 6u%% form of P;A in CU:
a. Pro#rmmab%e ;o#ic Array
b. Pro#rams ;oad Array
c. Pro#rammab%e ;o#ic Accumu%ator
d. a%% of these
!1+. Which are tas,s for e)ecution of CU or MCU:
b. Microinstruction sequencin#
c. 'oth a = b
d. one of these
!10. 'ranchin# is imp%emented by dependin# on output of:
a. CD
b. >2
c. CC
d. C>
!15. Who determine under $hat conditions the branchin# $i%% occur and $hen:
a. 'y combination of CD and ':
b. 'y combination of CD and '>
c. 'y combination of CD and C>
d. 'y combination of :D and '>
!17. :he character U is used to indicate:
a. Undefined transfers
b. Unfair transfers
c. Unconditiona% transfers
d. A%% of these
!14. Which fie%d is used to requests for branchin#:
a. D>
b. C>
c. :>
d. '>
!18. $hich fie%d is used to determine $hat type of transfer occurs:
a. C>
b. S>
c. '>
d. M>
!!3. Source statements consist of 0fie%ds in microinstruction source code are:
a. ;ab%e
b. Micro&ops
c. CD&spec
d. '>&spec
e. Address
f. A%% of these
1. Which is a type of microprocessor that is desi#ned $ith %imited number of instructions:
a. CPU
b. >*SC
c. A;U
d. MUA
!. Which unit is a pipe%ine system he%ps in speedin# up processin# o"er a non pipe%ine system:
a. CPU
b. >*SC
c. A;U
d. MUA
(. :he #roup of binary bits assi#ned to perform a specified operation is ,no$n as:
a. Stac, re#ister
b. Contro% $ord
c. 'oth
d. one
+. /o$ many binary se%ection inputs in the contro% $ord:
a. 1
b. 7
c. 1+
d. !4
0. *n contro% $ord three fie%ds contain ho$ many bits:
a. 1
b. !
c. (
d. +
5. :hree fie%ds contains three bits each so one fi%ed has ho$ many bits in contro% $ord:
a. !
b. +
c. 0
d. 5
7. /o$ is se%ects the re#ister that recei"es the information from the output bus:
a. Decoder
b. @ncoder
c. MUA
d. A%% of these
4. A bus or#ani<ation for se"en 11111re#ister:
a. A;U
b. >*SC
c. CPU
d. MUA
8. /o$ many source re#ister propa#ate throu#h the mu%tip%e)ers:
a. 1
b. !
c. (
d. +
13. /o$ many bits of .P> se%ect one of the operations in the A;U:
a. !
b. (
c. +
d. 0
11. fi"e bits of .P> se%ect one of the operation in the 1111 in contro% re#ister:
a. CPU
b. >*SC
c. A;U
d. MUA
1!. :he .P> fie%d has ho$ many bits:
a. !
b. (
c. +
d. 0
1(. *n stac, or#ani<ation the insertion operation is ,no$n as 1111:
a. Pop
b. Push
c. 'oth
d. one
1+. *n stac, or#ani<ation the de%etion operation is ,no$n as 1111:
a. Pop
b. Push
c. 'oth
d. one
10. A stac, in a di#ita% computer is a part of the11111:
a. A;U
b. CPU
c. Memory unit
d. one of these
15. *n stac, or#ani<ation address re#ister is ,no$n as the:
a. Memory stac,
b. Stac, pointer
c. Push operation
d. Pop operation
17. *n re#ister stac, a stac, can be or#ani<ed by a 111111number of re#ister:
a. *nfinite number
b. 6inite number
c. 'oth
d. one
14. Which operation are done by increment or decrement the stac, pointer:
a. Push
b. Pop
c. 'oth
d. one
18. *n re#ister stac, a stac, can be a finite number of11111:
a. Contro% $ord
b. Memory $ord
c. :ransfer $ord
d. A%% of these
!3. :he stac, pointer contains the address of the $ord that is current%y on1111:
a. :op of the stac,
b. Do$n of the stac,
c. :op and Do$n both
d. one
!1. *n re#ister stac, items are remo"ed from the stac, by usin# the 1111operation:
a. Push
b. Pop
c. 'oth
d. one
!!. Which re#ister ho%ds the item that is to be $ritten into the stac, or read out of the stac,:
a. S>
b. *>
c. >>
d. D>
!(. *n re#ister stac, the top item is read from the stac, into:
a. S>
b. *>
c. >>
d. D>
!+. *n con"ersion to re"erse po%ish notation the 1111and1111 operations are performed at the end:
a. Add and subtract
b. Subtract and mu%tip%ication
c. Mu%tip%ication and subtract
d. A%% of these
!0. >P stands for:
a. >e"erse po%ish notation
b. >ead po%ish notation
c. >andom po%ish notation
d. one of these
!5. *nstruction formats contains the memory address of the111111:
a. Memory data
b. Main memory
c. CPU
d. A;U
!7. *n instruction formats instruction is represent by a11111111 of bits:
a. Sequence
b. Para%%e%
c. 'oth
d. one
!4. *n instruction formats the information required by the 111111 for e)ecution:
a. A;U
b. CPU
c. >*SC
d. DA:A
!8. :he operation is specified by a binary code ,no$n as the11111:
a. .perand code
b. .pcode
c. Source code
d. A%% of these
(3. Which are contains one or more re#ister that may be referenced by machine instruction:
a. *nput
b. .utput
c. CPU
d. A;U
(1. Memory Imapped 111is used this is Dust another memory address:
a. *nput
b. .utput
c. 'oth
d. one
(!. Which operation use one operand or unary operations:
a. Arithmetic
b. ;o#ica%
c. 'oth
d. one
((. (&Address format can be represented as :
a. dst P&Lsrc1MLsrc!M
b. dst &OLsrc1MLsrc!M
c. dst P&OLsrc1MLsrc!M
d. A%% of these
(+. !& Address format can be represented as:
a. dst &OLdstMVLsrcM
b. dstP&LdstMVLsrcM
c. dstP&OLdstMVLsrcM
d. A%% of these
(0. *n 1&address format ho$ many address is used both as source as $e%% as destination:
a. 1
b. !
c. (
d. +
(5. :he stac, pointer is maintained in a1111:
a. Data
b. >e#ister
c. Address
d. one of these
(7. 111 mode of addressin# is a form of imp%ied addressin#:
a. Stac,
b. Array
c. Queue
d. 'inary
(4. Stac, uses >P to so%"e 111111e)pression:
a. ;o#ica%
b. Arithmetic
c. 'oth
d. one
(8. *n the >P scheme the numbers and operators are %isted1111111111:
a. .ne after another
b. .ne before another
c. Another after one
d. Another before one
+3. *n addressin# modes instruction has primari%y ho$ many components:
a. 1
b. !
c. (
d. +
+1. @A stands for:
a. @ffecti"e add
b. @ffecti"e abso%ute
c. @ffecti"e address
d. @nd address
+!. *n $hich addressin# the operand is actua%%y present in instruction:
a. *mmediate addressin#
b. Direct addressin#
c. >e#ister addressin#
d. one of these
+(. *n $hich addressin# the simp%est addressin# mode $here an operand is fetched from memory is11111:
d. one of these
++. $hich addressin# is a $ay of direct addressin#:
d. one of these
+0. *n $hich mode the main memory %ocation ho%ds the @A of the operand:
d. *ndirect addressin#
+5. Which addressin# is an e)treme%y inf%uentia% $ay of addressin#:
a. Disp%acement addressin#
b. *mmediate addressin#
c. Direct addressin#
d. >e#ister addressin#
+7. *n the base Ire#ister addressin# the re#ister reference may be 11111:
a. *mp%icit
b. @)p%icit
c. 'oth
d. one
+4. *n post Iinde)in# the inde)in# is performed11111
a. 'efore the indirection
b. After the indirection
c. Same time indirection
d. A%% of these
+8. *n post&inde)in# the contents of the address fie%d are used to access a memory %ocation containin# a111
address:
d. one of these
03. *n pre Iinde)in# the inde)in# is performed11111
a. 'efore the indirection
b. After the indirection
c. Same time indirection
d. A%% of these
01. :he fina% addressin# mode that $e consider is111111:
d. Stac, addressin#
0!. *n data transfer manipu%ation desi#nin# as instruction set for a system is a comp%e)11111 :
a. Art
b. System
c. Computer
d. one of these
0(. Which addressin# is an e)treme%y inf%uentia% $ay of addressin#:
d. Disp%acement addressin#
0+. Which addressin# offset can be the content of PC and a%so can be ne#ati"e:
a. >e%ati"e addressin#
b. *mmediate addressin#
c. Direct addressin#
d. >e#ister addressin#
00. :he %en#th of instruction set depends on:
a. Data si<e
b. Memory si<e
c. 'oth
d. one
05. *n %en#th instruction some pro#rams $ants a comp%e) instruction set containin# more instructionE more
addressin# modes and #reater address ran#E as in case of11111:
a. >*SC
b. C*SC
c. 'oth
d. one
07. *n %en#th instruction other pro#rams on the other handE $ant a sma%% and fi)ed&si<e instruction set that
contains on%y a %imited number of opcodesE as in case of11111:
a. >*SC
b. C*SC
c. 'oth
d. one
04. :he instruction set can ha"e "ariab%e&%en#th instruction format primari%y due to:
a. Caryin# number of operands
b. Caryin# %en#th of opcodes in some CPU
c. 'oth
d. one
08. An instruction code must specify the address of the1111:
a. .pecode
b. .perand
c. 'oth
d. one
53. A simp%e 1111 differs $ide%y from a :urin# machine:
a. C*SC
b. >*SC
c. CPU
d. A;U
51. /o$ many types of basica%%y Data manipu%ation:
a. 1
b. !
c. (
d. +
e.
5!. Which is data manipu%ation types are:
a. Arithmetic instruction
b. Shift instruction
c. ;o#ica% and bit manipu%ation instructions
d. A%% of these
5(. Arithmetic instruction are used to perform operation on:
a. umerica% data
b. on&numerica% data
c. 'oth
d. one
5+. /o$ many basic arithmetic operation:
a. 1
b. !
c. (
d. +
50. $hich are arithmetic operation are:
a. Addition
b. Subtraction
c. Mu%tip%ication
d. Di"ision
e. A%% of these
f. one of these
55. *n $hich instruction are used to perform 'oo%ean operation on non&numerica% data:
a. ;o#ica% and bit manipu%ation
b. Shift manipu%ation
c. Circu%ar manipu%ation
d. one of these
57. Which operation is used to shift the content of an operand to one or more bits to pro"ide necessary
"ariation:
a. ;o#ica% and bit manipu%ation
d. one of these
54. 11111111is Dust %i,e a circu%ar array:
a. Data
b. >e#ister
c. A;U
d. CPU
58. Which contro% refers to the trac, of the address of instructions:
a. Data contro%
b. >e#ister contro%
c. Pro#ram contro%
d. one of these
73. *n pro#ram contro% the instruction is set for the statement in a:
a. Para%%e%
b. Sequence
c. 'oth
d. one
71. /o$ many types of unconditiona% Dumps used in pro#ram contro% are fo%%o$s:
a. 1
b. !
c. (
d. +
7!. Which are unconditiona% Dumps used in pro#ram contro% are fo%%o$s:
a. Short Dump
b. ear Dump
c. 6ar Dump
d. A%% of these
7(. Which instruction is used in pro#ram contro% and used to decrement CA and conditiona% Dump:
a. ;oop
d. one of these
7+. Which is a%$ays considered as short Dumps:
a. Conditiona% Dump
b. Short Dump
c. ear Dump
d. 6ar Dump
70. Who chan#e the address in the pro#ram counter and cause the f%o$ of contro% to be a%tered:
a. Shift manipu%ation
b. Circu%ar manipu%ation
c. Pro#ram contro% instruction
d. A%% of these
75. Which is the common pro#ram contro% instructions are:
a. 'ranch
b. ?ump
c. Ca%% a subroutine
d. >eturn
e. A%% of these
f. one of these
77. Which is a type of microprocessor that is desi#ned $ith %imited number of instructions:
a. C*SC
b. >*SC
c. 'oth
d. one
74. SMP Stands for:
a. System mu%tiprocessor
b. Symmetric mu%tiprocessor
c. 'oth
d. one
78. UMA stands for:
a. Uniform memory access
b. Unit memory access
c. 'oth
d. one
43. UMA stands for:
a. umber Uniform memory access
b. ot Uniform memory access
c. on Uniform memory access
d. A%% of these
41. S*MD stands for:
a. System instruction mu%tip%e data
b. Sin#%e instruction mu%tip%e data
c. Symmetric instruction mu%tip%e data
d. Sca%e instruction mu%tip%e data
4!. M*MD stands for:
a. Mu%tip%e input mu%tip%e data
b. Memory input mu%tip%e data
c. Mu%tip%e instruction mu%tip%e data
d. Memory instruction mu%tip%e data
4(. /;; stands for:
a. /i#h %e"e% %an#ua#es
b. /i#h %e"e% %ine
c. /i#h %e"e% %o#ic
d. /i#h %e"e% %imit
4+. Which is a method of decomposin# a sequentia% process into sub operations:
a. Pipe%ine
b. C*SC
c. >*SC
d. Database
40. /o$ many types of array processor:
a. 1
b. !
c. (
d. +
45. Which are the types of array processor:
a. Attached array processor
b. S*MD array processor
c. 'oth
d. one
47. Which are the app%ication of "ector processin#:
a. Weather forecastin#
b. Artificia% inte%%i#ence
c. @)perts system
d. *ma#es processin#
e. Seismo%o#y
f. 2ene mappin#
#. Aerodynamics
h. A%% of these
i. one of these
44. Which types of Dump ,eeps a !1byte instruction that ho%ds the ran#e from& 1!4to1!7 bytes in the memory
%ocation:
a. 6ar Dump
b. ear Dump
c. Short Dump
d. A%% of these
48. Which types of re#ister ho%ds a sin#%e "ector containin# at %east t$o read ports and one $rite ports:
a. Data system
b. Data base
c. Memory
d. Cector re#ister
83. Para%%e% computin# means doin# se"era% ta,es simu%taneous%y thus impro"in# the performance of
the11111111:
a. Data system
b. Computer system
c. Memory
d. Cector re#ister
81. Which is used to speed&up the processin#:
a. Pipe%ine
b. Cector processin#
c. 'oth
d. one
8!. Which processor is a periphera% de"ice attached to a computer so that the performance of a computer can
be impro"ed for numerica% computations:
c. 'oth
d. one
8(. Which processor has a sin#%e instruction mu%tip%e data stream or#ani<ation that manipu%ates the common
instruction by means of mu%tip%e functiona% units:
c. 'oth
d. one
8+. Which carry is simi%ar to rotate $ithout carry operations:
a. >otate carry
b. >otate throu#h carry
c. 'oth
d. one
80. *n the case of a %eft arithmetic shift E <eros are Shifted to the 111111:
a. ;eft
b. >i#ht
c. Up
d. Do$n
85. *n the case of a ri#ht arithmetic shift the si#n bit "a%ues are shifted to the11111:
a. ;eft
b. >i#ht
c. Up
d. Do$n

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1. Which is an important data transfer technique :

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