Circuit diagram for RC coupled amplifier

VCC = 12 v

R B1

RC

Ci BC 147

CC

Vout Vin R B2 RE CE

Design To find Rc and RE Vcc=Vce+Ie(Re+Rc) To find RB1 and RB2 VRB2=VBE+VRE ; VRE=2 V VRB1=Vcc-VRB2

Expt No: 1 RC COUPLED AMPLIFIER Aim :

Date:

To design ,construct and test the working of an RC Coupled amplifier and to draw its frequency response and determine its bandwidth from the frequency response. Apparatus Required: S.No 1. 2. 3. Apparatus Transistor Resistors Capacitors Range/Type BC 147 100 Quantity 1 1 each 1 each

Procedure : 1. When an a.c signal is applied at the input , the amplified output voltage of the first stage is obtained at the coupling capacitor (C2). 2. The ouput of the amplifier for various input frequencies of the input voltage Vi, and the gain of the amplifier (V0/Vin) for different input frequencies can be found out. The curve has three regions: i). Low frequency region where the gain increases as input frequency increases.

ii). Mid frequency region is where the gain is constant. iii). High frequency region is where the gain decreases with increase in frequency.

Tabular Column Vin = ------volt S.No Frequency (in Hz) Output Voltage (in volts) Gain = 20 log(V0/Vin) (in dB)

Result: The RC coupled amplifier was designed , constructed and its frequency response curve was drawn. The Bandwidth amplifier was found to be --------- MHz.

Circuit diagram Input offset voltage

Tabulation

Expt No: 2 OP-AMP CHARACTERISTICS Aim:

Date:

To construct and verify i) Input offset voltage ii) Slew rate and bandwidth Apparatus required:

S. No 1 2 3 4 5 6

Equipments & Components Bread Board Op-amp Resistors Signal generator Oscilloscope Dual Power supply

Specifications

Qty 1

LM 741 watt

1 30 MHz +15V/ -15V 1 1

Procedure: i) Input offset voltage Connect the circuit Measure the DC output voltage at pin 6 using multimeter and record the result Calculate the input offset voltage using the formula Vi = Vout / 1000 ii) Slew rate and bandwidth Connect the circuit Using an AFO, provide a 1V peak to peak square wave with a frequency of 25 KHz. With an oscilloscope, observe the output of OPAMP. Adjust the oscilloscope timing the get a couple of cycles. Measure the voltage change V and time change T of the output waveform. Record the results Calculate the slew rate using the formula SR = V / T 6 and record the value

Circuit Diagram Slew rate and bandwidth

Model Graph

Tabulation

 Using the circuit, set the AFO at 1KHz. Adjust the signal level to get 20V peak to peak (20 VPP) out of the op-amp. Increase the frequency and watch the waveform somewhere above 10 KHz, slew rate distortion will become evident. That maximum frequency max at which the op-amp can be operated is called bandwidth of an op-amp record the value

Result:

The Input offset voltage and Slew rate and bandwidth circuits were designed and setup.

Modulation circuit

IN4001

m (t) C L V(t)

C(t)

Demodulation circuit

IN4001

R V (t)

m(t)

Expt No: 3 SQUARE LAW MODULATOR AND DEMODULATOR Aim 1. To generate an amplitude modulated wave. 2. To determine the depth of modulation. Apparatus Required S.No Appartus Required 1 2 3 4 Diode(IN4001) Capacitor Resistor Inductor 1nF 1.0610M 0.1014mH 2 2 1 1 Range Quantity

Date:

Procedure 1. The input voltage is given as the sum of message signal m(t) and carrier signal c(t) to the nonlinear device - diode and the output of the diode passes through the bandpass filter tuned at fc which produces the output signal containing only carrier frequency . 2. The output DSB- AM signal is given to the demodulator circuit (Envelope detector) to get back the message signal.

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Expected waveform

Circuit Design MODULATION: Fc = 500k Hz C = 1nF Fc= L = 0.104 mH. DEMODULATION: Fm = 150 Hz C = 1nF Fm= R = 1.0610 M The depth of modulation is calculated as,

11

12

Tabular Column S.no 1. 2. 3. 4. Signal Message Carrier AM modulated wave Demodulated wave Amplitude Frequency 150 Hz 500kHz 500kHz 150Hz

13

Result Thus, an amplitude modulated wave was generated and the depth of modulation was measured to be ----------- . The AM wave was successfully demodulated to get back the message signal.

14

Modulation Circuit
VCC

C R1 C in BF 194 C(t) R2 DSB AM output signal RE L C

C m(t)

Demodulation circuit
IN4001

R V (t)

m(t)

15

Expt No: 4

Date:

AMPLITUDE MODULATION AND DEMODULATION USING TRANSISTOR Aim To generate amplitude modulated signal using Common emitter amplifier circuit and demodulate it using Envelope detector. Apparatus Required S.no 1. 2. 3. 4. 5. Apparatus Diode(IN4001) Transistor Inductor Resistor Capacitor 22 nF BF 194 0.101mH Range Quantity 1 1 1 1 1

Procedure 1. The input voltage is given as the carrier signal c(t) at the base input of the transistor where the message signal is connected at the emitter of the transistor producing the AM signal after passing through the LC component . 2. The output DSB- AM voltage is given to the demodulator circuit (Envelope detector) to get back the message signal.

16

Expected waveform

Design MODULATOR VCC= 10 V; VCE= 5 V; C = 1nF; hfe = = 100; fc = 500kHz ; fm = 1kHz. = / +1 = 100/101 = 0.99 IE = IC / = 10 / 0.99 = 10.101mA VCC = VC= 10V VCE = VC VE = 5 V ; VE = 5 V RE = VE / IE = 5/10.101 = 495 Current through voltage divider bias ~ 0.1 IE i.e ., VCC / R1 + R2 = 0.1 * 10.101 mA 10 / R1 + R2 = 1.0101mA R1 + R2 = 9.9 k VBB= (R2 / R1 + R2).VCC = 1/3 VCC 3R2 = R1 + R2 = 9.9 k R2 = 3.3 k R1 = 6.6 k 17

18

C = 1nF , fc = 500kHz. fc = L = 0.101mH DEMODULATOR Fm = 1 kHz C = 1nF Fm= R = 159.14 k Tabular Column S.no 1. 2. 3. 4. Signal Message Carrier AM modulated wave Demodulated wave Amplitude Frequency 1 kHz 500kHz 500kHz 1 kHz

The depth of modulation is calculated as,

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Result Thus, an amplitude modulated wave was generated and demodulated. The depth of modulation is ----------.

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Circuit Diagram Non Inverting Amplifier

Rf

R1 a Vin -

+15V

IC741 + -15V

Vo

Design Applying nodal equation at node a, (Vo-Vin)/Rf = Vin/R1 Vo = Vin(R1+Rf)/R1 Then open loop gain A=Vo/Vin= 1+ (Rf / R1) Model Graph

Tabulation: Input Voltage Vin (V) Feedback Resister Rf (k) Output Voltage Vo(V) Practical Gain Vo/ Vin Theoritical Gain 1+ (Rf/R1)

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Expt No: 5 OP AMP APPLICATIONS Aim:

Date:

To construct and verify i) inverting amplifier ii) non inverting amplifier iii) voltage follower iv) Summer & v) Subtractor Apparatus required:

S. No 1 2 3 4 5 6 7

Equipments & Components Bread Board Op-amp Resistors Capacitors Signal generator Oscilloscope Dual Power supply

Specifications

Qty 1

LM 741 watt

1 1 30 MHz +15V/ -15V 1 1

Procedure:

The circuit is designed and wired up. For the inverting and non inverting amplifiers, the input is given to the corresponding terminals. For the feedback resistor Rf, either decade resistance box or fixed resistance can be used. Note the output. Compare the theoretical gain and practical gain. For the voltage follower note down the frequency response also.

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Circuit Diagram Inverting Amplifier

Design Because the node a is at virtual ground, on applying nodal equation (Vin Va) / R1 = (Va Vo) / Rf Vin / R1 = -Vo / Rf The closed loop voltage gain is Av = Vo/Vin= -( Rf / R1) Model Graph

Tabulation Input Voltage Vin (V) Feedback Resister Rf (k) Output Voltage Vo(V) Practical Gain -Vo/ Vin Theoritical Gain 1+ (Rf/R1)

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24

Circuit Diagram Voltage Follower Closed loop gain A = 1

+15V IC741 Vin + -15V Vo

Model Graph

Tabulation Input voltage Vin = Frequency (Hz) V Gain Vo / Vin Gain(dB) = 20 log (Vo / Vin)

Output voltage Vo (V)

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26

Circuit Diagram Summer

Rf +15V R1 V1 R2 V2 R3 V3 -15V IC741 + Vo

Design Applying nodal equation, V1/ R1 + V2/ R2 + V3/ R3 + VO/ Rf = 0 If R1 = R2 = R3 = Rf = R, the output voltage Vo is Vo = -(( Rf / R1)V1 + ( Rf / R2)V2 + ( Rf / R3)V3) Vo = - (V1 + V2 + V3) Tabulation V1 (V) V2 (V) V3 (V) Theoretical Vo = - (V1 + V2 + V3) Practical -Vo (V)

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28

Circuit Diagram Subtractor

Rf +15V R1

V1

IC741 Vo

V2 R1 Rf

+ -15V

Design Since there are two input signals, use superposition theorem. When V1 is applied and V2 = 0; Vo1 = - ( Rf / R1)V1 When V2 is applied and V1 = 0; Vip = ( Rf / (R1+ Rf )) V2 Vo2 = (1+ Rf / R1)) Vip The output voltage Vo = Vo1 + Vo2 = - ( Rf / R1)(V1 - V2)

Tabulation

V1 (V)

V2 (V)

Theoretical Vo = - (V1 - V2)

Practical -Vo (V)

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Result: The inverting, non inverting amplifiers, voltage follower circuits were designed and setup.

30

Circuit Diagram Differentiator

Design F = 1 / (2 R1 C1) Assuming f= kHz and C1 = 0.1F, = R = R1 / 10 R1C1 = RC = k k R1 = 1 / (2 C1 f) =

=> C = R1 C1 / R = = F

Tabulation Amplitude Vin (V) (p-p) Vo (V) (p-p) Time Period

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Expt No: 6 INTEGRATOR AND DIFFERENTIATOR Aim: To construct and verify i) Integrator ii) Differentiator.

Date:

Apparatus required:

S. No 1 2 3 4 5 6 7

Equipments & Components Bread Board Op-amp Resistors Capacitors Signal generator Oscilloscope Dual Power supply

Specifications

Qty 1

LM 741 watt

1 1 30 MHz +15V/ -15V 1 1

Procedure:

The circuit is designed and wired up. For the summing amplifier, the input voltages V1 and V2 ( < 5V ) are given and the corresponding output voltages are noted. For the integrator and differentiator input signals of frequency 1 KHz are given and corresponding output voltages are noted

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Model Graph

Circuit Diagram Integrator

R C1 R1 Vin IC741 + R1 -15V Vo +15V

33

34

Design F = 1 / (2 R1 C1) Assuming f= kHz and C1 = 0.01F, = R = 10 R1 = = k k R1 = 1 / (2 C1 f) =

Model Graph

Tabulation Amplitude Vin (V) (p-p) Vo (V) (p-p) Time Period

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Result:

The summer, integrator and differentiator circuits were designed and setup.

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Circuit diagram

Vr

Vo

R2 R1

Vin Expected waveform

Fig. 1 Circuit diagram

Vin 3V 2V

Vo Vsat -Vsat

Fig. 2 Output waveforms

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Expt No: 7 SCHMITT TRIGGER Aim

Date:

Design and implement a Schmitt trigger with a LTP = 2 V and UTP = 3 V. Obtain the voltage threshold characteristics (VTC) for the same. Apparatus required Sl no: 1 2 3 4 Components Op amp Resistors Probes Wires Specifications A 741 Quantity 1 2 3

Procedure i). Set up the circuit for Schmitt trigger and then switch on the supply. ii). Find out the LTP and UTP of the Schmitt trigger.

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Design Lower threshold point (LTP),

LTP
Upper threshold point (UTP),

Vr ( R1 R2 ) Vsat R1 R2

(1)

UTP

Vr ( R1 R2 ) Vsat R1 R2

(2)

Equation (1) and (2) are used to find the LTP and UTP of Schmitt trigger.

39

Result The lower threshold point (LTP) of Schmitt trigger is The upper threshold point (UTP) of Schmitt trigger is

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Circuit Diagram R3 R4 D1 D2

C Vo

R2

R1

Fig. 1 Circuit diagram for astable multivibrator Expected Waveform

Vo Vsat

-Vsat Vc +Vsat -Vsat

t Fig. 2 Waveform

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Expt No: 8

Date:

ASTABLE AND MONOSTABLE MULTIVIBRATOR USING OP-AMP Aim Design and implement an astable multivibrator that will produce a square wave output of frequency 1 KHz with Ton=10s. Design and implement a monostable multivibrator using 555 timers. The output should go high on receiving an appropriate trigger and remain high for 5 ms. Use op amp for this purpose. Apparatus Required Sl no: 1 2 3 4 5 6 Components Op amp Resistors Diodes Capacitors Probes Wires Specifications A 741 Quantity 2 8 4 3 3

Procedure i). Set up the circuit for astable and monostable multivibrator and then switch on the supply. ii). Observe the output voltage and capacitor voltage in a CRO.

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Circuit diagram

R4

Vo D2 C2 R2 D1 R1 R3 C1 Trigger

Fig. 3 Circuit diagram for monostable multivibrator Expected waveform Vo

Vsat

-Vsat Vc Vsat 0.7 t

43

44

Design For Astable multivibrator take = 0.5

ON time period (Ton) is given by,

R2 R2 R1

Ton 1.1 R3 C
OFF period (Toff) is given by,

Toff 1.1 R4 C
For monostable multivibrator take = 0.5
= R1 R2 + R1

ON period is given by
Ton = R4 C2 ln ( 1 ) 1

And differentiator circuit

R3C1 = 0.016 Ton

45

Result Output voltage and capacitor voltage waveforms were obtained.

46

Circuit Diagram

Vcc

D1

Vo R1 C

R2

C1 Trigger C2 -Vcc

Fig. 1 Circuit diagram for monostable multivibrator Expected waveform Vo

Vcc

-Vcc Vc (2Vcc)/3

t Fig. 2 Waveform

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Expt No: 9

Date:

ASTABLE AND MONOSTABLE MULTIVIBRATOR USING 555 TIMER Aim Design and implement an astable multivibrator that will produce a square wave output of frequency 1 KHz with Ton=10s. Design and implement a monostable multivibrator using 555 timers. The output should go high on receiving an appropriate trigger and remain high for 5 ms. Apparatus Required Sl no: 1 2 3 4 5 6 Components IC Resistors Diodes Capacitors Probes Wires 1N4001 Specifications 555 timer Quantity 2 4 2 5 3

Procedure Set up the circuit for astable and monostable multivibrator using 555 and then switch on the supply. ii). Observe the output voltage and capacitor voltage in a CRO. i).

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Circuit diagram

Vcc

R1

Vo C2 R2 D

C1 -Vcc

Fig. 3 Circuit diagram for astable Expected waveform Vo

Vcc -Vcc

(2Vcc)/3

(Vcc)/3 t Fig. 4 Waveforms

49

50

Design The condition to be satisfied by monostable multivibrator is

R1 C1 0.0016 TON

ON period (Ton) is given by

Ton 1.1 R2 C 2
The condition to be satisfied by astable multivibrator is
Ton = 0.69 R1C1

And OFF period is given by

Toff = 0.69 R2C1

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Result Output voltage and capacitor voltage waveforms were obtained.

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PLL Block Diagram

Input Phase comparator

L.P.F

Amplifier

VCO

Functional block diagram of 565:

2 3

VCO Phase detector Amplifier

control voltage 7 6 Reference output

VCO

Modulation circuit for FM

VCC = +12 V

10 7 LM 565 M(t)

RT CT

8 4 9 FM output

CT

VCC = -12 V

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Expt No: 10

Date:

FREQUENCY MODULATION USING VCO IN PLL CIRCUIT Aim To implement frequency modulation using voltage controlled oscillator in phase locked loop circuit APPARATUS REQUIRED S.No 1 2 3 Appartus Required IC PLL(LM565) Capacitor Resistor 1nF 30k Range Quantity 1 2 1

Procedure 1. The input signal m(t) given to the Phase Locked Loop containing the amplifier and VCO. 2. The output of the circuit is the FM modulated signal.

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Frequency Modulation

DESIGN fc = 10 kHz , fm = 1 kHz , C = 1 nF. fc = R = 30 k

Tabular Column S.No 1. 2. 3. Signal Message Carrier FM modulated wave Amplitude Frequency 500 Hz 2.5 kHz

55

Result Thus the frequency modulation using voltage controlled oscillator in phase locked loop circuit is performed and verified.

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