Rizki Anugrah Wibowo 1004405117

I Made Agung Pranata 1204405030

Made Danu Widana 1204405033
I Kadek Arya Wiratama 1204405038
Ketut Alit Sukertha Winaya 1204405043
Bhrama Sakti Karenda Putra 1204405082
Electrical Engineering Department
Udayana University
Summarized by:
Introduction of Operation Amplifier (Op-Amp)
Analysis of ideal Op-Amp applications
Comparison of ideal and non-ideal Op-Amp
Outlines
Non-ideal Op-Amp consideration
Vd
+

Vo
Rin~inf Rout~0
Input 1
Input 2
Output
+Vcc
-Vcc
Operational Amplifier (Op-Amp)
Very high differential gain
High input impedance
Low output impedance
Provide voltage changes
(amplitude and polarity)
Used in oscillator, filter
and instrumentation
Accumulate a very high
gain by multiple stages
d d o
V G V =
5
10 say large, y ver
normally gain al differenti :
d
G
IC Product
+

1
2
3
4
8
7
6
5
OFFSET
NULL
-IN
+IN
V
N.C.
V+
OUTPUT
OFFSET
NULL
+

1
2
3
4
8
7
6
5
OUTPUT A
-IN A
+IN A
V
V+
OUTPUT B
-IN B
+IN B
+

DIP-741 Dual op-amp 1458 device

Single-Ended Input
+

Vo
~
Vi
+

Vo
~
Vi
+ terminal : Source
terminal : Ground
0
o
phase change
+ terminal : Ground
terminal : Source
180
o
phase change
Double-Ended Input
~
V1
+

Vo
~
V2
+

Vo
~
Vd
Differential input

0
o
phase shift change
between V
o
and V
d
+
= V V V
d
Qu: What V
o
should be if,
V1
V2
(A) (B)
Ans: (A or B) ?
Distortion
Vd
+

Vo
+Vcc=+5V
Vcc=5V
0
+5V
5V
The output voltage never excess the DC voltage
supply of the Op-Amp
Common-Mode Operation
+

Vo
Vi
~
Same voltage source is applied
at both terminals
Ideally, two input are equally
amplified
Output voltage is ideally zero
due to differential voltage is
zero
Practically, a small output
signal can still be measured
Note for differential circuits:
Opposite inputs : highly
amplified
Common inputs : slightly
amplified
Common-Mode Rejection
Common-Mode Rejection Ratio (CMRR)
Differential voltage input :
+
= V V V
d
Common voltage input :
) (
2
1
+
+ = V V V
c
Output voltage :
c c d d o
V G V G V + =
G
d
: Differential gain
G
c
: Common mode gain
) dB ( log 20 CMRR
10
c
d
c
d
G
G
G
G
= =
Common-mode rejection ratio:
Note:
When G
d
>> G
c
or CMRR
V
o
= G
d
V
d
+

Noninverting
Input
Inverting
Input
Output
CMRR Example
What is the CMRR?
Solution :
dB CMRR and
V (2) From
V (1) From
V V
V V
40 ) 10 / 1000 log( 20 10 1000
60700 70 60
80600 60 80
70
2
40 100
60
2
20 100
60 40 100 80 20 100
2 1
2 1
= = = =
= + =
= + =
=
+
= =
+
=
= = = =
c d
c d o
c d o
c c
d d
G G
G G V
G G V
V V
V V
+

100V
20V
80600V
+

100V
40V
60700V
(1)
(2)
Op-Amp Properties
(1) Infinite Open Loop gain
- The gain without feedback
- Equal to differential gain
- Zero common-mode gain
- Pratically, G
d
= 20,000 to 200,000
(2) Infinite Input impedance
- Input current i
i
~0A
- T-O in high-grade op-amp
- m-A input current in low-grade op-amp
(3) Zero Output Impedance
- act as perfect internal voltage source
- No internal resistance
- Output impedance in series with load
- Reducing output voltage to the load
- Practically, R
out
~ 20-100 O
+

V1
V2
Vo
+

Vo
i1~0
i2~0
+

Rout
Vo'
Rload
out load
load
o load
R R
R
V V
+
' =
Frequency-Gain Relation
Ideally, signals are amplified
from DC to the highest AC
frequency
Practically, bandwidth is limited
741 family op-amp have an limit
bandwidth of few KHz.
Unity Gain frequency f
1
: the
gain at unity
Cutoff frequency f
c
: the gain
drop by 3dB from dc gain G
d
(Voltage Gain)
(frequency)
f1
Gd
0.707Gd
fc
0
1
GB Product : f
1
= G
d
f
c
20log(0.707)=3dB
GB Product
Example: Determine the cutoff frequency of an op-amp having a unit
gain frequency f1 = 10 MHz and voltage differential gain G
d
= 20V/mV
Sol:
Since f
1
= 10 MHz
By using GB production equation
f
1
= G
d
f
c
f
c
= f
1
/ G
d
= 10 MHz / 20 V/mV
= 10 10
6
/ 20 10
3
= 500 Hz
(Voltage Gain)
(frequency)
f1
Gd
0.707Gd
fc
0
1
10MHz
? Hz
Ideal Vs Practical Op-Amp
Ideal Practical
Open Loop gain A
10
5
Bandwidth BW
10-100Hz
Input Impedance Z
in
>1MO
Output Impedance Z
out
0 O 10-100 O
Output Voltage V
out
Depends only
on V
d
= (V
+
V

)
Differential
mode signal
Depends slightly
on average input
V
c
= (V
+
+V

)/2
Common-Mode
signal
CMRR
10-100dB
+

~
AVin
Vin Vout
Zout=0
I deal op-amp
+

AVin
Vin
Vout
Zout
~
Zin
Practical op-amp
Ideal Op-Amp Applications
Analysis Method :
Two ideal Op-Amp Properties:
(1) The voltage between V
+
and V

is zero V
+
= V

(2) The current into both V

+
and V

termainals is zero
For ideal Op-Amp circuit:
(1) Write the kirchhoff node equation at the noninverting
terminal V
+
(2) Write the kirchhoff node eqaution at the inverting
terminal V

(3) Set V
+
= V

and solve for the desired closed-loop gain

Noninverting Amplifier
(1) Kirchhoff node equation at V
+
yields,
(2) Kirchhoff node equation at V

yields,
(3) Setting V
+
= V

yields
or
+
Vin
Vo

Ra
Rf
i
V V =
+
0
0
=

f
o
a
R
V V
R
V
0 =

+
f
o i
a
i
R
V V
R
V
a
f
i
o
R
R
V
V
+ = 1
+

vi
Ra
vo
v-
v+
Rf
+

vi
Ra
vo
v-
v+
Rf
R2
R1
+

vi
vo
v-
v+
Rf
+

vi
vo
v-
v+
Rf
R2
R1
Noninverting amplifier Noninverting input with voltage divider
i
a
f
o
v
R R
R
R
R
v ) )( 1 (
2 1
2
+
+ =
Voltage follower
i o
v v =
i
a
f
o
v
R
R
v ) 1 ( + =
Less than unity gain
i o
v
R R
R
v
2 1
2
+
=
Inverting Amplifier
(1) Kirchhoff node equation at V
+
yields,
(2) Kirchhoff node equation at V

yields,
(3) Setting V
+
= V

yields
0 =
+
V
0
_
=

f
o
a
in
R
V V
R
V V
a
f
in
o
R
R
V
V

=
Notice: The closed-loop gain V
o
/V
in
is
dependent upon the ratio of two resistors,
and is independent of the open-loop gain.
This is caused by the use of feedback
output voltage to subtract from the input
voltage.
+

~
Rf
Ra
Vin
Vo
Multiple Inputs
(1) Kirchhoff node equation at V
+
yields,
(2) Kirchhoff node equation at V

yields,
(3) Setting V
+
= V

yields
0 =
+
V
0
_
=

c
c
b
b
a
a
f
o
R
V V
R
V V
R
V V
R
V V

=
=
|
|
.
|

\
|
+ + =
c
a j
j
j
f
c
c
b
b
a
a
f o
R
V
R
R
V
R
V
R
V
R V
+

Rf
Va
Vo
Rb
Ra
Rc
Vb
Vc
Inverting Integrator
Now replace resistors R
a
and R
f
by complex
components Z
a
and Z
f
, respectively, therefore
Supposing
(i) The feedback component is a capacitor C,
i.e.,
(ii) The input component is a resistor R, Z
a
= R
Therefore, the closed-loop gain (V
o
/V
in
) become:
where
What happens if Z
a
= 1/jeC whereas, Z
f
= R?
Inverting differentiator
in
a
f
o
V
Z
Z
V

=
C j
Z
f
e
1
=
}

= dt t v
RC
t v
i o
) (
1
) (
t j
i i
e V t v
e
= ) (
+

~
Zf
Za
Vin
Vo
+

~
R
Vin
Vo
C
Op-Amp Integrator
Example:
(a) Determine the rate of change
of the output voltage.
(b) Draw the output waveform.
Solution:
+

R
Vo
Vi
0
+5V
10 kO
0.01F
C
Vo(max)=10 V
100s
(a) Rate of change of the output voltage
s mV/
F k
V

50
) 01 . 0 )( 10 (
5
=
O
= =
A
A
RC
V
t
V
i o
(b) In 100 s, the voltage decrease
V s s mV/ 5 ) 100 )( 50 ( = = A
o
V
0
+5V
0
-5V
-10V
Vi
Vo
Op-Amp Differentiator
RC
dt
dV
v
i
o
|
.
|

\
|
=
+

R
C
Vo
Vi
0
to t1 t2
0
to t1 t2
Non-ideal case (Inverting Amplifier)
+

~
Rf
Ra
Vin
Vo
3 categories are considering
Close-Loop Voltage Gain
Input impedance
Output impedance

Equivalent Circuit
Rf
Ra
Vin
Vo
+

Rt
Ro
Vt
-AVt
+

AVin
Vin
Vout
Zout
~
Zin
Practical op-amp
Close-Loop Gain
Rf
Ra
Vin
Vo
+

Rt
Ro
-AVt
Ra Rf
Rt
Vt
Vt
Vin Vo
Applied KCL at V terminal,
0 =

f
o
a
in
R
V V
R
V
R
V V
t
t
t t
By using the open loop gain,
t
AV V
o
=
0 = + + + +
f
o
f
o o
a
o
a
in
AR
V
R
V
AR
V
AR
V
R
V
t

f a
a a f a f
o
a
in
R R AR
R AR R R R R R R
V
R
V
t
t t t
+ + +
=
The Close-Loop Gain, A
v
t t t
t
R AR R R R R R R
R AR
V
V
A
a a f a f
f
in
o
v
+ + +

= =
Close-Loop Gain
When the open loop gain is very large, the above equation become,
a
f
v
R
R
A

~
Note : The close-loop gain now reduce to the same form
as an ideal case
Input Impedance
Rf
Ra
Vin
Vo
+

Ro
-AVt
R'
Rt
Vt
Rf
+

Ro
-AVt
if
Vt
Input Impedance can be regarded as,
R R R R
a in
' + = //
t
where R' is the equivalent impedance
of the red box circuit, that is
f
i
V
R
t
= '
However, with the below circuit,
A
R R
i
V
R
R R i AV V
o f
f
o f f
+
+
= = '
+ =
1
) ( ) (
t
t t
Input Impedance
Finally, we find the input impedance as,
1
1 1

(
(

+
+
+ + =
o f
a in
R R
A
R
R R
t
t
t
R A R R
R R R
R R
o f
o f
a in
) 1 (
) (
+ + +
+
+ =

Since,
t
R A R R
o f
) 1 ( + << +
, R
in
become,
) 1 (
) (
~
A
R R
R R
o f
a in
+
+
+
Again with
) 1 ( A R R
o f
+ << +
a in
R R ~
Note: The op-amp can provide an impedance isolated from
input to output
Output Impedance
Only source-free output impedance would be considered,
i.e. V
i
is assumed to be 0
Rf
Ra
Vo
+

Ro
-AVt
Rt
Vt
io
Vt
Vo
Rf
Ra Rt
+

Ro
-AVt
Vo
i2 i1
(a) (b)
Firstly, with figure (a),
o
f a f a
a
o
a f
a
V
R R R R R R
R R
V V
R R R
R R
V
t t
t
t
t
t
t
+ +
=
+
=
//
//
By using KCL, i
o
= i
1
+ i
2
o
o
f a f
o
o
R
AV V
R R R
V
i
) (
//
t

+
+
=
By substitute the equation from Fig. (a),
t t t
t t
R R A R R R R R R R
R R R R R R R
i
V
R
a f a f a o
f a f a o
o
o
out
) 1 ( ) )( 1 (
) (
is impedance, output The
+ + + + +
+ +
=
R
t
and A comparably large,
a
f a o
out
AR
R R R
R
) (
~
+