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Confidential

Confidential

(See last page for obligations) Confidential Confidential STDP9320, STDP9310, STDP9210 STDP7320, STDP7310 Athena —

STDP9320, STDP9310, STDP9210 STDP7320, STDP7310

Athena — Premium high resolution multimedia monitor controller with 3D video

Features

Single-chip WQXGA (2560 x 1600) monitor scaler (STDP93x0)

Single-chip 3D FHD (1920 x 1080 120 Hz)

monitor scaler (STDP9210)

Single-chip WUXGA (1920 x 1200) monitor

scaler (STDP73x0)

Integrated DisplayPort® (DP) 1.2 compliant Rx

and Tx with support for eDP, multistream, and

3D video formats

Video processing supports full or partial

capture of 4096 x 2160 format scaled to 2560 x

2160 output format

Integrated HDMI 1.4 receiver to support 3D video

Integrated dual-DVI receiver to support 3D

video

10-bit triple ADCs (sampling rate up to 205 MHz)

Integrated 2:1 MUX to receive VGA and

component input

High-speed dual LVDS Tx (STDP73x0) or

quad LVDS Tx (STDP93x0/STDP9210)

Advanced PIP/PBP for all input sources

Preliminary data

DDR2/DDR3 memory interface 32 bits wide (STDP93x0/STDP9210) or 16 bits wide

(STDP73x0)

Supports daisy chaining of monitors of up to four streams (STDP9320/STDP7320)

Video window detection for multimedia content

display

Panel backlight RGB uniformity compensation

Advanced Faroudja ® video processing: MADi

and DCDi

6-axis color control independent of ACC

On-chip microprocessor

Advanced bit-mapped OSD controller

3D Frame Rate Conversion (FRC) and

advanced overdrive to support 3D video

4Kx2K screen resolution support

Applications

Multifunctional monitors including 3D monitor,

max input and output resolution up to WQXGA

(STDP93x0), FHD (STDP9210), and WUXGA

(STDP73x0)

DDR2 / DDR3 x16 / x32 533 Mhz / 1066 Mbps COMP_HD ATHENA MEMORY CONTROLLER
DDR2 / DDR3 x16 / x32
533 Mhz / 1066 Mbps
COMP_HD
ATHENA
MEMORY CONTROLLER
VGA RGB
MEMORY CONTROLLER – CLIENT INTERFACE
GRAPHICS AFE
RGB-YUV
Source
OSD
LINE_IN_R
LINE_IN_L
VXI PORT
LVDS
SPK
AMP
RTC (LCD Overdrive)
HP_OUT
AVSYNC
AUDIO DAC &
HPAMP
SPDIF_OUT
DUAL-LUT
I2S_OUT
COLOR CORR
External Audio
AUDIO OUT
I2S / SPDIF
DSP
BL UNIFORMITY
SPDIF_IN
COLOR WARP
AUDIO IN
I2S_IN
I2S / SPDIF
DP1.2 /
DISP
FS Bridge
DRAM CACHE
ENGINE
eDP /iDP
DPRX0
Combo In 0
COMBO PHY0
x186 OCMBus
Combo Phy Inputs
HDMI
5.4Gbps max
Displayport1.1a.
HDMI 1.3,1.4
Combo In 1
COMBO PHY1
SRAM
KEY OTP
Turbo186 OCM
DVI1.0
DVI-RX
IROM
DualDVI
Power Detect Logic &
LPM Logic & OCM
CLK/PLLS
Combo In 2
PERIPHERAL INTERFACEs
COMBO PHY2
DP RX1
DDC,HPD,HS/V
S
FLASH
27 MHz
VGA
INPUT MUX
IMP:
IPP:
IBD, IVP
MADI, TNR2, AFM, IBD, PXL
Cr
PIP Horz & Vert DCDi
Scaler
MAIN H & V DCDi
SCALER, MPEGNR
FRC
FRC
OVP MUX
to 4:4:4
to 4:4:4
ACC3
ACM 3D
Color Convert
Color Convert
PIP BLENDER
OSD Blender
PANEL INTERFACE

May 2012

Doc ID C93x0-DAT-01 Rev F

1/137

Contents

STDP93xx, STDP92xx, STDP73xx

Information classified Confidential - Do not copy (See last page for obligations)

Confidential

Confidential

Contents

1 Application overview

 

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2 Description

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3 Main features

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3.1 Resolutions

 

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3.2 Dual integrated DisplayPort receivers

 

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3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

3.12

3.13

3.14

3.15

3.16

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Integrated HDMI 1.4 receiver

Dual integrated DVI receiver

Analog video input port

TTL video input port

Dual input video capture ports

Audio input and output system

3D monitor support

Active video window detection and enhancement

Video image processing

Faroudja technology for image quality

Output video processing

DDR memory controller

Output ports

On-chip microprocessor and OSD controller

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4 System-on-chip subsystem overview

 

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4.1 Power domains

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4.2 Clock generation

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4.3 Hardware cold reset

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4.4 Input video ports

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4.5 Factory and display calibration

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4.6 Input Format Measurement (IFM)

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4.7 Input video processing

 

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4.8 3D format capture and processing

 

4.9 DCDi® by Faroudja® video processing

 

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35 . . . . . . . . . . . . . . .

STDP93xx, STDP92xx, STDP73xx

Contents

Information classified Confidential - Do not copy (See last page for obligations)

Confidential

Confidential

5

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4.10 Frame store interface

 

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4.11 Output data processing

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4.12 Display output interface

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4.13 Energy Spectrum Management TM (ESM)

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4.14 Audio subsystem

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4.15 High-Bandwidth Digital Content Protection (HDCP)

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4.19

4.18

4.17

4.16

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. General Purpose Inputs and Outputs (GPIOs)

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On Screen Display (OSD)

. On-Chip Microcontroller (OCM)

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Host register interface

BGA footprint and ball lists

5.1

5.2

5.3

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Ball grid array

STDP93xx / 92xx / 73xx ball out

Ball lists

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Bootstrap configuration

Packages

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7.1

7.2

Solder reflow profile

ECOPACK®

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Electrical specifications

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8.1

8.2

Preliminary DC characteristics: absolute maximum ratings

Preliminary AC characteristics

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Terminology

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Revision history

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List of tables

STDP93xx, STDP92xx, STDP73xx

Information classified Confidential - Do not copy (See last page for obligations)

Confidential

Confidential

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Athena selection table

. TCLK specifications ADC characteristics

. STDP73xx DDR speed STDP93xx/STDP92xx DDR speed

Analog audio input and output signal specifications

Digital input/output configuration Low bandwidth ADC specification

Mission GPIO signals

LPM GPIO signals

DDR interface

TTL video input port

Analog video input port .

Analog audio input

LPM general purpose

LPM digital inputs and outputs

DP/HDMI/DVI combo analog receivers

Mission multi-function

System control

DisplayPort analog transmitter

LVDS analog

Power supplies

Bootstrap signals

STDP9320 JEDEC standard package

STDP9310, STDP9210 JEDEC standard package dimensions

STDP7320, STDP7310 JEDEC standard package dimensions

Absolute maximum ratings

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Standby low power operating mode

Maximum speed of operation

Digital input ports—DIP timing

I2S input port timing

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LVDS AC charateristics (even and odd channels)

LVDS DC characteristics

. DDR interface write timing DDR interface read timing

SPI port timing

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DC

Power domains

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