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3, SEPTEMBER 2009

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Z-Source-Inverter-Based Flexible Distributed Generation System Solution for Grid Power Quality Improvement
Chandana Jayampathi Gajanayake, Member, IEEE, D. Mahinda Vilathgamuwa, Senior Member, IEEE, Poh Chiang Loh, Member, IEEE, Remus Teodorescu, Senior Member, IEEE, and Frede Blaabjerg, Fellow, IEEE

AbstractDistributed generation (DG) systems are usually connected to the grid using power electronic converters. Power delivered from such DG sources depends on factors like energy availability and load demand. The converters used in power conversion do not operate with their full capacity all the time. The unused or remaining capacity of the converters could be used to provide some ancillary functions like harmonic and unbalance mitigation of the power distribution system. As some of these DG sources have wide operating ranges, they need special power converters for grid interfacing. Being a single-stage buckboost inverter, recently proposed Z-source inverter (ZSI) is a good candidate for future DG systems. This paper presents a controller design for a ZSI-based DG system to improve power quality of distribution systems. The proposed control method is tested with simulation results obtained using Matlab/Simulink/PLECS and subsequently it is experimentally validated using a laboratory prototype. Index TermsDistributed generation (DG), power quality, Z-source inverter (ZSI).

Fig. 1.

Grid-connected ZSI topology.

I. INTRODUCTION

ISTRIBUTED generation (DG) has been gaining increasing attention in recent times. Among widely used DGs are wind turbines, gas turbines, fuel cells and solar cells. Generally, these sources are connected to the grid through inverters and the main function of the inverters is to deliver active power to the grid. Usually, they are operated at unity power factor but some of the systems are designed to inject or absorb reactive power. However, DG systems may not supply power to the grid continuously due to many factors like the unavailability of source and demand and price considerations. In such scenarios, the inverter used in power conversion has some unused capacity. This could be used to provide certain ancillary functions like harmonic and unbalance mitigation of the power distribution system [1]. The advantage of this approach is that a distribution-network operator who has serious power quality problems can rely on the capabilities of DG systems to provide solutions to such problems rather than implementing expensive tailor-made solutions.

Manuscript received March 27, 2008; revised December 2, 2008. Current version published August 21, 2009. Paper no. TEC-00187-2008. C. J. Gajanayake, D. M. Vilathgamuwa, and P. C. Loh are with the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore (e-mail: Chan0178@ntu.edu.sg; emahinda@ntu. edu.sg; epcloh@ntu.edu.sg). R. Teodorescu and F. Blaabjerg are with the Institute of Energy Technology, Aalborg University (AAU), Aalborg 9220, Denmark (e-mail: ret@iet.aau.dk; b@iet.aau.dk). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TEC.2009.2025318

Present day power consumers face numerous power quality problems. Among them are harmonics and unbalances which are of great concern. With tremendous increase of nonlinear loads connected at distribution level and with their concerted action of drawing nonlinear currents, such loads cause deterioration of voltage quality [1][4]. This may lead to malfunctioning of sensitive loads. The regulatory bodies have specied acceptable harmonic levels that are allowed into grids and harmonic levels that have to be maintained by the utilities [5]. DG systems are still not widely used for ancillary functions in power distribution systems. With the implementation of exible DG systems, it would indeed be possible to have integrated functions like harmonic and unbalance mitigation and zero-sequence component suppression schemes embedded in DG control systems. New trends in power electronic converter systems make the implementation of such multiple functions increasingly feasible [1][4]. Having identied such possibilities, the main theme of this paper is to exploit the remaining capacity of DG power converter systems, and reduce the cost of installing dedicated units for carrying out ancillary services. Particularly, in the distribution level, it may not be economical to have dedicated systems to handle such ancillary services. The proposed DG system is based on recently introduced Z-source inverter (ZSI) [6]. ZSI is structurally different from traditional voltage source inverter (VSI) or current source inverter (CSI) due to the presence of X-shaped impedance network (see Fig. 1). It has additional control freedom with the presence of shoot-through interval whereas VSI has only active and null states. Shoot-through is avoided in VSI to protect switching devices. With the presence of inductors in the Z-source impedance network, ZSI allows safe shoot-through of inverter arms and boosting of voltage across the Z-source capacitor. With ZSI, the need of two-stage inverter topology that usually comprises of boost dc/dc converter and VSI can be avoided. Steady-state analysis [6], modulation methods [7], and dynamic modeling

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and analysis [8], [9] of ZSI have already been studied in detail. With rapid growth of numerous renewable and green energy technologies, ZSI topology provides DG operators greater exibilities in interfacing their sources to the mains [10][12]. This paper proposes a exible DG system designed to operate in two different modes. In the rst mode, the DG system would inject the desired amount of power into the grid, and the controllers are designed to reduce the harmonics in the injecting current. This mode is termed as the current improvement mode. In case the inverter does not operate in its full capacity, the remaining capacity is utilized to improve the total harmonic distortion (THD) of the voltage at the connecting bus in the second mode and is termed as the voltage improvement mode. Two different methods are considered for selecting harmonics and generating harmonic current references in this mode. In the rst method, all the harmonic voltages are extracted using a high-pass lter employed in the rotating reference frame and in the second method the dominant harmonic voltages are extracted in the stationary reference frame. The proposed current controllers in the current and voltage improvement modes are in the stationary reference frame and they use p+resonance technique along with resonance lters acting in tandem. The use of the p+resonance controller would help in tracking the fundamental current component effectively. Resonance lters that are employed to improve harmonic quality are designed using a simple time delay. A current limiting algorithm is proposed for the second mode of operation and a multiplying factor used in the reference current generation algorithm is adaptively tuned so that the inverter capacity is fully utilized for delivering the desired power ow and for carrying out ancillary services without overloading the inverter. A separate dc-side controller is designed for the variations in the dc source. The proposed ac-side controller gives good reference tracking and harmonic performance. The overall converter control system is simulated using MATLAB/Simulink and PLECS. Furthermore, performances are validated with experimental results obtained using a laboratory prototype. II. CURRENT CONTROL USING P+RESONANCE AND REPETITIVE CONTROLLERS Power quality of grid-connected inverters is one of the major aspects that need to be considered when designing DG systems. IEEE 1547 species the standards for interconnecting distributed resources with electric power systems and the conditions that have to be met in terms of voltage, frequency, and other quality measurements. Additionally, IEEE 519 and IEEE 929 specify the harmonic limits of the grid-connected inverters in detailed manner. It is important to meet these standards when connecting new DG systems to ensure quality of supply. To meet these harmonic limits, a current controller capable of mitigating harmonics needs to be designed. Although, synchronous frame PI controllers are widely used in grid-connected inverters, they would only eliminate disturbances occur either in positive or negative synchronous reference frames [13]. This problem could be overcome by having controllers designed in both positive and negative sequence reference frames. However,

Fig. 2. Time-delay controller. (a) Negative feedback. (b) Positive feedback. (c) Modied negative feedback time controller.

their effectiveness in eliminating harmonics does not meet IEEE standards, and therefore, specic harmonic compensators need to be utilized to that effect. A new control method based on p+resonance technique (1) is proposed [14]. In the controller given in (1), KP is proportional gain, KI is integral gain, and is the system angular frequency. This controller is designed based on the internal model principle and is operated in the stationary reference frame. The main advantage of the p+resonance controller is that it does not need two separate positive and negative sequence reference frame controllers for eliminating positiveand negative-sequence disturbances. Moreover, the performance of this controller can be further improved by incorporating tuned resonance lters as in (2) [15], [16]. In (2), KI h is harmonic gain and h is harmonic number GC = KP + GC H = KP +
h =1 , 3 , 5 , 7 ...

s2

KI s + 2 s2 KI h s . + 2

(1) (2)

In the literature of repetitive controllers, it has been proven that a time-delay feedback system can be used to achieve the performance of tuned lters [17] paving the way for a simpler controller implementation. As such, in this paper, a time-delay controller is considered for harmonic control. There are two ways of implementing the simple time-delay controller, namely using a negative feedback [see Fig. 2(a)], or positive feedback [see Fig. 2(b)], delay line. Their mathematical models are given in (3) and (4), respectively [17]. In (3), k is an integer GT N = GT P = = 1 = 2 1 + e s/ 1 1 e(2 s/ ) (4) 1 2s 1 2s + + + 2 + . 2 2 s s2 + 2 s + (2 )2
k =1

e s/ 2 (3) (s2 /((2k 1)2 2 ) + 1)

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Fig. 3.

Combined p+ resonance and time-delay controller.

It can be seen from the transfer function of positive feedback delay line in (4) that there are resonance terms at all the harmonic frequencies including the origin. This may lead to amplication of even harmonics and dc quantities. Therefore, when the DG system is operated to reduce voltage harmonics at the point of common coupling (PCC), there is a risk of getting unwanted harmonics amplied. Whereas, with negative feedback delay line, resonance peaks are produced only at odd harmonics. The mathematical model of the negative feedback delay line is given in (3), and it exhibits resonance at the fundamental frequency and at odd harmonics. Therefore, this structure is preferred in correcting grid harmonics. Furthermore, the time-delay line is multiplied with a constant kL and is passed through a low-pass lter, as shown in Fig. 2(c), in order to introduce effective damping as reported in [17]. The transfer function of the time-delay controller has an array of imaginary poles placed at the imaginary axis, therefore, the system is marginally stable. With the introduction of constant kL , poles move away from the imaginary axis. The magnitude of the kL determines the direction of the pole movement and it should be less than unity to shift the poles to the left-hand side to avoid instability. This change, however, increases the bandwidth of the controller and reduces the sensitivity to small frequency variations. The inclusion of low-pass lter prevents feeding back of high-frequency noise and its amplication. Due to these changes when the controller is implemented in a digital controller, it shows a signicant settling time following a transient. Although it is possible to improve the reference tracking with increased gain, with the time-delay controller, it is not possible to tune each resonance term independently. This inability signicantly inuences the tracking of the fundamental frequency component. Increase in common gain factor leads to resonance and amplication of some higher order harmonics. Therefore, it is necessary to limit the gain of the time-delay controller while removing the most critical harmonics from the system. The reduction in gain could result in additional steady-state errors when tracking the fundamental component. This would compromise the main function of the DG system by making the controller ineffective. The proposed combined time-delay and p+resonance controller is shown in Fig. 3. III. ZSI-BASED FLEXIBLE DG SYSTEM A. Principle of Operation There are numerous control methods that can be used with DG systems to support different aspects of power quality improvement such as harmonic mitigation, sag compensation, and

Fig. 4. Schematic diagram of (a) DG system and (b) reference current generator.

reactive power controlling [3], [18]. However, focus of this paper is limited to the aspect of harmonic mitigation. Fig. 4(a) shows the schematic diagram of the considered DG system, which consists of a typical DG inverter, a linear load, and a nonlinear load that is connected to the grid at the PCC. The nonlinear load distorts the voltage at the PCC and the injecting current of the inverter. When the DG power source operates in its full capacity or in the rst mode, the current references required for delivering specied active and reactive power are derived, as shown in Fig. 4(b). The main objective is to deliver a balanced set of currents into the system. Therefore, positive sequence components of the grid voltages are obtained by passing grid voltages through sequence lters [19] and transforming their output into the stationary reference frame. Thereafter, voltage sequence components V and V , and specied power levels and P and Q are used to calculate the current references I I according to instantaneous power theory [20] as given in (5) and (6). In the second mode, voltage distortion at the PCC can be mitigated with the use of measured PCC voltage and two methods that are proposed to improve the voltage quality, as described in next section
= I I =

V V P 2 2Q 2 +V2 V V + V V V P + 2 2Q . 2 +V2 V V + V

(5) (6)

B. Simple Harmonic Elimination Method Fig. 5 shows the reference current generation scheme in the voltage improvement mode, in which the harmonic voltages (V h , V h ) are extracted from the measured voltage. This method does not require any additional measurements as the PCC voltages are already measured to generate the PLL signals. First, consider the simple harmonic extraction method where the measured voltages are transformed into the synchronous reference frame and a high-pass lter with low cutoff frequency is

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Fig. 5.

Simple current reference generations.

used to remove the fundamental component. However, to prevent amplication of high-frequency switching components, a low-pass lter is also cascaded. The extracted harmonic voltages are multiplied with a constant (K1 ) to generate the harmonic current references. The generated additional reference signals are added to the reference signals generated in the rst mode given in (5) and (6). The resultant current references are given in (7) and (8) in which V h and V h are ltered harmonics voltage components of - and -axis, respectively. The constant value (K1 ) should be selected based on the capacity of the inverter and the THD level at the PCC [1], [4], [21]
= I I =

Fig. 6. Improved harmonic controllers. (a) Harmonics lter. (b) Reference generator.

V V P 2 2 Q K1 V h 2 +V2 V V + V V V P+ 2 2 Q K1 V h . 2 +V2 V V + V

(7) (8)

With this controller, it would be possible to improve the voltage quality at the PCC. However, the possibility of fully correcting the THD level at the PCC depends on the available capacity of the inverter and the grid impedance between the mains and the PCC. With strong grid conditions, the effect of smaller nonlinear loads would not greatly inuence the voltage harmonic level at the PCC. In weak grids, inverters need to have a large capacity to inuence the voltage harmonic level, otherwise only a partial correction would be possible. The proposed ancillary service should not hinder the basic function of delivering active and reactive power by the DG unit. Therefore, the current references have to be generated to deliver the desired active power and reactive power rst and then, additional reference signals are to be added to the original current references to improve the power quality. C. Improved Harmonic Elimination Method In the previous section, harmonic reference currents are generated using extracted harmonic voltages with the use of highpass lters to enable fast transient response. Similar methods are commonly applied in active lter systems [2]. However, the use of high-pass lter could result in a phase delay in higher order harmonic components compromising the proper compensation of harmonics [22]. Therefore, selective harmonic compensation would be more appropriate with the consideration of the harmonic characteristics of the distribution network or particular

loads connected at the PCC where inuences of a particular harmonic component can be signicant [1], [4], [15]. In contrast to the previous method, the reference generation and controllers are fully implemented in the stationary reference frame in the proposed method. The current reference is generated with the use of harmonic voltages that are passed through a bank of resonance lters tuned at individual harmonic frequencies. However, the problem of employing second-order resonance lter is that, it has innite gain at the tuned frequency. Therefore, to increase the bandwidth and to avoid unwanted amplication of a particular harmonic component, a rst-order damping term is introduced in the denominator of the lter transfer function given as follows: Gh = KI h s 2. s2 + C h s + h (9)

where h is the harmonic number (h = 5, 7, 11), h is the harmonic angular frequency, and ch is the cutoff angular frequency of hth harmonic. KI h is the gain corresponding to the harmonic number h. The harmonic lter separates each harmonic component, which is then multiplied with a constant value, as shown in Fig. 6(a). A unique gain value could be selected for each harmonic component such that it acts as a weighting factor when the harmonics are compensated. A simpler method would be to use a common value for all the harmonic components. D. Current Limiting Algorithm As described in the previous sections, harmonic current injection is limited by the inverter capacity and this would limit the capability of the inverter to compensate the voltage harmonics at the load bus. Furthermore, weak grid conditions inuence the

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property of the two-converter systems, separate controllers are designed for ac- and dc-side subsystems. The ac-side controllers are designed in the stationary reference frame and an indirect controller is designed for the dc side to maintain a constant voltage across the capacitor in the Z-source impedance network. The dc-side controllers are designed based on the small signal model of the Z-source impedance network.

A. Mathematical Model and AC-Side Controller

Fig. 7. Reference generator with embedded current limiter.

harmonic correction as the inverter requires a higher injecting current to correct the harmonic level by the same percentage than that is needed with a rigid grid. Therefore, changes in grid impedance and the remaining capacity of the inverter necessitate the multiplying factor used in the harmonic current reference generation to be varied. A large multiplying factor results in an excessive current and that could damage the inverter. Therefore, the proper selection of the factor is essential. This section proposes a method that could be used to determine the required multiplying factor. Fig. 7 shows the block diagram representation of the proposed current limiting algorithm that is embedded in the reference current generator. Generally, the rms value of the current or voltage in the power controller is calculated in the synchronous reference frame [3], [18]. In the synchronous reference frame, the fundamental component of balanced three-phase signals is a dc quantity. However, with the presence of harmonics and unbalanced components, the calculated rms value of three-phase signals would have a ripple component. If such a simple rms calculation is employed to determine the multiplying factor, this could further distort the voltage. Therefore, it is proposed that the rms value is calculated using a moving window rms calculator where the rms value is calculated for acquired samples within a length equal to half the fundamental period and each time a new sample is taken the oldest sample is removed. Thereby, the rms value is updated with the time and the generated rms value is kept free from ripple components. The moving window rms value of measured current is compared with the maximum current limit of the inverter and the error signal generated in the compensator is passed through a proportionalintegral (PI) controller to obtain the factor K1 adaptively. Whenever there is a change in other system parameters, the PI controller would adjust the gain factor so that the remaining capacity of the inverter is fully utilized and the damage to the inverter by excessive current ow is prevented. IV. MODELING OF ZSI CONTROLLER DESIGN Comprehensive modeling and closed-loop controller design for a stand-alone-type ZSI-based DG system have been considered in [9] in which ZSI is modeled as a combination of boost dc/dc converter and inverter having slow and fast dynamic characteristics, respectively. By considering time-scale decoupling

As mentioned in previous sections, the ac-side controllers are designed to operate in two different modes, the current improvement mode (rst mode) and the voltage improvement mode (second mode). The ac-side controllers consist of two parts, namely reference generation and current controlling. As discussed in the previous section, when the inverter operates in the current improvement mode, it injects currents with near sinusoidal shape. The system is put into this mode when the DG source is closer to the capacity of the inverter. In the voltage improvement mode, in addition to active power injection, the voltage quality at the PCC would also be enhanced. The operational mode is simply selected by adjusting the variable gain (K1 ). When the system is operated in full capacity the gain (K1 ) is adjusted to zero, thereby putting the inverter into the current improvement mode. When the system is operated below the rated capacity, the gain (K1 ) needs to be changed to improve the VTHD with the consideration of the limits of the inverter system. For controlling the inverter, the output current and voltage at PCC are measured. Before designing the controller, it would be necessary to obtain the mathematical model of the ac-side subsystem. Fig. 1 shows the circuit diagram of the proposed topology. By applying Kirchhoffs voltage law (KVL) to the ac side of the inverter, for each x phase (x = a, b, c), (10) can be obtained. Subsequently, (11) and (12) are obtained by applying Clerks transformation to (10). For (10)(12), p = d/dt, vxm = [vam , vbm , vcm ] = the output voltage of the inverter, vg x = [vg a , vg b , vg c ] = the grid voltage, vg m = common-mode voltage, ix = [ia , ib , ic ] = the output current of the inverter and [vg , v m , i ], and [vg , vm , i ] are the grid voltage, inverter output voltage, and inverter output current and axis components, respectively. vg x vxm vg m rf ix = Lf pix vg v m rf i = Lf pi vg v m rf i = Lf pi . (10) (11) (12)

In the grid-connected mode, the current quality is determined by the voltage quality of the system because a polluted PCC voltage could make the injecting currents to be distorted. From (11) and (12), the block diagram representation of the system is obtained as in Fig. 8 in which KI C represents the gain of the inverter. The measured grid current is controlled in closed-loop manner using the combined controller designed in the previous section.

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Fig. 8.

Schematic of the ac-side control system.

Fig. 9.

Schematic of the dc-side control system.

Fig. 10. Mode transition from rst mode to second mode with simple harmonic lter at t = 250 ms. (Top to bottom) Voltage at PCC, inverter output current, nonlinear load current, and grid current.

B. DC-Side Controller The dc-side controller is designed based on the small signal model of the ZSI [9]. It is similar to the dc-side controller presented in [9] with the exception that the output voltage of the Z-source impedance network capacitor is directly controlled instead of using it to predict the supply voltage to the inverter (see Fig. 9). This design allows better utilization of the boosted voltage and also it reduces the voltage stress applied on the switches as the voltage input to the inverter bridge is boosted only when the dc supply voltage dips. In the present methods, both modulation index and shoot-through are simultaneously varied. The cushioning method proposed in [9] is also applied to minimize the transferring of dc-side disturbance into the ac side. The voltage across the Z-source impedance network capacitor is controlled in closed-loop manner using a PI controller and the inductor current is used in the inner loop. V. SIMULATION RESULTS The simulation of the proposed DG system is carried out using MATLAB/Simulink and PLECS for the circuit shown in Fig. 4 in which a nonlinear load and some small linear loads are connected at the PCC. A three-phase rectier is used as the nonlinear load as it could inject a signicant amount of harmonics, thus distorting the voltage quality at the PCC. The simulation results show the dynamics and the performance of the designed controllers. The proposed DG system is operated in two operating modes and Fig. 10 shows the mode transition from the rst mode to the second mode with simple harmonic lter at t = 250 ms. Fig. 11 shows the mode transition from the rst mode to the second mode with the improved harmonic elimination method. Fig. 12 shows the variation of selected gain factor K 1 for both simple and improved harmonic elimination methods when the controller is operated in the voltage improvement mode. The gain value increases with the time and nally settles down to a constant value. The observed slight variation in the two proles in Fig. 12 is due to the poor transient response of the specic harmonic elimination method.

Fig. 11. Mode transition from rst mode to second mode with specic harmonic elimination method at t = 250 ms, from top to bottom, voltage at PCC, inverter output current, nonlinear load current and grid current.

Fig. 12. Gain factor K 1 for simple and specic harmonic elimination methods for mode transition from rst mode to second mode at t = 250 ms.

Fig. 13 shows harmonic spectra in the rst and second mode of operations. In the second mode of operation, the simple and improved harmonic methods are named as V1 control mode and V2 control mode, respectively. The simulations are done with the same loading and current limiting conditions. When the

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Fig. 14. Response of the dc-side to source voltage step. (Top to bottom) Output voltage of Z-source impedance network, inductor current, and voltage across the capacitor.

Fig. 13. Harmonic spectrum of (a) the voltage at PCC, (b) load current, (c) output current of the inverter, and (d) grid current.

system operates in the rst mode, the inverter injects a highquality current with ITHD of 2.57%. The harmonic spectrum for this condition is given in Fig. 13(c) and all the harmonics comply with grid-connecting standards. This performance is achieved when the PCC voltage is highly distorted with large amount of harmonics injected from locally connected nonlinear load, as shown in the harmonic spectrum given in Fig. 13(b). This results in VTHD of 6.37% with dominating low-order harmonic components, as shown in Fig. 13(a). Fig. 13(d) shows the harmonic spectrum of the current injected to the mains grid from the PCC. From Fig. 13(d), it can be seen that the grid current spectrum is improved with reduced low-order harmonic components and ITHD is reduced to 5.72% and 3.6%, respec-

tively, for V1 and V2 modes in the voltage improvement mode. This also indicates that the proposed specic harmonic elimination method signicantly improves the grid current for the system considered. The voltage harmonic spectrum is improved as VTHD is reduced to 1.59% and 1.81% with the V1 and V2 control methods, respectively, as shown in Fig. 13(a). Notwithstanding a slight increase in VTHD with the specic harmonic elimination method (V2 control) as higher order harmonics are not compensated, VTHD lies in the acceptable range. Fig. 14 shows the dc-side step response of the ZSI when it is operated in the second mode. The dc input voltage is given a step response to emulate terminal characteristics of a renewable source. At t = 350 ms, the input voltage is changed from 240 to 120 V, and this acts as a disturbance for the system. When the input voltage (Vdc ) drops, in order to maintain the voltage across the Z-source capacitor, the shoot-through time (DS ) needs to be increased as VC is given by VC = Vdc (1 DS )/(1 2DS ). This results in reduction of the modulation index. The output voltage of Z-source impedance network, which is expressed as VS = V dc /(1 2DS ) is increased as a result of the disturbance, as shown in Fig. 14 (top). The increment in the Z-source output voltage can propagate into the ac-side current but this can be avoided by having sufcient null interval and fast ac-side controllers, as presented in [9]. As illustrated in Fig. 14 (middle), it would be possible to observe distortions in the Z-source inductor current. These distortions result from the transfer of harmonics from the ac side to the dc side. Fig. 15 shows the reference tracking of the controller when the system is operated in the second mode. At t = 300 ms, the system is subjected to a step change in load current reference (Iref ) and the measured current signal (Im ) shows good reference tracking. VI. EXPERIMENTAL RESULTS A 1-kVA prototype of the ZSI is developed in the laboratory to verify the effectiveness of the proposed topology and control method. The experimental setup is designed as a scaled-down model of an actual system and selected parameters are listed in Table I. The lter inductors and capacitors are selected to attenuate switching harmonics. A three-phase rectier fed

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Fig. 15.

Reference tracking of the current controller. TABLE I CIRCUIT PARAMETERS OF THE LABORATORY PROTOTYPE

Fig. 17.

Output current of the inverter.

Fig. 16. Experimental results for mode transition from rst mode to second mode. (Top to bottom) Inverter output current, voltage across the load, grid current, and nonlinear load current, respectively.

resistor bank is used as the load, and the complete system is connected to the utility grid through a transformer to match the voltage levels of the two systems. The controller is implemented in dSPACE DS1103 processor card and Fig. 16 shows the obtained experimental results of the prototype. It shows the operational performances in both modes and the transfer characteristics from the rst mode to the second mode. Fig. 17 shows the three-phase output current of the inverter. Initially, the system is operated in the current improvement mode, in which the control objective is to deliver high-quality currents into the system. The proposed time-delay controller utilizes its disturbance rejection property to eliminate the harmonics in the injected current. Once the system is transferred into the voltage improvement mode, the controller tracks the reference for

Fig. 18. Harmonic spectra of (a) voltage at the load busses, (b) output current of inverter, (c) grid current, and (d) load current.

improvement of the voltage quality of the connecting bus. This is achieved by appropriately varying the injecting current of the inverter bridge. The third plot of Fig. 16 shows the grid current and it reveals that once the harmonics at the load bus voltage is mitigated, the quality of the injecting grid current is improved. Furthermore, Fig. 18 shows harmonic spectra of

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the grid when the DG system operates in full capacity. When the system operates below its ratings, the designed controllers improve the voltage quality of the grid. A stationary reference frame-based p+resonance repetitive controller with time delay is designed to improve the harmonic quality and reference tracking. The dc-side controller is designed to track the reference by appropriately changing the shoot-through time interval for variations in the supply voltage. The performance of the proposed controller is veried with simulation results obtained using MATLAB/Simulink and PLECS toolboxes. Simulation results show good reference tracking and harmonics performance. A prototype built in the laboratory to prove the performance of the designed controller produces results in compliance with the theory and simulation results.
Fig. 19. Response of dc-side to a source voltage step increase. (Top to bottom) Input voltage, inductor current, voltage across the capacitor, and output voltage of Z-source impedance network.

REFERENCES
[1] P. Jintakosonwit, H. Akagi, H. Fujita, and S. Ogasawara, Implementation and performance of automatic gain adjustment in a shunt-active lter for harmonic damping throughout a power distribution system, IEEE Trans. Power Electron., vol. 17, no. 3, pp. 438447, May 2002. [2] L. Asimmoaei, E. Aeloiza, J. H. Kim, P. Enjeti, F. Blaabjerg, L. T. Moran, and S. K. Sul, An interleaved active power lter with reduced size of passive components, in Proc. 21st Annu. IEEE Appl. Power Electron. Conf. Expo. (APEC 2006), pp. 969976. [3] L. Asiminoaei, F. Blaabjerg, S. Hansen, and P. Thoegersen, Adaptive compensation of reactive power with shunt active power lters, in Proc. 41st Annu. Meeting IEEE Ind. Appl. Soc. (IAS 2006), pp. 191197. [4] N. Pogaku and T. C. Green, Harmonic mitigation throughout a distribution system: A distributed-generator-based solution, Inst. Electr. Eng. Proc. Gener. Transm. Distrib., vol. 153, no. 3, pp. 350358, May 2006. [5] IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power Systems, IEEE Standard 519-1992, 1993. [6] F. Z. Peng, Z-source inverter, IEEE Trans. Ind. Appl., vol. 39, no. 2, pp. 504510, Mar./Apr. 2003. [7] P. C. Loh, D. M. Vilathgamuwa, Y. S. Lai, G. T. Chua, and Y. Li, Pulsewidth modulation of Z-source inverters, in Proc. 39th Annu. IEEE Ind. Appl. Conf. (IAS 2004), pp. 148155. [8] C. J. Gajanayake, D. M. Vilathgamuwa, and P. C. Loh, Small-signal and signal-ow-graph modeling of switched Z-source impedance network, IEEE Power Electron. Lett., vol. 3, no. 3, pp. 111116, Sep. 2005. [9] C. J. Gajanayake, D. M. Vilathgamuwa, and P. C. Loh, Development of a comprehensive model and a multiloop controller for Z-source inverter DG systems, IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 23522359, Aug. 2007. [10] R. Badin, H. Yi, F. Z. Peng, and K. Heung-Geun, Grid interconnected Z-source PV system, in Proc. IEEE Power Electron. Spec. Conf. (PESC 2007), pp. 23282333. [11] H. Yi, S. Miaosen, F. Z. Peng, and W. Jin, Z-source inverter for residential photovoltaic systems, IEEE Trans. Power Electron., vol. 21, no. 6, pp. 17761782, Nov. 2006. [12] J. Jin-Woo and A. Keyhani, Control of a fuel cell based Z-source converter, IEEE Trans. Energy Convers., vol. 22, no. 2, pp. 467476, Jun. 2007. [13] Y. Li, D. M. Vilathgamuwa, and P. C. Loh, Design, analysis, and realtime testing of a controller for multibus microgrid system, IEEE Trans. Power Electron., vol. 19, no. 5, pp. 11951204, Sep. 2004. [14] D. N. Zmood and D. G. Holmes, Stationary frame current regulation of PWM inverters with zero steady-state error, IEEE Trans. Power Electron., vol. 18, no. 3, pp. 814822, May 2003. [15] R. Teodorescu, F. Blaabjerg, M. Liserre, and P. C. Loh, Proportionalresonant controllers and lters for grid-connected voltage-source converters, Inst. Electr. Eng. Proc. Electr. Power Appl., vol. 153, no. 5, pp. 750762, Sep. 2006. [16] G. Escobar, P. Mattavelli, A. M. Stankovic, A. A. Valdez, and J. Leyva-Ramos, An adaptive control for UPS to compensate unbalance and harmonic distortion using a combined capacitor/load current sensing, IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 839847, Apr. 2007.

the load voltage, inverter current, grid current, and load current. This shows a clearer view of harmonic mitigation capability of the designed controller. In Fig. 18(a), when the system operates in the current improvement mode, the voltage harmonic level THD = 4.15% is above the acceptable level of 3% but the inverter current [see Fig. 18(b)] THD = 4.61% is below the acceptable level for a DG source, and all the individual harmonics are within the specied levels. However, the grid current [see Fig. 18(c)] has THD of 6.42%, which is not acceptable as far as the total system is considered. However, when the controller is transferred to the second mode, the harmonic level drops to 2.99% at the load bus and all individual harmonic components also comply with the standards. From Fig. 18(b), it can be seen that the injecting current of the inverter has increased harmonic levels to nullify the harmonics generated at the load. Furthermore, Fig. 18(c) shows that the injecting grid current harmonic level is reduced to THD = 4.21% and it is below the acceptable level. The experimental results comply with the theory and obtained simulations results. Fig. 19 shows the step response of the dc-side input voltage, in which the dc input voltage is changed from 100 to 60 V. This is to emulate the terminal characteristics of a renewable energy source. The drop in the input voltage demands an increase in the shoot-through time, and this leads to a reduced modulation index. However, the controlled variable, voltage across the Z-source capacitor is maintained constant (third plot). To prevent the transfer of the effects of disturbance from the dc side to the ac side, proper selection of both ac- and dc-side control bandwidths and sufcient null interval to absorb the disturbance is done with the implementation of the cushioning method proposed in [9]. VII. CONCLUSION This paper presents a ZSI-based exible DG system for integrating renewable energy sources into the grid for improving power quality of the grid. The controllers are designed to operate in two modes. The inverter injects high-quality current into

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[17] G. Escobar, P. R. Martinez, J. Leyva-Ramos, and P. Mattavelli, A negative feedback repetitive control scheme for harmonic compensation, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 13831386, Jun. 2006. [18] T. Ohnishi and M. Hojo, AC line voltage harmonics compensator with excessive current control, IEEE Trans. Ind. Electron., vol. 50, no. 6, pp. 11261133, Dec. 2003. [19] P. Rodriguez, R. Teodorescu, I. Candela, A. V. Timbus, M. Liserre, and F. Blaabjerg, New positive-sequence voltage detector for grid synchronization of power converters under faulty grid conditions, in Proc. 37th IEEE Power Electron. Spec. Conf. (PESC 2006), Jun., pp. 17, 1822. [20] H. Akagi, S. Ogasawara, and K. Hyosung, The theory of instantaneous power in three-phase four-wire systems: A comprehensive approach, in Proc. 44th Annu. Meeting IEEE Ind. Appl. Soc., 1999, vol. 1, pp. 431439. [21] T. Jimichi, H. Fujita, and H. Akagi, Design and experimentation of a dynamic voltage restorer capable of signicantly reducing an energystorage element, in Proc. 14th Annu. Meeting IEEE Ind. Appl. Conf. (IAS 2005), pp. 896903. [22] L. Asiminoaei, F. Blaabjerg, and S. Hansen, Evaluation of harmonic detection methods for active power lter applications, in Proc. 20th Annu. IEEE Appl. Power Electron. Conf. Expo. (APEC 2005), Mar., vol. 1, pp. 635641.

Remus Teodorescu (S94A97M99SM02) received the Dipl.Ing. degree in electrical engineering from the Polytechnic University of Bucharest, Bucharest, Romania, in 1989, and the Ph.D. degree in power electronics from the University of Galati, Galati, Romania, in 1994. From 1989 to 1990, he was with the Iron and Steel Plant, Galati, and then, he moved to Galati University, where he was an Assistant Professor with the Electrical Engineering Department. In 1998, he joined the Power Electronics Section, Institute of Energy Technology, Aalborg University (AAU), Aalborg, Denmark, where he is currently an Associate Professor. His current research interests include power converters for renewable energy systems (photovoltaic, wind turbines) and electrical drives. He has coauthored more than 100 technical papers, 12 of them published in journals. He is a coauthor of two books and is the holder of ve patents. Dr. Teodorescu has received Technical Committee Prize Paper Awards, a 1998 IEEE Industrial Applications Society (IAS) Prize Paper Award, and the OPTIM-ABB Prize Paper Award at OPTIM 2002. He is an Associate Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS LETTERS and the Chair of the IEEE Danish IAS/Industrial Electronics Society/Power Electronics Society Chapter.

Chandana Jayampathi Gajanayake (S07M09) received the B.Sc. degree in electrical and electronic engineering from the University of Peradeniya, Peradeniya, Sri Lanka, in 2003, and the Ph.D. degree from the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore. In 2006, he was a Visiting Scholar with the Institute of Energy Technology, Aalborg University (AAU), Aalborg, Denmark. He is currently a Research Fellow with Nanyang Technological University. His current research interests include power converters, power quality, and distributed generation. Dr. Gajanayake is a member of the IEEE Power Electronics Society and Power and Energy Society.

D. Mahinda Vilathgamuwa (S90M93SM99) received the B.Sc. and Ph.D. degrees in electrical engineering from the University of Moratuwa, Moratuwa, Sri Lanka, and Cambridge University, Cambridge, U.K., in 1985 and 1993, respectively. In 1993, he joined the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, as a Lecturer, where he is currently an Associate Professor. His current research interests include power electronic converters, electrical drives, and power quality. He has authored or coauthored more than 120 research papers in refereed journals and conferences. Dr Vilathgamuwa is the Treasurer of IEEE Section, Singapore.

Frede Blaabjerg (S86M88SM97F03) was born in Erslev, Denmark, on May 6, 1963. He received the M.Sc.E.E. and Ph.D. degrees from Aalborg University (AAU), Aalborg, Denmark, in 1987 and 1995, respectively. From 1987 to 1988, he was at ABB-Scandia, Randers. In 1992, he became an Assistant Professor at AAU, an Associate Professor in 1996, and Full Professor in power electronics and drives in 1998. He is the author or coauthor of more than 300 publications in his research elds including the book Control in Power Electronics (New York: Academic, 2002). He is the Editor of Journal of Power Electronics and of the Danish journal Elteknik. Dr. Blaabjerg received the 1995 Angelos Award for his contribution in modulation technique and control of electric drives, and the Annual Teacher prize at AAU, in 1995. In 1998, he received the Outstanding Young Power Electronics Engineer Award from the IEEE Power Electronics Society. He has received four IEEE Prize paper awards during the past ve years. In 2002, he received the C.Y. OConnor Fellowship from Perth, Australia, the Statoil prize in 2003 for his contributions in power electronics, and the Grundfos prize in 2004 for his contributions in power electronics and drives. He is the Editor of the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, and Associate Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS. He has held a number of chairman positions in research policy and research funding bodies in Denmark.

Poh Chiang Loh (S01M04) received the B.Eng. (with honors) and M.Eng. degrees from the National University of Singapore, Singapore, Singapore, in 1998 and 2000, respectively, and the Ph.D. degree from Monash University, Melbourne, Vic., Australia, in 2002. During the Summer 2001, he was a Visiting Scholar with the Wisconsin Electric Machine and Power Electronics Consortium, University of Wisconsin, Madison, where he was engaged in multilevel inverter control and its synchronized implementation. From 2002 to 2003, he was a Project Engineer with the Defense Science and Technology Agency, Singapore, where he was involved in managing major defense infrastructure projects and exploring new technology for defense applications. Since 2003, he has been an Assistant Professor with Nanyang Technological University, Singapore. During 2005, he was a Visiting Researcher at the University of Hong Kong, and Aalborg University (AAU), Aalborg, Denmark.