Common Drain Amplifier or Source Follower

Figure 1(a) shows the source follower with ideal current source load. Figure 1(b) shows the ideal
current source implemented by NMOS with constant gate to source voltage.

Vi
Vo
V
DD
M1
(a)
V
G
V
DD
Vo
Vi
M1
M2
(b)
V
T0
+V
V
V
TN
+V
+
-


Figure 1. Common drain or source follower implementation.
1. Low Frequency Small Signal Equivalent Circuit


) 0 or Z ( Y ), r or Z ( g Y
V - V V - V V , V - V , V V , V V
S S ds2 L ds2 L
2 1 o i gs1 o bs1 o 2 i 1
= = = =
= = = = =

From Figure 2(e),

2 ds1 mb1 m1 1 m1
2 ds1 mb1 2 1 m1 o ds1 mb1 gs1 m1 2
1
)V g g g ( V -g
)V g g ( ) V - (V g )V g g ( v g I
0 I
+ + + =
+ + = + + =
=








1
g
ds1
g
ds2
D
2
S
2
g
m1
v
gs1
D
1
S
1
G
1
v
gs1
g
mb1
+
-
V
o
+
-
V
i
g
ds1
g
ds2
D
2
S
2
g
m1
v
gs1
V
o
V
i
D
1
S
1
G
1
v
gs1
g
mb1
v
bs1
+
-
+
-
Y
+
V
1
+
V
2 Y
L
Z
i
Z
o
I
1
I
2
g
ds1
g
ds2
D
2
S
2
g
m1
v
gs1
V
o
V
i
D
1
S
1
G
1
v
gs1
g
mb1
v
o
+
-
+
-
g
ds1
g
ds2
D
2
S
2
g
m1
v
gs1
V
o
V
i
D
1
S
1
G
1
v
gs1
(c)
+
-
+
-
g
mb1
g
ds1
g
ds2
D
2
S
2
g
m1
v
gs1
D
1
S
1
G
1
v
gs1
+
g
mb1
V
i
+
-
-
V
o
(a) (b)
(d)
(e) (f)



Figure 2. Source follower low frequency small signal equivalent circuit.









2
The corresponding Y-parameter matrix is,


0 detY
g g g g
0 0
Y
ds1 mb1 m1 m1
=
(

+ +
=

The Source Follower Properties:

=
+
+ + +
=
+
+
=
ds2
ds2 ds1 mb1 m1
L 11
L 22
i
(0)g 0
g ) g g g (
Y y detY
Y y
Z


ds1 mb1 m1 22 S 22
S 11
o
g g g
1
y
1
Y y detY
Y y
Z
+ +
= =
+
+
=



1
g g g g
g
g ) g g (g
) g (
Y y
y
A
ds2 ds1 mb1 m1
m1
ds2 ds1 mb1 m1
m1
L 22
21
V0

+ + +
=
+ + +

=
+

=

Or



) Z // Z ( g A
L o m1 V
=


=
+

=
+

=
ds2
ds2 m1
L 11
L 21
I
0)g ( 0
g g
Y y detY
Y y
A












3
2. High Frequency Small Signal Equivalent Circuit

V
G
V
DD
Vo
Vi
M2
M1
C
L
C
gd2
C
gs1
C
db2
C
sb1
C
db1
C
gd1


Figure 3. Source follower parasitic capacitances.

Figure 3 shows all the parasitic capacitances of source follower circuit. Figure 4 shows the high
frequency small signal equivalent circuit. From Figure 4, one obtains,

L gd2 db2 sb1 O ds2 ds1 mb1 O
b
1
a
2
b
2
b
1 gs1 o
b
2
b
1 i
a
2 S
a
1
C C C C C , g g g G
-I I , V - V v , V V , V V V , V V
+ + + = + + =
= = = = = =

The network a current equation is:

) V - V )( C G ( I
) V - V )( C G ( I
a
1
a
2 S S
a
2
a
2
a
1 S S
a
1
s
s
+ =
+ =














4
G
S
V
S
C
gs1
C
gd1
g
ds1
C
o
G1
S1
D1
D2
S2
C
o
=C
sb1
+C
db2
+C
gd2
+C
L
g
m
1
v
g
s
1
g
mb1
+
V
i
-
(c)
+
V
o
-
+ -
v
gs1
C
S
g
ds2
Y
a
Y
b
Z
i
b
V
S
I
1
a
V
1
a
V
2
a
V
1
b
=
+
+
V
2
b
I
2
a
I
1
b
I
2
b
(d)
g
ds1
D2
S2
G
S
C
gd1
C
gs1
C
sb1
C
db2 C
L
g
m
1
v
g
s
1
G1 D1
S1
(a)
C
gd2
g
m
b
1
V
o
V
o
+
-
v
gs1
g
ds2
(a)
C
S I
S
G
S
C
gs1
C
gd1
g
ds1
C
o
G1
S1
D1
D2
S2
C
o
=C
sb1
+C
db2
+C
gd2
+C
L
g
m
1
v
g
s
1
g
mb1
+
V
i
-
(b)
+
V
o
-
+ -
v
gs1
C
S
g
ds2 I
S
+
+


Figure 4. Source follower high frequency small signal equivalent circuit.


5
The corresponding Y-parameter matrix is :

(

+ +
+ +
=
) C G ( ) C G (
) C G ( ) C G (
Y
S S S S
S S S S a
s s
s s

The network b current equation is:

b
2 o gs1 o m1
b
1 gs1 m1
b
2 o o
b
1
b
2 gs1
b
2
b
1 m1
b
2 o o
b
1
b
2 gs1 gs1 m1
b
2
b
2 gs1
b
1 gs1 gd1
b
2
b
1 gs1
b
1 gd1
b
1
)]V C C ( G g [ V ) C -(g
)V C (G ) V - (V C ) V - (V g )V C (G ) V - (V C V g I
V C )V C (C ) V - (V C V C I
+ + + + + =
+ + + = + + + =
+ = + =
s s
s s s s
s s s s

The corresponding Y-parameter matrix is:

) C (G C )] C (C G [g C
) C (g C - )] C C ( G )[g C (C detY
) C C ( G g ) C (g -
C - ) C (C
Y
o o gs1 o gs1 o m1 gd1
gs1 m1 gs1 o gs1 o m1 gs1 gd1
b
o gs1 o m1 gs1 m1
gs1 gs1 gd1
b
s s s s
s s s s
s s
s s
+ + + + + =
+ + + + + =
(

+ + + +
+
=


The gain of network b , the unloaded last stage, is:

0 Y ;
) C (C G g
C g
y
y
Y y
y
V
V
A
b
L
o gs1 o m1
gs1 m1
b
22
b
21
b
L
b
22
b
21
b
1
b
2 b
V
=
+ + +
+
=

=
+

= =
s
s

The input impedance of network b (or the load of network a) is given by:


) C (G C )] C (C G g [ C
) C (C G g
detY
y
Y y detY
Y y
Z
o o gs1 o gs1 o m1 gd1
o gs1 o m1
b
b
22
b
L
b
11
b
b
L
b
22 b
i
s s s s
s
+ + + + +
+ + +
= =
+
+
=


The voltage gain of network a is given by:

) C (G C )] C (C G g [ C )] C (C G g )[ C (G
)] C (C G g )[ C (G
) C (C G g
) C (G C )] C (C G g [ C
C G
C G
Z
1
Y ;
Y y
y
V
V
A
o o gs1 o gs1 o m1 gd1 o gs1 o m1 S S
o gs1 o m1 S S
o gs1 o m1
o o gs1 o gs1 o m1 gd1
S S
S S
b
i
a
L
a
L
a
22
a
21
a
1
a
2 a
V
s s s s s s
s s
s
s s s s
s
s
+ + + + + + + + + +
+ + + +
=
+ + +
+ + + + +
+ +
+
=
=
+

= =

6
The overall gain is given by:

] C C ) C (C ) C C [( ] G C ) C (C G ) G g )( C C [( ) G g ( G
) C (G ) C g (
) C (G C )] C (C G g )][ C C ( G [
) C (G ) C g (
) C (G C )] C (C G g [ C )] C (C G g )[ C (G
)] C (C G g )[ C (G
) C (C G g
C g
V V since ; A A
V
V
V
V
V
V
V
V
A
o gs1 o gs1 gd1 S
2
o gs1 o gs1 S o m1 gd1 S o m1 S
S S gs1 m1
o o gs1 o gs1 o m1 gd1 S S
S S gs1 m1
o o gs1 o gs1 o m1 gd1 o gs1 o m1 S S
o gs1 o m1 S S
o gs1 o m1
gs1 m1
a
2
b
1
a
V
b
V
a
1
a
2
b
1
b
2
a
1
b
2
S
o
V
+ + + + + + + + + + +
+ +
=
+ + + + + + +
+ +
=
(
(

+ + + + + + + + + +
+ + + +
(
(

+ + +
+
=
= =
|
|
.
|

\
|
|
|
.
|

\
|
= = =
s s
s s
s s s s
s s
s s s s s s
s s
s
s


The trans-impedance of the overall network is:


] C C ) C (C ) C C [( ] G C ) C (C G ) G g )( C C [( ) G g ( G
C g
) C (G
A
) C (G V
V
I
V
A
o gs1 o gs1 gd1 S
2
o gs1 o gs1 S o m1 gd1 S o m1 S
gs1 m1
S S
V
S S S
o
S
o
Z
+ + + + + + + + + + +
+
=
+
=
+
= =
s s
s
s s

The DC gain is obtained by setting s=0.


) G (g G
g
A
o m1 S
m1
Z0
+
=

The transimpedance can be re-written as follows:

) G (g G
C C ) C (C ) C C (
a
) G (g G
G C ) C (C G ) G g )( C C (
b
a b 1
)
g
C
1 ( A
A
O m1 S
o gs1 o gs1 gd1 S
O m1 S
o gs1 o gs1 S o m1 gd1 S
2
m1
gs1
Z0
Z
+
+ + +
=
+
+ + + + +
=
+ +
+
=
s s
s

7


If the poles are far apart, their values can be estimated as follows :
gs1
m1
O gs1 O gs1 gd1 S
O gs1 O gs1 S O m1 gd1 S
2
O gs1 O gs1 S O m1 gd1 S
O m1 S
1
C
g
z
C C ) C )(C C C (
G C ) C (C G ) G )(g C (C
a
b
p
G C ) C (C G ) G )(g C (C
) G (g G
b
1
p
=
+ + +
+ + + + +
= =
+ + + + +
+
= =

The bandwidth and gain bandwidth product are defined by the dominant pole p
1
. That is,

2
w
f
w A w
2
w
f
p w
GBW
GBW
BW Z0 GBW
BW
BW
1 BW
=
=
=
=

The phase margin PM for non-inverting amplifier is the distance between the phase angle at the unity gain
bandwidth frequency with respect to 180. For the source follower transfer function this is calculated as
follows:

|
|
.
|

\
|
|
.
|

\
|
+ =
+ =
|
|
.
|

\
|
|
.
|

\
|
+ =
+ + + =
>>
+
+

+ +
+
=
+ +
+
=
2
GBW 1 - GBW 1 -
2
GBW 1 - GBW 1 -
2
GBW
1
GBW GBW
Z0 GBW Z
1 GBW
2
GBW
1
GBW
GBW
Z0
2
GBW
1
GBW
GBW
Z0
GBW Z
2 1
Z0
Z
p
w
tan
z
w
tan 90 PM
PM 180
p
w
tan 90
z
w
tan 0
)
p
jw
1 ( )
p
jw
( )
z
jw
1 ( A ) jw ( A
p w since ;
)
p
jw
1 )(
p
jw
(
)
z
jw
1 ( A
)
p
jw
1 )(
p
jw
(1
)
z
jw
1 ( A
) jw ( A
)
p
1 )(
p
(1
)
z
1 ( A
) ( A
s s
s
s


8
3. Source Follower as DC Level Shifter


We assume the source follower is operating at saturation mode. That is the drain current is given by:

) V V ( V ; ) V V )( 2 / ( I
T GS DS
2
T GS DS
> =
where:
= K(W/ L)

Therefore,

DS
T GS
I 2
V V =
or

DS
T GS
I 2
V V + =

DS
T o in GS
I 2
V V V V + = =
If V
BS
=0, this is not possible for NMOS transistor in Nwell process.

DS
TO o in GS
I 2
V V V V + = =

This difference between the voltage level of the input and output can be specified by controlling W/L ratio
for a given K and I
DS
.

In Figure 1(b), V
BS
=-V
o
. Hence,

DS
o TO o in GS
I 2
) V ( V V V V + + + = =
Note V
o
appears on both sides of the equation, need iteration to determine the solution.

Common Drain Amplifier or Source Follower Experiments

4. Source Follower as DC Level Shifter

Source follower is a voltage follower, its gain is less than 1.
The DC transfer characteristic has a slope of less than 1. First let us
determine the maximum output voltage. For source follower this occurs
when the input voltage V
in
is at maximum or equal to V
DD
.



0 26 . 3 V 6 . 0 V
)] 6 . 0 V 6 . 0 ( 1 1 [ 5 V
)] V ( [V - V V - V V
O(max) O(max)
O(max) O(max)
O(max) T0 DD T DD O(max)
= + +
+ + =
+ + = =
9
This a non-linear equation, its solution requires iteration. A MATLAB m file is created to solve this
problem. A call to MATLAB fzero function is invoke to obtain the solution as shown below:

*MATLAB m file srcf.m stored in \MATLAB directory

function y=srcf(vo)
y=vo+sqrt(0.6+vo)-3.26

*MATLAB fzero function invocation
vo=fzero(srcf,1)

vo=1.7327

Pspice Vo(max)=1.7595

One can estimate the required bias of M1, using the biasing principle. The transistor M2 is a current sink
biased to generate 100uA with a fixed gate to source voltage of V
GS
=V
T0
+V=1+1.5=2.5. That is the
output voltage Vo=V=1.5. Since M1 and M2 are connected in series, means their current are the same.
With both transistor have the same W/L means that the gate to source must be equal to V
T
+V. But V
T
for
transistor M1 is equal to V
TN
accounting for the non-zero bulk bias.

4.6745 1.5 1.6745 1.5 V V V V
6745 . 1 ) 6 . 0 ) 5 . 1 ( 6 . 0 ( 1 1 ) V ( V V
-1.5 V V
TN O bias
BS T0 TN
O BS
= + + = + + =
= + = + =
= =


Due to gradual slope of the voltage DC transfer characteristic, it is difficult to obtain the proper operating
point from Pspice simulation. To help on the bias determination the current DC transfer characteristic is
also plotted for transistor M1. We know the bias current was designed for 100 uA. From Pspice simulation
DC transfer characteristic, the bias voltage is 4.75V at I
DSQ
=101.205uA. This is very closed to the
theorically calculated value.


Pspice netlist at this operating is simulated to obtain the small signal characteristics. The theoretical small
signal parameters are determined and compared with Pspice simulation results.


10
73 . 0
6 - E ) 9642 . 1 9642 . 1 18 . 45 95 . 130 (
6 - E 95 . 130
g g g g
g
A
Z
K 6 . 5
6 - E ) 9642 . 1 18 . 45 95 . 130 (
1
g g g
1
Z
6 - E 9642 . 1
r
1
g
M 509 .
6) - E 21 . 98 )( 02 (.
1
I
1
r
6 - E 9642 . 1
r
1
g
M 509 .
6) - E 21 . 98 )( 02 (.
1
I
1
r
45.18umho 6) - E 95 . 130 (
) 5 . 1 ( 6 . 0 2
1
g
V 2
g
umho 95 . 130 6) - 6)(98.21E - E 3 . 87 ( 2 I 2 g g
uA 21 . 98 ) 1 5 . 2 (
2
6 - E 27 . 87
) V - V (
2
I I
6 - E 3 . 87
6 - 1)E - (5.4
6 - 9.6E
6) - E 40 (
L
W
K
ds2 ds1 mb1 m1
m1
V0
i
ds1 mb1 m1
O
ds2
ds2
DSQ P
ds2
ds1
ds1
DSQ N
ds1
m1
BS
mb1
DSQ N mN m1
2 2
T0 GSN
N
2 DSQ
N
N N
=
+ + +
=
+ + +
=
=
=
+ +
=
+ +
=
= =
= = =
= =
= = =
=

=

=
= = = =
=
|
.
|

\
|
= |
.
|

\
|
= =
=
|
|
.
|

\
|
=
|
.
|

\
|
=

Comparing with Pspice results of:

Z
i
=1 E+20 =
Z
o
=5.323K
A
V0
=.7315

*PSpice file for NMOS Inverter with PMOS Current Load
*Filename="Lab3.cir"
VIN 1 0 DC 4.75VOLT AC 1V
VDD 3 0 DC 5VOLT
VSS 4 0 DC 0VOLT
VG2 5 0 DC 2.5VOLT
M1 3 1 2 4 MN W=9.6U L=5.4U
M2 2 5 4 4 MN W=9.6U L=5.4U

.MODEL MN NMOS VTO=1 KP=40U
+ GAMMA=1.0 LAMBDA=0.02 PHI=0.6
+ TOX=0.05U LD=0.5U CJ=5E-4 CJSW=10E-10
+ U0=550 MJ=0.5 MJSW=0.5 CGSO=0.4E-9 CGDO=0.4E-9
.MODEL MP PMOS VTO=-1 KP=15U
+ GAMMA=0.6 LAMBDA=0.02 PHI=0.6
+ TOX=0.05U LD=0.5U CJ=5E-4 CJSW=10E-10
+ U0=200 MJ=0.5 MJSW=0.5 CGSO=0.4E-9 CGDO=0.4E-9
*Analysis
.DC VIN 0 5 0.05
11
.TF V(2) VIN
.AC DEC 100 1HZ 10GHZ
.PROBE
.END




NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE


( 1) 4.7500 ( 2) 1.5757 ( 3) 5.0000 ( 4) 0.0000

( 5) 2.5000


**** SMALL-SIGNAL CHARACTERISTICS


V(2)/VIN = 7.315E-01

INPUT RESISTANCE AT VIN = 1.000E+20

OUTPUT RESISTANCE AT V(2) = 5.323E+03

12

5. Current Source Driven Source Follower As Transimpedance
Amplifier

The voltage gain transfer function has two-zero at the LHPand two-pole at the LHP. That is phase plot is
expected cancel each other. Hence the dynamic range of the phase angle is small, hence large phase
margin. The gain plot is below 0 db. That is the determination of f
BW
and f
GBW
is not possible. Source
follower does not have a voltage gain but has a transimpedance gain or voltage to current gain. The source
follower is re-simulated using a current source input. The gain is highly dependent on the input impedance
Rs. The biasing current is determined to established the same bias as in the voltage source. That is the bias
current and input impedance Rs must be selected to produce a bias of 4.75V. This can be achieved by a
current bias of 100uA and Rs of .0475Meg. The Pspice netlist with this bias is shown below:


*PSpice file for NMOS Inverter with PMOS Current Load
*Filename="Lab3a.cir"
IIN 0 1 DC 100u AC 1
VDD 3 0 DC 5VOLT
VSS 4 0 DC 0VOLT
VG2 5 0 DC 2.5VOLT
RS 1 0 .0475Meg
M1 3 1 2 4 MN W=9.6U L=5.4U
M2 2 5 4 4 MN W=9.6U L=5.4U

.MODEL MN NMOS VTO=1 KP=40U
+ GAMMA=1.0 LAMBDA=0.02 PHI=0.6
+ TOX=0.05U LD=0.5U CJ=5E-4 CJSW=10E-10
+ U0=550 MJ=0.5 MJSW=0.5 CGSO=0.4E-9 CGDO=0.4E-9
.MODEL MP PMOS VTO=-1 KP=15U
+ GAMMA=0.6 LAMBDA=0.02 PHI=0.6
+ TOX=0.05U LD=0.5U CJ=5E-4 CJSW=10E-10
+ U0=200 MJ=0.5 MJSW=0.5 CGSO=0.4E-9 CGDO=0.4E-9
*Analysis
*.DC VIN 0 5 0.05
.TF V(2) IIN
13
.AC DEC 100 1HZ 100THZ
.PROBE
.END


NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE


( 1) 4.7500 ( 2) 1.5757 ( 3) 5.0000 ( 4) 0.0000

( 5) 2.5000

**** SMALL-SIGNAL CHARACTERISTICS


V(2)/IIN = 3.475E+04

INPUT RESISTANCE AT IIN = 4.750E+04

OUTPUT RESISTANCE AT V(2) = 5.323E+03

6. Current Driven Source Follower High Frequency Model
Experiments

The parasitic capacitances will be determined to check the theory against Pspice simulation
results. These capacitances will be determined at the operating point. The reverse biases are first calculated,
using the node voltages at the operating point from Pspice simulation.

For M1,
VDB=V(4)-V(3)=0-5=-5
VBS=V(4)-V(2)=0-1.5757

For M2,
VDB=V(4)-V(2)=0-1.5757=-1.5757
VBS=0

The MATLAB program is invoked to obtain the parasitic capacitances.

For M1,
[CGS,CGD,CBD,CBS]=CAP(9.6,5.4,-5,-1.5757)
CGS=23.2704, CGD=3.84, CBD=15.6331, CBS=39.1607

For M2,
[CGS,CGD,CBD,CBS]=cap(9.6,5.4,-1.5757,0)
CGS=23.2704, CGD=3.84, CBD=25.0807, CBS=61.84


The small signal low frequency gain is
90.6db or K 5 . 34
6 - E ) 1084 . 49 95 . 130 (
6) - E E6)(130.95 0475 (.
) G (g
g R
) G (g G
g
A
6 - 49.1084E 6 - E ) 9642 . 1 9642 . 1 18 . 45 ( g g g G
O m1
m1 S
O m1 S
m1
Z0
ds2 ds1 mb1 O
=
+
=
+
=
+
=
= + + = + + =

14

Pspice simulation result is Azo =90.818 db.

In this experiment, only Cgs and Cgd will be included in the simulation. Also, Cs=CL=0.

fF 84 . 3 C C C C C C
gd2 L gd2 db2 sb2 O
= = + + + =
90.007 89.987 - 89.994 90
12.43E9
54.372E12
tan
5.63E9
54.372E12
tan 90
p
w
tan
z
w
tan 90 PM
T 65 . 8
2
w
f
54.372T 54.372E12 9) E3)(1.576E 5 . 34 ( p A w
M 250
2
E9 576 . 1
2
p
f
G 896 . 0
2
E9 63 . 5
2
z
f
E9 63 . 5
15 - 23.2704E
6 - E 95 . 130
C
g
z
12.43E9
30 - 3.84)E (23.2704)( 30 - E ) 84 . 3 2704 . 23 )( 84 . 3 0 (
21 - 1142.77E 21 E 67 . 570 21 - E 42 . 691
-
C C ) C )(C C C (
G C ) C (C G ) G )(g C (C
p
G 576 . 1
21 - 1142.77E 21 E 67 . 570 21 - E 42 . 691
6 - 49.1084)E 6)(130.95 - (21.05E
-
G C ) C (C G ) G )(g C (C
) G (g G
p
21 - 1142.77E 6) - 4E 15)(49.108 - E (23.2704 G C
21 - 570.67E 15) - 3.84)E 4 6)((23.270 - (21.05E ) C (C G
21 - 691.42E 6) - E ) 1084 . 49 95 . 130 )(( 15 E ) 84 . 3 0 (( ) G )(g C (C
1 1 -
2
GBW 1 GBW 1 -
GBW
GBW
1 Z0 GBW
1
BW
Z
gs1
m1
O gs1 O gs1 gd1 S
O gs1 O gs1 S O m1 gd1 S
2
O gs1 O gs1 S O m1 gd1 S
O m1 S
1
O gs1
O gs1 S
O m1 gd1 S
= + =
|
.
|

\
|

|
.
|

\
|
+ =
|
|
.
|

\
|
|
.
|

\
|
+ =
= =
= = = =
= = =
= = =
= = =
=
+ + +
+ +
=
+ + +
+ + + + +
=
=
+ +
+
=
+ + + + +
+
=
= =
= + = +
= + + = + +

15

The Pspice simulation results are:
90.001 PM
T 25 . 8 f
M 225 . 268 f
GBW
BW
=
=
=













16