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SMPS MOSFET
IRFP90N20D
HEXFET Power MOSFET
VDSS
200V
RDS(on) max
0.023
ID
94A
Benefits Low Gate-to-Drain Charge to Reduce Switching Losses Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) Fully Characterized Avalanche Voltage and Current
TO-247AC
Max.
94 66 380 580 3.8 30 6.7 -55 to + 175 300 (1.6mm from case ) 10 lbfin (1.1Nm)
Units
A W W/C V V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
0.24
Max.
0.26 40
Units
C/W
Notes Qthrough
are on page 8
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1
09/27/01
IRFP90N20D
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 200 V VGS = 0V, ID = 250A 0.24 V/C Reference to 25C, ID = 1mA 0.023 VGS = 10V, ID = 56AT 3.0 5.0 V VDS = V GS, ID = 250A 25 VDS = 200V, VGS = 0V A 250 VDS = 160V, VGS = 0V, TJ = 150C 100 VGS = 30V nA -100 VGS = -30V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche EnergyR Avalanche CurrentQ Repetitive Avalanche EnergyQ
Typ.
Max.
1010 56 58
Units
mJ A mJ
Diode Characteristics
IS
ISM
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Q Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Conditions D MOSFET symbol 94 showing the A G integral reverse 380 S p-n junction diode. 1.5 V TJ = 25C, IS = 56A, VGS = 0VT 230 340 ns TJ = 25C, IF = 56A 1.9 2.8 C di/dt = 100A/s T Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFP90N20D
1000
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
1000
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
100
100
10
5.0V
5.0V
10
0.1
1000.00
3.5
I D = 94A
ID , Drain-to-Source Current ( )
3.0
T J = 175C
2.5
100.00
(Normalized)
2.0
10.00
T J = 25C
1.5
1.0
0.5
V GS = 10V
100 120 140 160 180
( C)
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IRFP90N20D
1000000 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = C gd Coss = C ds + Cgd
VGS, Gate-to-Source Voltage (V)
12
I D = 56A
100000
10
V DS = 160V V DS = 100V V DS = 40V
C, Capacitance(pF)
10000
1000
100
10 1 10 100 1000
1000.00
100.00
T J = 175C
10.00
T J = 25C
1000
1.00 VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 2.5 3.0 VSD , Source-toDrain Voltage (V)
10msec
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IRFP90N20D
100
LIMITED BY PACKAGE
VGS
80
VDS
RD
D.U.T.
+
RG
-VDD
60
10V
Pulse Width 1 s Duty Factor 0.1 %
40
VDS 90%
TC , Case Temperature
( C)
10% VGS
td(on) tr t d(off) tf
(Z thJC)
Thermal Response
SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = 2. Peak T
J
0.001 0.00001
t1/ t 2 = P DM x Z thJC 0.1 +TC 0.0001 0.001 0.01 1
P DM t1 t2
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IRFP90N20D
1 5V 2100
VDS
D R IV E R
1680
RG
20V tp
D .U .T
IA S
+ V - DD
ID TOP 23A 40A 56A BOTTOM
1260
0 .0 1
840
420
V (B R )D SS tp
( C)
IAS
QG
10 V
QGS VG QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
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IRFP90N20D
Peak Diode Recovery dv/dt Test Circuit
D.U.T
S
+
Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer
R
-
Q
RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET Power MOSFETs
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IRFP90N20D
TO - 247 Package Outline
Dimensions are shown in millimeters (inches)
-D D B M 5.3 0 (.20 9) 4.7 0 (.18 5) 2 .50 (.089) 1 .50 (.059) 4
2X
NOTES: 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 4 7 -A C .
1 .40 (.056 ) 3X 1 .00 (.039 ) 0 .25 (.010 ) M 3.4 0 (.1 33) 3.0 0 (.1 18) C A S
L E A D A S S IG N M E N T S 1 2 3 4 GATE D R A IN SOURCE D R A IN
Notes:
T Pulse width 300s; duty cycle 2%. U Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 90A.
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IRs Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.09/01
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/