Sierra TEE Xilinx Walkthrough Guide

Sierra TEE
For the Xilinx Zynq-7000 EPP

Sierra TEE Demo on the Xilinx Zynq-7000 ZC702 Evaluation Board

Walkthrough Guide
V1.01

Sierraware

Sierra TEE Xilinx Walkthrough Guide

Introduction
The document describes the steps necessary to run a Sierra TEE application on the Xilinx ZC702 Evaluation Board using the Xilinx ISE Design Suite. Therefore, it is assumed that the ISE Design Suite v14.3 is already installed in your PC. The document is divided in 7 sections: Requirements Steps for installing the Sierra TEE Software Generating bit Stream Steps for creating the boot map image Steps for building the Kernel Steps for building the Sierra TEE Sierra TEE Testing

Sierra TEE Xilinx Walkthrough Guide

1 Requirements
Ubuntu PC Xilinx ISE Design Suite 14.3 Sierraware Software ( Sierra TEE ) Serial Terminal Program (minicom, etc.) Xilinx ZC702 Evaluation Board Rev C

Sierra TEE Xilinx Walkthrough Guide

2 Steps for Installing Sierra TEE Software

In order to install the Sierra TEE source code in your PC, extract the sierra_source.tar.bz2 to the required folder. Please note that Sierra TEE is provided in source form for free evaluation, for educational use or for peaceful research. If you plan on using Sierra TEE in a commercial product you need to contact Sierraware to properly license its use in your product. We provide all the source code for your convenience and to help you experience Sierra TEE. The fact that the source is provided does not mean that you can use it without paying a licensing fee. If you are unsure about whether you need to obtain a license for your application, please contact Sierraware and discuss the intended use with a sales representative.

Sierra TEE Xilinx Walkthrough Guide

3 Generating Bit Stream (Optional Step)

The following steps are needed only if you need to generate the bit stream.

3.1 Step #1:

Launch the Xilinx Plan Ahead software from command prompt. # planAhead

Figure 3-1 Xilinx PlanAhead Software

Sierra TEE Xilinx Walkthrough Guide

3.2

Step #2

Figure 3-2 shows the Plan Ahead software main screen. The PA software will help you create a PA project that includes both hardware and software data files necessary to support the ZC702 evaluation board. Select Create New Project to open the New Project Wizard.

Figure 3-2 PlanAhead Software: Main Screen

Sierra TEE Xilinx Walkthrough Guide

3.3 Step #3
Figure 3-3 shows the first screen of the new Plan Ahead project wizard. Click next to continue.

Figure 3-3 PlanAhead Software: New PlanAhead Project wizard

Sierra TEE Xilinx Walkthrough Guide

3.4 Step #4
Enter a name for your project and specify a directory where the project data files need to be stored. Keep in mind that this project will contain both hardware and software data files. Click Next to continue as shown in Figure 3-4:

Figure 3-4 PlanAhead Software: New PlanAhead Project wizard: Project name

Sierra TEE Xilinx Walkthrough Guide

3.5 Step #5
Select the Specify RTL Sources checkbox as shown and click Next to continue

Figure 3-5 PlanAhead Software: New PlanAhead Project wizard: Design Source

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.6 Step #6
Leave the Add Sources screen unchanged as shown in Figure 3-6 and click Next to continue:

Figure 3-6 PlanAhead Software: New PlanAhead Project wizard: Add Sources

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.7 Step #7
Leave the Add Existing IP screen unchanged as shown in Figure 3-7 and click Next to continue:

Figure 3-7 PlanAhead Software: New PlanAhead Project wizard: Add Existing IP

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.8 Step #8
Leave the Add Constraints screen unchanged as shown in Figure 3-8 and click Next to continue:

Figure 3-8 PlanAhead Software: New PlanAhead Project wizard: Add Constraints

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.9 Step #9
Select the item Boards under the Specify panel, filter by Zynq-7000 family and select the ZC702 Evaluation Board as shown in Figure 3-9. Click Next to continue:

Figure 3-9 PlanAhead Software: New PlanAhead Project wizard: Default Part

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.10 Step #10

The final screen in the New PlanAhead Project Wizard is shown in Figure 3-10.Make sure it looks similar and Click Finish to create our new PlanAhead project:

Figure 3-10 PlanAhead Software: New PlanAhead Project wizard: Summary

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.11 Step #11

After you click Finish, the New Project wizard closes and the project you just created opens in PlanAhead just as shown in Figure 3-11.

Figure 3-11 PlanAhead Software: Project Manager

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.12 Step #12

The next step is to create a new design source by making click on Add Sources under PlanAhead Project Manager as shown in Figure 3-12

Figure 3-12 PlanAhead Software: Add Sources

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.13 Step #13

The Add Sources wizard opens. Select the Add or Create Embedded Sources option as shown in Figure 3-13:

Figure 3-13 PlanAhead Software: Add Sources wizard

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.14 Step #14

In the Add or Create Embedded Sources window, click the Create Sub-Design button as shown in Figure 3-14:

Figure 3-14 PlanAhead Software: Add Sources Add or Create Embedded Sources

Sierra TEE Xilinx Walkthrough Guide

3.15 Step #15

Type a name for the module and click OK as illustrated in Figure 3-16:

Figure 3-15 PlanAhead Software: Add Sources: Create embedded source

Sierra TEE Xilinx Walkthrough Guide

3.16 Step #16

Verify that the module you created displays in the sources list as shown in Figure 3-16 and click Finish to add the embedded source.

Figure 3-16 PlanAhead Software: Add Sources: Add or Create Embedded Sources

Sierra TEE Xilinx Walkthrough Guide

3.17 Step #17

A progress bar as shown in Figure 3-17 indicates the progress in the process. Just wait until the Xilinx Platform Studio (XPS) tool opens.

Figure 3-17 PlanAhead Software: Add Sources: Progress Bar

Sierra TEE Xilinx Walkthrough Guide

3.18 Step #18

The PlanAhead design tool creates your embedded design source project. It recognizes that you have an embedded processor system and starts the XPS tool. When the XPS tool opens, the PlanAhead tool will go to the background. Leave the PlanAhead tool running in the background. When the XPS tool opens it also asks you if you want to use the Base System Builder (BSB) wizard to design your new embedded system. Click YES as shown in Figure 3-18. In the BSB wizard, you can select and configure the processing system I/O interface and add default peripherals to the fabric. Xilinx recommends using the BSB wizard to create the foundation for any new embedded design project.

Figure 3-18 Xilinx Platform Studio: Adding embedded source

Sierra TEE Xilinx Walkthrough Guide

3.19 Step #19

When designing a new embedded system using the BSB Wizard, the first window of the BSB asks you to select whether to create an AXI-based or PLB-based system. Select AXI system and click OK as shown in Figure 3-19:

Figure 3-19 Xilinx Platform Studio: BSB Wizard

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.20 Step #20

The next screen in the BSB wizard asks you to select the evaluation board and processing system. Make the selections shown in Figure: 3-20 and click Next

Figure 3-20 Xilinx Platform Studio: BSB Wizard: Board and System Selection

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.21 Step #21

Add axi_timer to the list of included peripherals for the processing system, as shown in Figure 321 and click Finish to generate your design. .

Figure 3-21 Xilinx Platform Studio: BSB Wizard: Peripheral Configuration

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.22 Step #22

Enabling the interrupt axi_timer_0 as shown in the Figure 3-22

Figure 3-22 planAhead Software-Interrupt axi_timer

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.23 Step #23

Close the Xilinx Platform Studio tool window to go back to the PlanAhead Software and click Yes to confirm.

Figure 3-23 Xilinx Platform Studio: Closing the XPS tool

Sierra TEE Xilinx Walkthrough Guide

3.24 Step #24

The active PlanAhead session that has been running in the background this whole time updates with the new project settings as shown in Figure 3.24:

Figure 3-24 PlanAhead Software: Project Manager

Sierra TEE Xilinx Walkthrough Guide

3.25 Step #25

In order to generate the top-level module for the hardware design, expand Design Sources in the Sources pane, right-click the file module_1.xmp (or your file with extension .xmp) and select Create Top HDL as shown in Figure 3-25

Figure 3-25: PlanAhead Software: Generating the Top Level Hardware Design

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.26 Step #26

The progress report for generating the top level xps sub design for source module_1 as shown in the Figure 3-26 and exit planAhead.

Figure 3-26: PlanAhead Software: Progress report for creating Top HDL

Sierra TEE Xilinx Walkthrough Guide

3.27 Step #27

Launch XPS using the command prompt and then choose open Project as shown in the Figure 3-27

Figure 3-27 PlanAhead Software: Xilinx Platform Studio

Sierra TEE Xilinx Walkthrough Guide

3.28 Step #28

Select the Embedded source that you added to your project and click open as shown in the Figure 3-28

Figure 3-28 Xilinx Platform Studio: open Embedded source

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.29 Step #29:

Select the module_1.xmp and click open as shown in the Figure 3-29

Figure 3-29 Xilinx platform Studio: open module_1.xmp

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

3.30 Step #30

Select Hardware - >Generate Bit stream and the bitstream will be generated as shown in the Figure 3-30:

Figure 3-30 Xilinx platform Studio: Generating Bit Stream

Sierra TEE Xilinx Walkthrough Guide

3.31 Step #31

The Generated bit is Stored as <name>.bit is in the path <project_name>/srcs/source/edk/module/implementation/<name>.bit

Sierra TEE Xilinx Walkthrough Guide

4 Steps for Creating Boot Map Image

4.1 Step #1
Launch XSDK command using Terminal. # xsdk After Launching, the Workspace Launcher dialog box will be displayed as shown in the Figure 4-1 and browse the path of the work place you needed and then click OK button.

Figure 4-1 Software Development Kit: Workspace Launcher

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

4.2 Step #2
In Software Development kit Select Xilinx Tools -> Create Boot Image as shown in the Figure 4-2 to create a boot image.

Figure 4-2 Software Development Kit: Creating Boot map image Specification

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

4.3 Step #3
Create Zynq Boot Image dialog box opens as shown in the Figure 4-3:

Figure 4-3 Software Development Kit: Zyng Boot Image

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

4.4

Step #4

Using the link http://www.wiki.xilinx.com/Zynq+Base+TRD+14.3 Download the zynq_base_TRD package and then log in to your account and after extracting the zyng_base_TRD package. In the create Zynq Boot Image dialog box, add the files zynq_fsbl.elf, system.bit (or <name>.bit is created in the Generating system Bit steps), and u-boot.elf from the <trd package extracted directory>/boot_image directory and enter or browse to <trd package extracted directory>/boot_image in the output folder field as shown in the Figure 4-4. Press Create Image. This step will generate a file named under u-boot.bin, rename this to BOOT.bin at the specified location.

Figure 4-4 Software Development kit: Creating Zynq Boot Image

Sierra TEE Xilinx Walkthrough Guide

5 Steps for building the Kernel

5.1 Create a directory named kernel in the sierra/patches/xilinx. # mkdir sierra/patches/xilinx/kernel 5.2 Create a directory named first in Kernel directory. # mkdir sierra/patches/xilinx/kernel/first 5.3 Download Linux kernel version 3.8 and copy the linux directory as linux-xlnx inside kernel/first directory. # tar xvzf linux-3.8.0.tar.gz C /tmp # mv /tmp/linux sierra/patches/xilinx/kernel/first 5.4 Go to sierra/patches/xilinx/patches directory and run kernel_fixups.sh. # cd sierra/patches/xilinx/patches # ./kernel_fixups.sh 5.5 Set the CROSS_COMPILE environment variable and add it to your PATH. # export CROSS_COMPILE=arm-xilinx-linux-gnuabi#export PATH=<path to cross compiler>/bin:$PATH 5.6 Go to sierra/patches/Xilinx and run build_1.sh. # cd sierra/patches/xilinx/ # ./build_1.sh

Sierra TEE Xilinx Walkthrough Guide

6 Steps for Building the Sierra TEE:

6.1 Step # 1
Create a new project by Select File - >New - >Project as shown in the Figure 6-1

Figure 6-1 Software Development Kit: Creating a New Project

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

6.2

Step #2

New project dialog box will open and choose the option Make File Project with existing code and click Next as shown in the Figure 6-2:

Figure 6-2: Software Development Kit: Making file Project with Existing code

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

6.3 Step #3
Import existing code dialog box asks the path of the Project name and the location. Browse the path of the tzone_sdk from the sierra sdk installed path. In Languages unchecked the C++ option and In Tool chain for Indexer Settings choose none option and then click the finish button as shown in the Figure 4-7:

Sierra TEE Xilinx Walkthrough Guide

Figure 6-3 Software Development Kit: Import existing code

Sierra TEE Xilinx Walkthrough Guide

6.4

Step #4

In Project Explorer right click the tzone_sdk option and then choose properties option as shown in the Figure 6-4:

Figure 6-4:Software Development Kit: Properties of tzone_sdk

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

6.5 Step #5
In properties for tzone_sdk dialog box choose Environment and select Add option as shown in the Figure 6-5:

Figure 6-5: Software Development Kit: Properties for tzone_sdk

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

6.6 Step #6
Type the name as CROSS_COMPILE and give the path of the Tool chain For Example: <Xilinx_SDK_installed_directory>/ISE_DS/EDK/gnu/arm/lin64/arm-xilinx-linixeabi. Click ok.

Figure 4-10 Software Development Kit: Adding CROSS_COMPILE Tool chain path

Sierra TEE Xilinx Walkthrough Guide

6.7 Step #7
Type the name as CROSS_COMPILE_NEWLIB Note: Extract the sierraware supplied newlib toolchain. It is available in sierra/toolchain/sierranewlib.tar.bz2. Type the path of the tool chain as <sierra installed directory>/sierra/toolchain/sierra_toolcahin/arm-none-eabi.

Figure 6-7: Software Development Kit: Adding NEW_LIB Tool chain path

Sierra TEE Xilinx Walkthrough Guide

6.8 Step #8
In Project Explorer right click tzone_sdk and choose Build Project option as shown in the Figure 6-8:

Figure 6-8: Software Development Kit: Building the Project

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide

6.9 Step #9:

Final binary generated in the path of tzone_sdk_/bin/sierra TEE .bin
Copy SierraTEE.bin to the SD card.

Figure 6-9 Software Development Kit:Sierra TEE binary

Sierra TEE Xilinx Walkthrough Guide

6.10 Step #10 (Optional)

Copy the Sierra application binaries to the root file systems only if it is modified or first time compilation. Go to sierra/patches/xilinx and then run build_2.sh # cde sierra/patches/xilinx #./build_2.sh.

Sierra TEE Xilinx Walkthrough Guide

6.11 Step #11 (Optional)

This step is needed only if you run step #10. Build the SierraTEE once again using Xilinx sdk Software.
Repeat the Steps from Step 6-1 to Step 6-9 after running build_2.sh

Sierra TEE Xilinx Walkthrough Guide

7 Sierra TEE Testing

The Sierra TEE test involves running SMP Linux guest on the Xilinx-ZC702 hardware platform.

7.1 Hardware Requirements

LCD monitor with HDMI port USB keyboard USB mouse UART based command line interface

Sierra TEE Xilinx Walkthrough Guide

7.2 Testing
Board setup Please refer http://wiki.xilinx.com/zynq-base-trd-14-3#toc19. From the U-Boot prompt a. Load Sierra TEE.bin to 0x3c000000.Note: prebuilt binary is available in sierra/patches/xilinx/bin directory. <u-boot> mmcinfo; fatload mmc 0 0x3c000000 SierraTEE.bin b. Jump to 0x3c000000 <u-boot> go 0x3c000000.

This will initiate the following sequence a. Run secure world OS. b. Load and run the Linux in non-secure world

Sierra TEE Xilinx Walkthrough Guide

7.3 Testing Applications

a.Go to /root/otz b.Run the application /root/otz/otz_tee_app.elf

Sierra TEE Xilinx Walkthrough Guide

Sierra TEE Xilinx Walkthrough Guide