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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 2, FEBRUARY 2009

Analysis and Design Optimization of MagneticFeedback Control Using Amplitude Modulation


Brian T. Irving and Milan M. Jovanovi c, Fellow, IEEE
AbstractIn ofine acdc and high-voltage dcdc power supplies, galvanic isolation between the input and output is often implemented with optocoupler feedback. However, several disadvantages exist when implementing optocoupler feedback, such as a variable loop gain due to optocoupler tolerance and sensitivity to temperature, as well as a relatively high cost. An alternative to optocoupler feedback is to use magnetic feedback, which can be designed to have insensitivity to component tolerance, and good temperature stability. Although magnetic feedback has been in use for many years, a detailed analysis and clear design procedure has not been presented in the literature. This paper presents a thorough analysis of a magnetic-feedback implementation, and provides a comprehensive design procedure that is veried on a 7-V/15-W experimental prototype. Index TermsAmplitude modulation, isolated feedback, magnetic feedback, primary side control, sample and hold.
Fig. 1. General power supply with isolated magnetic feedback.

I. INTRODUCTION ALVANIC isolation between the input and output is a requirement of ofine acdc and high-voltage dcdc power supplies. In the power stage, galvanic isolation is typically achieved through use of a transformer. However, in order to provide regulation of the output, a galvanically isolated feedback loop is also required. Two commonly used isolation methods are primary-side control with optocoupler feedback [1][4] and secondary-side control, where the primary gate drive is provided through gate-drive transformers. The drawbacks of primary-side control with optocoupler feedback include variation of loop gain due to wide current transfer ratio (CTR), sensitivity to both time and temperature [5][8], and a high cost. A drawback of secondary-side control is the need for an additional secondary-side supply voltage, often supplied by a separate housekeeping converter. An alternative to primary-side control with optocoupler feedback and secondary-side control is to use magnetic feedback [1], [2], [9], [10]. Using a very small coupling transformer, a modulator, and a sample-and-hold circuit, a signal from the secondary side can be passed to the primary using either AM or FM. A magnetic-feedback circuit can be implemented either discretely or by using an IC [10].

Although it has been used in industry for many years, very few design details appear in the literature. The goal of this paper is to analyze an AM magnetic-feedback implementation, and to provide a clear, step-by-step design procedure in order to optimize the circuit performance. II. PRINCIPLES OF AM MAGNETIC FEEDBACK As shown in Fig. 1, magnetic feedback can be implemented using a small dcdc transformer, which acts as both the modulator and demodulator, to pass error voltage VEA from the secondary side to the primary side. The dcdc transformer consists of a small coupling transformer and diode, which is excited by an external source to form the modulator, with its switching frequency equal to the modulator carrier frequency. The rectied output of the dcdc transformer acts as a sample-and-hold circuit, or demodulator. The coupling transformer (TC ) can be congured either as a forward-type or yback-type converter, as shown in [9]. Both the carrier and sampling frequencies, which are synchronized, can be equal to or higher than the power-stage switching frequency, depending on the desired volume of coupling transformer TC and the desired loop performance. Generally, the loop gain of the converter is negatively impacted by the sampling delay of the demodulator. A simplied block diagram of a general power stage with magnetic feedback implemented with a yback-type dcdc transformer is shown in Fig. 2. Error amplier (EA) output VEA represents the amplied difference between output voltage VO and reference voltage VREF . An isolated modulator is implemented by coupling transformer TC , which is magnetized by current source iC based on an external carrier signal. While

Manuscript received March 14, 2008; revised July 2, 2008; accepted September 18, 2008. First published December 22, 2008; current version published February 6, 2009. This paper was presented at the Applied Power Electronics Conference (APEC), Feb. 2528, 2008, Austin, TX, and has not been otherwise published. Recommended for publication by Associate Editor D. Xu. The authors are with Delta Products Corporation, Power Electronics Laboratory, Research Triangle Park (RTP), NC 27709 USA (e-mail: birving@ deltartp.com). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TPEL.2008.2006974

0885-8993/$25.00 2008 IEEE

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Fig. 2.

General power stage with AM feedback and yback dcdc transformer.

current source iC is on, diode DEA is reversed biased, sampler switch SH is off, and current iC divides between magnetizing inductance LM and resistor RM . Once current source iC turns off, magnetizing current IM forward biases diode DEA , and error voltage VEA is reected to the primary side with a reverse polarity. Sampler switch SH , which is synchronized to the modulator, turns on during the demagnetization period of coupling transformer TC , and capacitor CH holds the sampled , which is then compared at the pulsewidth error voltage VEA modulator (PWM) to periodic ramp voltage VRAMP in order to generate the gate-drive signal to the power stage. Generally, coupling transformer TC operates as a yback converter because error voltage VEA is sampled during the demagnetization period of coupling transformer TC . As shown in [9], it is also possible to operate coupling transformer TC as a forward converter, i.e., to sample error voltage VEA during the magnetization period of coupling transformer TC . III. ANALYSIS OF AM MAGNETIC FEEDBACK An implementation of an AM magnetic-feedback circuit applied to a forward converter with synchronous rectiers and current-mode control is shown in Fig. 3. EA is implemented with transconductance amplier TLV431 and capacitor CKA that allows TLV431 to have a low output impedance at high frequencies, and resistor RST and diode DST are implemented to facilitate startup. A dcdc transformer is used as part of the modulator, and has both a yback winding for sampling error voltage VEA and a forward winding to supply amplier TLV431 and provide a turn-on signal for synchronous-rectier turn-off switch QOFF . Coupling transformer TC is magnetized by a simple current source consisting of p-n-p transistor Q1 , resistors RE , RB 1 , and RB 2 , and primary VCC is supplied by auxiliary winding NS of inductor LF . The current source is turned on and off by a carrier signal that is synchronized and equal to the main converter switching period TS , and which has a xed on time TA . The demodulator is implemented with a simple peak detector, where diode DH acts as sampling switch SH . Finally, is level-shifted and inverted, and sampled error voltage VEA

compared at the PWM modulator to a ramp that is proportional to switch current iS . The AM magnetic-feedback circuit can be simplied to three topological stages, as shown in Fig. 4, for the case when the current source is on, i.e., when the carrier signal is high, as shown in Fig. 4(a), and when the current source is off, i.e., when the carrier signal is low, as shown in Fig. 4(b) and (c). Key switching waveforms of a single switching cycle are shown in Fig. 5. While the carrier signal is high, the current source is on, diodes DH and D1 are reverse biased, and diode D2 is forward biased. While diode D2 is forward biased, voltage VLM across magnetizing inductance LM is equal to VCV + VF , where VCV is the voltage across capacitor CCV , VF is the forward voltage drop of diode D2 , and magnetizing current iLM begins to increase linearly from zero. Current iC then divides between magnetizing inductance LM , equivalent gate resistor across capacitor RG , and diode D2 . Meanwhile, voltage VEA CH , which in the previous switching cycle was charged to error voltage VEA , slowly discharges through resistors RIA and RIB . Once the carrier signal goes low, the current source turns off, diodes D1 and DH become forward biased, diode D2 becomes reverse biased, and voltage VLM is equal to (VEA + VF ) . Inductance LM begins to demagnetize, as shown in Fig. 5. Finally, hold capacitor CH peak charges to error voltage VEA . Once magnetizing inductance LM completely demagnetizes, all diodes become reverse biased, and hold capacitor CH begins to slowly discharge through resistors RI A and RI B , as shown in Fig. 4(c). IV. DESIGN OF AM MAGNETIC FEEDBACK A. Steady-State Design In order to continuously sample the error voltage, coupling transformer TC must be designed with enough margin to prevent saturation. In addition, saturation of current-source transistor Q1 must be avoided so that current iC is insensitive to current gain hFE of transistor Q1 , since hFE is sensitive to both temperature and tolerance. Both coupling transformer TC and current-source transistor Q1 can saturate due to load variations, as shown in Fig. 6. At light load, control voltage VC is low, and therefore, voltage VCV is low, resulting in a low turn-on and turn-off slope of magnetizing current iLM , and therefore, a short deadtime Td of coupling transformer TC . As the load increases, control voltage VC increases, and therefore, voltage VCV increases, which, in turn, increases the turn-on and turn-off slope of magnetizing current iLM and increases deadtime Td . However, as voltage VCV increases, current-source transistor Q1 approaches saturation, as shown in Fig. 6. Both coupling transformer TC and current-source transistor Q1 can saturate due to temperature variations, as shown in Fig. 7. As the temperature of current-source transistor Q1 increases, the forward voltage drop of emitter to base p-n junction decreases, leading to an increase in collector current ic . This, in turn, leads to an increase in voltage VCV , which pushes currentsource transistor Q1 closer to saturation. In addition, the turn-on slope of magnetizing current iLM increases, while the turn-off

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Fig. 3.

Circuit diagram of a current-mode-controlled forward converter with synchronous rectiers and AM magnetic-feedback implementation.

slope remains constant since error amplier voltage VEA remains constant. As a result, deadtime Td decreases, and coupling transformer TC also approaches saturation. It should be noted that although magnetic-feedback designs are sensitive to temperature, this sensitivity can be minimized through proper design, unlike optocoupler feedback designs whose widely varying temperature-dependent current transfer ratio cannot be minimized. Magnetizing inductance LM of coupling transformer TC also varies with temperature; generally, as the temperature increases, the magnetizing inductance increases, and voltage VCV increases since the average magnetizing current decreases. Transistor Q1 approaches saturation since base voltage VB increases, while deadtime Td remains unchanged since both the turn-on and turn-off slopes of magnetizing current iLM change proportionally. Generally, it is recommended that the maximum value of magnetizing inductance be used throughout the calculations. To prevent saturation of transistor Q1 , base voltage VB must be more than 1 p-n diode drop greater than voltage VLM . By selecting a desired maximum voltage level of error voltage VEA , e.g., VEA m ax = 4 V, and by selecting a reasonable value for resistor RI B , e.g., 1050 k, resistor RFB can be determined VE m ax VEA 1+ VEA m in VREF 2 +1 (1)

where VE m ax = 4.2 V, VE m in = 0 V, VEA m in = 1.24 V, and VEA = VEA m ax VEA m in . Next, resistor RIA and hold capacitor CH can be calculated as RIA = CH = RFB RIB RFB RIB 1+ VEA m in VREF 2 (2) (3)

10TS 2 (RIA + RIB )

where the value of CH is a tradeoff between a low ripple and excessive delay introduced in the feedback loop. Voltage VCV can be calculated based on the maximum steadystate error voltage VEA , and selected coupling transformer deadtime Td and selected current source on time TA as VCV = 1 1 Td TS TS TA (VEA + VF ) VF . (4)

Next, the required average magnetizing current ILM can be calculated as ILM = VCV + VF TA 2LM 1 Td TS . (5)

RFB = RIB

1+

From the minimum TLV431 current, average diode current IS 2 can be selected, resistor RK can be calculated as RK = (VCV VEA ) IS 2 (6)

VE m in VEA

VEA m ax VREF 2

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Fig. 5.

Key switching waverforms of AM magnetic-feedback implementation.

Fig. 4. Topological stages of AM magnetic-feedback implementation where a x is (a) on, (b) off, and (c) coupling transformer T current source im C is c completely demagnetized. Fig. 6. Effect of load variation on AM magnetic-feedback implementation.

and average diode current IS 1 + I1 can be calculated as IS 1 +I1 = VCV +VF TA VEA +VF TS (VCV +Vd ) TA VKA +Vd + 2LM RGD . VCV + VF . Resistor RE can then be calculated as RE = VCC VB Vebf ipk c (1 + 1/hFE ) (10)

(7) The required average collector current IC can now be determined since IC = IS 2 IS 1 I1 + ILM (8) and nally, the peak collector current IC TS ipk . c = TA ipk c can be determined as (9)

Since saturation of transistor Q1 must be avoided, base voltage VB should be set approximately 2 V higher than voltage

where voltage Vebf is the baseemitter voltage of Q1 . It should be noted that voltage VCC , which should be selected greater than voltage VB , may be excessively high based on the selection of maximum error voltage VEA m ax . Additional iterations may be needed to nd both the optimal value of voltages VEA m ax and VCC . By selecting a reasonable value of base resistor RB 2 , e.g., 110 k, base resistor RB 1 can be calculated assuming that

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Fig. 8. Small-signal block diagram of forward converter with current-mode control and magnetic feedback.

Fig. 7. tation.

Effect of temperature variation on AM magnetic-feedback implemen-

current gain hFE

1 RB 1 = RB 2 1 VB VCC . (11)

B. Small-Signal Design As long as coupling transformer TC does not saturate, the effect of the modulator/demodulator on the loop gain is simply to add a sample-and-hold delay. Generally, parasitic such as leakage inductance of coupling transformer TC have no affect on the loop gain. Small-signal modeling of converters implemented with current-mode control typically consists of an inner current loop and an outer voltage loop [11][21]. A small-signal block diagram of a converter operating with current-mode control, originally proposed in [11], is shown in Fig. 8, whereas the transfer functions are given in Table I of the Appendix. Power-stage transfer functions were derived using the model of the PWM switch [12]. Current loop Ti is dened as the product of powerstage transfer function Gid , equivalent sensing resistor RS , sampling gain He , and modulator gain FM , i.e. Ti = Gid RS He FM (12)

Fig. 9. Compensation of voltage loop using pole-zero cancellation and straight-line approximations.

Transfer function Gv c is the control-to-output transfer function of the power stage with current loop Ti closed, i.e. Gv c = v o FM Gv d Gv d RL 1 + s/z c = = v c 1 + Ti RS Gid RS 1 + s/P .
Ti 1

whereas voltage loop Tv is dened as the product of control-tooutput transfer function Gv c , sensing gain Kd , error amplier transfer function GEA , sample-and-hold transfer function GSH , and transfer function GE , i.e. Tv = Gv c Kd GEA GSH GE . (13)

(14) Generally, subharmonic oscillation can occur in designs that have a duty cycle greater than or equal to 50%. However, this can be overcome by a proper selection of compensation ramp Se , as discussed in [11]. The design of error amplier GEA is based on transfer functions Gv c , Kd , GSH , and GE , and straight-line approximations are shown in Fig. 9. It is benecial to include capacitor CFB across feedback resistor RFB for noise immunity, which introduces an additional pole (fp 1 ) that should be placed well below switching frequency fS . In fact, pole fp 1 can be used to cancel equivalent series resistance (esr) zero fz c of control-tooutput transfer function Gv c . In addition, it should be noted that

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sample-and-hold delay function GSH introduces a phase delay that should be considered before nalizing the loop design. Design of loop gain TV should be done at full load since pole fP of control-output transfer function Gv c increases as load resistor RL decreases, thereby resulting in the maximum crossover frequency. Selection of crossover frequency fCV should be well below switching frequency fS , i.e., fCV fS . In fact, crossover frequency fCV may be further limited due to the low open-loop gain AV O of TLV431. Finally, crossover frequency fCV is further limited by the sample-and-hold delay. From Fig. 9, an integrator is needed to provide a high gain at low frequencies for good load regulation, while zero fz 1 is needed to cancel out control-to-output transfer function pole fp . Switching ripple is attenuated by both pole fp 1 of transfer function GE and open-loop gain AV O of TLV431 |GEA (f = fCV )| = 1 |Kd Gv c (f = fCV )| |GE (f = fCV )|
A B

Fig. 10. Measurements of open-loop gain A V O of TLV431B using datasheet recommended test circuit.

(15) where the gain of sample-and-hold transfer function GSH is equal to unity. Since fCV > fz 1 |GEA (f = fCV )| = RF . RI (16)

By selecting feedback resistor RF within a reasonable range (e.g., 50200 k), resistor RI can be calculated as RI = RF AB. (17)

By setting zero fz 1 equal to pole fP , capacitor CFS can be calculated as 1 CFS = . (18) 2RF fz 1 Once compensation components are calculated, error amplier transfer function GEA should be checked with open-loop gain AV O included to see if the design is optimal. Generally, open-loop gain AV O changes with dc operating current IK as well as the amplitude of input signal VOSC , as shown in Fig. 10. It should be noted that the test circuit was obtained from the TLV431B on Semiconductor datasheet. Fig. 11 shows the measured open-loop gain including capacitor CKA , resistor RKA , and RK replaced with a 3-k resistor. V. EXPERIMENTAL RESULTS To validate the design procedure, a 7-V/15-W laboratory prototype of a forward converter with magnetic feedback and amplitude modulation was designed for an input voltage range 35 < VIN < 72, and an ambient operating range of 40 C to 100 C. The key component values are shown in Fig. 12. In the experimental circuit, maximum error voltage VEA m ax was selected as 4 V, and the minimum cathode current Ik of TLV431 was set to 4 mA. On-time TA of current source iC was set to 500 ns, and feedback transformer deadtime Td was designed to be half of switching period TS . As a result, voltage VCV was approximately 11.5 V, and base voltage VB of transistor Q1 was set approximately 2 V higher, ensuring that transistor

Fig. 11. Measurements of open-loop gain A V O of TLV431B including resistor R KA , capacitor C KA , and R K = 3 k .

Fig. 12. Circuit diagram and key component values of 7-V/15-W experimental prototype.

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Fig. 14. Measured versus calculated voltage-loop gain at full load and nominal input voltage.

Fig. 13. Experimental results of a 7-V/15-W laboratory prototype at room and hot ambient for transistor Q 1 operating in the (a) saturation region and (b) active region.

Q1 does not saturate. This required voltage VCC to be greater than 13.5 V, and therefore, VCC was set to 16 V. Finally, the carrier frequency was set equal to switching frequency fs , where fs = 285 kHz. Fig. 13 shows oscillograms of two different control designs of the experimental prototype. In Fig. 13(a), current-source transistor Q1 was designed to operate in the saturation region (i.e., voltage VCV > base voltage VB ), and in Fig. 13(b), currentsource transistor Q1 was designed to operate in the active region. For both designs, deadtime Td was compared at room and high ambient temperatures. Fig. 13(a) shows that on-time TA of the current source is signicantly longer at high ambient temperature than at room ambient temperature. This is due to the fact that on-time TA is dependent on current gain hFE of transistor Q1 when Q1 operates in the saturation region. As a result, the magnetizing energy of coupling transformer TC increases and deadtime Td decreases. As the ambient temperature increases,

deadtime Td decreases until it reaches zero, which results in the loss of output-voltage feedback. Fig. 13(b) shows that on-time TA is nearly constant because transistor Q1 operates in the active region. Generally, on-time TA is independent of current gain hFE when transistor Q1 operates in the active region. A comparison between the measured and calculated loop gain is shown in Fig. 14, which demonstrates a 6-kHz bandwidth, 60 phase margin, and 20-dB gain margin. The open-loop gain AV O was measured using the test circuit shown in Fig. 11 for an oscillation input of 50 mV, and used in the voltage-loop gain calculations. Generally, it is desirable to have a crossover frequency greater than one-tenth of switching frequency fs . At one-tenth of switching frequency fs , the phase lag due to the sample and hold is 36 , permitting at best a phase margin less than 54 , assuming that the voltage-loop gain crosses 0 dB with a 1 slope. It was found that although switching frequency fs was set very high (i.e., fs = 285 kHz) to achieve a phase margin greater than 45 , the voltage-loop crossover frequency was limited to less than 10 kHz by the low open-loop gain of TLV431.

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TABLE I KEY SMALL-SIGNAL TRANSFER FUNCTIONS

VI. SUMMARY A forward converter with magnetic feedback and amplitude modulation was thoroughly analyzed, and a comprehensive steady-state and small-signal design procedure was presented. The design procedure was veried with a 7-V/15-W experimental prototype, and steady-state and small-signal measurements were provided. APPENDIX (See Table I at the top of the page) REFERENCES
[1] M. P. Sayani, R. V. White, D. G. Nason, and W. A. Taylor, Isolated feedback for ofine switching power supplies with primary-side control, in Proc. IEEE Appl. Power Electron. Conf. (APEC), Feb. 1988, pp. 203 211. [2] B. Mammono, Isolating the control loop, in Proc. Unitrode Semin., 1997, pp. C-21C-15. [3] Y. Panov and M. M. Jovanovi c, Small-signal analysis and control design of isolated power supplies with optocoupler feedback, IEEE Trans. Power Electron., vol. 20, no. 4, pp. 823832, Jul. 2005. [4] W. Kleebchampee and C. Bunlaksananusorn, Modeling and control design of a current-mode controlled yback converter with optocoupler feedback, in IEEE Power Electron. Drive Syst. (PEDS05), Jan. 2006, vol. 1, pp. 787792. [5] K. Billings, Switchmode Power Supply Handbook. New York: McGrawHill, 1989, pp. 3.1613.165. [6] J. Bliss, Theory and characteristics of phototransistors, Motorola Appl. Note AN-440, Motorola Databook Optoelectronics device data, 1989, pp. 9.39.13. [7] T. Bajenesco, CTR degradation and ageing problem of optocouplers, in Proc. Solid-State Integr. Circuit Technol. Conf., Oct. 1995, pp. 173175. [8] T. Bajenesco, Ageing problem of optocouplers, in Proc. 7th Mediterr. Electrotech. Conf., Apr. 1994, vol. 2, pp. 571574. [9] L. Ou and D. Curtis, Magnetic feedback ranks high in military converters, Power Electron. Technol., vol. 31, no. 7, pp. 1419, Jul. 2005. [10] R. Valley, The uc1901 simplies the problem of isolated feedback in switching regulators, TI Application Note U-94, 1999. [11] R. B. Ridley, A new, continuous-time model for current-mode control, IEEE Trans. Power Electron., vol. 6, no. 2, pp. 271280, Apr. 1991. [12] V. Vorperian, Simplied analysis of PWM converters using the model of the PWM switch: Parts I and II, IEEE Trans. Aerosp. Electron. Syst., vol. 26, no. 3, pp. 490505, May 1990. [13] S. Singer and R. W. Erickson, Canonical modeling of power processing circuits based on the Popi concept, IEEE Trans. Power Electron., vol. 7, no. 1, pp. 3743, Jan. 1992.

[14] R. D. Middlebrook, Topics in multiple-loop regulators and current-mode programming, IEEE Trans. Power Electron., vol. PE-2, no. 2, pp. 109 124, Apr. 1987. [15] F. D. Tan and R. D. Middlebrook, A unied model for currentprogrammed converters, IEEE Trans. Power Electron., vol. 10, no. 4, pp. 397408, Jul. 1995. [16] B. Johansson, A comparison and an improvement of two continuoustime models for current-mode control, in Proc. IEEE Int. Telecommun. Energy Conf. (INTELEC), Sep. 2002, pp. 552559. [17] D. J. Perreault and G. C. Verghese, Time-varying effects and averaging issues in models for current-mode control, IEEE Trans. Power Electron., vol. 12, no. 3, pp. 453461, May 1997. [18] Y. W. Lo and R. J. King, Sampled-data modeling of the average-input current-mode-controlled buck converter, IEEE Trans. Power Electron., vol. 14, no. 5, pp. 918927, Sep. 1999. [19] E. A. Mayer and R. J. King, An improved sampled-data current-modecontrol model which explains the effects of control delay, IEEE Trans. Power Electron., vol. 16, no. 3, pp. 369374, May 2001. [20] T. Tepsa and T. Suntio, Adjustable shunt regulator based control systems, IEEE Power Electron. Lett., vol. 1, no. 4, pp. 9396, Dec. 2003. [21] T. H. Chen, W. L. Lin, and C. M. Liaw, Dynamic modeling and controller design of yback converter, IEEE Trans. Aerosp. Electron. Syst., vol. 35, no. 4, pp. 12301239, Oct. 1999.

Brian T. Irving was born in Ossining, NY, in 1973. He received the B.Sc. degree in electrical engineering from the University of Binghamton, Binghamton, NY, in 1998. From 1996 to 1998, he was an Engineer with Celestica, Inc., Endicott, NY. In 1998, he joined the Power Electronics Laboratory, Delta Products Corporation, Research Triangle Park, NC, where he is currently a Senior Member of R&D Staff. His current research interests include low-harmonic rectication, control techniques, current sharing, modeling, and simulation.

Milan M. Jovanovi c (F01) received the Dipl. Ing. degree in electrical engineering from the University of Belgrade, Belgrade, Serbia. He is currently the Chief Technology Ofcer of the Power Systems Business Group, Delta Electronics, Inc., Taipei, Taiwan.

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