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JOURNAL OF TELECOMMUNICATIONS, VOLUME 22, ISSUE 2, NOVEMBER 2013

7
Ideal Grounded Supercapacitor Using a
DVCCTA
R.Nandi, Sagarika Das and P. Venkateswaran
Abstract- The simulation of grounded ideal frequency dependent negative resistor (FDNR) type supercapacitor(D) with driving point
admittance function of Y(s) = s
2
D is proposed.The design uses a single differential voltage current conveyor transcapacitive
amplifier(DVCCTA) building block with a single grounded passive RC section. Effects of the device port errors(e) and parasitic
capacitors have been shown to be negligible. Some applications of the supercapacitor in high Q tunable selective filter and
quadrature oscillator design along with experimental results are presented.
Index Terms Synthetic supercapacitor, DVCCTA, Active Filter, FDNR

1 Introduction
The FDNR type Supercapacitor element had been shown to
be quite useful in areas of analog signal processing and
filtering applications[1-8 ] following the concept of Bruton .
A number of supercapacitor simulation schemes are presented
in the recent past using various types of building blocks e.g.
voltage operational amplifier[3 ], second generation current
conveyor[4-6 ], DVCCS [7],current feedback amplifier [8,9 ],
operational transresistive amplifier OTRA[10] and the current
backward transconductance amplifier CBTA[11 ].
The DVCCTA device is a relatively new active building
block[12,13 ] suitable for various analog signal processing
circuit design.Presently this device is being used primarily in
the transconductance (g
m
) node; here we intuitively modified
the device in its internal circuitry to operate in a trans
capacitive (Cm) mode with a view to design newer variants of
synthetic components and active filter structures .Two such
new ideal supercapacitor simulation schemes are presented
here using a single such transcapacitive mode of the
DVCCTA. These circuit scheme are quite simple involving
only one grounded passive RC section with no component
matching constraint while the supercapacitor(D) is tunable by
the resistor .Analysis had been further carried out taking into
account the device port mismatch errors(! ! !! and
byexamining the port parasitics that appear in the form of
shunt RC arms[8,14,15].It is shown that effect of these



nonidealities are quite insignificant which yield extremely
low active sensitivity , the losslessness of the simulated
supercapacitor (D) may be preserved with appropriate design
; this feature is experimentally verified by designing some
high quality (Q) filter using the supercapacitor.For
experimental work ,the desired building block topology had
been hardware fabricated in the laboratory by using the
readily available unity current gain AD844[14] integrated
circuit chips for their superior quality e.g. high slew rate and
accurate pot transfer property [ 8,9,16]. The proposed designs
were also tested with PSPICE macrocircuit model [16,17],for
supercapacitor based high Q bandpass (BP) and Band reject
(BR) characteristics; the design of grounded shunt RD type
tunable quadrature oscillator is also presented.




2 Analysis
The proposed simulation circuit is shown in Fig.1 where the
nodal relation of the DVCCTA device are Vx = ! (V1-V2),
Iz="Ix, Io= #Vz(sC
m
) and I
y1
=I
y2
=0;the port transfer ratios
may be postulated by some mismatch errors () as ! =(1- $
i
),
"= (1- $
v
)and #= (1- $
o
).These errors are usually extremely
low[8,14] |$| << . 1 The parasitic components
(3pF%Cp,z%9pF and 2M&%rp,z%6M&) appear as shunt
elements as shown by dotted line [ 16]. Initial analysis
assuming ideal condition '0, C
p,z
'0 and g
p,z
'0 yield the
driving point admittance for both circuits in Fig.1 as
Yi = s
2
D; D= RC
m
C (1)
"#$%&'((corresondingaulhor) )#*+&,%-+./%0%&:Del. of IIeclronics
& TeIecommunicalion Ingrg., }adavur Universily,KoIkala-
700032,India
1%2%0(,% 3%.Del.of IIeclronics &Communicalion Ingrg., .I.Ioddar
Insl.of Mgml.&Tech.,
KoIkala-700052, India

JOURNAL OF TELECOMMUNICATIONS, VOLUME 22, ISSUE 2, NOVEMBER 2013

8
Thus Y
i
represents an ideal grounded supercapacitor
which is tunable by single grounded resistor ( R) without
necessitating any component matching requirement; the
capacitor (C) is also grounded a feature suitable for
microminiaturization [18] . it may be mentioned here that
the DVCCTA is an enhanced version of the unity gain
current conveyor(CC) having a high input impedance
differential stage at front end and a transcapacitive(C
m
) stage
at the back end; hence the AD844 or IC chips may be the
appropriate device for its ready implementation.


(a)





(b)



Fig.1 Proposed Supercapacitor (D) simulation

3 Effects of Non idealities
We first examine the effects of the finite port errors(!(0); re
analysis shows a modified admittance function given by
Yi'=(! " #)s
2
D for both circuits.albeit the magnitude of the
supercapacitor is slightly altered as D'= (1-
t
)D;
t
'

i
+
v
+
o
; however its lossless quality is preserved.
Next the effects of the parasitic components are examined by
writing g
z
=1/r
z
; for Fig.1(a) the modified driving point
impedance function( Z
i
' ) as
Z
ia
' ={sRC
p
+1+a}/[s
2
D(1+b)+s{mC
p
+(1+a)C
z
}+g
z
(1+a)]..(2)

where a = R/rp << 1, b = C
z
C
p
/C
m
C<<1 and m = R/r
z
<<1.
Since in practical design we select R in k&, and C and C
m
in
nF ranges . location of the zero in eq.(2) appears at )
p
'1/RC
p

i.e. f
p
(typical)' 39 MHz if R =1K& and C
p
= 5 pf. If the
operating frequency range is restricted below this value
()<)
p
), we simplify the admittance function in eq.(2) as

Y
i
' ={sRC
p
+1+a}/[s
2
D(1+b)+s{mC
p
+(1+a)C
z
}+g
z
(1+a)]..(3)
The quality of the modified supercapacitor in Fig.1(a) is
obtained as
q
a
= *(C
m
CR/r
z
)/ C
t
(4)
where C
t
is the total value of the parasitic capacitance given
by C
t
= C
z
(1+a)+m C
p
(5)
Thus one may obtain a large q
a
for the simulated
supercapacitor ,e.g. typically if R = 1k&, r
z
= 5M&,C
t
'
(5+5)pF,and C=C
m
= 10 nF,we get 100 % q
a
%300.Similar
analysis yields the impedance of!!
!"
!
! for the circuit in
Fig.1(b); after writing g
p
= 1/r
p
we get
Z
i
'
b
={sRC
z
+1+m}/[s
2
D(1+b)+sC
t
+g
p
(1+m)] (6)
For operating frequencies )<1/ RC
z
, eq.(6) simplifies to
Y
i
'
b
= s
2
D(1+b)+sC
t
+g
p
(1+m .. (7)
Thus for both the circuits, the parasitic capacitors introduce
nonideality in the supercapacitor quality since D element is
shunted by parallel combination of C
t
and r
p,z
; the quality
factor (q
b
) for the impedance for eq.(7) is
q
b
= *( C
m
CR/r
p
)/ C
\t
. (8)
By similar reasoning we observe that very high quality
(q
b
>>1) supercapacitor element is simulated in Fig. 1(b). it is
therefore suitable for the designer to utilize these grounded
high quality D elements for high selectivity filters.
4 Filter Design
Both the proposed circuits had been utilized in the design
of good quality bandpass (BP) and band reject (BR) filters;
the BP filter is built with the supecapacitor being shunted by a
resistor(R
o
) and the BR filter is designed with RD series
combination, as shown in Fig.2,whrein the test responses
obtained with both hardware test and PSPICE simulation are
shown ; Table-1 shows some pertinent design equations.
It may be seen that with appropriate component
selection ,the effects of the parasitics can be minimized
significantly which enables the designer the feature of single
resistor f
o
tunability; experimental verification for f
o
tuning in
the range of 100kHz-900kHz with good quality (1 % Q %6)
had been carried out. The possibility of designing a shunt RD
Zin
R
y2 0
DVCCTA
(sCm)
y1
x z

Cz
Cp
C
Zin
y2 0
DVCCTA
(sCm)
y1 x z

Cz
Cp
C
"
JOURNAL OF TELECOMMUNICATIONS, VOLUME 22, ISSUE 2, NOVEMBER 2013

9


sinusoid oscillator with quadrature wave response is also
verified as shown in Fig.2

(a)+KHz

(b) + KHz


Fig.2 Supercapacitor based filter design: (a) BP response
tuned at f
o
=500KHz ; Q ' 6.6 with C=C
m
=330pF,
R=R
o
=1K&, C
o
=50pF
(b)BR response tuned at f
o
=460KHz; Q' 7.2 with
C=Cm=347pF, R=R
o
=1K&, C
o
=2.5nF
(c) Quadrature oscillation at V
x
using shunt RD combination
tuned to f
o
=750KHz tested with C=100pF, R=1K&, Ro =
4.5K& ; f
o
-tuning verified in the range 300KH~1.2MHz by
varying grounded-Ro
! Simulation , Hardware test
(d) spectral response of oscillator wave: THD'3.3% measured

5 Conclusion

Using a single DVCCTA active building block and only the
minimum number of all grounded passive RC components,
two new design for ideal grounded supercapacitor type FDNR
element simulation is proposed wherein the active device
had been configured intuitively in the transcapacitive mode.

(c)


The use of the CFA device had been found to be quite
convenient for deriving this mode owing to the superior
terminal properties [8,14] of the AD844 device. Details
analysis of the proposed designs taking into effect of the
device parasitic, show that the nonideal effects are quite
insignificant. Applications of the supercapacitors in high
quality BP and BR filter design examples are presented.








(d) + Hz


0




-25



-50
0 1M
M
2M 3M
7







0

Zin
Fbp
F
br
T
Time (s)
0.00 1.00u 2.00u 3.00u 4.00u
O
u
t
p
u
t
-8.50
0.00
8.50
0 2.5u 5u 7.5u 10u
Time(s)

JOURNAL OF TELECOMMUNICATIONS, VOLUME 22, ISSUE 2, NOVEMBER 2013

10



TABLE 1

Summary of Supercapacirtor design equations under nonideal conditions and filter design example
Fig.1 Y
i
(ideal) Z
i
(Nonideal) Filter
Transfer function

(a) !
!
! !
!
! Z
ia
' ={sRC
p
+1+a}/[s
2
D(1+b)+sC
t
+g
z
(1+a)] F
bp
= sC
o
R
o
/[DR
o
+sR
o
C
o
(1+x) +(1+a)-]
! ! !"!
!
if )<1/RC
p
and a<<1 )
0
=1/ !
!
!"!
!
! !!!!!!!
!
)if C=C
m
!
!"
!
!
!
!
!!
!
!!
!
!!!
!
!
!
!!!
Q = * (CmCR/Ro)/(1+Co ) ' * (R/Ro)(C/Co)
!
!
!
!
!
!"!!
!
!!


F
br
={ s
2
DR
o
+sCtR
o
+1}/[S
2
DR
o
+s{CtR
o
+(D/R
o
)}+1+]
(b) !
!
! !
!
! Z
i
'
b
={sRC
z
+1+m}/[s
2
D(1+b)+sC
t
+g
p
(1+m)

! ! !"!
!
if )<1/RC
z
and m<<1 )
o
= 1/*DR
o

Z
i
'
b
=r
p
/[s
2
Dr
z
+sC
t
r
z
+1)] q
z =
* (CmC/Ct
)>>1


q
b
= =* (CmCR/rp)/Ct q
p
. Q =* (CmCRRo)/[CtRo+(CmCR/Co)] 'C/C0 if C= Cm and R = R0

Note: For both Figs.1(a) and (b) - $$the super capacitor becomes ideal with suitable component choice,e.g., Ct<<*(CCm) , ! ! !
t
/C
0
,
b= C
z
C
p
/CC
m
, a = R/r
p
, m= R/r
z
, -= Ro/rz, !! !! !! !! ! ! !! C
t
= m C
p
+(1+a)C
z..




References

1.L.T.Bruton,(1980). RC-Active Circuits: Theory and
Design. Englewood Cliffs, NJ: Prentice Hall.
2.A. Antoniou, Realization of gyrators using operational
amplifiers and their use in RC-active network synthesis,
IEEE Proc., vol.116,1838-1850,1969.
3.R. Nandi, Novel active-R supercapacitor
simulation :Applications in low-sensitivity multifunction
network realization, Electron. Lett., vol.16,570-571, 1980.
4.P.Martinek,Lossy FDNR based on CCII(-)
current Conveyor,Proc.Int. Conf. Radioelecktronica.
Brno,CzechRepublic.www.urel.feec.vutbr.cz/archive/ra2006.
5.R.Senani,Floating ideal FDNR using only two
current conveyors. Electron Lett., vol.20, 205-206,1984.
6.S.Nandi, P.B.Jana & R.Nandi, A Novel floating ideal
tunable FDNR . IEEE Trans. Circt. Sys.
vol.31,402!40,1984.
7.R. Nandi, New ideal active inductance and frequency
dependent negative resistance using
DVCCS/DVCVS:Application in sinusoidal oscillator
realization, Electron Lett.,vol.14,551-553, 1978.
8. R.Nandi, S.KSanyal & T.K.Bandyopadhyay,(2006). Low
sensitivity multifunction active circuits using CFA-based
supercapacitor, Int. Jl.Electron.,vol.93,689-698, 2006.
9.T.A.Abuelmatti,New grounded immittance function
simulators using single current feedback operational
amplifier, Analog.Int.Cct.Sig.Proc.,vol.71,95-100,2012.
10.A.Gupta,R.Senani, D.RBhaskar& Singh,A.K.,OTRA-
based grounded FDNR and grounded inductor simulators
and their applications Jl.Cct.Sys.Sig.Proc.,31, 489-
499,2012.
11.E.U.Ayten,M,Sagbas & J. Koton,(2012)Novel floating
general element simulators using CBTA. Jl. Radioeng.,
vol.21,11-19,,2012.
12.K.Verma & S.Gautam,S,Realization of voltage
mode universal filter by single DVCCTA, Int.Jl.Sc.Res.
Engr.Tech.,vol.2, 93-96,2013.
13.N.Pandey & S.K. Paul,(2011),VM and CM universal filter
based on single DVCCTA. Jl.Active and Passive
El.Compon., http://dx.doi.org/10.1155/2011/929507, 2011
14.A.Tammam,A.,K.Hyatleh,M.Ben-Esmael, N., Terzopoulos
& C.Sebu, Critical review of the circuit architecture of
JOURNAL OF TELECOMMUNICATIONS, VOLUME 22, ISSUE 2, NOVEMBER 2013

11
CFOA. Int.Jl.Electron., 2http://dx.doi.org/ 10.1080/
00207217.2013.780309, 2013.
15.D.Potson,Current feedback amplifier applications circuit
guide. Application note OA-17 . Databook Comlinear
Corpn. Fort Collins, Colorado,USA. ,14-32, 1991.
16.Macromodel of AD 844 AN in PSPICE
library.(1992).Microsim Corpn., Calif.,USA.
17. News Updates. (2004).Global Signal Processing Times
(Internet Version).
18.G.S.Moschytz .(1975). Linear Integrated Networks
Design,Van Nostrand Reinhold, USA, 1975.

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