Lecture 13

Example
Using this circuit, we want to establish a drain current of 0.5mA The MOSFET has these qualities:
Vt=1V KnW/L=1mA/V2 Channel length modulation is ignored

VDD=15V

Example
As a rule of thumb, we will design the circuit such that 1/3 of the voltage drops across each component, thus evening out the voltage drops This means that VD=10V and VS=5V We can calculate the required resistances from this:
VDD VD 15 10 RD = = = 10k ID 0.5mA

RS =

VS 5 = = 10k RS 0.5mA

Example
We now want to find the voltage to apply to the gate to get 0.5mA of drain current. First calculate the overdrive voltage: The gate source voltage is: With the source biased at +5V, the voltage to be applied to the gate is: We want to get this bias from a voltage divider using large valued resistors. We can choose:
RG1=8M RG2=7M
1 W 2 VOV kn 2 L 1 2 0.5mA = 1mA / V 2 VOV 2 VOV = 1V ID = VGS = VOV + Vt = 2V
VG = VGS + VS = 2 + 5 = 7V

The NAND gate

The or gate was two gates in parallel: Thus either input would generate a response The and gate requires both inputs to be high to switch... This can be accomplished by putting the FETs in series And having the resistor above them gives the inversion. How would you make a non inverting gate?
VDD

Vout V1

V2

Biasing
As we have seen, for the amplifier, we need to bias the FET to get it to operate in saturation We already looked at simple voltage biasing But there are some other means to do this: Tie the gate and drain together Make the FET an offer it cant refuse...

Drain to Gate Biasing

We saw earlier that an effective way to ensure that a MOSFET stays in the saturation region is tying the gate to the drain terminal. By adding a large resistor, we can keep the DC bias on the gate at the drain voltage. The reason for the large resistor is to provide a high impedance for any capacitively coupled signal fed into the gate. But this is not such a great circuit because it has limited output voltage swing.

Biasing with Constant Current

If your concern is, and rightly so, that you want the current through the transistor to be constant, then the best way to do that is to force it! Placing a constant current source at the source of the transistor will ensure that the desired drain current is met. This might appear to be cheating but remember that we just want to get the transistor to the correct bias point, the signal will float on top of this.

Small Signal Operation

We can now proceed with looking at the small signal operation of the MOSFET Remember that we determined from the transfer curve that the ideal operating mode for a MOSFET amplifier is in the saturation region. This requires us to apply a DC bias to the transistor to get its qiescent point located at the optimal point on the transfer curve. The AC signal will ride on top of that. Our output will be taken between the drain terminal of the FET and the drain resistor

DC Bias point
By setting vGS to zero, we can determine what value VGS needs to be in order to get the transistor into the operating point we desire. VGS controls the drain current: This in turn affects the output voltage. We must be certain that the operation stays in saturation, so we have this restriction on our output: Furthermore, we need to ensure the desired voltage swing will be encompassed in the saturation region

ID =

1 W (VGS Vt )2 kn 2 L

VD = VDD RD I D

VD > VGS Vt

Imposing the signal current

If we turn on the signal voltage, vGS, then we have a combined input of: This added to the drain current equation will yield a component that is equal to the DC bias point current and terms that are proportional to the signal and the square of the signal. If vGS is small, then we can ignore the square term. In this case we have a linear response from the amplifier from the signal, as we want.

iD =

1 W (VGS + v gs + Vt )2 kn 2 L

v gs << 2VOV
iD = I D + id

Example 1
Consider an NMOS transistor with:
kn(W/L)=2mA/V2 Gate bias VOV=1V

What is the resulting DC bias current for operation in saturation? How much does the current change if a +0.1V signal is added? What about a -0.1V signal? Estimate gm from this.

Example 1
What is the resulting DC bias current for operation in saturation? We use the equation for drain current in saturation. Now lets add a +0.1V signal on top of this: Subtract from this, the DC bias current Now the -0.1V signal:
gm = vo 0.19 0.21 =2 = ( ) vi 0.1 0.1

ID =

1 W 1 VOV 2 = 2mA / V 2 (1V )2 = 1mA kn 2 L 2

iD =

1 W (VOV + 0.1)2 kn 2 L
+0.1V

1 2 = 2mA / V 2 (1.1V ) = 1.21mA 2

id = iD I D = 1.21 1 = 0.21mA

iD =

1 W (VOV 0.1)2 kn 2 L

1 -0.1V 2 = 2mA / V 2 (0.9V ) = 0.81mA 2

id = iD I D = 0.81 1 = 0.19mA

Transconductance
The linear term of the drain current is a function of the bias point voltage and the signal voltage This term with the bias point voltage is referred to as the transconductance, gm It can also be expressed in terms of the overvoltage The transconductance represents the slope of the iDvGS curve at the DC bias point. We can see that the transconductance is dependent on the gate voltage

W (VGS Vt )v gs id = k n L
g m = kn W (VGS Vt ) = k n W VOV L L