Enhanced Area Efficient Architecture for 128 bit Modified CSLA AIM: The main aim of the project

is to design Enhanced Area Efficient Architecture for 128 bit Modified CSLA. ABSTRACT: In the design of Integrated circuits, area occupancy plays a vital role because of increasing necessity of portable systems. Carry Select Adder (CSLA is a fast adder used in data processing processors for performing fast arithmetic functions. !rom the structure of the CSLA, the scope is to reduce the area of CSLA based on the efficient gate"level modification. In this paper #$% bit &egular Linear CSLA, 'odified Linear CSLA, &egular S(uare"root CSLA (S)&T CSLA and 'odified S)&T CSLA architectures have been developed and compared. *o+ever, the &egular CSLA is still area"consuming due to the dual &ipple Carry Adder (&CA structure. !or reducing area, the CSLA can be implemented by using a single &CA and an add"one circuit instead of using dual &CA. Comparing the &egular Linear CSLA +ith &egular S)&T CSLA, the &egular S)&T CSLA has reduced area as +ell as comparing the 'odified Linear CSLA +ith 'odified S)&T CSLA, the 'odified S)&T CSLA has reduced area. The results and analysis sho+ that the 'odified Linear CSLA and 'odified S)&T CSLA provide better outcomes than the &egular Linear CSLA and &egular S)&T CSLA respectively. This project +as aimed for implementing high performance optimi-ed !./A architecture. 'odelsim #0.0c is used for simulating the CSLA and synthesi-ed using 1ilin2 .lanAhead#3.4. Then the implementation is done in 5irte26 !./A 7it.
V.Mallikarjuna (Project manager)

ISO: 9001- 2000 CERTIFIED COMPANY

Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &

BL C! "IA#RAM:

!ig8 'odified #9"bit S)&T CSLA.

LS:

1ilin2 :.$IS;, 'odelsim9.4c. A$$LICATI % A"&A%TA#ES: The reduced number of gates of this +or< offers the great advantage in the reduction of area. The #$%"bit 'odified S)&T CSLA has reduced area compared +ith &egular Linear CSLA, &egular S)&T CSLA and 'odified Linear CSLA. RE'ERE%CES:

V.Mallikarjuna (Project manager)

ISO: 9001- 2000 CERTIFIED COMPANY

Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &

 0.#. =edrij, >Carry"select adder, > I&; Trans. ;lectron. Computer., pp. 340" 344. =. &am<umar, *.'. 7ittur, and .. '. 7arman, >ASIC implementation of modified faster carry save adder, > ;ur. ?. Sci. &es., vol. 4$, no. #, pp.63"6%. T. @. Ceiang and '. #. *siao, >Carry"select adder using single ripple Carry adder, > ;lectron. Lett, vol. 34, no. $$, pp. $#0#"$#03. @. 7im and L."S. 7im, >94"bit carry"select adder +ith reduced area, > ;lectron. Lett. vol. 3A, no. #0, pp. 9#4"9#6. ?. '. &abaey, Bigtal Integrated Circuits"A Besign .erspective.Cpper Saddle &iver, D?8 .rentice"*all.

V.Mallikarjuna (Project manager)

ISO: 9001- 2000 CERTIFIED COMPANY

Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &