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NOVEMBER, 1999

Prepared by: ALVIE RODGERS C.E.T.

This training package is geared specifically to the 60SDX88B progressive scan HDTV capable set. The necessary understanding that the 60SDX88B requires a Set-Top-Box to receive SDTV and HDTV signals is important. The 60SDX88B does NOT have a DM-1 module. This module is built into the 61HDX98B which allows this set to receive all ATSC formats as well as Direct TV, NTSC, SDTV or HDTV. The 60SDX88B has a built in FLEX converter that translates any input into either 480P for NTSC or SDTV and/or 1080I for HDTV. It does have Component Inputs.

The Power Supplies are the same for either set. The Deflection circuit is very similar between the two sets. The Signal PWB is very similar between the two sets, minus the differences mentioned above. Digital Convergence is the same between the two sets. 61HDX98B is a DP-85 chassis with a 16X9 aspect screen. 60SDX88B and the 50SDX89B is a DP-86 chassis with a 3X4 aspect screen.

CONTENTS...

1999 DP-86 HDTV Ready Projection Television Information

DP-86 BLANK PAGE NOTES

BLANK PAGE

60SDX88B DP86 CHASSIS TRAINING and INFORMATION


CONTENTS

SECTION

PAGE

1): GENERAL BLOCK DIAGRAMS, SECTION: Power Supply Block Diagram --------------------------------------------------------------- 01-01 AV Selector Block Diagram ----------------------------------------------------------------- 01-02 Signal Processing Block Diagram ---------------------------------------------------------- 01-03 System Control Block Diagram ------------------------------------------------------------- 01-04 2H Video Block Diagram -------------------------------------------------------------------- 01-05 AV Selector Block Explanation ------------------------------------------------------------- 01-06 Deflection Circuit Block Diagram ---------------------------------------------------------- 01-07 CRT Block Diagram -------------------------------------------------------------------------- 01-08 Audio Output Block Diagram --------------------------------------------------------------- 01-09 Rear Panel Diagram -------------------------------------------------------------------------- 01-10 16X9 Displayed on 4X3 Screen ------------------------------------------------------------- 01-11 2): POWER SUPPLY INFORMATION, SECTION: Sub Power Supply SHUT DOWN Block Diagram --------------------------------------- 02-01 Sub Power Supply SHUT DOWN Circuit Diagram -------------------------------------- 02-02 Sub Power Supply Visual Trouble Shooting LED's Diagram -------------------------- 02-03 Sub Power Supply Distribution Diagram -------------------------------------------------- 02-04 Deflection and High Voltage Power Supply SHUT DOWN Block Diagram --------- 02-05 Deflection and High Voltage Power Supply SHUT DOWN Circuit Diagram -------- 02-06 Deflection Power Supply Visual Trouble Shooting LED's Diagram ------------------ 02-07 Deflection Power Supply Distribution Diagram ------------------------------------------ 02-08 3): HORIZONTAL DRIVE, SECTION: Horizontal Drive Circuit Diagram --------------------------------------------------------- 03-01 4): VIDEO SIGNAL INFORMATION: Video Signal Main and Terminal Circuit Diagram -------------------------------------- 04-01 ABL Circuit Diagram ------------------------------------------------------------------------- 04-02 Horizontal and Vertical SWEEP LOSS DETECTION Circuit ------------------------ 04-03 5): AUDIO CIRCUIT INFORMATION: Audio Signal Main and Terminal Board Circuit Diagram ----------------------------- 05-01 Audio SURROUND Board Circuit Diagram ---------------------------------------------- 05-02 Front Left & Right Graphic EQ Circuit Diagram -------------------------------------- 05-03 Center Graphic EQ Circuit Diagram ------------------------------------------------------ 05-04 Audio and Video MUTE Circuit Diagram ------------------------------------------------ 05-05 Audio MUTE Surround Board Circuit Diagram ----------------------------------------- 05-06 Audio MUTE Audio Output Board Circuit Diagram ------------------------------------ 05-07 6): DIGITAL CONVERGENCE CIRCUIT INFORMATION: Digital Convergence INTER-CONNECTION Diagram -------------------------------- 06-01 Digital Convergence OVERLAY DIMENSIONS Information ------------------------ 06-02 Digital Convergence REMOTE CONTROL Button Identification ------------------- 06-03

CONTENTS PAGE (A-1)

60SDX88B DP86 CHASSIS TRAINING and INFORMATION


CONTENTS

SECTION

PAGE

7): MICROPROCESSOR Microprocessor Port Block Diagram ..........................................................................07-01 Microprocessor Data Communications Block Diagram .............................................07-02
8): PWB INFORMATION Signal PWB ...................................................................................................................08-01 Deflection PWB ............................................................................................................08-02 Control PWB ................................................................................................................08-03 CRT PWB .....................................................................................................................08-04 SUB POWER PWB ......................................................................................................08-05 9): MISCELLANEOUS INFORMATION Flex Converter Information and Diagram ....................................................................09-01 60SDX88B Component and Parts Identification ......................................................09-02 Overlay Part Numbers Diagram ..................................................................................09-04 53SBX89B Component Identification ........................................................................09-05

CONTENTS PAGE (A-2)

BLOCK DIAGRAM EXPLANATION POWER SUPPLY BLOCK


The 61HDX98B utilizes two switching power supplies. DP-85's stand by switching mode operation is different from AP-7X and 8X chassis's. Switching frequency of AP-7X and 8X chassis is dropped to 20kHz during stand by mode. But the DP-85's power supply is not dropped during stand by mode. DP-85's is operated about 100kHz. Normally Power Supply switching is operated as following. T901: 25- 56 kHz (Normal) 100-200 kHz (Stand by) TP91 30- 53 kHz (normal) POWER SUPPLY UTILIZED FOR THE DIGITAL AND SIGNAL CIRCUITS: (Sub Power Supply PWB) This supplies power primarily to the Digital circuits, i. e. DM-1 module. This supply runs anytime the set is plugged into an AC outlet. The voltages produced are; +33V, Power for the Satellite dish which is switched between 13V and 19V dependant upon the channel being received. Stand By 12V also called A12V TV9V TV5V 3.3V -5V POWER SUPPLY UTILIZED FOR THE DEFLECTION, AUDIO and DIGITAL CONVERGENCE CIRCUITS: (Deflection PWB) This supply only operates when the set is turned ON. When the ON command is received from the DM-1 module, relay S-901 energizes and delivers AC to the main bridge rectifier D903 located on the Sub Power Supply PWB. This supplies power primarily to the Deflection circuit for the collector of the High Voltage generation circuit and the collector of the Deflection Output transistor. Also, the Convergence output amps and the Audio output amps derive their voltages from here as well. The voltages produced are; +130V used for Deflection and High Voltage circuits. 220V used for the collectors of the R, G, B drivers on the CRT PWB and the Velocity Modulation Page 01-01 circuits. 6.3V to drive the CRT Heaters. +28V for the Convergence, Velocity modulation and Audio Out circuit. +13V for Vertical. -13V for Vertical and also converted down to the 5V for the Digital Convergence Unit. The TV9V supply generated from the Power Supply for Digital listed above, is regulated down to +5V for the Digital Convergence Unit and the A12V for the Power Supply for Digital is used as a switched On/Off for the Deflection Vcc by the Rainforest IC.

DP86 POWER SUPPLY BLOCK DIAGRAM


POWER SUB P.W.B.
STAND BY 35V Line Filter Fuse Relay Line Filter R +33VS Reg A12V Sw. Reg. 9V Sw. Reg. TV9V 5V Sw. Reg. TV5V

POWER DEFLECTION P.W.B.


SWITCHED (130V) Reg Def. +B V1&V2 CRT & Vm Out Heater Convergence Velocity Mod. Convergence Vertical

To Signal Block

+28V

EE49
-28V +13V Reg.

24.5V

R/F 28V C21V

28V 21V

-13V Sw. Reg. -5V Reg.

Vertical (M13) DCU

TV9V A12V AC Inlet Type

+5V Reg. 12V

DCU HVcc

AC108132V/ 60Hz.

To Deflection Block

I901 Sub Switching Regulator EE42

IP01 Main Switching Regulator

220V 6.3V

PAGE 01-02

BLOCK DIAGRAM EXPLANATION FRONT END


line labeled Composite Video to the Signal SelecThe 61HDX98B utilizes a non-repairable Front End tor IC which selects the appropriate signal accordAssembly called the DM-1 Module. This module coning to the consumers choice. Either Tuner, tains the main System control center, NTSC Front AVX1, 2 or 3 and/or S-In 1,2 or 3. End, Direct TV Receiver and ATSC Tuner. The block diagram indicates the internal blocks contained within The NTSC audio IF signal is routed to the MTS the Front End Assembly, hear after called the DM-1. STEREO DECODER. Starting counterclockwise from the upper left. SPLITTER: The splitter routes the NTSC signal out to the RF SATELLITE: Out PinP Tuner path to the PinP Tuner. This represents the Direct TV satellite dish connection to the back of the set. MTS STEREO DECODER: SATELLITE TUNER/IF: Decodes the NTSC Audio IF signal an decodes it into This is the internal IRD, (Integrated Receiver and De- Left Total and Right Total. This signal is routed to the coder). This receives the satellite signal from the LNB Dolby Pro-Logic decoder. (Low Noise Block) located on the Dish. This block converts the signal to a usable signal for decoding. HDTV LINK: This block routs the ATSC signal received by the SATELLITE CARD and SATELLITE LINK ATSC tuner to the Link Mix. BLOCK: To receive Direct TV signals, the customer is required NTSC YUV A/D: to insert an active Security Card into the back of the This block receives the NTSC luminance and chroma set. This care contains a programmable chip that con- signals and converters them to a digital signal to be tains the consumers information and the channels that utilized by the MPEG VIDEO decoder. the consumer is allowed to receive. Also, this card is used when billing information is retrieved by Direct FROM MAIN MICRO: TV. This is communication in and out for the SubMicroprocessor. Information such as the Selector IC LINK/MIX: selection, power on/off commands, etc.., are routed This block passes the particular signal that the cusfrom the ARM/Transport or Main Microprocessor sectomer has decided to view on screen. Either the Direct tion. TV signal or the ATSC tuner. SD-A/V: TERRESTRIAL: This is the output of the AC-3 digital audio to be used This indicates the outside antenna the consumer has by an off board AC-3 decoder. erected to receive NTSC signals as well as ATSC signals. MODEM: Direct TV polls the Direct TV receiver section through CABLE: the customers phone lines and determines such things This is the input from the consumers cable signal. as Pay for View authorization, customers information, Card authorization and billing information. HD/NTSC TUNER/IF SPLITTER: This block receives the Terrestrial signal and depend- ARM/TRANSPORT: ant upon which source the consumer has decided to The Arm/Transport block receives all signals from Diview, processes the signal through the appropriate rect TV, ATSC. It also receives the Infrared remote control signals, Front panel Key data, and Slave Microproctuner. HD: Receives the Terrestrial Signal and routes it essor information. This is the Main Microprocessor section of the DM-1 module. Dynamic RAM and ROM into the ATSC tuner. This tuner is capable of reformation is processed from Soft ward load into ROM ceiving all 18 ATSC formats. NTSC: Receives the Terrestrial Signal and route and determines the state of the Television. Information from ATSC and/or Direct TV is routed to the MPEG it to the NTSC Tuner. VIDEO DECODER. The NTSC signal is routed out of this block on the Page 01-03

BLOCK DIAGRAM EXPLANATION FRONT END


MPEG VIDEO DECODER, NTSC UPCONVERSION, OSD: What ever signal is requested by the consumer as the source for viewing is processed through this block and is output to the YUV D/As. YUV/DAs: This block takes the digital signals provided to it and converts them to an analog signal which is usable by the signal processing circuits. All signals are routed out through the line labeled 2.14 YUV/YIQ, (NTSC Signal up converted to 480P or 2.14 HYPBPR which is the HDTV output as 1080I. MPEG/AC-3 AUDIO DECODER: This block processes the audio component from the ARM/TRANSPORT or the block A/Ds AUDIO, which is the NTSC audio processed by the Pro Logic decoding circuit, labeled as 5.1, (Front Left, Front Right, Center, Rear Left and Rear Right + Sub Woofer audio also called LFE. Then this block processes the signal and outputs all audio to the Audio D/As. AUDIO D/As: This block is the Digital to Analog converter which converts the digital audio signal sent to it by the ARM/ TRANSPORT block and converts it to a usable analog signal to be processed by the audio output section. The audio labeling is comprised of the following: L/R = Audio Front Left and Right LS/RS = Rear or Surround audio Left and Right C/LFE = C for Center and LFE for Sub Woofer, also called Low Frequency Effects.

Page 01-04

A/V SELECTOR BLOCK DP85 CHASSIS


TERMINAL P.W.B.
Antenna Out to A Converter RF VT+33V +5V +9V Antenna B Ant From Micro PinP Video to PinP Unit

Antenna Switch Box


Video 4 V4, S4, L/R4

Main Tuner U002

PinP Video and MonoAudio Selected L/R (NTSC Main Audio)

Lock Clock Data Enable +5V

Comp. Video (Main) Lock/Clock Data/Enable

R/L (Main)

Video D YC To 3DYC

YUV

+9V

PinP Tuner U003


VT+33V

PinP Video Mono

9V

I2C

C/V Det.

C Video C/V Det

AUDIO/VIDEO SELECTOR TA8851BN


YUV Video One In Video Two In Video Three In Det

2 Line Y/C for PinP

PinP V

C/V Det.
YUV

PinP YC

V1 S1 L/R1

V2 S2 L/R2

V3 S3 L/R3

PinP L/R Out To Audio Out PWB

YUV In 480I/480P/1080I

CR/PR

CB/PB

PAGE 01-05

BLOCK DIAGRAM EXPLANATION A/V SELECTOR


C. VIDEO (MAIN) and R/L (AUDIO MAIN): NTSC Video and NTSC Audio is routed from the DM-1 Block diagram. They are shown in the Block Diagram as one line, but they are separate signals. Anytime a signal is routed from the DM-1 or going to the DM-1 module, they must be sent through a DM-1 I/F block. This block reduces the noise by a noise cancellation process. This process uses the output of a comparator and routes the output back to the negative input to subtract the noise. It also level shifts the signal to make it useable by the circuit to which it is routed. DM-1 I/F BA4558: This is the noise cancellation and level shift block. AUDIO/VIDEO SELECTOR TA8851BN: This is the selector IC. Dependant upon the customers viewing preference, the DM-1 will communicate via I2C bus communications and select the NTSC signal which is sent to the demodulator. The demodulator prepares the NTSC signal for the DM-1 module. This IC selects the following inputs; Main tuner Video One, Two or Three S-In One, Two or Three PinP Video and Audio outputs. This can be any of the input provided above except the PinP has its own tuner. Note: PinP isnt available when the customer has selected Direct TV or ATSC as its source. This is because, as will be shown later, the PinP Video is super exposed upon the NTSC video only. Any video source selected for the Main picture will be routed to the 3D Y/C module. Note: There are NO Component inputs on this set.

Page 01-06

DP86 CHASSIS SYSTEM CONTROL & SIGNAL PROCESSING BLOCK


Clock/Data/ Enable +9V +5V

Clock/ Data/ I2C +5V +9V +3.3V Enable

FC UNIT HC5125 Flex Converter

2H YUV

HV

6dB Amp
YUV

HV Blk Clamp

3D Y/C Unit and PinP Unit HC3152


PinP VIDEO YC YC YUV HV

HV

+5V

2H Sync Selector HC140538CP PinP Sync Det.


HV PinP V

YUV

YIQ
BA7657F

To Microprocessor

+5V YUV YUV Selector Y Sync Sep

V Sync Sep.
Sync YUV Switch

Main Sync Det.

PinP Y/C from Selector IC YUV

SIGNAL P.W.B.
Main Video/S-YC from Selector IC

PAGE 01-07

BLOCK DIAGRAM EXPLANATION SYSTEM CONTROL AND SIGNAL PROCESSING


the signal in one of 4 ways. Normal: This will display a standard 4X3 picture with black panels on each side of the picture. Fill: This will expand the picture to fill the screen. The top and bottom will be cropped. Full: This will expand the picture side ways and fill 3D Y/C: the screen. However the picture will be non-linear. The 3D Y/C separates luminance from the chroma. It Smooth Wide: This will keep the center of the picalso add the 3D effect, (if the 3D Y/C is turned on ture linear and stretch the outside edges to fill the within the menu). Noise is canceled and the two sepascreen. rate components are output to the Video/Chroma DeWith the four choices above, the DM-1 module controls modulator. the signal for 3 of them; Normal, Fill and Full. However, during Smooth Wide, the deflection circuit is switched to VIDEO/CHROMA DEMODULATOR: perform the stretching of the sides. The slave MicroprocThis IC decodes the signal down to its Luminance and essor outputs S.Wide during this time. Chroma. components and outputs it as 1HYIQ.

MAIN VIDEO FROM SELECTOR IC: At the bottom left hand side is shown the Main Video from Selector label. This is the NTSC video from the selector IC. This is routed to two blocks.

CUT OFF: = Output; labeled as V. Stop, during the SerDM-1 I/F: vice adjustments for Cut Off, (Screen Background conNoise cancellation and level shifting preparing the sig- trols), the vertical must be collapsed. This output causes nal for the DM-1 module. the B+ to the vertical output IC front end to be grounded and grounds the vertical trigger pulse called V. Saw. 1HYIQ: 1HY = Standard NTSC format luminance. (Also D. SIZE: = Output; labeled as Digicon Size, during Smooth Wide mode, the Digital Convergence Unit, hear known as 480I). after called DCU, must know that the set is in the disI and Q = Standard NTSC format, demodulated torted deflection mode. This signal tells the DCU just chroma components. that. SYNC DET.: Separates the Sync signal from the composite video sig- MAGIC SW: = Input; when the customer presses the Magic Focus button on the control panel, the DCU notinal. fies the slave micro. That it is busy performing Magic Focus. The slave micro. Notifies the DM-1 module and SYNC DET.: This block outputs composite sync to the PinP unit which the DM-1 module ignores infrared pulses from the reis used for timing for display. This is specifically related mote control. to the Demodulator, D/As and Read/Write clock. The Read/Write clock also is controlled by the frequency of CLOSED CAP. DATA: = Input; This input receives the composite sync signal and decodes the Closed Caption the Subcarrier also called fsc. The Composite sync is also sent to the DM-1 on the line Data. (Data Slice line 21) and the communicates with the labeled as 1H Composite Sync. The DM-1 uses this sig- DM-1 Module. The DM-1 Module actually introduces nal for OSD positioning, auto channel detection and AFC the Closed Caption Characters into the Video stream. loop activation. F. PANEL: = Output, Dependant upon the customers menu selection, will determine the IRE level of the side TV uCOM MICROPROCESSOR: This is the slave Microprocessor or Sub-Microprocessor. panels when 4X3 Normal mode is used. By raising the side panel IRE levels, the 4X3 picture wont burn in the This IC is in constant communications with the DM-1 module. The slave uP. Receives or outputs the following CRTs. MAIN SYNC DET: = Input; this is used for detecting the signals; Closed Caption Data. This information is routed to the DM-1 module for OSD generation. NOTE: the subHBLK: = Input; this is the Horizontal Blanking signal. micro. Doesnt produce OSD characters for Closed CapUsed for Service OSD signal creation timing. tion. S.WIDE: = Output; when the customer watches regular PinP SYNC DET: = Input; PinP tuner sync is routed to NTSC 4X3 aspect source, they have a choice of viewing the sub-micro. And is used during PinP tuner channel

Page 01-08

BLOCK DIAGRAM EXPLANATION SYSTEM CONTROL AND SIGNAL PROCESSING


selection to activate AFC. MAIN SYNC DET. = Input; This input is used for Service OSD positioning and Auto Programming channel detection. PinP SYNC DET. = Input; This input is used for judgement of the Slave Microprocessor to determine the AFC Loop activity of the PinP Tuner. MUTE (Audio): = Output; during channel change, external video selection with no input, power up or power off, and loss of Vertical Blanking, the audio and video are muted. V.MUTE (Video): = Output; during child lock, channel change, or power on/off, the video is muted. POWER: = Output; when the front power button or the remote power button is pressed, the DM-1 module notifies the sub-micro. And the sub-micro. Outputs a power on/off command to the relay driver Q-007. Outputs high for ON and low for OFF. OSD & OSD BLK: = Output, this is the on screen characters for the Service Menu only. OSD Blk is OSD blanking. This cleans us the video where the OSD is to be inserted. HV BLK: = Input; this inputs are utilized by the Microprocessor for Service OSD positioning. HV BLK PH: = Output; during Service Adjustment and in the NTSC normal mode. This picture doesnt fill the screen. The areas on the side of the picture are called Side Panels. This can be adjusted. The HV BLK PH, controls the timing of the side panel OSD outputs. SIDE PANEL APL FROM 2H VIDEO PWB: = Input; the Microprocessor receives a pulse created within the 2H video PWB. This pulse represents the timing pulse for the Side Panel OSD production. of a quad Or Gate and outputs the signal to be superimposed upon the video signal path from the DM-1 Module. PinP VIDEO FROM SELECTOR IC: The video from the PinP tuner is routed to the PinP unit and the Sub Microprocessor for Closed Caption decoding.

Blocks continued; OSD MIX: Only the Service menu OSD is output from the Slave Microprocessor. The Digital convergence unit puts out OSD characters as well. This characters product the Service Grid and other text during Digital Convergence adjustments and/or Magic Focus. The two OSD sources are received by the OSD Mix. This is comprised

Page 01-09

DP86 CHASSIS SYSTEM CONTROL BLOCK


To Deflection (DCU)

IR

IR From Control Panel

IR

DAC M62392
MTS F. MONO ANT UV/IQ Sel YUV Sel SYNC On/Off CUT OFF 31/33

TV uCOM Microprocessor
IR In Dimmer Key In D. Size Main Tuner Enable PinP Tuner Enable Sync Det P.Blk. Mute (Audio) V.Mute (Video) FH Det FV Det Power On/Off OSD & OSD Blk

I2C Cut Off D. Size 31.57/33.75 To Deflection Busy Digital OSD OSD RGB Ys

I2C

OSD Select

YUV Switch

I2C

OSD RGB Ys

MEMORY
CCD Video Main

Main Sync Det PinP Sync Det

HV BLK YM

Main Video from Selector IC SIGNAL P.W.B.


Busy

PAGE 01-10

BLOCK DIAGRAM EXPLANATION 2H VIDEO


The 2H Video PWB is similar to the Rainforest circuits used in the past. The YUV/YIQ (480P) and/or the Y-PR/PB (1080I) is routed through another DM-1 Interface IC for noise cancellation and level shifting and into the Rainforest chip, IX01. Here the signal is prepared for the CRTs. Pedestal level detection, Chroma preparation, OSD RGB from either the DCU or the Slave Microprocessor is input here. Remember that the OSD for Customer usage such as the Channel numbers, clock, Main Menu, etc.. is generated by the DM-1 Module. Also, ABL controls the brightness and Contrast; as well as the color level at this chip. The Velocity modulation control signal is produced from the Rainforest IC. This signal is a representative of the Peak White components of luminance and drives the Velocity Modulation coils on each CRT.

Page 01-11

2H PWB BLOCK DP86 CHASSIS


2H VIDEO P.W.B.
I2C YM ABL YS OSD RGB

YUV/YIQ/ Y PB PR

+9V

RGB PROCESSOR TA1276AN

RGB

YUV RGB

VM

Clamp Clamp HV Blk

H/V Blk.

YUV YIQ YPBPR

PAGE 01-12

BLOCK DIAGRAM EXPLANATION DEFLECTION BLOCK


The 61HDX98B deflection circuit differs from conventional Hitachi product. It utilizes in a sense, two horizontal output circuits. One for Deflection and on for High Voltage. The notations around the Block diagram will be described in a counter clock wise fashion as best a possible. CUT OFF: Cut of collapses the Vertical circuit during I2C Bus alignments, during CRT Set Up. I2C: Communication from the Sub Microprocessor I001 during sweep variations due to Standard/NTSC 480P mode and 1080I High Definition mode. Busy notifies the sub Microprocessor I901 which in turn notifies the DM-1 module that the DCU has entered the DCAM. During this time, the DM-1 module ignores the remote control commands. MAGIC SW: When the customer presses the Magic Focus button on the front of the set, it produces a command for the DCU to begin the Magic Focus process.

D SIZE: Digital Size is a control signal for raster enlargement when MAGIC FOCUS is operated. Raster enlargement is required for the MAGIC FOCUS PATTERN to hit the photo sensors. This signal is output from DCU and input to the Sub Microprocessor I901. The Sub Microprocessor conABL: trols the I702 on the DEF.SUB PWB) for enlarging ABL voltage is generated by monitoring the current raster size. through the flyback transformer. This voltage will fluctuate down when the scene is bright and up when In case of AP-85, this control signal is called "A. SIZE". It's the same function between DIG.SIZE and the scene is dark. The ABL voltage will manipulate the screen brightness and contrast to prevent blooming A.SIZE. under these conditions. S WIDE: Smooth Wide is a condition entered through the Menu HV SYNC: The composite sync is routed into the Sync processor by the customer while watching an NTSC 4X3 aspect video source and the customer wants to fill the screen. which determines the sweep condition for the signal being provided. TO CONVERGENCE YOKES: The DCU provides compensation signal for deflection H and V BLK: Horizontal and Vertical Blanking is developed within abnormalities to the convergence output IC. The Conthe Deflection circuit. The Horizontal Blanking pulse vergence output IC in turn, amplify the signals and operates around 13V P/P and is produced by taking a rout them to the convergence yokes. sample pulse from the Deflection transformer T752. The Vertical Blanking pulse is generated from the +26V, 26VP and RETRACE PULSE: The positive 26V and the negative 26V is routed to the Vertical output IC, I601 pin 7. This pulse normally Deflection transformer I752. They enter the transoperates at 23V P/P. former as a pure DC voltage. A 15V P/P horizontal pulse is added to the DC voltage and leaves as +26VP IR: and 26VP. From here these voltages are routed to the The Infrared Pulses coming from the remote control are routed through the Deflection PWB to the Digital Convergence output section and they are rectified. They become +33V and -33V respectively. This procConvergence Unit. During DCAM (Digital Converess prevents the need for another power supply. gence Adjustment Mode), the Remote Control provides manipulation pulses for the DCU. +B 130V: The Deflection transformer receives the 130V V1 DC DIG RGB BUSY: source. This indicates Digital RGB and BUSY. Digital RGB represents the on screen characters produced by the DCU for generating the Digital Conver- DF OUT: Generated from the I702 on the Sub Deflection PWB gence adjustment grid and text produced during certain conditions such as Magic Focus, Sensor Initializa- and the Horizontal Blanking pulses, a Dynamic Focus waveform is created. This is a parabolic waveform that tion, Data Storage, etc Page 01-13

BLOCK DIAGRAM EXPLANATION DEFLECTION BLOCK


is superimposed upon the static focus voltage to compensate for beam shape abnormalities which occur on the outside edges of the screen because the beam has to travel further to those locations. HV PARABOLA: Described above. I702 on the Sub Deflection PWB generates the Vertical Saw signal. This signal is controlled by several factors. The Sync Processor detection and I2C data communication.

DIST CONTROL: Distortion control is another signal produce by I702 and sent to the Side Pin cushion circuit. These comSCREEN 700V: 700V Supplied to the screen grids on pensation parabolic wave forms are combined with the horizontal circuit to compensate for Side pincushion the CRTs. errors. FOCUS 9KV: Focus voltage supplied to the CRTs. H-SIZE SIDE-PIN CONTROL: This circuit generates the Side Pincushion Distortion compensation pulse which is impressed onto a coil 32Kv HV: located in the output side of the Deflection Output sec32,000 volts DC supplied to the CRTs anodes. tion and compensates for Pin Cushion distortion. TO DEFLECTION YOKES: Horizontal and Vertical deflection wave forms driving HORZ. DRIVE and HORZ. OUT: This circuit comprises the Drive and Output for the the deflection yokes. Deflection output circuit. INTERNAL BLOCKS DESCRIPTION S-CORRECT (SMOOTH MODE): During Smooth mode, the deflection circuit is manipuHV CONTROL: The uPc1344C IC generates the horizontal drive signal lated so that the outside 1/3 of the picture is stretched to fill the screen. The center 2/3 of the picture is left utilized by the High Voltage circuit. The HV control IC receives its locking pulse from the Deflection cir- undistorted. When an S Wide signal is received, a capacitor is switched off on the output side of the Decuit. A feed back voltage is sampled from the High flection output circuit. Voltage Regulation Detector circuit and compared with a reference voltage to maintain an accurate 32KV on the CRTs. PHOTO SENSOR: There are 8 sensors located on the internal outside edges of the cabinet. These Photo Cells receive the VERTICAL OUTPUT: The vertical output utilized in the 61HDX98B operates light patterns being generated during MAGIC FOCUS differently from previous chassis. This circuit utilizes or SENSOR INITIALIZATION and deliver this volta +13V and a 13V to generate the waveform to drive age to the Sensor Distribution circuit. the vertical deflection yokes. A pump up circuit is utilized to product the retrace pulse for the vertical deflec- SENSOR DISTRIBUTION: This represents the amplifiers that receive the Photo tion yoke. Its at this time when a higher pulse is needed because the beam has to travel from the bottom receivers (Photo Cells) inputs during Magic Focus opof the screen to the top very rapidly. The vertical out- eration. put IC receives its trigger pulse from the ramp generator. DIGITAL CONV. UNIT: This is the Digital Convergence Unit. This is a nonrepairable unit. It contains the distortion compensation SYNC PROCESSOR: The Sync Processor located in I702 on the Sub Deflec- wave form generation circuits, RAM, ROM and D/As tion PWB, detects the horizontal sync rate for the dis- for the convergence circuit. played signal, either 480P or 1080I. SERVICE SWITCH: When the set needs a convergence alignment, the SerVERTICAL RAMP GENERATOR: Page 01-14

BLOCK DIAGRAM EXPLANATION DEFLECTION BLOCK


vice Switch is pressed. This switch is located on the deflection PWB. By removing the front speaker grill, the Service Technician has access to this switch. CONV. OUT: The Convergence output block represents the two (2) Convergence output ICs. These two ICs contain the amplifiers for the Red, Green and Blue convergence outputs. HDT T752: Represents the Deflection output transformer. By separating the Deflection circuit from the High Voltage, any distortions that would be generated by fluctuations within the High Voltage wont be visible within deflection. DYNAMIC FOCUS OUT: This circuit amplifies the parabolic signals provided by the Deflection circuit and I702 on the Sub Deflection PWB and impresses these wave forms onto the static DC voltage use for focus. This keeps the beam as sharp or focused as possible in the corners of the screen. HIGH VOLTAGE REGULATION DETECTOR: This circuit monitors a feed back voltage produced from the High Voltage Flyback transformer and routes an output signal to two circuits. 1.) A sample voltage is sent to the Horizontal Driver IC for regulation of the High Voltage and; 2.) If the High Voltage climbs too high, a shut down signal is produced to shut down the power supply until a repair can be made. FOCUS PACK: The focus pack receives the Focus voltage and the High Voltage and distributes them to the CRTs. FBT TH01: Is the main Flyback Transformer producing High Voltage.

Page 01-15

DP86 DEFLECTION BLOCK DIAGRAM


To Deflection Yokes H Blk HV Pulse Shape HD74LS221P HV Control (uPC1394C) HV DRIVE To Deflection Yokes HV OUT (IMB12-140) ABL ABL Cut Off I2C I2C DC couple VERTICAL OUT LA7648 /3 HIGH VOLTAGE REGULATION DETECTOR HV Parabola FBT THO1 FOCUS PACK Focus 12Kv / 3 32Kv HV High Voltage Transformer 3 / Focus (9KV) Screen (700V)

S Corrected V-SAW VERTICAL RAMP GEN.

Size Regulation Control

HV Sync

SYNC. PROCESSOR

DIST. CONTROL

+
V Parabola Saw

H-SIZE SIDE-PIN CONTROL

+
1100V H Blk

DYNAMIC FOCUS OUT 2SC4686X3

uPC1885 V Blk H Blk H Drive IR PHOTO SENSOR /8 HV Blk SENSOR DISTRIBUTION PAGE 01-15 8 / DIGITAL CONV. UNIT 6 / Dig RGB Busy Dig RGB Busy H Blk HORZ. DRIVE

DF Out

Diode Modulator

Deflection Transformer

HORZ. OUT 2SC5413

Vcp +26V, -26V +26P, -26P

HDT T752

+B (130V)

2SC3116 HV Blk IR

Retrace Pulse

34v, -34v CONV. OUT 6 / To Convergence Yokes

SERVICE SWITCH From uP Magic SW D Size 31.5/33.75

DP86 CRT PWB BLOCK DIAGRAM


Beam Shape, Beam Alignment, Focus, VM Coil, Deflection and Convergence Yokes

220V 9V R

CPT P.W.B. (R) VIDEO OUTPUT AMP

220V 9V G

CPT P.W.B. (G) VIDEO OUTPUT AMP G

220V 9V B

CPT P.W.B. (B) VIDEO OUTPUT AMP B

220V 26V

VM OUT P.W.B. VM OUT

RGB

VM

PAGE 01-16

SCREEN FOCUS CONV.

Def. Yokes

30KV HV

AUDIO OUTPUT SECTION DP86 CHASSIS


+9V From Audio/Video Selector IC HiFi Out L/R L/R

Perfect Volume Pro Logic Decoder


R L/R/C

Transmitter Out FL/FR RL/RR PinP L/R

I2C

+9V

Passive Decoder

H/H-L/R H/H-LS/ RS

SELECTOR
MC14052
SL/RS PinP L/R FL/R FR to Spk FL L R +9V FL/R I2C L/R/C/LFE/LS/RS C C I2C +9V H/H-L/R

CONTROL
TDA9860

L/R L/R/C/LFE/LS/RS

Graphic Equalizer

Front Audio Amp


28V

Clock Data

TA5200AH

Center Audio Amp


21V Sub Woofer

CONTROL
TDA9860

PinP L/R C/LFE

PinP L/R From Selector IC

Clock Data +9V

Graphic Equalizer

+9V

R L

Rear Audio Amp


TA5200AH

H/MS SL/RS 28V SL/RS I2C

CONTROL
TDA9860

H/H-LS/RS L/R/C/LFE/LS/RS Ext. Decoder In

Audio Out PWB

Surround PWB

PAGE 01-17

DP86 REAR PANEL (60SDX88B)

REAR SPEAKER 8 ONLY

+ R -

+ L -

ANT A

To Converter

SVIDEO

SVIDEO

COMPONENT VIDEO Y PBCB PRCR

EXT. DECODER INPUT


LS C L

ANT B
VIDEO VIDEO VIDEO VIDEO

RS R

LFE L

R
(MONO) (MONO) (MONO) (MONO)

L
AUDIO TO HI-FI

L SVIDEO

L
SUB WOOFER

R
WIRELESS OUT

R AUDIO INPUT 1

R R R AUDIO AUDIO AUDIO INPUT 2 INPUT 3 MONITOR OUT

PAGE 01-18

A 16X9 ASPECT IMAGE DISPLAYED ON A 4X3 ASPECT SCREEN


UNDERSTANDING TOP AND BOTTOM PANELS: When a 16X9 Aspect (1.7777 to 1) images is shown on the DP-86 set with a 4X3 Aspect (1.3333 to 1), ordinarily there would be top and bottom panels that are black. If the set were to continuously operate in this fashion, its possible that the area of the screen that has images would age and the area that doesnt display an image, i.e. the top and bottom panels, wouldnt. In other words, the image may burn onto the screen. To prevent this from happening, the top and bottom panels are replaced with On Screen Display that are gray in nature. (Above black IRE level.) This allows the top and bottom to age at the same rate as the used portion of the CRT surface. UNDERSTANDING LETTERBOX: Letter box is commonly used with DVD or when the broadcast wants to display the complete panoramic view of the theater. This means that the image which is something other that 4X3 is created in a 4X3 environment. Of course, the same situation as described above exist, except this one has an exception. The exception is this, the area of the top and bottom panels is active video. Even though its black, the TV doesnt know if its top and bottom panels or video. So the top and bottom panels in this situation are black. RULE OF THUMB: If the top and bottom panels are BLACK, then the screen can not be manipulated using Screen Format in the menu. This will help when confronting consumers that question why they cant manipulate the screen in this condition. USING A SET TOP BOX: When using a Set Top Box to receive ATSC signals and imputing these signals into the Component input, many times the broadcasters are converting NTSC signals into ATSC for broadcast. This causes a similar problem. In other words, the 4X3 NTSC original signal is modified to fit into the 16X9 ATSC environment and again the Top and Bottom Panels will be BLACK. Nothing can be done using Screen Manipulation to elevate this problem.

Page 01-19

DP-86 CHASSIS DISPLAYING A (16x9) IMAGE ON (4X3) DISPLAY Top and Bottom Pannels are OSD Generated

Top Pannel

Slightly above black to avoid 16X9 burning an image

Bottom Pannel

PAGE 01-20

DP86 SUB POWER SUPPLY SHUTDOWN BLOCK (SIGNAL) LOW VOLTAGE I901 ShutDown Pin (7) on Power Supply Driver & Output IC

I905 Photocoupler

Shut Down SCR

+5V Too Hi Det.

TV5V Short Det.

+9V Too Hi Det.

TV9V Short Det.

+12VS Too Hi Det.

PAGE 02-01

DP86 SUB POWER SUPPLY SHUTDOWN DIAGRAM (SIGNAL) LOW VOLTAGE


DIGITAL & SIGNAL POWER SUPPLY SHUT-DOWN Active High DIGITAL & SIGNAL POWER SUPPLY SHUT-DOWN Active Low

I901
ShutDown Pin (7) on Power Supply Driver & Output IC

I905
Photocoupler

5
Run B+ R908 D905 R919 R907 D964 1/2 AC In Start Up B+

D908
Red LED Shut Down Identification

Q913 ShutDown S.C.R.

D959
TV5V Short Det.

No Start Up B+ = Off Normal = Glowing Blinks during Shutdown because of the internal current draw. 15.1V ~ 22.5V pin 5 I901

Q917

D972
TV5V

D925
TV9V TV9V Short Det. On Off R9A 0 On Off C E B C Vcc

STBY +12V

Q916

D974
TV5V Too Hi Det. +5V

D958 PQS1
B E Off On 5 Power

Q914 D975
TV9V Too Hi Det. +9V

D936
+12VS Too Hi Det. +12VS

+12VS is the same as A12V or SB12V

PAGE 02-02

DP86 CHASSIS L.E.D. (VISUAL TROUBLE DETECTION) DIODES (SUB POWER PWB) SIGNAL POWER SUPPLY 5 GREEN L.E.D.s and 1 RED L.E.D. (6 Total L.E.Ds. for visual trouble sensing observation)
Audio F/R 28V R927 Audio Center 21V R928 TV 9V R945 TV 5V R9E3 +12VS

R956

D919

D920

D930

D971

D928

ALL GREEN L.E.D.s

D908 is a RED L.E.D. Off = No I901 B+ On (Mid) = I901 B+ On (Bright) = Shutdown

Osc B+

Start Up or Run 24.2V 24.2V 5 I901


R916

Vcc 4 3 1.9V
I905 Shutdown Photocoupler 5 Shut Down Inputs

I905

1 2
Q913 Shutdown SCR

1.9V

Driver/Output IC

7 100% Dead Time &


IC B+ Detection

D908

PAGE 02-03

R919

DP86 SUB POWER SUPPLY DISTRIBUTION DIAGRAM (SIGNAL) LOW VOLTAGE


AC Plug

Live
AC Input FUSE F901 Noise Filter L901, 2, 3 Rectifier D901

Cold
Protector E994 : 7K Protector E995 : 7K Protector E996 : 5K
Rectifier +28V : D911

D919 : F28

FT / REAR +28V

Audio +28V Audio +21V 33VS : +33V

Switching Transformer

Relay S902 Relay S903

Rectifier +21V : D912

D920 : C21

CENTER +21V

Rectifier +35V : D918

T901
DP86 Only Rectifier +24V, 5:D914 Protector E992: 7K Voltage Control 24, 5V Q915

A12V
Regulator +12 : I907

STAND BY +12V D928 : +12V ZD D930 : TV9V D925: <4V D D971 : TV5V D972: <4V D ZD ZD

D936 : >14.7V +12VS D975 : >10.8V +9V D974 : >6.7V +5V

Switching Control I901

Feedback I904

Regulator TV9V : I908

Protect I905 D908: Protect Red LED AC Clock I906 TV ON/OFF Switch Q914, Q918

Regulator TV5V : I914

"D" Short Circuit Detector Protector SCR: Q913

Over Voltage Detector

To Deflection Power Supply Protection Block

RELAY S901 AC Clock 60Hz TV Main ON/OFF ON = LO OFF = Hi

P A G E 0 2 0 4

= RED OR GREEN L.E.D.

DP86 DEFLECTION POWER SUPPLY SHUTDOWN BLOCK DIAGRAM

Deflection B+ (130V) Excessive Current Det.

Deflection B+ (130V) Excessive Voltage Det.

DP23

IP01
ShutDown Pin (7) on Power Supply Driver & Output IC

IP06
Photocoupler

QP05 ShutDown S.C.R.

QP06 DP25 220V Short Det. Heater Too High Det. -M13V Loss Det. -M28V Loss Det Flyback Excessive Current Det. DP34 X-RAY PROTECT

Heater Short Det. 13V Short Det.

Excessive High Voltage Det.

28V Short Det.

Heater Loss Det.

Deflection Transformer Failure Det. Side Pin Failure Low Det.

Q754

Side Pin Failure High Det. High Voltage Stability Too High Det.

PAGE 02-05

DP86 DEFLECTION POWER SUPPLY SHUTDOWN DIAGRAM


RP31 0.47 Deflection B+ (130V) Excessive Current Det.

TP91 13

DP11 CP16 QP04

Deflection B+ 130V Deflection B+ (130V) Excessive Voltage Det.

DP18 DP17 DP19

Deflection Flyback Excessive Current Det. Flyback TH01 RH23 1.2 QH03

IP01
ShutDown Pin (7) on Power Supply Driver & Output IC

DP23

9 10

IP06
Photocoupler

QP05 ShutDown S.C.R.

DH24 200V Short Det. DP37 220V DP35 ? Heater DP30 13V DP31 28V 28V Short Det. D753 DP27 DP26 RP45 -M28V RP44 +28V DP29 DP28 RP41 -M13V RP40 +13V Heater from Def. Power Supply. Goes to CRT's Heater To High Det. D759
6 1 7 8

Excessive High Voltage Det.

5
DH31 DH25 DH26 DH27 QH07 DP34 DH30

Heater Doesn't go to CRT's

DP36 DP35 May Not Be in Set. DP25 QP06 13V Short Det. X-RAY PROTECT QH06

Heater Loss Det.

High Voltage Stability Too High Det. D754 Side Pin Failure High Det. D760

DP33 DP32 RP42 Q754

-28V Loss Det.

-13V Loss Det. Deflection B+ 130V V1 Q777

Side Pin Failure Low Det.

D757 D756

C769 Deflection Transformer Inoperative Det. H.Blk

T752

PAGE 02-06

DP86 CHASSIS L.E.D. (VISUAL TROUBLE DETECTION) DIODES DEFLECTION PWB 5 GREEN L.E.D.s and 1 RED L.E.D. (6 Total L.E.Ds. for visual trouble sensing observation)
13V +28V 130V Deflection B+ RP39 RP23 DP15 RP37 RP38 DP20 DP22 DP16 DP21 RP26 RP46 -M13V -M28V

ALL GREEN L.E.D.s

DP06 is a RED L.E.D. Off = No IP01 B+ On (Mid) = IP01 B+ On (Bright) = Shutdown

Osc B+

Start Up or Run 24.2V 24.2V 5 IP01 7


Driver/Output IC 100% Dead Time & IC B+ Detection RP60

Vcc 4 3 1.9V
IP06 Shutdown Photocoupler 16 Shut Down Inputs

IP06

1 2
QP05 Shutdown SCR

1.9V

DP06
PAGE 02-07

RP17

DP86 DEFLECTION POWER SUPPLY DISTRIBUTION DIAGRAM

Live Power Supply Block

Cold Protector EP92: 4K Protector EP93: 5K Protector EP94: 7K Protector EP95: 7K Protector EP96: 7K Protector EP97: 7K Rectifier +220V:DP07 Rectifier +7V:DP08 Rectifier +15V:DP09 Rectifier +15V:DP10 Rectifier +28V:DP12 Rectifier -28V:DP13 DP22: +130V Rectifier +130V:DP11 Protector EP96: 7K D Regulator +6.3V: IP02 Regulator +13V: IP03 Regulator -13V: QP01 DP20: +28V D DP21: -28V D DP15: +13V D

DP36, DP37:<4V Video +220V DP35: <4V

Protector EP91: 4K Switching Transformer

DP32: >7.4V Heater ZD +6.3V DP30: <5V DP28: >20V Vert/HVcc: D ZD +13V D DP28: > -13V D DP31: <5V DP26: >32V ZD DP25: >-24V Conver: -28V DP18: QP04: >1.4V >166V ZD Deflection +130V Vert: -13V Conver: +28V

TP91

DP16: M-13V

Switching Control IP01

Feedback IP05

Voltage Control +130V: IP04

Protector SCR: QP05

Short Circuit Detector

Over Voltage Detector HVcc Switch QP08 HVcc +12V

Protect IP06 DP06: Protect Red LED Protect In

PAGE 02-08

Power On/Off

DP-85 Deflection Circuit Protection

DP86 SERIES CHASSIS HORIZONTAL DRIVE CIRCUIT


Q701

I702
18 H Out 16 29 17 FBP In 26
Osc. H. Sync In HVCC Switched AVCC

H. Def. Yoke R H. Def. Yoke G H. Def. Yoke B To Side Pin Circuit To Dynamic Focus To Deflection Loss To X-Ray Protect Def. H Pulse +28V +28P M28V M28P QH09
9

PDD1 7 9 To I001 OSD Position To PinP Unit PSD2 6 H.Blk. C771

Q751
3

T751
6 4 1

Q777
1

T752
7 8 11 12 9 10

Q755

28V C770

130V V1

To Convergence Circuit To Sweep Loss Det. Circuit

130V V2 TH01 QH01


10

IH01
Q2

IH02
12 10 Osc
Drive

QH08

High Voltage

1 A1

Clamp
QH10

12 PAGE 03-01 13

E r r o r

14 1

Ref. V. FBP In QH04 HV Sample QH06 HV Sample too High X-Ray Protect
12

QH05

DP-86 SERIES CHASSIS VIDEO SIGNAL PATH (Main & Terminal)


Terminal PWB
Front Control PWB
4V Avx 4 In S-4 In S Det.

Lum/Audio Selector IC

PFT
V4V S-Y4 S-C4 9 5 3 19 21 23

I301
VOut2 YIn2 CIn2

34 PinP C Cout2 32 36 38 30 46 48 C309 Q312 Q313


Y/S Monitor Out

PinP Yout2

Q303

PST2
PinP VY PinP C

U004
18 16

1 3

Aux Input 4

2 Line 1 Y Out Comb 3 C Out Filter

4 V In

Q306 PinP Unit Q305 And 3DYC

Signal PWB 1 of 2 U002 Main Tuner U003 PinP TUNER (Mono) 23 Always PinP
V1

Q036 18

PST1
8

TV1V

Main

Vout1 Yin1

5 Video
NTSC

Monitor Out

Q039 3

TV2V

PinP Video

Q301 Q302

Yout1

44 42
Component Inputs
U V Y

Yout1

11 13

18 20

S Det.
S-1 In

S-Y1 S-C1 S-Y2 S-C2

V2 S-2 In V3

S Det.

7 9 11 13 15 17 50

Cout1

Cout1

Aux Inputs

PST3
11 13 9 Q048 SIGNAL PWB 2 of 2

PZC QX23
1 To CRT PWB R QX28 3 G QX33 5 B 41 42 43

IX01
Y2 In

PSZ2
16

PFC2
13 Q061

PFC1

I013
1HY 1

53

Rain forest
52

QX10
U/Q In

U006
FLEX Conv.

21 Q042 Q043
1HV 2 1

1 7 Q019 5 11 3 9
V

Q067 12 Yout Q049 Q051 8 V(R-Y) Q050 Q052


U

18 QX08 Q062

14

15
2 1HU 1

PAGE 04-01

Q046 Q054

V/I In

51 QX09

20 Q063

15

19
2

Q053 10 U(B-Y)

2H Video PWB

SIGNAL PWB 2 of 2

DP86 CHASSIS A.B.L. CIRCUIT DIAGRAM


PSZ2
RX78 RX79

QX14
RX80

9V DX02 RX82 CX24 CX39

9
DX01

ABL

45

IX01 Rainforest IC

CX21

CX20

RX81

PSZ1 16 17 See uP Data Signal Path SDA2 SCL2 QX54 27 SDA2 28 SCL2
RH22 High Voltage B+ 130V V2 RH23 CH18 RH24 QH03 See XRay Protect To QH01 Collector of Horz. Output Transistor ABL RH67 B+ C To Focus TH01

2H Video PWB or Signal Sub PWB

To Anodes

LH03

3
CH25 RH56

ABL Pull-Up Resistors

Deflection PWB
Deflection B+ 130V V1

RH58

RH59

[ Current Path ]

PSD2 1 Signal PWB PAGE 04-02

13V

DH33 Clamp CH31

As Brightness goes Up, ABL Voltage goes Down. (Inverse Proportional)

DP86 SWEEP & AC LOSS DETECTION CIRCUIT


12V

Vertical Blanking From Pin 9 I601 CN01


V. Blk. RN02

RN05 RN03 RN04 DN01

QN01
RN01

QN02
CN02 DN02 DN03

Horz. 13V Loss/ Start Up Horizontal Drive Killer

QH02
24V P/P 12V RN07 RN10 RN09 A12V RH30

QN04

Horizontal Blanking CN03 From Q755 Emitter


CN04 H. Blk. RN11 RN12 11.6V P/P SPOT From Pin 9 of Micro I001 Cut Off

DN04 DN05

RN06

QN03

RN08

DN12

High Voltage Driver IC

QN05

DN06 RN13

DN11

DN16

IH02
14 Reference 1 Feed Back

PSD 2 2
Prevents CRT Burn DN09 Spot Inhibit DN10

DN14 DH41 Heater Voltage from TH01

13 Error Out 12 Error In 7 Drive

Q610 3
Vert SAW R602

QN07
RN16 0V 8.57V RN15 CN05 DN07 9.72V RN17 CN06

Vertical Output IC

I601
Invert Input 6

QN06
8.57V

Stops High Voltage Drive Signals From being produced during 13V start up

Q601 Q602 Stops Vertical Drive during Cut Off adjustment, I2C

Non Invert 4 Input 5V R604 R605

RN14

From I906 Pin 3 AC Photo Coupler


10V P/ P

DN08 ACK 5V RN17 RN18

PAGE 04-03

60SDX88B (DP-86 CHASSIS) AUDIO SIGNAL PATH (Main, Terminal & Audio Output)
Front Control PWB Aux Input 4 7 27
1 of 2

PFV
8

Terminal PWB 20

I301

Left Monitor Out

4L Avx 4 In 4R

22 Lum/Audio Selector IC
TV 1 Left

Right Monitor Out

U002 Main Tuner I001 Microprocessor

5 6

4
TV 1 Right

Tuner Audio

26

PSU1
Left Select Right Select

47

SCL1

5 4

SCL1 SDA1 1L AVX 1 1R 2L AVX 2 2R 3L AVX 3 3R

45 27 26 8 10 14 16 51 49
Rear Output IC Main Audio

10 11 13 14

Left Total Right Total PinP Left PinP Right

1 2 9 10

43 SDA1

43 PinP 35 L Audio R Out 33 PinP 1 Audio In 3

PST3
Aux Inputs

Signal PWB 1 of 2

1
Mono PinP 2 of 2

PSP2
Left Rear Spk Jack Right Rear Spk Jack

5 7

Terminal PWB
Rear Left Rear Right

U003 PinP Tuner


20

Surround PWB 2 of 2

PAS2
Rear Left Rear Right F L Out

12 7 2 4 11 12 7
Front Left

I403

2 4

8 9 1 2

Front Left Spk

PL
2

FT/Audio Output IC

12
FL

I401

Front Right Spk

PR
2 7
FR Center Left Out

Front Right Q403 D414 D415

Main Audio
Front Speaker Off Mute

F R Out

Center L Spk

PCL
2

I402
Center Audio Output IC

2 4 Audio Output PWB

Center R Spk

PCR
2
Center Right Out

Center

(See Surround Audio Signal Path)

(See Surround Audio Signal Path)

PST1

PST1

Signal PWB 2 of 2

Page 05-01

60SDX88B DP86 CHASSIS SURROUND AUDIO SIGNAL PATH


PAS2 1 of 2 8 9 RL RR (Rear) R Mix Out (Off/Matrix/Hall) L Mix Out (Off/Matrix/Hall) (Rear) 34 R Out Rear Audio Control H/MRS Rear 30 IS03 7 6 RL Out 18 IS07 S M/H R In Rear H/MLS 28 RR Out 15 Rear 9 24 RL RR H/ML H/MR 10 23 Ext LS In 1 28 30 Ext RS In 32 Rear R In IS01 9 10 3 24 Ft L Out See 5 Audio 9 Ft R Out Graphic Control EQ Ft L In 23 1 Circuit Ft R In IG01~15 10 32 RR Out 18 15
CSG2

Rear Left to Transmitter Out Circuit HiFi (R) L Rear Right to Transmitter Out Circuit HiFi (R) R

L-R Amp

IS06
Passive Decoder

S Out 13 15 16 S In 10

See Audio Signal Path (Main & Terminal)

PSU1 1 L 1

R in 9

8 L in

IS05 35 Pro Center Logic Out Decoder


L Out 37 R Out 36 Ext FL In Ext FR In Ext LFE In Ext C In

IS08

External Decoder In

PAS2 2 of 2 Center Out 4 1

IS02 PinP Right 10 30 Center LFE PinP LFE Out 15 Audio Control
9 28

PinP Left

32 1 3 20 13 5

Ext LFE In Ext C In Center

Front L Front R

C Out 24 C In 23

PinP Audio L&R to CSG1 Transmitter Out circuit IS10 1 5 LFE 3 7 Sub Woofer Buffer

1 2

F L Out F R Out

Front Right and Left to Transmitter Out circuit

RR In

Perfect R 2 10 Volume 8

L/R R 6 Buffer 7 10

IS04 1 L 9

PAGE 05-02

60SDX88B DP86 FRONT AUDIO RIGHT & LEFT GRAPHIC EQUALIZER CIRCUIT
For continuation of Front Left and Right Audio signal flow, see 60SDX88B DP-86 Chassis Surround Audio Signal Path Diagram (Surround and Main/Terminal)

FRONT AUDIO CONTROL IC

IS01
FR In FL In 10 23 2 FL Out FR Out 24 9 FL In FR In 3 5 6 GEQ Clock 17 16 Data 1 IG01 Buffer + 7 + FL GEQ Front Graphic Equalizer FR GEQ

IG02
Front EQ 2 3 Left Front Vcc 15 5V IN1L IN2L Left EQ

Determines the Frequency Characteristics controled by Customers OSD Menu. "See Microprocessor Data Communication Path" Diagram for more details. 10KHz 4 IG09 4.5KHz 5 IG08 2KHz 6 IG07 1KHz 7 IG06 400Hz 8 IG05 150Hz 9 IG04 60Hz 10 IG03 60Hz 150Hz 400Hz 1KHz 2KHz 4.5KHz 10KHz

19 Right Front 26 Right EQ IN2R 20 21 22 23 24 25

27 IN1R

PAGE 05-03

60SDX88B DP86 CENTER GRAPHIC EQUALIZER CIRCUIT


For continuation of Front Left and Right Audio signal flow, see 60SDX88B DP-86 Chassis Surround Audio Signal Path Diagram (Surround and Main/Terminal)

CENTER/LFE/PinP AUDIO CONTROL IC

IS02
Center In 23 2 Center Out 24 C Out 3 5 6 GEQ Clock 17 16 Data 1 + IG10 Buffer + 7 Determines the Frequency Characteristics controled by Customers OSD Menu. "See Microprocessor Data Communication Path" Diagram for more details. 1 7 1 7 1 7 1 10KHz 4.5KHz 2KHz 1KHz 400Hz 150Hz 60Hz IG15 IG14 C GEQ Center Graphic Equalizer

IG11
Center EQ 2 3 IN1L IN2L

4 5 6 7 8

IG13

Vcc 15 5V

9 10

IG12

19 20 IN2R 21 22 23 24 25

26

27 IN1R

PAGE 05-04

DP86 Series Chassis AUDIO and VIDEO MUTE Circuit


Also see Mute Circuit Diagram (Surround and Audio Output PWB)
A12V R0A2 D030 R0A3 R0A4 C048 2H Video PWB D034

Q034 Q035
HVBlk Ph

PSZ1
20

A5V

R0A8 R0A5

R0A9 V. Mute RXE8 V Mute 2 Rainforest

I001
V MUTE

RO21 D031 ROA6 R0Z3 V Mute D039 Horizontal & Vertical Sweep Loss Det. AC Loss Det. (From Deflection PWB)

PSZ2
Spot 14 DX05 RY04 25

IX01
FBP In

16

RO22

Q033
ROA7

PZC
7

PDS2
Micro Processor A5V 9V RO23 MUTE D032

PZC 2
R155

CRT PWBs

"SPOT"

7 Spot Grounds Bias to Q8A3, Q853 & Q803

24
ROE2

U002 Main Tuner

PDS1
16 V Mute 2 Surround PWB Mute

Q007
Mute 2

17
RO24 R085 15 Mute 2 Signal PWB

PAGE 05-05

DP86 MUTE CIRCUIT DIAGRAM (SURROUND PWB)


Also see Audio and Video Mute Circuit Diagram Also see Mute Circuit Diagram (Audio Output PWB)
CS73 Transmiter Right PSU1 DS20 VMUTE2 16 RSC6 CS74 Transmiter Left DS22 MUTE2 15 RSC6 CS77 Fixed/Variable Right DS24 VMUTE2 DS25 RSH1 CS84 Hi-Fi Variable Right Out DS23 RSH4 CS87 Transmiter Left Out DS21 RSH3 CS86 Transmiter Right Out

QS05
RSC4

QS06
RSC5

QS11
RSF2 RSF4

Fixed/Variable Left DS26 MUTE2 DS27

CS78

RSH2

CS85

Hi-Fi Variable Left Out

QS12
RSF5

RSF3

DS28

LFE/Sub Woofer DS30

CS82

CS83 RSF8

LFE/Sub Woofer Out

QS14
RSF9

DS29

PSA1 VMUTE2 4 VMUTE

MUTE2

MUTE

See Audio Output Mute Circuit Diagram

PAGE 05-06

DP86 MUTE CIRCUIT DIAGRAM (AUDIO OUTPUT PWB)


Also see Audio and Video Mute Circuit Diagram Also see Mute Circuit Diagram (Surround PWB)
C401 Front Right PAS1 D412 MUTE 5 R416 C402 Front Left D413 Ft Spk Off 1 D414 R418 D415 VMUTE 4 C409 R415 R417 R420 R413 C404 R412 C403

4
Q401
R414

Front Right

Front Audio Output IC


Front Left

2
Q402
R415

I401

Q403

11
C409

Mute

C440 Rear Right D424

R444

C442

4
Q409
R448 C402 R413 C404 R446

Rear Right

Rear Audio Output IC


Rear Left

Rear Left Rear Spk 3 Off D425 D426 R450 D427 C447 R451

2
Q410
R449 R447

I403

Q411

R452

11
C448

Mute

Center Audio Output IC C423 D418 Center Spk Off D419 2 D420 R436 D421 C429 R437 R449 R438 Rear Left R431 C425

2
Q406
R433

Center

I402
Center Audio Output IC

Q407

11
C430

Mute

PAGE 05-07

DP-86 CHASSIS "DIGITAL CONVERGENCE" INTERCONNECTION CIRCUIT DIAGRAM


I002
Memory
5 6

SDA SCL IR In

2 3

I001 Main Up
IR

OSD B 42

OSD B

UPB Dig OSD B

5 3 2 1 12 13

I004

OSD
4 BTX 15 GTX 14 RTX

PSZ1
Q012 Q013 Q014 Q020
13 OSD B 12 OSD G 11 OSD R 14 OSD Blk

QX17
33

IX01
Rainforest
41

PZC
QX33
5

OSD G 1

43

OSD G

UPG Dig OSD G

QX16
34

B To CRTs G R

QX15
35 32

QX28
42 3

OSD R 54 35 Key In2

OSD R

UPR Dig OSD R

Q006
30 Key Out2 OSD Blk 51

Q069

A A B C 11 10 9

+5V

QX23
43 1

Signal PWB

Q021
+5V

Busy 2

To Blue Convergence Yokes

Signal PWB Deflection PWB


SK01 "DCAM" Digital

-5V

1 2

PDG

PCB
+27P +33V 10 5 15 BH 14 GH + BV + 18 16 11 13 9 + 17 8 12 4 CYV+ CYVCYH+ CYH2 1 4 3

+5V +5V SRAM HBlk

3 4 5 6 7 8 9 10

HMO1 IR Out
IR Receiver 2 3 1 QM01 2

PSD4 PFS
5V
1 2 3 4 5 3 MAG SW 6 7 BUSY OSD R IR-In OSDG ADJ OSDB STAT

Convergence Mode

QK06 QK07 QK08

D Size V Sync

UKDG HC2112 P/N CS00222


PDS 2of 2
12 BV BH Gnd GV GH Gnd RV RH Mute 13 14 15 16 17 18

IK05

PCG
7 CYH+ 1 CYH4

SK01

To Green Convergence Yokes

11 12 13

Ft. Control PWB


+5V N/C Gnd Gnd S7 S6

PDS1
1 2 3 4 5 6 7 8 9 10 11 12

14 15

Digital Convergence Unit "DCU"

-27P

-33V CYV1

17 8 12 GV 15 RV 14 RH + + -

4 18 16

CYV+ 2

5V Digital

1 of 2 PDS
Gnd S7 S6 S5 S4 S3 S2 S1 S0 1 2 3 4

"Mounted on Deflection PWB"

19 20

IK04

PCR
CYH+ 2 CYH1 CYH+ CYH4 3

To Red Convergence Yokes

11 13 8

Sensor PWB LED S0-S7 8 Total Sensors

S5 S4 S3 S2 S1 S0

5 6 7 8 9 10

Normal 1 "Lo" IK02


3 2 +28V

6 10 +27P

+ 5

PAGE 06-01

+33V

Deflection PWB

11

Deflection PWB

DIGITAL CONVERGENCE OVERLAY DIMENSIONS 60SDX88B DP86 CHASSIS


60SDX88B Screen Jig Part Number: Part Number H310355A Progressive Mode Part Number H312181A HD Mode Part Number H310359 Progressive Mode Part Number H312184A HD Mode
(1227.2) [1227.2] (102.1) [102.1] (66.0) [59.0] (131.9) [118] H. SIZE

53SDX89B Screen Jig Part Number:

B (925.4) [925.4]

Centering Offset

(1.0) [49.7]

V. SIZE CENTERING OFFSET RED = (Left of Center) 15mm BLUE = (Right of Center) 25mm

60 Inch Dimensions Only

(Progressive Mode) [HD Mode] UNIT: mm

HORIZONTAL SIZE Progressive Mode = 1190 HD Mode = 1190

VERTICAL SIZE Progressive Mode = 770 HD Mode = 795

Page 06-02

DP86 SERIES CHASSIS "CLU-617MP" REMOTE CONTROL REMOTE PERSONALITY WHILE IN THE DIGITAL CONVERGENCE ADJUSTMENT MODE "D.C.A.M.
To Clear R.A.M. data. Turn set OFF. Press and hold the Service Button on deflection P.W.B. Then Power Button. "PIP" = "ROM READ" Reads old R.O.M. data. (Last data stored in R.O.M. (Press 2 times) "PIP CH" = "INITIALIZE" Perform after STORE & before EXIT [MOVE + PIP CH] "HELP" = "PHASE" * (Aligns Cursor to Grid) "INFO" = "CALCULATION" (Calculates mid-points) "MENU" = "REMOVE COLOR" Removes color not being adjusted. (Will NOT remove GREEN ) "RECALL" ="GREEN adjust" Digital Cursor Blinks GREEN 3x3 adjustment mode (Press 5 times), can only be entered when R.A.M. is cleared. "MOVES DIGITAL CURSOR" Moves Adjustment Point (2) Up, (4) Left, (5) Down, (6) Right "INPUT" = "BLUE adjust" Digital Cursor Blinks BLUE 13 x 9 adjustment mode (Press 5 times)
VOL

POWER

D.C.A.M. Digital convergence adjustment mode "SWAP" = "ROM WRITE" (STORE) Stores data into R.O.M.. (Press 2 times) "MOVE" = "RASTER ADJ" Used to align Red and Blue raster with Green. (2 Additional lines will Appear)

TV

CABLE

SAT

PIP

SWAP

MOVE

PIP CH

HELP

FRZ
TV / CABLE / SAT V C R

LAST

AUDIO

MUTE

CH

INFO GUIDE RECALL


FAV CH

EXIT

L I G H T

C.S.
MENU
FAV CH

"EXIT" = "ENTER & EXIT" Enter or Exit the D.C.A.M. Must initially enter D.C.A.M. with Service Button on chassis. (Press 5X) Toggles between External Video and Internally generated Cross hatch. After exiting the DCAM, set can change channels or external video source. "CURSOR KEYS" = "(ADJUSTMENT)" Adjust the selected color at the current stopping position. Up Down Left Right " 0 " = "RED adjust" Digital Cursor Blinks RED 7x5 adjustment mode (Press 5 times)

SVCS SCHED REC SELECT

1 4 7
INPUT

2 5 8 0 HITACHI CLU-617MP

3 6 9
SLEEP

PAGE 06-03

DP86 SYSTEM CONTROL PORT DESCRIPTION I001


Side Panel APL +5V VDD Dimmer VRef HSync OSD Blk fH Det SD Sel CREF1 Mute VPH2 Power On/Off OSD X1 OSDX0 FVDET IRef P.Blk. SCL2 VSync VDD (+5V) OSC In OSC Out VSS (Gnd) IRIn V. Mute CCD In2 CCD In1 Ft. Panel Control Keys U002 3DYC/ PinP Unit SCL3
6 49 4 47 39 41 29 19 23 17 21 22

Tuner Clock Tuner Data AFC Sync Det (SAP) Key In 2 PinP Enable AFC SCL1 SDA1 Main Tuner Enable

28 30 10 8 34 35 11 7 3 2

CLOCK DATA ENABLE AFC DATA CLOCK ENABLE AFC SCL SDA I002

U002 MAIN TUNER U003 PinP TUNER

EEPROM

SCL Front IS01 SDA Audio Control SCL SDA SCL2 SDA2 Reset Switch
60 59 50 54 44 43 42 48 33 52 14

53 37 36 9 46 40 45 55 61 62 63

I301 AV SW

SCL Expander I003 D/A SDA SCL I702 SDA Deflection

Reset OSD B OSD G OSD R Halftone AC In Test FC Enable


38

LFE/Center/ SCL IS02 PinP Audio SDA Control SCL IS03 Rear Audio SDA Control Rainforest SCL IX01 IC SDA SCL SDA FLEX U006 Converter

64 1 16 27 26 5 57 18 57

Dolby Enable

15

ProLogic SCL IS05 Decoder SDA SCL SDA Passive IS06 Decoder Front L/R Graphic Equalizer Center Graphic Equalizer
Page 07-01

SDA3

Data/ KeyOut4 AD Clock/ KeyIn KeyOut3 3DPClock CRef2 3DPEnable KeyIn1 3DPData

13 12

Data IG02 Clock Data IG11 Clock Power

20 32

DP86 CHASSIS MICROPROCESSOR DATA COMMUNICATIONS CIRCUIT DIAGRAM


IOO1 Micro Processor PFC1
Clock 12 Data 13 FCENAble 14 SCL2 SDA2 60 59 2 3
SCL2 SDA2

U006
Clock

PSZ1
16 17

2H Video PWB 27 SDA2

11 12 13

FLEX Conv. Data FCENAble Unit

IX01

Sub Deflection PWB

PSD1
1 2

Rainforest RGB 26 SCL2 Processor

I702
Sweep Control

PDD2
9 8 4 SCL2 3 SDA2

I003
D/A Expander

PSU1
12 13 42 Clock 41 Data 40 Enable 4 Enable 3 Data 2 Clock 4 SCL2 SDA2 DATA CLOCK 6 7 16 SCL1 17
SDA1

IS05
Prologic Decoder

Surround PWB 16

Dolby Enable 15

14

IS02
Center/LFE/PinP Audio Control

PYC1
SCL3 56 SDA3 57 3DPEnable 18 3DPClock 3DPData 3DPEnable 5 4 6 6 5 4

U004
3DPClock

3DY/C PinP 3DPData 3DPEnable Unit U002


Tuner 1 Main

IS06
Passive Decoder

17

16 17

IS03
Rear Audio Control

MENABLE 10 TUDATA 30 TUCLOCK 28 PENABLE 11

Enable Data Clock

16 17 16 17

17 Enable 16 Data 15 Clock

IG02
Front Equalizer

U003
Tuner 2 Pinp

IS01
Front Audio Control

IG11
Center Equalizer

SDA1 SCL1

2 3

5 SDA 6
SCL

IOO2 EEPROM PST3


5 4

Terminal PWB 27 SCL1 26 SDA1

Page 07-02

I301
A/V Select

60SDX88B DP86 CHASSIS SIGNAL PWB

FS

MICROPROCESSOR

QS2

I001

SURROUND PWB 2H VIDEO PWB

P1

QS1

U002 Main Tuner

U003 PinP Tuner

U006 FLEX Conv.

U004 3D/ YC (PinP)

TERMINAL PWB

QS4

REAR VIEW

PAGE 08-01

DEFLECTION SUB PWB

SK01: SERVICE SWITCH

I601 MB DS1 YOKE PLUGS MG MR

Digital Convergence Unit

DP21 -28V DP22 +B 130V


QH01

DP20 +28V DP16 +13V

SD4 DP15 -13V DC1

CR

CG
TH01 FBT

QD2

TP91 CB

60SDX88B DP86 CHASSIS DEFLECTION PWB


CONVERGENCE HEAT SINK

DP06 PROTECTION (RED) QD1

RH44 High Voltage ADJ. DO NOT ADJUST DF

REAR VIEW

PAGE 08-02

60SDX88B DP86 CHASSIS CONTROL PWB

DP86 CONTROL SUB P.W.B.

CH UP BROWSE VOL VOL UP DOWN FAVCH FAVCH

MENU/ SELECT

POWER

INPUT CH DOWN BROWSE R L V S EFC1

REMOTE CONTROL LIGHT RECEIVER AUTO DIGICON (MAGIC FOCUS) DM09 EFC1 QM02

MO1

HM01

DP86 CONTROL PWB FT

POWER DIMMER CONTROL LED LIGHT RECEIVER FS

PAGE 08-03

60SDX88B DP86 CHASSIS CRT PWB


GND

P851 R879 P852 Cathode

E851

GREEN

GND

P801 R829 P802 Cathode

E801

RED

GND

P8A1

E8A1

P8A2 Cathode

BLUE

PAGE 08-04

60SDX88B DP86 CHASSIS SUB POWER PWB

QS4 QS1 QD2 QD1 QS2 PA

D971 TV+5V

D930 TV+9V

REAR VIEW

D928 STAND BY +12V

T901 QA1

D A D A

D P

PAGE 08-05

60SDX88B FLEX CONVERTER VIDEO / CHROMA / RGB Processing


Pin Description: See drawings as shown below. Function: See drawings as shown below. Signal Flow: See below. Video / Chroma / RGB Key Components No. 1 2 3 4 5 6 Circuit No. U002 I301 U004 I013 U006 IX01 P/N HC00311 CP00742U CS00192 CK08521R CS00185 CP04712U Name V6-A30FT TA8851BN HC3152 BA7657F-E2 HC5125 TA1276AN Functions Main Tuner Selector IC 3DYC/PinP YUV Switch Flex Converter YC Processor PWB Signal Terminal Signal Signal Signal 2H/Sub Video

YC Separation V U002 Tuner / IF I301 AV Switch V/S 3DYC PinP U004 Y/C

Y/C YUV I013 YUV YUV Switch

Progressive Scan Flex Conv. U006 YUV

YUV RGB YC Proc. IX01 YUV RGB

Video Input Jacks S-In Jacks NTSC Y Cr/Cb YUV 1080i / 480P Y Cr/Cb Y Pr/Pb

ALL 480P or 1080I

Only one set of component inputs. Either NTSC Y Cr/Cb or DTV Y Pr/Pb 480P or 1080I

Page 09-01

60SDX88B Chassis DP-86 Component Identification Description


MAIN CHASSIS SIGNAL PWB

Part Number
UE05111 JT08661
I001 (CP06342U) I002 (CP05272U) I005 (2000541) I008 (CP05571) Q008 (2325691R) Q009 (2312171)

Description
POWER / DEFLECTION PWB

Part Number
JT08681
D903 (2338313) EP91 (AZ00109M) EP92 (AZ00107M) EP93 (AZ00108M EP94 (AZ00109M) EP95 (AZ00109M) EP96 (AZ00109M) EP97 (AZ00109M) EP98 (AZ00104M) IH01 (2362161) IH02 (2366721) IK01 (CP05571) IK03 (CP05571) IK04 (CZ00431) IK05 (CZ00431) IP01 (CZ00451) IP02 (CP05141) IP03 (CP03924F) IP04 (2381344) IP05 (2000465) IP06 (2000465) I601 (CZ00761U) I651 (2365452) QH01 (2390851) QP01 (2312171) QP05 (2323782R) QP08 (2327461) QP04 (2321112M) Q777 (CF01891F) S901 (FJ00071) TH01 (BW00633) T752 (BT01231)

MICROPROCESSOR MEMORY (Service Adjustments) RESET IC 5 Volt REGULATOR (Prescaler) POWER ON/OFF (Relay Driver) 5 Volt REGULATOR (Micro. B+)

MAIN TUNER PinP TUNER 3D/YC COMB and PinP UNIT FLEX CONVERTER TERMINAL PWB
A/V SELECT IC +9V REGULATOR 2-Line Comb for PinP

U002 (HC00311) U003 (2429691) U004 (CS00192) U006 (CS00185) JT08691


I301 (CP00742U) I302 (CP05572) I304 (CW00022)

SURROUND PWB

Front Audio Control LFE/PinP/Center Audio Control Rear Audio Control Pro Logic Decoder Passive Decoder Perfect Volume Transmitter Audio Control Front Graphic Equalization Center Graphic Equalization

JT08701
IS01 (2020001) IS02 (2020001) IS03 (2020001) IS05 (CP00801U) IS06 (CP00791U) IS08 (CP02601) IS09 (CK06362R) IG02 (CP02771U) IG11 (CP02771U) IX01 (CP04712U) QX23 (2320637M) QX28 (2320637M) QX33 (2320637M) QX41 (2320647M)

Rainforest IC Red Output Green Output Blue Output VM Output

SIGNAL SUB PWB/2H PWB Comes w/Signal PWB

Bridge Rectifier (On Sub Power PWB) RAW 150Vdc Protector 220V (Screen Voltage) Protector Heater Protector +24V Protector M13V Protector +28V Protector (Convergence) M28V Protector (Convergence) 130V Protector (Deflection) High Voltage Driver IC High Voltage Driver IC (Regulator) +5V Regulator (for DCU) +5V Regulator (for SRAM DCU) Convergence Output (RH, RV & GV) Convergence Output (GH, BH & BV) Switching Regulator (Driver IC) Heater Regulator +13 Regulator 130V Regulator 130V Regulator (Photo Coupler) Shut Down (Photo Coupler) Vertical Output Side Pin Cushion (Comparator) Horizontal Output (High Voltage) 13 Regulator (M13V) Shut Down SCR Horizontal Vcc ON/OFF SW 130V B+ Excessive Current Sensor Horizontal Output (Deflection) Deflection Power Supply Relay (On Sub Power PWB) Flyback Transformer (High Voltage) Deflection Transformer

Page 09-02

60SDX88B Chassis DP-86 Component Identification Description


DIGITAL Convergence Unit (UKDG) SUB POWER PWB (Process Power)
BRIDGE RECTIFIER RAW 150V PROTECTOR FRONT/REAR AUDIO 28V PROTECTOR CENTER +21V PROTECTOR +33V PROTECTOR MAIN FUSE SWITCHING REGULATOR REGULATOR FEEDBACK (Photo Coupler) TV9V REGULATOR TV5V REGULATOR SHUT DOWN (Photo Coupler) CLOCK (AC Photo Coupler) STAND BY 12V (A12V) REGULATOR ON/OFF CONTROL SHUT DOWN SCR AUDIO RELAY DRIVER ON/OFF RELAY (Deflection B+) AUDIO RELAY INFRARED RECEIVER

Part Number
CS00222 JT08671
D901 (2338313) E992 (AZ00109M) E994 (AZ00109M) E995 (AZ00109M) E996 (AZ00108M) F901 (2722359) I901 (CZ00451) I904 (2000465) I908 (CP03923F) I914 (CP03922F) I905 (2000465) I906 (2000465) I907 (CP03924F) Q914 (2320591M) Q913 (2323782R) Q918 (2320663M) S901 (FJ00071) S902 (FJ00071)

Description
VERTICAL PARABOLA IC (Comparator)

Part Number
I703 (2362602)

RED DRIVER GREEN DRIVER BLUE DRIVER

CRT PWB Comes with Velocity Modulation PWB

JT08711
Q805 (2312372F) Q855 (2312372F) Q8A5 (2312372F) E801 (EY00601) E851 (EY00601) E8A1 (EY00601)

RED CRT SOCKET GREEN CRT SOCKET BLUE CRT SOCKET

CRT Sockets

REMOTE CONTROL CLU-617MP


SCREEN ASSY. BLUE CRT ASSY. GREEN CRT ASSY RED CRT ASSY MIRROR FRONT SURFACE FOCUS PACK TYPE MHF116 DEFLECTION YOKE SOLAR BATTERY (MF Sensors) CONVERGENCE JIG Progressive CONVERGENCE JIG HD SBB LENS Assy. Blue SBB LENS Assy. Green SBB LENS Assy. Red Ultra Shield SPEAKER GRILL (Right) SPEAKER GRILL (Left)

HL00717

KR00631 UE04516 UE04515 UE04514 KS00163 AZ00005 BY01221 FT00011 H310355 H312181A UX03076 UX03075 UX03074 KR00727 32110063 32110064

CONTROL PANEL PWB

UE05141
HM01 (CZ00522)

VELOCITY MODULATION PWB Comes with CRT PWBs AUDIO OUTPUT PWB
FRONT AUDIO OUTPUT IC CENTER AUDIO OUTPUT IC REAR AUDIO OUTPUT IC

JT00711 JT08871
I401 (2004751) I402 (2004751) I403 (2004751)

Page 09-03

HORIZONTAL Vcc REGULATOR I701 (CP05571) HORIZONTAL DRIVE AND VERTICAL DRIVE IC I702 (CZ00751U)

SUB DEFLECTION PWB Comes w/Deflection PWB

DIGITAL CONVERGENCE OVERLAY SCREEN JIG PART NUMBERS Service Jigs for PTVs: H310351 H310352 H310353 H310354 H310355 H310356 H312181A H312182A H312183A H312184A H310357 H310358 H310359 No Longer Used No Longer Used 46 (UX, SBX, FX) 50 (UX, SBX, FX) 60 (UX, SBX, FX) 55 (UX, SBX, FX) 60SDX88B, HD Mode 61HDX98B, Full Mode 61HDX98B, Smooth Wide Mode 53SDX89B, HD mode 70 (UX, FX) 61 (SBX) 53 (SBX)

NOTE:

Only models with Digital Convergence need jig screen. Standard (UX, FX and SBX) PTV needs only ONE Jig screen per model. 53SBX59B 61SBX59B 50CX29B H310359 H310358 N/A (Analog Convergence)

SDX and HDX need TWO screen jigs: Due to different Display Formats: 60SDX88B 53SDX89B 61HDX98B H310355 (Progressive Mode) and H312181A (HD Mode) H310359 (Progressive Mode) and H312184A (HD Mode) H312182A (Full Mode) and H312183A (Smooth/Wide Mode)

PAGE 09-04

53SDX89B Chassis DP-86 Component Identification Description


MAIN CHASSIS SIGNAL PWB

Part Number
UE05111 JT08661
I001 (CP06342U) I002 (CP05272U) I005 (2000541) I008 (CP05571) Q009 (2312171) Q008 (2325691R)

Description
POWER / DEFLECTION PWB

Part Number
JT08681
EP91 (AZ00109M) EP92 (AZ00107M) EP93 (AZ00108M EP94 (AZ00109M) EP95 (AZ00109M) EP96 (AZ00109M) EP97 (AZ00109M) EP98 (AZ00104M) D903 (2338313) IH01 (2362161) IH02 (2366721) IK01 (CP05571) IK03 (CP05571) IK04 (CZ00431) IK05 (CZ00431) IP01 (CZ00451) IP02 (CP05141) IP03 (CP03924F) IP04 (2381344) IP05 (2000465) IP06 (2000465) I601 (CZ00761U) I651 (2365452) QH01 (2390851) QP01 (2312171) QP04 (2321112M) QP05 (2323782R) QP08 (2327461) Q777 (CF01891F) S901 (FJ00071) TH01 (BW00633) T752 (BT01231)

MICROPROCESSOR MEMORY (Service Adjustments) RESET IC 5 Volt REGULATOR (Prescaler) 5 Volt REGULATOR (Micro. B+) POWER ON/OFF (Relay Driver)

MAIN TUNER PinP TUNER 3D/YC COMB and PinP UNIT FLEX CONVERTER TERMINAL PWB
A/V SELECT IC +9V REGULATOR 2-Line Comb for PinP

U002 (HC00311) U003 (2429691) U004 (CS00192) U006 (CS00185) JT08691


I301 (CP00742U) I302 (CP05572) I304 (CW00022)

SURROUND PWB

Front Graphic Equalization Center Graphic Equalization Front Audio Control LFE/PinP/Center Audio Control Rear Audio Control Pro Logic Decoder Passive Decoder Perfect Volume Transmitter Audio Control

JT08701
IG02 (CP02771U) IG11 (CP02771U) IS01 (2020001) IS02 (2020001) IS03 (2020001) IS05 (CP00801U) IS06 (CP00791U) IS08 (CP02601) IS09 (CK06362R) IX01 (CP04712U) QX23 (2320637M) QX28 (2320637M) QX33 (2320637M) QX41 (2320647M)

Rainforest IC Red Output Green Output Blue Output VM Output

SIGNAL SUB PWB/2H PWB Comes w/Signal PWB

RAW 150Vdc Protector 220V (Screen Voltage) Protector Heater Protector +24V Protector M13V Protector +28V Protector (Convergence) M28V Protector (Convergence) 130V Protector (Deflection) Bridge Rectifier (On Sub Power PWB) High Voltage Driver IC High Voltage Driver IC (Regulator) +5V Regulator (for DCU) +5V Regulator (for SRAM DCU) Convergence Output (RH, RV & GV) Convergence Output (GH, BH & BV) Switching Regulator (Driver IC) Heater Regulator +13 Regulator 130V Regulator 130V Regulator (Photo Coupler) Shut Down (Photo Coupler) Vertical Output Side Pin Cushion (Comparator) Horizontal Output (High Voltage) 13 Regulator (M13V) 130V B+ Excessive Current Sensor Shut Down SCR Horizontal Vcc ON/OFF SW Horizontal Output (Deflection) Deflection Power Supply Relay (On Sub Power PWB) Flyback Transformer (High Voltage) Deflection Transformer

Page 09-05

53SDX89B Chassis DP-86 Component Identification Description


DIGITAL Convergence Unit (UKDG) SUB POWER PWB (Process Power)
BRIDGE RECTIFIER MAIN FUSE RAW 150V PROTECTOR FRONT/REAR AUDIO 28V PROTECTOR CENTER +21V PROTECTOR +33V PROTECTOR SWITCHING REGULATOR REGULATOR FEEDBACK (Photo Coupler) SHUT DOWN (Photo Coupler) CLOCK (AC Photo Coupler) STAND BY 12V (A12V) REGULATOR TV9V REGULATOR TV5V REGULATOR SHUT DOWN SCR ON/OFF CONTROL AUDIO RELAY DRIVER ON/OFF RELAY (Deflection B+) AUDIO RELAY INFRARED RECEIVER

Part Number
CS00224 JT08671

Description
VERTICAL PARABOLA IC (Comparator)

Part Number
I703 (CP00401)

RED DRIVER Q805 (2312372F) D901 (2338313) GREEN DRIVER Q855 (2312372F) F901 (2722359) BLUE DRIVER Q8A5 (2312372F) E992 (AZ00109M) E994 (AZ00109M) CRT Sockets E801 (EY00601) E995 (AZ00109M) RED CRT SOCKET E851 (EY00601) E996 (AZ00108M) GREEN CRT SOCKET BLUE CRT SOCKET E8A1 (EY00601) I901 (CZ00451) I904 (2000465) REMOTE CONTROL CLU-617MP HL00715 I905 (2000465) SCREEN ASSY. KR01162 I906 (2000465) I907 (CP03924F) BLUE CRT ASSY. UE04513 I908 (CP03923F) GREEN CRT ASSY UE04512 I914 (CP03922F) Q913 (2323782R) Q914 (2320591M) Q918 (2320663M) S901 (FJ00071) S902 (FJ00071) RED CRT ASSY MIRROR FRONT SURFACE FOCUS PACK TYPE MHF116 DEFLECTION YOKE SOLAR BATTERY (MF Sensors) CONVERGENCE JIG Progressive CONVERGENCE JIG HD SBB LENS Assy. Blue SBB LENS Assy. Green SBB LENS Assy. Blue Ultra Shield SPEAKER GRILL (Right) UE04511 KS02021 AZ00005 BY01221 FT00011 H310359 H312184 UX03066 UX03065 UX03064 KR01291 PH07411

CRT PWB Comes with Velocity Modulation PWB

JT08711

CONTROL PANEL PWB

UE05141
HM01 (CZ00523)

VELOCITY MODULATION PWB Comes with CRT PWBs AUDIO OUTPUT PWB
FRONT AUDIO OUTPUT IC CENTER AUDIO OUTPUT IC REAR AUDIO OUTPUT IC Page 09-06

JT00711 JT08871
I401 (2004751) I402 (2004751) I403 (2004751)

HORIZONTAL Vcc REGULATOR I701 (CP05571) HORIZONTAL DRIVE AND VERTICAL DRIVE IC I702 (CZ00751U)

SUB DEFLECTION PWB Comes w/Deflection PWB

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