A Novel Three-Level DC-DC Converter with Load Adaptive ZVS Auxiliary Circuit

Pritam Das
Murata Power Solutions Markham, ON, Canada. pdas@murata-ps.com

Majid Pahlevaninezhad
Queens University Department of Electrical Engineering Kingston, ON, Canada K7L 3N6

Gerry Moschopoulos
Western University Department of Electrical Engineering London, ON, Canada N6A 5B9

Praveen Jain
Queens University Department of Electrical Engineering Kingston, ON, Canada K7L 3N6

Abstract - Multi-level converters are widely used to convert high voltage DC (typically above 500V) to an isolated DC output voltage that may vary from 12V to 300V, depending on the application. Typical applications can range from network server power supplies to battery chargers for purely electric vehicles. Almost all these industrial applications require the converter to operate from no load to full load. Zero-voltage switching is necessary for the efficient operation of the converter as it ensures reduced EMI, reduced switching losses and the proper operation of the switching devices. Most conventional ZVS techniques for multi-level converters fail to achieve ZVS typically below 50% of full load, while some ZVS techniques are able to do so, but they increase the design complexity of the overall system. Moreover such techniques may suffer from increased circulating current loess at certain load ranges (typically at high loads) thus offsetting the gain in efficiency achieved through ZVS. In this paper a simple yet novel ZVS auxiliary circuit that achieves ZVS even at no load, can optimize the circulating auxiliary circuit current necessary for ZVS as a function of load, thus maximize the efficiency of the converter for all load conditions, is proposed, analyzed and validated by experimental results.

I. INTRODUCTION Three-level DC-DC converters are widely used for DC-DC conversion with galvanic isolation when the input voltage is typically higher than 500V DC [1]-[12]. These converters are widely used for various applications including battery chargers for electric vehicles, powering network servers, telecom devices etc. The key advantage of this topology compared to the conventional full-bridge topology in high voltage applications is that the input DC voltage is split equally so that the peak voltage stress of the semiconductor devices and the DC bus capacitors is reduced to half of the input DC voltage. This facilitates the use of lower voltage rated devices and passive components. For the efficient operation of the converter from no-load to full load, it is essential that the semiconductor switches operate with zero-voltage switching (ZVS). ZVS is mainly achieved by using the energy stored in the leakage inductance

of the transformer; typically, ZVS can be naturally achieved above 50% peak load. Several methods of extending the ZVS range to less than 50% load have been proposed in the literature, but most of them fail to achieve ZVS at no load condition. Some of these methods include: Adding an additional transformer to increase the magnetizing current in the transformer that can be used to ensure for ZVS at lower loads. This method, however, requires additional transformer cores, thus decreasing the power density; moreover this method suffers from the loss of ZVS at and close to zero load [10]-[11]. Using a resonant approach by placing a resonant tank before the transformer (especially an LCC resonant tank [8]-[9]). Such resonant converters are difficult to control since they always need to be operated in lagging current mode, which is difficult to do due to the parametric variations in the resonant tank. Placing saturable reactors in series with the transformer to extend the decay of the magnetizing current during the ZVS modes. The key drawback of this method is high core loss in the saturable reactor and loss of ZVS at and close to zero-load [10]. A no-load to full-load ZVS topology with an auxiliary circuit was proposed in [12] for full-bridge converters. The key drawback of this topology arises from the fixed amount of circulating current generated in its auxiliary circuit, irrespective of the output load. As mentioned above, ZVS is naturally achieved by the converter at high loads by using the energy stored in the leakage inductance of the transformer so that minimal assistance is required from the auxiliary circuit. This results in a drop in efficiency at higher loads due to additional conduction losses generated by the circulating currents in the auxiliary circuit. Thus it is essential to have an inherent mechanism in the auxiliary circuit so that the circulating current gets reduced as the load current increases. This can be achieved by increasing switching frequency with

978-1-4673-4355-8/13/$31.00 2013 IEEE

38

load as reported in [13], but doing so requires digital systems and accurate monitoring of output load and transient conditions. Moreover, the use of two separate auxiliary inductors in [12]-[13] somewhat reduces the power density that can be gained by operating the converter with high switching frequency . A passive load adaptive ZVS approach was proposed in [14]. In this topology the circulating current available in the auxiliary circuit was made inversely proportional to the load, which is desired for optimal converter performance. The key drawback of the load adaptive ZVS technique reported in [14] is that the auxiliary circuit is placed in series with the main transformer so that the auxiliary winding and the auxiliary capacitors that split the DC bus has to carry the same current as the primary current in the transformer. This results in the need for bulkier components to implement the auxiliary circuit and also increases the conduction losses of the parasitic resistances of these components. In order to overcome the issues associated with load adaptive ZVS in three-level converters, a new three-level converter topology is proposed in this paper, as shown in Fig. 1. A simple load adaptive ZVS auxiliary circuit is implemented on a three-level converter. The auxiliary circuit consists of auxiliary inductors La1 and La2, DC bus-splitting capacitors Cb1, Cb2, and flying capacitors Cb3 and Cb4, which are also involved in the voltage balancing mechanism along with clamping diodes Dc1 and Dc2 [8]-[9],[14]. The auxiliary inductors La1 and La2 are magnetically coupled with an effective turns ratio of 1:1 and are the key components of the

auxiliary circuit. II. MODES OF OPERATION The modes of operation of the converter with the proposed load adaptive ZVS auxiliary circuit are described in this section. Fig. 2 shows the ideal waveforms of the key elements of the converter while Fig. 3 shows the current flow during each mode. The converter is controlled by the well-known phase-shift control method, which means that duty ratio of each switch is 0.5, the gating pulses of switches S2 and S3 are complimentary, while those of S1 and S4 are complimentary with a certain phase shift between the pulses of S2 and S3 respectively. It is this phase shift that defines the duty ratio of the transformer primary voltage Vab and in turn controls the output voltage. The main transformer T has a turns ratio of primary to secondary equal to N:1. The clamping diodes Dc1 and Dc2 are provided to equalize the voltage across the semiconductor devices and to clamp the voltage Vab to zero whenever necessary. The coupled

Fig.1. Three level DC-DC converter with load adaptive ZVS auxiliary circuit.

Fig. 2. Ideal current and voltage waveform of the proposed converter.

39

inductor is modeled as an ideal transformer with turns ratio of 1:1 and a magnetizing inductance Lc equal to the value of each of the coupled inductor which implies La1=La2=Lc. In this context, it is worth mentioning that the current in an auxiliary inductor is considered positive when flowing into its dotted end and the voltage across the inductor is considered positive when the potential of its dotted end is greater than that of its other end. Another important fact which must be noted is that since each switch has duty ratio of 0.5 due to the use of phase-shift control, the voltages Vcb3 and Vcb4 across the capacitors Cb3 and Cb4 should be +Vin/4 as the average voltage across the transformer and the coupled inductor should be zero over a switching cycle. Due to the symmetrical operation of the converter over each half of the switching cycle, only the operation of the converter during a half switching cycle is discussed here.

Mode-1(t0-t1): This is an energy transfer mode. Switches S1 and S2 are conducting and power is transferred from the upper DC bus capacitor Cb1. The transformer primary voltage Vab is equal to Vin/2. The current in the leakage inductance LS is the reflected output current to the primary side of the transformer. Voltage Vac across coupled inductor La1 in this mode is +Vin/4 while voltage Vbc across La2 is +Vin/4 so that the net voltage across the coupled inductor during this mode is zero and the current in each of the inductors remains constant. Also during this mode, a net positive voltage of (Vin/2-VoN) is incident across the combination of leakage inductance and the reflected output inductor to the primary side so that the current in them starts increasing. Mode-2(t1-t2): At time t1, switch S1 is turned off. The sum of currents in the auxiliary inductor La1 and the current in the combined inductance of the leakage inductor and the reflected

Fig.3 Modes of operation during one half switching cycle

40

output inductor to the primary side charges and discharges the output capacitances of the switches S1 and S4 respectively. There is no change in the voltage or current waveform of the auxiliary inductors in this mode. At the end of this mode, the voltages across S1 and S4 are Vin/2 and zero respectively so that S4 can be turned on with ZVS. Mode-3(t2-t3): This is a freewheeling mode with no energy being transferred to the output through the transformer, whose primary remains shorted in this mode. The clamping diode Dc1 starts to conduct. During this mode, there is a change in the voltage waveform of the coupled inductor La1 so that a net positive voltage of +Vin/4 is incident across La1 and a negative voltage of -Vin/4 reflected from La1 is incident across La2. In this mode, current in La1 begins to ramp up while that in La2 starts to ramp down; the output current flows through diode Do1. Sometime during this mode, the inductor currents reverse their polarities at time t3. The slopes of the current in the coupled inductors are given by Vin/4LC. Also during this mode, a net negative voltage of -VoN is incident across the combination of leakage inductance and the reflected output inductor to the primary side so that the current in them starts reducing. Mode-4(t3-t4): At t3, the currents in the coupled inductor reverse their polarities and continue to slew at the same rate as given in Mode-3. The transformer primary voltage Vab still remains clamped to zero. Switch S2 is turned off at the end of this mode. Mode-5(t4-t5): At t4, switch S2 is turned off. During this mode, the transformer leakage inductance is disconnected from the reflected output inductance and both output diodes of the transformer secondary begin to conduct. The current in the auxiliary inductor, along with the energy stored in the leakage inductor, charges and discharges the output capacitance of switches S2 and S3 respectively to and from a voltage of Vin/2. At the end of this mode at t5, the transformer primary voltage Vab becomes -Vin/2 and S3 can be turned on with ZVS. Mode-6(t5-t6): At t5, the transformer primary current starts reversing its phase and the primary current starts increasing in a reverse direction until it reaches the reflected output current at the primary side at time t6. Mode-7(t6-t7): At t6, another energy transfer mode similar to Mode-1 commences. The switches S3 and S4 carry the primary current and diode D02 carries the output current. The following can be concluded from the above discussion on the modes of operation: The growth of ramp current in the auxiliary inductors depends on the duration of the non-energy transfer modes or the freewheeling modes i.e Modes 3 to 5. The

ramp current magnitude will be greater at lower loads when Modes 3 to 5 are longer because of the smaller duty ratio of the converter, while the same ramp will have less opportunity to slew at higher loads when the duration of Modes 3 to 5 are shorter. The assistance from the auxiliary circuit is most needed in terms of the ramp current during switching intervals (at low loads when there is not enough energy in the leakage inductance to discharge switch capacitors), while the same assistance from the auxiliary circuit needs to be minimized as load increases since the energy in the leakage inductance does so as well. This feature is achieved by the proposed coupled inductor auxiliary circuit, which is simple, unique and novel. ZVS at no-load is easily achieved since the ramp current magnitude is at its maximum at no load and can provide the most help in discharging switch capacitances. The component count of the converter is reduced and better component packaging can be achieved by having a coupled inductor auxiliary circuit. III. DESIGN CONSIDERATIONS

In this section the key design considerations which need to be made in designing a load adaptive ZVS three level converter are discussed in this section. A. ZVS Condition for Switch Pairs S1 ,S4 and S2, S3 The ZVS condition for the outer switch pair S1, S4 is different from that of the inner switch pair S2, S3 due to the involvement of the output inductor energy during the switching instances like Mode 2 of operation while the output inductor energy is not involved during the switching instance of the inner leg comprising of S2, S3 which is Mode 4 in this case. In this case, the soft switching of the switches S2, S3 are more critical than those of S1,S4 especially at lighter loads when the energy in the leakage energy becomes too little to discharge the output capacitance of the MOSFETs. The energy stored in the leakage inductor and in the coupled inductors during Mode-4 is responsible for discharging the output capacitance of S3 during Mode 4; this energy is given by: 1 1 E l = Llk I p (t 4 ) 2 + La I aux (t 4 ) 2 (1) 2 2 The ZVS condition of S1, S4 is: 1 1 E l = ( Llk + N 2 L0 ) I p (t 2 ) 2 + L a I aux (t 2 ) 2 2 2 The ZVS condition for S2 or S3 is

2 V dc C oss (2) 4 3 where Llk is the leakage inductance, La is the value of each of the auxiliary inductors, Ip is the value of the primary side El

41

current in the transformer at t3, I aux (t3 ) is the current in the auxiliary inductor at t3. B. Choice of value of the auxiliary inductors: It can be concluded from the modes of operation and the voltage waveform across the coupled inductors shown in Fig.2, the value of I aux (t3 ) is the peak current of the auxiliary inductor. The value of this peak current is given by: V (1 d ) I aux (t 3 ) = dc (3) 16 f sw L aux It can be concluded from eqn.(2) that the peak ramp current should be higher for lower values of phase shift d and lower for higher values of d. For heavier loads, the converter operates with more phase shifting while for ligher loads it should operate with less phase shifting. This implies that the ramp peak current should be higher for lighter loads and lower for heavier loads so that the new auxiliary circuit is able to have a load adaptive ramp. The ZVS condition for S2 or S3 is 2 V dc C oss (4) 4 3 For the worst-case condition for ZVS, which is at no-load, the primary current is negligible so that the no-load ZVS condition can derived as follows: El
Laux IV. 3 (1 d ) 2 256 f sw C oss (5)
2

(a)

(b)

EXPERIMENTAL RESULTS

An experimental prototype of the proposed converter was implemented with the following specifications: Input voltage of 700V, output voltage 12V~14V, output power: 0~2kW, switching frequency: 200kHz. For the high current output current doubler, synchronous rectification was implemented. The following key active components were used: Three-level switches: IRFPS40N50LPBF, clamping diodes: C3D06060A, output synchronous rectifier: IRFP4110PBF. The coupled inductor was implemented on a PQ32/30 3F3 core. The value of each inductor was 120H each. The transformer had a turns ratio of 7:1 with current doubler rectifier. The leakage inductance measured on the transformer was 1.67H only which helped in reducing voltage spike across output rectifier. Fig. 4(a) shows the ramp current and primary and secondary voltages at 2.5% of full load. It can be concluded from the smooth and gradual rise and fall of the leading and lagging edges of transformer voltages in Fig.4(a) that fullZVS is achieved at this low load. Fig. 4(b) shows the ramp current and the transformer primary voltage at full-load. Again from Fig.4(b), it can be concluded that ZVS is achieved and the ramp current magnitude is much smaller

(c) Fig. 4(a) Key waveforms at 5% load, (b) Key waveforms at full load (c) efficiency graph of efficiency with coupled and non-coupled auxiliary inductors

than what is shown in Fig.4(a). Fig. 4(c) shows efficiency results with and without coupled inductor auxiliary circuit. It can be clearly seen that coupled inductor auxiliary circuit aided converter is more efficient from around 20% full load and above, which confirms the effectiveness of proposed ZVS approach.

V.

CONCLUSION

In this paper a novel yet simple auxiliary ZVS circuit for three-level DC-DC converters is proposed. The simple

42

auxiliary circuit not only reduces the component count for the implementation of ZVS, but also gives rise to a load adaptive ZVS. The assistance from the auxiliary circuit (in the form of a ramp current in the auxiliary inductor) is maximal at low load as needed, but reduces as load increases. This phenomenon is achieved by the magnetic coupling created by implementing the auxiliary inductors on a single core. The load adaptive approach helps the overall converter achieve high efficiency and optimized ZVS from no-load to full-load. REFERENCES
[1] Narimani, M.; Moschopoulos, G.; , "A New Single-Phase Single-Stage Three-Level Power Factor Correction AC-DC Converter with PhaseShift Modulation," Industrial Electronics, IEEE Transactions on , vol.PP, no.99, pp.1, 0, doi: 10.1109/TIE.2012.2205357. [2] Narimani, M.; Moschopoulos, G.; , "A Novel Single-Stage Multilevel Type Full-Bridge Converter," Industrial Electronics, IEEE Transactions on , vol.PP, no.99, pp.1, 0 doi: 10.1109/TIE.2012.2183839 [3] Sugimura, H.; Omori, H.; Soon-Kurl Kwon; Nakaoka, M.; , "Comparative considerations of soft switching PWM three-level HB dc-dc converters with high frequency link," Power Electronics and ECCE Asia (ICPE & ECCE), 2011 IEEE 8th International Conference on , vol., no., pp.2336-2343, May 30 2011-June 3 2011.doi: 10.1109/ICPE.2011.5944490 [4] Tiecheng Sun; Jianhui Guo; Rui Li; Lei Fu; , "ZVZCS three-level DCDC converter using passive clamping circuit," Vehicle Power and Propulsion Conference, 2008. VPPC '08. IEEE , vol., no., pp.1-4, 3-5 Sept. 2008 doi: 10.1109/VPPC.2008.4677514. [5] Yu Du; Xiaohu Zhou; Sanzhong Bai; Lukic, S.; Huang, A.; , "Review of non-isolated bi-directional DC-DC converters for plug-in hybrid electric vehicle charge station application at municipal parking decks," Applied Power Electronics Conference and Exposition (APEC), 2010 Twenty-Fifth Annual IEEE , vol., no., pp.1145-1151, 21-25 Feb. 2010 doi: 10.1109/APEC.2010.5433359 [6] Wensong Yu; Cong Zheng; Jih-Sheng Lai; Hongbo Ma; , "Single-switch three-level DC-DC converters for dimmable LED lighting," Applied Power Electronics Conference and Exposition (APEC), 2011 TwentySixth Annual IEEE , vol., no., pp.735-740, 6-11 March 2011, doi: 10.1109/APEC.2011.5744678 [7] Griva, G.; Oleschuk, V.; , "Flexible PWM control of three-level inverters for fuel cell/battery supplied aeromobile drive," Industrial Electronics, 2009. IECON '09. 35th Annual Conference of IEEE , vol., no., pp.3735-3740, 3-5 Nov. 2009 doi: 10.1109/IECON.2009.5415114 [8] Agamy, M.S.; Jain, P.K.; , "An Adaptive Energy Storage Technique for Efficiency Improvement of Single Stage Three-Level Resonant AC/DC Converters," Applied Power Electronics Conference and Exposition, 2009. APEC 2009. Twenty-Fourth Annual IEEE , vol., no., pp.10051010, 15-19 Feb. 2009 doi: 10.1109/APEC.2009.4802785 [9] Agamy, M.S.; Jain, P.K.; , "An overview of methods to increase the power handling capability of single stage AC-DC converters," Industrial Electronics (ISIE), 2011 IEEE International Symposium on , vol., no., pp.147-152, 27-30 June 2011. [10] Peng Li; Wuhua Li; Yi Zhao; Huan Yang; Xiangning He; , "ZVS threelevel phase-shift high step-down DC/DC converter with two transformers," Power Electronics and Applications (EPE 2011), Proceedings of the 2011-14th European Conference on , vol., no., pp.110, Aug. 30 2011-Sept. 1 2011 [11] Wuhua Li; Peng Li; Huan Yang; Xiangning He; , "Three-Level ForwardFlyback Phase-Shift ZVS Converter With Integrated SeriesConnected Coupled Inductors," Power Electronics, IEEE Transactions on , vol.27, no.6, pp.2846-2856, June 2012 doi: 10.1109/TPEL.2011.2177478 [12] Jain, P.K., Kang. W., Soin H., and Xi Y., Analysis and design considerations of a load and line independent zero voltage switching full bridge DC/DC converter topology, IEEE Trans. Power Electron., vol. 17, no. 5, pp. 649657, Sep. 2002.

[13] Pahlevaninezhad, M.; Drobnik, J.; Jain, P.K.; Bakhshai, A.; , "A Load Adaptive Control Approach for a Zero-Voltage-Switching DC/DC Converter Used for Electric Vehicles," Industrial Electronics, IEEE Transactions on , vol.59, no.2, pp.920-933, Feb. 2012 [14] Jang, Y.; Jovanovic, M.M.; , "A new three-level soft-switched onverter," Power Electronics, IEEE Transactions on , vol.20, no.1, pp. 75- 81, Jan. 2005.

43