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Frequency multiplier is an electronic circuit that generates an output signal whose output frequency is a multiple of its input frequency. Frequency multipliers are often used in frequency synthesizers and communications circuits. It can be more economical to develop a lower frequency signal with lower power and less expensive devices, and then use a frequency multiplier chain to generate an output frequency in the microwave or millimeter wave range. Frequency multiplication is also used in nonlinear optics. The nonlinear distortion in crystals can be used to generate harmonics of laser light.One of the easiest ways of designing a frequency multiplier is using PLL (Phase Locked Loop). A PLL is a closed loop frequency system that locks the phase of an output signal to an input reference signal. PLLs are widely used in computer, radio, and telecommunications systems where it is necessary to stabilize a generated signal or to detect signals. The term lock refers to a constant or zero phase difference between two signals.
Block diagram of a frequency multiplier is as shown above. A divide by N network is inserted between the VCO output and phase comparator input. In the locked state, the VCO output frequency is given by , fo=Nfs The multiplication factor can obtained by selecting proper scaling factor N of the counter. The above block diagram can also be used for frequency division by suitable modifications.
CIRCUIT USED
COMPONENTS USED
R1 = 20 K potentiometer R2 = 2 K R3 = 4.7 K R4 = 10 K C1 = 0.01F C2 = 10 F C3 = 0.01 F IC1 = NE565 IC2 = 7490 4-bit binary counter Q1 = 2N2222
WORKING OF THE CIRCUIT For the working of Frequency multiplier circuit the frequency divider is inserted between the VCO and phase comparator. Since the output of the divider is locked into the input frequency fIN, the VCO is actually running at a multiple of the input frequency. The desired amount of multiplication can be obtained by selecting a proper divide-by-N network, where N is an integer. For example, to obtain the output frequency fOUT = 5fIN, a divide-by-N = 5 network is needed. Figure 1-1 shows the function performed by a 7490 (4-bit binary counter) configured as a divide-by-5 circuit. In this figure, transistor Q1 is used as a driver stage to increase the driving capability of the NE565.
Frequency multipliers are extensively used communications circuits and frequency synthesizers.
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It may cost less to develop a lower frequency signal with lower power and more cost-effective devices then use a frequency multiplier chain in order to generate an output frequency in the microwave or millimetre wave range. Some modulation schemes can survive the nonlinear distortion without ill effects. Frequency multiplication can also be used in nonlinear optics. The nonlinear distortion in crystals can be used in order to generate harmonics of laser light.
IC-74LS90 (COUNTER)
General Description
Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the 74LS90. All of these counters have a gated zero reset and the 74LS90 also has gated set-to-nine inputs for use in BCD nines complement applications.To use their maximum count length (decade or four bit binary), the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate truth table. A symmetrical divide-by-ten count can be obtained from the 74LS90 counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA.
Features
Typical power dissipation 45 Mw Count frequency 42 MHz