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FEATURES
4000-VPK VIOTM, 560-VPK VIORM per IEC 60747-5-2 (VDE 0884, Rev 2) UL 1577, IEC 61010-1, IEC 60950-1 and CSA Approved 1/8 Unit Load Up to 256 Nodes on a Bus Meets or Exceeds TIA/EIA RS-485 Requirements Signaling Rates up to 1 Mbps Thermal Shutdown Protection Low Bus Capacitance 16 pF (Typ) 50 kV/ s Typical Transient Immunity Fail-safe Receiver for Bus Open, Short, Idle 3.3-V Inputs are 5-V Tolerant
DESCRIPTION
The ISO15 is an isolated half-duplex differential line transceiver while the ISO35 is an isolated full-duplex differential line driver and receiver for TIA/EIA 485/422 applications. The ISO15M and ISO35M have extended ambient temperature ratings of 55C to 125C while the ISO15 and ISO35 are specified over 40C to 85C. These devices are ideal for long transmission lines since the ground loop is broken to allow for a much larger common-mode voltage range. The symmetrical barrier of the device is tested to provide isolatlion of 4000 VPK per VDE and 2500 VRMS per UL and CSA between the bus-line transceiver and the logic-level interface. Any cabled I/O can be subjected to electrical noise transients from various sources. These noise transients can cause damage to the transceiver and/or near-by sensitive circuitry if they are of sufficient magnitude and duration. These isolated devices can significantly increase protection and reduce the risk of damage to expensive control circuits.
APPLICATIONS
Security Systems Chemical Production Factory Automation Motor/motion Control HVAC and Building Automation Networks Networked Security Stations
ISO15
DW PACKAGE
Vcc1 GND1 R RE DE D GND1 GND1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Vcc2 GND2 R nc RE B DE A D nc GND2 GND2
ISO35
DW PACKAGE
Vcc1 GND1 R RE DE D GND1 GND1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Vcc2 GND2 A B Z Y GND2 GND2
function diagram
3 4 5 6
GALVANIC ISOLATION
function diagram
GALVANIC ISOLATIO N
14 13 A B Z Y
13 12
B A
RE 5 DE
3 4
12 11
TEMP RATING 40C to 85C 40C to 85C 55C to 125C 55C to 125C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
UNIT V V V V mA kV kV V C
VCC1, VCC2
0.3 to 6 9 to 14 50 to 50 0.5 to 7 10 Bus pins and GND1 6 16 4 1 200 170 JEDEC Standard 22, Test Method A114-C.01 JEDEC Standard 22, Test Method C101 ANSI/ESDS5.2-1996 Bus pins and GND2 All pins
Voltage at any bus I/O terminal Voltage input, transient pulse, A, B, Y, and Z (through 100, see Figure 11) Voltage input at any D, DE or RE terminal Receiver output current Human Body Model
ESD
Electrostatic discharge
All pins
TJ (1) (2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values except differential I/O bus voltages are with respect to network ground terminal and are peak voltage values
SUPPLY CURRENT
over recommended operating condition (unless otherwise noted)
PARAMETER ICC1 ICC2 Logic-side supply current Bus-side supply current TEST CONDITIONS ISO35x and RE at 0 V or VCC, DE at 0 V, No load (driver disabled) ISO15x RE at 0 V or VCC, DE at VCC, No Load (driver enabled) ISO35x and RE at 0 V or VCC, DE at 0 V, No load (driver disabled) ISO15x RE at 0 V or VCC, DE at VCC, No Load (driver enabled) MIN TYP MAX 8 8 15 19 UNIT mA mA
Peak-to-peak common-mode output voltage See Figure 3 D, DE, VI at 0 V or VCC1 ISO15 See receiver input current VY or VZ = 12 V
IOZ
ISO35
VY or VZ = 12 V, VCC = 0 VY or VZ = 7 V VY or VZ = 7 V, VCC = 0
VA or VB at 7 V Short-circuit output current IOS COD CMTI Differential output capacitance Common-mode transient immunity VA or VB at 12 V
Propagation delay, high-level-to-high-impedance output Propagation delay, high-impedance-to-high-level output Propagation delay, low-level to high-impedance output Propagation delay, standby-to-low-level output
VI = 7 to 12 V, Other input = 0 V VA or VB = 12 V VA or VB = 12 V, VCC = 0 VA or VB = 12 V VA or VB = 12 V, VCC = 0 VA or VB = 7 V VA or VB = 7 V, VCC = 0 VIH = 2 V VIL = 0.8 V A, B VI = 0.4 sin (4E6t) + 0.5V, DE at 0 V
Propagation delay, high-impedance-to-high-level output Propagation delay, high-impedance-to-low-level output Propagation delay, high-level-to-high-impedance output Propagation delay, low-level to high-impedance output
GND1 VI
27 W A VA VB
VOD
B 27 W VOC
VI
GND1
GND2
IOB
VOC(PP)
VOC(SS)
VOA
VOC
Figure 3. Test Circuit and Waveform Definitions For The Driver Common-Mode Output Voltage
3V
VCC1
DE A D VOD RL = 54 W 1% CL = 50 pF 20%
VOD VI tPLH
50%
tPHL
50%
Input Generator
VI
B 50 W GND1
50% 10% tr
90%
90%
tf
VOD(H)
50% 10%
VOD(L)
Figure 4. Driver Switching Test Circuit and Voltage Waveforms NOTE: Driver output pins are A and B for the ISO15 (See Figure 1 through Figure 4). These correspond to ISO35 pins Y and Z
DE
Figure 5. Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
3V A 0V D B DE Input Generator CL = 50 pF 20% VI GND1 Generator: PRR = 500 kHz, 50% duty cycle, tr <6ns, tf <6ns, ZO = 50W 50 W GND2 CL includes fixture and Instrumentation capacitance VO S1 RL = 110W 1% VO VI tPZL 50% 3V 50% 50% 0V tPLZ 10% 5V VOL
Figure 6. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveform NOTE: Driver output pins are A and B for the ISO15 (SeeFigure 5 through Figure 6). These correspond to ISO35 pins Y and Z
IA V A R VA VA+ V B 2 VIC VB IB ID B VO IO
CL = 15 pF 20%
CL includes fixture and instrumentation capacitance
Input Generator
VI
50 W Generator: PRR = 500 kHz, 50% duty cycle, tr <6ns, tf <6ns, ZO = 50W
Figure 9. Receiver Enable Test Circuit and Waveforms, Data Output High
VCC R RE VO 1 kW 1% CL = 15 pF 20%
CL includes fixture and instrumentation capacitance
0V 1.5 V
A B
S1
Input Generator
VI
50 W
Generator: PRR = 500 kHz, 50% duty cycle, tr <6ns, tf <6ns, ZO = 50W
Figure 10. Receiver Enable Test Circuit and Waveforms, Data Output Low
0V RE A R B Pulse Generator 15 ms duration 1% duty cycle tr, tf <100 ns 100 W 1% + D
DE 3V Note: This test is conducted to test survivability only. Data stability at the R output is not specified.
RE GND 1 GND 2
V TEST
54 W
VOH or VOL
V TEST
DEVICE INFORMATION
Table 1. Driver Function Table
VCC1
(1)
VCC2
(1)
INPUT (D)
OUTPUTS B or Z L H Z Z L Z Z Z
PU PU PU PU PU PD PU PD (1)
PU PU PU PU PU PU PD PD
H L X X OPEN X X X
VCC2 PU PU PU PU PU PU PU PU PU PD
(1)
DIFFERENTIAL INPUT VID = (VA VB) 0.01 V VID 0.2 V < VID < 0.01 V VID 0.2 V X X Open circuit Short Circuit Idle (terminated) bus X X
OUTPUT ) H ? L Z Z H H H Z H
PACKAGE CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER (1) L(I01) L(I02) CTI Minimum air gap (Clearance) Minimum external tracking (Creepage) Tracking resistance (Comparative Tracking Index) Minimum Internal Gap (Internal Clearance) RIO CIO CI (1) Isolation resistance Barrier capacitance Input to output Input capacitance to ground TEST CONDITIONS Shortest terminal to terminal distance through air Shortest terminal to terminal distance across the package surface DIN IEC 60112 / VDE 0303 Part 1 Distance through the insulation Input to output, VIO = 500 V, all pins on each side of the barrier tied together creating a two-terminal device VI = 0.4 sin (4E6t) VI = 0.4 sin (4E6t) MIN 8.34 8.1 400 0.008 >1012 2 2 TYP MAX UNIT mm mm V mm pF pF
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board do not reduce this distance. Creepage and clearance on a printed circuit board become equal according to the measurement techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
(1)
REGULATORY INFORMATION
VDE Certified according to IEC 60747-5-2 Basic Insulation Maximum Transient Overvoltage, 4000 VPK Maximum Surge Voltage, 4000 VPK Maximum Working Voltage, 560 VPK File Number: 40016131 CSA Approved under CSA Component Acceptance Notice 5A 2500 VRMS rating per CSA 60950-1-07 and IEC 60950-1 (2nd Ed.) for products with working voltages 280 VRMS for basic insulation. File Number: 220991 UL Recognized under 1577 Component Recognition Program
10
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Characteristics table is that of a device installed in the JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages and is conservative. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.
THERMAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER JA JB JC PD (1) Junction-to-Air Junction-to-Board Thermal Resistance Junction-to-Case Thermal Resistance Device Power Dissipation VCC1 = VCC2 = 5.25 V, TJ = 150C, CL = 15 pF, Input a 20 MHz 50% duty cycle square wave TEST CONDITIONS Low-K Thermal Resistance (1) High-K Thermal Resistance MIN TYP MAX 168 96.1 61 48 220 UNIT C/W C/W C/W mW
Tested in accordance with the Low-K or High-K thermal metric definitions of EIA/JESD51-3 for leaded surface mount packages.
300 275 250
225 200 175 150 125 100 75 50 25 0 0 50 100 150 200 VCC1,2 at 3.6 V
TC - Case Temperature - C
11
180kW
Y and Z Outputs
1 MW
VCC1
R Output
4W Output 6.5W
12
IO - Output Current - mA
80 60
IO - Output Current - mA
-80
-60
-40
40 20 0 0 1 2 3 4 5 VO - Output Voltage - V
-20
0 0 1 2 3 4 VO - Output Voltage - V
40
ICC2 15
20
0
VCC = 3.3 V
10 ICC1 5
-20
-40
-60 -7
-4
-1
11
14
Figure 17.
Figure 18.
13
2.1
200
2 1.95 1.9 1.85 1.8 1.75 -55 105 TA - Free-Air Temperature - oC 125
2.05
150
100
50
Figure 19.
Figure 20.
14
= 1 +
1
CISO CIN
1 1 +
1 16
= 0.94
(3)
and 94% of VN appears across the barrier. As long as RISO is greater than RIN and CISO is less than CIN, most of transient noise appears across the isolation barrier. It is not recommend for the user to test equipment transient susceptibility with ESD generators, or consider product claims of ESD ratings above the barrier transient ratings of an isolated interface. ESD is best managed through recessing or covering connector pins in a conductive connector shell and installer training.
A, B, Y, or Z
CIN
RIN
16V
VN
CISO
RISO
15
REVISION HISTORY
Changes from Original (May 2008) to Revision A Page
Changed L(101) Minimum air gap (Clearance) From 7.7mm To 8.34mm. ........................................................................ 10 Deleted CSA information from the Regulatory Information Table. ..................................................................................... 10 Changed From 40014131 To 40016131 ............................................................................................................................. 10
Page
Changed From: 4000-Vpeak Isolation To: 4000-Vpeak Isolation, 560-Vpeak VIORM UL 1577, IEC 60747-5-2 (VDE 0884, Rev 2) ......................................................................................................................................................................... 1 Changed Figure 13, Full-Duplex Common-Mode Transient Immunity Test Circuit .............................................................. 8
Page
Added added IEC......Approved ............................................................................................................................................ 1 Added added CSA information column back in table ......................................................................................................... 10
Page
Changed Propagation delay values From: s To: ns in the DRIVER SWITCHING table .................................................... 3
Page
Added devices ISO15M and ISO35M to the data sheet ....................................................................................................... 1 Changed Description - From: The ISO15 and ISO35 are qualified for use from 40C to 85C. To: The ISO15M and ISO35M have extended ambient temperature ratings of 55C to 125C while the ISO15 and ISO35 are specified over 40C to 85C. .............................................................................................................................................................. 1 Added the Product Information table .................................................................................................................................... 1 Added Added Ambient Temp information in the RECOMMENDED OPERATING CONDITIONS table .............................. 2 Added ISO15M and ISO35M to the Operating junction temperature in the RECOMMENDED OPERATING CONDITIONS table ............................................................................................................................................................... 2 Changed the DRIVER ELECTRICAL table, IOZ High-impedance state output current - Test Condition VY or VZ = 12 V, VCC = 0 values From: TYP = -10 , MAX = - To: TYP = -, MAX = 90. .............................................................................. 3 Changed the DRIVER ELECTRICAL table, IOZ High-impedance state output current - Test Condition VY or VZ = 7 V values From: TYP = -, MAX = 90 To: TYP = -10, MAX = - ............................................................................................... 3 Added tr, tf limits for the ISO15M ans ISO35M devices ........................................................................................................ 3 Added IA or IB limits for the ISO15M ans ISO35M devices ................................................................................................... 4 Added pulse skew limits for the ISO15M ans ISO35M devices ........................................................................................... 4 Added tr, tf for the ISO15M ans ISO35M devices ................................................................................................................. 4 Added the Driver output pins Note for Figure 1 through Figure 4 ........................................................................................ 5 Changed the Driver output pins Note for eFigure 5 through Figure 6 .................................................................................. 6 Added Note 1 to Table 1 Driver Function Table ................................................................................................................... 9 Added Note 1 to Table 2 Receiver Function Table .............................................................................................................. 9 Changed Figure 19 - replaced curves ................................................................................................................................ 14 Changed Figure 20 - replaced curves ................................................................................................................................ 14
16
Page
Changed the FEATURES From: 4000-Vpeak 560-Vpeak VIORM per IEC....Rev 2) To: 4000-VPK VIOTM, 560-VPKVIORM, IEC 60747-5-2 (VDE 0884, Rev 2) ....................................................................................................................................... 1 Changed Description From: The symmetrical isolation......interface. To; The symmetrical isolation barrier of the device is tested to provide isolatlion of 4000 VPK per VDE and 2500 VRMS per UL and CSA between ....interface. ........... 1 Changed CTI From: 175 V To: 400 V ............................................................................................................................. 10 Changed the IEC Ratings table, Basic isolation group, specification from IIIa to II ........................................................... 10 Changed the Regulatory Information Table ........................................................................................................................ 10
17
www.ti.com
24-Jan-2013
PACKAGING INFORMATION
Orderable Device ISO15DW ISO15DWG4 ISO15DWR ISO15DWRG4 ISO15MDW ISO15MDWR ISO35DW ISO35DWG4 ISO35DWR ISO35DWRG4 ISO35MDW ISO35MDWR Status
(1)
Package Type Package Pins Package Qty Drawing SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC DW DW DW DW DW DW DW DW DW DW DW DW 16 16 16 16 16 16 16 16 16 16 16 16 40 40 2000 2000 40 2000 40 40 2000 2000 40 2000
Eco Plan
(2)
Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
Op Temp (C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -55 to 125 -55 to 125 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -55 to 125 -55 to 125
Top-Side Markings
(4)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR
ISO15 ISO15 ISO15 ISO15 ISO15M ISO15M ISO35 ISO35 ISO35 ISO35 ISO35M ISO35M
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 1
www.ti.com
24-Jan-2013
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Only one of markings shown within the brackets will appear on the physical device.
(4)
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
Device
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 330.0 330.0 16.4 16.4 16.4 10.75 10.75 10.75
Pack Materials-Page 1
Package Drawing DW DW DW
Pins 16 16 16
Pack Materials-Page 2
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