OperatingManualfortheSuskaIIICHardware

asTargetfortheRealization
ofRetroComputers

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HaveFun!

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JensCarroll
WolfgangFrster
InventronikGmbH2009

Revision History:
Rev. 1.0 07-2009: initial release, subject to change without notice.
Rev. 1.1 12-2009: minor enhancements.
Rev. 1.2 02-2010: IDE cable select infos.
Rev. 1.3 02-2010, IDE Cable Select Informations.
Rev. 1.4 06-2013, Changes concerning SYS-Config switch.

AtariisaregisteredtrademarkofInfogamesEntertainment
AmigaisaregisteredtrademarkofAmigaInc.

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TableofContents
Introduction:........................................................................................................................................................................................................ 9
ImportantNotice............................................................................................................................................................................................... 11
ConcerningthisDocumentation........................................................................................................................................................................ 11
InitialOperationoftheSystem.......................................................................................................................................................................... 12
ThePowerSupply...................................................................................................................................................................................... 12
ConnectionoftheminimalrequiredPeripheralDevices............................................................................................................................. 12
SystemConfiguration....................................................................................................................................................................................... 13
ConfigurationSwitchFLASH_OFFSET(SW1)........................................................................................................................................... 13
ConfigurationSwitchSCSI_ID(SW2)........................................................................................................................................................ 15
ConfigurationSwitchMST_Config(SW3)................................................................................................................................................... 16
ConfigurationSwitchSYSConfig(SW4).................................................................................................................................................... 16
SolderPadsSJ1andSJ2.......................................................................................................................................................................... 18
SolderPadsSJ3toSJ8.............................................................................................................................................................................. 19
SolderPadSJ9.......................................................................................................................................................................................... 20
DescriptionoftheSystem................................................................................................................................................................................. 21
TheSystemMicroController...................................................................................................................................................................... 21
ThePS/2MicroController.......................................................................................................................................................................... 22
TheSDCardMicroController.................................................................................................................................................................... 24
TheFieldProgrammableGateArray(FPGA)............................................................................................................................................. 24
IPCoreintheFPGA.................................................................................................................................................................................. 25
EthernetDeviceDP83848C....................................................................................................................................................................... 26
USBControllerMAX3421E........................................................................................................................................................................ 26
VideoDACADV7125KST50....................................................................................................................................................................... 26
AudioDACAD5302.................................................................................................................................................................................... 26
AudioCodecCS4299................................................................................................................................................................................. 26
FurtherAudioHardware............................................................................................................................................................................. 27
RealTimeClockDS1392........................................................................................................................................................................... 27
PushbuttonsandOperationDisplays............................................................................................................................................................... 27
DescriptionoftheInterfaces............................................................................................................................................................................. 29
InterfaceslocatedattheFront.................................................................................................................................................................... 29
InterfacesontheleftHandSideofthePCB.............................................................................................................................................. 29
InterfacesontherightHandSideofthePCB............................................................................................................................................ 29
InterfacesontheBackSideofthePCB..................................................................................................................................................... 30
InterfacesonTopoftheBoard................................................................................................................................................................... 30
SystemModifications........................................................................................................................................................................................ 32
LoadingtheOperatingSystemviatheBootloaderMechanism.................................................................................................................. 32
LoadingtheOperatingSystemviaSDCard(currentlynotimplemented)................................................................................................. 33
LoadingtheFPGAIPCore........................................................................................................................................................................ 33
LoadingtheFPGAIPCoreviaSDCard(currentlynotimplemented)........................................................................................................ 33
LoadingtheFPGAIPCoreviatheActiveSerialInterface........................................................................................................................ 35
LoadingtheFPGAIPCoreviaJTAG......................................................................................................................................................... 36
ProgrammingFirmwaretotheMicroControllers........................................................................................................................................ 37
Appendix1:TerminalAssignmentsoftheConnectors...................................................................................................................................... 38
I2CX2........................................................................................................................................................................................................ 38
ACSIX4...................................................................................................................................................................................................... 39
SCSIX5..................................................................................................................................................................................................... 40
IDEX7:StandardAssignment.................................................................................................................................................................... 41
(ConnectortypeonthePCB:MA222_RM2fromSamtec)........................................................................................................................ 41
VGAX8....................................................................................................................................................................................................... 41
AtariVideoX9............................................................................................................................................................................................ 42
SpeakerX17............................................................................................................................................................................................... 42
GPOX18.................................................................................................................................................................................................... 42
MIDIX19.................................................................................................................................................................................................... 42
MIDIInX20................................................................................................................................................................................................ 43
MIDIOutX21............................................................................................................................................................................................. 43
ROMSelectsX22....................................................................................................................................................................................... 43

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AtariKBDX23............................................................................................................................................................................................ 44
AUX1X24................................................................................................................................................................................................... 44
Joyport2X25............................................................................................................................................................................................. 44
Joyport1X26............................................................................................................................................................................................. 45
ExtensionX27;(ConnectortypeonthePCB:TML132fromSamtec)....................................................................................................... 46
RomPort(Cartridge)X28;(ConnectortypeonthePCB:TML120RAfromSamtec)................................................................................48
FloppyDiskX29......................................................................................................................................................................................... 49
PrinterPortX30.......................................................................................................................................................................................... 49
RS232X31................................................................................................................................................................................................. 50
ALARMX32................................................................................................................................................................................................ 51
AUX2X33................................................................................................................................................................................................... 51
EthernetX34............................................................................................................................................................................................... 51
AUX3X36................................................................................................................................................................................................... 52
PS2MOUSEX37....................................................................................................................................................................................... 52
PS2_DebugX39........................................................................................................................................................................................ 52
PS2KBDX40............................................................................................................................................................................................ 53
SDC_DebugX43........................................................................................................................................................................................ 53
LCDX44..................................................................................................................................................................................................... 53
AUXUSBX45............................................................................................................................................................................................ 54
SYSCTRL_DebugX47............................................................................................................................................................................... 54
PowerX48.................................................................................................................................................................................................. 54
Appendix2:KeyboardScanCodes/TranslationTable.................................................................................................................................... 55
Appendix3:MegaSTEConfigurationSwitch................................................................................................................................................... 57
Appendix4:Schematics................................................................................................................................................................................... 57
Appendix5:BoardLayouts.............................................................................................................................................................................. 58
Appendix6:Literature...................................................................................................................................................................................... 60
Appendix7:WebLinks..................................................................................................................................................................................... 60

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IndexofTables
Table1:AddressOffsetsoftheFlashMemory................................................................................................................................................. 15
Table2:AssignmentoftheI2CInterfaceX2.................................................................................................................................................... 39
Table3:AssignmentoftheACSIInterfaceX4................................................................................................................................................. 40
Table4:AssignmentoftheSCSIInterfaceX5.................................................................................................................................................. 41
Table5:AssignmentoftheVGAconnectorX8................................................................................................................................................ 42
Table6:AssignmentoftheAtariVideoConnectorX9...................................................................................................................................... 43
Table7:AssignmentoftheMIDIPlugX19....................................................................................................................................................... 43
Table8:AssignmentoftheMIDIInPlugX20................................................................................................................................................... 44
Table9:AssignmentoftheMIDIOutPlugX21................................................................................................................................................ 44
Table10:AssignmentoftheROMSelectsConnectorX22.............................................................................................................................. 44
Table11:AssignmentoftheAtariKeyboardConnectorX23............................................................................................................................ 45
Table12:AssignmentoftheAUX1InterfaceX24............................................................................................................................................. 45
Table13:AssignmentoftheJoyport2InterfaceX25........................................................................................................................................ 45
Table14:AssignmentoftheJoyport1InterfaceX25........................................................................................................................................ 46
Table15:AssignmentoftheExtensionConnectorX27.................................................................................................................................... 48
Table16:AssignmentoftheCartridgeConnectorX28.................................................................................................................................... 50
Table17:AssignmentoftheFloppyConnectorX29......................................................................................................................................... 50
Table18:AssignmentofthePrinterPortX30................................................................................................................................................... 51
Table19:AssignmentoftheConnectorfortheserialInterfaceX31................................................................................................................. 51
Table20:AssignmentoftheRTCAlarmConnectorsX32................................................................................................................................ 52
Table21:AssignmentoftheAUX2InterfaceX33............................................................................................................................................ 52
Table22:AssignmentoftheEthernetPlugX34............................................................................................................................................... 52
Table23:AssignmentoftheAUX3InterfaceX36............................................................................................................................................ 53
Table24:AssignmentofthePS/2MouseConnectorX37................................................................................................................................ 53
Table25:AssignmentofthePS/2MicroControllerDebuggingInterfaceX39................................................................................................. 53
Table26:AssignmentofthePS/2KeyboardPlugX40.................................................................................................................................... 54
Table27:AssignmentoftheSDCMicroControllerDebuggingConnectorX43...............................................................................................54
Table28:AssignmentoftheLCDInterfaceX44.............................................................................................................................................. 54
Table29:AssignmentoftheAUXUSBInterfaceX45...................................................................................................................................... 55
Table30:AssignmentoftheSYSMicroControllerDebuggingInterfaceX47.................................................................................................. 55

IndexofFigures
Figure1:TheheartoftheSuskaIIIC:CycloneIIFPGAdevice........................................................................................................................ 9
Figure2:SuskaIIICPrintedCircuitBoard(PrototypewithsmallDifferencestotheSeries)...........................................................................10
Figure3:RightHandSideofSuskaIIICwiththeDCPlug(lefttothecenter)................................................................................................ 12
Figure4:BacksideofSuskaIIIC,theoriginalMonitorPlugisoptional........................................................................................................... 13
Figure5:FlashMemorywithConfigurationSwitchSW1.................................................................................................................................. 14
Figure6:ConfigurationSwitchSW2"SCSIID"................................................................................................................................................ 15
Figure7:ConfigurationSwitchSW3(MeetstheswitchoftheMegaSTEs).................................................................................................16
Figure8:SelectionSwitchforgeneralSystemSettings................................................................................................................................... 18
Figure9:SolderPadsSJ1andSJ2onthePCB'sSolderSide........................................................................................................................ 18
Figure10:SolderPadsSJ3toSJ8onthePCB'sSolderSide......................................................................................................................... 19
Figure11:SolderPadSJ9onthePCB'sTopSide........................................................................................................................................... 20
Figure12:TheSystemMicroController............................................................................................................................................................ 21
Figure13:DerPS2MicroController................................................................................................................................................................. 23
Figure14:TheSDCardMicroController.......................................................................................................................................................... 24
Figure15:PushbuttonsofSuskaIIIC.............................................................................................................................................................. 27
Figure16:FrontViewofSuskaIIIC................................................................................................................................................................. 28
Figure17:SuskaIIICViewfromtheleft.......................................................................................................................................................... 29
Figure18:SuskaIIICViewfromtheright........................................................................................................................................................ 30
Figure19:SuskaIIICViewtotheBackSide................................................................................................................................................... 30
Figure20:ConnectingaUSBBlastertotheActiveSerialInterface................................................................................................................. 35
Figure21:ConfigurationInterfaceJTAG(left)andActiveSerialProgrammingInterface.................................................................................36
Figure22:ConnectingtheAVRProgrammertoSuskaIIIC............................................................................................................................ 37
Figure23:SuskaIIICTopViewPCBLayout................................................................................................................................................... 58
Figure24:SuskaIIICBottomViewPCBLayout............................................................................................................................................. 59

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Introduction:
SuskaIIICisauniversaldigitalelectronicdevicebasedonaCycloneIIFPGA(FieldProgrammableGateArray)manufactured
bytheAlteracorporation.ThedevicetypeisEP2C35F484(1).TheFPGAcanbeunderstoodasauniversalconfigurabledigital
electronicdeviceandisthereforetheheartofSuskaIIIC.Theboardisreconfigurablehardwarethatallows,inprinciplethe
creationofelectronicdeviceswithverydifferentfeatures.InparticulartheSuskaIIICboardwasdevelopedasanAtari

Figure1:TheheartoftheSuskaIIIC:CycloneIIFPGAdevice

ST/STEcompatiblecomputer.AllinterfacesoftheoriginalAtarimachinesareavailableontheSuskaIIICandthere
areinterfacesforeseentoallowtheuseofmodernperipheraldevicessuchasUSBorCFcardmemory.The
followingpresentationismadewithrespecttotheuseofthishardwareasanAtariST/STEcompatiblecomputer.
Init'scurrentversionoftheSuskaIIICIPcore,theoperatingsystemsTOS1.00,TOS1.04,TOS1.62,TOS2.05,TOS2.06and
emuTosaretestedandworking.TOS1.02isnotworkingduetothehighprocessingspeedoftheIPcore.Asshownin2the
completeelectronicdesignconsistsoftheFPGAdeviceinthemiddleofthepicture,oftheSDRAMlefttotheFPGA,ofthe
operatingsystemFlashdevicetotherightoftheFPGA,someotherelectronicdevicesandlastbutnotleastahighnumberof
interfaceconnectors.
ThephilosophybehindSuskaistorealizeelectronicmodulesorfunctionsinsidetheFPGAwhereveritispossible.Todothis,
thepartsoftheelectroniccircuitsaredescribedabstractlyusinganappropriatestandardlanguage.ThecompleteSuska
project,meansalllogicmodulesiswrittenVHDL(VeryHighSpeedintegratedCircuitsHardwareDescriptionLanguage).These
descriptions,roughlyspeakingaretranslatedbyacompilertoaconfigurationfilewhich,oncedownloadedtotheFPGA,
providesthefunctionality.NearlyallpartsoftheAtariSTorSTEcomputersareprovidedasopensourcedescriptions;named
IPcores,whereIPstandsforIntellectualProperty.Themostrecentversionareavailablefordownloadatwww.experiment
s.de.

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FunctionswhichcouldnotberealizedintheFPGA,likedigitalanalogconversion,theaudiocodec,thesystemmemory,analog
devicesorthepowermanagementareequippedasdiscreteintegratedcircuitsontheSuskaIIICboard.

Figure2:SuskaIIICPrintedCircuitBoard(PrototypewithsmallDifferencestotheSeries)

SuskaIIICalsofeaturesaverylowpowerconsumptionandhasexcellentoperationusingrechargeablebatteries.All
differentoperationvoltagesareprovidedonboardfromasingle7VDCto12VDCsupply.Thethreemainpower
suppliesarelocatedontherighthandoftheFPGAabovetheFlashdeviceashownin2.Thehardwareisan8layer
printedcircuitboardwithaformfactorof234*140mm.TheoverallheightisgivenbytheoriginalAtariSSTmonitor
plugandmeasures27mm.
BesidestheAtariST/STEcomputersitispossibletoimplementotherapplicationslikeAmigarelevantcomputer
clones,asanexample.ThefinaldecisionregardingtheFPGAandit'sinterfaceswasmadewithaneyetocreating
themostflexiblehardwarepossible.AcleardifferencebetweenSuskaIIICandthemajorityofFPGAdevelopment
boardsavailableonthemarkettoday.
EquippingSuskaIIICwithaslimoperatingsystem(MINT)tohighlightatrendintheinteractionbetweenhardware
andsoftwareisunderconsideration.Thankstoalargevarietyofinterfaces,theboardwouldthenbesuitablefora
hugenumberofcontrolapplications.

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ImportantNotice
TheSuskaIIIChardwareisintendedforapowersupplyvoltageof7VDCto12VDC.Pleaseuseonlyonly
powersuppliessuitableforthisapplicationandwiththenecessaryapprovals.Donotexceedtheabsoluteparameters
fortheoperatingvoltage;pleaserefertothe'TechnicalData'.Pleaseavoidareversepolarity.Formoreinformationon
thisrefertoparagraph.
Onthe8layerprintedcircuitboardsaredeviceswithsmalldimensionsandfiligreestructures.Pleasetakeabsolute
carenottoapplymechanicalstresstotheprintedcircuitboardforexamplebybending,torsionorstrongforcestoany
connectors.NotrespectingthispointcanleadtoirreparablecontactfailuresoftheFPGA.
Takecarewheninsertingprogrammercablestotheconnectorsonthetopoftheprintedcircuitboards.Itis
recommendedtosupporttherespectiveconnectorsonthesoldersideofthePCBtoavoidmechanicalstress.
Pleasebesuretousetheprintedcircuitboard(withoutacase)onanisolatedsurfaceandremovesmallparticleslike
tin,wiresorpaperclipswhichcouldleadtoshortcircuits.

ConcerningthisDocumentation
Thesystem'spropertiesasdescribedinthisdocumentationdependontheimplementationofthehardwareinthe
FPGA.Becausethemodelofthehardwareisopensource,thefollowingdescriptiondoesnotclaimafaultfree
system.
ErrorcorrectionsandenhancementsofthefunctionalityareavailablethroughasimpleupdateoftheFPGA
configuration.EspeciallywhenthereisactivedevelopmentwithnumerousupdatesoftheFPGA,itispossiblethatthe
systemisrunningmoreorlessstabledependingonthesuccessofthecompilationandthefittingprocess.The
reasonforsuchinstabilitiesisthetimingbehavioroftheFPGAimplementationitself.Theprintedcircuitboardandnot
responsibleforsucheffects.
ThemanufactureroftheSuskaIIIChardwarewillnotgiveaguaranteeforanycompilationsofIPcores.Inventronik
GmbHseekstoprovidestableIPcoreupdatesinformofconfigurationfiles.

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InitialOperationoftheSystem
TooperatetheSuskaIIIChardware,therearesomeprerequisitesnecessaryasdescribedinthefollowing
paragraphs.Thedescriptiongivenisarequiredminimum.

ThePowerSupply
SuskaIIICisoperatedfromapowersupplyof7VDCbis12VDC.Useforexampleawallcubeadapterwithacurrent
ofabout1.5A.Connectittothepowersupplyplugontherighthandoftheprintedcircuitboard3.Thepositive
terminalisthecenterpinofthepowersupplyconnector.

Figure3:RightHandSideofSuskaIIICwiththeDCPlug(lefttothecenter).

SuskaIIICisprotectedagainstreversepolarity.ThiscanleadtoameltedfuseF1(2,5AT)onthePCB.Replacethis
ifrequiredagainstanidenticaltype(ShurterOMT2,5A/125V).

ConnectionoftheminimalrequiredPeripheralDevices
TousetheSuskaIIIChardwareasAtariSTEcompatiblecomputercloneitisrequiredtoconnectakeyboard,a
monitorand,whereappropriate,afloppydiskdrive.
ThechoiceforthekeyboardiseitheranoriginalMegaSTEorMegaSTtypeoraPS/2version.Itisnotpossibleto
usebothkeyboardsatthesametime.Thekeyboardisconnectedtoit'srespectiveinterface,fortheoriginalAtari
keyboardsthisistheWesterntypeconnectorrighttothepowersupplyandforthekeyboarditisthepurplePS/2type
connector.Alsoforthemonitorstherearedifferentchoices:EitheroriginalAtarimonitorsSM124,SC1225orothers
whichareconnectedtotheoriginal13positionconnectorinthemiddleofthebacksideofthePCBorontheother
handVGAcompatiblemonitorsorTFTsconnectedtotheVGAbesidestheAtarimonitorconnector(see4).

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Pleasebeaware,thatthesupportfortheoriginalmonitorsisgiveninanycase.Duetotheverylimitedavailabilityof
theAtarimonitorconnectorsandtheoptionalmountingofthe13positionAtariplugitmightbenecessarytoequipthe
SuskaIIICPCBlaterwithsuchadevice.SatisfactoryuseofVGAcompatiblemonitorsorTFTs,willdependonthe
frequenciesthemonitorcanhandle.
TheSuskaIIICIPcoreisalreadyequippedwithadditionalvideomodescapableofdrivingTFTsorCRTs.Further
enhancementswillbeavailablebyconfigwareupdates.

Figure4:BacksideofSuskaIIIC,theoriginalMonitorPlugisoptional.

Thefloppydiskdriveisconnectedviaa'highdensity'DSUBconnectorwithSuskaIIIC.Itisthesecondconnectorto
therightasshownin4.Theterminalassignmentoftheconnectorcableisgivenintheappendixofthis
documentation.

SystemConfiguration
BecausethecompleteAtaricompatibleIPcoreisrealizedintheFPGA,enhancementsbeyondtheoriginal
functionalityareeasy.Topreservethecompatibilityandtoactivateordeactivatespecialfeatures,itispossibleto
configureswitchesorsolderpadsontheprintedcircuitboard.
Theswitchesareusedforsystemconfigurationswhichmaychangefromtimetotime.Thesolderpadsarefor
configurationoffeatureswhichaccompanydifferentversionsofmicrocontrollerfirmwareorFPGAconfigurationsand
arechangedonlyonceorseldom.
Attention:switchofftheSuskaIIICanddisconnectitfromthepowersupplytoopenorclosethesolderpads.

ConfigurationSwitchFLASH_OFFSET(SW1)
TheFlashdeviceusedontheSuskaIIIChardwarehas64MBitoffreememory,whicharearrangedin4MWords 16.
Whilethelower524288Words16areaddressablebytheFPGA,TheupperaddresslinesA19toA21oftheFlash
deviceareconnectedtotheconfigurationswitch(switchposition2to4).Theswitchposition1ofSW1isnotused,
see5,(ontherighthandofthepicture,thereislocatedthe'Shurter'fuseF1).Inthisway,thedifferentswitch
positionslocatespecialaddressrangesasgiveninthefollowingtable.

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Switch2 Switch3 Switch4 Adress

Offset
Off

Off

Off

0x000000

Off

Off

On

0x080000

Off

On

Off

0x100000

Off

On

On

0x180000

On

Off

Off

0x200000

On

Off

On

0x280000

On

On

Off

0x300000

On

On

On

0x380000

Table1:AddressOffsetsoftheFlashMemory

Apracticalapplicationofthisfeatureistheselectionofdifferentoperatingsystemswhicharelocatedatthe
respectiveaddressboundaries.FormoreinformationrefertotheparagraphsLoadingtheOperatingSystemviathe
BootloaderMechanismorLoadingtheOperatingSystemviaSDCard.

Figure5:FlashMemorywithConfigurationSwitchSW1.

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ConfigurationSwitchSCSI_ID(SW2)
SW2has4Switches.TheSCSIIDoftheSCSIhostcontrollerisselectablebytheswitches1to3.Thearrangement
ischoseninawayresultinginabinaryrepresentation.Anexample:1=On,2=Off,3=OffreferstotheSCSIID4.
Switchnumber4isintendedtoswitchthePS/2functionality.RefertotheparagraphThePS/2MicroControllerfor
moreinformation.
Thepositionoftheswitchisgivenin6.

Figure6:ConfigurationSwitchSW2"SCSIID"

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ConfigurationSwitchMST_Config(SW3)
ThefunctionofSW3isidenticaltothe8positionswitchwhichcanbefoundinoriginalMegaSTsandisintendedfor
generalsystemconfiguration.BecauseofthehighdegreeoffreedomconcerningthedevelopmentoftheSuskaIIIC
IPcoreinconjunctionwiththeFPGAandtheresultingnumerous'selectionfree'improvementsovertheoriginal
machines,currentlythisswitchismostlynotused.Itisintendedforfutureuse.
OneexceptionexistsfornewerTOSversionswhichusetheswitchnumber7toindicatewhetherDDorHDfloppy
diskdrivesareused.If'on'theoperatingsystemhandlesHDfloppydiskdrivesotherwiseDDtypes.Onecanseethis
inthedialogboxoftheformattingroutinewhichshowstheadditionalentry'HighDensity'whenHDdrivesare
selected.
TheIPcoreisinthispointanimprovementovertheoriginalhardware.TheHDinformationisnotindicatedtothe
floppydrivebutindicatedbythefloppydrive.Sosettingswitchnumber7islessimportant.Formattingfloppiescan
sometimesleadtobetterresultswhenusedinconjunctionwiththeoption'HighDensity'forHDtypefloppiesthanksa
betterselectionofsteppingratesforthedrivesprovidedbytheoperatingsystemdependingonthesettingonswitch
7.HDtypefloppieswhichareformattedwithouttheoption'HighDensity'show726Koffreediskspace.Thisisa
faultyinformation.HDtypefloppiesalwayshaveacapacityof1,44MBafterformatting.Moreinformationconcerning
theconfigurationswitchSW3canbefoundintheAppendix3:MegaSTEConfigurationSwitch.

Figure7:ConfigurationSwitchSW3(MeetstheswitchoftheMegaSTEs).

ConfigurationSwitchSYSConfig(SW4)
ThisswitchprovidessixselectionswitcheswhichareusedbytheSuskaIIICIPcoreasfollows(formoreinformation
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refertotheIPcoresourcecode):
Switch1:
Selectsthesystemspeed.WhileoriginalSTsaredrivenwithaCPUclockof8MHz,theSuskaIIICIPcoreisdriven
withaCPUclockof16MHz.Thisisnecessarytoprovidethecorrectvideobandwidthformultisyncmonitors.The
highfrequencyleadstoincompatibilitieswithsoftwarewhichforexampleimplementstimedelaysinNOPloops.Also
affectedaretheoldTOSversions1.00,1.02and1.04.Settingthisswitchto'1'reducestheCPUspeedresultingin
bettercompatibility(unfortunatelynot100%).
Switches2and3:
Thesetwoswitchesareintendedtoselectenhancedvideomodes.Dependingontheconnectedmonitortypethe
selectionareforexample'legacymode'fortheoriginalAtarimonitors(bothswitchesoff),themultisyncmodesand
themultisyncmonochromemode(bothswitcheson).Playaroundwiththesettingstofindthebestresult.
Switch4:
ThisswitchselectstheavailablememoryusedbytheIPcore.'Off'means4MBmemorylikeinSTsorSTEsand'On'
means14MBmemoryusedintheFalcon.
Switch5:
ForthecompatibilitytooriginalST(E)machines,thesettingACSIinterfaceactivemustbeselected(switchisoff).If
theswitchisinposition'ON',ACSIisdeactivatedandtheACSItoSCSIconversionviatheACSItoSCSIbridgeis
active.Inthiscase,theSCSIinterfaceisinoperation.SincetheIPCoreversion2K13Athisswitchisnotused
anymore.TheACSIandtheSCSIinterfacecannowbeusedsimultaneously.
Switch6:
Thisswitchselectsthebaseaddressfortheoperatingsystem.Switchedoff,thebaseaddressis0x00FCxxxxand
thereforesuitablefortheoperatingsystemsTOS1.00bisTOS1.04.ForTOS1.62,TOS2.05,TOS2.06andemuTos
thebaseaddress0x00E0xxxxmustbeselectedbyswitchingS6on.

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Figure8:SelectionSwitchforgeneralSystemSettings

SolderPadsSJ1andSJ2
TheMIDIinterfaceisconnectedtoa6850compatibleACIA(AsynchronousCommunicationInterfaceAdapter)which
isimplementedasIPcoreintheFPGA.IthasinputsfortheClearToSend(CTSn)andtheDataCarrierDetect
(DCDn)Signals.ThesearenotusedinoriginalSTmachinesandthereforeconnectedtoGND.Openingthesesolder
padsgivesthefreedomtointroduceenhancementstotheIPcoreoroperatingsystemswhichusethesesignals.
Thetwosolderpadsareclosedbydefaultsee9.Theexactlocationofthesesolderpadscanbetakenfromthe
layoutofthesoldersideoftheprintedcircuitboardintheappendix.

Figure9:SolderPadsSJ1andSJ2onthePCB'sSolder
Side.

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SolderPadsSJ3toSJ8
ThecolorgraphicmodesoftheSTEsallowamaximumof4bitspercolor.TheSuskaIIIChardwareusesavideo
ADconverterwith8bitspercolor.ThetwoleastsignificantbitsD1andD0areconnectedtoGNDforeachcolorand
therespectivefourmostsignificantbitsD7toD4areconnectedtothegraphicscontrolleroftheSuskaIIICIPcore.
ThebitsD3andD2canbeconnectedviathesolderpadsalternatively.ConnectedtoGNDresultsinacolor
resolutionlikeinSTEmachineswith4bitsresultinginamaximumof4096differentcolors.Connectedto
XFF827E_D7toXFF827E_D2,comingfromtheFPGA,thecolorresolutionis,inprinciple,6bitsresultingin262144
differentcolors.
Tousethisfeature,itisnecessarythattheIPcoreprovideenhancedvideomodeandthesignalsXFF827E_D7to
XFF827E_D2,whichrefertotherespectiveSTBookregisterarenotavailableoutsidetheFPGA.Seealsothewiring
ifIC39(systemmicrocontroller),X33(Aux2connector)andIC37(SDcardmicrocontroller).10Showsthelocationof
thesolderpads.Thedetailednotationcanbetakenfromthelayoutofthesoldersideoftheprintedcircuitboardin
theappendix.
Figure10:SolderPadsSJ3toSJ8onthe

PCB'sSolderSide

Thesolderpadsareareallconnectedinposition12bydefault.

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SolderPadSJ9
TheSDcardmicrocontroller(IC37)isintendedprimarilyforprogrammingtheFPGAbootdeviceorcopyingan
operatingsystemimagetotheFlashmemory.Init'snonconfiguredconditiontheFPGAprovidesnofunctionalityso
theSDcardmicrocontrollermustbedrivenwiththe4MHzclockonthePS/2microcontrollerasthisdoesnotrelyon
theFPGA.
OncetheFPGAiscorrectlyconfigured,thesignalSDC_AVR_CLKcanbeconnectedtotheSDcardmicrocontroller
byclockingSJ9.InthiswayanydesiredclockfrequencycanbeusedforIC37.Theclockfunctionalityfor
SDC_AVR_CLKmustbeprovidedbyanappropriateIPcoremodule.
TheFPGAI/Opadsarehighimpedantinthecaseofanonconfigureddevice,sotheSDcardmicrocontrollercanbe
drivenwiththe4MHzPS/2microcontrollerclock,evenifSJ9isclosed.Inthatcase,theclockcomesfromtheSD
cardmicrocontrollerviatheresistorR295.IftheclockcomesfromtheFPGA,thedriverstrengthoftherespectiveI/O
padsontheFPGAissufficienttodrivetheclockagainstR295.InthecaseofamalfunctionofSDC_AVR_CLK,itis
notpossibletoreconfiguretheFPGA'sbootdevicefromtheSDcardmicrocontrollerbecausetheclockismissing.A
workaroundistoopenSJ9ortoconfiguretheFPGAviatheActiveSerialInterfaceusingaprogrammer.

Figure11:SolderPadSJ9onthePCB'sTopSide.

ThesolderpadSJ9isopenbydefault.

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DescriptionoftheSystem
TheSystemMicroController
SuskaIIICisequippedwithasystemcontrollerwhichtracksoperatingconditionandpowerconsumption.This
functionsareimplementedinthesystemmicrocontrollerIC39in12,whichisoperatedfromastandbypowersupply.
Oneofit'stasksistosupervisetheresetbuttons(seealsotheparagraphconcerningsystemreset),toswitchthe
differentpowersuppliesofSuskaIIIC,andtoloadthevariousoperatingsystemsviaabootloadermechanism.

Figure12:TheSystemMicroController.

fromaPCtotheFlashmemory.AdetaileddescriptionofthisfeaturecanbefoundintheparagraphLoadingthe
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OperatingSystemviatheBootloaderMechanism.
BetweenIC39andtheFPGAthereareseveralsignalsintendedforfutureuse.Moreinformationcanbefoundinthe
schematicsofSuskaIIIC.ThismicrocontrollerisadditionallyequippedwithaninterfaceAuxUSB(X45).Itcanfor
examplebeusedtocommunicatewithUSBdevicesifthemicrocontrollersoftwaresupportsthisfunctionality.IC39is
programmedviatheinterfaceISP_SYSCTRL(X46)andhasatheoptiontooutputdebugginginformationviathe
interfaceSYSCTRL_DEBUG(X47).
Forprogrammingthemicrocontrollerandexchangingdebugginginformationthereareappropriateprotocoladapters
available.DetailedinformationconcerningtheprogrammingaredescribedinparagraphProgrammingFirmwareto
theMicroControllers.Formoreinformationconcerningtheprotocoladaptersrefertotheusermanualsofeach
respectiveproduct.

ThePS/2MicroController
Asecondmicrocontroller(IC36)providesthefunctionalityofakeyboardcontroller.ItisnotprovidedintheIPcore
becauseitwasabuiltincomponentoforiginalST(E)orMegaST(E)keyboards.ThiscontrollerdetectsPS/2
keyboardsandmiceandprovidesthecorrectinformationfortheACIAIPCoreintheFPGA,andallowsaprotocol
compatibletooriginalAtarikeyboards.Inthisway,PS/2devicescanbeusedwithoutchangestosoftwareor
operatingsystem.
BecausemodernkeyboardshavealittlebitdifferentlayoutasAtaridevices,therearosetheneedtoatranslateafew
keys.AtableintheAppendixgivesinformationaboutthesechanges.
UseofPS/2keyboardandmousedoesresultinthelackofthemouseandjoystickconnectors.Themouseis
replacedandnoproblem,butadditionalhardwareisstillnecessaryforajoysticktobeconnected.Abridgeadapter
tohandlethetranslationofthejoystickinformationisavailablefromInventonikGmbHandcaneasilybeconnected
throughtheAUX3interface(X36)ofthePS/2microcontroller.

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Figure13:DerPS2MicroController.

ThetwobuttonsSW5andSW6areconnectedtotheportpinsPD6andPD7ofIC36.Theyareintendedforgeneral
futureenhancementsandrequirechangestothesoftwareofthePS/2microcontrollerandpossiblytotheSuskaIIIC
IPcore.
TheportpinsPC4andPC5areconnectedtothetwoLEDs'Keyboard'and'Mouse'andallowasignalingoftheshift
lockkeyandthedetectionofamouse.IC36isconfiguredbyconnectingaprogrammertotheinterfaceISP_PS2
(X38)andhasadebugginginterfacePS2_DEBUG(X39).
Forprogrammingofthemicrocontrollerandtheexchangeofthedebugginginformationthereareappropriate
protocoladaptersavailable.Detailedinformationconcerningtheprogrammingaredescribedinparagraph
ProgrammingFirmwaretotheMicroControllers.Formoreinformationconcerningtheprotocoladaptersrefertothe
usermanualsoftherespectiveproducts.
Theswitch4oftheSCSI_ID(SW2)configurationswitchiscurrentlynotused.Originallyitwasintendedtoenable
thePS/2functionality.Usingan'intelligent'microcontrollersoftwaremakestheuseofthisswitchunnecessary.
Hencetheswitchisusefulforgeneralpurposeuseinvolvedwithenhancementsofthemicrocontrollerfirmware.

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TheSDCardMicroController
TheSDcardmicrocontroller(IC37)providesthecommunicationbetweentheFPGAansSDcards(X41).Primarily
thiscontrollerisusedtocopyoperatingsystemimagestotheFlashmemoryortoupdatetheFPGA'sbootdevice.It
isrequired,thattheimagefilesarelocatedontheSDcard.Thisfunctionalityisintendedforasimplemaintenanceof
SuskaIIICwithouttheneedofaprogrammingadapter.
TheenhancementsoftheIPcoreandthesoftwareoftheSDcardmicrocontrollerareinprogressandwillprobably
bereleasedwiththenextversionoftheSuskaIIICIPcore.
PB0ifIC37iscapableofdrivingtheLED'SDC',whichsignalscommunicationwiththeSDcard.IC37isprogrammed
viatheinterfaceISP_SDC(X42)andhasadebugginginterfaceSDC_DEBUG(X43).
Forprogrammingofthemicrocontrollerandtheexchangeofthedebugginginformationthereareappropriate
protocoladaptersavailable.Detailedinformationconcerningtheprogrammingaredescribedinparagraph
ProgrammingFirmwaretotheMicroControllers.Formoreinformationsconcerningtheprotocoladaptersrefertothe
usermanualsoftherespectiveproducts.

Figure14:TheSDCardMicroController.

TheFieldProgrammableGateArray(FPGA)
TheSuskaIIIChardwarecomeswithanAlteraFPGA.ItisaCycloneII,typeEP2C35F484ina484pos.ballgrid
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case.ThisdeviceisresponsibleforprovidingthemainfunctionalityoftheAtaricompatibleSuskaboard.TheIPcore
featuringaSTEmachineusesabout20.000ofthetotalavailable35.000logicelementsoftheFPGA.Sothereis
enoughspaceinthechipforfurtherenhancements.Thedigitallogic,implementedintheFPGAcanbechangedby
reconfigurationoftheIPcore.FormoreinformationrefertotheparagraphLoadingtheFPGAIPCore.

IPCoreintheFPGA
TheSuskaIPcoreistcompletelywritteninVHDL(VeryHighSpeedIntegratedCircuitsHardwareDescription
Language),asthislanguageisbestsuitedfortheabstractmodelingofdigitalcircuits.ThesyntaxofVHDLisvery
detailedandselfexplanitory.ThecoreisinmostlyavailableundertheLGPLopensourcelicenseandcanbe
downloadedfromhttp://www.experiments.de.
ThedesignsoftwareQuartuscanbeusedforenhancementsandchangesoftheIPcore.Quartusisavailableas
subscriptionversionandalsoasafreewebeditionversion.Thesoftwarecontainsallthenecessarymodules:
compiler,fitter,simulator,programmeretc.ThecurrentSuskaIPcoreversionis2K9Aandfeaturesthefollowing
hardwaremodules:

68000compatibleCPUmodule.

AtariBlittercompatiblegraphicsprocessor.

AtariGLUE(mixedlogic)compatiblelogicmodule.

AtariMCU(MemoryControlUnit)compatiblelogicmodule.

AtariDMA(DirectMemoryAccess)compatiblelogicmodule.

AtariShifter(videoprocessing)compatiblelogicmodule.

AtariShadow(LCDcontroller)compatiblelogicmodule.

WD1772compatiblefloppydiskcontrollermodule.

MFP68901compatiblemultifunctionportmodule.

YM2109compatiblesoundchipmodule.

6850compatibleACIA(AsynchronousCommunicationInterfaceAdapter).

Severalinterfaceadapters(IDE,ACSI,SCSI).

Bootloadermodule.

Thevariousmodulesarewiredtogetherinasocalledtopleveldesign.Themodelingisdonesuchthatthewiring,the
signalnames,themodulearrangementandthemodulefunctionalityascloselyaspossiblematchtheoriginal
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hardwarelayoutandschematicsofthe1040STorthe1040STEmachines.Itwouldfarexceedthescopeofthis
documenttodescribetheIPcoreindetailandduetothehighdevelopmentspeedofthecoreandtheresulting
changes,itisrecommendedtousetheSuskaIIIIPcoresourcesandrelateddocumentationformoredetailed
information.

EthernetDeviceDP83848C
WiththeEthernetcontrollerDP83848CSuskaIIICisequippedwithacommonlyused'physicallayer'devicecapable
ofhandlingtransferratesof10/100Mbps.Thereisadatasheetforthisintegratedcircuitcontainingalotof
informationhowtouseandprogramit.ThecontrollerisdirectlyconnectedtotheFPGAandcanbeusedifthe
SuskaIIIIPcoreisenhancedwithanappropriateinterfaceandifthedriversfortheoperatingsystemareavailable.

USBControllerMAX3421E
TheMAX3421EisaUSBhostcontrollerdevice,whichiscontrollableoveraSPIinterfaceconnectedtotheFPGA.
EnhancementstotheIPcoreandtothesystemsoftwareand/ortheoperatingsystemarerequiredtooperatethis
device.ThecontrollerfulfillstheUSBspecificationrev.2.0.ThemaximumtransferrateoftheSPIinterfaceis26MHz.
ThislimitsthemaximumavailabledatatransferrateoverUSB.Detailedinformationtothisdeviceisavailableinthe
respectivedatasheet.

VideoDACADV7125KST50
Withthisdevice,whichfeaturesthreehighspeed8bitvideoDACstheSuskaIIIChardwareisequippedwitha
qualityvideosystemneveravailablewiththeoriginalSTorSTEmachines.Althoughthereareonly4respective6bits
percolor,(seealsotheparagraphSolderPadsSJ3toSJ8)inthecurrentIPcoreversion,thebrillianceanddynamic
ofthevideoinformationexceedsbyfartheoriginalSThardwareandgivestheSuskaIIICanoutstandingfeature.

AudioDACAD5302
IntheoriginalSTEmachinestherearetwo8bitDAconvertersforgeneratingsystemsound.TheseDAC0802types
aredrivenbyaparalleldatabusandarenotrecommendedfornewdesigns.Asareplacement,SuskaIIICis
equippedwithasmallintegratedcircuitwhichcontainstwo8bitDAconvertersthataredrivenoveraSPIinterface
(SerialPeripheralInterface)ofthethetypeAD5302resultinginareductionofthe16datalinesrequiredforthe
DAC0802toonly3signalsrequiredfortheSPIdrivenwithafrequencyupto30MHz.Itispossibletogeneratethe
audiosignalswithoutanyreductioninqualityincomparisontooriginalST(E)machines.
TheSuskaIPCorefeaturesamoduleforconvertingparallelaudiodatatotheSPIprotocolofthenewDAconverters.
TheoutputsofthetwoDAconvertersareconnectedtotheAUXinputsoftheaudiocodecCS4299,sothevolume
andtoneoftheaudiosignalarecontrollable,afeatureoriginallyimplementedintheobsoleteandscarcelyavailable
LMC1992intheST(E)s.

AudioCodecCS4299
Asdescribedabove,theaudioequipmentintheoriginalAtariSTEmachinesisnotuptodate.Nowadaysthereare
modernaudioprocessorswithbuiltinDAconverterscapabledoingADconversion.Furthermorethesechipscontain
analogmultiplexers,mixerdemultiplexersandsoon.SuskaIIIChassuchanelectronicdeviceofthetypeCS4299to
maketheaudiofunctionalitymuchmorecomfortablethantheSTEs.Theaudiocodeciscontrolled(liketheAD5302)
overasecondSPIinterface.
TousetheCS4299,thereareenhancementsoverthecurrentSuskaIIICIPcorenecessaryandappropriatedrivers
fortheoperatingsystemorthesoftware.TheCS4299isconnectedtothefollowinginputsoroutputs:
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AUXChannelisconnectedtotheaudioDACsAD5302

CDinput

Microphoneinputleft

Microphoneinputright

Lineinput

Lineoutput

SP/DIFFoutput(digital)

ThedatasheetoftheCS4299isdetailed.Pleaserefertothisforinformationconcerningtheelectricaldataandthe
programmingofthedevice.

FurtherAudioHardware
SuskaIIICisalsofurnishedwithsome1040STrelevanthardware,toprovideonemonoaudiochanneldrivenbythe
YM2149compatibleaudioIPcore.Theaudiosignalisboostedbyanoperationalamplifier(IC22)andisconnectedto
the'Speaker'connector(X17)andtotheAtarimonitorconnector(X9)pos.1.ThecounterparttotheSP/DIFFoutput
thereisaSP/DIFFinputfordigitalaudiotransmission.

RealTimeClockDS1392
TheRP5C15realtimeclockusedintheoriginalSTsandSTEsisobsoleteandhasbeenreplacedbytheDS1392
(IC32).UnfortunatelyitisnotregistercompatibletotheRP5C15.Toeliminatethisdisadvantage,theSuskaIIICIP
corehasamodulewhichtowidelymanagecompatibilityandcontroltheserialinterfacefordataexchangebetween
theFPGAandtheDS1392.ForinformationontheDS1392registersrefertoit'sdatasheet.

PushbuttonsandOperationDisplays
SuskaIIIChasfourpushbuttonsSW5toSW8andfivedoubleLEDs.In15thelocationofthepushbuttonsisshown.

Figure15:PushbuttonsofSuskaIIIC.

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SW5andSW6(upperleftanduppermiddle)areintendedforgeneralfutureapplicationsasforexamplethecontrolof
thecontrastifaliquidcrystaldisplayisconnected.Thebuttonsareconnectedtothemicrocontroller(IC36)whichis
responsibleformanagementofthePS/2devices.Functionalityforthepushbuttonsisdonethroughanappropriate
additiontothemicrocontrollerfirmwareand,ifrequired,additionstotheSuskaIIICIPcore.
SW7(lowerleft)isthepowerswitchwhichalsofeaturestheresetfunctionforthesystem.AshortkeystroketoSW7is
sufficienttoswitchthesystemon.Toswitchitoff,akeystrokeofaboutthreesecondsisrequired.Ashortkeystroketo
SW7(whenthesystemison),releasesasystemreset.
SW8(upperright)istheresetbuttonfortheFPGAandisalsoused,withthehelpofthebootloadermodule
implementedintheFPGA'slogic,forloadingoperatingsystemsintheFlashdevice.Thebootloadermechanismis
describedintheparagraphsLoadingtheOperatingSystemviatheBootloaderMechanismandLoadingthe
OperatingSystemviaSDCard.Duringnormaloperationthispushbuttonisnotinuse.
DieLEDsfrontviewisshownin16(leftside).TheLEDshavethefollowingmeaning(1=lowerleft,2=upperleft,3=
lowersecondfromtheleftandsoon):

Figure16:FrontViewofSuskaIIIC.

1. HarddriveaccessofaninstalledCFcard(CompactFlash).
2. Harddriveaccessofaninstalled2,5harddisk.
3. ErrordetectionoftheFPGA'sphaselockedloops.ThisLEDindicatescatastrophicsystemfailure.
4. HarddriveaccessofaninstalledSDcard.
5. Keyboardindicator:PS/2keyboardshiftlockstatus.
6. Mouseindicator:PS/2mouseexistsanafunctionisdetected.
7. Generaloperationindicator.
8. BootloaderLED.RefertoLoadingtheOperatingSystemviatheBootloaderMechanismandLoadingthe
OperatingSystemviaSDCard.
9. Ethernetisactive.

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10. Ethernetlink.

DescriptionoftheInterfaces
SuskaIIICfeaturesawidevarietyofinterfaces.TherearemostSTandSTEaswellasacoupleofadditional
interfaces.Theelectricaldataandthefunctionalityofthedifferentinterfacesarewellknownanddescribedinthe
respectiveliterature,andadetaileddescriptionisnotinthescopeofthisdocument.Thepeculiaritiesandthelocation
oftheinterfacesontheSuskaIIIChardwareisgiveninthefollowingparagraphs.

InterfaceslocatedattheFront
16showstheinterfaceslocatedatthefrontsideofthePCB.Eachofthesehasincommonthattheyareeithernot
alwaysconnected,ortheyrequireeasyaccessibility.TheyincludethedigitalSP/DIFFinterfaces,theaudio
connectors,theSDcardandCFcardconnectors,theUSBportandtheserialinterfacewhichisimplementedbya
RJ45plugontherighthandside.Theterminalassignmentoftheserialplugisgivenintheappendix(pos1.istothe
left).IfaCFcardisusedinIDEmodeandifitisincableselectmode,thisinterfaceisconfiguredslave.

InterfacesontheleftHandSideofthePCB
OnthelefthandsidearetheMIDIinterfacesandbothSTEcompatiblejoyports.

Figure17:SuskaIIICViewfromtheleft.

InterfacesontherightHandSideofthePCB
Ontherightthereare:theROMport,thepowersupply,connectorforanAtarikeyboard,Ethernetplug,PS/2mouse
(green)andkeyboard(purple).TheoriginalROMportconnectorisnotavailableandisreplacedbyanindustrial
type.Theterminalassignmentfortheseconnectorsisfoundintheappendix.

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Figure18:SuskaIIICViewfromtheright.

InterfacesontheBackSideofthePCB
OnthebacksidearetheclassicACSIbusinterface,theSCSIconnector,theAtarimonitorplug,theVGAmonitor
plug,theinterfaceforthefloppydiskdriveandtheprinterport.TheconnectorforthefloppydiskdriveisaHDtypeD
Subwith15positions.Theterminalassignmentfortheseconnectorsisfoundintheappendix.

Figure19:SuskaIIICViewtotheBackSide.

PeculiaritiesexistsfortheACSIinterface,whichisnotdirectlyconnectedtotheFPGAbuttolinedriverstoprovide
levelshiftingbetween3,3Vand5,0Vandviceversa.TheSCSIinterfaceisrealizedinthesamewayandisalso
equippedwithanelectronicbustermination.

InterfacesonTopoftheBoard
ThereareacoupleofotherinterfacesnotdescribedyetandwhichcanbeaccessedfromthetopsideofthePCB.
29/59

Theterminalassignmentsandifnecessarytheconnectortypesaregivenintheappendixofthisdocumentasisa
layoutofthetopoftheprintedcircuitboardindicatingthelocationoftheconnectors.
X7istheIDEconnector.Itcanbeconnecteddirectlyto2,5harddiskdrives.Useashortcableaspossible.When
drivesincableselectmodeareused,thisinterfaceisconfiguredmaster.
X17istheconnectorforthespeaker.Theaudiosignalcomesontheterminallocatedindirectiontothecenterofthe
PCB.TheotheroneisconnectedtoGND.
X22istheconnectorfortheROMselections.AllsignalsROMselectsignalsoftheFPGAareconnectedtoX22.(pos.
1ofthisconnectorislocatedindirectionoftheextensionport).
X24isanextensionplugandX19theconnectorfortheMIDIACIA(refertoparagraphSolderPadsSJ1andSJ2).
X27TheextensionportisfunctionallyidenticaltotheheaderofMEGASTs.Theconnectorisreducedduetospace
restrictionstoa1,27mmpitchtype.Itisanindustrialtype.
X32istheterminalforthealarmsignaloftherealtimeclock.Lookingfromthefrontatthethreeterminalsthe
assignmentsareasfollows(fromlefttoright):interruptgroundalarm.
X33isanotherextensionplugwhichcarriesoutsomesystemsignals.
X44isintendedforconnectingsimplemonochromeLCDswhichwereusedinSTBooksorStacymachines.The
SuskaIIICIPcoresupportsLCDswithaVGAvideoresolutionsuchthattheAtarimonochromevideoinformation
with640x400dotsisdisplayedwithblackshouldersontopandbottomoftheLCD.

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SystemModifications
SuskaIIIChasthreemicrocontrollers,anonvolatileFlashmemorydeviceandtheFPGA.Thismeans,thatthe
systemishighlyconfigurableandenhanceable.Modificationsarefairlysimpletoinstallwhereaspreparationorthe
buildingofthecomponentsrequiressomeexperienceinhardwareand/orsoftwaredevelopment.Itisnot
recommendedforinexperiencedpeopletoimplementchangestothesystembutrathertouseIPcorecomponents
madepubliclyavailablefortheSuskaIIIChardware.Changingthecontentoftheflashdeviceisnormallyreserved
forexchangingoperatingsystem.ChangestotheFPGAconfigurationaffectthebehaviorofthesystemhardwareand
changesofthemicrocontrollerssupplementsorexchangeofthesystemfirmware.

LoadingtheOperatingSystemviatheBootloaderMechanism
ThebootloaderisusedtocopydifferentoperatingsystemstotheFlashmemorydevice.Thissectiondescribeshow
tocopyanoperatingsystemimagefromaPCintotheflashdeviceusingtheX47debugginginterfaceoftheIC39
systemmicrocontroller.
TosetupthecommunicationbetweenthePCandSuskaIIICconnectaUSBUARTcablebetweenaUSBportof
thePCandthedebugginginterface'SYSCTRL_DEBUG'X47.ThiscableisavailableasanaccessorytoSuskaIIIC.
Toactivatethebootloadermechanismproceedasfollows:
1. SwitchonthesystemwithpushbuttonSW7.
2. Afterthis,pressSW7againandholdit.
3. WhileholdingSW7buttoninit'sactivestate,pressthecoreresetpushbuttonSW8andrelease(SW8)again.
4. ReleaseSW7.
5. NowtheredbootLEDshouldflash.ThebootloaderisactivatedwhenSW7ispressedandimmediately
releasedagain.Ifthisisnotdone,theresultisatimeoutafterabout3sandthebootloaderisinactivated.
Onceactivated,theredbootLEDshouldpermanentlyflashwithafrequencyofabout2Hz.Inthisstate,the
bootloaderlogiciswaitingforcommunicationwiththePC.
Remark:isthebootloaderactivebutthereisnocommunicationwiththePCtheprocess
canbecanceledbypressingSW8(thecoreresetbutton).
6. TocopytheoperatingsystemtotheFlashdeviceitisrecommendedtousetheprogram'suskaflasher'.This
isaLinuxprogramandcanbestartedfromaLinuxliveCDoranativelyinstalledLinuxsystem.Theprogram
isusedviaaterminal.Itisnecessarytochangetothedirectorywheretheprogram'suskaflasher'isfound.
DependingonthethenumberofopperatingsystemstobecopiedtotheFlashdevice,thereareseveral
optionsfor'suskaflasher'.Ahelpscreencanbedisplayedusingthefollowingsyntax:./suskaflasherh
or./suskaflasherhelp.
TohaveaccesstotheUSBinterface,itmayberequiredtostart'suskaflasher#inthesupervisormode.The
followingexamplesillustratethemostcommonvariationsusing'suskaflasher'.Itisassumedthatthe
operatingsystemimagesareinadirectory/home/myaccount/temp:
Copyingtheoperatingsystem(theFlashdevicewillbeerased):
./suskaflashersv/dev/ttyUSB0/home/myaccount/temp/etos512k.img
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Copyingtheoperatingsystem(theFlashdevicewillnotbeerased,selecttheaddressoffset):
./suskaflashersnv/dev/ttyUSB0/home/myaccount/temp/tos100de.img
7. Isstep6successfullyinvoked,theflashdevicewillinitiallybeerased(ifthisoptionisselected).Thismay
takeuptooneminute.Afterthisprocedurecopyingtheoperatingsystemimageisbegun.Thereisa
progressbarwith'suskaflasher'togiveinformationaboutthecurrentstatusofthedatatransfer.Afterthe
datatransferhasfinished,switchoffthesystemanddisconnecttheUSBUARTcable.SuskaIIICisready
foroperation.

LoadingtheOperatingSystemviaSDCard(currentlynotimplemented)
ThebootloadermechanismallowscopyingseveraloperatingsystemimagestotheFlashdevice.Thisparagraph
describeshowtocopyanoperatingsystemimagefromaSDcardtotheFlashmemory.First,anenhanced
functionalityoftheSuskaIIICIPcoreisrequired,whichwillbeprovidedinalaterversionof2K9A.This
documentationwillbeupdatedatthattime.

LoadingtheFPGAIPCore
SuskaIIICcomesalreadyconfiguredwithanoperableIPcorelocatedintheFPGAbootdevice.Whenthesystemis
poweredon,theFPGAdeviceconfiguresitselfbyreadingthewiringconfigurationoutofthebootdevice.Thismay
takeupto0.5s.Afterthat,thesystemisreadytouseandrepresentsthecomputerarchitectureofanAtariSTEwith
enhancedvideomodes.
InnormalusethereisnoneedtoapplychangestotheFPGAconfiguration.However,ifspecialfunctionsor
enhancementsaretobeimplemented,itisnecessarytochangethecontentsofthebootdevice.Thiscanbedonein
threedifferentways;bycopyingtheIPcoreconfigurationfilefromaSDcardtothebootdeviceorbydirect
programmingthebootdevicewiththe'activeserial'protocol,orbycopyingthewiringinformationdirectlytothe
configurationmemoryoftheFPGA.
ThethirdoptioncanbeaccomplishedusingtheJTAGinterface(JointTestActionGroup).Ithastheadvantage,that
theFPGArebootsfromtheoriginalconfigurationlocatedinthebootdeviceshouldtheSRAMtechnologyofthe
FPGAconfigurationmemorythewiringinformationgetlostifthesystemisswitchedoffandifpoweredonagain.
Thisisespeciallyuseful,ifchangesaretobetestedwithoutriskofdamagetothesystem'sfunctionality.
ForactiveserialandJTAGaspecialprogrammingadapterrequired.Eitherthe'ByteBlaster'(usedattheparallelport
ofaPC),orthe'USBBlaster'(usedatanyUSBport).Theseprogrammingadaptersareaccessoriesandand
availablefromInventronikGmbH.
Remark:TobringinthewiringinformationintothebootdeviceoftheFPGAiscalled
programmingthebootdevice.Tobringinthewiringinformationdirectlyintotheconfiguration
memoryoftheFPGAiscalledtoconfiguretheFPGA.OntheFPGAthereisnoprogram
running(likeinmicrocontrollers)buttheinformationtoarrangethedigitallogicisdonebythe
wiringofthedevice(configuration),theloadingoftheinformationfromthebootdevicetothe
FPGAisalsocalledconfiguration.

LoadingtheFPGAIPCoreviaSDCard(currentlynotimplemented)
Later...

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33/59

LoadingtheFPGAIPCoreviatheActiveSerialInterface
Todothis,connectthe'USBBlaster'orthe'ByteBlaster'totheappropriateinterfaceofaPCandtothe'ASISP'
interface(X3).

Figure20:ConnectingaUSBBlastertotheActiveSerialInterface.

UsetheAlterasoftwareQuartusorthestandaloneprogrammingsoftware(alsoavailablefromAltera)onthePCfor
thispurpose.Tostarttheprogrammertoollookinthemenu'Tools',fortheentry'Programmer'.Theuseofthis
softwareisselfexplanatoryandsupportedbyadetailedhelpsystem.Inprincipleprogrammingofthebootdeviceis
accomplishedwiththefollowingsteps:

Chosethehardwareforexample'USBBlaster'.

ChangetheprogrammingmodetoActiveSerial.

Choosethedesiredprogrammingfilex.pof.

ChoosetheprogrammingoptionsforexampleProgram/ConfigureorVerify..

Starttheprogramming/configuration.

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LoadingtheFPGAIPCoreviaJTAG
ConfigurationoftheFPGAviatheJTAGinterfaceisverysimilartoprogrammingthebootdeviceusingtheactive
serialinterface.ThedifferenceisthesettingtheprogrammingmodetoJTAGandthefileextensionofthe
configurationfileshouldbe.sof.TheconfigurationprogrammedviatheJTAGinterfaceisvalidaslongasthesystem
ispoweredoneveniftheRESETortheSYSRESETswitchesareasserted.

Figure21:ConfigurationInterfaceJTAG(left)andActiveSerialProgrammingInterface.

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ProgrammingFirmwaretotheMicroControllers
TheSuskaIIIChardwareisequippedwiththreeAtmelmicrocontrollers.Theprogrammingprocedureisthesamefor
allthreedevices.FirsttheprogrammerhardwareisconnectedtoanyUSBinterfaceonthedevelopmentPCandthe
respectiveprogramminginterfaceofthemicrocontroller.ForthesystemmicrocontrollerIC39itistheconnector
'ISP_SYSCTRL'(X46),forthePS/2microcontrollerIC36itis'ISP_PS2'(X38)andfortheSDcardmicrocontroller
IC37itis'ISP_SDC'(X42).Pleasetakecaretocheckthecorrectpolarity.Terminal1ismarkedredatthe
programmercable.Thefollowingfiguregivesanexample:

Figure22:ConnectingtheAVRProgrammertoSuskaIIIC

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Appendix1:TerminalAssignmentsoftheConnectors
I2CX2
Pin1

I2C_SDA

Pin2

GND

Pin3

I2C_SCL

Table2:AssignmentoftheI2CInterfaceX2

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ACSIX4
Pin1

ACSI_D7

Pin2

GND

Pin3

ACSI_D6

Pin4

GND

Pin5

ACSI_D5

Pin6

GND

Pin7

ACSI_D4

Pin8

GND

Pin9

ACSI_D3

Pin10

GND

Pin11

ACSI_D2

Pin12

GND

Pin13

ACSI_D1

Pin14

GND

Pin15

ACSI_D0

Pin16

GND

Pin17

VCCIO

Pin18

GND

Pin19

VCC

Pin20

ACSI_HDACKn

Pin21

ACSI_HDREQ

Pin22

ACSI_HDCSn

Pin23

ACSI_RESn

Pin24

ACSI_CA1

Pin25

ACSI_HDINTn

Pin26

ACSI_CR_Wn

Table3:AssignmentoftheACSIInterfaceX4

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SCSIX5
Pin1

SCSI_REQn

Pin2

SCSI_MSGn

Pin3

SCSI_IOn

Pin4

SCSI_RSTn

Pin5

SCSI_ACKn

Pin6

SCSI_BUSYn

Pin7

GND

Pin8

SCSI_D0

Pin9

GND

Pin10

SCSI_D3

Pin11

SCSI_D5

Pin12

SCSI_D6

Pin13

SCSI_D7

Pin14

GND

Pin15

SCSI_DCn

Pin16

GND

Pin17

SCSI_ATNn

Pin18

GND

Pin19

SCSI_SELn

Pin20

SCSI_DPn

Pin21

SCSI_D1

Pin22

SCSI_D2

Pin23

SCSI_D4

Pin24

GND

Pin25

TERM

Table4:AssignmentoftheSCSIInterfaceX5

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IDEX7:StandardAssignment
Whendrivesincableselectmodeareused,thisinterfaceisconfiguredmaster.
(ConnectortypeonthePCB:MA222_RM2fromSamtec)

VGAX8
Pin1

VIDEO_R

Pin2

VIDEO_G

Pin3

VIDEO_B

Pin4

n.c.

Pin5

GND

Pin6

GND

Pin7

GND

Pin8

GND

Pin9

n.c.

Pin10

GND

Pin11

n.c.

Pin12

n.c.

Pin13

HSYNCn

Pin14

VSYNCn

Pin15

n.c.

Table5:AssignmentoftheVGAconnectorX8

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AtariVideoX9
Pin1

AUDIO_OUT

Pin2

COMP_SYNC

Pin3

CRT_PIN3

Pin4

CRT_PIN4

Pin5

AUDIO_IN

Pin6

VIDEO_G

Pin7

VIDEO_R

Pin8

VCCvia1K2

Pin9

HSYNCn

Pin10

VIDEO_B

Pin11

VIDEO_MONO

Pin12

VSYNCn

Pin13

GND

Table6:AssignmentoftheAtariVideoConnectorX9

SpeakerX17
Pin1=Audio,Pin2=GND

GPOX18
Pin1=GPO,Pin2=GND

MIDIX19
Pin1

GND

Pin2

UART_MIDI_RTSn

Pin3

UART_MIDI_DCDn

Pin4

UART_MIDI_CTSn

Pin5

VCCIO

Table7:AssignmentoftheMIDIPlugX19

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MIDIInX20
Pin1

n.c.

Pin2

n.c.

Pin3

n.c.

Pin4

OptocouplerDiodeAnode

Pin5

OptocouplerDiodeCathode

Table8:AssignmentoftheMIDIInPlugX20

MIDIOutX21
Pin1

VCCvia220R0

Pin2

GND

Pin3

MIDI_TLR

Pin4

VCCvia220R0

Pin5

MIDI_OLR

Table9:AssignmentoftheMIDIOutPlugX21

ROMSelectsX22
Pin1

ROM0n

Pin2

ROM1n

Pin3

ROM2n

Pin4

ROM3n

Pin5

ROM4n

Pin6

ROM5n

Pin7

ROM6n

Pin8

Masse

Table10:AssignmentoftheROMSelectsConnectorX22

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AtariKBDX23
Pin1

VCC

Pin2

VCC

Pin3

KEYB_TxD

Pin4

KEYB_RxD

Pin5

GND

Pin6

GND

Table11:AssignmentoftheAtariKeyboardConnectorX23

AUX1X24
Pin1

GND

Pin2

IC39_PB1

Pin3

S/PDIFSignalvomoptischenEmpfnger.

Pin4

IC39_PC4

Pin5

VCCIO

Table12:AssignmentoftheAUX1InterfaceX24

Joyport2X25
Pin1

DATA3

Pin2

DATA2

Pin3

DATA1

Pin4

DATA0

Pin5

MONOFLOP3

Pin6

BUTTON3

Pin7

VCC

Pin8

n.c.

Pin9

GND

Pin10

BUTTON3

Pin11

DATA11

Pin12

DATA10

Pin13

DATA9

Pin14

DATA8

Pin15

MONOFLOP4

Table13:AssignmentoftheJoyport2InterfaceX25

43/59

Joyport1X26
Pin1

DATA7

Pin2

DATA6

Pin3

DATA5

Pin4

DATA4

Pin5

MONOFLOP1

Pin6

BUTTON1

Pin7

VCC

Pin8

n.c.

Pin9

GND

Pin10

BUTTON2

Pin11

DATA15

Pin12

DATA14

Pin13

DATA13

Pin14

DATA12

Pin15

MONOFLOP2

Table14:AssignmentoftheJoyport1InterfaceX25

44/59

ExtensionX27;(ConnectortypeonthePCB:TML132fromSamtec)
Pin1

DATA0

Pin2

ADR23

Pin3

DATA1

Pin4

ADR22

Pin5

DATA2

Pin6

ADR21

Pin7

DATA3

Pin8

ADR20

Pin9

DATA4

Pin10

ADR19

Pin11

DATA5

Pin12

ADR18

Pin13

DATA6

Pin14

ADR17

Pin15

DATA7

Pin16

ADR16

Pin17

DATA8

Pin18

ADR15

Pin19

DATA9

Pin20

ADR14

Pin21

DATA10

Pin22

ADR13

Pin23

DATA11

Pin24

ADR12

Pin25

DATA12

Pin26

ADR11

Pin27

DATA13

Pin28

ADR10

Pin29

DATA14

Pin30

ADR9

Pin31

DATA15

Pin32

ADR8

Pin33

HALTn

Pin34

ADR7
45/59

Pin35

BRn

Pin36

ADR6

Pin37

BGACKn

Pin38

ADR5

Pin39

DTACKn

Pin40

ADR4

Pin41

VPAn

Pin42

ADR3

Pin43

BERRn

Pin44

ADR2

Pin45

EINT7n

Pin46

ADR1

Pin47

EINT5n

Pin48

RESETn

Pin49

EINT3n

Pin50

VMAn

Pin51

FC2

Pin52

Pin53

FC1

Pin54

BGOn

Pin55

FC0

Pin56

CLK8

Pin57

RWn

Pin58

AVECn

Pin59

LDSn

Pin60

GND

Pin61

UDSn

Pin62

GND

Pin63

ASn

Pin64

GND

Table15:AssignmentoftheExtensionConnectorX27

46/59

RomPort(Cartridge)X28;(ConnectortypeonthePCB:TML120RAfromSamtec)
Pin1

VCCIO

Pin2

GND

Pin3

DATA14

Pin4

DATA15

Pin5

DATA12

Pin6

DATA13

Pin7

DATA10

Pin8

DATA11

Pin9

DATA8

Pin10

DATA9

Pin11

DATA6

Pin12

DATA7

Pin13

DATA4

Pin14

DATA5

Pin15

DATA2

Pin16

DATA3

Pin17

DATA0

Pin18

DATA1

Pin19

ADR13

Pin20

ADR15

Pin21

ADR8

Pin22

ADR14

Pin23

ADR7

Pin24

ADR9

Pin25

ADR6

Pin26

ADR10

Pin27

ADR5

Pin28

ADR12

Pin29

ADR11

Pin30

ADR4

Pin31

ROM3n

Pin32

ADR3

Pin33

ROM4n

Pin34

ADR2
47/59

Pin35

UDSn

Pin36

ADR1

Pin37

LDSn

Pin38

GND

Pin39

GND

Pin40

GND

Table16:AssignmentoftheCartridgeConnectorX28

FloppyDiskX29
Pin1

FDTYPE

Pin2

FDD_MOn

Pin3

FDD_RDn

Pin4

FDD_DIRCn

Pin5

FDD_SDSEL

Pin6

FDD_WGn

Pin7

FDD_D1SEL

Pin8

GND

Pin9

FDD_TR00n

Pin10

FDD_WPn

Pin11

VCC

Pin12

FDD_STEPn

Pin13

FDD_IPn

Pin14

FDD_WDn

Pin15

FDD_D0SEL

Table17:AssignmentoftheFloppyConnectorX29

PrinterPortX30
Pin1

LPT_STRB

Pin2

LPT_D0

Pin3

LPT_D1

Pin4

LPT_D2

Pin5

LPT_D3

Pin6

LPT_D4

Pin7

LPT_D5

Pin8

LPT_D6
48/59

Pin9

LPT_D7

Pin10

n.c.

Pin11

LPT_BSY

Pin12

n.c.

Pin13

n.c.

Pin14

n.c.

Pin15

n.c.

Pin16

n.c.

Pin17

n.c.

Pin18

GND

Pin19

GND

Pin20

GND

Pin21

GND

Pin22

GND

Pin23

GND

Pin24

GND

Pin25

GND

Table18:AssignmentofthePrinterPortX30

RS232X31
Pin1

COM_RI

Pin2

COM_DCD

Pin3

COM_DTR

Pin4

GND

Pin5

COM_RxD

Pin6

COM_TxD

Pin7

COM_CTS

Pin8

COM_RTS

Table19:AssignmentoftheConnectorfortheserialInterfaceX31

49/59

ALARMX32
Pin1

RTC_INTn

Pin2

GND

Pin3

RTC_SQW

Table20:AssignmentoftheRTCAlarmConnectorsX32

AUX2X33
Pin1

MWK

Pin2

MWD

Pin3

MWEn

Pin4

FCLK

Pin5

SCSI_WRn

Pin6

VSYNC

Pin7

SCSI_RDn

Pin8

HSYNC

Pin9

XFF827E_D4

Pin10

GND

Table21:AssignmentoftheAUX2InterfaceX33

EthernetX34
Pin1

TD+

Pin2

TD

Pin3

RD+

Pin4

VCCIO

Pin5

n.c.

Pin6

RD

Pin7

n.c.

Pin8

GND

Table22:AssignmentoftheEthernetPlugX34

50/59

AUX3X36
Pin1

GND

Pin2

IC36PA0

Pin3

IC36PA1

Pin4

IC36PA2

Pin5

IC36PA3

Pin6

IC36PA4

Pin7

IC36PA5

Pin8

VCC

Table23:AssignmentoftheAUX3InterfaceX36

PS2MOUSEX37
Pin1

PS2_B_D

Pin2

n.c.

Pin3

GND

Pin4

VCC

Pin5

PS2_B_CLK

Pin6

n.c.

Table24:AssignmentofthePS/2MouseConnectorX37

PS2_DebugX39
Pin1

TxD

Pin2

RxD

Pin3

GND

Table25:AssignmentofthePS/2MicroControllerDebuggingInterfaceX39

51/59

PS2KBDX40
Pin1

PS2_A_D

Pin2

n.c.

Pin3

GND

Pin4

VCC

Pin5

PS2_A_CLK

Pin6

n.c.

Table26:AssignmentofthePS/2KeyboardPlugX40

SDC_DebugX43
Pin1

TxD

Pin2

RxD

Pin3

GND

Table27:AssignmentoftheSDCMicroControllerDebuggingConnectorX43

LCDX44
Pin1

GND

Pin2

VDCLK

Pin3

LLCLK

Pin4

LFS

Pin5

GND

Pin6

GND

Pin7

LDAT0

Pin8

LDAT1

Pin9

LDAT2

Pin10

LDAT

Pin11

UDAT0

Pin12

UDAT1

Pin13

UDAT2

Pin14

UDAT

Pin15

LCD_VBIAS

Pin16

VCC

Table28:AssignmentoftheLCDInterfaceX44

52/59

AUXUSBX45
Pin1

IC39PA2

Pin2

IC39PA3

Pin3

GND

Table29:AssignmentoftheAUXUSBInterfaceX45

SYSCTRL_DebugX47
Pin1

TxD

Pin2

RxD

Pin3

GND

Table30:AssignmentoftheSYSMicroControllerDebuggingInterfaceX47

PowerX48
CenterPin=+7Vbis+12V,OtherPin=GND.

53/59

Appendix2:KeyboardScanCodes/TranslationTable
ThescancodesmarkedingreenindicatethefollowingdifferencestoAtarikeyboards:
Pos1=ClrHome,Pause=Undo,Druck=Help,
Notused='('NumberPad,Notused=')'NumberPad.
ScanCode KeyD

ScanCode KeyD

ScanCode KeyD

ScanCode KeyD

ESC

35

69

Notused

103

7NumberPad

36

70

Notused

104

8NumberPad

37

71

Pos1,ClrHome

105

9NumberPad

38

72

106

4NumberPad

39

73

Notused

107

5NumberPad

40

74

NumberPad

108

6NumberPad

41

75

109

1NumberPad

42

Shifttleft

76

Notused

110

2NumberPad

43

77

111

3NumberPad

10

44

78

+NumberPad

112

0NumberPad

11

45

79

Notused

113

,NumberPad

12

46

80

114

EnterNumPad

13

'

47

81

Notused

115

Notused

14

Backspace 48

82

Insert

116

Notused

15

TAB

49

83

Delete

117

Notused

16

50

84

ShiftF1

118

Notused

17

51

85

ShiftF2

119

Notused

18

52

86

ShiftF3

120

ALT1

19

53

87

ShiftF4

121

ALT2

20

54

Shiftright

88

ShiftF5

122

ALT3

21

55

Notused

89

ShiftF6

123

ALT4

22

56

Alternate

90

ShiftF7

124

ALT5

23

57

Space

91

ShiftF8

125

ALT6

24

58

CapsLock 92

ShiftF9

126

ALT7

25

59

F1

93

ShiftF10

127

ALT8

26

60

F2

94

Notused

128

ALT9

27

61

F3

95

Notused

129

ALT0

28

Return

62

F4

96

<

130

ALT

29

Control

63

F5

97

Pause,Undo

131

ALT'

30

64

F6

98

Druck,Help

132

Notused
54/59

31

65

F7

99

n.b.,(NumberPad

32

66

F8

100

n.b.,)NumberPad

33

67

F9

101

/NumberPad

34

68

F10

102

*NumberPad

55/59

Appendix3:MegaSTEConfigurationSwitch
READMEtotheCPXModule"DIPS":
WiththismodulethesettingsoftheDIPswitchesoftheMegaSTErespectiveTTcanbereadorchanged.The
softwareoverwritesthehardwaresettingsbecausethesettingsarereadonceafteraresetorthebootprocessand
storedinthecookie_SWI.Thesettingscanlaterbechangedinthiscookiewithoutopeningthecomputer.Theeight
switchesarestoredinthelowerpartofthe_SWIlongword.Ifaswitchisinposition'on',therespectivecookiebitis
then'0'otherwise'1'.Uptonow,thereisinformationforthefunctionofonlytwobitsavailable:
Switch8:
Off=SystemhasDMAsound(isindicated_SNDcookie,bit1)
Switch7:
Determineswhetherthesystemisequippedwith(atleast)oneHDfloppydiskdrive.SinceTOS2.05/3.05the
operationofHDtypefloppydiskdrivesispossible.
Moreinformationonthistopiccanbefoundhere:STComputer9/91,pages100ff.

Appendix4:Schematics
TohaveaccesstothemostrecentversionsoftheschematicsfortheSuskaIIIChardwarerefertothedocument
Schematics_SuskaIIIC_Series1.pdf,whichisavailableinthedownloadareaoftheexperiments.deorthe
inventronik.dewebsite.

56/59

Appendix5:BoardLayouts

Figure23:SuskaIIICTopViewPCBLayout

57/59

Figure24:SuskaIIICBottomViewPCBLayout

58/59

Appendix6:Literature
1. SiemersC.;Logikbausteine;VogelBuchverlag;Wrzburg;2002.
2. TischlerM.,OertelK.;FPGAsundCPLDs;HthigGmbH;Heidelberg;1998.
3. ReichhardtJ.,SchwarzB.;VHDLSynthese;OldenbourgWissenschaftsverlag;Mnchen;2001.
4. MolitorP.,RitterJ.;VHDLEineEinfhrung;PearsonStudium;Mnchen;2004.
5. SeifartM.,BeikirchH.;DigitaleSchaltungen;VerlagTechnik;Berlin;1998.
6. LehmanG.,WunderB.,SelzM.;SchaltungsdesignmitVHDL;freiimInternetverfgbar.
7.

AshendenP.J.;TheDesignersGuideToVHDL;MorganKaufmannPublishers;NewYork;2002.

8. TenHagenK.;AbstrakteModellierungdigitalerSchaltungen;SpringerVerlag;Berlin;1995.

Appendix7:WebLinks
1. InventronikHome:
2. experimentSHome:

www.inventronik.de
www.experiments.de

3. IPCores:

www.opencores.org

4. Funsite:

www.fpgaarcade.com

5. AlteraFPGAs:

www.altera.com

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