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Eaton Logic Controller

System Manual New Information


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Eaton Logic Controller

MN05003003E



For more information visit:

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i

November 2008

Disclaimer of Warranties and Limitation of Liability

The information, recommendations, descriptions and safety notations in this document are
based on Eaton Electrical Inc. and/or Eaton Corporations (Eaton) experience and judgment
and may not cover all contingencies. If further information is required, an Eaton sales ofce
should be consulted.
Sale of the product shown in this literature is subject to the terms and conditions outlined
in appropriate Eaton selling policies or other contractual agreement between Eaton and
the purchaser.
THERE ARE NO UNDERSTANDINGS, AGREEMENTS, WARRANTIES, EXPRESSED OR
IMPLIED, INCLUDING WARRANTIES OF FITNESS FOR A PARTICULAR PURPOSE OR
MERCHANTABILITY, OTHER THAN THOSE SPECIFICALLY SET OUT IN ANY EXISTING
CONTRACT BETWEEN THE PARTIES. ANY SUCH CONTRACT STATES THE ENTIRE
OBLIGATION OF EATON. THE CONTENTS OF THIS DOCUMENT SHALL NOT BECOME PART
OF OR MODIFY ANY CONTRACT BETWEEN THE PARTIES. In no event will Eaton be
responsible to the purchaser or user in contract, in tort (including negligence), strict liability
or otherwise for any special, indirect, incidental or consequential damage or loss whatsoever,
including but not limited to damage or loss of use of equipment, plant or power system, cost
of capital, loss of power, additional expenses in the use of existing power facilities, or claims
against the purchaser or user by its customers resulting from the use of the information,
recommendations and descriptions contained herein.
The information contained in this manual is subject to change without notice.

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Eaton Logic Controller

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MN05003003E
November 2008

Table of Contents

PREFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
CHAPTER 1 PRODUCT OVERVIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

1.1 - ELC Processors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 - ELC Digital Modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.3 - ELC Specialty Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
1.4 - ELC Power Supplies. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.5 - ELCSoft Programming Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.6 - ELC-HHP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.7 - ELC Graphic Panels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.8 - ELCSoftGP Programming Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11

CHAPTER 2 GETTING STARTED. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.1 - Connect ELC Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.2 - Connect ELC to a PC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.3 - Connect ELC to the ELC-HHP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.4 - Current Consumed by the Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.5 - I/O Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.6 - Install ELCSoft . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.7 - Enter this Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.8 - Download the Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.9 - Monitor the Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10

CHAPTER 3 INSTALLATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.1 - ELC Mounting and Clearance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3.2 - Installing Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3.3 - DIN Rail Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3.4 - Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
3.5 - Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.6 - Terminal Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20

CHAPTER 4 ELC CONCEPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1

4.1 - ELC Scan Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4.2 - Current Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4.3 - Contact A, Contact B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4.4 - ELC Registers and Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4.5 - Ladder Logic Symbols. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
4.6 - Conversion of ELC Commands and Each Diagram Structure . . . . . . . . . . . . . . 4-11
4.7 - ELC-HHP Programming Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12
4.8 - Simplifying Ladder Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14
4.9 - Basic Ladder Logic Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-17

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Eaton Logic Controller

MN05003003E



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iii

November 2008

Table of Contents (Continued)

CHAPTER 5 PROGRAMMING CONCEPTS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

5.1 - ELC Memory Map for PB Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.2 - ELC Memory Map for PC/PA/PH Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
5.3 - ELC Memory Map for PV Models. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7
5.4 - ELC Latched Memory Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
5.5 - ELC Latched Memory Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12
5.6 - ELC Bits, Nibbles, Bytes, Words, etc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
5.7 - Binary, Octal, Decimal, BCD, Hex. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
5.8 - M Relay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
5.9 - S Relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-34
5.10 - T (Timer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-34
5.11 - C (Counter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-35
5.12 - High-speed Counters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-37
5.13 - D (Word register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-50
5.14 - E, F Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-65
5.15 - File Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-65
5.16 - Nest Level Pointer[N], Pointer[P] and Interrupt Pointer [I]. . . . . . . . . . . . . . . . 5-66
5.17 - Special M Relay and Special D Register Application . . . . . . . . . . . . . . . . . . . . 5-70
5.18 - Fault Code Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-124

CHAPTER 6 INSTRUCTION SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

6.1 - Basic Instruction Explanations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6.2 - Pointers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-10
6.3 - Interrupt Pointers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11
6.4 - Basic Instructions (without API numbers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-13
6.5 - Application Programming Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14
6.6 - Numerical List of Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-25
6.7 - Detailed Instruction Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-34

CHAPTER 7 COMMUNICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

7.1 - Communication Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.2
7.2 - Communication Protocol ASCII Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.3
7.3 - Communication Protocol RTU Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8
7.4 - ELC Device Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12
7.5 - Command Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-14
7.6 - ELC Device Addresses by Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-22

CHAPTER 8 SFC PROGRAMMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1

8.1 - Step Ladder Command [STL], [RET] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
8.2 - Sequential Function Chart (SFC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
8.3 - Step Ladder Command Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-5
8.4 - Reminder of Design on the Step Ladder Program . . . . . . . . . . . . . . . . . . . . . . . 8-11
8.5 - Categories of Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13
8.6 - IST Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-24

CHAPTER 9 TROUBLESHOOTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1

9.1 - Common Problems and Solution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
9.2 - Fault Code Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
9.3 - Error Detection Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-7
9.4 - Periodic Inspection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-7

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MN05003003E
November 2008

Table of Contents (Continued)

CHAPTER 10 HANDHELD PROGRAMMER. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.1

10.1 - Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
10.2 - ELC-HHP Standard Specication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
10.3 - Initial Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-6
10.4 - ELC-HHP Program Read/Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-14
10.5 - Program Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-26
10.6 - ELC RUN/STOP Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-36
10.7 - MON/TEST Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-37
10.8 - Clear Users Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-43
10.9 - ELC and ELC-HHP Program Verications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-45
10.10 - Parameters Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-47
10.11 - M_CARD Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-50
10.12 - File Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-51
10.13 - Error Code Explanations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-54
10.14 - Instruction Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-57
10.15 - Troubleshooting and Error Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-64
10.16 - ELC-HHP Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-65
10.17 - ELC-HHP Operation Flow Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-66

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Eaton Logic Controller

MN05003003E



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v

November 2008

Safety

Denitions and Symbols
WARNING

This symbol indicates high voltage. It calls your attention to items
or operations that could be dangerous to you and other persons
operating this equipment. Read the message and follow the
instructions carefully.

This symbol is the Safety Alert Symbol. It occurs with either of
two signal words: CAUTION or WARNING, as described below.
WARNING

Indicates a potentially hazardous situation which, if not avoided,
can result in serious injury or death.
CAUTION

Indicates a potentially hazardous situation which, if not avoided,
can result in minor to moderate injury, or serious damage to the
product. The situation described in the CAUTION may, if not
avoided, lead to serious results. Important safety measures are
described in CAUTION (as well as WARNING).

Hazardous High Voltage
WARNING

Motor control equipment and electronic controllers are connected
to hazardous line voltages. When servicing drives and electronic
controllers, there may be exposed components with housings or
protrusions at or above line potential. Extreme care should be taken
to protect against shock.
Stand on an insulating pad and make it a habit to use only one
hand when checking components.
Always work with another person in case an emergency occurs.
Disconnect power before checking controllers or performing
maintenance.
Be sure equipment is properly grounded.
Wear safety glasses whenever working on electronic controllers
or rotating machinery.

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MN05003003E
November 2008

Warnings and Cautions
CAUTION

Explosion hazard. Substitution of components may impair
suitability for Class I, Division 2.
WARNING

Explosion hazard. Do not replace components unless power has
been switched off or area is known to be non-hazardous.


1- 1
Product Overview
The Eaton Logic Controller (ELC) is programmable logic controller spanning an I/O of
10 512 I/O points. ELC processors are so versatile they range from nano to small -
PLCs I/O and application size without ever needing to change processors. ELC can
control a wide variety of devices to solve your automation needs. Like most PLCs, ELC
monitors inputs and modifies outputs as controlled by the user program. User program
provides features like Boolean logic, counting, timing, complex math operations, and
communications to other communicating products.

This Chapter Contains

1.1 ELC Processors........................................................................................................................ 1-2
1.2 ELC Digital Modules................................................................................................................. 1-4
1.3 ELC Specialty Modules............................................................................................................ 1-5
1.4 ELC Power Supplies................................................................................................................. 1-7
1.5 ELCSoft Programming Software............................................................................................. 1-8
1.6 ELC-HHP.................................................................................................................................... 1-9
1.7 ELC Graphic Panels ................................................................................................................. 1-9
1.8 ELCSoftGP Programming Software...................................................................................... 1-11
ELC Syst em Manual

1- 2
1 Product Overview
1.1 ELC Processors
The decision is easy when selecting an ELC processor. All ELC have the same internal features such
as I/O capability; register size, latched memory, communications, etc. The only choice needed is to
choose whether the processor should have included analog in and out or all digital I/O.



ELC-PB14xxxx ELC-PC12xxxx ELC-PA10xxxx ELC-PH12xxxx ELC-PV28xxxx


Items ELC-PB14xxxx ELC-PC12xxxx ELC-PA10xxxx ELC-PH12xxxx ELC-PV28xxxx
Dimensions
W x H x D
(mm)
1.00 x 3.54 x
2.36
(25.2 x 90 x 60)
1.47 x 3.54 x 2.36 (37.4 x 90 x 60)
2.75 x 3.54 x
2.36
(70 x 90 x 60)
Maximum
I/O
256 (128 In / 128 Out) Any number of modules
512 (256 In / 256
Out)
I/O points
I/O Type
Total:14 points
Digital Input: 8
Digital Output: 6
Total: 12 points
Digital Input: 8
Digital Output: 4
Total: 10 points
Digital input: 4
Digital output: 2
Analog input: 2
Analog output: 2
Total: 12 points
Digital Input: 8
Digital output: 4
(Transistor)
Total: 28 points
Digital Input: 16
Digital output: 12
Execution
Speed
Basic commands 2 seconds minimum
Basic
commands
0.24 seconds
minimum
Program
language
Commands + Ladder Logic + SFC
Program
Capacity
3792 Steps 7920 Steps 15872 Steps
Data
Memory
Capacity
(bits)
1280 Bits 4096 Bits 4096 Bits
Data
Memory
Capacity
(words)
744 Words 5000 Words 10000 Words
Index
Registers
2 Words 8 Words 16 Words
1. Product Over vi ew

1- 3
Items ELC-PB14xxxx ELC-PC12xxxx ELC-PA10xxxx ELC-PH12xxxx ELC-PV28xxxx
File
Memory
Capacity
- 1600 Words 10000 Words
Commands
32 Basic / 109
Advanced
32 Basic / 177 Advanced
32 Basic / 195
Advanced
Floating
Point
Yes
SFC
Commands
128 Steps 1024 Steps
Timers
128 (1ms
100ms)
256 (1ms 100ms)
Counters
128 (16/32 bit)
(Up/Down)
235 (16/32 bit) (Up/Down)
High Speed
counters
13
1ph-1 input * 4
1ph-2 input * 1
2ph-2input * 1
16
1ph-1 input * 6
1ph-2 input * 1
2ph-2 input * 1
19
1ph-1 input * 8
1ph-2 input * 2
2ph-2 input * 2
18
1ph-1 input * 10
1ph-2 input * 4
2ph-2 input * 4
Pulse
Output
2 channels,
10KHz Max
2 channels, 50KHz Max
4 channels,
100KHz Max
4 channels,
200KHz Max
Master
Control
Loop
8 Loops 8 Loops
Subroutines 64 Subroutines 256 Subroutines
Interrupts
6
(External / Timer
/ Comm.)
15 (External / Timer / HS CNTR / Comm.)
22 (External /
Timer / HS CNTR
/ Comm.)
Real-time
Clock /
Calendar
- Built-in
Specialty
Expansions
modules
8 (Analog In / Analog Out / PT / TC) Modules do not count in total I/O
Serial Ports 2 (RS-232 / RS-485)
Special
Features
-
2
Potentiometers
2
7-SEG displays
2
Potentiometers
2
Potentiometers
ELC Syst em Manual

1- 4
1.2 ELC Digital Modules
ELC expansion modules provide the correct amount of I/O for application solutions. Choose 4 , 6 , 8 ,
or 16 I/O. Any number of expansion modules can be added to the ELC processor to create 256 I/O.


Input Unit Output Unit
Model Power
Point Type Point Type
Dimensions
W x H x D (mm)
0.99 x 3.54 x 2.36 (25.2 x 90 x 60)
ELC-EX08NNAN 8 AC 0 None
ELC-EX08NNDN 8 0 None
ELC-EX08NNSN
1
8 0 None
ELC-EX08NNNR 0 8 Relay
ELC-EX08NNNT 0 8 Transistor
ELC-EX06NNNI 0 6 Relay
ELC-EX08NNDR 4 4
ELC-EX16NNDR 8 8
Relay
ELC-EX08NNDT 4 4
ELC-EX16NNDT
24VDC
2
8
DC Sink
or
Source
8
Transistor
Note 1: Digital Inputs Simulator module.
Note 2: Supplied by bus power from Processor unit.
1. Product Over vi ew

1- 5
1.3 ELC Specialty Modules
1.3.1 Expansion Modules
In addition the to expansion I/O, specialty modules like Analog In, Analog Out, Platinum Temperature,
Thermocouple, etc.


Input Unit Output Unit
Model Power
Point Type Point Type
Dimensions
W x H x D (mm)
0.99 x 3.54 x 2.36 (25.2 x 90 x 60)
ELC-AN02NANN 0 2
ELC-AN04NANN 0 4
ELC-AN06AANN 4 2
0~20mA
0V ~ +10 V
ELC-AN04ANNN 4
-20mA~20mA
-10V ~ +10 V
0
ELC-PT04ANNN 4 Platinum Temp. 0
ELC-TC04ANNN
24VDC
4 Thermocouple 0
-

Model Power Function
Dimensions
W x H x D (mm)
0.99 x 3.54 x 2.36 (25.2 x 90 x 60)
ELC-MC01 24VDC Motion Control Unit
ELC-CODNET DeviceNet Slave Unit
ELC-COPBDP Profibus Slave Unit
ELC-485APTR
-
RS-485 Adapter
ELC Syst em Manual

1- 6
1.3.2 Fast Expansion Modules
The below modules are only available for the PV Controller and are connected to the left side of the PV.
Specific fast expansion bus:
5
4 6
7
8
MS
NS
2
3
5
1
4
9
7
8
6
x10
x10
DR 1
DR 0
IN 1
IN 0
0
2
3
19
0
0
1


Model Power Function
ELC-CODENETM DeviceNet Network Scanner
ELC-COENETM
-
Ethernet Communication Module
1. Product Over vi ew

1- 7
1.4 ELC Power Supplies
All ELC modules operate from 24 VDC. These power supplies provide a convenient way to provide
robust DC voltage.




Model
Item
ELC-PS01 ELC-PS02
Dimensions
W x H x D (mm)
1.44 x 3.54 x 2.36 (36.5 x 90 x 60) 2.17 x 3.54 x 2.36 (55 x 90 x 60)
Input Power 100~240VAC 50/60Hz
Output Volts 24VDC
Output Current (A) 1 A 2 A
ELC Syst em Manual

1- 8
1.5 ELCSoft Programming Software
ELCSoft programming software configures all ELC controllers. With ELCSoft, applications can be
created, edited, monitored, forced, etc. Move programs from one controller to a different one with ease.

Requirements:
Operating Systems Windows 98, Windows ME, Windows 2000, Windows XP.
Hard Drive At least 100M bytes
RAM At least 256M bytes

1. Product Over vi ew

1- 9
1.6 ELC-HHP
ELC-HHP is an easy to use hand held programming tool for ELC controllers when a PC is not available.
With ELC-HHP, applications can be programmed directly with the attached keypad. Or uploaded from
an ELC, saved, and transferred to a different ELC. Or downloaded from a PC and transferred to other
ELCs. No need for outlets when using the ELC-HHP since it draws its power from either the ELC or
the PC through the attached cable.

ECL-HHP with cables for ELC and PC connections


1.7 ELC Graphic Panels
ELC graphic panels allow modifying an application quick and easy. ELC graphic panels are simple to
program and easily connect to ELC products. ELC graphic panels also connect to Eaton | Cutler-
Hammer MVX drives.



ELC Syst em Manual

1- 10
Item ELC-GP02 ELC-GP04
Screen STN-LCD
Color Monochromatic
Back-light
The back-light automatic turn off time is 1~99 minutes
(0 = do not to turn off)
(back-light life is 50 thousand hours at 25C)
Resolution 160X32 dots 128X64 Points
Display Range 72 mm (W) X 22 mm (H)
67mm (W) X 32mm (H);
3.00 (diagonal preferred)
Contrast
Adjustment
15-step contrast adjustment 10-step contrast adjustment
Font
ASCII: characters
Other: user define
Font Size (ASCII) 5 X 8, 8 X 8, 8 X 12, 8 X 16
ALARM Indication
LED
1. Power on indication (Flash three times)
2. Flash for communication error or other alarm
3. Special Indication by user programming
RS-232 LED
(Yellow)
It will be flashing when transmitting program and communicating
by using RS-232.
D
i
s
p
l
a
y

S
c
r
e
e
n

RS-485/RS-422
Indication LED
(Green)
It will be flashing when communicating by using RS-485/RS-422.
Program Memory 256KB flash memory
Serial
Communication
Port RS-232
(COM1)
9 PIN D-SUB male
Data length: 7 or 8 bits
Stop bits: 1 or 2 bits
Parity: None/Odd/Even
Baud Rate: 4800bps~115200bps
RS-232: 9 PIN D-SUB male
Extension
Communication
port
RS-422/RS-485
(COM2)
5-Pin Removal
Terminal
Data length: 7 or 8 bits
Stop bits: 1 or 2 bits
Parity: None/Odd/Even
Baud Rate: 4800bps~115200bps
RS-485: 5-Pin removal terminal
Data length: 7 or 8 bits
Stop bits: 1 or 2 bits
Parity: None/Odd/Even
Baud Rate: 4800bps~115200bps
RS-422: 9 PIN D-SUB male
RS-485: 5-Pin removal terminal
Extension Slot The slot for program copy card
Power 24V DC input
Battery Cover - DC 3V battery for HMI
E
x
t
e
r
n
a
l

I
n
t
e
r
f
a
c
e

5-Pin Removable
Terminal
There are DC 24V input and RS-485 input
1. Product Over vi ew

1- 11
1.8 ELCSoftGP Programming Software
ELCSoftGP programming software configures all ELC graphic panels. With ELCSoftGP, applications
can be created, edited, downloaded, uploaded, etc. Move programs from one controller to a different
one with ease.
Requirements:
Operating Systems Windows 98, Windows Me, Windows 2000, Windows XP.
Hard Drive At least 100Mbytes
RAM At least 256Mbytes

ELCSoftGP screen shot displaying editing environment.
ELC Syst em Manual

1- 12
MEMO


2- 1
Getting Started
The Eaton Logic Controller (ELC) is easy to use and easy to set up. This chapter will
show the quick method to connect an ELC to a PC, and upload, and download an ELC
program using ELCSoft.

This Chapter Contains

2.1 Connect ELC Power ................................................................................................................. 2-2
2.2 Connect ELC to a PC................................................................................................................ 2-2
2.3 Connect ELC to the ELC-HHP................................................................................................. 2-4
2.4 Current Consumed by the Control Unit ................................................................................. 2-5
2.5 I/O Allocation............................................................................................................................. 2-7
2.5.1 Digital Input/Output Extension Unit ............................................................................... 2-7
2.5.2 Analog Input/Output Extension Unit .............................................................................. 2-8
2.6 Install ELCSoft .......................................................................................................................... 2-9
2.7 Enter this program................................................................................................................. 2-10
2.8 Download the Program.......................................................................................................... 2-10
2.9 Monitor the Program.............................................................................................................. 2-10
ELC Syst em Manual

2- 2
2 Getting Started
2.1 Connect ELC Power
All ELC controllers operate from 24VDC. If the proper voltage is not available from the application, it
can be provided from one of the ELC-PS0x power supplies. Simply wire the ELC as shown using the
power cable ELC-CBPWR and plug it into the bottom of the ELC.
Once power is properly supplied to the ELC, it is ready for the next step.
24VDC Power Cable
(ELC-CBPWR)
ELC-Pxxxxxxx
L
N
Red 24VDC
Black 0V
Green
RS-485
85~264V AC
ELC-PS01



2.2 Connect ELC to a PC
ELC is easy to connect to a PC by attaching one end of the ELC-CBPCELC3 or ELC-CBPCELC1 to
the 9-pin serial port of the PC RS-232 Communication port, and then connect the other end to the DIN
port on the front of the ELC.
ELC communications - Settings when shipped from the factor

Default value ASCII mode
Baud rate: 9600bps
Character bit: 7 bits
Parity check: Even
Stop bit: 1 bit
2. Get t i ng Start ed

2- 3
Connection between ELC processors and personal computer)
ELC-CBPCELC1
RS-232 port
ELC-CBPCELC3 or
Programming
Port
TO PC
6
7
4
8
1
3
5
2

Pin no. Abbrev.
1 +5V
2 +5V
3 GND
4 Rx
5 Tx
6 GND
7 NC
8 GND


Detailed Specifications of Cables
ELC-CBPCELC3:
CN1 CN2
6
4
5
2
1
3
7
8
CN1
1 6
5 9
Unit: mm
Mini DIN 8 pin male D-sub 9 pin female
PC/HMI COM Port ELC COM1 Port
GND GND
1 +5V
2 +5V
1
4
6
7
8
1
4
6
7
8
Rx
Tx
Tx
Rx
2
3
5
5
4
8


ELC-CBPCELC1:
Unit: mm
1 6
5 9
1
2
3
5
6
7
8
Mini DIN 8 pin male D-sub 9 pin female
PC/HMI COM Port ELC COM1 Port
GND GND
1 +5V
2 +5V
1
4
6
7
8
1
4
6
7
8
Rx
Tx
Tx
Rx
2
3
5
5
4
8

ELC Syst em Manual

2- 4
2.3 Connect ELC to the ELC-HHP
C0
Y0
C1
Y1
RUN
X5
X7
X6
X4
X3
BAT.LOW
POWER
ERROR
RUN
X0
X2
X1
s
s s
s
N:\EATON\VK-WHITE-ELC.j pg
C0
E
L
C
-
E
X
0
8
N
N
D
R
PC12 EX08 EX16 AN04
X0
POWER
N:\EATON\VK-WHITE-ELC.j pg
E
L
C
-
E
X
1
6
N
N
D
R
Y5
Y6
Y7
Y3
Y4
Y0
Y1
Y2
C0
POWER
L.V
Y2

C3
Y3
C2
Y1
Y0
C1
L.V

X1
X2
X3
X5
X6
X7
X3
X4
X0
X2
X1
s
s
N:\EATON\VK-WHITE-ELC.j pg
E
L
C
-
A
N
0
4
N
A
N
N
ELC-CBHHELC15
CABLE:
ELC-HHP
STOP
R
S
-2
3
2
R
S
-4
8
5 0
1
C2
E
L
C
-
P
C
1
2
N
N
D
R
Y2
Y3

2. Get t i ng Start ed

2- 5
2.4 Current Consumed by the Control Unit
The current consumed at the power supply connector of the control unit is the sum of the current
consumed by of the various units being used.
Type
Current consumption
(at 24V DC)
ELC-PA10AADR/T 210 mA or less
ELC-PB14NNDR/T 150 mA or less
ELC-PC12NNDR/T 150mA or less
ELC-PC12NNAR 150mA or less
ELC-PH12NNDT 170mA or less
Control unit
ELC-PV28NNDR/T 220mA or less
ELC-EX08NNDN 50mA or less
ELC-EX08NNAN 50mA or less
ELC-EX08NNNR/T 70mA or less
ELC-EX08NNDR/T 70mA or less
ELC-EX16NNDR/T 90mA or less
ELC-EX06NNNI 70mA or less
ELC-EX08NNSN 20mA or less
ELC-CODNET 70mA or less
Digital Input/Digital Output
extension unit
ELC-COPBDP 50mA or less
Handheld Programmer ELC-HHP 70mA or less

Current consumed when the unit requires an external power supply
With an analog I/O unit, it is necessary to provide a power supply do drive internal circuits.
Type
Current consumption
(at 24V DC)
ELC-AN02NANN 125mA or less
ELC-AN04ANNN 90mA or less
ELC-PT04ANNN 90mA or less
ELC-TC04ANNN 90mA or less
ELC-AN06AANN 90mA or less
ELC-AN04NANN 170mA or less
Analog Input/Output and
Motion control extension
unit
ELC-MC01 110mA or less
ELC-CODNETM 100mA or less
Network extension unit
ELC-COENETM 65mA or less
ELC Syst em Manual

2- 6
Example: System Combination as below:
C0
Y0
C1
Y1
RUN
X5
X7
X6
X4
X3
BAT.LOW
POWER
ERROR
RUN
X0
X2
X1
s
s s
s
N:\EATON\VK-WHITE-ELC.j pg
C0
E
L
C
-
E
X
0
8
N
N
D
R
PC12 EX08 EX16 AN04
X0
POWER
N:\EATON\VK-WHITE-ELC.j pg
E
L
C
-
E
X
1
6
N
N
D
R
Y5
Y6
Y7
Y3
Y4
Y0
Y1
Y2
C0
POWER
L.V
Y2

C3
Y3
C2
Y1
Y0
C1
L.V

X1
X2
X3
X5
X6
X7
X3
X4
X0
X2
X1
s
s
N:\EATON\VK-WHITE-ELC.j pg
E
L
C
-
A
N
0
4
N
A
N
N
ELC-CBHHELC15
CABLE:
ELC-HHP
STOP
R
S
-23
2
R
S
-48
5 0
1
C2
E
L
C
-
P
C
1
2
N
N
D
R
Y2
Y3

At power supply connector
of analog unit AN04
Type
Current
consumption
ELC-AN04NANN 170mA
Power consumption calculation:
At power supply connector of control unit PC12
Type Current consumption
ELC-PC12 250mA
ELC-EX08NNDR 70mA
ELC-EX16NNDR 90mA
ELC-AN04NANN 170mA
ELC-HHP 70mA
Total current consumption 650mA
2. Get t i ng Start ed

2- 7
2.5 I/O Allocation
2.5.1 Digital Input/Output Extension Unit
I/O numbers automatically by the ELC controllers when an extension I/O unit is added. The I/O
allocation of extension I/O unit is determined by the installation location. No matter how many points of
ELC controllers, the input of the first I/O extension unit will start from X20, output will start from Y20.
System Combination Example:
Extension unit ELC Model
Input
points
Output
points
Input
numbering
Output
numbering
First extension ELC-EX08NNDN 8 0 X20~X27 -
Second extension ELC-EX06NNNI 0 6 - Y20~Y25
Third extension ELC-EX16NNDR 8 8 X30~X37 Y30~Y37
Fourth extension ELC-EX08NNNR 0 8 - Y40~Y47
Fifth extension ELC-EX08NNDR 4 4 X40~X43 Y50~Y53
BAT.LOW
STOP
RUN
Y1
s
X0
RUN
POWER
s
Controller
First extension unit

X3
X2
s POWER
L.V
X0
s
Fifth extension unit
Fourth extension unit
Third extension unit
Second extension unit
ERROR
R
S
-2
3
2
1
0
R
S
-4
8
5
X3
X1
X2
X6
X7
X5
X4
C1
Y0
C0
Y3
Y2
C2
E
L
C
-
P
C
1
2
N
N
D
R
E
L
C
-
E
X
0
8
N
N
D
N
POWER s
s
X4
X6
X7
X5
X1
X0
X2
X3
L.V
Y7
Y3
Y2
Y4
Y5
Y6
Y1
Y0
C0
POWER
L.V
E
L
C
-
E
X
0
8
N
N
N
R
E
L
C
-
E
X
0
6
N
N
N
I
C5

Y5
C4
Y4

Y3

C2

Y2
C3
Y0

C1
Y1
C0
X1
X7
C0
Y0
Y1
X5
X4
X3
X2
X6
POWER
L.V
X0
s
s
E
L
C
-
E
X
1
6
N
N
D
R
Y2
Y7
Y6
Y5
Y4
Y3
E
L
C
-
E
X
0
8
N
N
D
R

Y2
Y1
C2
Y3
C3
X1

C1
C0
Y0

Note:
1. The second extension unit ELC-EX06NNNI will be used as 8 outputs, the higher 2 numbers of
output points have no corresponding output points.
2. The fifth extension unit ELC-EX08NNDR will be used as 8 input points/8 output points, the higher
part numbers of inputs points and output points have no corresponding input/output points. It is
recommended to place them at the end of serial wiring, so that I/O points numbering will be
continuous.
ELC Syst em Manual

2- 8
2.5.2 Analog Input/Output Extension Unit
The I/O allocation of the analog I/O unit is determined by the installation location. A maximum of eight
analog I/O extension units can be connected to one control unit.
There are no restrictions on the combination of different types(digital or analog) of extension units.
Extension unit ELC Model
Input
points
Output
points
Input
numbering
Output
numbering
First extension ELC-EX08NNDN 8 0 X20~X27 -
Second extension ELC-AN06AANN - - - -
Third extension ELC-EX16NNDR 8 8 X30~X37 Y20~Y27
Fourth extension ELC-AN04ANNN - - - -
Fifth extension ELC-EX08NNDR 4 4 X40~X43 Y30~Y33
The second extension(ELC-AN06AANN) will be numbered as 0, and the fourth extension(ELC-
AN04ANNN) will be numbered as 1. Please refer to chapter 6, API 78(FROM), 79(TO) for more
detailed information about data accessing.
System Assembly Example:
E
L
C
-
E
X
0
8
N
N
D
N
POWER s
s
X4
X6
X7
X5
X1
X0
X2
X3
L.V
E
L
C
-
E
X
1
6
N
N
D
R
Y2
Y7
Y6
Y5
Y4
Y3
X1
X7
C0
Y0
Y1
X5
X4
X3
X2
X6
POWER
L.V
X0
s
s
E
L
C
-
E
X
0
8
N
N
D
R

Y2
Y1
C2
Y3
C3
X1

C1
C0
Y0

X3
X2
s POWER
L.V
X0
s
Fifth extension unit
Fourth extension unit
Third extension unit
Second extension unit
Controller
E
L
C
-
A
N
0
6
A
A
N
N
POWER
E
L
C
-
A
N
0
4
A
N
N
N
First extension unit
ERROR
R
S
-2
3
2
1
0
R
S
-4
8
5
X3
X1
X2
X6
X7
X5
X4
C1
Y0
C0
Y3
Y2
C2
E
L
C
-
P
C
1
2
N
N
D
R
BAT.LOW
STOP
RUN
Y1
s
X0
RUN
POWER
s

2. Get t i ng Start ed

2- 9
2.6 Install ELCSoft
Install ELCSoft on the PC and it is now ready to start communicating with the attached ELC.



2. Get t i ng Start ed

2- 10
2.7 Enter this program




2.8 Download the Program
After entering the program above, select compile . Then, select Communication from the menu
bar, select Transfer setup, use the drop down button to select Write to ELC. ELCSoft will attempt to
automatically match the settings of the ELC. Once communication is established, follow any
instructions till the program is uploaded.


2.9 Monitor the Program
Make sure the ELC is in RUN mode, select Communication from the menu bar, and select Ladder
Start Monitoring. You should see something like the example below.


3. I nstal l at i on

3- 1
Installation
The ELC is easy to install. Keep in mind the safety, clearance, proper wiring, power
budget, and proper grounding.

This Chapter Contains

3.1 ELC Mounting and Clearance.................................................................................................. 3-2
3.2 Installing Modules .................................................................................................................... 3-3
3.3 DIN Rail Installation.................................................................................................................. 3-4
3.4 Wiring......................................................................................................................................... 3-5
3.4.1 Safety Instructions......................................................................................................... 3-5
3.4.2 ELC Protection .............................................................................................................. 3-6
3.4.3 Wiring the Power Supply/RS-485 to the control Unit .................................................... 3-7
3.4.4 Grounding...................................................................................................................... 3-7
3.4.5 Wiring the Terminal Block Socket .................................................................................. 3-8
3.4.6 Input Point Wiring .......................................................................................................... 3-9
3.4.7 Output Point Wiring ..................................................................................................... 3-12
3.5 Dimensions ............................................................................................................................. 3-15
3.6 Terminal Layouts .................................................................................................................... 3-20
ELC Syst em Manual

3- 2
3 Installation
3.1 ELC Mounting and Clearance
When installing the ELC, make sure that it is installed in an enclosure with sufficient space (as shown
below) to its surroundings to allow proper heat dissipation.
Installation of the ELC products has been designed to be safe and easy. Whether the
products associated with this manual are used as a system or individually, they must be
installed in a suitable enclosure. The enclosure should be selected and installed in
accordance to the local and national standards.
The ELC should be mounted on a vertical position. To prevent a rise in temperature, units
should always be mounted on the back wall of an enclosure. Never mount ELC to the
floor or ceiling of the enclosure.
Do not install units in areas with excessive or conductive dust, corrosive or flammable
gas, moisture or rain, excessive heat, regular impact shocks or excessive vibration.
Do not allow debris to fall inside the unit during installation, e.g. cut wires, shavings etc.
Always ensure that units are kept as far as possible from high-voltage cables and
equipment.
X5
X7
C0
X6
X0
X4
X3
X2
X1
RUN
STOP
RUN
ERROR
POWER
BAT.LOW
Y0
C1
R
S
-
2
3
2
Y1
C2
Y2
Y3
R
S
-
4
8
5
1
0
E
L
C
-
P
C
1
2
N
N
A
R
C0M
D A
ERROR
POWER
C
H
1
I +
COM
V+
C
H
2
V+
I +
COM
C
H
3
V+
I +
COM
C
H
4
V+
I +
COM
C
H
5
V+
V+
C
H
6
I +
I +
COM
COM
Y1
Y3
Y0
Y2
Y4
Y5
Y6
Y7
C0
X6
X7
X1
X2
X3
X4
X5
s
s
X0
L.V
POWER
E
L
C
-
E
X
1
6
N
N
D
T
Y0
C0
X1
X2
X3
s
s
X0
L.V
POWER
C3
Y3
C1
C2
Y1
Y2
\U+25CF
\U+25CF
\U+25CF
\U+25CF
\U+25CF
E
L
C
-
E
X
0
8
N
N
D
T
2.0" (54mm)
2.0" (54mm)
2.0" (54mm)
2.0" (54mm)
3. I nstal l at i on

3- 3
3.2 Installing Modules
Before you install or remove any modules ensure power to the ELC and any surrounding equipment
has been removed.
Installing or removing ELC modules or surrounding equipment with power applied could cause electric
shock or equipment failure.
Always install the unit orientated with the programming port facing outward on the bottom in order to
prevent the generation of heat.
Programming port


System Assembly
The ELC should only be installed on a proper DIN rail. Combine modules together to complete the
required system I/O. Remove the expansion port cover and lift up on the top and bottom locking
connecters of the module on the left.
Mate to the next desired module by lining up the alignment pins and expansion port. When the
modules are fully seated, snap down the locking connecters to hold the modules together. Continue
this process until the all required modules have been combined.
There is no order to the placement of modules. Order the modules according to the needs of the
application.
Procedure:
1. Open the extension cover on the side of the
unit with a screw driver so that the external
connector is exposed.


ELC Syst em Manual

3- 4
2. Raise the extension hooks on the top and
bottom sides of the unit with a screwdriver.

3. Align the pins and holes in the four corners of
the control unit and extension unit, and insert
the pins into the holes so that there is no gap
between the units.

4. Press down the expansion hooks raised in
step 2 to secure the unit.


3.3 DIN Rail Installation
The ELC should be secured in a cabinet using a standard DIN rail 35mm high with a depth of 7.5mm.
To reduce the chance of the wires being pulled loose use end brackets to stop any side-to-side motion
of the ELC.
Secure the ELC to the DIN rail with the retaining clip located bottom of the ELC. Mount the ELC on the
DIN rail and push up the clip to lock the ELC in place.
3. I nstal l at i on

3- 5
Procedure:
1. Fit the upper book of the ELC unit onto the
DIN rail.
2. Without moving the upper hook, press the
lower hook to fit the ELC unit into position
2
1
DIN rail
Mounting panel ELC unit

To remove, pull down the retaining clip and pull the ELC away from the DIN rail.

Procedure:
1. Insert a slotted screwdriver into the DIN rail
attachment lever
2. Pull the attachment lever downwards
3. Lift up the ELC unit and remove it from the
rail
2
1
3
ELC unit
DIN rail
lever


3.4 Wiring
3.4.1 Safety Instructions
1. Use 22-16AWG (1.5mm) wiring (either single or multiple core) for wiring terminals.
2. ELC terminal screws should be tightened to 1.7 in-lbs (1.95 kg-cm).
3. Ensure the power is at the ELC terminals is 24VDC (20.4VDC~28.8VDC). Voltage lower than
20.4VDC will cause the ELC to stop operating, all outputs will turn off and the ELC ERROR LED
will flash continuously.
4. ELC has a momentary power ride-through of 10ms. A power drop less than 10ms will not have
any effect. A power drop longer than 10ms, ELC will stop operating and turn all the outputs off.
Once power is restored, the ELC will resume operation.
5. Use surge suppression as necessary.
6. Connect the AC input (100Vac to 240Vac) to terminals L and N. Any AC voltage connected to
the +24V terminal or input points will permanently damage the ELC.
7. Avoid creating sharp bends in the wires.
8. Avoid running DC wiring in close proximity to AC wiring.
9. To minimize voltage drops on long wire runs, consider using multiple wires for the return line.
ELC Syst em Manual

3- 6
10. Avoid running input wiring close to output wiring where possible.
11. Avoid running wires near high power lines.
12. Use wire trays for routing where possible.
13. Use the shortest possible wire length.
14. Always use a continuous length of wire. Do not splice wires to attain a needed length.
15. DO NOT use the terminal in ELC.
16. Input and output signal wires should not run through the same multi-wire cable, conduit, or near
high voltage cables.
17. All low voltage wires should cross high voltage cables at 90when possible.

3.4.2 ELC Protection
To protect your investment, it is common to implement a protective circuit similar to the one shown here.
MC
MC
1
2
3
L N
5
4
1
24V 0V
8
Guard
Limit
6
MC
7
24V 0V


1 Switched AC Power for AC loads
2 Power Circuit Protection Fuse (3A)
3 Power On indicator
4 Emergency stop
5 Normally open contactor
6 DC Power supply
7 ELC
8 Power supply: AC: 100~240VAC, 50/60Hz
3. I nstal l at i on

3- 7
3.4.3 Wiring the Power Supply/RS-485 to the control Unit
Use the power supply cable (ELC-CBPWR) and 2-pin pluggable terminal with external connecting
twisted wire that comes with the unit to connect the power and communication devices.
RS-485 Cable
Connector
24V DC
Green
(Signal Earth)
Power Supply
(ELC-CBPWR)
Cable
(ELC-CB485)
RS-485 +
Black
RS-485 -
Red
Power Supply
Connector
RS-485
Red
Black
0V
2 pin
removable terminal

Note:
1. To minimize adverse effects from noise, twist the red and black wires of the power supply cable;
also twist the RS-485 communication cable.
2. The regulator on the ELC unit is a non-insulated type.

3.4.4 Grounding
1. Use wires 20-16AWG (1.6mm) or above for the grounding of the ELC.
Ground wires must not be a smaller diameter than input wires.
2. Ensure good grounding by wiring all commons to the same grounding
point.
3. Ground wires should be as short as possible.
4. Use Copper Conductor Only, 60
22-16AWG
<1.5mm
ELC Syst em Manual

3- 8
3.4.5 Wiring the Terminal Block Socket
A screw-down connection type terminal block socket for the
terminal of the ELC controllers and special I/O unit is used.
The terminal block socket and suitable wires are given below.
Suitable wire
Terminal block socket
Procedure:
1. Remove a portion of the wires insulation
2. Insert the wire into the terminal block socket until it
contacts the back of the block socket, and then tighten
the screw clockwise to fix the wire in place.
wire

3. I nstal l at i on

3- 9
3.4.6 Input Point Wiring
24V DC input Specifications
PA/PB/PC/PH Control Unit PV Control Unit
Digital Input
Extension Unit
X0~X7, X10, X11 X0~X17 X20 and above
Input Type
DC (SINK or SOURCE)
Input Current
24VDC 5mA
On/Off State
Voltage Range
X0,X1,X10,X11:
OffOn 16.5VDC
X2~X7:
OffOn 18.5VDC
X0~X11:
OnOff8VDC
X0~X7,X12~X13,X16~X17:
OffOn 16.5VDC
X10~X11,X14~X15:
OffOn 18.5VDC
X0~X17:
OnOff8VDC
OffOn 16.5VDC
OnOff 8VDC
Responding
Time
X0~X7:
10ms (factory default),
0~20ms adjustable. Refer
to the usage of special
registers D1020.
X10, X11:
0 times (factory default),
0~1,000 times adjustable.
Refer to the usage of
special registers D1021.
X0~X17:
10ms (factory default),
0~60ms adjustable. Refer
to the usage of special
registers D1020,D1021.
10 ms
ELC input points can be configured for either sink or source operation. Each module that contains
inputs will have a S/S (Sink/Source) input pin. Connect the S/S to either 24VDC or 0VDC to select the
desired operation.
Sink = Current flows into S/S Source = Current flows out of S/S
S/S
X0
Sinking
Controller
+24V

S/S
X0
Sourcing
Controller
+24V


ELC Syst em Manual

3- 10
Typical Wiring
a) Sink Equivalent Circuit
+24V 0V
DC Power Supply
Sink mode
S/S
X0
+5V


b) Sink User wiring
+24V 0V
DC Power Supply
S/S X0 X1 X2
Sink mode


c) Source Equivalent Circuit
+24V 0V
DC Power Supply
Source mode
S/S
X0
+5V

3. I nstal l at i on

3- 11
d) Source User wiring
+24V 0V
DC Power Supply
S/S X0 X1 X2
Source mode


AC110V input Control Unit and Extension Units
Input Circuit Connection 110V AC Input Specifications
Input voltage 100~120VAC(-15%~+10%)
Input impedance 21Kohm/50Hz 18Kohm/60Hz
Input current
4.7mA 100VAC/50Hz
6.2mA 110VAC/60Hz
OFFON/ONOFF 80V 3.8mA/30V 1.7mA
Response time 25ms COM X0 X1 X2
ELC-12PCNNAR
85~132VAC
50/60Hz
Circuit
isolation/Operation
indication
Photocoupler/LED On
ELC Syst em Manual

3- 12
3.4.7 Output Point Wiring
Output Specifications
Output Type
Item
Relay-R Relay-R (Note 1) Transistor-T
Current Spec. 1.5A/1 point (5A/COM) 6A/1 point
55 0.1A/1 point,
40 0.3A/1 point
Voltage Spec.
250VAC, below
30VDC
250VAC, below
30VDC
30VDC
75VA (Inductive) 240VA (Inductive)
Max. Loading
90 W (Resistive) 270 W (Resistive)
9W
Response Time About 10 ms About 10 ms OffOn 15us OnOff 25us
Note 1: Only for model ELC-EX06NNNI

Relay Output Example-Typical Relay Output Wiring Diagram
MC2 MC1
9
10
C0 C1 Y0 Y4 C2 Y2 Y3 Y5 Y1
5 2
3 7
8
1
6
7
2
5 4
MC2 MC1


1 Do not use this terminal
2 Fuse
3 Reverse-current protection diode, Note 1
4 External Mechanical Interlock, Note 2
5 Emergency stop
6 Surge absorber(0.1uf capacitor+100~120ohm resistor, Note 3
7 Inductive load
8 Incandescent lamp
9 DC power Supply
10 AC power Supply
3. I nstal l at i on

3- 13
Note:
1. This ELC does not have any internal protection circuitry on the relay outputs. For switching direct
current on inductive loads, a reverse-current protection diode should be installed in parallel with
the load. The relay contact life decreases significantly if this is not done.
The reverse-current protection diode needs to satisfy the following specifications.
The diode is rated for maximum reverse voltage of 5~10 times the load voltage.
The forward current is more that the load current
2. Ensure all loads are applied to the same side of each ELC output, see above figure. Loads which
should NEVER simultaneously operate(e.g. direction control of a motor), because of a critical
safety situation, should not rely on the ELCs sequencing alone. Mechanical interlocks MUST be
fitted to all critical safety circuits.
3. This ELC does not have any internal protection circuitry on the relay output. For switching AC on
inductive loads, a surge absorber (0.1uF + 100ohm to 120ohm) should be installed in parallel
with the load. The relay contact life decreases significantly if this is not done. Besides protecting
the internal circuity of the ELC, a surge absorber decreases the noise emissions to the load.

Transistor Output Example-Typical Transistor Output Wiring Diagram
MC2 MC1
C0 C1 Y0 Y4 C2 Y2 Y3 Y5 Y1
5 7 8
1
6
6
4
MC2 MC1
2
3
3
9


1 Do not use this terminal
2 Emergency Stop
3 Fuse
4 External Mechanical Interlock
5 DC Power Supply
6 Incandescent Lamp
7 Reverse-current protection diode, Note 1
8 Inductive load, Note 2
9 Resistive load
ELC Syst em Manual

3- 14
Note:
1. Ensure all loads are applied to the same side of each ELC output, see above figure. Loads which
should NEVER simutaneously operate (e.g. direction control of a motor), because of a critical
safety situation, should not rely on the ELCs sequencing alone. Mechanical interlocks MUST be
fitted to all critical safety circuits.
2. Transistor outputs use internal zener diode(39V) as protection circuitry. When driving the
inductive load with transistor output, a reverse-current protection diode can be installed in parallel
with the load if necessary.
The reverse-current protection diode needs to satisfy the following specifications.
The diode is rated for maximum reverse voltage of 5 to 10 times the load voltage.
The forward current is more than the load current.
3. Be sure to monitor the use of common terminals when wiring outputs. The ratio of common
terminal to output terminals is not the same on all modules with ouptuts. Some outputs share
common termianls. The output terminal Y0 uses one common terminal C0, Y1 uses C1, and
Y2~Y3(Y5) share C2, as shown below.
PB Series: PC Series:
Y0
C0
Y1
C1
Y2
Y3
Y4
Y5
C2

Y0
C0
Y1
C1
Y2
Y3
C2


3. I nstal l at i on

3- 15
3.5 Dimensions
Model Dimensions
ELC-PA10AADR
ELC-PA10AADT
ELC-PC12NNAR
ELC-PC12NNDR
ELC-PC12NNDT
ELC-PH12NNDT
STOP STOP
EXTENSION
PORT
RUN RUN
RUN
ERROR
POWER
BAT.LOW BAT.LOW
POWER
ERROR
RUN
E
L
C
-
P
R
S
-2
3
2
R
S
-4
8
5

ELC
Controller
ELC-PB14NNDR
ELC-PB14NNDT
EXTENSION
PORT
RUN
POWER
RUN
ERROR
E
L
C
-
P
B

ELC Syst em Manual

3- 16
ELC
Controller
ELC-PV28NNDR
ELC-PV28NNDT
ELC-PV28NNDR

3. I nstal l at i on

3- 17
Model Dimensions
ELC-PS01
13.3 60
336.5
ELC-PS01
9
0

DC
Power
Supply
ELC-PS02
ELC-PS02
13.3 60
1
0
0
55
9
0
32.7
3
ELC Syst em Manual

3- 18
Model Dimensions
E
L
C
-
E
X
EXTENSION
PORT
POWER POWER
L.V L.V

Expansion
Modules
All I/O Modules
Including Specialty
Modules
E
L
C
-
E
X
EXTENSION
PORT
L.V
POWER

3. I nstal l at i on

3- 19
ELC-CODNETM
9
0
60 33
3
1
4
2
6
9
0
5
4 6 5
DR 1
IN 0
IN 1
DR 0
x10
x10
POWER
MS
3
NS
7
8
7
8
1
2
3
0
9
3
E
L
C
-
C
O
D
N
E
T
M

Expansion
Modules
ELC-COENETM
3
100M
RS-232
LINK
POWER
RS-232
33
3
LAN
E
L
C
-
C
O
E
N
E
T
M
9
0
60

ELC Syst em Manual

3- 20
3.6 Terminal Layouts
ELC-PB14NNDR ELC-PB14NNDT ELC-PA10AADR ELC-PA10AADT
E
L
C
-
P
B
1
4
N
N
D
R
RUN
STOP
POWER
ERROR
RUN

E
L
C
-
P
B
1
4
N
N
D
T
RUN
STOP
POWER
ERROR
RUN

RUN
RUN
BAT.LOW
ERROR
POWER
STOP
R
S
-
4
8
5
R
S
-
2
3
2
E
L
C
-
P
A
1
0
A
A
D
R
CH0
CH1
CH0
CH1
D/A
A/D
Y0
Y1
X2
C0

X3
X0
X1
s
s
X2
Y0
Y1
X3
X1
X0
D A
0+ I
I 0+
V1+
1+ I
COM
V1+
I 1+
V0+
ALARM
V0+
R
S
-
2
3
2
R
S
-
4
8
5

RUN
BAT.LOW
ERROR
POWER
STOP
RUN
E
L
C
-
P
A
1
0
A
A
D
T
CH0
CH1
CH0
CH1
D/A
A/D
Y0
Y1
X2
C0

X3
X0
X1
s
s
X2
Y0
Y1
X3
X1
X0
D A
0+ I
I 0+
V1+
1+ I
COM
V1+
I 1+
V0+
ALARM
V0+
R
S
-
2
3
2
R
S
-
4
8
5


ELC-PC12NNAR ELC-PC12NNDR ELC-PC12NNDT ELC-PH12NNDT
RUN
BAT.LOW
POWER
ERROR
RUN
STOP
0
1
E
L
C
-
P
C
1
2
N
N
A
R
X2
R
S
-
4
8
5
R
S
-
2
3
2
Y1
Y3
Y2
C2
X7
C1
Y0
C0
X3
X4
X6
X5
C0M
X1
X0

1
E
L
C
-
P
C
1
2
N
N
D
R
RUN
STOP
0
C1
R
S
-
2
3
2
R
S
-
4
8
5
Y1
Y3
Y2
C2
X6
X7
Y0
C0
X2
X3
X4
X5
s
s
X1
X0
BAT.LOW
POWER
ERROR
RUN

C1
R
S
-
2
3
2
R
S
-
4
8
5
Y1
Y3
Y2
C2
X6
X7
Y0
C0
X2
X3
X4
X5
s
s
X1
X0
1
E
L
C
-
P
C
1
2
N
N
D
T
RUN
BAT.LOW
POWER
ERROR
RUN
STOP
0

0
1
E
L
C
-
P
H
1
2
N
N
D
T
C3

Y0
C0
Y1
C1
C2
s
s
RUN
BAT.LOW
ERROR
STOP
RUN
X5
X4
X0
X1
X3
X2
POWER
X11
X10
Y11
Y10
C1
Y0
Y1
C2
s
s
X11
X4
X5
X10
X5
X11
X10
X4
X0
X0
X1
X1
X3
X3
X2
X2
R
S
-
2
3
2
R
S
-
4
8
5
C3
Y11

Y11
Y10
Y10
Y0
C0
Y1


3. I nstal l at i on

3- 21
ELC-PV28NNDR ELC-PV28NNDT
ELC-PV28NNDR

ELC-PV28NNDT


ELC-PS01 ELC-PS02 ELC-EX06NNNI ELC-EX16NNDR
ELC-PS01

ELC-PS02

C5
Y5

C4
Y4

Y3

C3

Y2
C2

C1
Y1
Y0

C0
E
L
C
-
E
X
0
6
N
N
N
I

X7
X6
X3
X4
X0
X2
X1
s
s
E
L
C
-
E
X
1
6
N
N
D
R
Y5
Y7
Y6
Y3
Y4
Y0
Y2
Y1
C0
POWER
L.V
X5


ELC Syst em Manual

3- 22
ELC-EX16NNDT ELC-EX08NNAN ELC-EX08NNDN ELC-EX08NNDT
X7
X6
X3
X4
X0
X2
X1
s
s
E
L
C
-
E
X
1
6
N
N
D
T
Y5
Y7
Y6
Y3
Y4
Y0
Y2
Y1
C0
POWER
L.V
X5

X6
E
L
C
-
E
X
0
8
N
N
A
N
X7
C0M
POWER
L.V
X1
X4
X5
X3
X2
X0

POWER
L.V
X3
X7
X6
X4
X5
X2
X1
s
X0
E
L
C
-
E
X
0
8
N
N
D
N
s

E
L
C
-
E
X
0
8
N
N
D
T
C2
Y3

C3
Y2
C1
Y1
Y0
C0
L.V
POWER
X3

X1
X2
s
X0


ELC-EX08NNDR ELC-EX08NNNT ELC-EX08NNNR ELC-PT04ANNN
s
C0
E
L
C
-
E
X
0
8
N
N
D
R
Y2

C3
Y3
C2
Y1
Y0
C1
L.V

X1
X2
X3
X0
POWER

C0
E
L
C
-
E
X
0
8
N
N
N
T
Y2
Y3
Y0
Y1
Y7
Y6
Y5
Y4
L.V
POWER

C0
E
L
C
-
E
X
0
8
N
N
N
R
Y2
Y3
Y0
Y1
Y7
Y6
Y5
Y4
L.V
POWER

E
L
C
-
P
T
0
4
A
N
N
N



3. I nstal l at i on

3- 23
ELC-TC04ANNN ELC-AN02NANN ELC-AN04ANNN ELC-AN06AANN
E
L
C
-
T
C
0
4
A
N
N
N

E
L
C
-
A
N
0
2
N
A
N
N

E
L
C
-
A
N
0
4
A
N
N
N


E
L
C
-
A
N
0
6
A
A
N
N
POWER


ELC-485APTR ELC-08NNSN ELC-CODNET ELC-COPBDP
C
O
M
2
C
O
M
1
E
L
C
-
4
8
5
A
P
T
R

E
L
C
-
E
X
0
8
N
N
S
N
7
6
5
1
X2
4
3
2
X7
X6
X5
X4
X3
0
ON
X0
X1

MS
POWER
0
1
7
88
7
6
66
9
7
8
9
6
9
9
8
7
x10
x10
DR 0
DR 1
IN 1
IN 0
E
L
C
-
C
O
D
N
E
T
55
5
0
5
0
00
44
3
2
4
1
3
2
1
2
1
2
3
4
1
3
NS

E
L
C
-
C
O
P
B
D
P
x16
x16
NET
POWER
0
1


ELC Syst em Manual

3- 24
ELC-MC01 ELC-CODNETM ELC-COENETM

LSP
LSN
B
A
PG0
CLR
FP
RP
POWER
s
s
L.V
ERROR
STOP
DOG
START
E
L
C
-
M
C
0
1

NS
9
6
9
6
3
2
0 1
3
4
2
5
0 1
4
5
DR 1
DR 0
IN 1
IN 0
x10 8
7
7
x10 8
POWER
MS
E
L
C
-
C
O
D
N
E
T
M

RS-232
POWER
E
L
C
-
C
O
E
N
E
T
M
LAN
100M
RS-232
LINK




4- 1
ELC Concepts
This chapter will cover many basic and advanced concepts of ladder logic. If you are
familiar with these standard concepts, you should be able to move to the next chapter.
You can always return if something is not understood.

This Chapter Contains

4.1 ELC Scan Method..................................................................................................................... 4-2
4.2 Current Flow.............................................................................................................................. 4-3
4.3 Contact A, Contact B................................................................................................................ 4-4
4.4 ELC Registers and Relays....................................................................................................... 4-4
4.5 Ladder Logic Symbols............................................................................................................. 4-5
4.5.1 Creating an ELC Ladder Program................................................................................. 4-6
4.5.2 LD / LDI (Load / Load and Invert) Evaluation................................................................ 4-7
4.5.3 LDP / LDF (Load Raising edge / Load Falling edge) Evaluation................................... 4-8
4.5.4 AND / ANI (AND / AND and Invert) Evaluation.............................................................. 4-8
4.5.5 ANDP / ANDF (AND Raising edge / AND Falling edge) Evaluation.............................. 4-8
4.5.6 OR / ORI (OR / OR and Invert) Evaluation.................................................................... 4-8
4.5.7 ORP / ORF (OR Raising edge / OR Falling edge) Evaluation ...................................... 4-8
4.5.8 ANB (AND Block) Evaluation (HHP Only) ..................................................................... 4-8
4.5.9 ORB (OR Block) Evaluation (HHP Only)....................................................................... 4-9
4.5.10 MPS / MRD / MPP (Branch) Evaluations (HHP Only)................................................... 4-9
4.5.11 STL (Step Ladder) Evaluation ..................................................................................... 4-10
4.5.12 RET (Return Step) Evaluation..................................................................................... 4-10
4.6 Conversion of ELC Commands and Each Diagram Structure........................................... 4-11
4.7 ELC-HHP Programming Methods ......................................................................................... 4-12
4.8 Simplifying Ladder Logic....................................................................................................... 4-14
4.9 Basic Ladder Logic Examples............................................................................................... 4-17
ELC Syst em Manual

4- 2
4 ELC Concepts
4.1 ELC Scan Method
ELC utilizes a standard scan method when evaluating a user application.

The steps:
Read inputs Read the physical inputs into internal memory.
Evaluate user program
Evaluate the user program using internal memory starting with the top
rung, evaluating components left to right until the reaching the bottom
rung.
Write the outputs Write the internal memory to the physical outputs

X0
Y0
Y0
M0
Input X
Input terminal
Read in memory
Input signal memory
D
e
v
i
c
e
M
e
m
o
r
y
Read X0 state from memory
Write Y0 state into
Read Y0 state from memory
Write M0 state into
Output
Program
Input signal
output
Y output
Output terminal
Output latched memory

Input signal:
ELC reads the ON/OFF state of each input into
memory before evaluating the user program.
Once the external inputs are read into internal
memory. Any change at the external inputs will not
be reflected in the internal memory until the next
time (scan) the external inputs are copied into
internal memory.
Program:
ELC executes each command in program left to
right top to bottom placing any output ON/OFF
data into internal output memory. Some of this
memory is latched.
Output:
When the END command is reached the program
evaluation is complete. The output memory is
transferred to the external outputs.
4. ELC Concepts

4- 3
Scan time
These three steps (read, evaluate, write) make a single scan which when timed is called scan time.
Scan time in the ELC varies depending on amount of I/O and size of the user program. The general
rule is the scan time increases as I/O increases and as the user program increases in size.

Reading
Scan time
ELC will measure its own scan time and place the value (0.1ms
increments) in register D1010, minimum scan time in register D1011,
and maximum scan time in register D1012.
Measure
Scan time
Scan time can also be measured by toggling an output every scan, and
then measuring the pulse width on the output being toggled.
Calculate
Scan time
Scan time can be calculated by add the know time required for each
instruction of the user program. Timing information about each
instruction is provided in the instruction chapter of this manual.

Scan time exception
ELC controllers can process certain items faster than the scan time. Some of these items interrupts,
when received will halt the scan time to process the interrupt. A direct input/output command during
user program evaluation allows the ELC to access I/O immediately instead of waiting until the next
scan cycle.

4.2 Current Flow
Ladder logic principle follows a current path that must flow from left to right. In the example below,
current can flow through either the X0 or the X3 path because in both cases it flows from left to right.








Reverse Current
When current flow is allowed to flow from right to left, opposite of proper current flow an error will result
when compiling the user program. The example below displays reverse current flow.

X6
X0
Y0
X1 X2 Y0
X3 X4 X5
a
b


ELC Syst em Manual

4- 4
4.3 Contact A, Contact B

Contact A

Normally Open (NO) Contact
Contact B

Normally Closed (NC) Contact

4.4 ELC Registers and Relays
Internal to the ELC are memory locations of various sizes, functions, and names. Common names are
X, Y, M, S, T, and C.

X
(Relay)
X relay is the internal memory where an actual image of the external inputs is stored
each scan. This memory is bit memory and counts in an octal method. i.e. X0, X1,
X2X7, X10, X11X17, X20, X21.
Y
(Relay)
Y relay is the internal memory where an actual image of the external outputs is
stored each scan. This memory is bit memory and counts in an octal method. i.e.
Y0, Y1Y7, Y10, Y11Y17, Y20, Y21.
M
(Relay)
M relay is internal general working memory that can be used as needed to
successfully complete the application each scan. This memory is bit memory and
counts in a decimal method. i.e. M0, M1M9, M10, M11M19, M20, M21.
S
(Relay)
S relay is internal working memory (like M) when in Step Function Control (SFC)
mode instead of ladder mode. If SFC mode is not being used then these S relays
can be used as general working memory when in ladder mode. This memory is bit
memory and counts in a decimal method. i.e. S0, S1S9, S10, S11S19, S20,
S21.
T
(Relay)
(Word)
(Dword)
Timers (T) are general-purpose timers for measuring time. Depending on the timer
number, its resolution ranges from 1ms to 100ms and is either 16 bit or a 32 bit
timer. When the predefined timer value is reached the T relay of the same timer
number will be set to ON. This memory is a bit, word, or dword value and counts in a
decimal method. T0, T1T255.
C
(Relay)
(Word)
(Dword)
Counter (C) are general-purpose counters. Depending on the counter number, it
can be either a 16 bit or a 32 bit counter. When the predefined counter value is
reached the C relay of the same timer number will be set to ON. This memory is
either a bit, word, or dword value and counts in a decimal method. C0, C1C255.
4. ELC Concepts

4- 5
D
(Word)
D register is internal general working memory that can be used as needed to
successfully complete the application each scan. This memory is word memory and
counts in a decimal method. i.e. D0, D1D9, D10, D11D19, D20, D21.
E, F
(Word)
E, F registers are internal index registers that point to a memory area that can be
used as file storage. The E and F registers are the only way to access this storage
area. If not being used for file storage, it can be used as general-purpose memory.
This memory is word memory and counts in a decimal method. i.e. E0, E1, F0,
F1
File register
File storage area. There is not a direct letter X, Y, M, D, etc access to this memory. It
is accessed through read / write instructions

4.5 Ladder Logic Symbols
The following table displays list of ELCSoft symbols their description, command, and memory registers
that are able to use the symbol.

Ladder Diagram
Structure
Explanation Command Registers available for use

Contact A
Normally open (NO)
LD X, Y, M, S, T, C

Contact B
Normally close (NO)
LDI X, Y, M, S, T, C

Serial normally open
AND X, Y, M, S, T, C

Parallel normally open
OR X, Y, M, S, T, C

Parallel normally close
ORI X, Y, M, S, T, C

Rising-edge trigger
switch
LDP X, Y, M, S, T, C

Falling-edge trigger
switch
LDF X, Y, M, S, T, C

Rising-edge trigger in
serial
ANDP X, Y, M, S, T, C

Falling-edge trigger in
serial
ANDF X, Y, M, S, T, C
ELC Syst em Manual

4- 6
Ladder Diagram
Structure
Explanation Command Registers available for use

Rising-edge trigger in
parallel
ORP X, Y, M, S, T, C

Falling-edge trigger in
parallel
ORF X, Y, M, S, T, C

Block in serial
ANB None

Block in parallel
ORB None

Multiple output
MPS
MRD
MPP
None

Output command of coil
drive
OUT Y, M, S
S

Step ladder
STL S

Application command
Application
command
Please refer chapter 6
Programming Instructions

Inverse logic
INV None

4.5.1 Creating an ELC Ladder Program
Creating an ELC ladder program is easy with ELCSoft. Most graphical editing is accomplished using a
mouse. The maximum contacts allowed in a row are 11. An extension rung can be added if more
contacts are needed to complete the ladder logic. The extension rung will be produced automatically
when a 12th contact is added, a number will be assigned to the extension for easy tracking.

Y1
0
0
X0 X1 X2 X3 X4 X5 X6 X7 X10 C0 C1
X11 X12 X13

When evaluating the user program. ELC will process the ladder logic starting at the top rung evaluating
each component left to right, proceed to the next rung down, and continue evaluating components left
to right until ELC reaches the END statement of the user program. The following diagram for example;
we analyze the process step by step. The number at the right corner is the explanation order.
4. ELC Concepts

4- 7
Evaluating an ELC Program

TMR T0 K10
Y1
X0 X1 Y1 X4
M3 T0
M0
X3 M1
1
22
3
4
55
56


How ELC evaluates the sample program above is described below.
Execution
Order
CMD Address Description
1 LD X0 Load Input X0
2 OR M0 OR internal relay M0 with input X0
3 AND X1 AND the result of step 2 above with input X1
4 LD X3 Load Input X3
AND M1 AND internal relay M1 with input X3
ORB OR the results of step 3 and step 4
MPS Push the result of OR(step3, step4) to stack
5 AND Y1 AND the result of OR(step3, step 4) with output Y1
AND X4 AND input X4 with output Y1
OUT Y1 Output the result of above to output Y1
MPP Pop the result of OR(step3, step4) from stack
6 AND T0 AND the T0 with the result of OR(step3, step4)
AND M3 AND T0 with M3
TMR T0 K10 If the result of above is ON, start timing

4.5.2 LD / LDI (Load / Load and Invert) Evaluation
LD or LDI start a rung or block within a rung.
LD command
AND Block
LD command
OR Block

ELC Syst em Manual

4- 8
4.5.3 LDP / LDF (Load Raising edge / Load Falling edge) Evaluation
Similar to the LD command, LDP and LDF will pass an ON condition only when the device transitions
from OFF ON (LDP) or ONOFF (LDF).

X0
OFF ON OFF
Time
Rising-edge

X0
OFF
ON OFF
Time
Falling-edge


4.5.4 AND / ANI (AND / AND and Invert) Evaluation
AND (ANI) connects a device or a block in series with another device or block.

AND
command
AND
command


4.5.5 ANDP / ANDF (AND Raising edge / AND Falling edge) Evaluation
Similar to the AND command, ANDP and ANDF will pass an ON condition only when the device
transitions from OFF ON (ANDP) or ONOFF (ANDF).

4.5.6 OR / ORI (OR / OR and Invert) Evaluation
OR (ORI) connects a device or a block in parallel with another device or block.
OR
command
OR
command
OR
command

4.5.7 ORP / ORF (OR Raising edge / OR Falling edge) Evaluation
Similar to the OR command, ORP and ORF will pass an ON condition only when the device transitions
from OFF ON (ANDP) or ONOFF (ANDF)

4.5.8 ANB (AND Block) Evaluation (HHP Only)
ANB will perform an AND on multiple blocks. When using ELCSoft this command is performed
automatically. When using the ELC-HHP this command must be manually inserted.

4. ELC Concepts

4- 9
ANB command


4.5.9 ORB (OR Block) Evaluation (HHP Only)
ORB will perform an OR on multiple blocks. When using ELCSoft this command is performed
automatically. When using the ELC-HHP this command must be manually inserted.

ORB
command


4.5.10 MPS / MRD / MPP (Branch) Evaluations (HHP Only)
These commands provide an easy method to create complex blocks within a rung of ladder logic. The
three different commands provide these functions.

Branch
Command
Branch
Symbol
Description
MPS
Starts a vertical branch. 8 of these commands
are allowed each rung.
MRD Starts a horizontal branch
MPP Ends branch

Notice an exception to the table above when reviewing the example below. There is an MPP (looks
like a MRD) starting a horizontal branch. This is due to how ELCSoft compiles the user program and
is completely acceptable. If you were using ELCSoft to create this program, these commands are
automatically inserted for you. If you are using the ELC-HHP, you could manually insert either an MRD
or MPP command.
ELC Syst em Manual

4- 10
MPS
MRD
MPP
MPP
MPS


4.5.11 STL (Step Ladder) Evaluation
Step commands are used when using the Sequential Function Chart (SFC) mode of ELC.
Programmers believe that viewing the program in this mode is easy than in ladder logic. The logic
does not transition to the next step command until the current one is complete. In ladder logic this
would be similar to a subroutine. Just as a subroutine is a self-contained set of instructions so is a step
command.

e
S0
S21
S22
M1002
initial
pulse
M1002
SET S0
SET S21
S
S0
SET S22
S
S21
S
S22
S0
RET


4.5.12 RET (Return Step) Evaluation
This command works in conjunction with the Step command and tells ELC that the step commands
(SFC) are complete.

e
S
S20
RET
e
S
S20
RET


The RET command must be placed as in the top figure above when signaling the end of the SFC
otherwise it will generate an error.
4. ELC Concepts

4- 11
4.6 Conversion of ELC Commands and Each Diagram Structure
Ladder Diagram
X0 X2 X1
X1
M1
C0
Y0
SET S0
M2 Y0
M0
X10
Y10
SET S10
S0
S
X11
Y11
SET S11
S10
S
SET S12
SET S13
X12
Y12
SET S20
S11
S
X13
S0
RET
S20
S
S12
S
S13
S
X0
CNT C0 K10
X1
M0
C0
X1
M2
RST C0
M1
M2
END

Instruction
LD X0
OR X1
LD
OR
X2
M0
ORI M1
ANB
LD
AND
M2
Y0
1
OR
block
OR
block
Serial
block
AND
block
Serial block
ANI
ORB
ANI
OUT
AND
SET
STL
LD
X1
Y0
C0
S0
S0
X10
Multiple
outputs
Step ladder Start
State working item and
step point transfer
Output state will keep on
handling according to
program scan state
8
Y10
S10
S10
OUT
SET
STL
LD X11
OUT
SET
SET
SET
STL
LD
OUT
Y11
S11
S12
S13
S11
X12
Y12
S10 state take out
Take out X11 state
State working item and
step point transfer
S11 state take out
Take out X12 state
State working item and
step point transfer SET
STL
STL
STL
LD
OUT
RET
S20
S20
S12
S13
X13
S0
LD S0
CNT
LD C0
C0K10
Simultaneous
divergence
State working item
and step point transfer
End of step ladder
Return
Read C0
Multiple
outputs
MPS
AND X1
OUT M0
MRD
ANI X1
OUT M1
MPP
ANI
OUT
END
M2
M2
Program End
RST C0
1
12
1 3
3
6
138
137
139
13 10
13 11
13 12
13 13
13 16
13 15
13 17
13 18
13 19
4
5
13 14
ELC Syst em Manual

4- 12
4.7 ELC-HHP Programming Methods
The analytic process of correct ladder diagram should be from left to right or from up to down. But
there are some exceptions as shown in the following.
Example 1: there are two methods to enter commands for the following ladder diagram and the result
is the same, but one method is better then the other.
Better method OK method
LD X0 LD X0
OR X1 OR X1
LD X2 LD X2
OR X3 OR X3
ANB LD X4
LD X4 OR X5
OR X5 ANB
X0 X2 X4
X5 X3 X1

ANB ANB
The results for the above two programs when converted to ladder diagram are the same. One is better
than the other because of how ELC operates. The operation of the program is from left side is one
block merges to another one. Although the length of the program at the right side is the same as the
left one, the operation of the program in the right side is merged at the last. (Command ANB is used to
merge, it cant use more than 8 continuous times). In this program, it just needs to use continuous two
times of command ANB and ELC controllers allows that. But when the program needs to use more
than continuous 8 times of command ANB, ELC controllers wont allow. So the best method is to merge
once the block is established and in this way the logic of programmer will be in order.
Example 2: there are two methods to use command to show the following ladder diagram but the
result is the same.
Good method Bad method
LD X0 LD X0
OR X1 LD X1
OR X2 LD X2
OR X3 LD X3
ORB
ORB
X0
X1
X2
X3

ORB

The difference is very clear in these two programs. In the bad method, the more program code it needs
and the operation memory of ELC controllers also needs to increase. So that is better to decode in the
order of the definition.
4. ELC Concepts

4- 13
Common Programming Errors
When creating ladder logic diagrams, some methods will perform better than others. Below is table
listing certain methods that will cause the ELCSoft compiler to generate an error.


OR block operation on top of rung. It should be on
the bottom side of the rung.

reverse flow power

Reverse current flow. Current must flow right to left
in a ladder circuit.

The longest portion of the rung should be the
topmost portion of the rung.

Building rungs should have the most devices on the
top of the rung with lesser amounts of device below.
The dotted line block should move up.

A blank line is not allowed since it is a short circuit.

A blank line is not allowed since it is a short circuit

A blank line is not allowed since it is a short circuit

The dotted line block is positioned wrong, it should
be moved up.
ELC Syst em Manual

4- 14

Label P0 should be in the first row of the complete
network.

Reverse current flow. The dotted block should be
moved to the top rung.


4.8 Simplifying Ladder Logic
There are many ways to accomplish your ladder logic. The list below displays methods of ways to
create ladder logic, some methods will not work and others could be better. For each method that will
not work or could better is a suggested improvement. Review the instructions for each method. The
improved method will shorten the number of instructions.

Example 1:

Command
LD X0
LD X1
OR X2
X0 X1
X2


ANB

Command
LD X1
OR X2
X0 X1
X2

AND X0
4. ELC Concepts

4- 15
Example 2:

Command
LD T0
LD X1
AND X2
T0
X1 X2


ORB

Command
LD X1
AND X2
T0
X1 X2

OR T0

Example 3:

Command
LD X0
OR X1
AND X2
LD X3
AND X4
X0
X1 X2
X3 X4

ORB

Command
LD X3
AND X4
LD X1
OR X0
AND X2
X0
X1 X2
X3 X4

ORB
ELC Syst em Manual

4- 16
Example 4:

Command
MPS
AND X0
OUT Y1
MPP
X0
Y1
Y0

OUT Y0


Command
OUT Y0
AND X0
Y0
Y1
X0

OUT Y1

Example 5:

X0
X3
X6
X1
X4
X7
X2
X5
X10
LOOP1
reverse flow power


X0 X1 X2
X3 X4 X5
X10
X6 X7 X5
X10
LOOP1


Example 6:

X0
X3
X6
X1
X4
X7
X2
X5
X10 LOOP1
reverse flow power

X0
X3
X6
X1
X4
X7
X2
X5
X10
reverse flow power


LOOP1
X0 X1 X2
X3 X4 X5
X6
X3 X7 X10
X6
X0 X1 X7 X10
LOOP2
X4

4. ELC Concepts

4- 17
4.9 Basic Ladder Logic Examples
The examples that follow illustrate how common functions can be programmed.

Example 1 - Latch
Starting assumption: Y1 = OFF, X2 = OFF,
X1 = OFF. When Start = ON, turning Y1 = ON. Releasing Start = OFF keeps Y1 = ON until X2 = ON
X2
Y1
X1
Y1



Example 2 - Latching circuit of SET and RST commands
ELC evaluate ladder logic from top rung to bottom rung and each device of each rung left to right.
Assuming X1 = Start, X2 = Stop
Below example is that if X1 is ON, Y1 will be ON by the SET command. If X2 = ON based Y1 = OFF
by the RST command, overriding the previous SET command.
SET Y1
RST Y1
X1
X2
Top priority of stop

The bottom example provides the opposite logic.
SET
Y1 RST
Y1
X2
X1
Top priority of start



Example 3 - Latched Circuit Through Power Cycle
Once M512 is SET by X1, M512 will retain its current state even if the ELC power is cycled because
M512 is a latched M relay.
X2
M512
X1
SET
RST M512
Y1
M512


ELC Syst em Manual

4- 18
Example 4 - Conditional Control
When X1 is enabled and X3 is disabled, Y1 becomes enabled. This will cause Y1 and Y2 to become
latched. Y1, a normally open contact, is connected in series to the Y2 circuit which makes Y1 an "AND"
representative for Y2. Therefore, only when X2 is enabled and X4 is disabled and Y1 is enabled can
make Y2 be enabled.
X3
Y1
X1
Y1
X4
Y2
X2
Y2
Y1

X1
X3
X2
X4
Y1
Y2



Example 5 - Interlock control
The circuit above is an interlock control circuit. Based on the ladder logic Y1 and Y2 cannot be on at
the same time. When one is on, the other is locked out and vice versa (interlock). Based on how
ladder logic evaluates rungs, Y1 will always have priority over Y2.
X3
Y1
X1
Y1
X4
Y2
X2
Y2
Y1
Y2

X1
X3
X2
X4
Y1
Y2



Example 6 - Sequential Control
There are times when you want control functions to happen in a sequential order. Incorporating the
outputs Y1 and Y2 into each of the rung ensures a sequential order.
X3
Y1
X1
Y1
X4
Y2
X2
Y2
Y1
Y2

4. ELC Concepts

4- 19
Example 7 - Oscillating Circuit
This circuit is also called a toggle circuit since it will toggle state every scan.
Y1
Y1

Y1
T T


Example 8 Timer
The timer above will increment when X0 = ON. When the timer reaches the predetermined value,
Timer relay T0 = ON, turning Y1 = ON. Y1 will be ON for one scan then it will reset Timer 0, starting
the process over.
T0
X0
TMR
Y1
Y1
T0
Kn

Y1
T T n
X0



Example 9 - Blinking Circuit
Similar to a sequential circuit, this multi-timer can be programmed for almost any duty cycle desired.
T2 TMR Kn2
T1
X0
TMR
Y1
T2
T1
Kn1
X0 T1

Y1
T n1
X0
T n2



Example 10 - Triggered Circuit
At times, it is desired to have a rising edge pulse trigger an event. The circuit above shows the
diagram how this can be done. Whenever X0 transitions from OFFON, M0 will pulse for one scan.
This pulse can then initiate any logic desired.
Y1
M0
X0
Y1
Y1
M0
M0

X0
M0
Y1
T


Example 11 - Delay Circuit
This delay circuit will hold output Y1 on longer than X0, from a start condition where X0 and T10=OFF,
ELC Syst em Manual

4- 20
when X0=OFF the timer will start timing keeping Y1=ON until timer reaches its predetermined timer
value.
T10
X0
TMR
Y1
T10
K1000

X0
Y1
100 seconds
100 seconds



Example12 - Extended Timer Circuit
There are times when you need more time than a single timer can provide. You can easily add timers
together to achieve the timing needed.
T12 TMR Kn2
T11
X0
TMR
Y1
T11
Kn1
T12




Example 13 - Extending Counter Circuit
Similar to extending a timing circuit, counters can also added together to achieve a higher counter
value.
C6 CNT Kn2
C5
X3
CNT
RST
C5
Kn1
X4
C5 RST
Y1
C6
C6




Example 14 - Traffic light control (SFC method))
Traffic light control
Red light Yellow light Green light Green blink light
Vertical light Y0 Y1 Y2 Y2
Horizontal light Y20 Y21 Y22 Y22
Light Time 35 Sec 5 Sec 25 Sec 5 Sec
4. ELC Concepts

4- 21

Vertical
Light
Horizontal
Light


Timing chart:
5 Sec
Y0
Y1
Y2
Y20
Y21
Y22
Vertical
Light
Red
Yellow
Green
Horizontal
Light
Red
Yellow
Green
5 Sec
25 Sec
5 Sec 5 Sec
25 Sec


SFC Figure:
S0
S20
S21
S22
S0
M1002
T0
T1
T13
Y0
S23
T2
TMR T0 K350
Y2
TMR T1 K250
Y2
TMR T2 K50
M1013
Y1
S30
S31
S32
T10
T11
S33
T12
Y22
TMR T10 K250
Y21
TMR T12 K50
Y22
TMR T11 K50
M1013
Y20
TMR T13 K350



ELC Syst em Manual

4- 22
Ladder Diagram:
M1002
ZRST S0 S127
SET S0
SET S20
Y2
END
S0
S
S21
S
Y1
S23
S
Y22
S30
S
T13 S23
S
S33
S
SET S30
S20
S
TMR T0
SET S21
T0
Y0
K350
TMR T1
SET S22
T1
K250
Y2
S22
S TMR T2
SET S23
T2
K50
M1013
TMR T10
SET S31
T10
K250
Y22
S31
S TMR T11
SET S32
T11
K50
M1013
Y21
S32
S
TMR T12
SET S33
T12
K50
Y20
S33
S
TMR T13 K350
S0
RET

4. ELC Concepts

4- 23
ELCSoft programming (SFC mode)

SFC commands Ladder Logic View
LAD-0
S0 ZRST S127
M1002
S0 SET

Transferred condition 1
TRANS*
T0

S22
Y2
T2 TMR K50
M1013

Transferred condition 4
TRANS*
T13
TRANS*
T13
TRANS*
T13
TRANS*
T13
TRANS*
T13
TRANS*
T13
TRANS*
T13

0
2
3
4
5
6
7
1
LAD-0
S0
S20
S21
S22
S23
S30
S31
S32
S33
S0

Transferred condition 7
TRANS*
T12
TRANS*
T12
TRANS*
T12
TRANS*
T12
TRANS*
T12
TRANS*
T12
TRANS*
T12

ELC Syst em Manual

4- 24
MEMO



5- 1
Programming Concepts
The Eaton Logic Controller (ELC) is a programmable logic controller spanning an
I/O range of 10 256 I/O points. ELC processors are so versatile they range from
nano to small ELCs I/O and application size without ever needing to change
processors. ELC can control a wide variety of devices to solve your automation
needs. ELC monitors inputs and modifies outputs as controlled by the user
program. User program provides features like boolean logic, counting, timing,
complex math operations, and communications to other communicating products.

This Chapter Contains

5.1 ELC Memory Map for PB model ................................................................................. 5-2
5.2 ELC Memory Map for PC/PA/PH models................................................................... 5-4
5.3 ELC Memory Map for PV models............................................................................... 5-7
5.4 ELC Latched Memory Settings ................................................................................ 5-10
5.5 ELC Latched Memory Modes ................................................................................... 5-12
5.6 ELC Bits, Nibbles, Bytes, Words, etc ...................................................................... 5-13
5.7 Binary, Octal, Decimal, BCD, Hex ............................................................................ 5-13
5.8 M Relay ....................................................................................................................... 5-15
5.9 S Relay........................................................................................................................ 5-34
5.10 T (Timer) ..................................................................................................................... 5-34
5.11 C (Counter) ................................................................................................................. 5-35
5.12 High-speed Counters ................................................................................................ 5-37
5.13 Special Data Register................................................................................................ 5-50
5.14 E, F Index Registers .................................................................................................. 5-65
5.15 File Register ............................................................................................................... 5-65
5.16 Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I] .......................................... 5-66
5.17 M Relay and D Register Applications...................................................................... 5-70
5.18 Fault Code Information........................................................................................... 5-124
ELC Syst em Manual

5- 2
5 Programming Concepts
5.1 ELC Memory Map for PB model
Items Specifications Remarks
Control Method Stored program, cyclic scan system
I/O Processing Method
Batch processing method (when END
instruction is executed)
Fast I/O refresh instruction
can override batch update
Execution Speed
Basic instructions 3.5 seconds
minimum
Application instructions
varies per instruction
Program language Instructions + Ladder Logic + SFC
Program Capacity 3792 Steps Built-in EEPROM
Instructions 32 Basic instructions, Application instructions: 109
X External inputs
X0~X177, octal number
system, 128 points max.
Physical input points
Y External outputs
Y0~Y177, octal number
system, 128 points max.
Total
256 I/O
Physical output points
General
M0~M511, M768~M999
744 points Note 1
Latched
M512~M767, 256 points
Note 3
M
A
u
x
i
l
i
a
r
y

r
e
l
a
y

Special
M1000~M1279, 280 points,
some are latched
Total
1280 bits
Main internal relay area for
general use.
100ms T0~T63, 64 points
10ms
(M1028=ON)
T64~T126, 63 points T
T
i
m
e
r

1ms T127 1 points
Total
128 bits
Contact = ON when timer
reaches preset value.
C0~C111, Note 1
16-bit count up
C112~C127, Note 3
C235~C238, C241, C242,
C244, 1 phase 1 input, 7
points Note 4
C246, C247, C249, 1 phase
2 input, 3 points
Note 4
C
C
o
u
n
t
e
r

32bit high-speed
count up/down
C251, C252, C254, 2 phase
2 input, 3 points
Note 4
Total
141 bits
Contact = ON when
counter reaches preset
value.
Initial step point S0~S9, 10 points, Note 4
Zero return S10~S19, 10 points, Note 4
B
i
t

C
o
n
t
a
c
t
s

S
S
t
e
p

p
o
i
n
t

Latched S20~S127, Note 4
Total
128 bits
SFC usage
S10~S19 is used with IST
instruction
5. Progr ammi ng Concepts

5- 3
Items Specifications Remarks
T Current value T0~T127, 128 words

C0~C127, 16-bit counter,
C Current value
C235~C254, 32-bit counter

General D0~D407, Note 1
Latched D408~D599, Note 3
Special D1000~D1311, 312 words
W
o
r
d

R
e
g
i
s
t
e
r

D
D
a
t
a

r
e
g
i
s
t
e
r

Index E=D1028, F=D1029, Note 1
Total
912
words
General storage for word
length data.
N Master control loop N0~N7, 8 points
P Pointer P0~P63, 64 points Subroutines pointer
External
interrupt
I001 (X0), I101 (X1), I201 (X2), I301
(X3); 4 points (all are rising-edge
trigger)
Time interrupt I610 ~ I699, 1 point (time base=1ms)
P
o
i
n
t
e
r

I
I
n
t
e
r
r
u
p
t

S
e
r
v
i
c
e

Communication I150, 1 point
Address for interrupt
subroutines
K Decimal
K-32,768 ~ K32,767 (16-bit operation)
K-2,147,483,648 ~ K2,147,483,647 (32-bit operation)
C
o
n
s
t
a
n
t

H Hexadecimal
H0000 ~ HFFFF (16-bit operation),
H00000000 ~ HFFFFFFFF (32-bit operation)
Serial ports
COM1: RS-232 (Slave),
COM2: RS-485 (Master/Slave),
Both can be used at the same time.
Clock/Calendar (RTC) None
Special Expansion Modules Attach up to 8 modules of any type analog I/O extension modules
Notes:
1. Data area is non-latched.
2. Default is non-latched, optionally can be set to latched.
3. Default is latched, optionally can be set to non-latched.
4. Data area is latched.
ELC Syst em Manual

5- 4
5.2 ELC Memory Map for PC/PA/PH models
Items Specifications Remarks
Control Method Stored program, cyclic scan system
I/O Processing Method
Batch processing method (when END
instruction is executed)
Fast I/O refresh instruction
can override batch update
Execution Speed
Basic instructions 2.5 seconds
minimum
Application instructions
varies per instruction
Program language Instructions + Ladder Logic + SFC
Program Capacity 7920 STEPS SRAM + Battery
Instructions 32 Basic instructions 177 Application instructions
X External inputs
X0~X177, octal number
system, 128 points max.
Physical input points
Y External outputs
Y0~Y177, octal number
system, 128 points max.
Total
256 I/O
Physical output points
General M0~M511, Note 1
M512~M999, Note 3
Latched
M2000~M4095, Note 3
M
A
u
x
i
l
i
a
r
y

r
e
l
a
y

Special
M1000~M1999
some are latched
Total
4096 bits
Main internal relay area for
general use.
T0~T199, Note 1
T192~T199 for Subroutine
100ms
T250~T255(accumulative),
6 points Note 4
T200~T239, Note 2
10ms
T240~T245(accumulative),
6 points, Note 4
T
T
i
m
e
r

1ms
T246~T249(accumulative), 4
points, Note 4
Total
256 bits
Contact = ON when timer
reaches preset value.
C0~C95, Note 1
16-bit count up
C96~C199, Note 3
C200~C215, Note 1
32-bit count
up/down
C216~C234, Note 3
Total
235 bits
C235~C244, 1 phase 1
input, 9 points, Note 3
C246, C247, C249, 1 phase
2 input, 3 points, Note 1
B
i
t

C
o
n
t
a
c
t
s

C
C
o
u
n
t
e
r

PC/PA series,
32bit high-speed
count up/down
C251, C252, C253, C254, 2
phase 2 input, 4 points,
Note 3
Total
16 bits
Contact = ON when
counter reaches preset
value.
5. Progr ammi ng Concepts

5- 5
Items Specifications Remarks
C235~C245, 1 phase 1
input, 11 points, Note 3
C246, C247, C249, C250, 1
phase 2 input, 4 points
Note 1
C
C
o
u
n
t
e
r

PH series, 32bit
high-speed
count up/down
C251, C252, C254, C255, 2
phase 2 input, 4 points,
Note 3
Total
19 bits
ELC-PH12xxxx only
Initial step point
S0~S9, 10 points
Note 1
Zero point return
S10~S19, 10 points (use
with IST instruction)
Note 1
General
S20~S511, 492 points
Note 1
Latched
S512~S895, 384 points
Note 3
B
i
t

C
o
n
t
a
c
t
s

S
S
t
e
p

p
o
i
n
t

Alarm
S896~S1023, 128 points
Note 3
Total
1024 bits
Sequential Function Chart
(SFC) usage
T Current value T0~T255, 256 words
C0~C199, 16-bit counter, 200 words
C Current value
C200~C254, 32-bit counter

General D0~D199, Note 1
D200~D999, Note 3
Latched
D2000~D4999, Note 3
Special D1000~D1999, 1000 words
D
D
a
t
a

r
e
g
i
s
t
e
r

Index E0~E3, F0~F3, Note 1
Total
5000
words
General storage for word
length data
W
o
r
d

R
e
g
i
s
t
e
r

N
o
n
e

File register
0~1599, 1600 words
Note 4
Additional storage area to
be used
N Master control loop N0~N7, 8 points Master control nested loop
P Pointer P0~P255, 256 points Subroutine pointer
External
interrupt
I001 (X0), I101 (X1), I201 (X2), I301
(X3), I401 (X4), I501 (X5); 6 points (all
are rising-edge trigger)
Time interrupt
I601 ~ I699, I701 ~ I799, 2 points (time
base=1ms)
Hi-speed
counter
I010, I020, I030, I040, I050, I060; 6
points
P
o
i
n
t
e
r

I
I
n
t
e
r
r
u
p
t

S
e
r
v
i
c
e

Communication I150, 1 points
Address for interrupt
subroutines
ELC Syst em Manual

5- 6
Items Specifications Remarks
K Decimal
K-32,768 ~ K32,767 (16-bit operation),
K-2,147,483,648 ~ K2,147,483,647 (32-bit operation)
C
o
n
s
t
a
n
t

H Hexadecimal
H0000 ~ HFFFF (16-bit operation),
H00000000 ~ HFFFFFFFF (32-bit operation)
Serial ports
COM1: RS-232 (Slave), COM2: RS-485 (Master/Slave), Both can be
used at the same time.
COM1 is typically the programming port.
Clock/Calendar (RTC) Year, Month, Day, Hours, Minutes, Seconds
Analog Volume dial ELC-PC12xxxx, ELC-PH12xxxx only
Special Expansion Modules Attach up to 8 modules of any type analog I/O extension modules

Notes:
1. Data area is non-latched.
2. Default is non-latched, optionally can be set to latched.
3. Default is latched, optionally can be set to non-latched.
4. Data area is latched.
5. Progr ammi ng Concepts

5- 7
5.3 ELC Memory Map for PV models
Items Specifications Remarks
Control Method Stored program, cyclic scan system
I/O Processing Method
Batch processing method (when END
instruction is executed)
Fast I/O refresh instruction
can override batch update
Execution Speed
Basic instructions 0.24 seconds
minimum
Application instructions
varies per instruction
Program language Instructions + Ladder Logic + SFC
Program Capacity 15872 STEPS SRAM + Battery
Instructions 32 Basic instructions 195 Application instructions
X External inputs
X0~X377, octal number
system, 256 points max.
Physical input points
Y External outputs
Y0~Y377, octal number
system, 256 points max.
Total
512 I/O
Physical output points
General M0~M511, Note 2
M512~M999, Note 3
Latched
M2000~M4095, Note 3
M
A
u
x
i
l
i
a
r
y

r
e
l
a
y

Special
M1000~M1999
some are latched
Total
4096 bits
Main internal relay area for
general use.
T0~T199, Note 2
T192~T199 for Subroutine
100ms
T250~T255(accumulative),
6 points Note 4
T200~T239, Note 2
10ms
T240~T245(accumulative),
6 points, Note 4
T
T
i
m
e
r

1ms
T246~T249(accumulative), 4
points, Note 4
Total
256 bits
Contact = ON when timer
reaches preset value.
C0~C99, Note 2
16-bit count up
C100~C199, Note 3
C200~C219, Note 2
32-bit count
up/down
C220~C234, Note 3
Total
235 bits
C235~C244, 1 phase 1
input, 10 points, Note 3
C246~C249, 1 phase 2
input, 4 points, Note 3
B
i
t

C
o
n
t
a
c
t
s

C
C
o
u
n
t
e
r

32bit high-speed
count up/down
C251~C254, 2 phase 2
input, 4 points, Note 3
Total
18 bits
Contact = ON when
counter reaches preset
value.
ELC Syst em Manual

5- 8
Items Specifications Remarks
Initial step point
S0~S9, 10 points
Note 2
Zero point return
S10~S19, 10 points (use
with IST instruction)
Note 2
General
S20~S499, 480 points
Note 2
Latched
S500~S899, 400 points
Note 3
B
i
t

C
o
n
t
a
c
t
s

S
S
t
e
p

p
o
i
n
t

Alarm
S900~S1023, 124 points
Note 3
Total
1024 bits
Sequential Function Chart
(SFC) usage
T Current value T0~T255, 256 words
C0~C199, 16-bit counter, 200 words
C Current value
C200~C254, 32-bit counter, 53 words

General D0~D199, Note 2
D200~D999, Note 3
Latched
D2000~D9999, Note 3
Special D1000~D1999, 1000 words
D
D
a
t
a

r
e
g
i
s
t
e
r

Index E0~E7, F0~F7, Note 1
Total
10000
words
General storage for word
length data
W
o
r
d

R
e
g
i
s
t
e
r

N
o
n
e

File register
0~9999, 10000 words
Note 4
Additional storage area to
be used
N Master control loop N0~N7, 8 points Master control nested loop
P Pointer P0~P255, 256 points Subroutine pointer
External interrupt
I000/I001(X0), I100/I101(X1),
I200/I201(X2), I300/I301(X3),
I400/I401(X4), I500/I501(X5), 6 points
(01, rising-edge trigger , 00, falling-
edge trigger )
Time interrupt
I601~I699, I701~I799, 2 points (time
base = 1ms)
I801~I899, 1 point (time base = 0.1ms)
Interruption
inserted when
high-speed
counter reaches
target
I010, I020, I030, I040, I050, I060, 6
points
Pulse interruption I110, I120, I130, I140, 4 points
Hi-speed counter
I010, I020, I030, I040, I050, I060; 6
points
P
o
i
n
t
e
r

I
I
n
t
e
r
r
u
p
t

S
e
r
v
i
c
e

Communication I150, I160, I170, 3 points
Address for interrupt
subroutines
5. Progr ammi ng Concepts

5- 9
Items Specifications Remarks
K Decimal
K-32,768 ~ K32,767 (16-bit operation),
K-2,147,483,648 ~ K2,147,483,647 (32-bit operation)
C
o
n
s
t
a
n
t

H Hexadecimal
H0000 ~ HFFFF (16-bit operation),
H00000000 ~ HFFFFFFFF (32-bit operation)
Serial ports
COM1: RS-232 (Slave), COM2: RS-485 (Master/Slave), Both can be
used at the same time.
COM1 is typically the programming port.
Clock/Calendar (RTC) Year, Month, Day, Hours, Minutes, Seconds
Analog Volume dial 2
Special Expansion Modules Attach up to 8 modules of any type analog I/O extension modules

Notes:
1. Data area is non-latched.
2. Default is non-latched, optionally can be set to latched.
3. Default is latched, optionally can be set to non-latched.
4. Data area is latched.
ELC Syst em Manual

5- 10
5.4 ELC Latched Memory Settings
PC/PA/PH Models

General Latched
Special auxiliary
relay
Latched
M0~M511 M512~M999 M1000~M1999 M2000~M4095
Latched (default) Latched (default)
M
Auxiliary
relay
Not latched
Start:
D1200 (K512)
End:
D1201 (K999)
Some are
latched and
cant be
changed.
Start: D1202 (K2000)
End: D1203 (K4095)
100 ms 10 ms 10ms 1 ms 100 ms
T0 ~T199 T200~T239 T240~T245 T246~T249 T250~T255 T
Timer
non-latched non-latched
Accumulative
latched
16-bit count up 32-bit count up/down
32-bit high-speed
count up/down
C0~C95 C96~C199 C200~C215 C216~C234 C235~C255
Latched
(default)
Latched
(default)
Latched (default)
C
Counter
Non-latched
Start: D1208
(K96)
End: D1209
(K199)
Non-latched
Start: D1210
(K216)
End: D1211
(K234)
Start: D1212 (K235)
End: D1213 (K255)
Initial Zero return General Latched Step alarm
S0~S9 S10~S19 S20~S511 S512~S895 S896~S1023
Latched (default)
S
Step relay
Non-latched
Start: D1214 (K512)
End: D1215 (K895)
Latched
General Latched Special register Latched
D0~D199 D200~D999 D1000~D1999 D2000~D4999
Latched (default) Latched (default)
D
Register
Non-latched
Start: D1216
(K200)
End: D1217
(K999)
Some are latched,
and cant be
changed
Start: D1218 (K2000)
End: D1219 (K4999)
K0-1599
File
Register
Latched
5. Progr ammi ng Concepts

5- 11
PV Models
*1: K-1 refers to the default setting is non-latched.

General Latched
Special auxiliary
relay
Latched
M0~M499 M500~M999 M1000~M1999 M2000~M4095
Non-latched
(default)
Latched (default) Latched (default)
M
Auxiliary
relay
Start: D1200 (K500)
End: D1201 (K999)
Some are latched
and cant be
changed.
Start: D1202 (K2000)
End: D1203 (K4095)
100 ms 10 ms 10ms 1 ms 100 ms
T0 ~T199 T200~T239 T240~T245 T246~T249 T250~T255
Non-latched
(default)
Latched (default)
T
Timer
Start:
D1204 (K-1)*1
End:
D1205 (K-1)*1
Start:
D1206 (K-1)*1
End:
D1207 (K-1)*1
Accumulative
latched
16-bit count up 32-bit count up/down
32-bit high-speed
count up/down
C0~C99 C100~C199 C200~C219 C220~C234 C235~C255
Non-latched
(default)
Latched
(default)
Non-latched
(default)
Latched
(default)
Latched (default)
C
Counter
Start: D1208 (K96)
End: D1209 (K199)
Start: D1210 (K216)
End: D1211 (K234)
Start: D1212 (K235)
End: D1213 (K255)
General Latched Special Latched General
S0~S9 S10~S19 S20~S499 S500~S899 S900~S1023
Non-latched (default) Latched (default)
S
Step relay
Start: D1214 (K500)
End: D1215 (K999)
Latched
General Latched Special register Latched
D0~D199 D200~D999 D1000~D1999 D2000~D9999
Non-latched
(default)
Latched (default) Latched (default)
D
Register
Start: D1216 (K200)
End: D1217 (K999)
Some are latched,
and cant be
changed
Start: D1218 (K2000)
End: D1219 (K9999)
K0-9999
File
Register
Latched
ELC Syst em Manual

5- 12
5.5 ELC Latched Memory Modes
PB Model
Memory
type
Power
OFF=>ON
STOP=>RUN RUN=>STOP
Clear all
M1031
Non-latched
area
Clear all
M1032
latched area
Factory
setting
When M1033=OFF, clear
Non-
latched
Clear
When M1033=ON, No change
Clear Unchanged 0
Latched Unchanged Unchanged Clear Unchanged
Special M,
Special D,
Index
Register
Initial Unchanged Unchanged Initial setting

PC/PA/PH/PV Models
Memory
type
Power
OFF=>ON
STOP=>RUN RUN=>STOP
Clear all M1031
Non-latched
area
Clear all
M1032
latched area
Factory
setting
Non-
latched
Clear Unchanged
When M1033=OFF,
clear
When M1033=ON,
No change
Clear Unchanged 0
Latched Unchanged Unchanged Clear 0
Special M,
Special D,
Index
Register
Initial Unchanged Unchanged
Initial
setting
File
Register
Unchanged 0

5. Progr ammi ng Concepts

5- 13
5.6 ELC Bits, Nibbles, Bytes, Words, etc
ELC utilizes five numeric types to perform different instructions. The following is the explanation of
numeric types.
Numeric Description
Bit Bit is the basic unit of a binary number system. Range is 0 or 1
Nibble
4 consecutive bits, such as b3~b0.
Range 0 9 (BCD) or 0~F hexadecimal.
Byte
8 consecutive bits b7~b0
Range 0 255 or 00 - FF hexadecimal
Word
16 consecutive bits (2 consecutive bytes) b15~b0
Range -32,768 ~ 32,767 or 0000 ~ FFFF hexadecimal
Double Word
32 consecutive bits (2 consecutive words) b31~b0
Range -2,147,483,648 ~ 2,147,483,647 or 00000000 - FFFFFFFF hexadecimal

The relationship among bit, nibble, byte, word, and double word are shown as below.
NB0 NB1 NB2 NB3 NB4 NB5 NB6 NB7
BY3 BY2 BY1 BY0
W1
DW
W0
Double Word
Word
Byte
Ni bble
Bi t


5.7 Binary, Octal, Decimal, BCD, Hex
ELC is capable of using many different numbering systems.
Number System ELC Operation Use
Binary Bit operations. Y, X, M, S, D, E, F, T, C
Octal Input & Output operations. Y and X relay
Decimal (K)
Any non-bit operation. D, E, F, T, C registers can use decimal. A (K)
prefix to a number in ELC represents a decimal number. i.e. K100 =
Decimal 100
BCD
(Binary Code Decimal)
Used mainly for sending data to 7-segement displays.
Hex (H)
Any non-bit operation. D, E, F, T, C registers can use Hexadecimal. A
(H) prefix to a number in ELC represents a Hex number. i.e. K255 =
Hex FF
ELC Syst em Manual

5- 14
Example: ELC Expansion Module Addressing (Octal)
ELC controllers have included I/O in them. For this reason expansion modules I/O address starts at
X20 for inputs and Y20 for outputs.
Reference Table:
Binary
(BIN)
Octal
(OCT)
Decimal (K)
(DEC)
BCD
(Binary Code Decimal)
Hexadecimal (H)
(HEX)
For ELC
internal
operation
X, Y relay
Memory registers
M, S, T, C, D, E, F, P, I
number
For DIP Switch and 7-
segment display
Constant H
0000 0 0 0000 0
0001 1 1 0001 1
0010 2 2 0010 2
0011 3 3 0011 3
0100 4 4 0100 4
0101 5 5 0101 5
0110 6 6 0110 6
0111 7 7 0111 7
1000 10 8 1000 8
1001 11 9 1001 9
1010 12 10 0000 A
1011 13 11 0001 B
1100 14 12 0010 C
1101 15 13 0011 D
1110 16 14 0100 E
1111 17 15 0101 F
10000 20 16 0110 10
10001 21 17 0111 11


5. Progr ammi ng Concepts

5- 15
5.8 M Relay
The special auxiliary relay (special M) are as shown in the following. Please notice that some
equipment with the same number will be different to the different model. In the following chart, the
meaning of column Attribute is: R means can only read. R/W means can read/write. - means can
do nothing. # means system setting, user can read the detail explanation of the setting in the manual.
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1000
Normally open contact (a contact). This contact
is ON when running and it is ON when the status
is set to RUN.
Y Y Y OFF ON OFF R NO OFF
M1001
Normally OFF contact (b contact). This contact is
OFF in running and it is OFF when the status is
set to RUN.
Y Y Y ON OFF ON R NO ON
M1002
ON only for 1 scan after RUN. Initial pulse is
contact a. It will get positive pulse in the RUN
moment. Pulse width=scan period.
Y Y Y OFF ON OFF R NO OFF
M1003
OFF only for 1 scan after RUN. Initial pulse is
contact a. It will get negative pulse in the RUN
moment. Pulse width=scan period.
Y Y Y ON OFF ON R NO ON
M1004 ON when error occurs Y Y Y OFF OFF - R NO OFF
M1008 Monitor timer flag (ON: ELC WDT time out) Y Y Y OFF OFF - R NO OFF
M1009 History of LV signal due to 24VDC insufficiency Y Y - OFF - - R NO OFF
M1010
PB/PC/PA/PH: PLSY Y0 mode selection. ON =
continuous output
PV: Pulse output when reaching END instruction
Y Y Y OFF - - R/W NO OFF
M1011 10ms clock pulse, 5ms ON/5ms OFF Y Y Y OFF - - R NO OFF
M1012 100ms clock pulse, 50ms ON / 50ms OFF Y Y Y OFF - - R NO OFF
M1013 1s clock pulse, 0.5s ON / 0.5s OFF Y Y Y OFF - - R NO OFF
M1014 1min clock pulse, 30s ON / 30s OFF Y Y Y OFF - - R NO OFF
M1015 High-speed connection counter - Y Y OFF - - R/W NO OFF
M1016
Display year bit. When OFF = display two right-
most bits.
When ON = display (two right-most bits + 2000).
- Y Y OFF - - R/W NO OFF
M1017 30 seconds adjustment - Y Y OFF - - R/W NO OFF
M1018 Flag for Radian/Degree, ON for degree - Y Y OFF - - R/W NO OFF
M1020 Zero flag Y Y Y OFF - - R NO OFF
M1021 Borrow flag Y Y Y OFF - - R NO OFF
M1022 Carry flag Y Y Y OFF - - R NO OFF
ELC Syst em Manual

5- 16
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1023
PLSY Y1 mode selection, ON = continuous
output.
Y Y - OFF - - R/W NO OFF
M1024 COM1 monitor request Y Y Y OFF - - R NO OFF
M1025
If ELC receives an illegal communication request
when HHP, PC or HMI connects to ELC, M1025
=ON and save the error code in D1025.
Y Y Y OFF - - R NO OFF
M1026 Startup flag of RAMP module - Y Y OFF - - R/W NO OFF
M1027 PR output flag - Y Y OFF - - R/W NO OFF
M1028
10ms time switch flag. The base setting flag of
T64~T126 is 100ms, when timer is OFF and the
base setting flag is 10ms when it is ON.
Y - - OFF - - R/W NO OFF
M1029
PB/PC/PA/PH: Pulse output Y0 of PLSY and
PLSR instruction execution completed or other
relative instruction execution completed
PV: the 1st group pulse output CH0 (Y0, Y1) is
completed, or other relevant instructions
complete their executions.
Y Y Y OFF - - R NO OFF
M1030
PB/PC/PA/PH: Pulse output Y1 of PLSY and
PLSR instruction execution completed
PV: the 2nd group pulse output CH1 (Y2, Y3) is
completed, or other relevant instructions
complete their executions.
Y Y Y OFF - - R NO OFF
M1031 Clear all non-latched memory Y Y Y OFF - - R/W NO OFF
M1032 Clear all latched memory Y Y Y OFF - - R/W NO OFF
M1033 Memory latched at STOP Y Y Y OFF - - R/W NO OFF
M1034 All Y outputs disable Y Y Y OFF - - R/W NO OFF
M1035
Start X input point to be RUN/STOP switch and
correspond to D1035 (PC series indicate X7
only. PA series indicate X3 only. PH series
indicate X5 only.)
- Y Y - - - R/W YES OFF
PH V1.4 and above: SPD instruction can use
X0~X5 to detect speed starting flag
- Y - OFF OFF - R/W NO OFF
M1036
PV: the 3
rd
group pulse output CH2 (Y4,
Y5) is completed.
- - Y
OFF - - R NO OFF
M1037
The 4
th
group pulse output CH3 (Y6, Y7) is
completed.
- - Y
OFF - - R NO OFF
M1039 Constant scan mode Y Y Y OFF - - R/W NO OFF
M1040 Step transition inhibit Y Y Y OFF - - R/W NO OFF
M1041 Step transition start Y Y Y OFF - OFF R/W NO OFF
M1042 Start pulse Y Y Y OFF - - R/W NO OFF
5. Progr ammi ng Concepts

5- 17
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1043 Zero point return completed Y Y Y OFF - OFF R/W NO OFF
M1044 Zero point condition Y Y Y OFF - OFF R/W NO OFF
M1045 All outputs clear inhibit Y Y Y OFF - - R/W NO OFF
M1046 STL state setting (ON) Y Y Y OFF - - R NO OFF
M1047 STL monitor enable - Y Y OFF - - R/W NO OFF
M1048 Flag for alarm point state - Y Y OFF - - R NO OFF
M1049 Monitor flag for alarm point - Y Y OFF - - R/W NO OFF
M1050 I001 masked Y Y - OFF - - R/W NO OFF
M1051 I101 masked Y Y - OFF - - R/W NO OFF
M1052 I201 masked Y Y - OFF - - R/W NO OFF
M1053 I301 masked Y Y - OFF - - R/W NO OFF
M1054 I401 masked - Y - OFF - - R/W NO OFF
M1055 I501 masked - Y - OFF - - R/W NO OFF
M1056 I601~I699 masked Y Y - OFF - - R/W NO OFF
M1057 I701~I799 masked - Y - OFF - - R/W NO OFF
M1059 I010~I060 masked - Y - OFF - - R/W NO OFF
M1060 System error message 1 Y Y Y OFF - - R NO OFF
M1061 System error message 2 Y Y Y OFF - - R NO OFF
M1062 System error message 3 Y Y Y OFF - - R NO OFF
M1063 System error message 4 Y Y Y OFF - - R NO OFF
M1064 Operator error Y Y Y OFF OFF - R NO OFF
M1065 Syntax error Y Y Y OFF OFF - R NO OFF
M1066 Program error Y Y Y OFF OFF - R NO OFF
M1067 Program execution error Y Y Y OFF OFF - R NO OFF
M1068 Execution error latched (D1068) Y Y Y OFF - - R NO OFF
M1070
PB/PC/PA/PH: Y1 time base switching for PWM
instruction (On: 100us; Off: 1ms)
PV: Y0 time base switching for PWM instruction
(On: 100us; Off: 1ms) when On, D1371 will
decide the time base)
Y Y Y OFF - - R/W NO OFF
ELC Syst em Manual

5- 18
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1071
Y2 time base switching for PWM instruction (On:
100us; Off: 1ms) when On, D1372 will decide the
time base)
- - Y OFF - - R/W NO OFF
M1072 Execute ELC RUN instruction Y Y Y OFF ON OFF R/W NO OFF
M1075 Error occurring when writing FLASH card - - Y OFF - - R NO OFF
M1076 Perpetual calendar error - Y Y OFF - - R NO OFF
M1077 Battery voltage is too low or malfunction - Y Y OFF - - R NO OFF
M1078
PLSY instruction Y0 pulse output stop
immediately flag
Y Y - OFF - - R/W NO OFF
M1079
PLSY instruction Y1 pulse output stop
immediately flag
Y Y - OFF - - R/W NO OFF
M1080 COM2 monitor request Y Y Y OFF - - R NO OFF
M1081 FLT instruction change direction flag - Y Y OFF - - R/W NO OFF
M1082
RTC flag changed
- Y Y OFF - - R NO OFF
M1083
Enable/Disable interrupt in FROM/TO mode
- Y Y OFF - - R/W NO OFF
M1084
Flag for detecting pulse width
Y Y - OFF OFF OFF R/W NO OFF
M1085 Selecting ELC-ACPGMXFR duplicating function Y Y Y OFF - - R/W NO OFF
M1086
Set ELC-ACPGMXFR ON/OFF switch of
password function
Y Y Y OFF - - R/W NO OFF
M1087
Enabling LV signal
- Y Y OFF - - R/W NO OFF
M1088
Matrix compared flag. If the result is the same,
M1088 = 1. If the result is different, M1088 = 0.
- Y Y OFF OFF - R/W NO OFF
M1089
Matrix search start flag. Compare from the first
bit and M1090=1.
- Y Y OFF OFF - R NO OFF
M1090
Matrix search start flag. Compare from the first
bit and M1090=1.
- Y Y OFF OFF - R NO OFF
M1091
Matrix finding bit flag. When find it, it will stop
comparing and M1091=1.
- Y Y OFF OFF - R NO OFF
M1092
Matrix pointer error flag. When pointer Pr
exceeds this range, M1092=1.
- Y Y OFF OFF - R NO OFF
M1093
Matrix pointer increase flag. It will add 1 to
present pointer.
- Y Y OFF OFF - R/W NO OFF
M1094
Matrix pointer clear flag. It will clear present
pointer to 0.
- Y Y OFF OFF - R/W NO OFF
M1095
Carry flag for matrix rotate/shift output
- Y Y OFF OFF - R NO OFF
M1096
Complement flag for matric shift input
- Y Y OFF OFF - R/W NO OFF
M1097
Direction flag for matrix rotate/shift
- Y Y OFF OFF - R/W NO OFF
M1098
Matrix count bit 0 or 1 flag
- Y Y OFF OFF - R/W NO OFF
5. Progr ammi ng Concepts

5- 19
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1099
It is ON when matrix count result 0
- Y Y OFF OFF - R/W NO OFF
M1100
SPD instruction sampling once
- - Y OFF - - R/W NO OFF
M1101
Start file register or not
- Y Y - - - R/W Yes OFF
M1102 Y10 end flag of pulse output (PH series only) - Y - OFF - - R/W NO OFF
M1103 Y11 end flag of pulse output (PH series only) - Y - OFF - - R/W NO OFF
M1115
Start switch for accel/decel pulse output (not
available in PH_V1.4 and above)
Y Y - OFF OFF OFF R/W NO OFF
M1116
Acceleration flag (not available in PH _V1.4 and
above)
Y Y - OFF OFF OFF R/W NO OFF
M1117
Target attained frequency flag (not available in
PH _V1.4 and above)
Y Y - OFF OFF OFF R/W NO OFF
M1118
Deceleration flag (not available in PH _V1.4 and
above)
Y Y - OFF OFF OFF R/W NO OFF
M1119
Completed function flag (not available in
PH_V1.4 and above)
Y Y - OFF OFF OFF R/W NO OFF
M1120
Set COM2 (RS-485) protocol kept on. D1120
cant be changed after the setting.
Y Y Y OFF OFF OFF R/W NO OFF
M1121
Transmission ready
Y Y Y OFF OFF ON R NO OFF
M1122
Sending request
Y Y Y OFF OFF OFF R/W NO OFF
M1123 Receiving completed Y Y Y OFF OFF OFF R/W NO OFF
M1124 Receiving wait Y Y Y OFF OFF OFF R/W NO OFF
M1125 Communication reset Y Y Y OFF OFF OFF R/W NO OFF
M1126 STX/ETX user/system selection Y Y Y OFF OFF OFF R/W NO OFF
M1127
MODRD/RDST/MODRW instructions. Data
receiving completed.
Y Y Y OFF OFF OFF R/W NO OFF
M1128 Transmitting/Receiving Indication Y Y Y OFF OFF OFF R/W NO OFF
M1129 Receiving time out Y Y Y OFF OFF - R/W NO OFF
M1130 STX/ETX selection Y Y Y OFF OFF - R/W NO OFF
M1131
MODRD/RDST/MODRW, M1131=ON when data
convert to HEX
Y Y Y OFF OFF - R NO OFF
M1132
ON= no relative communications instruction in
ELC program.
Y Y Y OFF - - R NO OFF
M1133
Special high speed pulse (50KHz) output swich
(ON = start) (PC/PA)
Y10 outputs starting flag for two-axis
synchronous control (PH)
- Y - OFF OFF OFF R/W NO OFF
M1134
ON is continuous output switch (not available in
PH_V1.4 and above)
- Y - OFF OFF - R/W NO OFF
ELC Syst em Manual

5- 20
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1135
Output pulse numbers attained flag (PC/PA)
Y11 outputs starting flag for two-axis synchronous
control (PH)
- Y - OFF OFF OFF R/W NO OFF
M1138
Set COM1 (RS-232) protocol kept on. D1036
cant be changed after setting
Y Y Y OFF - - R/W NO OFF
M1139
COM1 (RS-232) ASCII/RTU mode when ELC is
slave. OFF=ASCII, ON=RTU
Y Y Y OFF - - R/W NO OFF
M1140 MODRD/MODWR/MODRW data received error Y Y Y OFF OFF - R NO OFF
M1141 MODRD/MODWR/MODRW instruction error Y Y Y OFF OFF - R NO OFF
M1142 MVX instruction data received error Y Y Y OFF OFF - R NO OFF
M1143
1. COM2 (RS-485) ASCII/RTU mode selections
when ELC is SLAVE (it is OFF when in ASCII
mode and it is ON when in RTU)
2. COM2 (RS-485) ASCII/RTU mode selections
when ELC is MASTER (used with MODRD/
MODWR/MODRW instructions) (it is OFF when
in ASCII mode and it is ON when in RTU mode)
Y Y Y OFF OFF - R/W NO OFF
M1144
Output start switch of accel/decel pulse output
function of adjustable slope
- Y - OFF OFF OFF R/W NO OFF
M1145
Acceleration flag of accel/decel pulse output
function of adjustable slope
- Y - OFF OFF - R NO OFF
M1146
Target attained frequency flag of accel/decel
pulse output function of adjustable slope
- Y - OFF OFF - R NO OFF
M1147
Deceleration flag of accel/decel pulse output
function of adjustable slope
- Y - OFF OFF - R NO OFF
M1148
Complete function flag of accel/decel pulse
output function of adjustable slope
- Y - OFF OFF OFF R/W NO OFF
M1149
Stop counting temporality flag of accel/decel
pulse output function of adjustable slope
- Y - OFF OFF - R/W NO OFF
M1150
DHSZ instruction in multiple set values
comparison mode
- - Y OFF - - R/W NO OFF
M1151
The execution of DHSZ multiple set values
comparison mode is completed.
- - Y OFF - - R NO OFF
M1152
Setting up DHSZ instruction as frequency control
mode
- - Y OFF - - R/W NO OFF
M1153
DHSZ frequency control mode has been
executed.
- - Y OFF - - R NO OFF
M1154
Start designated deceleration function flag of
accel/decel pulse output function of adjustable
slope
- Y - OFF - - R/W NO OFF
M1161 8/16 bits mode (ON = 8 bit mode) Y Y Y OFF - - R/W NO OFF
M1162
Switching between decimal integer and binary
floating point for SCLP instruction
On: binary floating point; Off: decimal integer
Y Y Y OFF - - R/W NO OFF
5. Progr ammi ng Concepts

5- 21
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1165
When On, the program and password on flash
will be copied to the ELC when ELC is powered.
- - Y - - - R/W YES OFF
M1166
When On, the recipe on flash will be copied to
the ELC when ELC is powered.
- - Y - - - R/W YES OFF
M1167 HKY input is 16 bits mode - Y Y OFF - - R/W NO OFF
M1168 SMOV working mode indication - Y Y OFF - - R/W NO OFF
M1169 Selecting PWD modes - - Y
OFF - - R/W NO OFF
M1170 Enabling single step execution - - Y
OFF - - R/W NO OFF
M1171 Single step execution - - Y
OFF - - R/W NO OFF
M1172 2-phase pulse output switch (on is start) - Y - OFF OFF OFF R/W NO OFF
M1173 ON is continuous output switch - Y - OFF - - R/W NO OFF
M1174 Output pulse number attained flag - Y - OFF OFF OFF R/W NO OFF
M1175 Losing ELC parameter data
- - Y
- - - R YES OFF
M1176 Losing the data in ELC program
- - Y
- - - R YES OFF
M1178 VR0 Variable resistor enable - Y Y OFF - - R/W NO OFF
M1179 VR1 Variable resistor enable - Y Y OFF - - R/W NO OFF
M1196
7-Seg Display mode. ON=Hex, OFF=Decimal
PA model only
- Y - OFF - - R/W NO OFF
M1197
7-Seg display. Display decimal point to the right
of the LSD. PA model only
- Y - OFF - - R/W NO OFF
M1198
7-Seg display. Display decimal point to the right
of the MSD. PA model only
- Y - OFF - - R/W NO OFF
M1200 C200 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1201 C201 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1202 C202 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1203 C203 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1204 C204 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1205 C205 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1206 C206 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1207 C207 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1208 C208 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1209 C209 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1210 C210 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
ELC Syst em Manual

5- 22
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1211 C211 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1212 C212 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1213 C213 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1214 C214 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1215 C215 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1216 C216 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1217 C217 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1218 C218 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1219 C219 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1220 C220 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1221 C221 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1222 C222 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1223 C223 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1224 C224 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1225 C225 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1226 C226 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1227 C227 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1228 C228 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1229 C229 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1230 C230 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1231 C231 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1232 C232 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1233 C233 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1234 C234 counting mode (on: count down) - Y Y OFF - - R/W NO OFF
M1235 C235 counting mode (on: count down) Y Y Y OFF - - R/W NO OFF
M1236 C236 counting mode (on: count down) Y Y Y OFF - - R/W NO OFF
M1237 C237 counting mode (on: count down) Y Y Y OFF - - R/W NO OFF
M1238 C238 counting mode (on: count down) Y Y Y OFF - - R/W NO OFF
M1239 C239 counter mode setting (on: count down) - Y Y OFF - - R/W NO OFF
5. Progr ammi ng Concepts

5- 23
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1240 C240 counter mode setting (on: count down) - Y Y OFF - - R/W NO OFF
M1241 C241 counter mode setting (on: count down) Y Y Y OFF - - R/W NO OFF
M1242 C242 counter mode setting (on: count down) Y Y Y OFF - - R/W NO OFF
M1243
C243 counter mode setting (on: count down)
PH model only
- Y Y OFF - - R/W NO OFF
M1244 C244 counter mode setting (on: count down) Y Y Y OFF - - R/W NO OFF
M1245
C245 counter mode setting (on: count down)
PH model only
- Y - OFF - - R/W NO OFF
M1246 C246 counter monitor (on: count down) Y Y Y OFF - - R NO OFF
M1247 C247 counter monitor (on: count down) Y Y Y OFF - - R NO OFF
M1248 C248 counter monitor (on: count down) - - Y OFF - - R NO OFF
M1249 C249 counter monitor (on: count down) Y Y Y OFF - - R NO OFF
M1250
C250 counter monitor (on: count down)
PH model only
- Y - OFF - - R NO OFF
M1251 C251 counter monitor (on: count down) Y Y Y OFF - - R NO OFF
M1252 C252 counter monitor (on: count down) Y Y Y OFF - - R NO OFF
M1253 C253 counter monitor (on: count down) - - Y OFF - - R NO OFF
M1254 C254 counter monitor (on: count down) Y Y Y OFF - - R NO OFF
M1255 C255 counter monitor (on: count down) - Y - OFF - - R NO OFF
M1258
Y0 pulse output signal reversing for PWM
instruction
- - Y OFF
- - R/W NO OFF
M1259
Y2 pulse output signal reversing for PWM
instruction
- - Y OFF
- - R/W NO OFF
M1260
Let X5 be the reset input signal of all high-speed
counters
- Y - OFF - - R/W NO OFF
M1261
High-speed comparator comparison flag for
DHSCR instruction
- - Y OFF
- - R/W NO
OFF
M1264 Enabling reset function of HHSC0
- - Y OFF
- - R/W NO
OFF
M1265 Enabling start function of HHSC0
- - Y OFF
- - R/W NO
OFF
M1266 Enabling reset function of HHSC1
- - Y OFF
- - R/W NO
OFF
M1267 Enabling start function of HHSC1
- - Y OFF
- - R/W NO
OFF
M1268 Enabling reset function of HHSC2
- - Y OFF
- - R/W NO
OFF
M1269 Enabling start function of HHSC2
- - Y OFF
- - R/W NO
OFF
ELC Syst em Manual

5- 24
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1270 Enabling reset function of HHSC3
- - Y OFF
- - R/W NO
OFF
M1271 Enabling start function of HHSC3
- - Y OFF
- - R/W NO
OFF
M1272 Reset control of HHSC0
- - Y OFF
- - R/W NO
OFF
M1273 Start control of HHSC0
- - Y OFF
- - R/W NO
OFF
M1274 Reset control of HHSC1
- - Y OFF
- - R/W NO
OFF
M1275 Start control of HHSC1
- - Y OFF
- - R/W NO
OFF
M1276
Reset control of HHSC2 - - Y OFF
- - R/W NO
OFF
M1277
Start control of HHSC2 - - Y OFF
- - R/W NO
OFF
M1278 Reset control of HHSC3
- - Y OFF
- - R/W NO
OFF
M1279 Start control of HHSC3
- - Y OFF
- - R/W NO
OFF
M1280 Inhibiting I000 / I001
- - Y OFF
- - R/W NO
OFF
M1281 Inhibiting I100 / I101
- - Y OFF
- - R/W NO
OFF
M1282 Inhibiting I200 / I201
- - Y OFF
- - R/W NO
OFF
M1283 Inhibiting I300 / I301
- - Y OFF
- - R/W NO
OFF
M1284 Inhibiting I400 / I401
- - Y OFF
- - R/W NO
OFF
M1285 Inhibiting I500 / I501
- - Y OFF
- - R/W NO
OFF
M1286 Inhibiting I601~I699
- - Y OFF
- - R/W NO
OFF
M1287 Inhibiting I701~I799
- - Y OFF
- - R/W NO
OFF
M1288 Inhibiting I801~I899
- - Y OFF
- - R/W NO
OFF
M1289 Inhibiting I010
- - Y OFF
- - R/W NO
OFF
M1290 Inhibiting I020
- - Y OFF
- - R/W NO
OFF
M1291 Inhibiting I030
- - Y OFF
- - R/W NO
OFF
M1292 Inhibiting I040
- - Y OFF
- - R/W NO
OFF
M1293 Inhibiting I050
- - Y OFF
- - R/W NO
OFF
M1294 Inhibiting I060
- - Y OFF
- - R/W NO
OFF
M1295 Inhibiting I110
- - Y OFF
- - R/W NO
OFF
M1296 Inhibiting I120
- - Y OFF
- - R/W NO
OFF
M1297 Inhibiting I130
- - Y OFF
- - R/W NO
OFF
M1298 Inhibiting I140
- - Y OFF
- - R/W NO
OFF
5. Progr ammi ng Concepts

5- 25
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1299 I150 flag disable - Y Y OFF - - R/W NO OFF
M1300 Inhibiting I160
- - Y OFF
- - R/W NO
OFF
M1301 Inhibiting I170
- - Y OFF
- - R/W NO
OFF
M1302 Inhibiting I180
- - Y OFF
- - R/W NO
OFF
M1303 Switch flag of high and low bit - Y Y OFF - - R/W NO OFF
M1304 X input point can decide to be ON-OFF - Y Y OFF - - R/W NO OFF
M1305
Reverse operation of the 1st group pulse CH0
(Y0, Y1) for
PLSV/DPLSV/DRVI/DDRVI/DRVA/DDRVA
instruction
- - Y OFF - - R NO OFF
M1306
Reverse operation of the 2
nd
group pulse CH1
(Y2, Y3) for
PLSV/DPLSV/DRVI/DDRVI/DRVA/DDRVA
instruction
- - Y OFF - - R NO OFF
M1310
Immediately shut down Y10 pulse output starting
flag (For PH V1.4 and above only)
- Y - OFF OFF - R/W NO OFF
M1311
Immediately shut down Y11 pulse output starting
flag (For PH V1.4 and above only)
- Y - OFF OFF - R/W NO OFF
M1312 Controlling start input point of C235
- - Y OFF
- - R/W NO
OFF
M1313 Controlling start input point of C236
- - Y OFF
- - R/W NO
OFF
M1314 Controlling start input point of C237
- - Y OFF
- - R/W NO
OFF
M1315 Controlling start input point of C238
- - Y OFF
- - R/W NO
OFF
M1316 Controlling start input point of C239
- - Y OFF
- - R/W NO
OFF
M1317 Controlling start input point of C240
- - Y OFF
- - R/W NO
OFF
M1320 Controlling reset input point of C235
- - Y OFF
- - R/W NO
OFF
M1321 Controlling reset input point of C236
- - Y OFF
- - R/W NO
OFF
M1322 Controlling reset input point of C237
- - Y OFF
- - R/W NO
OFF
M1323 Controlling reset input point of C238
- - Y OFF
- - R/W NO
OFF
M1324 Controlling reset input point of C239
- - Y OFF
- - R/W NO
OFF
M1325 Controlling reset input point of C240
- - Y OFF
- - R/W NO
OFF
M1328 Enabling start/reset of C235
- - Y OFF
- - R/W NO
OFF
M1329 Enabling start/reset of C236
- - Y OFF
- - R/W NO
OFF
M1330 Enabling start/reset of C237
- - Y OFF
- - R/W NO
OFF
ELC Syst em Manual

5- 26
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1331 Enabling start/reset of C238
- - Y OFF
- - R/W NO
OFF
M1332 Enabling start/reset of C239
- - Y OFF
- - R/W NO
OFF
M1333 Enabling start/reset of C240
- - Y OFF
- - R/W NO
OFF
M1334
PV: stopping the 1
st
group pulse output CH0 (Y0,
Y1)
PH_V1.4 and above: selecting Y10 pulse output
stop modes
- Y Y OFF - - R/W NO OFF
M1335
PV: stopping the 2nd group pulse output CH1
(Y2, Y3)
SC_V1.4 and above: selecting Y11 pulse output
stop modes
- Y Y OFF - - R/W NO OFF
M1336
Sending out the 1
st
group pulse output CH0 (Y0,
Y1)
- - Y OFF OFF OFF
R NO
OFF
M1337
Sending out the 2
nd
group pulse output CH1 (Y2,
Y3)
- - Y OFF OFF OFF
R NO
OFF
M1338
Enabling offset pulses of the 1
st
group pulse
output CH0 (Y0, Y1)
- - Y OFF
- - R/W NO
OFF
M1339
Enabling offset pulses of the 2
nd
group pulse
output CH1 (Y2, Y3)
- - Y OFF
- - R/W NO
OFF
M1340
Generating interruption I110 after the 1
st
group
pulse output CH0 (Y0, Y1) is sent out
- - Y OFF
- - R/W NO
OFF
M1341
Generating interruption I120 after the 2
nd
group
pulse output CH1 (Y2, Y3) is sent out
- - Y OFF
- - R/W NO
OFF
M1342
Generating interruption I130 when the 1
st
group
pulse output CH0 (Y0, Y1) is sent out
- - Y OFF
- - R/W NO
OFF
M1343
Generating interruption I140 when the 2
nd
group
pulse output CH1 (Y2, Y3) is sent out
- - Y OFF
- - R/W NO
OFF
M1344
Enabling the offset of the 1
st
group pulse output
CH0 (Y0, Y1)
- - Y OFF
- - R/W NO
OFF
M1345
Enabling the offset of the 2
nd
group pulse output
CH1 (Y2, Y3)
- - Y OFF
- - R/W NO
OFF
M1346 Enabling ZRN CLEAR output signal
- - Y OFF
- - R/W NO
OFF
M1347
Reset after the 1
st
group pulse output CH0 (Y0,
Y1) is completed for PLSY instruction
- - Y OFF
- - R/W NO
OFF
M1348
Reset after the 2
nd
group pulse output CH1 (Y2,
Y3) is completed for PLSY instruction
- - Y OFF
- - R/W NO
OFF
M1350 Enable the function of ELC Link - Y Y OFF - - R/W NO OFF
M1351 Enable auto mode on ELC Link - Y Y OFF - - R/W NO OFF
5. Progr ammi ng Concepts

5- 27
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1352 Enable manual mode on ELC Link - Y Y OFF - - R/W NO OFF
M1353
Enable 32 slave unit linkage and up to 100 data
length of data exchange on EASY ELC LINK
- - Y OFF
- - R/W NO OFF
M1354
Enable simultaneous data read/write in a polling
of ELC Link
- Y Y OFF - - R/W NO OFF
M1360
Slave ID#1 status on ELC Link network
- Y Y OFF - - R NO OFF
M1361
Slave ID#2 status on ELC Link network
- Y Y OFF - - R NO OFF
M1362
Slave ID#3 status on ELC Link network
- Y Y OFF - - R NO OFF
M1363
Slave ID#4 status on ELC Link network
- Y Y OFF - - R NO OFF
M1364
Slave ID#5 status on ELC Link network
- Y Y OFF - - R NO OFF
M1365
Slave ID#6 status on ELC Link network
- Y Y OFF - - R NO OFF
M1366
Slave ID#7 status on ELC Link network
- Y Y OFF - - R NO OFF
M1367
Slave ID#8 status on ELC Link network
- Y Y OFF - - R NO OFF
M1368
Slave ID#9 status on ELC Link network
- Y Y OFF - - R NO OFF
M1369
Slave ID#10 status on ELC Link network
- Y Y OFF - - R NO OFF
M1370
Slave ID#11 status on ELC Link network
- Y Y OFF - - R NO OFF
M1371
Slave ID#12 status on ELC Link network
- Y Y OFF - - R NO OFF
M1372
Slave ID#13 status on ELC Link network
- Y Y OFF - - R NO OFF
M1373
Slave ID#14 status on ELC Link network
- Y Y OFF - - R NO OFF
M1374
Slave ID#15 status on ELC Link network
- Y Y OFF - - R NO OFF
M1375
Slave ID#16 status on ELC Link network
- Y Y OFF - - R NO OFF
M1376
Indicating Slave ID#1 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1377
Indicating Slave ID#2 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1378
Indicating Slave ID#3 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1379
Indicating Slave ID#4 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1380
Indicating Slave ID#5 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1381
Indicating Slave ID#6 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1382
Indicating Slave ID#7 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
ELC Syst em Manual

5- 28
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1383
Indicating Slave ID#8 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1384
Indicating Slave ID#9 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1385
Indicating Slave ID#10 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1386
Indicating Slave ID#11 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1387
Indicating Slave ID#12 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1388
Indicating Slave ID#13 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1389
Indicating Slave ID#14 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1390
Indicating Slave ID#15 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1391
Indicating Slave ID#16 data transaction status on
ELC Link
- Y Y OFF - - R NO OFF
M1392 Slave ID#1 linking error - Y Y OFF - - R NO OFF
M1393 Slave ID#2 linking error - Y Y OFF - - R NO OFF
M1394 Slave ID#3 linking error - Y Y OFF - - R NO OFF
M1395 Slave ID#4 linking error - Y Y OFF - - R NO OFF
M1396 Slave ID#5 linking error - Y Y OFF - - R NO OFF
M1397 Slave ID#6 linking error - Y Y OFF - - R NO OFF
M1398 Slave ID#7 linking error - Y Y OFF - - R NO OFF
M1399 Slave ID#8 linking error - Y Y OFF - - R NO OFF
M1400 Slave ID#9 linking error - Y Y OFF - - R NO OFF
M1401 Slave ID#10 linking error - Y Y OFF - - R NO OFF
M1402 Slave ID#11 linking error - Y Y OFF - - R NO OFF
M1403 Slave ID#12 linking error - Y Y OFF - - R NO OFF
M1404 Slave ID#13 linking error - Y Y OFF - - R NO OFF
M1405 Slave ID#14 linking error - Y Y OFF - - R NO OFF
M1406 Slave ID#15 linking error - Y Y OFF - - R NO OFF
M1407 Slave ID#16 linking error - Y Y OFF - - R NO OFF
M1408 Indicating reading from Slave ID#1 is completed - Y Y OFF - - R NO OFF
M1409 Indicating reading from Slave ID#2 is completed - Y Y OFF - - R NO OFF
5. Progr ammi ng Concepts

5- 29
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1410 Indicating reading from Slave ID#3 is completed - Y Y OFF - - R NO OFF
M1411 Indicating reading from Slave ID#4 is completed - Y Y OFF - - R NO OFF
M1412 Indicating reading from Slave ID#5 is completed - Y Y OFF - - R NO OFF
M1413 Indicating reading from Slave ID#6 is completed - Y Y OFF - - R NO OFF
M1414 Indicating reading from Slave ID#7 is completed - Y Y OFF - - R NO OFF
M1415 Indicating reading from Slave ID#8 is completed - Y Y OFF - - R NO OFF
M1416 Indicating reading from Slave ID#9 is completed - Y Y OFF - - R NO OFF
M1417 Indicating reading from Slave ID#10 is completed - Y Y OFF - - R NO OFF
M1418 Indicating reading from Slave ID#11 is completed - Y Y OFF - - R NO OFF
M1419 Indicating reading from Slave ID#12 is completed - Y Y OFF - - R NO OFF
M1420 Indicating reading from Slave ID#13 is completed - Y Y OFF - - R NO OFF
M1421 Indicating reading from Slave ID#14 is completed - Y Y OFF - - R NO OFF
M1422 Indicating reading from Slave ID#15 is completed - Y Y OFF - - R NO OFF
M1423 Indicating reading from Slave ID#16 is completed - Y Y OFF - - R NO OFF
M1424 Indicating writing to Slave ID#1 is completed - Y Y OFF - - R NO OFF
M1425 Indicating writing to Slave ID#2 is completed - Y Y OFF - - R NO OFF
M1426 Indicating writing to Slave ID#3 is completed - Y Y OFF - - R NO OFF
M1427 Indicating writing to Slave ID#4 is completed - Y Y OFF - - R NO OFF
M1428 Indicating writing to Slave ID#5 is completed - Y Y OFF - - R NO OFF
M1429 Indicating writing to Slave ID#6 is completed - Y Y OFF - - R NO OFF
M1430 Indicating writing to Slave ID#7 is completed - Y Y OFF - - R NO OFF
M1431 Indicating writing to Slave ID#8 is completed - Y Y OFF - - R NO OFF
M1432 Indicating writing to Slave ID#9 is completed - Y Y OFF - - R NO OFF
M1433 Indicating writing to Slave ID#10 is completed - Y Y OFF - - R NO OFF
M1434 Indicating writing to Slave ID#11 is completed - Y Y OFF - - R NO OFF
M1435 Indicating writing to Slave ID#12 is completed - Y Y OFF - - R NO OFF
M1436 Indicating writing to Slave ID#13 is completed - Y Y OFF - - R NO OFF
M1437 Indicating writing to Slave ID#14 is completed - Y Y OFF - - R NO OFF
M1438 Indicating writing to Slave ID#15 is completed - Y Y OFF - - R NO OFF
ELC Syst em Manual

5- 30
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1439 Indicating writing to Slave ID#16 is completed - Y Y OFF - - R NO OFF
M1440 Slave ID#17 status on ELC LINK network
- - Y
OFF - - R NO OFF
M1441 Slave ID#18 status on ELC LINK network - - Y OFF - - R NO OFF
M1442 Slave ID#19 status on ELC LINK network - - Y OFF - - R NO OFF
M1443 Slave ID#20 status on ELC LINK network - - Y OFF - - R NO OFF
M1444 Slave ID#21 status on ELC LINK network - - Y OFF - - R NO OFF
M1445 Slave ID#22 status on ELC LINK network - - Y OFF - - R NO OFF
M1446 Slave ID#23 status on ELC LINK network - - Y OFF - - R NO OFF
M1447 Slave ID#24 status on ELC LINK network - - Y OFF - - R NO OFF
M1448 Slave ID#25 status on ELC LINK network - - Y OFF - - R NO OFF
M1449 Slave ID#26 status on ELC LINK network - - Y OFF - - R NO OFF
M1450 Slave ID#27 status on ELC LINK network - - Y OFF - - R NO OFF
M1451 Slave ID#28 status on ELC LINK network - - Y OFF - - R NO OFF
M1452 Slave ID#29 status on ELC LINK network - - Y OFF - - R NO OFF
M1453 Slave ID#30 status on ELC LINK network - - Y OFF - - R NO OFF
M1454 Slave ID#31 status on ELC LINK network - - Y OFF - - R NO OFF
M1455 Slave ID#32 status on ELC LINK network - - Y OFF - - R NO OFF
M1456
Indicating Slave ID#17 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1457
Indicating Slave ID#18 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1458
Indicating Slave ID#19 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1459
Indicating Slave ID#20 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1460
Indicating Slave ID#21 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1461
Indicating Slave ID#22 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1462
Indicating Slave ID#23 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1463
Indicating Slave ID#24 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
5. Progr ammi ng Concepts

5- 31
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1464
Indicating Slave ID#25 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1465
Indicating Slave ID#26 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1466
Indicating Slave ID#27 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1467
Indicating Slave ID#28 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1468
Indicating Slave ID#29 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1469
Indicating Slave ID#30 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1470
Indicating Slave ID#31 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1471
Indicating Slave ID#32 data transaction status on
ELC LINK
- - Y OFF - - R NO OFF
M1472 Slave ID#17 linking error - - Y OFF - - R NO OFF
M1473 Slave ID#18 linking error - - Y OFF - - R NO OFF
M1474 Slave ID#19 linking error - - Y OFF - - R NO OFF
M1475 Slave ID#20 linking error - - Y OFF - - R NO OFF
M1476 Slave ID#21 linking error - - Y OFF - - R NO OFF
M1477 Slave ID#22 linking error - - Y OFF - - R NO OFF
M1478 Slave ID#23 linking error - - Y OFF - - R NO OFF
M1479 Slave ID#24 linking error - - Y OFF - - R NO OFF
M1480 Slave ID#25 linking error - - Y OFF - - R NO OFF
M1481 Slave ID#26 linking error - - Y OFF - - R NO OFF
M1482 Slave ID#27 linking error - - Y OFF - - R NO OFF
M1483 Slave ID#28 linking error - - Y OFF - - R NO OFF
M1484 Slave ID#29 linking error - - Y OFF - - R NO OFF
M1485 Slave ID#30 linking error - - Y OFF - - R NO OFF
M1486 Slave ID#31 linking error - - Y OFF - - R NO OFF
M1487 Slave ID#32 linking error - - Y OFF - - R NO OFF
M1488 Indicating reading from Slave ID#17 is completed - - Y OFF - - R NO OFF
ELC Syst em Manual

5- 32
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1489 Indicating reading from Slave ID#18 is completed - - Y OFF - - R NO OFF
M1490 Indicating reading from Slave ID#19 is completed - - Y OFF - - R NO OFF
M1491 Indicating reading from Slave ID#20 is completed - - Y OFF - - R NO OFF
M1492 Indicating reading from Slave ID#21 is completed - - Y OFF - - R NO OFF
M1493 Indicating reading from Slave ID#22 is completed - - Y OFF - - R NO OFF
M1494 Indicating reading from Slave ID#23 is completed - - Y OFF - - R NO OFF
M1495 Indicating reading from Slave ID#24 is completed - - Y OFF - - R NO OFF
M1496 Indicating reading from Slave ID#25 is completed - - Y OFF - - R NO OFF
M1497 Indicating reading from Slave ID#26 is completed - - Y OFF - - R NO OFF
M1498 Indicating reading from Slave ID#27 is completed - - Y OFF - - R NO OFF
M1499 Indicating reading from Slave ID#28 is completed - - Y OFF - - R NO OFF
M1500 Indicating reading from Slave ID#29 is completed - - Y OFF - - R NO OFF
M1501 Indicating reading from Slave ID#30 is completed - - Y OFF - - R NO OFF
M1502 Indicating reading from Slave ID#31 is completed - - Y OFF - - R NO OFF
M1503 Indicating reading from Slave ID#32 is completed - - Y OFF - - R NO OFF
M1504 Indicating writing to Slave ID#17 is completed - - Y OFF - - R NO OFF
M1505 Indicating writing to Slave ID#18 is completed - - Y OFF - - R NO OFF
M1506 Indicating writing to Slave ID#19 is completed - - Y OFF - - R NO OFF
M1507 Indicating writing to Slave ID#20 is completed - - Y OFF - - R NO OFF
M1508 Indicating writing to Slave ID#21 is completed - - Y OFF - - R NO OFF
M1509 Indicating writing to Slave ID#22 is completed - - Y OFF - - R NO OFF
M1510 Indicating writing to Slave ID#23 is completed - - Y OFF - - R NO OFF
M1511 Indicating writing to Slave ID#24 is completed - - Y OFF - - R NO OFF
M1512 Indicating writing to Slave ID#25 is completed - - Y OFF - - R NO OFF
M1513 Indicating writing to Slave ID#26 is completed - - Y OFF - - R NO OFF
M1514 Indicating writing to Slave ID#27 is completed - - Y OFF - - R NO OFF
M1515 Indicating writing to Slave ID#28 is completed - - Y OFF - - R NO OFF
M1516 Indicating writing to Slave ID#29 is completed - - Y OFF - - R NO OFF
M1517 Indicating writing to Slave ID#30 is completed - - Y OFF - - R NO OFF
5. Progr ammi ng Concepts

5- 33
Special M
Function
PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
M1518 Indicating writing to Slave ID#31 is completed - - Y OFF - - R NO OFF
M1519 Indicating writing to Slave ID#32 is completed - - Y OFF - - R NO OFF
M1520
PV: stopping the 3
rd
group pulse output CH2 (Y4,
Y5)
- - Y OFF - - R/W NO OFF
M1521
PV: stopping the 4
th
group pulse output CH3 (Y6,
Y7)
- - Y OFF - - R/W NO OFF
M1522
PV: sending out the 3
rd
group pulse output CH2
(Y4, Y5)
- - Y OFF - OFF R NO OFF
M1523
PV: sending out the 4
th
group pulse output CH3
(Y6, Y7)
- - Y OFF - OFF R NO OFF
M1524
PV: reset after the 3
rd
group pulse output CH2
(Y4, Y5) is completed for PLSY instruction
- - Y OFF - - R/W NO OFF
M1525
PV: reset after the 4
th
group pulse output CH3
(Y6, Y7) is completed for PLSY instruction
- - Y OFF - - R/W NO OFF
M1526
PV: reversing Y4 pulse output signal for PWM
instruction
- - Y OFF - - R/W NO OFF
M1527
PV: reversing Y6 pulse output signal for PWM
instruction
- - Y OFF - - R/W NO OFF
M1530
PV: switching time base unit of Y4 output for
PWM instruction
On: 100us; Off: 1ms
- - Y OFF - - R/W NO OFF
M1531
PV: switching time base unit of Y6 output for
PWM instruction
On: 100us; Off: 1ms
- - Y OFF - - R/W NO OFF
M1532
PV: reverse operation of the 3
rd
group pulse CH2
(Y4, Y5) for PLSV/DPLSV/DRVI/DDRVI/DRVA
/DDRVA instruction
- - Y OFF - - R/W NO OFF
M1533
PV: reverse operation of the 4
th
group pulse CH3
(Y6, Y7) for PLSV/DPLSV/DRVI/DDRVI/DRVA
/DDRVA instruction
- - Y OFF - - R/W NO OFF
M1534
PV: CH0 being able to designate deceleration
time. Has to be used with D1348.
- - Y OFF - - R/W NO OFF
M1535
PV: CH1 being able to designate deceleration
time. Has to be used with D1349.
- - Y OFF - - R/W NO OFF
M1536
PV: CH2 being able to designate deceleration
time. Has to be used with D1350.
- - Y OFF - - R/W NO OFF
M1537
PV: CH3 being able to designate deceleration
time. Has to be used with D1351.
- - Y OFF - - R/W NO OFF
ELC Syst em Manual

5- 34
5.9 S Relay
Initial step relay Starting instruction in Sequential Function Chart (SFC).
Zero point return step relay Zero point return when using IST instruction in program. If not used
for the IST instruction, they can be used as general step relays.
General step relay S20 ~ S511, total 492 points (for PC/PA/PH series); S20 ~ S499, total
480 points (for PV series). General relays in sequential function chart
(SFC). They will be cleared when power loss after running.
Latched step relay S512 ~ S895, total 384 points (for PC/PA/PH series); S20 ~ S127,
total 108 points (for PB series); S500 ~ S899, total 400 points (for PV
series). In sequential function chart (SFC), latched step relay will be
saved when power loss after running. The state of power on after
power loss will be the same as the sate before power loss.
Step relay for alarm S896 ~ S1023, total 128 points (for PC/PA/PH series); S900 ~ S1023,
total 124 points (for PV series). The step relay for alarm uses with
alarm drive instruction ANS to the contact for alarm. It is used to
record warning and eliminate external malfunction.

5.10 T (Timer)
Timer resolution is 1ms, 10ms or 100ms depending on the selection of the timer number and the
selection of Mxxxx relay. Timers always increment up and the output coil of the timer will be ON when
the present value of the timer reaches the preset value. Timers increment by one (1) whenever the
base resolution is reached, meaning timers are truly counters that increment based on the timer
resolution.
i.e. T200 set for 10ms resolution, present value = 10 (decimal)
= 10ms * 10 = 100ms time has elapsed.
General and accumulative timers function differently as described below.
General Timer
For PB/PC/PA/PH series: The timer executes once when the program reaches END instruction. When
TMR instruction is executed, the output coil will be On when the timing reaches its target.
For PV series: The timer executes once when the program reaches TMR instruction. When TMR
instruction is executed, the output coil will be On when the timing reaches its target.
5. Progr ammi ng Concepts

5- 35
Timer T0 will begin timing when X0=ON. If T0
has not reached its preset value by the time
X0=OFF, then T0 will reset to zero (0). It will
begin timing again when X0=ON.
T0
Y0
X0
TMR T0 K100
X0
T0
Y0
K100
10 sec
present
value


Accumulative Timer
For PB/PC/PA/PH series: The timer executes once when the program reaches END instruction. When
TMR instruction is executed, the output coil will be On when the timing reaches its target.
For PV series: The timer executes once when the program reaches TMR instruction. When TMR
instruction is executed, the output coil will be On when the timing reaches its target.
Timer T250 will begin timing when X0=ON. If
T250 has not reached its preset value by the time
X0=OFF, then T0 will pause. When X0=ON,
T250 will resume timing from where it was
paused.
T250
Y0
X0
TMR T250 K100
X0
T2
Y0
K100
T1+T2=10sec
T250
T1
present
value


Timers for Subroutines and Interrupts
Timers T192~T199 (PC/PA/PH/PV Models) are the only timers that can be used in a subroutine or
interrupt. Use of any other timer will not work.

5.11 C (Counter)
Counters will increment their present count value when the input circuit transitions from OFFON.

Item 16 bits counters 32 bits counters
Type General General High speed
Count
direction
Count up Count up/down
Range 0~32,767 -2,147,483,648~+2,147,483,647
ELC Syst em Manual

5- 36
Item 16 bits counters 32 bits counters
Preset value
register
Constant K or data register D
(Word)
Constant K or data register D (Dword)
Output
operation
Counter will stop when preset
value reached
Counter will keep on counting when preset
value reached
Output
contact
function
Ouptut Coil will be = ON when
counter reaches preset value.
Output coil = ON when counter reaches or is
above preset value.
Output coil = OFF when counter is below
preset value.
Reset action
The present value will reset to 0 when RST instruction is executed, output coil =
OFF.
Update
method
During every scan
During
every scan
Immdiate update is
independent of scan time.

Example:
LD X0
RST C0
LD X1
CNT C0 K5
LD C0
OUT Y0
C0
Y0
X1
C0 K5 CNT
X0
C0 RST



When X0=ON, RST instruction will
reset C0. When X1 transitions
OFFON, C0 will count up (add 1).
When C0 reaches the preset value K5,
C0 output coil Y0 will = ON and C0 will
stop counting and ignore the X1 trigger
signal.
X0
X1
0
1
2
3
4
5
0
Contacts Y0, C0
C0
present
value
settings


M relays M1200 M1254 are used to set the up/down count direction for C200 C254 respectively.
Setting the corresponding M relay ON will set the counter to count down.
5. Progr ammi ng Concepts

5- 37
Example:
LD X20
OUT M1200
LD X21
RST C200
LD X22
CNT C200 K-5
LD C200
OUT Y0
C200
Y0
X22
C200 K-5 DCNT
X21
C200 RST
X20
M1200

1. When X20 =ON, M1200=ON setting C200 to count down.
2. When X21 = ON, C200 will reset.
3. When X22 transistions from OFFON, C200 will increment or decrement (depending the M1200
ON/OFF) the present value.
4. When C200 transitions from K-6 to K-5, C200=ON.
5. When counter C200 is from K-5 to K-6, C200=OFF.
X20
X21
X22
0
1
2
3
4
5
4
3
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
0
-7
-6
-5
-4
-3
contacts
Y0, C0
C200
present
value
Count Up
Count Down
Count Up


5.12 High-speed Counters
High-speed counter provided in PB/PC/PA/PH series Models:
PB/PC/PA/PH High-speed counters can be 1-phase or 2 phases and can count up to a frequency of
20KHz. The table below dsiplays the relation to inputs X0-X5, X10-X11and counters C235-C255. (PB:
X0-X3, PC/PA: X0-X5, PH: X0-X5, X10, X11). PC/PA: C253 (2 phase input) High-speed counter can
count up to a frequency of 25KHz. PH: C255 (2 phase input) High-speed counter can count up to a
frequency of 50KHz.
ELC Syst em Manual

5- 38
1-phase input 1-phase 2 inputs 2-phase inputs
C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C245 C248 C246 C247 C249 C250 C251 C252 C253 C254 C255
X0 U/D U/D U/D U U U A A B A
X1 U/D R R D D D B B A B
X2 U/D U/D R R R R
X3 U/D R S S S
X4 U/D
X5 U/D
X10 U/D U/D U A
X11 U/D R D B

U: Increasing A: A phase input S: Start input
D: Decreasing B: B phase input R: Clear input

Input X5 has two functions:
M1260=OFF C240 is general U/D high-speed counter.
M1260=ON It is Global reset for C235~C239.

a) Counting mode selection
The high-speed counter uses special D1022 in 2-phase inputs counting mode to select double
frequency mode. D1022 content will be loaded in at the first scan time when ELC switches from STOP
to RUN.
Device No. Functions
D1022 Double frequency setting of counter counting method
D1022=K1 Normal frequency mode
D1022=K2 Double frequency mode (factory setting)
D1022=K4 Four times frequency mode

b) Double frequency mode (, means the action of counting)

Counting mode Wave for counting mode
2-phase
inputs
1

(
n
o
r
m
a
l

f
r
e
q
u
e
n
c
y
)

A-phase
B-phase
counting up
counting down

5. Progr ammi ng Concepts

5- 39
Counting mode Wave for counting mode
2

(
d
o
u
b
l
e

f
r
e
q
u
e
n
c
y
)

B-phase
counting up
counting down
A-phase
4

(
f
o
u
r

t
i
m
e
s

f
r
e
q
u
e
n
c
y
)

A-phase
B-phase
counting up
counting down

c) Device number and special registers for high-speed counter

Device number Functions
M1235 ~ M1245
C235 ~ C245 are count direction of high-speed counters.
When M1235 ~ M1245=OFF, C235 ~ C245 is count up. When M1235 ~
M1245=ON, C235 ~ C245 is count down.
M1246 ~ M1255
C246 ~ C255 are monitor count direction of high-speed counters.
When C246 ~ C255 counts up, M1246 ~ M1255=OFF. When C246 ~
C255 count down, M1246 ~ M1255=ON.
D1022 Double frequency selection of AB phase counter
ELC Syst em Manual

5- 40
High-speed counter provided in PV series Model:
PV series supports high speed counters. C235 ~ C240 are program-interruption 1-phase high speed
counter with a total bandwidth of 20KHz, can be used alone with a counting frequency of up to 10KHz.
C241 ~ C254 are hardware high speed counter (HHSC). There are four HHSC in PV series, HHSC0 ~
3. The pulse input frequency of HHSC0 and HHSC1 can reach 200KHz and that of HHSC2 and
HHSC3 can reach 20KHz (1 phase or A-B phase). The pulse input frequency of HHSC0 ~ 3 of PV
series can reach 200KHz, among which:
C241, C246 and C251 share HHSC0
C242, C247 and C252 share HHSC1
C243, C248 and C253 share HHSC2
C244, C249 and C254 share HHSC3
a) Every HHSC can only be designated to one counter by DCNT instruction.
b) There are three counting modes in every HHSC (see the table below):
i) 1-phase 1 input refers to pulse/direction mode.
ii) 1-phase 2 inputs refers to clockwise/counterclockwise (CW/CCW) mode.
iii) 2-phase 2 inputs refers to A-B phase mode.
Counter
type
Program-interruption
high speed counter
Hardware high speed counter
1-phase 1 input 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs Type
Input C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C246 C247 C248 C249 C251 C252 C253 C254
X0 U/D U/D U A
X1 U/D D B
X2 U/D R R R
X3 U/D S S S
X4 U/D U/D U A
X5 U/D D B
X6 R R R
X7 S S S
X10 U/D U A
X11 D B
X12 R R R
X13 S S S
X14 U/D U A
X15 D B
X16 R R R
X17 S S S
U: Progressively increasing input A: A phase input S: Input started
B: Progressively decreasing input B: B phase input R: Input cleared
c) In PV series, there is no limitation on the times of using the hardware high speed counter
5. Progr ammi ng Concepts

5- 41
related instructions, DHSCS, DHSCR and DHSZ. However, when these instructions are
enabled at the same time, there will be some limitations. DHSCS instruction will occupy 1
group of settings, DHSCR 1 group of settings and DHSZ 2 groups of settings. These three
instructions cannot occupy 8 groups of settings in total; otherwise the system will ignore the
instructions which are not the first scanned and enabled.
d) System structure of the hardware high speed counters:
i) HHSC0 ~ 3 have reset signals and start signals from external inputs. Settings in M1272,
M1274, M1276 and M1278 are reset signals of HHSC0, HHSC1, HHSC2 and HHSC3.
Settings in M1273, M1275, M1277 and M1279 are start signals of HHSC0, HHSC1,
HHSC2 and HHSC3.
ii) If the external control signal inputs of R and S are not in use, you can set
M1264/M1266/M1268/M1270 and M1265/M1267/M1269/M1271 as True and disable the
input signals. The corresponding external inputs can be used again as general input
points (see the figure below).
iii) When special M is used as a high speed counter, the inputs controlled by START and
RESET will be affected by the scan time.
HHSC0
HHSC1
HHSC2
HHSC3
M1265
M1273
M1267
M1275
M1269
M1277
M1271
M1279
X3 X7 X17 X13
M1272 M1274 M1276 M1278
M1264 M1266 M1268 M1270
X2 X6 X12 X16
M1241 M1242 M1243 M1244
C241 C242 C243 C244
D1225 D1226 D1227 D1228
X1 X5 X11 X15
X14 X10 X4 X0
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
M1246
M1247
M1248
M1249 M1254
M1253
M1252
M1251
DHSCS
DHSCR
DHSCZ
I 010
I 020
I 030
I 040
I 050
I 060
M1289
M1290
M1291
M1292
M1293
M1294 M1294
HHSC0
HHSC1
HHSC2
HHSC3
AND
OR
AND
OR
U/D
U
A
B
D Counti ng pul ses
Counti ng pul ses
Pr esent val ue i n counter
Sel ect counti ng modes
U/D mode setup flag
Reset signal R
Set val ues 1 ~ 4 i ndi cate
Mode 1 ~ 4 (1 ~ 4 ti mes frequency)
Start signal S
Inter rupti on forbi dden fl ag
High-speed
comparative
instruction
Output reaches
compar ati ve val ue
Output reaches
compar ati ve val ue
for outputs
Counti ng up/down
monitori ng fl ag
Comparator
Counti ng reaches set value
8 set val ues
DHSCS occupi es 1 group of set val ues
DHSCR occupies 1 group of set values
DHSCZ occupi es 2 gr oups of set val ues
SET/RESET
010 ~ 060 clear
the pr esent val ue
I I
ELC Syst em Manual

5- 42
e) Counting modes:
Special D1225 ~ D1228 are for setting up different counting modes of the hardware high
speed counters (HHSC0 ~ 3) in PV series. There are normal ~ 4 times frequency for the
counting and the default setting is double frequency.

Counting modes Wave pattern
Type
Set value in
special D
Counting up(+1) Counting down(-1)
1
(Normal
frequency)
U/D
U/D FLAG
1-phase
1 input 2
(Double
frequency)
U/D
U/D FLAG

1
(Normal
frequency)
U
D
1-phase
2 inputs 2
(Double
frequency)
U
D

1
(Normal
frequency)
A
B

2
(Double
frequency)
A
B

3
(Triple
frequency)
A
B

2-phase
2 inputs
4
(4 times
frequency)
A
B


f) Device number and special registers for high-speed counter

Flag Function
M1150 DHSZ instruction in multiple set values comparison mode
M1151 The execution of DHSZ multiple set values comparison mode is completed.
M1152 Set DHSZ instruction as frequency control mode
5. Progr ammi ng Concepts

5- 43
Flag Function
M1153 DHSZ frequency control mode has been executed.
M1235 ~
M1245
Designating the counting direction of high speed counters C235 ~ C245
When M1235 ~ M1245 = Off, C235 ~ C245 will perform a counting up.
When M1235 ~ M1245 = On, C235 ~ C245 will perform a counting down.
M1246 ~
M1255
Monitor the counting direction of high speed counters C246 ~ C255
When M1246 ~ M1255 = Off, C246 ~ C255 will perform a counting up.
When M12 M1246 ~ M1255 = On, C246 ~ C255 will perform a counting
down.
M1260 X5 as the reset input signal of all high speed counters
M1261 High-speed comparison flag for DHSCR instruction
M1264 Disable the external control signal input point of HHSC0 reset signal point (R)
M1265 Disable the external control signal input point of HHSC0 start signal point (S)
M1266 Disable the external control signal input point of HHSC1 reset signal point (R)
M1267 Disable the external control signal input point of HHSC1 start signal point (S)
M1268 Disable the external control signal input point of HHSC2 reset signal point (R)
M1269 Disable the external control signal input point of HHSC2 start signal point (S)
M1270 Disable the external control signal input point of HHSC3 reset signal point (R)
M1271 Disable the external control signal input point of HHSC3 start signal point (S)
M1272 Internal control signal input point of HHSC0 reset signal point (R)
M1273 Internal control signal input point of HHSC0 start signal point (S)
M1274 Internal control signal input point of HHSC1 reset signal point (R)
M1275 Internal control signal input point of HHSC1 start signal point (S)
M1276 Internal control signal input point of HHSC2 reset signal point (R)
M1277 Internal control signal input point of HHSC2 start signal point (S)
M1278 Internal control signal input point of HHSC3 reset signal point (R)
M1279 Internal control signal input point of HHSC3 start signal point (S)
M1289 High speed counter I010 interruption forbidden
M1290 High speed counter I020 interruption forbidden
ELC Syst em Manual

5- 44
Flag Function
M1291 High speed counter I030 interruption forbidden
M1292 High speed counter I040 interruption forbidden
M1293 High speed counter I050 interruption forbidden
M1294 High speed counter I060 interruption forbidden
M1312 C235 Start input point control
M1313 C236 Start input point control
M1314 C237 Start input point control
M1315 C238 Start input point control
M1316 C239 Start input point control
M1317 C240 Start input point control
M1320 C235 Reset input point control
M1321 C236 Reset input point control
M1322 C237 Reset input point control
M1323 C238 Reset input point control
M1324 C239 Reset input point control
M1325 C240 Reset input point control
M1328 Enable Start/Reset of C235
M1329 Enable Start/Reset of C236
M1330 Enable Start/Reset of C237
M1331 Enable Start/Reset of C238
M1332 Enable Start/Reset of C239
M1333 Enable Start/Reset of C240
D1022 Multiplied frequency of A-B phase counters for PB/PC series
D1150 Table counting register for DHSZ multiple set values comparison mode
D1151 Register for DHSZ instruction frequency control mode (counting by table)
D1152
D1153
In frequency control mode, DHSZ reads the upper and lower limits in the
table counting register D1153 and D1152.
D1166 Switching between rising/falling edge counting modes of X10 (for PH series
5. Progr ammi ng Concepts

5- 45
Flag Function
only)
D1167
Switching between rising/falling edge counting modes of X11 (for PH series
only)
D1225 The counting mode of the 1
st
group counters (C241, C246, C251)
D1226 The counting mode of the 2
nd
group counters (C242, C247, C252)
D1227 The counting mode of the 3
rd
group counters (C243, C248, C253)
D1228 The counting mode of the 4
th
group counters (C244, C249, C254)
D1225 ~
D1228
Counting modes of HHSC0 ~ HHSC3 in PV series (default = 2)
1: Normal frequency counting mode
2: Double frequency counting mode
3: Triple frequency counting mode
4: 4 times frequency counting mode

ELC Syst em Manual

5- 46
1-phase 1-inputs high-speed counter:

Example:
LD X20
RST C241
LD X21
OUT M1241
LD X22
DCNT C241 K5
LD C241
OUT Y0
C241
Y0
X22
C241 K5 DCNT
X21
C241 RST
X20
M1241

X21 drives M1241 to decide C241 is addition or subtraction.
When X20=ON and RST instruction is executed, clear C241 to 0 and reset output contact to off.
When X22=ON, C241 receives count signal from X0 and counter will count up (+1) or count down (-1).
When counter C241 attains settings K5, C241 will be ON. If there is still signal input for X0, it will keep
on counting.
C241 in PB and PC/PA/PH series has external input signals to reset X1.
C241 in PV series has external input signals to reset X2 and start X3.
The external input contact of reset signal of C241 (HHSC0) in PV series is disabled by M1264. The
external input contact of start signal is disabled by M1265.
The internal input contact of reset signal of C241 (HHSC0) in PV series is disabled by M1272. The
internal input contact of start signal is disabled by M1273.
The counting modes (normal frequency or double frequency) of C246 (HHSC0) in PV series can be set
up by D1225. The default setting is double frequency mode.
X22
X0
0
1
2
3
4
5
X20
X21,M1241 contact
6
7
6
5
4
3
counting up
counting down
C241
present
value
Y0, C241 contact

5. Progr ammi ng Concepts

5- 47
1-phase 2 inputs high-speed counters:
Example:
LD X20
RST C246
LD X21
DCNT C246 K5
LD C246
OUT Y0
C246
Y0
X21
C246 K5 DCNT
C246 RST
X20

When X20=ON and RST instruction is executed, clear C246 to 0 and reset output contact to off.
When X21=ON, C246 receives count signal from X0 input terminal and counter will count up (+1) or
receive count signal from X1 input terminal and counter will count down (-1).
When C246 attains settings K5, C246 will be on. After C246 is ON, if there is counter pulse input, C246
will keep on counting.
C246 in PV series has external input signals to reset X2 and start X3.
The counting modes (normal frequency or double frequency) of C246 (HHSC0) in PV series can be set
up by D1225. The default setting is double frequency mode.
The external input contact of reset signal of C246 (HHSC0) in PV series is disabled by M1264. The
external input contact of start signal is disabled by M1265.
The internal input contact of reset signal of C246 (HHSC0) in PV series is disabled by M1272. The
internal input contact of start signal is disabled by M1273.

X21
0
1
2
3
4
5
X20
6
7
6
5
4
3
X1
count up
X0
count down
C246
present
value
Y0, C246 contact

ELC Syst em Manual

5- 48
2-phase AB input high-speed counter:
Example:
LD X20
RST C251
LD X21
DCNT C251 K5
LD C251
OUT Y0
C251
Y0
X21
C251 K5 DCNT
C251 RST
X20

When X20=ON, RST instruction is executed and resets C251 to 0, output contact is reset to off.
C251 receives A phase counting signal of X0 input terminal and B phase counting signal of X1 input
terminal to execute add 1 (count up) or subtract 1 (count down) when X21=on.
When counter C251 attains settings K5, C251 contact will be ON. After C251 is ON, if there is counter
pulse input, C251 will keep on counting.
Frequency can be set to normal, double frequency or four times frequency by D1022 (counting mode
setting). Factory setting is double frequency.
C251 has external input reset signal X5.
In C251, when X21 is On and C251 receives the A-phase signals from X0 and B-phase signals from
X1, the Present Value in the counter will count up (plus 1) or count down (minus 1). You can select
different counting modes if you use PV series.
C251 in PV series has external input signals to reset X2 and start X3.
The counting modes (normal frequency, double frequency, triple frequency or 4 times frequency) of
C251 (HHSC0) in PV series can be set up by D1225. The default setting is double frequency mode.
The external input contact of reset signal of C246 (HHSC0) in PV series is disabled by M1264. The
external input contact of start signal is disabled by M1265.
The internal input contact of reset signal of C246 (HHSC0) in PV series is disabled by M1272. The
internal input contact of start signal is disabled by M1273.
5. Progr ammi ng Concepts

5- 49
PB/PC/PA/PH series (Double frequency):

0
1
2
3
4
5
X21
X20
6
3
0
1
2
3
4
5
A-phase X0
B-phase X1
C251 present value
Y0, C251 contact
Counting up Counting down


PV series (Double frequency):

0
1
2
3
4
5
X21
X20
6
2
0
1
2
3
4
5
A-phase X0
B-phase X1
C251 present value
Y0, C251 contact
Counting up Counting down
ELC Syst em Manual

5- 50
5.13 Special Data Register
The special registers (special D) are as shown in the following. Please notice that some equipments
with the same number will be different to the different model. In the following chart, the meaning of
column Attribute are: R means can only read. R/W means can read/write. - means can do
nothing. # means system setting, user can read the detail explanation of the setting in the manual.

Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1000 Watchdog timer (WDT) value (Unit: 1ms) Y Y Y 200 - - R/W NO 200
D1001
ELC model number+memory capacity /
type (user can read ELC program version
from this register. For example, D1001 = H
XX10 means version 1.0. When reading
from HHP it will display Knnnnn and you
can convert it to hexadecimal number by
pressing <H> key.
Y Y Y - - - R NO #
D1002 Program capacity Y Y Y - - - R NO #
D1003
Sum of program memory (sum of the ELC
internal program memory. User can identify
the content of ELC control program by this
register)
Y Y Y - - - R NO #
D1004 Grammar detective number Y Y Y 0 0 - R NO 0
D1008 STEP address when WDT timer is ON Y Y Y 0 - - R NO 0
D1009
PB/PC/PA/PH: Number of LV signal
occurrence
PV: register for SRAM lost data error code
Y Y Y 0 - - R YES 0
D1010 Present scan time (Unit: 0.1ms) Y Y Y 0 0 0 R NO 0
D1011 Minimum scan time (Unit: 0.1ms) Y Y Y 0 0 0 R NO 0
D1012 Maximum scan time (Unit: 0.1ms) Y Y Y 0 0 0 R NO 0
D1015
0~32,767(unit: 0.1ms) addition type of
high-speed connection timer
- Y Y 0 - - R/W NO 0
D1018 PI (Low byte) - Y Y 0FDB 0FDB 0FDB R/W NO 0FDB
D1019 PI(High byte) - Y Y 4049 4049 4049 R/W NO 4049
D1020
X0~X7 input filter (unit: ms) 0~1,000ms
adjustable
Y Y Y 10 - - R/W NO 10
D1021
PH: X10~X11 input delay times setting
(unit: times)
PV: X10~X17 input filter (unit: ms)
- Y Y 0 - - R/W NO 0
D1022
Double frequency selection for AB phase
counter
Y Y - 0 - - R/W NO 0
D1023 Storing detected pulse width (unit: 0.1ms) Y Y - 0 - - R/W NO 0
D1025 Communication error code Y Y Y 0 - - R NO 0
D1028 Index register E0 Y Y Y 0 - - R/W NO 0
5. Progr ammi ng Concepts

5- 51
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1029 Index register F0 Y Y Y 0 - - R/W NO 0
D1030 Output numbers of Y0 pulse (Low word) Y Y - 0 - - R NO 0
D1031 Output numbers of Y0 pulse (High word) Y Y - 0 - - R NO 0
D1032 Output numbers of Y1 pulse (Low word) Y Y - 0 - - R NO 0
D1033 Output numbers of Y1 pulse (High word) Y Y - 0 - - R NO 0
D1034
Work mode of frequency measurement
card
- - Y - - - R YES 1
D1035 No. of input point X as RUN/STOP - - Y - - - R/W YES 0
D1036 COM1 (RS-232) Communications protocol Y Y Y 0086 - - R/W NO 0086
D1037 Repetition time of HKY key - - Y - - - R/W NO 0
D1038
When ELC is slave, this sets the data
response delay time. Time unit is 0.1ms.
For PC/PA/PH series, by using ELC-Link,
D1038 can be set to send next
communication data with delay. (Unit: one
scan cycle; for PC/PA/PH:1 scan cycle; for
PV:0.1ms)
Y Y Y - - - R/W NO 0
D1039 Constant scan time (ms) Y Y Y 0 - - R/W NO 0
D1040 ON state number 1 of STEP point S Y Y Y 0 - - R NO 0
D1041 ON state number 2 of STEP point S Y Y Y 0 - - R NO 0
D1042 ON state number 3 of STEP point S Y Y Y 0 - - R NO 0
D1043 ON state number 4 of STEP point S Y Y Y 0 - - R NO 0
D1044 ON state number 5 of STEP point S Y Y Y 0 - - R NO 0
D1045 ON state number 6 of STEP point S Y Y Y 0 - - R NO 0
D1046 ON state number 7 of STEP point S Y Y Y 0 - - R NO 0
D1047 ON state number 8 of STEP point S Y Y Y 0 - - R NO 0
D1049 ON number of alarm point - Y Y 0 - - R NO 0
D1050

D1055
ELC will automatically convert the ASCII
data saved in D1070~D1085 to HEX.
Y Y Y 0 - - R NO 0
D1056
Present value of PA controller analog input
channel 0 (CH0)
- Y Y 0 - - R NO 0
D1057
Present value of PA controller analog input
channel 1 (CH1)
- Y Y 0 - - R NO 0
D1061 Error record of non-latched area Y Y Y - - - R YES 0
D1062
For PA series, average time of AD (CH0,
CH1): 2~4
- Y Y - 2 - R/W NO 2
D1067 Algorithm error code Y Y Y 0 0 - R NO 0
D1068 Lock the algorithm error address Y Y Y 0 - - R NO 0
ELC Syst em Manual

5- 52
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1070

D1085
When the ELCs built-in RS-485
communication instruction receives
feedback signals from receiver. The data
will be saved in the registers
D1070~D1085. User can use the contents
saved in the registers to check the
feedback data.
Y Y Y 0 - - R NO 0
D1086
ELC-ACPGMXFR
High word of password setting (Disply by
HEX value corresponding to ASCII word)
Y Y Y 0 - - R/W NO 0
D1087
ELC-ACPGMXFR
Low word of password setting (Disply by
HEX value corresponding to ASCII word)
Y Y Y 0 - - R/W NO 0
D1089

D1099
When the ELC built-in RS-485
communication instruction is executed, the
transmitting signals will be stored in the
registers D1089~D1099. User can use the
contents saved in registers to check the
feedback data.
Y Y Y 0 - - R NO 0
D1100
Corresponding status after LV signal is
enabled
- - Y
0 - - R/W NO 0
D1101 Start address of file register - Y Y - - - R/W Yes 0
D1102 Copy numbers of file register - Y Y - - - R/W Yes 1600
D1103
Set start D number for file register to store
(the number should be large than 2000)
- Y Y - - - R/W Yes 2000
D1104
Parameter index for Accel/Decel pulse
output Y0 (corresponds to device D)
Y Y - 0 0 - R/W NO 0
D1110
Average of PA controller analog input
channel 0 (CH 0)
- Y Y 0 - - R NO 0
D1111
Average of PA controller analog input
channel 1 (CH 1)
- Y Y 0 - - R NO 0
D1116
PA controller analog output channel 0 (CH
0)
- Y Y 0 0 0 R/W NO 0
D1117
PA controller analog output channel 1 (CH
1)
- Y Y 0 0 0 R/W NO 0
D1118
PA controller only. It is the filter wave time
setting between the A/D conversions, and
with the default setting as 0 and the unit as
1ms, all will be regarded as 5ms if
D1118<=5.
- Y Y 5 - - R/W NO 5
D1120 COM2 (RS-485) communication protocol Y Y Y 0086 - - R/W NO 0086
D1121
ELC communication address (the address
that save ELC communication address, it
is latched)
Y Y Y - - - R/W Yes 1
D1122 Residual words of transmitting data Y Y Y 0 0 - R NO 0
D1123 Residual words of receiving data Y Y Y 0 0 - R NO 0
D1124 Start character definition (STX) Y Y Y 003A - - R/W NO 003A
5. Progr ammi ng Concepts

5- 53
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1125 First ending character definition (ETX1) Y Y Y 000D - - R/W NO 000D
D1126 Second ending character definition (ETX2) Y Y Y 000A - - R/W NO 000A
D1127
RS instruction, interrupt request when
receiving specified data character (I150)
Y - - - - R/W NO 0
D1129 RS-485 time-out setting (ms) Y Y Y 0 - - R/W NO 0
D1130 MODBUS return error code record Y Y Y 0 - - R NO 0
D1133
Special high-speed pulse output Y0
(50KHz) register (D) index (PC/PA)
Y10 outputs the starting number of register
(D) for two-axis synchronous control(PH)
- Y - 0 - - R/W NO 0
D1134
Set the number of segments of Y10 output
for two-axis synchronous control (For PH
only)
- Y - 0 - - R/W NO 0
D1135
Y11 outputs the starting number of register
(D) for two-axis synchronous control (For
PHV1.4 and above only)
- Y - 0 - - R/W NO 0
D1136
Set the number of segments of Y11 output
for two-axis synchronous control (For
PHV1.4 and above only)
- Y - 0 - - R/W NO 0
D1137 Address of operator error occurs Y Y Y 0 0 - R NO 0
D1140
Special extension module number,
maximum is 8 units
Y Y Y 0 - - R NO 0
D1142 Input points (X) of extension unit Y Y Y 0 - - R NO 0
D1143 Output points (Y) of extension unit Y Y Y 0 - - R NO 0
D1144
Parameter index for Accel/Decel pulse
output Y0 of adjustable slope (corresponds
to component D)
- Y - 0 - - R/W NO 0
D1145
Number of left-side special extension
modules (max. 8)
- - Y 0 - - R NO 0
D1150
Table count register in multi-group setting
comparison mode of DHSZ commnad
- - Y 0 0 0 R NO 0
D1151
Table counting register for DHSZ multiple
set values comparison mode
- - Y 0 0 0 R NO 0
D1152
High word of changed D value for DHSZ
instruciton
- - Y 0 0 0 R NO 0
D1153
Low word of changed D value for DHSZ
instruction
- - Y 0 0 0 R NO 0
D1154
Recommended Interval of accelerated time
(10~32767 ms) of Accel/Decel pulse output
Y0 of adjustable slope
- Y - 200 - - R/W NO 200
D1155
Recommended Interval of decelerated time
(-1~ -32700 ms) of Accel/Decel pulse
output Y0 of adjustable slope
- Y - -1000 - - R/W NO -1000
D1166
Exchange of X10 rising/falling-edge count
- Y - 0 - - R/W NO 0
ELC Syst em Manual

5- 54
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
modes (for PH only)
D1167
Exchange of X11 rising/falling-edge count
modes (for PH only)
- Y - 0 - - R/W NO 0
D1168
RS instruction, interrupt request when
receiving specified data character (I150)
- Y 0 - - R/W NO 0
D1169
Interruption request for receiving specific
word in RS instruction (I160)
- - Y
0 - - R/W NO 0
D1170
PC value when executing single step
- - Y
0 0 0 R NO 0
D1172
2-phase pulse output frequency
(12Hz~20KHz)
- Y - 0 - - R/W NO 0
D1173
2-phase pulse output mode selection
(K1and K2)
- Y - 0 - - R/W NO 0
D1174
Target number for 2-phase pulse outputs
(low 16-bit)
- Y - 0 - - R/W NO 0
D1175
Target number for 2-phase pulse outputs
(high 16-bit)
- Y - 0 - - R/W NO 0
D1176
Present output number of 2-phase pulse
(low 16-bit)
- Y - 0 - - R/W NO 0
D1177
Present output number of 2-phase pulse
(high 16-bit)
- Y - 0 - - R/W NO 0
D1178 VR0 Variable resistor value - Y Y 0 - - R NO 0
D1179 VR1 Variable resistor value - Y Y 0 - - R NO 0
D1180
When Interupt I401 happens, D1180 will
read the low 16-bit of high-speed counter.
- Y -- 0 - - R NO 0
D1181
When Interupt I401 happens, D1181 will
read the high 16-bit of high-speed counter.
- Y - 0 - - R NO 0
D1182 Pointer register E1 - Y Y 0 - - R/W NO 0
D1183 Pointer register F1 - Y Y 0 - - R/W NO 0
D1184 Pointer register E2 - Y Y 0 - - R/W NO 0
D1185 Pointer register F2 - Y Y 0 - - R/W NO 0
D1186 Pointer register E3 - Y Y 0 - - R/W NO 0
D1187 Pointer register F3 - Y Y 0 - - R/W NO 0
D1188 Index register E4 - - Y 0 - - R/W NO
D1189 Index register F4 - - Y 0 - - R/W NO
D1190 Index register E5 - - Y 0 - - R/W NO
D1191 Index register F5 - - Y 0 - - R/W NO
D1192 Index register E6 - - Y 0 - - R/W NO
D1193 Index register F6 - - Y 0 - - R/W NO
D1194 Index register E7 - - Y 0 - - R/W NO
5. Progr ammi ng Concepts

5- 55
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1195 Index register F7 - - Y 0 - - R/W NO
D1196
Number system setting for PA model 7-seg
display ON=hex, OFF=decimal
- Y - 0 - - R/W NO 0
D1198
When Interupt I501 happens, D1198 will
read the low 16-bit of high-speed counter.
- Y - 0 - - R NO 0
D1199
When Interupt I501 happens, D1199 will
read the high 16-bit of high-speed counter.
- Y - 0 - - R NO 0
D1200
Start address of M0~M999 auxiliary relay
latched
- Y Y - - - R/W Yes 512
D1201
End address of M0~M999 auxiliary relay
latched
- Y Y - - - R/W Yes 999
D1202
Start address of M2000~M4095 auxiliary
relay latched
- Y Y - - - R/W Yes 2000
D1203
End address of M2000~M4095 auxiliary
relay latched
- Y Y - - - R/W Yes 4095
D1204
Start latched address for 100ms timers T0
~ T199
- - Y - - - R/W YES H'FFFF
D1205
End latched address for 100ms timers T0 ~
T199
- - Y - - - R/W YES H'FFFF
D1206
Start latched address for 10ms timers T200
~ T239
- - Y - - - R/W YES H'FFFF
D1207
End latched address for 10ms timers T200
~ T239
- - Y - - - R/W YES H'FFFF
D1208
Start latched address of 16-bit counter
C0~C199
- Y Y - - - R/W Yes 96
D1209
End latched address of 16-bit counter
C0~C199
- Y Y - - - R/W Yes 199
D1210
Start latched address of 32-bit counter
C200~C234
- Y Y - - - R/W Yes 216
D1211
End latched address of 32-bit counter
C200~C234
- Y Y - - - R/W Yes 234
D1212
Start latched address of 32-bit high-speed
counter C235~C255
- Y Y - - - R/W Yes 235
D1213
End latched address of 32-bit high-speed
counter C235~C255
- Y Y - - - R/W Yes 255
D1214
Start latched address of step point
(S0~S1023)
- Y Y - - - R/W Yes 512
D1215
End latched address of step point
(S0~S1023)
- Y Y - - - R/W Yes 895
D1216 Start latched address of register D0~D999 - Y Y - - - R/W Yes 200
D1217 End latched address of register D0~D999 - Y Y - - - R/W Yes 999
D1218
Start latched address of register
D2000~D4999
- Y Y - - - R/W Yes 2000
D1219
End latched address of register
D2000~D4999
- Y Y - - - R/W Yes 4999
ELC Syst em Manual

5- 56
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1220
Phase of the 1st group pulse output CH0
(Y0, Y1)
- - Y 0
- - R/W NO 0
D1221
Phase of the 2nd group pulse output CH1
(Y2, Y3)
- - Y 0
- - R/W NO 0
D1222
Time difference between direction signal
and pulse output for the 1st group pulse
CH0 (Y0, Y1) in DRVI, DDRVI, DRVA,
DDRVA, PLSV, DPLSV
- - Y 0
- - R/W NO 0
D1223
Time difference between direction signal
and pulse output for the 2nd group pulse
CH1 (Y2, Y3) in DRVI, DDRVI, DRVA,
DDRVA, PLSV, DPLSV
- - Y 0
- - R/W NO 0
D1225 Counting mode of the counter HHSC0 - - Y 2
- - R/W NO 2
D1226 Counting mode of the counter HHSC1 - - Y 2
- - R/W NO 2
D1227 Counting mode of the counter HHSC2 - - Y 2
- - R/W NO 2
D1228 Counting mode of the counter HHSC3 - - Y 2
- - R/W NO 2
D1129
Phase of the 3rd group pulse output CH2
(Y4, Y5) (available in PV)
- - Y 0
- - R/W NO 0
D1130
Phase of the 4th group pulse output CH3
(Y6, Y7) (available in PV)
- - Y 0
- - R/W NO 0
D1256

D1295
MODRW instruction of RS-485 is built-in.
The characters that sent during executing
is saved in D1256~D1295. User can check
according to the content of these registers.
Y Y Y 0 - - R NO 0
D1296

D1311
MODRW instruction of RS-485 is built-in.
ELC system will convert ASCII in the
content of the register that user indicates
to HEX and save it in D1296 D1311.
Y Y Y 0 - - R NO 0
D1313 Perpetual calendar (RTC) second 00~59 - Y Y 0 - - R/W NO 0
D1314 Perpetual calendar (RTC) minute 00~59 - Y Y 0 - - R/W NO 0
D1315 Perpetual calendar (RTC) hour 00~23 - Y Y 0 - - R/W NO 0
D1316 Perpetual calendar (RTC) day 01~31 - Y Y 0 - - R/W NO 1
D1317 Perpetual calendar (RTC) month 01~12 - Y Y 0 - - R/W NO 1
D1318 Perpetual calendar (RTC) week 1~7 - Y Y 0 - - R/W NO 6
D1319 Perpetual calendar (RTC) year 0099 - Y Y 0 - - R/W NO 0
D1328
Low word of offset pulse the 1
st
group
pulses CH0 (Y0, Y1)
- - Y
0 - - R/W NO 0
D1329
High word of offset pulse the 1
st
group
pulses CH0 (Y0, Y1)
- - Y
0 - - R/W NO 0
D1330
Low word of offset pulse the 2
nd
group
pulses CH1 (Y2, Y3)
- - Y
0 - - R/W NO 0
5. Progr ammi ng Concepts

5- 57
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1331
High word of offset pulse the 2
nd
group
pulses CH1 (Y2, Y3)
- - Y
0 - - R/W NO 0
D1332
Low word of the remaining number of
pulses of the 1
st
group pulses CH0 (Y0,
Y1)
- - Y
0 - - R NO 0
D1333
High word of the remaining number of
pulses of the 1
st
group pulses CH0 (Y0,
Y1)
- - Y
0 - - R NO 0
D1334
Low word of the remaining number of
pulses of the 2
nd
group pulses CH1 (Y2,
Y3)
- - Y
0 - - R NO 0
D1335
High word of the remaining number of
pulses of the 2
nd
group pulses CH1 (Y2,
Y3)
- - Y
0 - - R NO 0
D1336
Low word of the present value of the 1
st

group pulses CH0 (Y0, Y1)
- - Y
- - - R YES 0
D1337
High word of the present value of the 1
st

group pulses CH0 (Y0, Y1)
- - Y
- - - R YES 0
D1338
Low word of the present value of the 2
nd

group pulses CH1 (Y2, Y3)
- - Y
- - - R YES 0
D1339
High word of the present value of the 2
nd

group pulses CH1 (Y2, Y3)
- - Y
- - - R YES 0
PH: The 1
st
step acceleration frequency of
CH0,
200 NO
D1340
PV: start/end frequency of the 1
st
group
pulse output CH0 (Y0, Y1)
- Y Y
-
- - R/W
YES
200
D1341
Low word of max. output
frequency
- - Y
- - - R YES H04D0
D1342
High word of max. output
frequency
Fixed as
200KHz
- - Y
- - - R YES 3
Acceleration /Deceleration time of Y10, (for
PH only)
- Y - 200 - - R/W NO 200
D1343
Acceleration /Deceleration time ofCH0(Y0,
Y1)
- - Y - - - R/W YES 100
D1344
Low word of the number of compensation
pulses of the 1
st
group pulses CH0 (Y0,
Y1)
- - Y
- - - R/W YES 0
D1345
High word of the number of compensation
pulses of the 1
st
group pulses CH0 (Y0,
Y1)
- - Y
- - - R/W YES 0
D1346
Low word of the number of compensation
pulses of the 2
nd
group pulses CH1 (Y2,
Y3)
- - Y
- - - R/W YES 0
ELC Syst em Manual

5- 58
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1347
High word of the number of compensation
pulses of the 2
nd
group pulses CH1 (Y2,
Y3)
- - Y
- - - R/W YES 0
PH: Present value of CH0 pulse (low word)
Y10
- Y - 0 - - R NO 0
D1348
PV: CH0 pulse output. When M1534 = On,
it refers to the deceleration time
- - Y
- - - R/W YES 100
PH: Present value of CH0 pulse (high
word) Y10
- Y -
0 - - R NO 0
D1349
PV: CH1 pulse output. When M1535 = On,
it refers to the deceleration time
- - Y
- - - R/W YES 100
PH: Present value of CH1 pulse (low word)
Y11
- Y - 0 - - R NO 0
D1350
PV: CH2 pulse output. When M1536 = On,
it refers to the deceleration time
- - Y
- - - R/W YES 100
PH: Present value of CH1 pulse (high
word) Y11
- Y Y 0 - - R NO 0
D1351
PV: CH3 pulse output. When M1537 = On,
it refers to the deceleration tim
- - Y
- - - R/W YES 100
PH: The 1
st
step start frequency and the
step end frequency of CH1, for PH only
200 NO
D1352
PV: start/end frequency of the 2
nd
group
pulse output CH1 (Y2, Y3)
- Y Y
-
- - R/W
YES
200
PH: Accelaration/Decelaration time of CH1
pulse, for PH only
200 NO
200
D1353
PV: acceleration/deceleration time of the
2
nd
group pulse output CH1 (Y2, Y3)
- Y Y
-
- - R/W
YES 100
D1355
Starting reference for Master to read from
Slave ID#1
- Y Y 1064 - - R/W NO 1064
D1356
Starting reference for Master to read from
Slave ID#2
- Y Y 1064 - - R/W NO 1064
D1357
Starting reference for Master to read from
Slave ID#3
- Y Y 1064 - - R/W NO 1064
D1358
Starting reference for Master to read from
Slave ID#4
- Y Y 1064 - - R/W NO 1064
D1359
Starting reference for Master to read from
Slave ID#5
- Y Y 1064 - - R/W NO 1064
D1360
Starting reference for Master to read from
Slave ID#6
- Y Y 1064 - - R/W NO 1064
D1361
Starting reference for Master to read from
Slave ID#7
- Y Y 1064 - - R/W NO 1064
D1362
Starting reference for Master to read from
Slave ID#8
- Y Y 1064 - - R/W NO 1064
D1363
Starting reference for Master to read from
Slave ID#9
- Y Y 1064 - - R/W NO 1064
D1364
Starting reference for Master to read from
Slave ID#10
- Y Y 1064 - - R/W NO 1064
5. Progr ammi ng Concepts

5- 59
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1365
Starting reference for Master to read from
Slave ID#11
- Y Y 1064 - - R/W NO 1064
D1366
Starting reference for Master to read from
Slave ID#12
- Y Y 1064 - - R/W NO 1064
D1367
Starting reference for Master to read from
Slave ID#13
- Y Y 1064 - - R/W NO 1064
D1368
Starting reference for Master to read from
Slave ID#14
- Y Y 1064 - - R/W NO 1064
D1369
Starting reference for Master to read from
Slave ID#15
- Y Y 1064 - - R/W NO 1064
D1370
Starting reference for Master to read from
Slave ID#16
- Y Y 1064 - - R/W NO 1064
D1371
Time unit of PWM Y0 pulse output when
M1070=On
- - Y 1 - - R/W NO 1
D1372
Time unit of PWM Y2 pulse output when
M1071=On
- - Y 1 - - R/W NO 1
D1373
Time unit of PWM Y4 pulse output when
M1530=On
- - Y 1 - - R/W NO 1
D1374
Time unit of PWM Y6 pulse output when
M1531=On
- - Y 1 - - R/W NO 1
D1375
Low word of the present value of the 3
rd

group pulses CH2 (Y4, Y5)
- - Y - - - R/W YES 0
D1376
High word of the present value of the 3
rd

group pulses CH2 (Y4, Y5)
- - Y - - - R/W YES 0
D1377
Low word of the present value of the 4
th

group pulses CH3 (Y6, Y7)
- - Y - - - R/W YES 0
D1378
High word of the present value of the 4
th

group pulses CH3 (Y6, Y7)
- - Y - - - R/W YES 0
D1379
Start frequency of the 1
st
section and end
frequency of the last section for the 3
rd

group pulse output CH2 (Y4, Y5)
- - Y - - - R/W YES 200
D1380
Start frequency of the 1
st
section and end
frequency of the last section for the 4
th

group pulse output CH3 (Y6, Y7) (available
in PV)
- - Y - - - R/W YES 200
D1381
Acceleration/deceleration time for the 3
rd

pulse output CH2 (Y4, Y5)
- - Y - - - R/W YES 100
D1382
Acceleration/deceleration time for the 4
th

pulse output CH3 (Y6, Y7)
- - Y - - - R/W YES 100
D1386
ID of the 1
st
left-side extension module - - Y 0 - - R NO 0
D1387
ID of the 2
nd
left-side extension module - - Y 0 - - R NO 0
D1388
ID of the 3
rd
left-side extension module - - Y 0 - - R NO 0
ELC Syst em Manual

5- 60
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1389
ID of the 4
th
left-side extension module - - Y 0 - - R NO 0
D1390
ID of the 5
th
left-side extension module - - Y 0 - - R NO 0
D1391
ID of the 6
th
left-side extension module - - Y 0 - - R NO 0
D1392
ID of the 7
th
left-side extension module - - Y 0 - - R NO 0
D1393
ID of the 8
th
left-side extension module - - Y 0 - - R NO 0
D1399
Assigning ID number of the starting slave
on ELC Link network
- Y Y 1 - - R/W YES 1
D1415
Starting reference for Master to write in
Slave ID#1
- Y Y 10C8 - - R/W NO 10C8
D1416
Starting reference for Master to write in
Slave ID#2
- Y Y 10C8 - - R/W NO 10C8
D1417
Starting reference for Master to write in
Slave ID#3
- Y Y 10C8 - - R/W NO 10C8
D1418
Starting reference for Master to write in
Slave ID#4
- Y Y 10C8 - - R/W NO 10C8
D1419
Starting reference for Master to write in
Slave ID#5
- Y Y 10C8 - - R/W NO 10C8
D1420
Starting reference for Master to write in
Slave ID#6
- Y Y 10C8 - - R/W NO 10C8
D1421
Starting reference for Master to write in
Slave ID#7
- Y Y 10C8 - - R/W NO 10C8
D1422
Starting reference for Master to write in
Slave ID#8
- Y Y 10C8 - - R/W NO 10C8
D1423
Starting reference for Master to write in
Slave ID#9
- Y Y 10C8 - - R/W NO 10C8
D1424
Starting reference for Master to write in
Slave ID#10
- Y Y 10C8 - - R/W NO 10C8
D1425
Starting reference for Master to write in
Slave ID#11
- Y Y 10C8 - - R/W NO 10C8
D1426
Starting reference for Master to write in
Slave ID#12
- Y Y 10C8 - - R/W NO 10C8
D1427
Starting reference for Master to write in
Slave ID#13
- Y Y 10C8 - - R/W NO 10C8
D1428
Starting reference for Master to write in
Slave ID#14
- Y Y 10C8 - - R/W NO 10C8
D1429
Starting reference for Master to write in
Slave ID#15
- Y Y 10C8 - - R/W NO 10C8
D1430
Starting reference for Master to write in
Slave ID#16
- Y Y 10C8 - - R/W NO 10C8
D1431 Setting of times of ELC Link polling cycle - Y Y 0 - - R/W NO 0
D1432 The current times of ELC Link polling cycle - Y Y 0 - - R/W NO 0
D1433
Number of slave units linked on ELC Link
network
- Y Y 0 - - R/W NO 0
5. Progr ammi ng Concepts

5- 61
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1434 Data length to be read on Slave ID#1 - Y Y 16 - - R/W NO 16
D1435 Data length to be read on Slave ID#2 - Y Y 16 - - R/W NO 16
D1436 Data length to be read on Slave ID#3 - Y Y 16 - - R/W NO 16
D1437 Data length to be read on Slave ID#4 - Y Y 16 - - R/W NO 16
D1438 Data length to be read on Slave ID#5 - Y Y 16 - - R/W NO 16
D1439 Data length to be read on Slave ID#6 - Y Y 16 - - R/W NO 16
D1440 Data length to be read on Slave ID#7 - Y Y 16 - - R/W NO 16
D1441 Data length to be read on Slave ID#8 - Y Y 16 - - R/W NO 16
D1442 Data length to be read on Slave ID#9 - Y Y 16 - - R/W NO 16
D1443 Data length to be read on Slave ID#10 - Y Y 16 - - R/W NO 16
D1444 Data length to be read on Slave ID#11 - Y Y 16 - - R/W NO 16
D1445 Data length to be read on Slave ID#12 - Y Y 16 - - R/W NO 16
D1446 Data length to be read on Slave ID#13 - Y Y 16 - - R/W NO 16
D1447 Data length to be read on Slave ID#14 - Y Y 16 - - R/W NO 16
D1448 Data length to be read on Slave ID#15 - Y Y 16 - - R/W NO 16
D1449 Data length to be read on Slave ID#16 - Y Y 16 - - R/W NO 16
D1450 Data length to be written on Slave ID#1 - Y Y 16 - - R/W NO 16
D1451 Data length to be written on Slave ID#2 - Y Y 16 - - R/W NO 16
D1452 Data length to be written on Slave ID#3 - Y Y 16 - - R/W NO 16
D1453 Data length to be written on Slave ID#4 - Y Y 16 - - R/W NO 16
D1454 Data length to be written on Slave ID#5 - Y Y 16 - - R/W NO 16
D1455 Data length to be written on Slave ID#6 - Y Y 16 - - R/W NO 16
D1456 Data length to be written on Slave ID#7 - Y Y 16 - - R/W NO 16
D1457 Data length to be written on Slave ID#8 - Y Y 16 - - R/W NO 16
D1458 Data length to be written on Slave ID#9 - Y Y 16 - - R/W NO 16
D1459 Data length to be written on Slave ID#10 - Y Y 16 - - R/W NO 16
D1460 Data length to be written on Slave ID#11 - Y Y 16 - - R/W NO 16
D1461 Data length to be written on Slave ID#12 - Y Y 16 - - R/W NO 16
D1462 Data length to be written on Slave ID#13 - Y Y 16 - - R/W NO 16
D1463 Data length to be written on Slave ID#14 - Y Y 16 - - R/W NO 16
D1464 Data length to be written on Slave ID#15 - Y Y 16 - - R/W NO 16
D1465 Data length to be written on Slave ID#16 - Y Y 16 - - R/W NO 16
ELC Syst em Manual

5- 62
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1466
Number of pulses required per revolution
of motor at CH0 (low word)
- - Y - - - R YES 2,000
D1467
Number of pulses required per revolution
of motor at CH0 (high word)
- - Y - - - R YES 0
D1468
Number of pulses required per revolution
of motor at CH1 (low word)
- - Y - - - R YES 2,000
D1469
Number of pulses required per revolution
of motor at CH1 (high word)
- - Y - - - R YES 0
D1470
Distance created for 1 revolution of motor
at CH0 (low word)
- - Y - - - R YES 1,000
D1471
Distance created for 1 revolution of motor
at CH0 (high word)
- - Y - - - R YES 0
D1472
Distance created for 1 revolution of motor
at CH1 (low word)
- - Y - - - R YES 1,000
D1473
Distance created for 1 revolution of motor
at CH1 (high word)
- - Y - - - R YES 0
D1474 Machine unit of CH0 movement (low word) - - Y - - - R YES 0
D1475
Machine unit of CH0 movement (high
word)
- - Y - - - R YES 0
D1476 Machine unit of CH1 movement (low word) - - Y - - - R YES 0
D1477
Machine unit of CH1 movement (high
word)
- - Y - - - R YES 0
D1480

D1495
Data buffer to store the data read from
Slave ID#1, when M1353 = Off.
When M1353 = On, the starting D register
No. to store data read from ID#1~16 by
Master (available in PV)..
- Y Y 0 - - R NO 0
D1496

D1511
Data buffer to store the data to be written
on Slave ID#1, when M1353 = Off.
When M1353 = On, the starting D register
No. to store data written on ID#1~16 by
Master (available in PV)..
- Y Y 0 - - R/W NO 0
D1512

D1527
Data buffer to store the data read from
Slave ID#2, when M1353 = Off.
When M1353 = On, the starting D register
No. to store data read from ID#17~32 by
Master (available in PV).
- Y Y 0 - - R NO 0
D1528

D1543
Data buffer to store the data to be written
on Slave ID#2, when M1353 = Off.
When M1353 = On, the starting D register
No. to store data read from ID#17~32 by
Master (available in PV)
- Y Y 0 - - R/W NO 0
5. Progr ammi ng Concepts

5- 63
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1544

D1559
Data buffer to store the data read from
Slave ID#3, when M1353 = Off.
When M1353 = On, the starting D register
No. to store data written on ID#17~32 by
Master (available in PV).
- Y Y 0 - - R NO 0
D1560

D1575
Data buffer to store the data to be written
on Slave ID#3, when M1353 = Off.
When M1353 = On, the length of data
written on ID#17~32 by Master (available
in PV).
- Y Y 0 - - R/W NO 0
D1576

D1591
Data buffer to store the data read from
Slave ID#4, when M1353 = Off.
When M1353=On, the starting D register
No. to store data read from ID#17~32 by
PV Master.
- Y Y 0 - - R NO 0
D1592

D1607
Data buffer to store the data to be written
on Slave ID#4, when M1353 = Off.
When M1353=On, the starting D register
No. to store data to be written on ID#17~32
by PV Master.
- Y Y 0 - - R/W NO 0
D1608

D1623
Data buffer to store the data read from
Slave ID#5.
- Y Y 0 - - R NO 0
D1624

D1639
Data buffer to store the data to be written
on Slave ID#5.
- Y Y 0 - - R/W NO 0
D1640

D1655
Data buffer to store the data read from
Slave ID#6.
- Y Y 0 - - R NO 0
D1656

D1671
Data buffer to store the data to be written
on Slave ID#6.
- Y Y 0 - - R/W NO 0
D1672

D1687
Data buffer to store the data read from
Slave ID#7.
- Y Y 0 - - R NO 0
D1688

D1703
Data buffer to store the data to be written
on Slave ID#7.
- Y Y 0 - - R/W NO 0
D1704

D1719
Data buffer to store the data read from
Slave ID#8.
- Y Y 0 - - R NO 0
D1720

D1735
Data buffer to store the data to be written
on Slave ID#8.
- Y Y 0 - - R/W NO 0
D1736

D1751
Data buffer to store the data read from
Slave ID#9.
- Y Y 0 - - R NO 0
ELC Syst em Manual

5- 64
Special D Function PB
PC
PA
PH
PV
OFF

ON
STOP

RUN
RUN

STOP
Type Latched
Factory
setting
D1752

D1767
Data buffer to store the data to be written
on Slave ID#9.
- Y Y 0 - - R/W NO 0
D1768

D1783
Data buffer to store the data read from
Slave ID#10.
- Y Y 0 - - R NO 0
D1784

D1799
Data buffer to store the data to be written
on Slave ID#10.
- Y Y 0 - - R/W NO 0
D1800

D1815
Data buffer to store the data read from
Slave ID#11.
- Y Y 0 - - R NO 0
D1816

D1831
Data buffer to store the data to be written
on Slave ID#11.
- Y Y 0 - - R/W NO 0
D1832

D1847
Data buffer to store the data read from
Slave ID#12.
- Y Y 0 - - R NO 0
D1848

D1863
Data buffer to store the data to be written
on Slave ID#12.
- Y Y 0 - - R/W NO 0
D1864

D1879
Data buffer to store the data read from
Slave ID#13.
- Y Y 0 - - R NO 0
D1880

D1895
Data buffer to store the data to be written
on Slave ID#13.
- Y Y 0 - - R/W NO 0
D1896

D1911
Data buffer to store the data read from
Slave ID#14.
- Y Y 0 - - R NO 0
D1912

D1927
Data buffer to store the data to be written
on Slave ID#14.
- Y Y 0 - - R/W NO 0
D1928

D1943
Data buffer to store the data read from
Slave ID#15.
- Y Y 0 - - R NO 0
D1944

D1959
Data buffer to store the data to be written
on Slave ID#15.
- Y Y 0 - - R/W NO 0
D1960

D1975
Data buffer to store the data read from
Slave ID#16.
- Y Y 0 - - R NO 0
D1976

D1991
Data buffer to store the data to be written
on Slave ID#16.
- Y Y 0 - - R/W NO 0
5. Progr ammi ng Concepts

5- 65
5.14 E, F Index Registers
The function of Index register is the same as general operand. It can be used to move, compare or
used as an index for byte device (KnX, KnY, KnM, KnS, T, C, D) and bit device (X, Y, M, S). It cant be
used for constant (K, H). For PV models, it cant be used for constant (K, H).

Index register [E], [F]
Index registers are 16-bit registers. There are 2 points, E0 and F0, for PB models. There are 8 points,
E0~E3 and F0~F3, for PC/PA/PH models. There are 16 points, E0~E7 and F0~F7, for PV models.If
you want to use index register to be 32-bit register, you should indicate E and at this moment F cant
be used.

Example: MOV K10 D0F0
Index registers E, F are 16-bit data register, just the same as general data register. They are read/ write.
They can be used as a 32-bit register.
F0 E0
E0 F0
16-bit 16-bit
32-bit
lower bit upper bit

It is recommended to use instruction DMOVP K0 E and clear E and F to 0 at power on.
The combination of E and F when using as 32-bit register are:
(E0, F0) , (E1, F1) (E2, F2) (E3, F3) (E4, F4) , (E5, F5) (E6, F6) (E7, F7)

When X0=ON and E0=8, F0=14, D5E0=D(5+8)=D13, D10F0 =D(10+14) = D24, the content in D13 will
be moved to D24.

K14 F0
X0
K8 E0 MOV
D5E0 D10F0
MOV
MOV


5.15 File Register
There are 1600 file registers (K0~K1599). There is no device number (name) for file register; to
execute read/writes of file register use instruction MEMR or MEMW, peripheral device HHP or ELCSoft.

ELC will check the following when ELC is powered on or change from POWER OFFON.
1. M1101 - starts file register function
ELC Syst em Manual

5- 66
2. D1101 - starting address of file register, for PC/PA/PH series: K0~K1599; for PV series:
K0~K9999.
3. D1102 - number of item to read/write, for PC/PA/PH series: K1~ K1600; for PV series: K0~K8000.
4. D1103 - starting address of file register D register, D2000~ D4999

Note:
1. Reading from file register to data register D wont be executed when D1101 is greater than 1600
in PC/PA/PH series, D1101 greater than 8000 and D1103 smaller than 2000 or greater than 9999
in PV series.
2. When starting the action to read data from the file register to the data register, ELC will stop
executing once the address of file register or data register D exceeds the viable address range.
3. There are 1600 file registers in PC/PA/PH series and 10000 in PV series. The file register does
not have an exact device number; therefore the read/write function of file registers has to be
executed by instruction API 148 MEMR, API 149 MEMW or through peripheral devices HPP and
ELCSoft.

5.16 Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I]
N Master control nested N0~N7, 8 points
The control point of
master control
nested
P For CJ, CALL instructions
PB Model = P0~P63 64 points
PC/PA/PH/PV Models = P0~P255,
256 points
The location point of
CJ, CALL
Insert external
interrupt
PB Model = I001, I101, I201, I301
4 points
PC/PA/PH models = I001, I101,
I201, I301, I401, I501, total is 6
points
PV model = I000/I001(X0),
I100/I101(X1), I200/I201(X2),
I300/I301(X3), I400/I401(X4),
I500/I501(X5), 6 points (01, rising-
edge trigger , 00, falling-edge
trigger )
Insert time interrupt
PB Model = I610~I699, 1 point
(time base=1ms)
PC/PA/PH/PV Models =
I601~I699, I701~I799, 2 points
(time base=1ms)
PV model = I801~I899, 1 point
(time base = 0.1ms)
Pointer
I
F
o
r

i
n
t
e
r
r
u
p
t

Insert high-speed
counter attained
interrupt
I010, I020, I030, I040, I050, I060,
6 points
The location point of
interrupt subroutine.
5. Progr ammi ng Concepts

5- 67
High-speed counter
interruption
PV Model = I010, I020, I030, I040,
I050, I060, 6 points
Pulse interruption
PV Model = I110, I120, I130, I140,
4 points
Frequency
measurement card
triggered interruption
PV Model = I180, 1 point
Pointer I
F
o
r

i
n
t
e
r
r
u
p
t

Insert communication
interrupt
PB Model= I150, 1 point
PC/PA/PH Models = I150, 1
points
PV Model = I150, I160, I170, 3
points
The location point of
interrupt subroutine.

Nest Level Pointer N: used with instruction MC and MCR. MC is master start instruction. When the MC
instruction is executed, the instructions between MC and MCR will be executed normally. MC-MCR
master instruction supports nested program structure and the maximum is 8 levels, which is numbered
from N0 to N7.

Pointer P: use with application instructions CJ, CALL, and SRET.
CJ condition jump:

When X0=ON, program will jump from 0 to N (designated label P1) and keep on executing without
executing the instructions between 0 and N.
When X0=OFF, program will execute from 0 and keep on executing the followings. CJ instruction wont
be executed at this time.
X2
Y2
X1
P1 CJ
X0
Y1
P**
0
P1 N


CALL subroutine, SRET subroutine END:

When X0 is ON, it will jump to P2 to execute the designated subroutine as executing CALL instruction.
When executing SRET instruction, return to address 24 to go on executing.

ELC Syst em Manual

5- 68
Y0
X1
P2 CALL
X0
Y1
P**
20
P2
FEND
Y1
SRET
24
(subroutine
P2)
subroutine
Call subroutine P**
subroutine return


Interrupt pointer I:
It is used with application instruction EI, DI, IRET. There are five functions below. Interrupt insert should
be used with EI, interrupt insert enable, interrupt insert disable and IRET interrupt insert return, etc.
1. External interrupt
When input signal of input terminal X0~X5 is triggered on rising-edge, it will interrupt the present
program and jump to the designated interrupt subroutine pointer I001(X0), I101(X1), I201(X2), I301(X3),
I401(X4), I501(X5) to execute and return to the previous address to execute when executing IRET
instruction. Due to special hardware of ELC and is not affected by scan period.
In PC/PA V1.2 and above, when I401 (X4) works with X0 (C235, C251 or C253), the value of (C243 or
C255) will be stored in (D1180, D1181) and I501 (X5) works with X1 (C236), the value of high-speed
counter (C236) will be stored in (D1198, D1199).
In PH V1.2 and above, when I401 (X4) works with X10 (C243 or C255), the value of high-speed
counter (C243 or C255) will be stored in (D1180, D1181) and I501 (X5) works with X11 (C245), the
value of high-speed counter (C243 or C255) will be stored in (D1198, D1199).
2. Timer interrupt
ELC will stop the present program and jump to the designated interrupt subroutine. ELC will execute
automatically for every time period set by 10ms~99ms
3. Pulse interruption
The pulse output instruction API 57 PLSY can be set up that the interruption signal is sent out
synchronously when the first pulse is sent out by enabling flags M1342 and M1343. The corresponding
interruptions are I130 and I140. You can also set up that the interruption signal is sent out after the last
pulse is sent out by enabling flags M1340 and M1341. The corresponding interruptions are I110 and
I120.
4. Counter attained interrupt
The comparison instruction DHSCS of high-speed counter can designate to interrupt present program
5. Progr ammi ng Concepts

5- 69
and jump to the designated interrupt insert subroutine to execute interrupt pointer I010, I020, I030, I040,
I050, I060 when the comparison is attained.
5. Communication interrupt
When using communication instruction RS, it can be set to have interrupt request when receiving
specific charcters. Interrupt I150 and specific characters is set to low byte of D1168 (PC/PA/PH),
D1127 (PB).
When ELC connects to a communication device and the received data length will not the same length,
setting the end character in D1168 (D1127) and interrupt subroutine I150. When ELC receives this end
character, it will execute interrupt subroutine I150.
I160: RS instruction sends out interruption request when receiving a specific length of data. When the
data received equals the low byte of D1169, I160 will be triggered. When D1169 = 0, I160 will not be
triggered.
I170: In Slave mode, interruption I170 will be generated when the data receiving is completed.
Normally when the communication terminal of the ELC is in Slave mode, ELC will not immediately
process the communication data entered but process it after the END is executed. Therefore, when the
scan time is very long and you need the communication data to be processed immediately, you can
use interruption I170 for this matter.
ELC Syst em Manual

5- 70
5.17 M Relay and D Register Applications
Function Group ELC Operation Flag
Number M1000~M1003
Contents:
These relays provide inforamtion about the ELC when switched to run mode.

M1000:
Always ON when in run mode.
M1000
Y0
ELC is running
always ON
M1000 is On contact
during operation


M1001:
Always OFF when in run mode.

M1002:
ON for the first scan when ELC starts then OFF the rest of the time during run mode. Use to initialize
registers, ouptuts, counters, etc when first entering run mode.

M1003:
OFF for the first scan when ELC starts then ON the rest of the time during run mode. Use to initialize
registers, ouptuts, counters, etc when first entering run mode.

ELC RUN
M1000
M1001
M1002
M1003
scan time

5. Progr ammi ng Concepts

5- 71
Function Group Monitor Timer
Number D1000
Contents:
1. The watchdog timer (WDT) is used to monitor ELC operation. If the ELC scan time exceeds the
preset time setting of the WDT, the ELC ERROR LED will light red and all ELC outputs will be
turned OFF.
2. The initial value of WDT is 200ms. You can change this value as desired using the MOV
instruction. The following example will set moinitor timer to PV=300ms.
M1002
0 MOV K300 D1000
Primary pulse

3. The maximum setting for WDT is 32,767ms. You can also use the WDT instruction (API 07) to
extend the WDT timer. When this instruction is executed it will reset the WDTs preset value to
zero (0).
4. Complicated instruction operations or too many extension modules being connected to the will
result in the scan time being too long. Check D1010 ~ D1012 to see if the scan time exceeds the
PV in D1000. In this case, besides modifying the PV in D1000, you can also add WDT instruction
(API 07) into the ELC program. When the CPU execution progresses to WDT instruction, the
internal monitor timer will be cleared as 0 and the scan time will not exceed the set value in the
monitor timer.

Function Group Program Capacity
Number D1002
Contents:
This register holds the program capacity of the ELC.
1. PB series: 3,792 Steps
2. PC/PA/PH series: 7,920 Steps
3. PV series: 15,872 Steps

Function Group Grammar
Number M1004, D1004, D1137
Contents:
1. Syntax error, ELC will check for Syntax errors at power on, when a program transfer is taking
place. If a syntax error is detected the ELC ERROR LED will blink, M relay M1004=ON.
2. The fault code of the error will be placed in D1004. The address where the fault is located is
saved in D1137. If the fault is of a general error it may not have an address associated with it, in
this case the value in D1137 will be invalid.
ELC Syst em Manual

5- 72
Function Group Scan Time-out Timer
Number M1008, D1008
Contents:
1. When scan time-out during executing, ELC ERROR LED will light and M1008=ON.
2. D1008 saves which address STEP the timeout occurred on.

Function Group Scan Time Monitor
Number D1010~D1012
Contents:
The present value, minimum value and maximum value of scan time are saved in these registers.
D1010: present scan time value.
D1011: minimum scan time value.
D1012: maximum scan time value.

Function Group Internal Clock Pulse
Number M1011~M1014
Contents:
ELC provides four different clock pulses to aid the application. When ELC is powered on, these four
clock pulse will start automatically. All are 50% duty cycle. ELC start timing of run mode and these
clock pulses are not synchronized.
M1011 (10 ms)
M1012 (100 ms)
M1013 (1 sec)
M1014 (60 sec)
100 Hz
10 Hz
1 Hz
10 ms
100 ms
1 sec
1 min


Function Group High-speed Timer
Number M1015, D1015
Contents:
The steps for using special M and special D directly:
1. Only valid when ELC is RUN for PV, but is valid when ELC is in RUN or STOP stauts for
PC/PA/PH.
5. Progr ammi ng Concepts

5- 73
2. When M1015=ON, it will start high-speed timer D1015 once ELC finish executing END instruction
of that scan period. The minimum unit of D1015 is 100us.
3. The range of D1015 is 0~32,767. When it counts to 32,767, it will start from 0.
4. When M1015=OFF, D1015 will stop timing immediately.
5. PV series offers high-speed timer instruction HST. See API 196 HST for more details.

Example:
1. When X10 is ON, set M1015=ON to start high-speed timer and record in D1015.
2. When X10=OFF, set M1015=OFF to close high-speed timer.
X10
M1015


Function Group M1016~M1017, M1076, D1313~D1319
Number Perpetual Calendar Clock
Contents:
1. Clock/Calendar relays and registers.
Device Name Function
M1016 Year Display
OFF: show the 2 right most bits
ON: show the (2 right most bits + 2000)
M1017
Make 30
seconds
adjustment to
clock
When OFFON, adjust is triggered
Clock = 0~29 seconds, second will be reset to 0 and minute
will not change.
Clock = 30~59 seconds, reset second to 0 and add 1 to
minute.
M1076
Clock / Calendar
malfunction
ON when setting exceeds range or battery has run down.
Clock will reset to Jan. 1, 2000. 00:00
D1313 Second 0~59
D1314 Minute 0~59
D1315 Hour 0~23
D1316 Day 1~31
D1317 Month 1~12
D1318 Week 1~7
D1319 Year 0~99(2 right-most bit)
2. Adjust method of perpetual clock:
a) It can use specific command TWR to adjust for PC/PA/PH/PV modes built-in real time clock.
Refer to TWR for detail.
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b) Using peripherial ELCSoft to set.

Function Group (PI)
Number D1018~D1019
Contents:
1. 32-bit data register containing floating point value of PI.
2. Floating point value = H 40490FDB

Function Group Input points time delay
Number D1020~D1021
Contents:
1. PB/PC/PA/PH series X0~X7: 10ms (factory default), 0~20ms adjustable. Refer to the usage of
special registers D1020.
2. PH series X10, X11: 0 times (factory default), 0~20 times adjustable (Scan cycle is the base).
Refer to the usage of special registers D1021.
3. D1020 can be used for setting up the response time of receiving pulses at X0 ~X7 for PV series.
(Setup range: 0 ~ 60; Unit: ms)
4. D1021 can be used for setting up the response time of receiving pulses at X10 ~X17 for PV
series. (Setup range: 0 ~ 60; Unit: ms)
5. When ELC powers on is from OFFON, the content of D1020 will become to 10 and D1021 will
become to 10 automatically.
X0
X7
0ms
1ms
10ms
15ms
0
1
10
15
Terminal
response time
state
memory
input reflash
setting by D1020
(default is 10)

6. When setting X0~X7 response time to 0ms to execute following program, the faster response
time in input terminla will be 50s due to input terminal connects to RC filter circuit in series.
M1000
MOV K0 D1020
normally ON contact

7. It is not necessary to adjust response time when using high-speed counter or interrupt insert in
program.
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8. It is the same to use instruction REFF or change the content of D1020 and D1021.

Function Group Execution Completed Flag
Number M1029, M1030, M1036, M1037, M1102, M1103
Contents:
Execution Completed Flag:
MTR, HKY, DSW, SEGL, PR:
M1029=ON for a scan period once the instruction finish executing.
PLSY, PLSR:
1. M1029 will be On after Y0 pulse output of PC/PA/PH/PB is completed. M1030 will be On after
Y1 pulse output is compeleted. When PLSY and PLSR instruction is Off, M1029 and M1030
turn Off. You have to reset M1029 and M1030 after the action is completed.
2. M1029 will be On after Y0 and Y1 pulse output of PV is completed. M1030 will be On after Y2
and Y3 pulse output is compeleted. M1036 will be On after Y4 and Y5 pulse output of PV is
completed. M1037 will be On after Y6 and Y7 pulse output is completed.When PLSY and PLSR
instruction is Off, M1029, M1030, M1036 and M1037 turn Off. When the instruction is re-
executed for the next time, M1029, M1030, M1036 and M1037 will turn Off and On again when
the execution is completed.
3. User should clear M1029 and M1030 manully.
INCD:
M1029 will be ON for a scan period when designated group finish comparison.
RAMP, SORT:
1. M1029= ON after completing execution, M1029 must be cleared by user.
2. If this instruction is OFF, M1029 will be OFF.
DABSR:
1. M1029=ON after completing execution.
2. M1029 will be OFF when execute this instruction in the next time and it will be ON after
completing execution.
ZRN, DRVI, DRVA:
1. For PV series, M1029 = ON when the first output group Y0 and Y1 is completed. M1030 = ON
when the second output group Y2 and Y3 is completed. For PH series, M1102=ON when the first
output group Y10 pulses complete sending and M1103=ON when the second output group Y11
pulses complete sending.
2. For PV series, M1036 = ON when the third output group Y4 and Y5 of PV is completed. M1037 =
ON when the fourth output group Y6 and Y7 is completed.
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3. For PV series, When the instruction is re-executed for the next time, M1029 or M1030 will turn
OFF and ON again when the execution is completed. For PH series, M1102 or M1103 will be
OFF when execute this instruction in the next time and it will be ON after completing execution.

Function Group Communication Error Code
Number M1025, D1025
Contents:
Error code when communication error:
01: illegal instruction.
02: illegal equipment address.
03: request data exceeds range.
07: checksum error

Function Group Clear Command
Number M1031, M1032
Contents:
M1031 (clear unlatched area) , M1032 (clear latched area)
Device The component that will be cleared
M1031
Clear unlatched area
The contact state of Y, general M, general S
T contact for general and time coil
C contact for general, time coil reset coil
D present register for general
T present register for general
C present register for general
M1032
Clear latched area
The contact state of M and S for latched
Accumulative timer T contact and time coil
Latched C and hig-speed counter C contact, count coil
Present register D for latched
Present register of accumulative timer T
Latched C and present register of high-speed counter C

Function Group M1033
Number Output Latched in STOP mode
Contents:
When M1003 = ON, ELC outputs will be latched in their current state when ELC is switched from RUN
to STOP.

Function Group Turn all outputs off
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Number M1034
Contents:
When M1034 = ON, all outputs will turn off.

Function Group RUN/STOP Switch
Number M1035, D1035
Contents:
1. When M1035 = ON, PC use input point X7, PA use input point X3, PH use input point X5 to be
RUN/STOP. PB does not support.
2. When M1035 = On, PV series will determine the content (K0 ~ K15) in D1035 to enable input
points X0 ~ X17 as the RUN/STOP switch.

Function Group Speed of X0~X5 can be detected at the same time
Number M1036
Contents:
For PH V1.4 and above, SPD can detect the speed of X0~X5 at the same time. The total bandwidth is
40KHz.

Example:
X7
SPD X1 K1000 D0
SET M1036


When X7=ON, the parameters of D0 are as follows:
Index Function
+0 Speed detection of X0 signal input = low 16 bits of 32 bits.
+1 Speed detection of X0 signal input = high 16 bits of 32 bits.
+2 Speed detection of X1 signal input = low 16 bits of 32 bits.
+3 Speed detection of X1 signal input = high 16 bits of 32 bits.
+4 Speed detection of X2 signal input = low 16 bits of 32 bits.
+5 Speed detection of X2 signal input = high 16 bits of 32 bits.
+6 Speed detection of X3 signal input = low 16 bits of 32 bits.
+7 Speed detection of X3 signal input = high 16 bits of 32 bits.
+8 Speed detection of X4 signal input = low 16 bits of 32 bits.
+9 Speed detection of X4 signal input = high 16 bits of 32 bits.
+10 Speed detection of X5 signal input = low 16 bits of 32 bits.
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Index Function
+11 Speed detection of X5 signal input = high 16 bits of 32 bits.
+12 Left time of speed detection (unit: ms)

Function Group Communication Response Delay
Number D1038
Contents:
1. Data response delay time can be set when ELC is a Slave in RS-485 communication. Unit is
0.1ms. 0~10,000 adjustable.
2. For PC/PA/PH series, by using ELC-Link, D1038 can be set to send next communication data
with delay. (Unit: 1 scan period for PC/PA/PH, 0.1ms for PV)

Function Group Constant scan time
Number M1039, D1039
Contents:
1. When M1039 is ON, program scan time is determined by D1039. When program finishes
executing, it will execute the next scan as constant scan time attained. If D1039 is less than
program scan time, it will scan by program scan time.
M1000
normally ON
contact
MOV P K20 D1039
M1039 Constant scan time
Scan time is fixed to 20ms
2. The relative instructions of scan time are RAMP, HKY, SEGL, ARWS and PR. They should be
used with constant scan time or constant time insert interrupt.
3. Especial for instruction HKY, scan time should be set to 20ms and above when it is used 44
matrix to be 16 keys to operate.
4. Scan time D1010~D1012 display also include constant scan time.

Function Group Analog Function
Number D1056~D1057, D1062, D1110~D1111, D1116~D1118
Contents:
1. PA Models Only
2. If D1118 =5, it will be regarded as 5ms.
3. Resolution of analog input AD card: 12 bits (10V or 20mA)
4. Resolution of analog input DA card: 12 bits (0~10Vor 0~20mA)
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Device Function
D1056 Present value of analog input channel 0 (CH0)
D1057 Present value of analog input channel 1 (CH 1)
D1062 For PA series, average time of AD (CH0, CH1): 2~4
D1110 Average value of analog input channel 0 (CH 0)
D1111 Average value of analog input channel 1 (CH 1)
D1116 Analog output channel 0 (CH 0).
D1117 Analog output channel 1 (CH 1).
D1118 Analog input filter setting (ms).

Function Group Algorithm Error Flag
Number M1067~M1068, D1067~D1068
Contents:
Algorithm error flag:
Component Explanation Latched STOPRUN RUNSTOP
M1067 Algorithm error flag None Clear Latched
M1068 Algorithm error lock flag None Unchanged Latched
D1067 Algorithm error code None Clear Latched
D1068 STEP value of algorithm error None Unchanged Latched

Error code explanation:
D1067
error code
Function
0E18 BCD conversion error
0E19 Divisor is 0
0E1A Usage exceeds limit (include E and F)
0E1B It is negative number after doing radical
0E1C FROM/TO communication error

Function Group
X0 input point can detect pulse width
Number M1084D1023
Contents:
X0 input point of PB/PA/PC/PH V1.4 series models can detect pulse width. Whenever X0 turns from
ON to OFF, the value will be updated once and stored in D1023 (unit: 0.1ms). The minimum detectable
width is 0.1ms and maximum 10,000ms.

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Function Group Low Voltage
Number M1087, D1100
Contents:
1. When ELC detects LV (Low Voltage) signal, it will check if M1087 is On or not. If M1087 is On,
the content in D1100 will be stored in Y0 ~ Y17.
2. bit0 (LSB) of D1100 corresponds to Y0, bit1 corresponds to Y1, bit8 corresponds to Y10 and so
on.

Function Group
File Register
Number M1101, D1101~D1103
Contents:
1. When ELC is powered on or from STOP to RUN, it will check start file register function from
M1101, the start number of file register from D1101, read item number of file register from D1102,
to determine if it should send file register data to the designated data register automatically or not.
M1101:
Whether to automatically downland data from file register
D1101:
Start No. of file register K0 ~ K1,599 (for PC/PA/PH)
Start No. of file register K0 ~ K9,999 (for PV)
D1102:
Number of data read from file register K0 ~ K1,600 (for PC/PA/PH)
Number of data read from file register K0 ~ K8,000 (for PV)
D1103:
Location for storing data read from file register
Start No. of assigned data register D K2,000 ~ K4,999 (for PC/PA/PH)
Start No. of assigned data register D K2,000 ~ K9,999 (for PV)
2. Please refer to instructions MEMR and MEMW explantion.

Function Group Pulse Output with Acceleration/Deceleration
Number M1115~M1119, D1104
Contents:
1. The definition of special D and special M which are used by pulse output with acceleration/
deceleration:
Device Function
M1115 Start switch for accel/decel pulse output
M1116 Flag that is used in acceleration
M1117 Target frequency attained flag
M1118 Flag that is used in deceleration
M1119 Complete function flag
D1104 Using parameter index (correspond to D component)
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2. Corresponding table for parameter D1104 (frequency range is 25Hz~10KHz)
Index Function
+0 Start frequency (SF)
+1 Gap frequency (GF)
+2 Target frequency (TF)
+3 Total number of pulse output number (lower 16-bit of 32-bit)
+4 Total number of pulse output number (upper 16-bit of 32-bit)
(TP)
+5 Output pulse number in acceleration area (lower 16-bit of 32-bit)
+6 Output pulse number in deceleration area (upper 16-bit of 32-bit)
(AP)
3. It doesnt need to use instruction, it just need to fill parameter chart and set M1115 to start. This
function can use Y0 output only, the timing is as following.
GF
GP
TF
SF
AP AP
Frequency
Pulse number
Acceleration/Deceleration step number
= (TF-SF)/GF
Output pulse number for each step
AP/(Acceleration or Deceleration step number)
GP=
AP is pulse number of
acceleration/deceleration


Note:
1. This function should be executed when the following conditions all exist. Once a condition doesnt
exist, this function wont execute.
2. Start frequency must be less than target frequency.
3. Gap frequency must be less than (target frequency start frequency)
4. Total number of pulse number must be greater than (accel/decel pulse number *2)
5. Start frequency and target frequency: the minimum is 25Hz and the maximum is 10KHz.
6. Accel/decel pulse number must be more than accel/decel step number
7. When M1115 is from ON to OFF, M1119 will be cleared and M1116, M1117 and M1118 aren
unchanged. When ELC is from STOPRUN or from RUNSTOP, M1115~M1119 will be
cleared to OFF. And D1104 will be cleared to 0 only when it is from OFFON.
8. If the function acceleration/deceleration pulse output and instruction PLSY Y0 output exist at the
same time, it will execute one action which starts Y0 output first.
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How to calculate action time of each section
1. If start frequency is set to 1KHz, gap frequency is set to 1KHz, target frequency is set to 5KHz,
total pulse number is 100 and accel/decel pulse number is 40, timing chart of accel/decel area is
in the following.
5000
4000
3000
2000
1000
t t t t 1 2 3 4
Frequency (Hz)
Time (sec)

2. You can get accel/decel step = (5K 1K) / 1K = 4 and output number of each pulse is 40 / 4 = 10.
Therefore, you can get t1 = (1 / 1K) * 10 = 10ms, t2 = (1 / 2K) * 10 = 5ms, t3 = (1 / 3K) * 10 =
3.33ms and t4 = (1 / 4K) * 10 = 2.5ms from the following figure.

Example: Forward/Reverse accel/decel step motor control
K500 MOV
M1002
D1104
K1000 MOV D500
K100 MOV D501
MOV D502
K80000 DMOV D503
K10000 DMOV D505
K10000
M1115 SET
Using D500-D506 to be parameter address
1KHz start frequency
100Hz gap frequency
10KHz target frequency
80000 pulses output
10000 pulses in acceleration/deceleration section

1. When ELC is RUN, it will save each parameter setting into the register that designated by D1104.
2. When M1115=ON, acceleration/deceleration pulse starts to output.
3. M1116=ON during acceleration, M1117=ON when speed attained, M1118=ON in deceleration
and M1119=ON after finishing executing.
4. M1115 wont be reset automatically and it needs to be cleared by user.
5. Actual pulse output curve is in the following:
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10K
1K
10000 70000 80000
Frequency (Hz)
Pul se
number
10K
1K
2606 8606 11213
Time(ms)
Frequency(Hz)


Function Group
Special High-speed pulse output (PC/PA)
Two-axis synchronous control (PH)
Number M1133~M1135, D1133~D1136
Contents:
PC/PA models: Special High-speed pulse output
1. The definition of special D and special M for special high-speed pulse (50KHz) output function:
Device Function
M1133 Output switch (ON is start executing) for special high-speed pulse (50KHz)
M1134 ON is continuous output switch for special high-speed pulse Y0 (50KHz)
M1135 Output pulse number attained flag for special high-speed pulse Y0 (50KHz)
D1133 Start number of control register (D) for special high-speed pulse Y0 (50KHz)
2. Corresponding table for D1133 parameter
Index Function
+0 Special high-speed pulse output frequency (lower 16-bit of 32 bits)
+1 Special high-speed pulse output frequency (upper 16-bit of 32 bits)
+2 Special high-speed pulse output number (lower 16-bit of 32 bits)
+3 Special high-speed pulse output number (upper 16-bit of 32 bits)
+4 Display present special high-speed pulse output number (lower 16-bit of 32 bits)
+5 Display present special high-speed pulse output number (upper 16-bit of 32 bits)


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Function explanation:
1. Output frequency and output numbers above can be modified when M1133=ON and M1135=OFF.
It wont affect present output pulse once output
2. Frequency or output target number is changed. Present output pulse number will be displayed
once a scan time update. It will be cleared to 0 when M1133 is from OFFON and it will keep
that last output number when M1133 is from ONOFF.
Note:
1. This special high-speed pulse output function can use special Y0 output point in RUN. It can exist
with PLSY Y0 at the same time and PLSY (Y1) wont be affected. If instruction PLSY (Y0) is
executed prior to this function, this function cant be used and vice versa. When executing this
function, general Y0 output will be invalid and outputs point of Y1~Y7 can be used.
2. The difference between this function and instruction PLSY is higher than output frequency. The
maximum output can up to 50KHz.

PH models: Two-axis synchronous control
1. Definition of oblique line and arc for two-axis synchronous control of Special D and Special M for
models of PH V1.4 and above:
Device Function
M1133 Y10 outputs starting flag for two-axis synchronous control
M1135 Y11 outputs starting flag for two-axis synchronous control
D1133 Y10 outputs the starting number of register (D) for two-axis synchronous control
D1134 Set the number of segments of Y10 output for two-axis synchronous control
D1135 Y11 outputs the starting number of register (D) for two-axis synchronous control
D1136 Set the number of segments of Y11 output for two-axis synchronous control
2. D1133~D1135 parameters:
Index Function
+0
Y10, Y11 two-axis synchronous control; output frequency of 1
st
segment = low 16
bits of 32 bits
+1
Y10, Y11 two-axis synchronous control; output frequency of 1
st
segment = high 16
bits of 32 bits
+2
Y10, Y11 two-axis synchronous control; output pulse number of 1
st
segment = low
16 bits of 32 bits
+3
Y10, Y11 two-axis synchronous control; output pulse number of 1
st
segment = high
16 bits of 32 bits


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5- 85
Function explanation:
1. Definition of the two axes:
X axis Y0 (direction output) and Y10 (pulse output)
Y axis Y1 (direction output) and Y11 (pulse output)
2. Define the format of output table:
Assume D1133 = K100 and D1134 = K3 and the output table has to be set as:
Segment Device D
Output
frequency
Device D
Output pulse
number
Description
1 D101,D100 K10000 D103,D102 K1000
Segment 1 outputs
1,000 pulses by 10KHz
2 D105,D104 K15000 D107,D106 K2000
Segment 2 outputs
2,000 pulses by 15KHz
3 D109,D108 K5000 D111,D110 K3000
Segment 3 outputs
3,000 pulses by 5KHz
Remarks: The frequency and number of outputs are all 32-bit. Thus, the 3 segments continuously
occupy 12 devices D (3x2x2=12).
Note:
1. Make sure that the output frequency and pulse number have been set before using this function.
The output frequency and pulse number cannot be modified during operation.
2. When ELC program scans to END command, it will automatically check whether this function
needs to be activated.
3. When M1133 and M1135 are set in the same scan period, the two axes will output pulses
simultaneously.
4. When the output frequency is less than 100Hz, the output will be executed by 100Hz. When the
output frequency is larger than 100kHz, the output will be executed by 100kHz.
5. Only device D (D0 ~ D999 and D2000 ~ D4999) can be used for this function. DO NOT use other
devices or exceed the range of device D.
6. The maximum number of segments for this function is 50. When the number of segment numbers
is less than 1 or larger than 50, this function will be disabled.
7. After activating this function, M1102=ON indicates Y10 output is END and M1103=ON indicates
Y11 output is END.

Example1: Draw oblique line
1. Destination: draw two oblique lines as follows:
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(0,0)
(1000,3000)
(5000,4000)
2 Segment
1Segment
1Segment 2 Segment
Y axis
X axis

2. Program explanation: Y0 and Y10 are for X-axis; Y1 and Y11 are for Y-axis as follows:
M1002
M0
MOV K200
K2
K300
Y0
M1133
Y1
M1135
MOV
MOV
MOV K2
D1133
D1134
D1135
D1136

3. Output frequency and number: setting as follows:
Axis Segment Device D
Output pulse
number
Device D
Output pulse
number
1 D201,D200 K1000 D203,D202 K1000
X
2 D205,D204 K4000 D207,D206 K4000
1 D301,D300 K3000 D303,D302 K3000
Y
2 D305,D304 K1000 D307,D306 K1000

Example2: Drawing arc
1. Destination: draw a 90 arc as follows:
5. Progr ammi ng Concepts

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(0,0)
(50000,50000)
Total 10 Segment
Total 10 Segment
X axis
Y axis

2. Program explanation: the definition and program are the same as example 1 except D1134 and
D1136. D1134 and D1136 are modified to k10.
M1002
M0
MOV K200
K2
K300
Y0
M1133
Y1
M1135
MOV
MOV
MOV K2
D1133
D1134
D1135
D1136

3. Output frequency and number: setting as follows:
Axis Segment Device D
Output pulse
number
Device D
Output pulse
number
1 D201,D200 K1230 D203,D202 K615
2 D205,D204 K3664 D207,D206 K1832
3 D209,D208 K6004 D211,D210 K3002
4 D213,D212 K8200 D215,D214 K4100
5 D217,D216 K10190 D219,D218 K5095
6 D221,D220 K11932 D223,D222 K5966
7 D225,D224 K13380 D227,D226 K6690
8 D229,D228 K14498 D231,D230 K7249
9 D233,D232 K15258 D235,D234 K7629
X
10 D237,D236 K15644 D239,D238 K7822
1 D301,D300 K15644 D303,D302 K7822 Y
2 D305,D304 K15258 D307,D306 K7629
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Axis Segment Device D
Output pulse
number
Device D
Output pulse
number
3 D309,D308 K14498 D311,D310 K7249
4 D313,D312 K13380 D315,D314 K6690
5 D317,D316 K11932 D319,D318 K5966
6 D321,D320 K10190 D323,D322 K5095
7 D325,D324 K8200 D327,D326 K4100
8 D329,D328 K6004 D331,D330 K3002
9 D333,D332 K3664 D335,D334 K1832
10 D337,D336 K1230 D339,D338 K615

Example3: Draw arc in four quadrants
1. Destination: draw 90 arc in the four quadrants as follows:
(0,0)
(50000,50000)
(-50000,50000)
(-50000,-50000) (50000,-50000)
Y0=ON
Y1=ON
Y0=ON
Y1=ON
Y1=OFF
Y1=OFF
Y0=OFF
Y0=OFF
Quadrant 2
Quadrant 3
Quadrant 4
X axis
Y axis

2. Program explanation: When the direction signal (Y0 or Y1) is ON, the direction will be positive.
When the direction signal is OFF, the direction will be negative as follows:
5. Progr ammi ng Concepts

5- 89
M1002
M0
MOV K200
K300
M1133
M1135
MOV
MOV
MOV
D1133
D1134
D1135
D1136
M1
SET Y0
Y1
K10
K10
SET
RST
SET Y0
Y1
Y0
Y1 RST
RST
Y0
Y1
RST
SET
M2
M3
M4

3. Output frequency and number: the settings are the same as follows:
Axis Segment Device D
Output pulse
number
Device D
Output pulse
number
1 D201,D200 K1230 D203,D202 K615
2 D205,D204 K3664 D207,D206 K1832
3 D209,D208 K6004 D211,D210 K3002
4 D213,D212 K8200 D215,D214 K4100
5 D217,D216 K10190 D219,D218 K5095
6 D221,D220 K11932 D223,D222 K5966
7 D225,D224 K13380 D227,D226 K6690
8 D229,D228 K14498 D231,D230 K7249
9 D233,D232 K15258 D235,D234 K7629
X
10 D237,D236 K15644 D239,D238 K7822
1 D301,D300 K15644 D303,D302 K7822
2 D305,D304 K15258 D307,D306 K7629
3 D309,D308 K14498 D311,D310 K7249
4 D313,D312 K13380 D315,D314 K6690
Y
5 D317,D316 K11932 D319,D318 K5966
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Axis Segment Device D
Output pulse
number
Device D
Output pulse
number
6 D321,D320 K10190 D323,D322 K5095
7 D325,D324 K8200 D327,D326 K4100
8 D329,D328 K6004 D331,D330 K3002
9 D333,D332 K3664 D335,D334 K1832
10 D337,D336 K1230 D339,D338 K615
4. When M0, M1=ON, a 90 arc is drawn in quadrant 1; when M0, M3=ON, a 90 arc is drawn in
quadrant 3; when M0, M4=ON, a 90 arc is drawn in quadrant 4.
5. The four 90 arcs are drawn when X axis speeds up and Y axis slows down.
6. When the program is changed as D1333=K300 and D1335=K200, the set value of X axis switch
with that of Y axis. That is, the four 90 arcs are drawn when X axis slows down and Y axis
speeds up. The program is as follows:
M1002
M0
MOV
K200
K300
M1133
M1135
MOV
MOV
MOV
D1133
D1134
D1135
D1136
M1
SET Y0
Y1
K10
K10
SET
RST
SET Y0
Y1
Y0
Y1 RST
RST
Y0
Y1
RST
SET
M2
M3
M4

7. When M0, M1=ON, a 90 arc is drawn in quadrant 1; when M0, M2=ON, a 90 arc is drawn in
quadrant 2; when M0, M3=ON, a 90 arc is drawn in quadrant 3; when M0, M4=ON, a 90 arc is
drawn in quadrant 4. As shown as follows:
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(0,0)
(50000,50000)
(-50000,50000)
(-50000,-50000) (50000,-50000)
Y0=ON
Y1=ON
Y0=ON
Y1=ON
Y1=OFF Y1=OFF
Y0=OFF
Y0=OFF
Quadrant 1
Quadrant 4
Quadrant 2
Quadrant 3
X axis
Y axis


Example4: Draw a circle
1. Destination: make a circle with four 90 arcs as follows:
(0,0)
(50000,50000)
(50000,-50000)
(10000,0)
D0=K1
D0=K2
D0=K3
D0=K4
X axis
Y axis

2. Program explanation: When direction control (Y0 or Y1) is ON, the direction will be positive or it
will be negative. When X0 is from OFF to ON, D0 will be added once and the X,Y axes will draw a
90 arc.
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5- 92
M1002
MOV
K0
M1133
M1135
MOV
MOV
D1134
SET Y0
Y1
K10
SET
K10
MOV
MOV
SET Y0
Y1
MOV
MOV
Y0
Y1
MOV
MOV
Y0
Y1 SET
MOV
MOV
= D0 K2
= D0 K1
= D0 K4
= D0 K3
D1136
D0
D0
INC
K200
K300
D1133
D1135
RST
K300
K200
D1133
D1135
D1133
D1135
RST
RST
K200
K300
K300
K200
RST
D1133
D1135
X0
X0

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5- 93
3. Output frequency and number: the settings are the same as example 2.
Axis Segment Device D
Output pulse
number
Device D
Output pulse
number
1
D201,D200 K1230 D203,D202 K615
2
D205,D204 K3664 D207,D206 K1832
3
D209,D208 K6004 D211,D210 K3002
4
D213,D212 K8200 D215,D214 K4100
5
D217,D216 K10190 D219,D218 K5095
6
D221,D220 K11932 D223,D222 K5966
7
D225,D224 K13380 D227,D226 K6690
8
D229,D228 K14498 D231,D230 K7249
9
D233,D232 K15258 D235,D234 K7629
X
10
D237,D236 K15644 D239,D238 K7822
1
D301,D300 K15644 D303,D302 K7822
2
D305,D304 K15258 D307,D306 K7629
3
D309,D308 K14498 D311,D310 K7249
4
D313,D312 K13380 D315,D314 K6690
5
D317,D316 K11932 D319,D318 K5966
6
D321,D320 K10190 D323,D322 K5095
7
D325,D324 K8200 D327,D326 K4100
8
D329,D328 K6004 D331,D330 K3002
9
D333,D332 K3664 D335,D334 K1832
Y
10
D337,D336 K1230 D339,D338 K615

How to calculate the frequency of each segment and the number of output pulse:
1. Destination: Draw a clockwise arc to (50000,50000) with 10 segments as shown as follows:
(0,0)
(0,Ry)
(Rx,0)
(x10,y10)
(x1,y1)
(x2,y2)
(x3,y3)
(x4,y4)
(x5,y5)
(x6,y6)
(x7,y7)
(x8,y8)
(x9,y9)
X axis
Y axis

2. Rx is a target value of X axis; Ry is a target value of Y axis; N is the number of segments;
=3.1416
Step 1: Calculate the position of each segment
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5- 94
X axis
x1 = Rx Rx*sin[(N1)*/(2*N)]
x2 = Rx Rx*sin[ (N2)*/(2*N) ]
x1x10 is as table 3
Position x1 x2 x3 x4 x5 x6 x7 x8 x9 x10(Rx)
With
decimal
point
615.55 2447.12 5449.61 9549.08 14464.59 20610.67 27300.42 34549.11 42178.25 50000
Without
decimal
point
615 2447 5449 9549 14464 20610 27300 34549 42178 50000

Y axis
y1 = Ry*sin[1*/(2*N) ]
y2 = Ry*sin[2*/(2*N) ]
y1y10 is as table 4
Position y1 y2 y3 y4 y5 y6 y7 y8 y9 y10(Ry)
With
decimal
point
7821.74 15450.88 22699.57 29389.32 35355.40 40450.91 44550.38 47552.87 49384.44 50000
Without
decimal
point
7821 15450 22699 29389 35355 40450 44550 47552 49384 50000
Step 2: Calculate the distance (number of pulses) between segments
X axis: x1 = x1 0; x2 = x2 x1 x10 = x10 x9 as shown in table
Y axis: y1 = y1 0; y2 = y2 y1 y10 = y10 y9 as shown in table
Position x1 x2 x3 x4 x5 x6 x7 x8 x9 x10
Number
of pulses
615 1832 3002 4100 5095 5966 6690 7249 7629 7822

Position y1 y2 y3 y4 y5 y6 y7 y8 y9 y10
Number
of pulses
7821 7629 7249 6690 5966 5095 4100 3002 1832 616
Step 3: Decide the executing time of each segment and bring out the frequency of each segment
following Step2 table.
Assume every segment executes 500ms, the equation for frequency (Hz) of each segment is:
fx1 = 1/0.5*x1
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fx2 =1/0.5*x2
Thus, the 10 segment frequency of X and Y axis is as table below.
Position fx1 fx2 fx3 fx4 fx5 fx6 fx7 fx8 fx9 fx10
Frequency 1230 3664 6004 8200 10190 11932 13380 14498 15258 15644

Position fy1 fy2 fy3 fy4 fy5 fy6 fy7 fy8 fy9 fy10
Frequency 15642 15258 14498 13380 11932 10190 8200 6004 3644 1232
Step 4: Insert Device D as specified in table 2 to finish all steps.
Reminder 1: When Rx=Ry, the user can calculate X axis, and copy X axis to Y axis (as fy1=fx10,
fy2=fx9fy10=fx1,and y1=x10,y2=x9,y10=x1 )
Reminder 2: When drawing a counterclockwise arc, switch the index value of X axis with that of Y axis.

Function Group Extension Connected Detection
Number D1140, D1142, D1143, D1145
Contents:
D1140: Number of attached special modules (Analog in, Analog out, PT, TC, etc.), the maximum is 8.
D1142: Digital extension input X point number.
D1143: Digital extension input Y point number.
D1145: Number of special left-side extension modules (Analog in, Analog out, PT, TC, etc.); Max. 8
(available in PV only)

Function Group Adjustable Acceleration/Deceleration Pulse Output Function Explanation
Number M1144~M1149, M1154, D1032, D1033, D1144, D1154, D1155
Contents:
1. For PC/PA/PH Models, the definition of special D and special M of adjustable accel/decel pulse
output function:
Device Function
M1144 Start switch of accel/decel pulse output
M1145 Flag that is used in acceleration
M1146 Target frequency attained flag
M1147 Flag that is used in deceleration
M1148 Completed function flag
M1149 stop counting temporarily flag
M1154 Start designated deceleration gap time flag and frequency flag
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5- 96
Device Function
D1030 Lower 16-bit of 32-bit of Y0 pulse accumulative output numbers
D1031 Upper 16-bit of 32-bit of Y0 pulse accumulative output numbers
D1144 Using parameter index (correspond to D component)
D1154 Recommended value of designated deceleration gap time (10~32767 ms)
D1155 Recommended value of designated acceleration gap frequency (-1~ - 32700 Hz)
2. Corresponding table of parameter D1144
Index Function
+0 Total segment number (n) (the maximum number is 10)
+1 Present execution segment (read only)
+2 Start frequency of first segment (SF1)
+3 Interval time of first segment (GT1)
+4 Interval frequency of first segment (GF1)
+5 Target frequency of first segment (TF1)
+6 Lower 16-bit of 32-bit of target number of first segment output pulse
+7 Upper 16-bit of 32-bit of target number of first segment output pulse
+8 Start frequency of second segment (SF2)
+9 Interval time of second segment (GT2)
+10 Interval frequency of second segment (GF2)
+11 Target frequency of second segment (TF2)
+12 Lower 16-bit of 32-bit of target number of second segment output pulse
+13 Upper 16-bit of 32-bit of target number of second segment output pulse
: :
+n*6+2 Start frequency of nth segment (SFn)
+n*6+3 Interval time of nth segment (GTn)
+n*6+4 Interval frequency of nth segment (GFn)
+n*6+5 Target frequency of nth segment (TFn)
+n*6+6 Lower 16-bit of 32-bit of target number of nth segment output pulse
+n*6+7 Upper 16-bit of 32-bit of target number of nth segment output pulse
Function Explanation:
This function can only be used for Y0 output point and the timing will be as follows. After filling
parameter table, set M1144 to start (it should be used in RUN mode)
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SF2
TF2
SF3
TF3
TF4
SF4 TF1
SF1
GF
GT
GT
GF
Frequency(Hz)
Time(ms)
1st section
pulse number
(SE1)
2nd section
pulse number
(SE2)
3rd section
pulse number
(SE3)
4th section
pulse number
(SE4)


Usage rule and restriction:
1. The minimum frequency of start frequency and target frequency should be equal to or greater
than 200Hz. If it is less than 200Hz, it means finish executing or not to execute.
2. The maximum frequency of start frequency of target frequency is 32,700Hz. It will execute in
32,700Hz as it is greater than 32,700Hz.
3. The interval time range is 1~32,767ms and its unit is ms.
4. The interval frequency range in acceleration segment is 1Hz~32,700Hz and in deceleration
segment is -1~-32,700Hz. If it is set to 0Hz, the executed segment cant be up to target frequency,
but it will tansfer to execute next segment after reaching target number.
5. Target number of segment pulse output should be greater than ((GF*GT/1000)* ((TF-SF)/GF).
Refer to example 1 for detail. Once Target number of segment pulse output isnt greater than
((GF*GT/1000)* ((TF-SF)/GF), this function cant be used. The improve method is to add interval
time or add target number of pulse output.
6. If there is Y0 output designated by high-speed instruction in RUN mode, Y0 output
7. Instruction will be started as high priority.
8. After starting to execute M1144, if M1148 outputs without attaining completed function flag and
M1144 is closed, this function will start deceleration function. If designated acceleration function
flag M1154 is OFF, it will reduce 200Hz per 200ms and stop output pulse till output frequency is
less than 200Hz and set M1147 to deceleration flag. But if designated deceleration flag M1154 is
ON, it will be executed by interval time and frequency that defined by user. And interval time cant
be less than or equal to 0 (if it is less than or equal to 0, factory setting will be set to 200ms).
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5- 98
Interval frequency cant be greater than or equal to 0 (factory setting will be set to -1KHz when it
is equal to 0 and factory setting will be added negative sign automatically when it is greater than
0.)
9. When M1148 attains completed function flag and M1144 is closed, this function wont start
deceleration function and it will clear M1148 flag. Once M1144 is closed, it will clear M1149 flag.
10. The execution segment of this function will execute by total segment number. The maximum
segment is 10 segments.
11. The acceleration/deceleration of this function will execute by start frequency of the next segment,
i.e. when target frequency of execution segment is less than start frequency of the next segment,
the next segment is acceleration and the target frequency of the next segment must be greater
than start frequency of the next segment. When target frequency of execution segment is greater
than the next segment frequency, the next segment is deceleration; therefore, target frequency of
the next segment must be less than start frequency of the next segment. If user cant set it by this
way, we cant ensure that you can get correct output pulse.
12. When STOPRUN, M1144~M1149 will be cleared to OFF. When RUNSTOP, M1144 will be
cleared and M1145~M1149 wont be cleared. D1144 will be cleared to 0 when it is from
OFFON and unchanged in other case.
13. The valid parameter range is D0~D999 and D2000~D4999. ELC wont execute this instruction,
and close M1144 if the parameter is out of range (includes all segment parameters).

Example 1:
To calculate output number of acceleration/deceleration of each segment and target frequency
If setting start frequency of segment to 200Hz, segment interval time to 100ms, segment gap
frequency to 100Hz, segment target frequency to 500Hz and target number of segment pulse is 1000
pulses. The calculation will be in the following:
1. Output pulse number at start acceleration/deceleration is 200*100/1000 = 20 pulses
2. Output pulse number of the first acceleration interval is 300*100/1000 = 30 pulses
3. Output pulse number of the second acceleration interval is 400*100/1000 = 40 pulses
4. Output pulse number of target frequency is 1000 (40+30+20) = 910 pulses
5. (NOTE: it is recommended to set this number to be greater than 10)
6. Output time of target frequency is 1 / 500 * 910 = 1820 ms
7. Total time of this segment is 1820 + 3*100 = 2120 ms
Example 2:
Simple acceleration/deceleration pulse output program of a segment acceleration and a segment
deceleration
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5- 99
M1002
MOV K2 D200
MOV K200
MOV K250 D202
MOV K500 D203
MOV K250 D204
MOV D205
D206
MOV K750 D208
MOV K500 D209
MOV K-250 D210
MOV K250 D211
K200 D212
END
M0


Example 3:
Pulse output program of a segment acceleration/deceleration with direction
TF1
TF2
TF2
TF1
SF2
SF2
SF1
SF1
X0=ON
Y7=OFF
Position
Zero point
Y7=On
Explanation:
1. Acceleration/deceleration setting is as example 2.
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5- 100
2. Figure above is the example of position movement. When X0 contact is ON, it will start to move
and it will stop when X0 contact is OFF. (Y7 is for direction setting)
3. Program is shown in the following.

M1002
RST M0
SET
END
RST M1
SET M0
ALT M1
Y7
RST
RST
X0
X0
M0
M1
M1
M1
M1148
M0
X0



Example 4: apply acceleration and deceleration of a segment to zero point return program.
1. Relative flag timing chart is shown in the following.
M1149
M1148
M1144
X0
Stop returning to zero point
Stop pulse output
Acceleration for
returning to zero point
Deceleration for
returning to zero point


2. The relation between frequency and position are shown in the following.
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5- 101
Frequency(Hz)
Acceleration for
returning to zero point
Deceleration for
returning to zero point
zero point
Position

3. Number setting of acceleration/deceleration, frequency and pulse are shown in the following.
(correspond to component D)

Index Settings
+0 2
+2 250(Hz)
+3 100(ms)
+4 500(Hz)
+5 10000(Hz)
+6, +7 10(pulse)
+8 9750(Hz)
+9 50(ms)
+10 -500(Hz)
+11 250(Hz)
+12, +13 30000(pulse)
4. Program is shown in the following: (it assumes contact X7 to be start reset trigger switch)
X7
SET
END
SET
X0
RST
X0
SET
RST


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5. Explanation:
a) After contact X7 is triggered, M1144 will set to start acceleration and set M1149 not to count
pulse number. And it will send 10 pulses once deceleration switch X0 is triggered and then enter
deceleration segment.
b) To set M1148 to end pulse output by manual and close this function once X0 is closed.
c) Note: This example is just an application method that user should adjust parameters settings
used in
d) acceleration/deceleration segment according to actual machine characteristics and limitation.

Function Group Single Step Execution
Number M1170, M1171, D1170
Contents:
1. Special D and special M for single step execution for PV:
Device No. Function
M1170 Start flag
M1171 Action flag
D1170 STEP No. of the currently executed instruction
2. The function:
a) Execution timing: The flag is valid only when ELC is in RUN status.
b) Action steps:
i) When M1170 is enabled, ELC enters the single step execution mode. ELC stays at a specific
instruction, stores the location of STEP in D1170 and executes the instsruction once.
ii) When M1171 is forced On, ELC executes the next instruction and stops. At the same time,
ELC auto-force O ff M1171 and stops at the next instruction. D1170 stores the present
STEP value.
iii) When Y output is in single step execution mode, Y outputs immediately without having to
wait until END instruction is being executed.
3. Note:
a) Instruction that will be affected by scan time will be executed incorrectly due to the single step
execution. For example, when HKY instruction is executed, it takes 8 scan times to obtain a
valid input value from a key. Therefore, the single step execution will result in incorrect actions.
b) High-speed pulse input/output and high-speed counter comparison instructions are executed
by hardware; therefore, they will not be affected by the single step execution.

Function Group 2-phase Pulse Output Function
Number M1172~M1174, D1172~D1177
Contents:
For PC/PA/PH Models, the definition of special D and special M of 2-phase output function:
5. Progr ammi ng Concepts

5- 103
Device Function Explanation
M1172 2-phase pulse output switch
M1173 ON is continuous output switch
M1174 Output pulse number attained flag
D1172 2-phase output frequency (12Hz~20KHz)
D1173 2-phase output mode selection (k1and k2)
D1174 Lower bit of 32-bit of 2-phase output pulse target number
D1175 Upper bit of 32-bit of 2-phase output pulse target number
D1176 Lower bit of 32-bit of 2-phase present output pulse number
D1177 Upper bit of 32-bit of 2-phase present output pulse number

Function Explanation:
1. Output frequency = 1/T as shown in the figure below. There are two output modes, k1 and k2, k1
means A phase gets ahead of B phase and k2 means B phase gets ahead of A phase. Output
number calculation adds 1 once there is a phase difference, such as figure below, there are 8
output pulses. When output numbers attains, M1174 will be ON and if you want to clear M1174,
you should close M1172.
1 2 7 8
Y0(A)
Y1(B)
T

2. Output frequency, output target number and mode selection can be modified when M1172=ON
and M1174=OFF. The modification of output frequency and output target number wont affect
present output pulse number but mode selection modification will clear present output pulse
number to 0. Present output pulse number will be updated once scan time updates and it will
clear to 0 when M1172 is from StopRun, and keep that last output number when M1172 is from
RunStop.
Note:
This function just can be used at RUN mode and can exist in program with PLSY instruction. But if
instruction PLSY is executed first, this function cant be used, and vice versa.

Function Group VR Volume
Number M1178~M1179, D1178~D1179
Contents:
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5- 104
For PC/PH/PV models, the definition of special D and special M of built-in 2 points VR Variable resistor
function:
Device Function
M1178 Start VR0
M1179 Start VR1
D1178 VR0 value
D1179 VR1 value
Function explanation:
1. This function only can be used at RUN mode. When M1178=ON, the variable value of VR 0 will
be converted to digit 0~255 and saved in D1178. When M1179=ON, the variablel value of VR 1
will be converted to digit 0~255 and saved in D1179.
2. Refer to instruction VRRD for detail.

Function Group Interrupt instruction for reading pulse number
Number D1180~D1181, D1198~D1199
Contents:
1. In PC/PA/PH series, it is possible to use Interupt instruction to read the value of high-speed
counter and sotore in D1180~D1181, D1198~D1199.
2. Function:
a) In PC/PA V1.2 and above, X0 (counter input) and X4 (external Interrupt) will correspondingly
work together with C235, C251, C253, and I401. Use D1180 and D1181 those are total 32 bit to
set X0 and X4. X1 (counter input) and X5 (external Interrupt) will correspondingly work together
with C236 and I501. Use D1198 and D1199 those are total 32 bit to set X1 and X5.
b) In PH V1.2 and above, X10 (counter input) and X4 (external Interrupt) will correspondingly work
together with C243, C255 and I401. Use D1180 and D1181 those are total 32 bit to set X10 and
X4. X11 (counter input) and X5 (external Interrupt) will correspondingly work together with C245
and I501. Use D1198 and D1199 those are total 32 bit to set X11 and X5.

Function Group Power Loss Latched Range Setting
Number D1200~D1219
Contents:
For PC/PA/PH/PV Models, to set latched range. The latched range will be from start address number to
end address number.

Function Group Input Point X can force to be ON/OFF
Number M1304
Contents:
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5- 105
For PC/PA/PH Models, When M1304=ON, input point X (X0-X7) of ELC can be forced to be ON-OFF
by using peripheral ELCSoft or HHP.
For PV, when M1304 = On, peripheral devices, e.g. ELCSoft or HHP, can force On/Off of input point X,
and the hardware LED will respond to it.

Function Group High-speed output pulse stop mode
Number M1310~M1311, M1334~M1335, D1166~D1167, D1343D1353
Contents:
1. PH V1.4 and above is added with mode 3 function. Definition of high-speed output pulse stop
mode of Special D and Special M:
Device No. Function
M1334 Select Y10 pulse stop output mode
M1335 Select Y11 pulse stop output mode
M1310 Immediately shut down Y10 pulse output starting flag
M1311 Immediately shut down Y11 pulse output starting flag
D1166 Switch between X10 rising-edge and falling-edge counting modes
D1167 Switch between X11 rising-edge and falling-edge counting modes
D1343 Set the time for speeding up and slowing down Y10 pulse output
D1353 Set the time for speeding up and slowing down Y11 pulse output
2. High-speed output pulse stop mode use Y10 pulse output
Mode 1 Planned slowing down
a) Applicable to: DDRVI and DDRVA instruction
b) Criteria for executing planned slowing down: Shut down the criteria contact for pulse output
instruction and set M1334 as OFF
c) The time from executing planned slowing down to the end of pulse output: The time set in D1343
(speeding up/slowing down time)
d) Explanation: The solid lines in figure 1 are the originally planned routes and the dotted lines refer
to the routes after planned slowing down is executed.
D1340
Speeding up/slowing down time D1343
Time
Frequency
Instruction shut down and M1334=OFF
Target frequency
Activation frequency

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Mode 2 Output shutdown
a) Applicable to: DDRVI, DDRVA, PLSY instructions
b) Criteria for executing output shutdown: Shut down the criteria contact for pulse output instruction
and set M1334 as ON (Because PLSY does not have speeding up/slowing down setting, M1334
does not need to be set in PLSY)
c) The time from executing output shutdown to the end of pulse output: Max. 1 scan cycle.
d) Explanation: The solid lines in figure 2 are the originally planned routes and the dotted lines refer
to the routes after output shutdown is executed.
Max. Stop time=1 scan cycle
Instruction shut down and M1334=OFF
Frequency
Target frequency
D1340
Activation frequency
Time

Mode 3 Immediate output shutdown
a) Applicable to: DDRVI, DDRVA, PLSY instructions
b) Criteria for executing immediate output shutdown: M1310 =ON (set before activating the
instruction) and the criteria triggers set in X10 (D1166=K0 refers to rising-edge; D1166=K1 refers
to falling-edge)
c) The time from executing immediate output shutdown to the end of pulse output: Max. 1 pulse time.
d) Explanation: The solid lines in figure 3 are the originally planned routes and the dotted lines refer
to the routes after X10 is triggered.
Time
Frequency
Target frequency
D1340
Activation frequency
X10 triggered
Max. Stop time=1 pulse time

3. High-speed output pulse stop mode use Y11 pulse output
Mode 1 Planned slowing down
a) Applicable to: DDRVI and DDRVA instruction
b) Criteria for executing planned slowing down: Shut down the criteria contact for pulse output
instruction and set M1335 as OFF
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5- 107
c) The time from executing planned slowing down to the end of pulse output: The time set in D1353
(speeding up/slowing down time)
Mode 2 Output shutdown
a) Applicable to: DDRVI, DDRVA, PLSY instructions
b) Criteria for executing output shutdown: Shut down the criteria contact for pulse output instruction
and set M1335 as ON (Because PLSY does not have speeding up/slowing down setting,
M1335does not need to be set in PLSY)
c) The time from executing output shutdown to the end of pulse output: Max. 1 scan cycle.
Mode 3 Immediate output shutdown
a) Applicable to: DDRVI, DDRVA, PLSY instructions
b) Criteria for executing immediate output shutdown: M1311 =ON (set before activating the
instruction) and the criteria triggers set in X11 (D1167=K0 refers to rising-edge; D1167=K1 refers
to falling-edge)
c) The time from executing immediate output shutdown to the end of pulse output: Max. 1 pulse time.
Note:
1. The execution criteria M1334 and M1335 of mode 1 and 2 have to be set before executing pulse
output shutdown instruction. The execution criteria M1310, M1311 and trigger criteria D1166,
D1167 of mode 3 have to be set before the pulse output instruction is activated.
2. In mode 3 (immediate output shutdown), Y10 can only be used with X10 and Y11 with X11.
3. When using X10 or X11 in mode 3, please do not use X10 or X11 as high-speed counter for
inputs.

Function Group Left-Side High-Speed Special Extension Module ID
Number D1386 ~ D1393
Contents:
1. The ID of left-side special extension module, if any, connected to PV are stored in D1386 ~
D1393 in sequence.
2. Left-side special extension module ID for PV:
Module Name Module ID(hex)
ELC-CODNETTM H4131
ELC-COENETM H'4050

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Function Group Easy ELC Link
Number M1350-M1354, M1360-M1439, D1355-D1370, D1415-D1465, D1480-D1991
Contents:
Explanation of Special D and special M explanation of ELC LINK ID1ID8 for PC/PA/PH:
MASTER ELC
SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D1480

D1495
D1496

D1511
D1512

D1527
D1528

D1543
D1544

D1559
D1560

D1575
D1576

D1591
D1592

D1607
D1608

D1623
D1624

D1639
D1640

D1655
D1656

D1671
D1672

D1687
D1688

D1703
D1704

D1719
D1720

D1735
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
D1434 D1450 D1435 D1451 D1436 D1452 D1437 D1453 D1438 D1454 D1439 D1455 D1440 D1456 D1441 D1457
Slave Device Internal Address to Read/Write
D1355 D1415 D1356 D1416 D1357 D1417 D1358 D1418 D1359 D1419 D1360 D1420 D1361 D1421 D1362 D1422
Indicate if SLAVE ELC exists
M1360 M1361 M1362 M1363 M1364 M1365 M1366 M1367
Action indication flag for master ELC do to slave ELC
M1376 M1377 M1378 M1379 M1380 M1381 M1382 M1383
Read/write error flag
M1392 M1393 M1394 M1395 M1396 M1397 M1398 M1399
Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1408 M1409 M1410 M1411 M1412 M1413 M1414 M1415
Write completed flag (whenever finishing a ELC read/write, this flag will be OFF automatically)
M1424 M1425 M1426 M1427 M1428 M1429 M1430 M1431

SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Reado
ut
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
Factory setting of starting communication address to read is H1064 (D100).
Factory setting of starting communication address to write is H10C8 (D200).
5. Progr ammi ng Concepts

5- 109
Explanation of Special D and special M explanation of ELC LINK ID9ID16 for PC/PA/PH:
MASTER ELC
SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Reado
ut
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D1736

D1751
D1752

D1767
D1768

D1783
D1784

D1799
D1800

D1815
D1816

D1831
D1832

D1847
D1848

D1863
D1864

D1879
D1880

D1895
D1896

D1911
D1912

D1927
D1928

D1943
D1944

D1959
D1960

D1975
D1976

D1991
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
Item
num
D1442 D1458 D1443 D1459 D1444 D1460 D1445 D1461 D1446 D1462 D1447 D1463 D1448 D1464 D1449 D1465
Slave Device Internal Address to Read/Write
D1363 D1423 D1364 D1424 D1365 D1425 D1366 D1426 D1367 D1427 D1368 D1428 D1369 D1429 D1370 D1430
Indicate if SLAVE ELC exists
M1368 M1369 M1370 M1371 M1372 M1373 M1374 M1375
Action indication flag for master ELC do to slave ELC
M1384 M1385 M1386 M1387 M1388 M1389 M1390 M1391
Read/write error flag
M1400 M1401 M1402 M1403 M1404 M1405 M1406 M1407
Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1416 M1417 M1418 M1419 M1420 M1421 M1422 M1423
Write completed flag (whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1432 M1433 M1434 M1435 M1436 M1437 M1438 M1439

SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Reado
ut
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
Factory setting of Communication address for reading is H1064 (D100).
Factory setting of Communication address for writing is H10C8 (D200).
ELC Syst em Manual

5- 110
Special D and special M for ID1 ~ ID8 of the 32 stations in ELC LINK (M1353 = On) for PV:
MASTER ELC
SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
M1353 = On: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of D
registers for storing the read/written data.
D1480 D1496 D1481 D1497 D1482 D1498 D1483 D1499 D1484 D1500 D1485 D1501 D1486 D1502 D1487 D1503
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
D1434 D1450 D1435 D1451 D1436 D1452 D1437 D1453 D1438 D1454 D1439 D1455 D1440 D1456 D1441 D1457
Start Communication Address
D1355 D1415 D1356 D1416 D1357 D1417 D1358 D1418 D1359 D1419 D1360 D1420 D1361 D1421 D1362 D1422
LINK in SLAVE ELC?
M1360 M1361 M1362 M1363 M1364 M1365 M1366 M1367
Action flag for SLAVE ELC from MASTER ELC
M1376 M1377 M1378 M1379 M1380 M1381 M1382 M1383
Read/write error flag
M1392 M1393 M1394 M1395 M1396 M1397 M1398 M1399
Reading completed flag (turns Off whenever read/write a station is completed)
M1408 M1409 M1410 M1411 M1412 M1413 M1414 M1415
Writing completed flag (turns Off whenever read/write a station is completed)
M1424 M1425 M1426 M1427 M1428 M1429 M1430 M1431

SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
Default start communication address D1355 ~ D1362 to be read = H1064 (D100)
Default start communication address D1415 ~ D1422 to be written = H10C8 (D200)
5. Progr ammi ng Concepts

5- 111
Special D and special M for ID9 ~ ID16 of the 32 stations in ELC LINK (M1353 = On) for PV:
MASTER ELC
SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
Out
Write
in
Read
out
Write
in
Read
out
Write
in
M1353 = On: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of D
registers for storing the read/written data.
D1488 D1504 D1489 D1505 D1490 D1506 D1491 D1507 D1492 D1508 D1493 D1509 D1494 D1510 D1495 D1511
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
D1442 D1458 D1443 D1459 D1444 D1460 D1445 D1461 D1446 D1462 D1447 D1463 D1448 D1464 D1449 D1465
Start Communication Address
D1363 D1423 D1364 D1424 D1365 D1425 D1366 D1426 D1367 D1427 D1368 D1428 D1369 D1429 D1370 D1430
LINK in SLAVE ELC?
M1368 M1369 M1370 M1371 M1372 M1373 M1374 M1375
Action flag for SLAVE ELC from MASTER ELC
M1384 M1385 M1386 M1387 M1388 M1389 M1390 M1391
Read/write error flag
M1400 M1401 M1402 M1403 M1404 M1405 M1406 M1407
Reading completed flag (turns Off whenever read/write a station is completed)
M1416 M1417 M1418 M1419 M1420 M1421 M1422 M1423
Writing completed flag (turns Off whenever read/write a station is completed)
M1432 M1433 M1434 M1435 M1436 M1437 M1438 M1439

SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
Default start communication address D1363 ~ D1370 to be read = H1064 (D100)
Default start communication address D1423 ~ D1430 to be written = H10C8 (D200)
ELC Syst em Manual

5- 112
Special D and special M for ID17 ~ ID24 of the 32 stations in ELC LINK (M1353 = On) for PV:
MASTER ELC
SLAVE ID 17 SLAVE ID 18 SLAVE ID 19 SLAVE ID 20 SLAVE ID 21 SLAVE ID 22 SLAVE ID 23 SLAVE ID 24
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
M1353 = On: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of D
registers for storing the read/written data.
D1576 D1592 D1577 D1593 D1578 D1594 D1579 D1595 D1580 D1596 D1581 D1597 D1582 D1598 D1583 D1599
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
D1544 D1560 D1545 D1561 D1546 D1562 D1547 D1563 D1548 D1564 D1549 D1565 D1550 D1566 D1551 D1567
start Communication Address
D1512 D1528 D1513 D1529 D1514 D1530 D1515 D1531 D1516 D1532 D1517 D1533 D1518 D1534 D1519 D1535
LINK in SLAVE ELC?
M1440 M1441 M1442 M1443 M1444 M1445 M1446 M1447
Action flag for SLAVE ELC from MASTER ELC
M1456 M1457 M1458 M1459 M1460 M1461 M1462 M1463
Read/write error flag
M1472 M1473 M1474 M1475 M1476 M1477 M1478 M1479
Reading completed flag (turns Off whenever read/write a station is completed)
M1488 M1489 M1490 M1491 M1492 M1493 M1494 M1495
Writing completed flag (turns Off whenever read/write a station is completed)
M1504 M1505 M1506 M1507 M1508 M1509 M1510 M1511

SLAVE ID 17 SLAVE ID 18 SLAVE ID 29 SLAVE ID 20 SLAVE ID 21 SLAVE ID 22 SLAVE ID 23 SLAVE ID 24
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
Default start communication address D1512 ~ D1519 to be read = H1064 (D100)
Default start communication address D1528 ~ D1535 to be written = H10C8 (D200)

5. Progr ammi ng Concepts

5- 113
Special D and special M for ID25 ~ ID32 of the 32 stations in ELC LINK (M1353 = On) for PV:
MASTER ELC
SLAVE ID 25 SLAVE ID 26 SLAVE ID 27 SLAVE ID 28 SLAVE ID 29 SLAVE ID 30 SLAVE ID 31 SLAVE ID 32
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
M1353 = On: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of D
registers for storing the read/written data.
D1584 D1600 D1585 D1601 D1586 D1602 D1587 D1603 D1588 D1604 D1589 D1605 D1590 D1606 D1591 D1607
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
Numb
er of
data
Numbe
r of
data
Numbe
r of
data
Numbe
r of
data
D1552 D1568 D1553 D1569 D1554 D1570 D1555 D1571 D1556 D1572 D1557 D1573 D1558 D1574 D1559 D1575
Start Communication Address
D1520 D1536 D1521 D1537 D1522 D1538 D1523 D1539 D1524 D1540 D1525 D1541 D1526 D1542 D1527 D1543
LINK in SLAVE ELC?
M1448 M1449 M1450 M1451 M1452 M1453 M1454 M1455
Action flag for SLAVE ELC from MASTER ELC
M1464 M1465 M1466 M1467 M1468 M1469 M1470 M1471
Read/write error flag
M1480 M1481 M1482 M1483 M1484 M1485 M1486 M1487
Reading completed flag (turns Off whenever read/write a station is completed)
M1496 M1497 M1498 M1499 M1500 M1501 M1502 M1503
Writing completed flag (turns Off whenever read/write a station is completed)
M1512 M1513 M1514 M1515 M1516 M1517 M1518 M1519

SLAVE ID 25 SLAVE ID 26 SLAVE ID 27 SLAVE ID 28 SLAVE ID 29 SLAVE ID 30 SLAVE ID 31 SLAVE ID 32
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
Read
out
Write
in
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
D100

D115
D200

D215
Default start communication address D1520 ~ D1527 to be read = H1064 (D100)
Default start communication address D1536 ~ D1543 to be written = H10C8 (D200)

Explanation:
1. The basic communication protocol for ELC LINK is MODBUS
2. All communication format used to connect to ELC should be the same (set D1120 for ELC) and it
supports ASCII and RTU mode.
ELC Syst em Manual

5- 114
3. PC/PA/PH supports 16 devices in the LINK and reading/writing of 16 data. PV supports 32
stations in the LINK and reading/writing of more than 16 data (SET1353) (M1353 = ON).
4. For PC/PA/PH series, it can read/write 16 WORDs (max) from one matser ELC to one slave ELC.
For PVseries, it can read/write 100 WORDs (max) (M1353=ON) from one Master ELC to one
Slave ELC.
5. The maximum slave ELCs for a master ELC to connect is 16 slave ELCs.
6. The ID of slave ELC should be fixed to 1~16 and each slave ID cant be repeated.
7. When the Master ELC is connected through COM2 (RS-485), baud rates and communication
formats of all Slave ELCs must be the same (set in D1120). When PC/PA/PH/PV serves as
Master, it supports ASCII and RTU format.
8. When the Slave ELC is connected through COM2 (RS-232/RS-485/RS-422), baud rates and
communication formats of all connected Slave ELCs must be the same as those in the Master
ELC (set in D1120). When PC/PA/PH/PV serves as Slave, it supports ASCII and RTU format.
9. When the Slave ELC is connected through COM1 (RS-232), baud rates and communication
formats of all connected Slave ELCs must be the same as those in the Master ELC (set in
D1036). When PC/PA/PH/PV serves as Slave, it supports ASCII and RTU format.
10. When the Slave ELC is connected through COM3 (RS-232/RS-485), baud rates and
communication formats of all connected Slave ELCs must be the same as those in the Master
ELC (set in D1109). When PC/PA/PH/PV serves as Slave, it only supports ASCII format (Max.
baud rate = 38,400bps).
11. One to one connection can connect to RS-232 and RS-485 in series
12. One to multiple connection can connect to RS-485 in series
13. The start slave ID can be set by D1399 of master ELC and the ID for each slave and master ELC
(set by D1121) cant repeat.

Operation:
1. Setting the baudrate and communication to be the same as all connected slave peripherals.
COM1_RS-232: D1036, COM2_RS-485: D1120.
2. Setting Master ELC ID by D1121 and setting the start slave ID by D1399 of master ELC first.
Then, setting slave ID by each slave ELC. The ID of master ELC and slave ELC cant repeat.
3. Set up the number of connected Slave stations and the number of data to be read in/written to
Slave stations. For PV (M1353 = ON): Enable the function of the 32 conncected Slaves and
reading/writing of more than 16 data (Max. 100 data). Next, set up the No. of D registers for
storing the read data (D1480 ~ D1495, D1576 ~ D1591) and written data (D1496 ~ D1511,
D1592 ~ D1607) (See the explanations above on special D). PC/PA/PH only supports
reading/writing of 16 data.
5. Progr ammi ng Concepts

5- 115
4. Set device communication address to read/write to slave. (Refer to Special D explanation above
for special D setting. Factory setting of communication address for reading is H1064 (D100) and
writing is H10C8 (D200).
5. Setting to start synchronous read/write function (M1354). It starts when M1354=ON.
6. Setting ELC LINK automatically (M1351)
7. Setting ELC LINK manually (M1352)
8. Start MASTER ELC LINK (M1350)

Master ELC action explanation:
1. When M1354=ON, it will use Modbus Function H17 (synchronous read/write function) for ELC
EASY LINK communication function. If item number for writing is set to 0, ELC will use Modbus
Function H03 (read multiple WORDs) for ELC EASY LINK communication function. In the same
way, if item number for reading is set to 0, ELC will use Modbus Function H06 (write one WORD)
or Modbus Function H10 (write multiple WORDs) for ELC EASY LINK communication function.
2. Slave ID detection: When M1350=ON, Master ELC is started and then detects the number of
active slaves and records the count in D1433.
3. You can see if there is a slave ELC by searching M1360-M1375 and M1440 ~ M1455 which
saved slave ID 1-32. ON = Slave exists.
4. If the detection of active slaves = 0, M1350 will be OFF and stop Link at the same time. ELC will
only detect the number of slaves when M1350 first turns ON.
5. Read/write of master and slave ELC: After finishing detecting slave, master ELC will read/write to
each slave. The slave that master can do read/write is slave ID got after detecting slave ID. Once
slave ELC is added after detecting, master cant do read/write to it till the next detection.
6. Master ELC will read first and the maximum range is 16 slave ELCs start from D100. After
reading, ELC will write and the maximum range is 16 slave ELCs start from D200.
7. Master ELC will read/write to slave ELC in order, i.e. it will read/write to the next slave after
finishing a slave.

Automatic/ Manual model explanation:
1. Automatic mode: if M1351 = ON. Master ELC will read/write to slave till M1350 = OFF.
2. Manual mode: ELC needs to set times of read in D1431. One time means finish all Slave
read/writes. When ELC starts Link, D1432 will start to count times of Link. When D1431 = D1432,
ELC will stop Link and force M1351 = OFF at the same time. If M1351 is forced ON, ELC will start
to link according to D1431 value automatically.

Note:
ELC Syst em Manual

5- 116
1. Automatic mode M1351 and manual mode M1352 cant be ON at the same time.
2. Please clear M1350 first before switching automation/manual mode.
3. For PV: M1350 has to be reset before switching between automatic mode and manual mode. For
PC/PA/PH: No such restriction
4. Communication time-out can be set by D1129. The setting range is from 300 to 3000. When out
of range, it will be regarded as 300 when it is less than 300 and regarded as 3000 when it is
larger than 3000. ELC LINK function is only valid when baud rate is larger than 1200 bps. When
baud rate is less than 9600 bps, please set communication time-out to more than 1 second.
5. It wont communicate when write/read item is 0.
6. It doesnt allow 32-bit counter read/write in

Operation flow chart:
Setting communication address of slave ELC for reading(D1355-D1370)
Setting reading number of slave ELC(D1434-D1449)
Setting communication address of slave ELC for writing(D1450-D1465)
(If there is no setting, it will be regarded as factory setting or previous setting)
Setting writing number of slave ELC
SET M1354 RST M1354
EASY ELC LINK
SET M1351
SET M1352
communication by
Modbus 0X17 functi on
Enable
Disable
Enabl e manual or automation
Enable automation function
Enable manual function
Setting communication
times(D1431)
SET M1350
Start to executing ELC EASY LINK
Disable Enable
Disable 32 slaves linkage and up to
100 data for exchange.
(Reset M1353)
1. Enable 32 slaves linkage and up to
100 data for exchange (set M1353).
2. Set up the register D for storing the
read data.
3. Set up the register D for storing the
written data.
Enabl e 32 slaves
li nkage and up to
100 data for exchange


5. Progr ammi ng Concepts

5- 117
Example 1: ELC EASY LINK uses with M1354

M1002
MOV K17 D1121
H86 D1120
K300
M1350
END
MOV
SET M1120
MOV D1129
M1351
X1
SET M1354


Example 2: Connection of 1 Master and 2 Slaves by RS-485 and exchange of 16 data between
Master and Slaves through EASY ELC LINK (M1353 = Off, linkage of 16 stations, 16 data
read/write mode)
1. Write the ladder diagram program into Master ELC (ID#17)

M1002
MOV K17 D1121
H86 D1120
K16
K16
M1351
END
MOV
SET M1120
MOV
MOV
D1434
D1450
M1350
X1
K16
K16
MOV
MOV
D1435
D1451
Master ID#
COM2 communication protocol
Retain communication protocol
Number of data read from Slave ID#1
Number of data written into Slave ID#1
Number of data read from Slave ID#2
Number of data written into Slave ID#2
Auto mode
Enable EASY ELC LINK


ELC Syst em Manual

5- 118
2. When X1 = On, the data exchange between Master and the two Slaves will be automatically done
in EASY ELC LINK, i.e. the data in D100 ~ D115 in the two Slaves will be read into D1480 ~
D1495 and D1512 ~ D1527 of the Master, and the data in D1496 ~ D1511 and D1528 ~ D1543
will be written into D200 ~ D215 of the two Slaves.
Master ELC *1 Slave ELC*2
D1480 ~ D1495 D100 ~ D115 of Slave ID#1
D1496 ~ D1511 D200 ~ D215 of Slave ID#1
D1512 ~ D1527 D100 ~ D115 of Slave ID#2
D1528 ~ D1543









D200 ~ D215 of Slave ID#2

3. Assume the data in D for data exchange between Master and Slave before EASY ELC LINK is
enabled (M1350 = Off) are as the follow:
Master ELC Preset value Slave ELC Preset value
D1480 ~ D1495 K0 D100 ~ D115 of Slave ID#1 K5,000
D1496 ~ D1511 K1,000 D200 ~ D215 of Slave ID#1 K0
D1512 ~ D1527 K0 D100 ~ D115 of Slave ID#2 K6,000
D1528 ~ D1543 K2,000 D200 ~ D215 of Slave ID#2 K0

After EASY ELC LINK is enabled (M1350 = On), the data in D for data exchange will become:
Master ELC Preset value Slave ELC Preset value
D1480 ~ D1495 K5,000 D100 ~ D115 of Slave ID#1 K5,000
D1496 ~ D1511 K1,000 D200 ~ D215 of Slave ID#1 K1,000
D1512 ~ D1527 K6,000 D100 ~ D115 of Slave ID#2 K6,000
D1528 ~ D1543 K2,000 D200 ~ D215 of Slave ID#2 K2,000
4. The Master ELC has to be PC/PA/PH/PV series, and the Slave ELC can be any of ELC series.
5. There can be maximum 16 Slave ELCs in EASY ELC LINK. See the special Ds in the Master
ELC corresponding to D100 ~ D115 and D200 ~ D215 in every Slave ELC in the tables of special
M and special D.
Write
Read
Read
Write
5. Progr ammi ng Concepts

5- 119
Communication addresses of devices in ELC:
Applicable to
Device Range Type Address
PB PC/PA/PH PV
S 000 ~ 255 bit 0000 ~ 00FF 0 ~ 127
S 246 ~ 511 bit 0100 ~ 01FF
S 512 ~ 767 bit 0200 ~ 02FF
S 768 ~ 1,023 bit 0300 ~ 03FF
-
0 ~ 1,023 0 ~ 1,023
X 000 ~ 377 (Octal) bit 0400 ~ 04FF 0 ~ 177 0 ~ 177 0 ~ 377
Y 000 ~ 377 (Octal) bit 0500 ~ 05FF 0 ~ 177 0 ~ 177 0 ~ 377
T 000 ~ 255 bit/word 0600 ~ 06FF 0 ~ 127 0 ~ 255 0 ~ 255
M 000 ~ 255 bit 0800 ~ 08FF
M 256 ~ 511 bit 0900 ~ 09FF
M 512 ~ 767 bit 0A00 ~ 0AFF
M 768 ~ 1,023 bit 0B00 ~ 0BFF
M 1,024 ~ 1,279 bit 0C00 ~ 0CFF
0 ~ 1,279
M 1,280 ~ 1,535 bit 0D00 ~ 0DFF
M 1,536 ~ 1,791 bit B000 ~ B0FF
M 1,792 ~ 2,047 bit B100 ~ B1FF
M 2,048 ~ 2,303 bit B200 ~ B2FF
M 2,304 ~ 2,559 bit B300 ~ B3FF
M 2,560 ~ 2,815 bit B400 ~ B4FF
M 2,816 ~ 3,071 bit B500 ~ B5FF
M 3,072 ~ 3,327 bit B600 ~ B6FF
M 3,328 ~ 3,583 bit B700 ~ B7FF
M 3,584 ~ 3,839 bit B800 ~ B8FF
M 3,840 ~ 4,095 bit B900 ~ B9FF
-
0 ~ 4,095 0 ~ 4,095
0 ~ 199 16-bit bit/word 0E00 ~ 0EC7 0 ~ 127 0 ~ 199 0 ~ 199
bit 0EC8 ~ 0EFF C
200 ~ 255 32-bit
word 0700 ~ 076F
232 ~ 255 200 ~ 255 200 ~ 255
D 000 ~ 256 word 1000 ~ 10FF
D 256 ~ 511 word 1100 ~ 11FF
D 512 ~ 767 word 1200 ~ 12FF
D 768 ~ 1,023 word 1300 ~ 13FF
D 1,024 ~ 1,279 word 1400 ~ 14FF
D 1,280 ~ 1,535 word 1500 ~ 15FF
0 ~ 1,311
D 1,536 ~ 1,791 word 1600 ~ 16FF
D 1,792 ~ 2,047 word 1700 ~ 17FF
D 2,048 ~ 2,303 word 1800 ~ 18FF
D 2,304 ~ 2,559 word 1900 ~ 19FF
-
0 ~ 2,559 0 ~ 2,559
ELC Syst em Manual

5- 120
Applicable to
Device Range Type Address
PB PC/PA/PH PV
D 2,560 ~ 2 815 word 1A00 ~ 1AFF
D 2,816 ~ 3,071 word 1B00 ~ 1BFF
D 3,072 ~ 3,327 word 1C00 ~ 1CFF
D 3,328 ~ 3,583 word 1D00 ~ 1DFF
D 3,584 ~ 3,839 word 1E00 ~ 1EFF
D 3,840 ~ 4,095 word 1F00 ~ 1FFF
D 4,096 ~ 4,351 word 9000 ~ 90FF
D 4,352 ~ 4,607 word 9100 ~ 91FF
D 4 608 ~ 4863 word 9200 ~ 92FF
D 4,864 ~ 5,119 word 9300 ~ 93FF
2.560 ~
4,999
D 5,120 ~ 5,375 word 9400 ~ 94FF
D 5,376 ~ 5,631 word 9500 ~ 95FF
D 5,632 ~ 5,887 word 9600 ~ 96FF
D 5,888 ~ 6,143 word 9700 ~ 97FF
D 6,144 ~ 6,399 word 9800 ~ 98FF
D 6,400 ~ 6,655 word 9900 ~ 99FF
D 6,656 ~ 6,911 word 9A00 ~ 9AFF
D 6,912 ~ 7,167 word 9B00 ~ 9BFF
D 7,168 ~ 7,423 word 9C00 ~ 9CFF
D 7,424 ~ 7,679 word 9D00 ~ 9DFF
D 7,680 ~ 7,935 word 9E00 ~ 9EFF
D 7,936 ~ 8,191 word 9F00 ~ 9FFF
D 8,192 ~ 8,447 word A000 ~ A0FF
D 8,448 ~ 8,703 word A100 ~ A1FF
D 8,704 ~ 8,959 word A200 ~ A2FF
D 8,960 ~ 9,215 word A300 ~ A3FF
D 9,216 ~ 9,471 word A400 ~ A4FF
D 9,472 ~ 9,727 word A500 ~ A5FF
D 9,728 ~ 9,983 word A600 ~ A6FF
D 9,984 ~ 9,999 word A700 ~ A70F
-
-
2,560 ~
9,999

Function Group COM Port Function
Number M1120, M1138, M1139, M1143, D1036, D1120
Contents:
The additional COM ports (COM1: RS-232, COM2: RS-485) for PB/PC/PA/PH support communication
format of MODBUS ASCII/RTU. The speed can up to 115200 bps. COM1 and COM2 can be used
simultaneously.

5. Progr ammi ng Concepts

5- 121
COM1:
It can only be used as slave and supports ASCII/RTU communication format, baudrate(115200bps
max), and modify the length of data bit, including Data bits, Parity bits and Stop bits.
COM2:
It can be used as master or slave and supports ASCII/RTU communication format, baudrate
(115200bps max), and modify the length of data bit, including Data bits, Parity bits and Stop bits.
Format setting:
Port
Item
COM1 COM2
Communication format D1036 D1120
Communication setting holding M1138 M1120
ASCII/RTU mode M1139 M1143
D1036:
RS-232 communication protocol of slave ELC. (b8-b15 is not used)
D1120:
RS-485 communication protocol of master/slave ELC. Refer table below for setting:
Content
b0 Data Length 0: 7 data bits, 1: 8 data bits
00: None
01: Odd
b1
b2
Parity bit
11: Even
b3 Stop bits 0: 1 bit, 1: 2bits
0001(H1): 110
0010(H2): 150
0011(H3): 300
0100(H4): 600
0101(H5): 1200
0110(H6): 2400
0111(H7): 4800
1000(H8): 9600
1001(H9): 19200
1010(HA): 38400
1011(HB): 57600
b4
b5
b6
b7
Baud rate
1100(HC): 115200
b8 Start word selection None D1124
b9 First end word selection None D1125
b10 Second end word selection None D1126
b11~b15 No definition
ELC Syst em Manual

5- 122
Example 1: modification method for COM2 communication format
1. When modifying COM2 communication format, it needs to add program code below in the front of
program. When ELC is from STOP to RUN, it will detect if M1120 is ON at ELC first scan time. If
M1120 is ON, it will change COM2 setting by D1120.
2. Modifying COM2 communication format to ASCII mode, 9600bps, 7 data bits, even parity, 1 stop
bits (9600, 7, E, 1).
MOV H86 D1120
SET M1120
M1002


Note:
1. Do NOT write any communication command in the program when COM2 is used as slave.
2. After modifying communication format, communication format setting wont be changed when
ELC is from RUN to STOP.
3. After modifying communication format, communication format will be changed to factory setting
after power OFF and power ON again.

Example 2: modification method for COM1 communication format
1. When modifying COM1 communication format, it needs to add program code below in the front of
program. When ELC is from STOP to RUN, it will detect if M1138 is ON at ELC first scan time. If
M1138 is ON, it will change COM1 setting by D1036.
2. Modifying COM1 communication format to ASCII mode, 9600bps, 7 data bits, even parity, 1 stop
bits (9600, 7, E, 1).
MOV H86 D1036
SET M1138
M1002

Note:
1. After modifying communication format, communication format setting wont be changed when
ELC is from RUN to STOP.
2. After modifying communication format, communication format will be changed to factory setting
after power OFF and power ON again.
5. Progr ammi ng Concepts

5- 123
Example 3: RTU mode setting of COM1 and COM2
1. Both of COM1 and COM2 support ASCII/RTU mode. COM1 is used to set flag by M1139 and
COM2 is used to set flag by M1143. When flag is ON, it is RTU mode. When flag is OFF, it is
ASCII mode.
2. Modifying COM1/COM2 communication format to RTU mode, 9600bps, 8 data bits, even parity, 1
stop bits (9600, 8, E, 1).

COM1:
MOV D1036
SET M1138
M1002
SET M1139
H87


COM2:
MOV H87 D1120
SET M1120
M1002
SET M1143


3. COM2 of PV series supports the generation of interruption I170 when the data receiving is
completed in Slave mode.
ELC Syst em Manual

5- 124
5.18 Fault Code Information
If the ELC ERROR LED is flashing or special relay M1004=ON after writing program in ELC, the
problem may be an invalid operand or grammar error. You can get the fault code saved in special
register D1004 and check it to the following table to get error message, error address is saved in
D1137. (D1137 will be invalid if it is general loop error)

Fault Code Description Action
0001 Operand bit device S exceeds the valid range
0002 Label P exceeds the valid range or duplicated
0003 Operand KnSm exceeds the valid range
0102 Interrupt pointer I exceeds the valid range or duplicated
0202 Instruction MC exceeds the valid range
0302 Instruction MCR exceeds the valid range
0401 Operand bit device X exceeds the valid range
0403 Operand KnXm exceeds the valid range
0501 Operand bit device Y exceeds the valid range
0503 Operand KnYm exceeds the valid range
0601 Operand bit device T exceeds the valid range
0604 Operand word device T register exceeds limit
0801 Operand bit device M exceeds the valid range
0803 Operand KnMm exceeds the valid range
0B01 Operand K, H available range error
0D01 DECO operand misuse
0D02 ENCO operand misuse
0D03 DHSCS operand misuse
0D04 DHSCR operand misuse
0D05 PLSY operand misuse
0D06 PWM operand misuse
0D07 FROM/TO operand misuse
0D08 PID operand misuse
0D09 SPD operand misuse
0D0A DHSZ operand error
0D0B IST operand misuse
0E01 Operand bit device C exceeds the valid range
0E04 Operand word device C register exceeds limit
0E05 DCNT operand CXXX misuse
0E18 BCD conversion error
Check the D1137
(Error step number)

Re-enter the instruction
correctly
5. Progr ammi ng Concepts

5- 125
Fault Code Description Action
0E19 Division error (divisor=0)
0E1A
Device use is out of range
(including index registers E, F)
0E1B Negative number after radical expression
0E1C FROM/TO communication error
0F04 Operand word device D register exceeds limit
0F05 DCNT operand DXXX misuse
0F06 SFTR operand misuse
0F07 SFTL operand misuse
0F08 REF operand misuse
0F09 Improper use of operands of WSFR, WSFL instructions
0F0A
Times of using TTMR, STMR instruction exceed the
range
0F0B Times of using SORT instruction exceed the range
0F0C Times of using TKY instruction exceed the range
0F0D Times of using HKY instruction exceed the range
1000 ZRST operand misuse
10EF E and F misuse operand or exceed the usage range
2000 Usage exceed limit (MTR, ARWS, TTMR, PR, HOUR)
Check the D1137
(Error step number)

Re-enter the instruction
correctly

Fault Code Description Action
C400 An unrecognized instruction code is being used
C401 Loop error
C402 LD / LDI continuously use more than 9 times
C403 MPS continuously use more than 9 times
C404 FOR-NEXT exceeds 6 levels
C405
STL/RET used between FOR-NEXT
SRET/IRET used between FOR-NEXT
MC/MCR used between FOR-NEXT
END / FEND used between FOR-NEXT
C407 STL continuously use more than 9 times
C408 Use instruction MC/MCR in STL, Use I/P in STL
C409 Use STL/RET in subroutine or interrupt program
C40A
Use MC/MCR in subroutine
Use MC/MCR in interrupt program
A circuit error occurs if a
combination of instructions
is incorrect or badly
specified.

Select programming mode
and correct the identified
error

ELC Syst em Manual

5- 126
Fault Code Description Action
C40B MC/MCR doesnt start from N0 or discontinuously
C40C MC/MCR corresponding value N is different
C40D Use I/P incorrectly
C40E
IRET doesnt follow by the last FEND instruction
SRET doesnt follow by the last FEND instruction
C40F
ELC program and data in parameters have not been
initialized
C41B Invalid RUN/STOP instruction to extension module
C41C
The number of input/output points of I/O extension unit
exceeds valid range
C41D Number of extension modules exceeds the range
C41F Failing to write data into memory
C430 Initializing parallel interface error
C440 Hardware error in high-speed counter
C441 Hardware error in high-speed comparator
C442 Hardware error in MCU pulse output
C443 No response from extension unit
C4EE No END instruction in program
C4FF Invalid instruction (no such instruction existing)
A circuit error occurs if a
combination of instructions
is incorrect or badly
specified.

Select programming mode
and correct the identified
error



6- 1
Instruction Set
This chapter contains all of the instructions that are used with the ELC controllers.
Detailed information concerning the usage of the instructions.

This Chapter Contains

6.1 Basic Instruction Explanations............................................................................................... 6-2
6.2 Pointers ................................................................................................................................... 6-10
6.3 Interrupt Pointers ................................................................................................................... 6-11
6.4 Basic Instructions (without API numbers) ........................................................................... 6-13
6.5 Application Programming Instructions................................................................................ 6-14
6.6 Numerical List of Instructions............................................................................................... 6-25
6.7 Detailed Instruction Explanation........................................................................................... 6-34
ELC Syst em Manual

6- 2
6 Instruction Set
6.1 Basic Instruction Explanations
Mnemonic Operands Function Program steps
LD X, Y, M, S, T, C Load A contact 1
Controllers
PB PC PA PH PV
Explanations:
The LD command is used on the A contact that has its start from the left BUS or the A contact that is the
start of a new block of program when using the ORB and ANB instructions (see later sections).
Program Example:
Ladder diagram:
X0 X1
Y1

Command code: Operation:
LD X0 ; Load contact A of X0
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps
LDI X, Y, M, S, T, C Load B contact 1
Controllers
PB PC PA PH PV
Explanations:
The LDI command is used on the B contact that has its start from the left BUS or the B contact that is the
start of a new block of program when using the ORB and ANB instructions (see later sections).
Program Example:
Ladder diagram:
X0 X1
Y1

Command code: Operation:
LDI X0 ; Load contact B of X0
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps
AND X, Y, M, S, T, C
Series connection- A
contact
1
Controllers
PB PC PA PH PV
Explanations:
The AND command is used in the series connection of A contact.
Program Example:
6. I nst ruct i on Set

6- 3
Ladder diagram:
X0 X1
Y1

Command code: Operation:
LDI X1 ; Load contact B of X1
AND X0 ; Connect to contact A of X0 in series
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps
ANI X, Y, M, S, T, C
Series connection- B
contact
1
Controllers
PB PC PA PH PV
Explanations:
The ANI command is used in the series connection of B contact.
Program Example:
Ladder diagram:
X0 X1
Y1

Command code: Operation:
LD X1 ; Load contact A of X1
ANI X0 ; Connect to contact B of X0 in series
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps
OR X, Y, M, S, T, C
Parallel connection-
A contact
1
Controllers
PB PC PA PH PV
Explanations:
The OR command is used in the parallel connection of A contact.
Program Example:
Ladder diagram:
X0
X1
Y1

Command code: Operation:
LD X0 ; Load contact A of X0
OR X1 ; Connect to contact A of X1 in parallel
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps
ORI X, Y, M, S, T, C
Parallel connection-
B contact
1
Controllers
PB PC PA PH PV
Explanations:
The ORI command is used in the parallel connection of B contact.
ELC Syst em Manual

6- 4
Program Example:
Ladder diagram:
X0
X1
Y1

Command code: Operation:
LD X0 ; Load contact A of X0
ORI X1 ; Connect to contact B of X1 in parallel
OUT Y1 ; Drive Y1 coil

Mnemonic Function Program steps
ANB Series connection (Multiple Circuits) 1
Controllers
PB PC PA PH PV
Explanations:
To perform the AND calculation between the previous reserved logic results and contents of the
accumulative register.
Program Example:
Ladder diagram:
X0
X2
Y1
X1
X3
ANB
Block A Block B
Command code: Operation:
LD X0 ; Load contact A of X0
ORI X2 ; Connect to contact B of X2 in parallel
LDI X1 ; Load contact B of X1
OR X3 ; Connect to contact A of X3 in parallel
ANB ; Connect circuit block in series
OUT Y1 ; Drive Y1 coil

Mnemonic Function Program steps
ORB Parallel connection (Multiple circuits) 1
Controllers
PB PC PA PH PV
Explanations:
To perform the OR calculation between the previous reserved logic results and contents of the
accumulative register.
Program Example:
Ladder diagram:
X0
X2
Y1
X1
X3
ORB
Block A
Block B

Command code: Operation:
LD X0 ; Load contact A of X0
ANI X1 ; Connect to contact B of X1 in series
LDI X2 ; Load contact B of X2
AND X3 ; Connect to contact A of X3 in series
ORB ; Connect circuit block in parallel
OUT Y1 ; Drive Y1 coil
6. I nst ruct i on Set

6- 5
Mnemonic Function Program steps
MPS
Store the current result of the internal
ELC operations
1
Controllers
PB PC PA PH PV
Explanations:
MPS stores the connection point of the ladder circuit so that further coil branches can recall the value
later.

Mnemonic Function Program steps
MRD
Reads the current result of the internal
ELC operations
1
Controllers
PB PC PA PH PV
Explanations:
MRD recalls or reads the previously stored connection point data and forces the next contact to connect
to it.

Mnemonic Function Program steps
MPP
Pops (recalls and removes) the currently
stored result
1
Controllers
PB PC PA PH PV
Explanations:
MPP pops (recalls and removes) the stored connection point. First, it connects the next contact, then it
removes the point from the temporary storage area.
Basic points to remember:
1. Use these instructions to connect output coils to the left hand side of a contact. Without these
instructions connections can only be made to the right hand side of the last contact.
2. For every MPS instruction there MUST be a corresponding MPP instruction.
3. The last contact or coil circuit must connect to an MPP instruction.
4. At any programming step, the number of active MPS-MPP pairs must be no greater than 8.
ELC Syst em Manual

6- 6
Program Example:
Ladder diagram:
X0
Y1
X1
M0
X2
Y2
END
MPP
MRD
MPS

Command code: Operation:
LD X0 ; Load contact A of X0
MPS ; Save to stack
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil
MRD ; Read from stack
AND X2 ; Connect to contact A of X2 in series
OUT M0 ; Drive M0 coil
MPP ; Read from stack and pop pointer
OUT Y2 ; Drive Y2 coil
END ; Program end
MPS, MRD and MPP usage:
1. When writing a program in ladder format, programming tools automatically add all MPS, MRD and
MPP instructions at the program conversion stage. If the generated instruction program is
viewed, the MPS, MRD and MPP instructions are present.
2. When writing a program in instruction format, it is entirely down to the user to enter all relevant
MPS, MRD and MPP instructions as required.

Mnemonic Operands Function Program steps
OUT Y, M, S Output coil 1
Controllers
PB PC PA PH PV
Explanations:
Output the logic calculation result before the OUT command to specific device.
Motion of coil contact
OUT command
Contact
Operation
result
Coil
A contactnormal open B contactnormal close
FALSE OFF Non-continuity Continuity
TRUE ON Continuity Non-continuity
Program Example:
Ladder diagram:
X0 X1
Y1

Command code: Operation:
LDI X0 ; Load contact B of X0
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil
6. I nst ruct i on Set

6- 7
Mnemonic Operands Function Program steps
SET Y, M, S LatchON 1
Controllers
PB PC PA PH PV
Explanations:
When the SET command is driven, its specific device is set to be ON, which will keep ON whether
the SET command is still driven. You can use the RST command to set the device to OFF.
Program Example:
Ladder Diagram:
X0 Y0
Y1 SET

Command Code: Operation:
LD X0 ; Load contact A of X0
ANI Y0 ; Connect to contact B of Y0 in series
SET Y1 ; Y1 latch (ON)

Mnemonic Operands Function Program steps
RST Y, M, S, T, C, D, E, F
Clear the contact
or the register
1
Controllers
PB PC PA PH PV
Explanations:
When the RST command is driven, motion of its specific device is as follows:
Device Status
S, Y, M Coil and contact will be set to OFF.
T, C Present values and contacts of the timer or counter will be cleared.
D, E, F The content value will be set to 0.
If the RST command is not executed, status of specific device will not be changed.
Program Example:
Ladder diagram:
X0
Y5 RST

Command Code: Operation:
LD X0 ; Load contact A of X0
RST Y5 Clear contact Y5

Mnemonic Operands Function Program steps
MC/MCR N0~N7 Master control Start/Reset 1
Controllers
PB PC PA PH PV
Explanations:
MC is the main-control start command. When the MC command is executed, the execution of
instructions between MC and MCR will not be interrupted. When MC command is OFF, the motion of the
instructions that between MC and MCR is described as follows:
ELC Syst em Manual

6- 8
General Timer
The timer value is set back to zero, the coil and the contact are
both turned OFF
Timers for Subroutines and
Interrupts
The timer value is set back to zero, the coil and the contact are
both turned OFF
Accumulative timer The timer value and the contact stay at their present condition
Counter The counting value and the contact stay at their present condition
OUT All turned OFF
SET/RST Stay at present condition
Application instructions All of them are not acted
1. MCR is the main-control ending command that is placed at the end of the main-control program.
2. An instruction of the MC-MCR main-control program supports the nest program structure, with 8
layers as its greatest. Please use the instructions in order from N0~ N7, and refer to the following:
Program Example:
Ladder Diagram:
X0
Y0
MC N0
X1
X2
Y1
MC N1
X3
MCR N1
MCR N0
X20
MC N0
Y20
X21
MCR N0

Command Code Operation:
LD X0
MC N0
; The control loop N0 active when X0 is
; ON
LD X1 ; Load A contact of X1
OUT Y0 ; Drive Y0 coil
:
LD X2
MC N1
; The control loop N1 active when X2 is
; ON
LD X3 ; Load A contact of X3
OUT Y1 ; Drive Y1 coil
:
MCR N1 ; The control loop N1 is end
:
MCR N0 ; The control loop N0 is end
:
LD X20
MC N0
; The control loop N0 active when X20 is
; ON
LD X21 ; Load A contact of X21
OUT Y20 ; Drive Y20 coil
:
MCR N0 ; The control loop N0 is end
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6- 9
Mnemonic Function Program steps
END Program End 1
Controllers
PB PC PA PH PV
Explanations:
It needs to add the END command at the end of ladder diagram program or command program. ELC
will scan from address o to END command, after executing it will return to address 0 to scan again.

Mnemonic Function Program steps
NOP No operation 1
Controllers
PB PC PA PH PV
Explanation:
This is a no-operation command and has no effect on the previous operation. NOP is used in the
following cases: To delete a command without changing the number of steps. (Overwrite with NOP)
Program Example:
Ladder Diagram:
X0
Y1 NOP
Command NOP will be omitted
when ladder diagram displays.

Command Code: Operation:
LD X0 ; Load A contact of X0
NOP ; No operation
OUT Y1 ; Drive Y1 coil
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6- 10
6.2 Pointers
Mnemonic Function Program steps
P Pointer (P0~P255) 1
Controllers
PB PC PA PH PV
Explanation:
Pointers are used with the jump commands (CJ, CALL) in two different ways as follows. But a number
cannot be used repeatedly.
Program Example 1:
Ladder Diagram:
Y1
X1
P10
X0
CJ P10

Command Code: Operation:
LD X0 ; Load A contact of X0
CJ P10 ; Jump from command CJ to P10
: ;
P10 ; Pointer P10
LD X1 ; Load A contact of X1
OUT Y1 ; Drive Y1 coil
Program Example 2:
Ladder Diagram:
FEND
CALL P9
P9
M1013
Y20
SRET
X0

Command Code: Operation:
LD X0 ; Call the Subroutine P9 when X0 is ON
CALL P9
:
FEND
P9
LD M1013
OUT Y20
:
SRET
Available devices:
1. PB has 64 pointers; available from the range of P0 to P63.
2. PC, PA, PH and PV have 256 pointers; available from the range of P0~P255.

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6.3 Interrupt Pointers
Mnemonic Function Program steps
I Interrupt program marker 1
Controllers
PB PC PA PH PV
Explanations:
Interrupt programs should begin with interrupt pointer Iand ends with application command to be as
interrupt end and return. Special numbering system based on interrupts device used and input
triggering method.
Additional applied instructions:
It must use with application commands API 03 IRET, API 04 EI, API 05 DI.
Program Example:
Ladder Diagram:
Y1
EI
X1
I 001
DI
FEND
Y2
X2
IRET
Range for inserting
program interrupt
Program interrupt insert
into subroutine
Interrupt
Service
program
pointer
Command Code: Operation:
EI ; Interrupt Enable
LD X1 ; Load A contact of X1
OUT Y1 ; Drive Y1 coil
:
DI ; Interrupt Disable
:
FEND ; Program end
I001 ; Insert interrupt point
LD X2 ; Load A contact of X2
OUT Y2 ; Drive Y2 coil
:
IRET ; Interrupt return

Input Interrupts:
1. PB has 4 input interrupts: (I001, X0), (I101, X1), (I201, X2) and (I301, X3).
2. PC, PA and PH have 6 input interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3), (I401, X4)
and (I501, X5).
3. In PC/PA V1.2 and above, when I401 (X4) works with X0 (C235, C251 or C253), the value of
(C243 or C255) will be stored in (D1180, D1181) and I501 (X5) works with X1 (C236), the value of
high-speed counter (C236) will be stored in (D1198, D1199)
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6- 12
4. In PH V1.2 and above, when I401 (X4) works with X10 (C243 or C255), the value of high-speed
counter (C243 or C255) will be stored in (D1180, D1181) and I501 (X5) works with X11 (C245),
the value of high-speed counter (C243 or C255) will be stored in (D1198, D1199).
5. PV has 6 input interrupts: I000/I001(X0), I100/I101(X1), I200/I201(X2), I300/I301(X3),
I400/I401(X4), I500/I501(X5), 6 points (01, rising-edge trigger , 00, falling-edge trigger )
Timer Interrupts:
1. PB has 1 timer interrupt point: I610~I699 (time base = 1ms)
2. PC, PA and PH have 2 timer interrupts: I601~I699, I701/I799. (time base = 1ms)
3. PV have 3 timer interrupts: I601~I699, I701/I799, (time base = 1ms); I801/I899, (time base =
0.1ms)
Communication Interrupts:
1. PB/PC/PA/PH has 1 communication interrupt: I150
2. PV has 3 communication interrupt: I150, I160, I170
Counter Interrupts:
1. PC/PA/PH have six high-speed counter attained interrupt points:
I010 (use with C235, C241, C244, C246, C247, C249, C251, C252, C254)
I020 (use with C236, C243, C246, C247, C249, C251, C252, C254)
I030 (use with C237, C242)
I040 (use with C238, C245)
I050 (use with C239)
I060 (use with C240, C250)
2. PV have six high-speed counter attained interrupt points: I010, I020, I030, I040, I050, I060
Pulse interruption
PV has four pulse interruption points: I110, I120, I130, and I140.

Please see the following pages for more details on the interrupt functions.
Input interrupts see page 6-41
Timer interrupts see page 6-41
Communication interrupt see page 6-41
Counter interrupts see page 6-41
Pulse interruption see page 6-41
Enabling interrupts, API 04 EI see page 6-40
Disabling interrupts, API 05 DI see page 6-40
Interrupt return, API 03 IRET see page 6-40
6. I nst ruct i on Set

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6.4 Basic Instructions (without API numbers)
Execution speed (us)
Command
Code
Function Operands
PB PC/PA/PH PV
STEPS
LD Load contact A X, Y, M, S, T, C 3.8 3.8 0.24(0.56) 1~3
LDI Load contact B X, Y, M, S, T, C 3.88 3.88 0.24(0.56) 1~3
AND Series connection with A contact X, Y, M, S, T, C 2.32 2.32 0.24(0.56) 1~3
ANI Series connection with B contact X, Y, M, S, T, C 2.4 2.4 0.24(0.56) 1~3
OR Parallel connection with A contact X, Y, M, S, T, C 2.32 2.32 0.24(0.56) 1~3
ORI Parallel connection with B contact X, Y, M, S, T, C 2.4 2.4 0.24(0.56) 1~3
ANB Series connects the circuit block None 1.76 1.76 0.24 1~3
ORB Parallel connects the circuit block None 1.76 1.76 0.24 1~3
MPS Save the operation result None 1.68 1.68 0.24 1~3
MRD
Read the operation result (the
pointer not moving)
None 1.6 1.6 0.24 1
MPP Read the result None 1.6 1.6 0.24 1
OUT Drive coil Y, S, M 5.04 5.04 0.24(0.56) 1~3
SET Action latched (ON) Y, S, M 3.8 3.8 0.24(0.56) 1~3
RST Clear the contacts or the registers
Y, M, S, T, C, D,
E, F
7.8 7.8 0.24(0.56) 3
MC
Connect the common series
connection contacts
N0~N7 5.6 5.6 5.6 3
MCR
Disconnect the common series
connection contacts
N0~N7 5.7 5.7 5.7 3
END Program end None 5 5 0.24 1
NOP No function None 0.88 0.88 0.16 1
STL
Step transition ladder start
command
S 11.6 10.6 0.56 1
RET
Step transition ladder return
command
None 7.04 6.04 0.24 1
For PV series, the execution speed in the brackets ( ) refers to the execution speed of designated
operand M1536 ~ M4095.
ELC Syst em Manual

6- 14
6.5 Application Programming Instructions
1. ELC instructions are provided a unique mnemonic name to make it easy to remember instructions.
Most instructions are also given a number so the ELC knows how to execute the instruction. In
the example below the numerical value given to the instruction is 00, also called the API
(Application Programming Instruction). The mnemonic name is CJ and the description is
Conditional Jump.

API Mnemonic Operands Function
00

CJ P

Conditional Jump
Controllers
PB PC PA PH PV

OP Range Program Steps

P0~P255 CJ, CJP: 3 steps
2. The table will be found at the beginning of each new instruction description. The area identified
as Operands will list the various devices (operands) that can be used with the instruction.
Various identification letters will be used to associate each operand with its function, i.e.
D-destination, S-source, n, m-number of elements. Additional numeric suffixes will be attached if
there are more than one operand with the same function.
3. When using ELCSoft to create the application is not necessary to remember the API number of an
instruction since ELCSoft uses drop down lists to select an instruction or there is a button on the
toolbar for the instruction.
4. When using the ELC-HHP it is important to have a API list since the ELC-HHP uses the API to
insert instructions into the application.
5. Not all instructions and conditions apply to all ELCs models. Applicable controllers are identified
by the boxes in the bottom right hand corner of the table. For more detailed instruction variations
a second indicator box is used to identify the availability of pulse, single (16 bit) word and double
(32 bit (double) word format.
PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
6. No modification of the instruction mnemonic is required for 16 bit operation. However, pulse
operation requires a P to be added directly after the mnemonic while 32 bit operation requires a
D to be added before the mnemonic. This means that if an instruction was being used with both
pulse and 32 bit operation it would look lineD***P where *** was the basic mnemonic.
6. I nst ruct i on Set

6- 15
Instruction Composition
Instructions consist of either just the instruction or the instruction followed by operand parameters
command
operand
X0
K10 D10 MOV

Command : Indicates the executive functions of the instruction
Operand : Indicates the device that calculates the operand

Source operand: if there is more than 1 source operand, then we use S
1
, S
2
to display.
Destination operand: if there is more than one operand, then we use D
1
, D
2
. to display.
If the operand may only be represented as a constant K, H or register then we will use m, m
1
, m
2
, n,
n
1
, n
2
to display.

The Length of Operand (16-bit or 32-bit instruction)
The length of operand can be divided into two groups: 16-bit and 32-bit to process different length data.
A D before a instruction separates 32-bit from 16-bit instructions.
16-bit MOV instruction
X0
K10 D10 MOV

When X0=ON, K10 has been sent to D10.
32-bit DMOV instruction
X1
D10 D20 DMOV

When X1=ON, Data of (D11, D10) have been sent to
(D21, D20)
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6- 16
Explanation of the format of application programming instruction
1 2 3 4 5
7
8
API
10 P CMP
Mnemonic Operands Functi on
Compa re
Controll ers
PB PA PV
Program Ste ps
CMP, CMPP: 7 st eps
DCMP, DCMPP: 13steps
Bit Devi ce s Word Devi ces
X Y M S K H KnX KnY KnM KnS T D C E F
Type
OP
D
* * * * *
* * * * *
* * *
* *
* *
ES PC PA PH PV PB PC PA PH PV PC PA PV PH
PULSE 16-bit 32-bit
D S1 S2 D
PH PC
S1
S 2
* * * *
* * * *
PB PB
6
{

API number for instruction

The core mnemonic code of instruction
A D in this box means the instruction can be a 32 bit instruction if a D is added as a prefix
A P in this box indicates the instruction can be used as a pulse instruction

The operand format of the instruction

The description of the instruction

Applicable ELC models the instruction can be used with

A symbol * is the device can use the index register
A symbol * is given to device which can be used for this operand

Instruction memory steps

16-bit instruction format, the name of continuous execution instruction and pulse instruction
32-bit instruction format, the name of continuous execution instruction and pulse instruction
Note: it supports index E and F for those cells with shadow in above table. For example, device D of
operand S1 supports index E and F.
6. I nst ruct i on Set

6- 17
Continuous execution vs. Pulse execution
1. The execution type of instructions can be divided into two types: continuous execution instruction
and pulse execution instruction. Execution time is shorter when instructions are not executed.
Using the pulse execution instruction will reduce the scan time of the program.
2. The pulse function allows the associated instruction to be activated on the rising edge of the
control input. The instruction is driven ON for the duration of one program scan.
3. Thereafter, while the control input remains ON, the associated instruction is not active. To
re-execute the instruction the control input must be turned from OFF to ON again.

Pulse execution instruction
X0
D10 D12 MOVP

When X0 goes from OFFON, the MOVP
instruction will be executed one time and
instruction cannot be re-executed again in the
scan of program scan. This is pulse execution
instruction.
Continuous execution instruction
X1
D10 D12 MOV

When X1=ON, the MOV instruction can be
re-executed again in every scan of program. This
is called continuous execution instruction.
The above figures show that when X0, X1=OFF, the instruction will not be executed and the contents
of the destination operand D will retmain unchanged.

Operands
1. Bit device such as X, Y, M, S can be combined together to be defined as a WORD device. The bit
device can serve as the word device (KnX, KnY, KnM, KnS) to store the numeric values to
operate.
2. Data register D, Timer T, Counter C and Index Register E, F can all be assigned as operands.
3. A D register is usually a 16-bit register. It can also be assigning as a 32-bit register which
consumes two D register with continuous numbers.
4. If the operand of a 32-bit instruction is assigned to D0, the 32-bit data register which is combined
by D0 and D1 will be occupied. D1 is the upper 16-bit and D0 is the lower 16-bit.
5. If the 32-bit counters(C200~C255) are used as Data registers, one counter indicates a 32-bit
length. Only instructions using 32-bit operands can be assigned.
ELC Syst em Manual

6- 18
Operand Data format
1. X, Y, M, S are only a single point ON/OFF, then they are defined as bit devices.
2. However, 16-bit (or 32-bit) device T, C, D, E, F are data registers and are defined as Word device.
3. If a Kn is placed in front of X, Y, M and S it will be defined as word device, whereas n=1 means
4-bit (each value of 1 is = to 4 bits). So 16-bit can be described from K1 to K4, and 32-bit can be
described from K1 to K8. For example, K2M0 means use 8-bits from M0 to M7.
X0
K2M0 D10 MOV

When X0=ON, move the contents of M0 to M7
to D10 segments 0 to 7, and segments 8 to 15
are set to 0.

Kx values
16-bit instruction 32-bit instruction
Specified Number of Digits (16-bit instruction):
K-32,768~K+32,767
Specified Number of Digits (32-bit instruction):
K-2,147,483,648~K+2,147,483,647
16-bit instruction: (K1~K4) 32-bit instruction: (K1~K8)
K1 (4 points) 0~15 K1 (4 points) 0~15
K2 (8 points) 0~255 K2 (8 points) 0~255
K3 (12 points) 0~4,095 K3 (12 points) 0~4,095
K4 (16 points) -32,768~+32,767 K4 (16 points) 0~65,535
K5 (20 points) 0~1,048,575
K6 (24 points) 0~167,772,165
K7 (28 points) 0~268,435,455
K8 (32 points) -2,147,483,648~+2,147,483,647

Flags
1. General Flags
The following flags are available for the ELC:
M1020: Zero flag
M1021: Borrow flag
M1022: Carry flag
M1029: Instruction execution completed flag
When executing an instruction, all flags will be turned to ON or OFF according to the operation
result of the instruction. However, if the instruction is not executed, the ON/OFF state of the flags
will remain unchanged.
6. I nst ruct i on Set

6- 19
X0
SET M0
M0
DSW X20 Y20 D0 K1
RST M0
M1029

When X0=ON, DSW instruction
is activated.
When X0=OFF, wait for the
program cycle of DSW
instruction being completed,
after M1029=ON, then M0 =
OFF.
2. Error Operation Flags
If the combination of the instruction or the assigned operands result in an error, the error flags and
any associated numbers in the following table will be shown during the excution of the application
instructions.
M1067
D1067
D1069
When error operations occur, M1067=ON, D1067 will show the error number
and D1069 will show the error address.
If other errors occur, the contents of D1067 and D1069 will be refreshed. (when
the error is resetd, M1067=OFF)
M1068
D1068
When error operations occur, M1068=ON, D1068 will show the error address.
If other errors occur, the contents of D1068 will not be refreshed, M1068 must
use RST instruction to reset to OFF, otherwise the error will remain.
3. Flags to Extend Functions
Some instructions can extend their function by using some special flags.
Example: instruction RS can switch transmission mode 8-bit and 16-bit by using M1161.

Limited Use Instructions
Some instructions can be used unlimited times in the program, others can be used only a certain
number of time in a program. These instructions can be modified by index registers to extend their
functionality.
1. These instructions can be used once in a program:
PWM PB Model IST PB/PC/PA/PH/PV Models
SEGL PB Model DABSR PH/PV Models
2. Only can be used twice in the program:
PLSY PB Model PLSR PB Model
PR PC/PA/PH/PV Models SEGL PV Model
ELC Syst em Manual

6- 20
3. Only can be used four times in the program:
HOUR PC/PA/PH Models
4. Only can be used eight times in the program:
TTMR PC/PA/PH Models
5. DHSCS and DHSCR, these instructions only can be executed simultaneously less than four times
in the program for PB models.
6. DHSCS, DHSCR and DHSZ these instructions only can be executed simultaneously less than six
times in the program of PC/PA/PH models.

Limited of executing the same instruction at the same time
There is no limitation on the times of using the instructions listed below, but there are limitations on the
times of executing the same instruction at the same time.
1. Instructions which can be executed only once: API 52 MTR (PC), API 56 SPD (PB/PC), API 69
SORT (PC), API 70 TKY (PC), API 71 HKY (PC), API 72 DSW (PC), API 74 SEGL (PC), API 75
ARWS, API 80 RS (PB / PC), API 100 MODRD (PB / PC), API 101 MODWR (PB / PC), API 102
FWD (PB / PC), API 103 REV (PB / PC), API 104 STOP (PB / PC), API 105 RDST (PB / PC), API
106 RSTEF (PB / PC), API 150 MODRW (PB /PC).
2. Instructions which can be executed only twice: API 58 PWM (PC), API 59 PLSR (PC).
3. Instructions which can be executed only 4 times: API 57 PLSY (PV), API 58 PWM (PV).
4. In PC series, there is on limitation on the times of using the high-speed output instructions PLSY,
PWM and PLSR, bit only one high-speed output instruction will be enabled in every scan.
5. In PV series, there is no limitation on the times of using hardware high-speed counter instructions
DHSCS, DHSCR and DHSZ, but when the three instructions are enabled at the same time,
DHSCS will occupy 1 memory unit, DHSCR 1 memory unit, and DHSZ 2 memory units. The total
memeory units occupied by the three instructions cannot be more than 8 units. If there are more
than 8 memory units occupied, the ELC system will execute the instruction that is first scanned and
enabled and ignore the rest.

Numeric Values
1. Devices such as X, Y, M, S are bit devices and there are only two states, ON and OFF. However,
T, C, D, E, F are data registers and are word devices. Although bit device can only be a single
point ON/OFF, they can also be used as numeric values (larger than bits) in the operands of
instructions if the specified bit device is added front of the operand. The specified bit device is the
6. I nst ruct i on Set

6- 21
specified number of digit and it would look like Kn where n can be a number from the range of 1
to 8.
2. 16-bit can be described from K1 to K4, and 32-bit can be described from K1 to K8. For example,
K2M0 means there are 8-bit from M0 to M7.
M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M0 M1
0 0 0 0 0 0 0 0
0 0 0 0 1 1 1 1
1 1 1 1 1 1 1 1
D1
D1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b0 b1
0 0 0 0 0 0 0 0
Valid data
Low byte
Low byte
Equal to
Transmit
Clear to 0

3. Transmit K1M0, K2M0, K3M0 to 16-bit registers and the unused upper bit data are not transmitted.
Its the same as sending K1M0, K2M0, K3M0, K4M0, K5M0, K6M0, K7M0 to 32-bit registers and
the unused upper bit data are not transmitted.
4. The unused upper bit will be defined as 0 if the content of the operand assign K1 to K3 in a 16-bit
operation or assign K4 to K7 in 32-bit operation. Therefore, the operation result is positive.
M0
K2X0 D0 MOV

The BCD value combined by X0 to X7 will be
converted to D0 as BIN value.

Assign Continuous Bit Numbers
As already explained, bit devices can be grouped into 4 bit units. The n in KnM0 defines the number
of groups of 4 bits to be combined for data operation. K1 to K4 are allowed for 16-bit data operations
but K1 to K8 are valid for 32-bit operations.
The bit device numbers are all of the above. To avoiding errors, please do not skip over the continuous
numbers. Furthermore, if K4Y0 is used in 32-bit operation, the upper 16-bit is defined as 0. Therefore, it
is recommended to use K8Y0 in 32bit operation.

Floating Point Operation
The internal operation of ELC usually is operated by BIN integer format. When performing integer
division operation, the decimal point will be discarded. For example: 40 3 = 13, remainder is 1 and the
ELC Syst em Manual

6- 22
decimal point will be discarded. But using floating point operation, the decimal point is used.
The application instructions related to floating point operation are shown in the following table.
FLT DECMP DEZCP DMOVR DRAD
DDEG DEBCD DEBIN DEADD DESUB
DEMUL DEDIV DEXP DLN DLOG
DESQR DPOW INT DSIN DCOS
DTAN DASIN DACOS DATAN DSINH
DCOSH DTANH DADDR DSUBR DMULR
DDIVR

Binary Floating Point
ELC uses the IEEE754 method to represent floating point numbers with 32-bit numbers:

S
exponent mantissa
8-bit 23-bit
b31
Sign bit
0: positive
1: negative
b0


Equation ( ) 127 ; . 1 2 1 =

B M
B E S

Therefore, the range of 32-bit floating is from 2
-126
to

2
+128
, i.e. from 1.175510
-38
to

3.402810
+38
.
Example 1: using 32-bit floating point to represent decimal number 23
Step 1: convert 23 to binary number: 23.0=10111
Step 2: Normalizing the binary: 10111=1.0111 2
4
,

0111 is mantissa and 4 is an exponent.
Step 3: get exponent: E -B=4 E-127=4 E=131=10000011
2

Step 4: We can now combine the sign, exponent, and normalized mantissa into the binary IEEE short
real representation.
0 10000011 01110000000000000000000
2
=41B80000
16
Example 2: using 32-bit floating point to represent decimal number 23
The conversion steps are the same as decimal number 23. Only need to modify sign bit from 0 to 1 to
get value.
1 10000011 01110000000000000000000
2
=C1B80000
16

ELC also uses two registers with continuous number to store binary floating point. The following is the
example that uses register (D1, D0) to store binary floating point.
6. I nst ruct i on Set

6- 23
S E7 E6 E5 E1 E0 A22 A21 A20 A6 A5 A4 A3 A2 A1 A0
b0 b1 b2 b3 b4 b5 b6 b20 b21 b22 b23 b24 b28 b29 b30 b31
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
7 6 5 1 0 -1 -2 -3 -17 -18 -19 -20 -21 -22 -23
D1(b15~b0) D0(b15~b0)
E0~E7=0 or 1 A0~A22=0 or 1
8 bits of exponent 23 bits of constant
sign bit (0: positive 1:negative)
When b0~b31 is 0, the content is 0.


Decimal Floating Point
1. Binary floating point is not practical for some applications, therefore, binary floating point format
can be converted to decimal floating point format for performing operation of decimal numbers.
However, ELC will still use binary floating point to perform the operation of decimal numbers, it will
perfrom much of the conversion for the user.
2. Decimal floating point is stored in the register with 2 continuous numbers. The register with small
number stores constant and the register with larger number stores exponent.
For example, using register (D1, D0) to store a decimal floating point.
Decimal floating point = [constant D0] X 10
[exponent D1 ]
constant D0 = 1,000~9,999, exponent D1 = - 41~+35
the most significant bit of (D1, D0) is symbol bit.
Besides, constant 100 doesnt exist in D0 due to 100 will be shown with 1,00010
-1
.
The range of decimal number is from 117510
-41
to 340210
+35
.
3. Decimal floating point can be used in the following instructions.
The conversion instruction for Binary floating point Decimal floating point (DEBCD)
The conversion instruction for Decimal floating point Binary floating point (DEBIN)
4. Zero flag (M1020), Borrow flag (M1021) and carry flag (M1022). The flags that corresponds to the
floating instruction are:
a) Zero flag: when the result is 0, M1020=ON.
b) Borrow flag: when the result is least than the minimum unit, M1021=ON
c) Carry flag: when the absolute value of result exceeds usage range, M1022=ON
ELC Syst em Manual

6- 24
Index register E, F
The index registers are 16-bit registers. There are 2 devices for PB models (E and F), 8 devices for
PC/PA/PH models (E0~E3, F0~F3), and 16 devices for PV models (E0 ~ E7 and F0 ~ F7).
E and F are also 16-bit register just the same as general register.
It can be read /write.
When using 32-bit index register, the combination of E, F are as
follows. (E0, F0), (E1, F1), (E2, F2), (E3, F3), (E4, F4), (E5, F5),
(E6, F6), (E7, F7).
F0 E0
E0 F0
16-bit 16-bit
32-bit
Lower bit Upper bit

If using a 32-bit register, you should specify E. In this condition, F will be covered by E and cannot be
used anymore; otherwise the contents of E will become incorrect. (When ELC starts-up, it is
recommended to use the MOVP instruction to clear the contents of F and reset it to 0)
As the right figure shows, the contents of operand will
change according to the contents of E, F. this kind of
modification is called Index.
For example, E0=8 and D20E0 represent constant
D(20+8). If the contact is ON, register D28 will be
transmitted to register D24.
E0=8 F0=14
20+8=28 10+14=24
D28 D24
M1000
D20E0 D10F0 MOV

Devices modifiable in PB series: P, X, Y, M, S, KnX, KnY, KnM, KnS, T, C, D.
Devices modifiable in PC/PA//PH series: P, X, Y, M, S, KnX, KnY, KnM, KnS, T, C, D.
Devices modifiable in PV series: P, I, X, Y, M, S, K, H, KnX, KnY, KnM, KnS, T, C, D.
E and F can modify the devices listed above but cannot modify themselves and Kn. K4M0E0 is valid
and K0E0M0 is invalid. Grey columns in the table of operand at the beginning page of each application
instruction indicate the operands modifiable by E and F.
If you need to modify device P, I, X, Y, M, S, KnX, KnY, KnM, KnS, T, C and D by E, F, you have to select
a 16-bit register, i.e. you can designate E or F. To modify constant K and H in a 32-bit instruction, you
have to select a 32-bit register, i.e. you have to designate E.
When you use the instruction mode in WPLSoft to modify constant K and H, you have to use @, e.g.
"MOV K10@E0 D0F0
6. I nst ruct i on Set

6- 25
6.6 Numerical List of Instructions
Loop Control
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
00 CJ - Conditional jump 3 -
01 CALL - Call subroutine 3 -
02 SRET - - Subroutine return 1 -
03 IRET - - Interrupt return 1 -
04 EI - - Enable interrupt 1 -
05 DI - - Disable interrupt 1 -
06 FEND - - Terminate the main routine program 1 -
07 WDT - Reset the watchdog timer 1 -
08 FOR - - Nested loops begin 3 -
09 NEXT - - Nested loops end 1 -
Transmission Comparison
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
10 CMP DCMP Comparison output 7 13
11 ZCP DZCP Zone comparison 9 17
12 MOV DMOV Data Move 5 9
13 SMOV - Shift move - 11 -
14 CML DCML Counter transfer 5 9
15 BMOV - Block move 7 -
16 FMOV DFMOV Multiple devices movement 7 13
17 XCH DXCH Data exchange 5 9
18 BCD DBCD Convert BIN data into BCD 5 9
19 BIN DBIN Convert BCD data into BIN 5 9
Four Fundamental Operations Arithmetic
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
20 ADD DADD Addition of BIN data 7 13
21 SUB DSUB Subtraction of BIN data 7 13
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6- 26
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
22 MUL DMUL Multiplication of BIN data 7 13
23 DIV DDIV Division of BIN data 7 13
24 INC DINC Addition of 1 3 5
25 DEC DDEC Subtraction of 1 3 5
26 WAND DAND Logical product (AND) operation 7 13
27 WOR DOR Logical sum (OR) operation 7 13
28 WXOR DXOR Exclusive logical OR (XOR) 7 13
29 NEG DNEG Complement of 2 3 5
Rotation and Displacement
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
30 ROR DROR Rotate to the right 5 9
31 ROL DROL Rotate to the left 5 9
32 RCR DRCR Rotate right with carry 5 9
33 RCL DRCL Rotate left with carry 5 9
34 SFTR - Bit shift right 9 -
35 SFTL - Bit shift left 9 -
36 WSFR - Word shift right - 9 -
37 WSFL - Word shift left - 9 -
38 SFWR - Shift register write - 7 -
39 SFRD - Shift register read - 7 -
Data Operation
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
40 ZRST - Resets a range of device specified 5 -
41 DECO - 8 256 bits decoder 7 -
42 ENCO - 256 8 bits encoder 7 -
43 SUM DSUM Sum of ON bits 5 9
44 BON DBON Determine the ON bits 7 13
45 MEAN DMEAN Mean value 7 13
46 ANS - - Alarm device output - 7 -
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Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
47 ANR - Alarm device reset - 1 -
48 SQR DSQR Square root of BIN 5 9
49 FLT DFLT Floating point 5 9
High Speed Processing
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
50 REF - I/O refresh 5 -
51 REFF - Refresh and filter adjust - 3 -
52 MTR - - Matrix input - 9 -
53 - DHSCS - High speed counter SET - 13
54 - DHSCR - High speed counter RESET - 13
55 - DHSZ - HSC zone compare - - 17
56 SPD - - Speed detection 7 -
57 PLSY DPLSY - Pulse output 7 13
58 PWM - - Pulse width modulation output 7 -
59 PLSR DPLSR - Ramp pulse output 9 17
Convenience Instruction
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
60 IST - - Manual/Auto control 7 -
61 SER DSER Multiple devices comparison - 9 17
62 ABSD DABSD - Absolute cam control - 9 17
63 INCD - - Relative cam control - 9 -
64 TTMR - - Alternate timer - 5 -
65 STMR - - Special timer - 7 -
66 ALT - ON/OFF alternate instruction 3 -
67 RAMP - - Ramp signal - 9 -
69 SORT - - Data sort - 11 -

ELC Syst em Manual

6- 28
External I/O Display
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
70 TKY DTKY - 10-key keypad input - 7 13
71 HKY DHKY - 16-key keypad input - 9 17
72 DSW - - Digital Switch input - 9 -
73 SEGD - Decode the 7-step display panel 5 -
74 SEGL - - 7-step display scan output 7 -
75 ARWS - - Arrow keypad input - 9 -
76 ASC - - ASCII code conversion - 11 -
77 PR - - Output ASCII code - 5 -
Serial I/O
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
78 FROM DFROM Read special module CR data 9 17
79 TO DTO Special module CR data write in 9 17
80 RS - - Serial data communication 9 -
81 PRUN DPRUN Octal number system transmission - 5 9
82 ASCII - Convert HEX to ASCII 7 -
83 HEX - Convert ASCII to HEX 7 -
84 CCD - Check sum - 7 -
85 VRRD - Volume read - 5 -
86 VRSC - Volume scale - 5 -
87 ABS DABS Absolute value 3 5
88 PID DPID - PID calculation 9 17
Basic Instruction
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
89 PLS - - Rising-edge output 3 -
90 LDP - - Rising-edge pulse 3 -
91 LDF - - Falling-edge pulse 3 -
92 ANDP - - Serial connection of rising-edge pulse 3 -
6. I nst ruct i on Set

6- 29
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
93 ANDF - - Serial connection falling-edge pulse 3 -
94 ORP - -
Parallel connection of rising-edge
pulse
3 -
95 ORF - -
Parallel connection of falling-edge
pulse
3 -
96 TMR - - Timer 4 -
97 CNT DCNT - Counter 4 6
98 INV - - Inverting operation 1 -
99 PLF - - Falling-edge output 3 -
Communication Instruction
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
100 MODRD - - MODBUS data Read 7 -
101 MODWR - - MODBUS data write in 7 -
107 LRC - LRC check sum 7 -
108 CRC - CRC check sum 7 -
150 MODRW - - MODBUS data read/write in 11 -
Floating Operation
Mnemonics Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
110 - DECMP Floating point compare - 13
111 - DEZCP Floating point zone compare - 17
112 DMOVR Floating point data Move 9
116 - DRAD Degree Radian - - 9
117 - DDEG Radian Degree - - 9
118 - DEBCD Float to scientific conversion - 9
119 - DEBIN Scientific to float conversion - 9
120 - DEADD Floating point addition - 13
121 - DESUB Floating point subtraction - 13
122 - DEMUL Floating point multiplication - 13
123 - DEDIV Floating point division - 13
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6- 30
Mnemonics Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
124 - DEXP Floating point exponent operation - 9
125 - DLN Floating natural logarithm operation - 9
126 - DLOG Floating point logarithm operation - 13
127 - DESQR Square root of binary floating point - 9
128 - DPOW Floating point power operation - 13
129 INT DINT Floating point to integer 5 9
130 - DSIN Floating point Sine operation - 9
131 - DCOS Floating point Cosine operation - 9
132 - DTAN Floating point Tangent operation - 9
133 - DASIN Floating point Arcsine operation - - 9
134 - DACOS Floating point Arccosine operation - - 9
135 - DATAN Floating point Arctangent operation - - 9
136 - DSINH Hyperbolic Sine - - - - 9
137 - DCOSH Hyperbolic Cosine - - - - 9
138 - DTANH Hyperbolic Tangent - - - - 9
172 - DADDR Floating Point Number Addition - 13
173 - DSUBR Floating Point Number Subtraction - 13
174 - DMULR Floating Point Number Multiplication - 13
175 - DDIVR Floating Point Number Division - 13
Additional Instruction
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
143 DELAY - Delay instruction - 3 -
144 GPWM - - General pulse width modulation - 9 7 -
145 FTC - - Fuzzy temperature control - 9 9 -
146 CVM - - Valve Control - - - 7 -
147 SWAP DSWAP Swap high/low byte 3 5
148 MEMR DMEMR MEMORY read - 7 13
149 MEMW DMEMW MEMORY write in - 7 13
151 PWD - - Detection of Input Pulse Width - - - 5 -
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6- 31
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
152 RTMU - -
Start of the Measurement of
Execution Time of I Interruption
- - - 5 -
153 RTMD - -
End of the Measurement of the
Execution Time of I Interruption
- - 3 -
154 RAND - Random value - 7 -
196 HST - High Speed Timer - - - 3 -
202 SCAL - Calculation of Proportional Value 9 -
203 SCLP DSCLP
Calculation of Parameter
Proportional Value
9 13
Positioning Control
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
155 - DABSR - ABS current value read - - 13
156 ZRN DZRN - Zero point return - - 9 17
157 PLSV DPLSV - Adjustable Speed Pulse Output - - - 7 13
158 DRVI DDRVI - Relative positioning - - 9 17
159 DRVA DDRVA - Absolute positioning - - 9 17
Perpetual Calendar
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
160 TCMP - Calendar data comparison - 11 -
161 TZCP - Calendar data zone comparison - 9 -
162 TADD - Calendar data addition - 7 -
163 TSUB - Calendar data subtraction - 7 -
166 TRD - Calendar data read - 3 -
167 TWR - Calendar data write in - 3 -
169 HOUR DHOUR - Hour meter - 7 13
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6- 32
Gray Code
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
170 GRY DGRY Convert BIN to Gray code - 5 9
171 GBIN DGBIN Convert Gray code to BIN - 5 9
Matrix Handling
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
180 MAND - Matrix AND - 9 -
181 MOR - Matrix OR - 9 -
182 MXOR - Matrix XOR - 9 -
183 MXNR - Matrix XNR - 9 -
184 MINV - Matrix inverse - 7 -
185 MCMP - Matrix compare - 9 -
186 MBRD - Matrix bit read - 7 -
187 MBWR - Matrix bit write - 7 -
188 MBS - Matrix bit shift - 7 -
189 MBR - Matrix bit rotate - 7 -
190 MBC - Matrix bit state count - 7 -
Positioning Instruction
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
191 - DPPMR - 2-Axis Relative Point to Point Motion - - - - 17
192 - DPPMA - 2-Axis Absolute Point to Point Motion - - - - 17
193 - DCIMR -
2-Axis Relative Position Arc
Interpolation
- - - - 17
194 - DCIMA -
2-Axis Absolute Position Arc
Interpolation
- - - - 17
195 - DPTPO - Single-Axis Pulse Output by Table - - - - 13
197 - DCLLM - Close Loop Position Control - - - - 17
Contact Type Logic Operation
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6- 33
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
215 LD& DLD& - S
1
& S
2
- 5 9
216 LD| DLD| - S
1
| S
2
- 5 9
217 LD^ DLD^ - S
1
^ S
2
- 5 9
218 AND& DAND& - S
1
& S
2
- 5 9
219 AND| DAND| - S
1
| S
2
- 5 9
220 AND^ DAND^ - S
1
^ S
2
- 5 9
221 OR& DOR& - S
1
& S
2
- 5 9
222 OR| DOR| - S
1
| S
2
- 5 9
223 OR^ DOR^ - S
1
^ S
2
- 5 9
Contact Type Compare Instruction
Mnemonic Availability STEPS
API
16 bits 32 bits
PULSE Function
PB PC/PA PH PV 16-bit 32-bit
224 LD= DLD= - S
1
= S
2
5 9
225 LD> DLD> - S
1
> S
2
5 9
226 LD< DLD< - S
1
< S
2
5 9
228 LD<> DLD<> - S
1
S
2
5 9
229 LD<= DLD<= - S
1
S
2
5 9
230 LD>= DLD>= - S
1
S
2
5 9
232 AND= DAND= - S
1
= S
2
5 9
233 AND> DAND> - S
1
> S
2
5 9
234 AND< DAND< - S
1
< S
2
5 9
236 AND<> DAND<> - S
1
S
2
5 9
237 AND<= DAND<= - S
1
S
2
5 9
238 AND>= DAND>= - S
1
S
2
5 9
240 OR= DOR= - S
1
= S
2
5 9
241 OR> DOR> - S
1
> S
2
5 9
242 OR< DOR< - S
1
< S
2
5 9
244 OR<> DOR<> - S
1
S
2
5 9
245 OR<= DOR<= - S
1
S
2
5 9
246 OR>= DOR>= - S
1
S
2
5 9
Note: PB does not support pulse execution type instructions (PULSE instruction).
ELC Syst em Manual

6- 34
6.7 Detailed Instruction Explanation
API Mnemonic Operands Function
00

CJ P

Conditional Jump
Controllers
PB PC PA PH PV

OP Range Program Steps

P0~P255 CJ, CJP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The destination pointer of the conditional jump, P can be modified by Index register E, F
1. PB has 64 pointers; available from the range of P0 to P63.
2. PC, PA, PH and PV have 256 pointers; available from the range of P0~P255.
Explanations:
1. When the CJ instruction is active it forces the program to jump to an identified program marker.
While the jump takes place the intervening program steps are skipped. This means they are not
processed in any way. The resulting effect is to speed up the programs operational scan time.
2. When the destination of the pointer P is before CJ instruction, note that the WDT may cause an
error if WDT exceeded its time.
3. What happens to each device type when executing the CJ instruction:
a) Y, M, S remains its previous state before the condition jump occurs.
b) General timers, accumulative timers and general counters will freeze their current values if they
are skipped by a CJ instruction.
c) Timers for Subroutines and Interrupts are the only exception to this situation as they are
processed independently of the main program.
d) High speed counters are the only exception to this situation as they are processed independently
of the main program.
e) The ordinary counters stop executing.
f) If the reset instruction of the timer is executed before the conditional jump, the device will still be
in the reset status while conditional jumping is being executed.
g) Application instructions are also skipped if they are programmed between the CJ instruction and
the destination pointer. However, the DHSCS, DHSCR, DHSZ, SPD, PLSY, PWM, PLSR, PLSV,
DDRVI and DDRVA instructions will operate continuously if they were active before the CJ
instruction was driven, otherwise they will be processed, i.e. skipped, as standard applied
instructions.
6. I nst ruct i on Set

6- 35
Program Example 1:
When X0=ON the program will skip from address 0 to N (label P1) automatically and keep on executing.
Logic between address 0 and N will be skipped and will not be executed.
When X0=OFF, program flow will proceed with the rung immediately after the CJ instruction.
X0
X1
X2
CJ P1
Y1
Y2
0
N P1
P***
(CJ command)

Program Example 2:
There are five conditions that the CJ instruction can be executed between the instructions MC and
MCR.
1. Out of MC~MCR.
2. Valid in the loop P1 in the following chart.
3. In the same level N, inside of MC~MCR .
4. Inside of MC, out of MCR.
5. Jump from this MC~MCR to another MC~MCR.
X0
MC N0
X2
X3
X1
M1000
M1000
P1
P0
CJ
CJ
MC N1
N1
N0
P1
P0
Y1
Y0
MCR
MCR

ELC Syst em Manual

6- 36
Program Example 3:
The states of each device are shown in the following:
Device
Contact state
before CJ execution
Contact state
during CJ execution
Output coil state
during CJ execution
M1, M2, M3 OFF M1, M2, M3 OFFON Y1 (note1), M20, S1 OFF
Y, M, S
M1, M2, M3 ON M1, M2, M3 ONOFF Y1 (note1), M20, S1 ON
M4 OFF M4 OFFON Timer is not activated
10ms,
100ms
Timer
M4 ON M4 ONOFF
Timer interrupt is latched.
Keep on counting after M0 is OFF.
M6 OFF M6 OFFON Timer (T240) is not activated
1ms,10ms,
100ms
accumulative
Timer
(PC/PA/PH/
PV Series)
M6 ON M6 ONOFF
All accumulative timers will stop but
latched once executing instruction
CJ. When M0 is from ONtOFF,
T240 will be unchanged.
M7, M10 OFF M10 ON/OFF trigger Counter does not count
C0~C234
M7 OFF, M10
ON/OFF trigger
M10 ON/OFF trigger
The interrupt of counter latched.
Keep on counting after M0 is OFF.
M11 OFF M11 OFFON
Application instructions wont be
executed.
Application
instruction
M11 ON M11 ONOFF
Do not execute the skipped
application instruction but API
53~59, API 157~159 keep
executing.

Note 1: Y1 is dual output. When M0 is OFF, it is controlled by M1. When M0 is ON, it is controlled by
M12.
Note 2: When timer that subroutine used (T192~T199, for PC/PA/PH/PV) executes CJ instruction, it will
keep counting. After timer attains, output contact of timer will be ON.
Note 3: When high-speed counters (C235~C255) execute CJ instruction, it will keep counting and
output point will also continue act.
6. I nst ruct i on Set

6- 37
Y1 is double or dual coil designation. When M0=OFF, it is controlled by M1. When M0=ON, it is
controlled by M12.
CJ P0
M0
M1
M2
M4
M5
M6
M7
M10
M11
M0
M12
M13
END
RST T240
RST C0
RST D0
Y1
CJ P63
S1
TMR T0 K10
RST T240
RST C0
MOV D0 K3
CNT C0 K20
Y1
M20
TMR T240 K1000
P0
P63
M3
ELC Syst em Manual

6- 38
API Mnemonic Operands Function
01

CALL P

Call Subroutine
Controllers
PB PC PA PH PV

OP Valid Range Program Steps

P0~P255 CALL, CALLP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The destination pointer of the call subroutine. P can be modified by Index register E, F.
1. PB has 64 pointers; available from the range of P0 to P63.
2. PC, PA, PH, and PV have 256 pointers; available from the range of P0~P255.
Explanations:
1. When the CALL instruction is active it forces the program to run the subroutine associated with the
called pointer.
2. A CALL instruction must be used in conjunction with FEND (API 06) and SRET(API 02)
instructions.
3. The program jumps to the subroutine pointer (located after an FEND instruction) and processes
the contents until an SRET instruction is encountered. This forces the program flow back to the
line of ladder immediately following the original CALL instruction.
Points to note:
1. Subroutine must be placed after the FEND instruction.
2. Subroutines must end with the SRET instruction.
3. CALL pointers and CJ instruction pointers are not allowed to coincide.
4. CALL instructions can call any other CALL subroutine any number of times.
5. Subroutines can be nested 5 levels including the initial CALL instruction. (If entering the six levels,
the subroutine wont be executed.)

6. I nst ruct i on Set

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API Mnemonic Function
02

SRET Subroutine Return
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A
Automatically returns to the step immediately following the
CALL instruction which activated the subroutine
SRET: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Explanations:
Indicates the end of subroutine program. The subroutine will return to main program and begin
execution with the instrucition after the CALL instruction.
Program Example 1:
When X0 = ON, the CALL instruction will jump to P2 and run the subroutine. With the execution of the
SRET instruction, it will jump back to step 24 and continue execution.
20
24
P2
Subroutine
Subroutine return
Call subroutine P2 CALL P2
X0
X1
SRET
FEND
Y0
M1
Y1
M2
Y2

Program Example 2:
1. When the rising-edge of X20 is triggered, CALL P10 instruction will transfer execution to
subroutine P10.
2. When X21 is ON, execute CALL P11, jump to and run subroutine P11.
3. When X22 is ON, execute CALL P12, jump to and run subroutine P12.
4. When X23 is ON, execute CALL P13, jump to and run subroutine P13.
5. When X24 is ON, execute CALL P14, jump to and run subroutine P14. When the SRET instruction
is reached, jump back to the last P*** subroutine and keep executing until the last SRET
instruction is reached which will return execution back to the main program.
ELC Syst em Manual

6- 40
X0
X20
INC D0
Y0
CALL P10
X0
INC D1
Y1
FEND
INC D10
X2
P10
Y2
X2
X21
CALL P11
INC D11
Y3
SRET
INC D20
X2
P11
Y4
X22
CALL P12
X2
INC D21
Y5
SRET
X2
X23
X2
X2
X2
X24
X2
P13
P14
P12 INC D30
Y20
CALL P13
INC D31
Y21
SRET
INC D40
Y22
CALL P14
INC D41
Y23
SRET
INC D50
Y24
SRET
END
Main
Program
Subroutine
Subroutine
Subroutine
Subroutine
Subroutine


6. I nst ruct i on Set

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API Mnemonic Function
03

IRET Interrupt Return
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A
IRET ends the processing of an interrupt subroutine and
returns execution back to the main program
SRET: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV

API Mnemonic Function
04

EI Enable Interrupt
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A
Enables Interrupts, explanation of this instruction also
coincides with the explanation of the DI (disable interrupts
instruction), see the DI instruction for more information.
M1050~M1059, M1299
EI: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV

API Mnemonic Function
05

DI Disable Interrupt
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A
EI instruction enables ELC to accept interrupts; like Time
interrupt or High-speed counter interrupt.
Even in the interrupt allowed range when interrupting special
the auxiliary relay M1050 to M1059M1299, the corresponding
interrupting request will not be activated.
DI: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Explanations:
1. Interrupt subroutines must be placed after the FEND instruction.
2. Other interrupts are not allowed during execution of a current interrupt routine.
3. Priority is given to the interrupt occurring first. If interrupts occur simultaneously, the interrupt with
the lower pointer number will be given the higher priority.
4. Any interrupt request occurring between DI and EI instructions will not be executed immediately.
The interrupt will be memorized and executed when the next EI instruction occurs.
ELC Syst em Manual

6- 42
5. Care should be used when using external interupts and using the same inputs for high speed
counter inputs.
6. During the execution of an interrupt routine, immediate I/O instruction can be performed by the
REF instruction.
Points to note:
1. PB models interrupt pointers (I):
a) External interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3) 4 points.
b) Time interrupts: I610~I699, 1 point (time base=1ms)
c) Communication interrupt for specific characters received (I150)
d) Flags:
Flag Function
M1050 External interrupt, I 001 masked
M1051 External interrupt, I 101 masked
M1052 External interrupt, I 201 masked
M1053 External interrupt, I 301 masked
M1056 Disable time interruption I610~I699
2. PC/PA/PH models Interrupt pointers (I):
a) External interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3), (I401, X4), (I501, X5) 6 points.
b) Time interrupts: I601~I699, I701~I799, 2 points. (time base=1ms)
c) High-speed counter interrupts: I010, I020, I030, I040, I050, I060 6 points. (used with DHSCS
instruction)
d) Communication interrupt for specific characters received (I150)
e) The priority of interrupt point I: high-speed counter interrupt, external interrupt, time interrupt and
communication interrupt for specific characters received
f) Among the following 6 interruption No., (I001, I010), (I101, I020), (I201, I030), (I301, I040), (I401,
I050), (I501, I060), the program allows the user to use only one of the two numbers in a pair. If the
user uses the two numbers in the pair, grammar check errors may occur when the program is
written into ELC.
g) Flags:
Flag Function
M1050 External interrupt, I 001 masked
M1051 External interrupt, I 101 masked
M1052 External interrupt, I 201 masked
M1053 External interrupt, I 301 masked
6. I nst ruct i on Set

6- 43
Flag Function
M1054 External interrupt, I 401 masked
M1055 External interrupt, I 501 masked
M1056 Timer interrupt, I601~I699 masked
M1057 Timer interrupt, I701~I799 masked
M1059 High-speed counter interrupt, I010~I060 masked
M1299 Communication interrupt, I150 masked
3. PV models Interrupt pointers (I):
a) External interruptions: (I000/I001, X0), (I100/I101, X1), (I200/I201, X2), (I300/I301, X3), (I400/I401,
X4), (I500/I501, X5) 6 points. (00 designates interruption in falling-edge, 01 designates interruption
in rising-edge)
b) Time interruptions: I601~I699, I701~I799, 2 points. time base = 1ms), I801~I899 1 point. (time
base = 0.1ms)
c) High-speed counter interruptions: I010, I020, I030, I040, 1050, 1060 6 points. (used with API 53
DHSCS instruction to generate interruption signals)
d) When pulse output interruptions I110, I120 (triggered when pulse output is finished), I130, I140
(triggered when the first pulse output starts) are executed, the currently executed program is
interrupted and jumps to the designated interruption subroutine.
e) Communication interruption: I150, I160, I170
f) The order for execution of interruption pointer I: external interruption, time interruption, high-speed
counter interruption, pulse interruption, communication interruption and frequency measurement
card interruption.
g) Flags:
Flag Function
M1280 Disable external interruption I000 / I001
M1281 Disable external interruption I100 / I101
M1282 Disable external interruption I200 / I201
M1283 Disable external interruption I300 / I301
M1284 Disable external interruption I400 / I401
M1285 Disable external interruption I500 / I501
M1286 Disable time interruption I601~I699
M1287 Disable time interruption I701~I799
M1288 Disable time interruption I801~I899
M1289 Disable high-speed counter interruption I010
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6- 44
Flag Function
M1290 Disable high-speed counter interruption I020
M1291 Disable high-speed counter interruption I030
M1292 Disable high-speed counter interruption I040
M1293 Disable high-speed counter interruption I050
M1294 Disable high-speed counter interruption I060
M1295 Disable pulse output interruption I110
M1296 Disable pulse output interruption I120
M1297 Disable pulse output interruption I130
M1298 Disable pulse output interruption I140
M1299 Disable communication interruption I150
M1300 Disable communication interruption I160
M1301 Disable communication interruption I170
M1340 Generate interruption I110 after CH0 pulse is sent
M1341 Generate interruption I120 after CH1 pulse is sent
M1342 Generate interruption I130 when CH0 pulse is being sent
M1343 Generate interruption I140 when CH1 pulse is being sent
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Program Example:
During the ELC operation, the program scans the instructions between EI and DI, if X1 or X2 are ON,
the subroutine A or B will be interruptted. When IRET is reached, the main program will resume.
I 101
I 201
Disabled interrupt
Enabled interrupt
Enabled interrupt
Interrupt subroutine A
Interrupt subroutine B
X1
Y0
EI
DI
EI
FEND
M0
Y1
IRET
M1
Y2
IRET

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API Mnemonic Function
06

FEND Terminate the Main Routine Program
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A Instruction driven by contact is not necessary. FEND: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Explanations:
1. Use FEND when the application uses either CALL instructions or uses interrupts. If these CALL or
interrupts are not used then use the END instruction to end the main program.
2. This instruction denotes the end of the main program. It has the same function as END instruction
during ELC operation.
3. CALL subroutines must be placed after the FEND instruction. Each CALL subroutine must end
with the SRET instruction.
4. Interrupt subroutines must be placed after the FEND instruction. Each interrupt subroutine must
end with the IRET instruction.
5. When using the FEND instruction, an END instruction is still required, but should be placed as the
last instruction after the main program and all subroutines.
6. If using several FEND instructions, place the CALL and interrupt subroutines between the last
FEND and END instruction.
7. During execution of a subroutine, if an FEND instruction reached before SRET instruction, an error
will occur.
8. During execution of a FOR instruction, if an FEND instruction reached before NEXT instruction, an
error will occur.
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CJ Command Program Flow
X1
CALL P63
P0
P63
CJ P0
I301
X0
0
The program flow
when X0=off,
X1=off
Main program
Main program
Main program
Interrupt subroutine
Command CALL subroutine
EI
DI
FEND
FEND
SRET
IRET
END
The program flow when X0=On
program jumps to P0

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CALL Command Program Flow
X1
CALL P63
P0
P63
CJ P0
I301
X0
0
The program flow
when X0=off,
X1=off
Main program
Main program
Main program
Interrupt subroutine
Command CALL subroutine
The program flow
when X0=Off,
X1=On.
EI
DI
FEND
FEND
SRET
IRET
END


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API Mnemonic Function
07

WDT P Reset the Watchdog Timer
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A WDT, WDTP: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Explanations:
1. The WDT instruction can be used to reset the Watch Dog Timer. If the ELC scan time (from step 0
to END or FEND instruction) is more than 200ms, the ERROR LED will flash. The user will have to
turn the ELC OFF and then back ON to clear the fault. ELC will determine the status of
RUN/STOP according to RUN/STOP switch.
2. When to use WDT:
a) When error occur in ELC system.
b) When the scan time of the program exceeds the WDT value of D1000. It can be modified by using
the following two methods.
i. Use WDT instruction
T1 T2
STEP0 END(FEND)
WDT

ii. Use the set value of D1000 (default is 200ms) to change the watchdog time.
Points to note:
1. When the WDT instruction is used it will operate on every program scan so long as its input
condition has been made. To force the WDT instruction to operate for only ONE scan requires
the user to program design. ELC users have the additional option of using the pulse(P) format of
the WDT instruction, i.e. WDTP.
2. The watchdog timer has a default setting of 200ms for ELC controllers. This time limit may be
customized to users own requirement by editing the contents of data register D1000, the wathdog
timer register.
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6- 50
Program Example:
If the program scan time is over 300ms, users can divide the program into 2 parts. Insert the WDT
instruction in between, so both halves of the programs scan time will be less than 200ms.
X0
END
END
WDT
300ms program
150ms program
150ms program
Dividing the program to two parts
so that both parts scan time are
less than 200ms.
Watchdog timer reset

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API Mnemonic Operands Function
08

FOR

Loop Begin
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * * * *
FOR: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The number of times the loop will be repeated

API Mnemonic Function
09

NEXT Loop End
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A NEXT: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Explanations:
1. FOR and NEXT instructions are used when loops are needed.
2. N (number of times loop is repeated) may be within the range of K1 to K32767. If the range N
K1, N will always be K1.
3. An error will occur in the following conditions:
NEXT instruction is before the FOR instruction.
A FOR instruction doesnt have a NEXT instruction.
There is a NEXT instruction after the FEND or END instruction.
A mismatched number of FOR to NEXT instructions.
4. The FOR to NEXT loop can be nested for five levels, if there are too many loops, the ELC scan
time will increase and it may cause the watchdog timer to be activated and result in error. User can
use WDT instruction to modify.
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Program Example 1:
After loop A operates 3 times, the program after the
NEXT instruction will resume. For every completed
cycle of loop A, loop B will completely executed for 4
times, therefore, the total number of times that loop B
operates will be 3 412 times.

FOR K3
FOR K4
NEXT
NEXT
A B

Program Example 2:
When X7 = Off, PLC will execute the program between FOR ~ NEXT. When X7 = On, CJ instruction
jumps to P6 and avoids executing the programs between FOR ~ NEXT.
X7
M0
M0
P6
MOV
FOR
MOV D0
D0
K3
K0
Y10
INC
MEXT
X10
D0
D1
CJ
P6



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6- 53
Program Example 3:
When the FOR / NEXT instructions are not executed, a CJ instruction can be used to jump around the
loop. When X1=ON, the CJ instruction will jump to P0 and not execute the most inner FOR / Next loop.
X0
TMR T0 K10
P0
FOR K4X100
X0
INC D0
K2
X0
D1
K3
X0
D2
K4
X0
WDT
D3
X1
CJ P0
FOR K5
X0 X0
INC D4
NEXT
NEXT
NEXT
NEXT
NEXT
END
FOR
INC
FOR
INC
FOR
INC
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API Mnemonic Operands Function
10

D CMP P

Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D * * *
CMP, CMPP: 7 steps
DCMP, DCMPP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First comparison value S
2
: Second comparison value D: Comparison result
Explanations:
1. The contents of S
1
and S
2
are compared and D denotes the compare result.
2. Operand D occupies 3 continuous devices.
3. The values are binary values. If b15=1 in 16-bit instruction or b31=1 in 32-bit instruction, the
comparison will regard the value as a negative binary value.
4. D, D +1, D +2 hold the comparison results,
D = ON if S
1
> S
2
,
D +1 = ON if S
1
= S
2
D +2 = ON if S
1
< S
2

5. If operand S
1
, S
2
use index register F, only a 16 bit compare is available.
Program Example:
1. If D is set to Y0, then Y0, Y1, Y2 will display the results of the compare as shown below.
2. When X20=ON, the CMP instruction is executed and one of Y0, Y1, Y2 will be ON. When
X20=OFF, the CMP instruction is not executed and Y0, Y1, Y2 remain in their previous condition.
X20
Y0
Y1
Y2
CMP K10 D10 Y0
If K10>D10, Y0 = On
If K10=D10, Y1 = On
If K10<D10, Y2= On

3. Use RST or ZRST instruction to reset the comparison result.
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6- 55
API Mnemonic Operands Function
11

D ZCP P

Zone Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
S * * * * * * * * * * *
D * * *
ZCP, ZCPP: 9 steps
DZCP, DZCPP: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First comparison value (Minimum) S
2
: Second comparison value (Maximum) S: Comparison
value D: Comparison result
Explanations:
1. S is compared with its lower limit, S
1
and its upper limit S
2
and D denotes the compare result.
2. The values are binary values. If b15=1 in 16-bit instruction or b31=1 in 32-bit instruction, the
comparison will regard the value as a negative binary value.
3. If operand S
1
, S
2
, S use index register F, only a 16 bit compare is available.
4. Operand S
1
should be less than Operand S
2,
Operand D occupies 3 continuous devices.
Program Example:
1. If D is set to M0, then M0, M1, M2 will work as the program example as below.
2. When X0=ON, ZCP instruction is driven and one of M0, M1, M2 is ON. When X0=OFF, ZCP
instruction is not driven and M0, M1, M2 remain in the previous status.
X0
M0
M1
M2
ZCP
If C10 < K10, M0 = On
If K10 < C10 < K100, M1 = On
If C10 > K100, M2 = On
X0
K10 C10 M0 K100
= =

3. Use RST or ZRST instruction to reset the comparison result.

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API Mnemonic Operands Function
12

D MOV P

Move
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D

* * * * * * * *
MOV, MOVP: 5 steps
DMOV, DMOVP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Data source D: Data destination
Explanations:
1. When the MOV instruction is executed, the data in S is moved to D without any change to S. If the
MOV instruction is not executed, the content of D will remain unchanged.
2. If operand S and D use index register F, only a 16 bit compare is available
Program Example:
1. MOV will move a 16-bit value from the source location to the destination.
2. When X0=OFF, the content of D0 remains unchanged. If X0=ON, the data in K10 is moved to D0.
3. When X1=OFF, the content of D10 remain unchanged. If X1=ON, the data of T0 is moved to D10
data register.
4. DMOV will move a 32-bit value from the source location to the destination.
5. When X2=OFF, the content of (D31, D30) and (D41, D40) remain unchanged. If X2=ON, the data
of (D21, D20) is moved to (D31, D30) data register. Meanwhile, the data of C235 is moved to (D41,
D40) data register.
X0
X1
X2
MOV K10 D0
MOV T0 D10
DMOV D20 D30
DMOV C235 D40

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API Mnemonic Operands Function
13

SMOV P

Shift Move
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * *
m
1
* *
m
2
* *
D * * * * * * * *
n * *
SMOV, SMOVP: 11 steps


PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Data source m
1
: Source position (nibble) of the first digit to be moved m
2
: Number of source
digits (nibbles) to be moved D: Destination n: Destination position for the first digit (nibble)
Explanation:
1. BCD mode(M1168=OFF):
This mode of the SMOV operation allows BCD numbers to be manipulated in exactly the same
way as the normal SMOV manipulates decimal numbers, i.e. This instruction copies a specified
number of digits from a 4 digit BCD source(S) and places them at a specified location within a
destination (D) number (also a 4 digit BCD number).
2. BIN mode(M1168=ON) :
This instruction copies a specified number of digits from a 4 digit decimal source (S) and places
them at a specified location within a destination (D) number (also a 4 digit decimal). The existing
data in the destination is overwritten.
Points to note:
1. The range of m
1
: 1 4
2. The range of m
2
: 1 m
1
(cannot be great than m
1
)
3. The range of n: m
2
4 (cannot be less than m
2
)
Program Example 1:
1. When M1168=OFF and X0=ON, two digits starting from the 4th digit (most significat digit MSD) of
D10 (decimal number) and move them to the two digits from the 2nd digit (3rd MSD) of D20
(decimal number). The content of 103 and 100 of D20 remain unchaged after SMOV is executed.
2. If the source is not a valid BCD number an operation error will occur in ELC. The instruction will not
be executed and M1067 and M1068 = ON, D1067 = error code H0E18.
ELC Syst em Manual

6- 58
SMOV
M1168
D10 K2 D20 K3 K4
10
3
10
2
10
1
10
0
10
3
10
2
10
1
10
0
No variation No variation
D10(BIN 16bit)
D10(BCD 4 digits)
D20(BIN 16bit)
D20(BCD 4 digits)
Shift move
Auto conversion
Auto conversion
M1001
X0

3. If D10=H1234, D20=H5678 before execution, D10 remains unchange and D20=H5128 after
execution.
Program Example 2:
When M1168=ON and X0=ON, SMOV is executed and D10 and D20 will move nibble data in hex
format.
SMOV
M1168
D10 K2 D20 K3 K4
No variation No variation
D10(BIN 16bit)
D20(BIN 16bit)
Shift move
M1000
X0
Digit 4 Digit 3 Digit 2 Digit 1
Digit 4 Digit 3 Digit 2 Digit 1

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Program Example 3:
Move the right second digit switch to the right second digit of D2 and move the left first digit switch to the
right first digit of D1.
Use SMOV to move the first digit to the third digit of D2 and combine these two digit switches into one
group.
10
1
10
0
10
2
6 4 2
ELC
X33~X30 X27~X20
8 8 8
M1000
BIN K2X20 D2
D1
SMOV D1 K1 D2 K3 K1
K1X30 BIN
(X20~X27)BCD,
(X30~X33)BCD,
2 digits D2(BIN)
1 digit D1(BIN)
M1001
M1168


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API Mnemonic Operands Function
14

D CML P

Compliment and Move
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D

* * * * * * * *
CML, CMLP: 5 steps
DCML, DCMLP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Data source D: Destination
Explanations:
1. Take the data in the source S, compliment (01, 10) it and move to the assigned destination D.
2. If operand S and D use index register F, only a 16 bit compare is available
Program Example :
When X20=ON, contents of D1, b0~b3, will be complimented and moved to K1Y0.
X20
CML K1Y0 D1

b0 b1 b2 b3 b15
D1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Symbol bit 0=positive, 1=negative) (
0 1 0 1
No variation Transfer data

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API Mnemonic Operands Function
15

BMOV P

Block Move
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * *
D

* * * * * *
n * *
BMOV, BMOVP: 7 steps


PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination n: Number of data to move
Explanations:
1. This instruction is used to move an assigned block of multiple data to a new destination. Move the
contents of S through S + n to D through D + n registers. If the n assigned points exceed the range
of the device, only those that are within the valid range will be moved.
2. The range of n=1 512.
3. PB models do not support KnX, KnY, KnM, KnS devices.
Program Example 1:
When X20=ON, move the contents of the four registers D0~D3 to their corresponding registers
D20~D23.
X20
D20 K4 D0
D1
D2
D3
D20
D21
D22
D23
n=4
D0 BMOV

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Program Example 2:
If BMOV is used to move bits, KnX, KnY, KnM, KnS, the digit numbers of S and D should be of the same
data type.
M1000
K1M0 K1Y0 K3 M0
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
n=3
M11
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y10
Y11
Y12
Y13
BMOV

Program Example 3:
The BMOV instruction will opererate differently, automatically, to prevent errors when S and D coincide.
1. When S > D, the BMOV instruction is processed in the order 123.
X20
BMOV D20 D19 K3
D19
D20
D21
D20
D21
D22
2
1
3

2. In PV, when S < D, the instruction is processed following the order 123
D11
D13
X11
BMOV D10 D11 K3
D10
D11
D12
1
3
2

3. In PB/PC/PA/PH, when S < D, the BMOV instruction is processed in the order 321, then
D11~D13 all equal to D10.
D11
D13
X21
BMOV D10 D11 K3
D10
D11
D12
1
3
2


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API Mnemonic Operands Function
16

D FMOV P

Fill and Move
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D

* * * * * *
n * *
FMOV, FMOVP: 7 steps
DFMOV, DFMOVP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination n: Number of data to move
Explanations:
1. This instruction is used to move an assigned block of multiple data to a new destination. Move the
contents of S through S + n to D through D + n registers. If the n -assigned points exceed the
range of the device, only those that are within the valid range will be moved.
2. PB models do not support KnX, KnY, KnM, and KnS devices.
3. If operand S use index register F, only a 16 bit compare is available
4. The range of n: 1~ 512(16-bit instruction), 1~ 256 (32-bit instruction)
Program Example:
When X20=ON, move constant K10 to the continuous five registers (D10~D14) starting from D10.
X20
D10 K5 FMOV K10
K10
K10
K10
K10
K10
K10 D10
D11
D12
D13
D14
n=5

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API Mnemonic Operands Function
17

D XCH P

Exchange
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D
1
* * * * * * * *
D
2
* * * * * * * *
XCH, XCHP: 5 steps
DXCH, DXCHP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D
1
: First exchange device D
2
: Second exchange device
Explanations:
1. Exchange the contents of D
1
and D
2
with each other.
2. This instruction is best used as pulse execution (XCHP).
3. If operand D1 and D2 use index register F, only a 16-bit compare is available.
Program Example:
When X0=OFFON, the contents of D20 and D40 exchange with each other.
X0
D40 XCHP D20
Before
execution
After
execution
120
120 40
40 D20
D40
D20
D40

Points to note:
1. When D
1
and D
2
are the same, and M1303=ON, the upper and lower 16-bits will be exchanged.
PB is not support.
2. When X0=ON and M1303=ON, the upper and lower 16-bit contents of D100, D101 will exchange.
X0
M1303
9
20
20
9
D100L
D100H
8
40
40
8
D101L
D101H
D100L
D100H
D101L
D101H
DXCHP D100 D100
Before
execution
After
execution


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API Mnemonic Operands Function
18

D BCD P

Convert BIN to BCD
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * *
D

* * * * * * * *
BCD, BCDP: 5 steps
DBCD, DBCDP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Converted result
Explanations:
1. Convert BIN data (0 to 9999) of S into BCD and transfer the result to D.
2. If the BCD conversion result is outside the valid range of 0 to 9999 (16-bit) or 0 to 99,999,999
(32-bit), an operation error occurs, the error flag M1067 and M1068 =ON, and D1067 will hold
error code H0E18.
3. If operand S and D use index register F, only a 16-bit compare is available.
4. Flags: M1067 (operation error), M1068 (operation error), D1067 (error code)
Program Example:
1. When X0=ON, the binary data D10 is converted into BCD number, and stored at K1Y0 (Y0~Y3).
BCD D10 K1Y0
X0

2. When D10=001E(Hex)=0030(decimal), the result will be Y0~Y3=0000(BIN).

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API Mnemonic Operands Function
19

D BIN P

Convert BCD to BIN
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * *
D

* * * * * * * *
BIN, BINP: 5 steps
DBIN, DBINP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Converted result
Explanations:
1. Converts BCD data (0 to 9,999) of S into BIN and transfer the result to D.
2. The valid range of source S: BCD (0 to 9,999), DBCD (0 to 99,999,999)
3. If the content of S is not a valid BCD value, an operation error will occur, error flags M1067 and
M1068 =ON, and D1067 holds error code H0E18.
4. If operand S and D use index register F, only a 16-bit compare is available.
5. Flags: M1067 (operation error), M1068 (operation error), D1067 (error code)
Program Example:
When X0=ON, the BCD data K1X20 is converted to BIN data, and result stored at D10.
X0
BIN D10 K1X20

1. The BIN instruction is used to covert the source data into BIN data and store in the ELC, when
ELC reads a BCD value i.e. digit switch connected externally.
2. When X0=ON, convert K4X20 (BCD data) into BIN data and transmit it to D100. Then, convert BIN
data of D100 into BCD data and transmit it to K4Y20.
BCD D100 K4Y20
X0
BIN D100 K4X20

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10
1
10
0
10
2
6 4 2
X37 X20
10
3
6
8
4 digit BCD format switch
4 digit BCD format
7-segment display
Y37 Y20
4 digit BCD value
Use the BIN command to
store BIN value into D100
Use the BCD command to
convert the BIN value in D100
Convert to be 4 digit BCD value
8 8 8 1 1 1 1


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API Mnemonic Operands Function
20

D ADD P

Addition
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D

* * * * * * * *
ADD, ADDP: 7 steps
DADD, DADDP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Augend S
2
: Addend D: Addition result
Explanations:
1. The data contained within the source devices (S
1
, S
2
) is combined and the total is stored at the
specified destination device (D).
2. The most significant bit are the sign bit. 0 indicates positive and 1 indicates negative. All
calculation are algebraically processed, i.e. 3 + (-9) = -6.
3. If operands S1, S2, D use index F, then only 16-bit instruction is available.
4. Flags: M1020 (Zero flag), M1021 (Borrow flag), M1022 (Carry flag)
Program Example 1:
16-bit instruction:
When X0 = ON, the data in D0 and data in D10 are added together and the result stored in D20. D0 and
D10 are unchanged.
X0
ADD D0 D10 D20

(D0) + (D10) = (D20)
Program Example 2:
32-bit instruction:
When X0 = ON, the data in (D31, D30) and data in (D41, D40) are added together and the result stored
in (D51, D50). (D31, D30) and (D41, D40) are unchanged. (D30, D40, D50 is the lower 16-bit data,
while D31, D41, D51 is the higher 16-bit data)
X0
DADD D30 D40 D50

(D31, D30) + (D41, D40) = (D51, D50)

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Flag operations:
16-bit instruction:
1. If the operation result is 0, then the Zero flag, M1020 is set to ON.
2. If the operation result exceeds -32,768, the borrow flag, M1021 is set to ON.
3. If the operation result exceeds 32,767, the carry flag, M1022 is set to ON.
32-bit instruction:
1. If the operation result is 0, then the Zero flag, M1020 is set to ON.
2. If the operation result exceeds -2,147,483,648, the borrow flag, M1021 is set to ON.
3. If the operation result exceeds 2,147,483,647, the carry flag, M1022 is set to ON
-2 -1 0 -32,768 -1 0 1 32,767 0 1 2
-2 -1 0 -2,147,483,648 -1 0 1 2,147,483,647 0 1 2
16-bit command: Zero flag
Zero flag
Zero flag
Borrow flag
the most significant bit
becomes 1 (negative)
32-bit command: Zero flag
Zero flag Zero flag
the most significant bit
becomes 0 (positive)
Carry flag
Borrow flag
the most significant bit
becomes 1 (negative)
the most significant bit
becomes 0 (positive)
Carry flag


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API Mnemonic Operands Function
21

D SUB P

Subtraction
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D

* * * * * * * *
SUB, SUBP: 7 steps
DSUB, DSUBP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Minuend S
2
: Subtrahend D: Subtraction result
Explanations:
1. The data contained within the source device, S
2
is subtracted from the contents of source device
S
1
. The result or remainder of this calculation is stored in the destination device D.
2. The most significant bit are the sign. 0 indicates positive and 1 indicates negative. All calculation
are algebraically processed.
3. If operand S
1
, S
2
, D use index F, then only 16-bit instruction is available.
4. Flags: M1020 (Zero flag), M1021 (Borrow flag), M1022 (Carry flag). The flag operations ADD
instruction can also be similarly applied to the subtract instruction.
Program Example 1:
16-bit instruction:
When X0 = ON, the data in D10 is subtracted from the data in D0 and the result is placed in D20.
X0
SUB D0 D10 D20

(D0) (D10) = (D20)
Program Example 2:
32-bit instruction:
When X20 = ON, the data in (D41, D40) is subtracted from the data in (D31, D30) and the result is
placed in (D51, D50). (D30, D40, D50 is the lower 16-bit data, and D31, D41, D51 is the higher 16-bit
data)
X20
DSUB D30 D40 D50

(D31, D30) (D41, D40) = (D51, D50)

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API Mnemonic Operands Function
22

D MUL P

Multiplication
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
D

* * * * * * *
MUL, DMULP: 7 steps
DMUL, DMULP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV

Operands:
S
1
: Multiplicand S
2
: Multiplier D: Multiplication result
Explanations:
1. The contents of the two source devices (S
1
, S
2
) are multiplied together and the result is stored at
the destination device (D). Note the normal rules of algebra apply.
2. If operands S
1
, S
2
use index F, then only 16-bit instruction is available.
3. If operand D use index E, then only 16-bit instruction is available.
4. 16-bit instruction
b15................ b00
X =
b15................ b00 b31............ b16 b15............. b00
+1
b15 is a symbol bit b15 is a symbol bit b31 is a symbol bit(b15 of D+1)
b15=0,S1 is a positive value
b15=1,S1 is a negative value
b15=0,S2 is a positive value
b15=1,S2 is a negative value
b31=0,D(D+1) is a positive value
b31=1, is a negative value D(D+1)

When D is a bit device, it can specify K1~K4 to produce a 16-bit result and occupies 2 of
continuous 16-bit.
5. 32-bit instruction
b31.. b16
X
=
+1
b31 is a symbol bit b31 is a symbol bit b63 is a symbol bit(b15 of D+3)
b31=0,S1(S1+1) are positive value
b31=1,S1(S1+1) are negative value
b31=0,S2(S2+1) are positive value
b31=1,S2(S2+1) are negative value
b63=0, D~(D+3) are positive value
b63=1, D~(D+3) are negative value
b15.. b00 b31.. b16 b15.. b00
+1
b63. b48 b47. b32 b31. b16 b15. b00
+3 +2 +1
When D is a bit device, it can specify K1~K8 and produce a 32-bit result. The destination device in
PB, is used to store low 32-bit data only. PC/PA/PH will store all 64-bit data.
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Program Example:
The value in D10 is multiplied by the value in D0 and the total is a 32-bit result stored in (D21, D20). The
upper 16-bit data is stored in D21 and the lower one is stored in D20. The polarity of the result is
indicated by the OFF/ON of the most significant bit. OFF indicates the value of positive (0) and ON
indicates the value of negative (1).
X0
MUL D0 D10 D20

(D0) (D10) = (D21, D20)
16-bit 16-bit = 32-bit

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API Mnemonic Operands Function
23

D DIV P

Division
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
D

* * * * * * *
DIV, DIVP: 7 steps
DDIV, DDIVP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: dividend S
2
: divisor D: Quotient and Remainder
Explanation:
1. The primary source (S
1
) is divided by the secondary source (S
2
). The result is stored in the
destination (D). Not the normal rules of algebra.
2. This instruction is not executed when the divisor is 0. Then, the flag M1067, M1068 = ON and
D1067 holds error code H0E19.
3. If operands S
1
, S
2,
D use index F, then only 16-bit instruction is available.
4. 16-bit instruction:
+1
= /
Quotient Remainder
b15.............b00 b15.............b00 b15.............b00 b15.............b00
S1 S2 D D

When D is a bit device, it can specify K1~K4 to produce a 16-bit result and occupies 2 of continuous
16-bit for quotient and remainder.
5. 32-bit instruction:
+1
/ =
+1 +1
b15..b00
Remainder
b15..b00 b15..b00 b15..b00 b31..b16 b15..b00 b31..b16 b15..b00
Quotient
S1 S1 S2 S2 D D +3 D +2 D

When D is a bit device, it can specify K1~K8 and produce a 32-bit quotient for PB, and occupies 2 of
continuous 32-bit for quotient and remainder for PC/PA/PH.
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Program Example:
When X0 = ON, the value in D0 (dividend) is divided by the value in D10 (divisor). The quotient is stored
in D20 and the remainder is stored in D21. The polarity of the result is indicated by the OFF/ON of the
most significant bit. OFF indicates the value of positive and ON indicates the value of negative.
X0
DIV D0 D10 D20

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API Mnemonic Operands Function
24

D INC P

Increment
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * * * * * * *
INC, INCP: 3 steps
DINC, DINCP: 5 steps
PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Destination
Explanations:
1. If the instruction is not in pulse mode, 1 is added to the value of destination D every execution of
the instruction. Which is potentially every scan.
2. This instruction works best using pulse mode (INCP, DINCP).
3. In 16-bit instruction, when +32,767 is reached, 1 is added and it will write a value of 32,768 to
the destination. In 32-bit instruction, when +2,147,483,647 is reached, 1 is added and it will write
a value of -2,147,483,648 to the destination.
4. Flag M1020~M1022 wont be affected by the operation result of this instruction.
5. If operand D uses index F, then only 16-bit instruction is available.
Program Example:
When X0 = OFF ON, the content of D0 will be incremented by 1.
X0
INCP D0


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API Mnemonic Operands Function
25

D DEC P

Decrement
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * * * * * * *
DEC, DECP: 3 steps
DDEC, DDECP: 5 steps
PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Destination
Explanation:
1. If the instruction is not in pulse mode, 1 is subtracted to the value of destination D on every
execution of the instruction. Which is potentially every scan.
2. This instruction is usually works best using pulse mode (DECP, DDECP).
3. In 16-bit instruction, when 32,768 is reached, 1 is subtracted and it will write a value of +32,767
to the destination. In 32-bit instruction, when -2,147,483,648 is reached, 1 is subtracted and it will
write a value of +2,147,483,647 to the destination.
4. Flag M1020~M1022 wont be affected by the operation result of this instruction.
5. If operand D use index F, then only 16-bit instruction is available.
Program Example:
When X0 = OFF ON, the value in D0 will be decremented by 1.
X0
DECP D0


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API Mnemonic Operands Function
26

WAND P

Logical AND 16-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D

* * * * * * * *
WAND, WANDP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First data source S
2
: Second data source D: Operation result
Explanations:
1. The bit patterns of the two source devices are analyzed (the contents of S
2
is compared against
the contents of S
1
). The result of the logical AND analysis is stored in the destination device (D).
2. See DAND for information about this instruction.
Program Example:
When X0 = ON, the 16-bit source D0 and D2 are analyzed and the operation result of the logical WAND
is stored in D4.
WAND
X0
D0 D2 D4


0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
WAND
b15 b00
Before
execution
After
execution
D0
D2
D4

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API Mnemonic Operands Function
26

DAND P

Logical AND 32-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
D

* * * * * * *
DAND, DANDP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First data source S
2
: Second data source D: Operation result
Explanations:
1. Logical Double word AND operation.
2. The bit patterns of the two source devices are analyzed (the contents of S
2
is compared against
the contents of S
1
). The result of the logical AND analysis is stored in the destination device (D).
Program Example:
When X1 = ON, the 32-bit source (D11, D10) and (D21, D20) are analyzed and the result of the logical
DAND is stored in (D41, D40).
X1
DAND D10 D20 D40

0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
DAND
b31
Before
execution
After
execution
0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
b15 b0
D11 D10
D21 D20
D41 D40

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API Mnemonic Operands Function
27

WOR P

Logical OR 16-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D

* * * * * * * *
WOR, WORP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First data source S
2
: Second data source D: Operation result
Explanations:
1. The bit patterns of the two source devices are analyzed (then contents of S
2
is compared against
the contents of S
1
). The result of the logical OR analysis is stored in the destination device (D).
2. See DOR for information about this instruction.
Program Example:
When X0 = ON, the 16-bit data source D0 and D2 are analyzed and the result of the logical WOR is
stored in D4.
X0
WOR D0 D2 D4

0 0 1 1 1 1 1 1
0 0 0 0 0 0 1 1 1 1
0 0 0 0 1 1 1
WOR
b15 b00
0 0 0 0 0 0 1 1
0 1 1 1 0 1
1 1 1 1 1 1 1 1 1
Before
execution
After
execution
1
D0
D2
D4

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API Mnemonic Operands Function
27

DOR P

Logical OR 32-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
D

* * * * * * *
DOR, DORP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First data source S
2
: Second data source D: Operation result
Explanations:
1. Logical Double word OR operation.
2. The bit patterns of the two source devices are analyzed (then contents of S
2
is compared against
the contents of S
1
). The result of the logical OR analysis is stored in the destination device (D)
Program Example:
When X1 is ON, the 32-bit data source (D11, D10) and (D21, D20) are analyzed and the operation result
of the logical DOR is stored in (D41, D40).
X1
DOR D10 D20 D40

b31
Before
execution
After
execution
D11 D10 DOR
b
0 0 1 1 1 1 1 1
0 0 0 0 0 0 1 1 1 1
0 0 0 0 1 1 1
b15 b0
0 0 0 0 0 0 1 1
0 1 1 1 0 1
1 1 1 1 1 1 1 1 1
D21 D20
D41 D40
0 0 1 1 1 1 1 1 0 0 0 0 0 0 1 1
0 0 0 0 0 0 1 1 1 1 0 1 1 1 0 1
0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1


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28

WXOR P

Exclusive XOR 16-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D

* * * * * * * *
WXOR, WXORP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First data source S
2
: Second data source D: Operation result
Explanations:
1. The bit patterns of the two source devices are analyzed (then contents of S
2
is compared against
the contents of S
1
). The result of the logical XOR analysis is stored in the destination device (D)
2. See DXOR for information about this instruction.
Program Example:
When X0 = ON, the 16-bit data source D0 and D2 are analyzed and the operation result of the logical
WXOR is stored in D4.
0 0 1 1 1 1 1 1
0 0 0 0 0 0 1 1 1 1
0 0 0 0 1 1 0
WOR
b15 b00
0 0 0 0 0 0 1 1
0 1 1 1 0 1
1 1 0 0 1 1 1 1 0
WXOR
Before
execution
After
execution
D0 D2 D4
X0
D0
D2
D4

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API Mnemonic Operands Function
28

DXOR P

Exclusive XOR 32-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
D

* * * * * * *
DXOR, DXORP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: First data source S
2
: Second data source D: Operation result
Explanations:
1. Logical Double word XOR operation.
2. The bit patterns of the two source devices are analyzed (then contents of S
2
is compared against
the contents of S
1
). The result of the logical DXOR analysis is stored in the destination device (D)
Program Example:
When X1 = ON, the 32-bit data source = (D11, D10) and (D21, D20) are analyzed and the operation
result of the logical DXOR = is stored in (D41, D40).
X1
DXOR D10 D20 D40


b31
Before
execution
After
execution
D11 D10 DXOR
b
D21 D20
D41 D40
1 1 1 1 0 0 0
b15
1 1 1 1 1 1 0 0
0 0
0 0 1 1 1 1 1 1
1 1 1 1 1 1 1
b0
1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1
0 0 0 1 0 0 0 1 0 1 1 0 0 1 0 0 0 0 0 1 0 0 0 1 0 1 1 0 0 1 0 0
1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1


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API Mnemonic Operands Function
29

D NEG P

Negative (2s Compliment)
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * * * * * * *
NEG, NEGP: 3 steps
DNEG, DNEGP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Store the operation of 2s Compliment
Explanations:
1. The bit pattern of the selected device is inverted. This means any occurrence of a 1 becomes a
0 and any occurrence of a 0 will be written as a 1. When this is complete, a further binary 1 is
added to the bit pattern. The result is the total logical sign change of the selected devices contents,
e.g. a positive number will become a negative number or a negative number will become a positive.
2. This instruction is usually works best using pulse instruction (NEGP, DNEGP).
3. If operand D uses index F, then only 16-bit instruction is available.
Program Example 1:
When X0 goes from OFF ON, all bits of D10 will be negative (01, 10) and then 1 will be added
and saved in the original register, D10.
X0
NEGP D10

Program Example 2:
Obtaining the absolute value of a negative value:
1. When the 15th bit of D0 is 1, M0 = ON. (D0 is a negative value).
2. When M0 = ON, the absolute value of D0 can be obtained using the NEG instruction.
M1000
BON D0 K15 M0
M0
NEGP D0

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Indication of the negative value and absolute value
1. The content of the most significant bit of the register indicates whether the value is positive or
negative. It is a positive value when the most significant bit (MSB) = 0 and it is a negative value
when the MSB = 1.
2. If it is a negative value, the absolute value can be obtained by using the NEG instruction (API 29).
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
(D0=2)
(D0=1)
(D0=0)
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
(D0=-1)
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
(D0)+1=1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
(D0=-2)
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
(D0)+1=2
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1
(D0=-3)
0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0
(D0)+1=3
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0
(D0=-4)
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
(D0)+1=4
1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1
(D0=-5)
0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
(D0)+1=5
1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1
(D0=-32,765)
1 1 1 1 1 1 1 1 0 1 1 1 1 0 1 1
(D0)+1=32,765
1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
(D0=-32,766)
1 1 1 0 1 1 1 1 0 1 1 1 1 1 1 1
(D0)+1=32,766
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
(D0=-32,767)
1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1
(D0)+1=32,767
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
(D0=-32,768)
(D0)+1=-32,768
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Max. absolute value is 32,767

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API Mnemonic Operands Function
30

D ROR P

Rotate Right
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * * * * * * *
n * *
ROR, RORP: 5 steps
DROR, DRORP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Destination n: Number of bit to rotate
Explanations:
1. All the bits of D are rotated n bit places to the right on every operation of the instruction. Which is
potentially every scan.
2. The status of the last bit rotated is copied to the carry flag M1022 (Carry flag)
3. This instruction is usually works best using pulse instruction (RORP, DRORP).
4. If operand D uses index F, then only 16-bit instruction is available.
5. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) is valid.
6. Valid range of operand n: 1 n 16 (16-bit), 1 n 32 (32-bit)
Program Example:
When X0 goes from OFF ON, the 16 bit data of D10 will rotate 4 bits to the right, as shown in the
diagram, bit b3 (prior to rotation) will be moved to the carry flag (CY) M1022.
0 1 1 1 0 1 0 1 0 0 1 1 1 0 0 1
0 1 0 1 1 1 0 0 1 1 1 1 0 0 1 0 0
Upper bit Lower bit
Upper bit lower bit
*
X0
RORP D10 K4
Rotate to the right
16 bits
Carry
flag
Carry
flag
After one rotation
to the right
D10
D10
M1022 M1022
M1022

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API Mnemonic Operands Function
31

D ROL P

Rotate Left
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * * * * * * *
n * *
ROL, ROLP: 5 steps
DROL, DROLP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Destination n: Number of bit to rotate
Explanation:
1. All the bits of D are rotated n bit places to the left on every operation of the instruction. Which is
potentially every scan.
2. The status of the last bit rotated is copied to the carry flag M1022.
3. This instruction is usually works best using pulse instruction (ROLP, DROLP).
4. If operand D uses index F, then only 16-bit instruction is available.
5. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) are valid.
6. Valid range of operand n: 1 n 16 (16-bit), 1 n 32 (32-bit)
Program Example:
When X0 goes from OFF ON, all 16 bits of D10 will rotate 4 bits to the left, as shown in the diagram,
and b12 (prior to rotation) will be moved to the carry flag (CY) M1022.
X0
D10 K4
1 1 1 1 1 1 0 0 0 0 0 1 1 0 0 0
1 1 0 0 0 0 0 1 1 0 0 1 1 0 1 1 1
16 bits
Rotate to the left
After one rotation
to the left
Carry
flag
Carry
flag
D10
D10
Upper bit
Upper bit
Lower bit
Lower bit
ROLP
M1022
M1022

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API Mnemonic Operands Function
32

D RCR P

Rotate Right with Carry
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * * * * * * *
n * *
RCR, RCRP: 5 steps
DRCR, DRCRP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Destination n: Number of bit to rotate
Explanation:
1. All the bits of D are rotated n bit places to the right including the carry flag on every operation of
the instruction. Which is potentially every scan.
2. The status of the last bit rotated is moved into the carry flag M1022. On the following operation of
the instruction M1022 is the first bit to be moved back into the destination device.
3. This instruction works best with the pulse instruction (RCRP, DRCRP).
4. If operand D uses index F, then only 16-bit instruction is available.
5. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) are valid.
6. Valid range of operand n: 1 n 16 (16-bit), 1 n 32 (32-bit)
Program Example:
When X0 goes from OFF ON, the 16 bit value in D10, including the carry flag (M1022), will rotate 4
bits to the right, as shown in the diagram, b3 (prior to rotation) will be moved to the carry flag M1022,
and that the original contents of the carry flag M1022 will be moved to the bit of b12.
0 0 0 1 1 1 0 0 0 1 0 0 1 0 0 1
1 0 0 0 1 1 0 0 1 1 1 0 0 0 0 0 1
X0
D10 K4
Rotate to the right
16 bits
Carry
flag
Carry
flag
After one rotation
to the right
Lower bit
Lower bit Upper bit
Upper bit
1 D10
D10
RCRP
M1022
M1022
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API Mnemonic Operands Function
33

D RCL P

Rotate Left with Carry
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * * * * * * *
n * *
RCL, RCLP: 5 steps
DRCL, DRCLP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Destination n: Number of bit to rotate
Explanations:
1. All the bits of D are rotated n bit places to the left including the carry flag on every operation of the
instruction. Which is potentially every scan.
2. The status of the last bit rotated is moved into the carry flag M1022. On the following operation of
the instruction M1022 is the first bit to be moved back into the destination device.
3. This instruction works best with the pulse instruction (RCLP, DRCLP).
4. If operand D uses index F, then only 16-bit instruction is available.
5. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) is valid.
6. Valid range of operand n: 1 n 16 (16-bit), 1 n 32 (32-bit)
Program Example:
When X0 goes from OFF ON, the 16 bit value in D10, including the carry flag (M1022), will rotate 4
bits to the left, as shown in the diagram, b12 (prior to rotation) will be moved to the carry flag M1022,
and that the original contents of the carry flag M1022 will be moved to the bit of b3.
X0
D10 K4
1 1 1 1 1 1 0 0 0 0 0 1 1 0 0 0
1 1 0 0 0 0 0 1 0 0 0 0 1 1 1 1
16 bits
Rotate to the left
After one rotation
to the left
Carry
flag
Carry
flag
Upper bit Lower bit
Upper bit
Lower bit
D10
D10
RCLP
M1022
M1022
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API Mnemonic Operands Function
34

SFTR P

Bit Shift Right
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * *
D

* * *
n
1
* *
n
2
* *
SFTR, SFTRP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination n
1
: Number of bits to shift n
2
: Number of bits to shift at one time
Explanation:
1. Shift n
1
bits of S to the right by n
1
bits. Shift n
2
bits of D to the right.
2. This instruction works best with the pulse instruction (SFTRP).
3. Valid range of operand n1, n2 : 1 n2 n1 1024, In PB models: 1 n2 n1 512
Program Example:
1. When X0 OFF ON, the 16 bit data of M0~M15 will shift 4 bits to the right. And 4 bits from X0 into
the upper order bits of M0.
2. Please refer to the following n~r steps to perform SFTR instruction during a single scan.
n M3~M0 Carry
o M7~M4 M3~M0
p M11~M8 M7~M4
q M15~M12 M11~M8
r X3~X0 M15~M12 complete
X0
SFTR X0 M0 K16 K4
X3 X2 X1 X0
M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
1 2 3 4
5
4 bits in a group shift to the right
Carry

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API Mnemonic Operands Function
35

SFTL P

Bit Shift Left
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * *
D

* * *
n
1
* *
n
2
* *
SFTL, SFTLP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination n
1
: Number of bits to shift n
2
: Number of bits to shift at one time
Explanations:
1. Shift n
1
bits of S to the left by n
1
bits. Shift n
2
bits of D to the left.
2. This instruction works best with the pulse instruction (SFTLP).
3. Valid range of operand n1, n2 : 1 n2 n1 1024, In PB models: 1 n2 n1 512
Program Example:
1. When X0 OFF ON, the 16 bit data of M0~M15 will shift 4 bits to the left. And 4 bits from X0 into
the low order bits of M0.
2. Please refer to the following n~r steps to perform SFTR instruction during a single scan.
n M15~M12 Carry
o M11~M8 M15~M12
p M7~M4 M11~M8
q M3~M0 M7~M4
r X3~X0 M3~M0 complete
X0
SFTR X0 M0 K16 K4
X3 X2 X1 X0
M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
1 2 3 4
5
4 bits in a group shift to the left
Carry

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API Mnemonic Operands Function
36

WSFR P

Word Shift Right
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * *
D

* * * * * *
n
1
* *
n
2
* *
WSFR, WSFRP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination n
1
: Number of registers to shift n
2
: Number of registers to shift at one
time
Explanations:
1. Shift n
1
registers of S to the right by n
1
registers. Shift n
2
registers of D to the right.
2. This instruction works best with the pulse instruction (WSFRP).
3. When using operand S and D for bit data types, the data type must be equal, for example, one
kind is the KnX, KnY, KnM, KnS and the other kind is T, C, D.
4. When using operand S and D bit data types, the Kn value must be equal.
5. Valid range of operand n1, n2 : 1 n2 n1 512
Program Example 1:
1. When X0 OFF ON, the registers starting at D20~D35 will shift 4 registers to the right. And 4
registers from D10 will shift into the upper registers of the destination.
2. Please refer to the following n~r steps to perform WSFR instruction during a single scan.
n D23~D20 Carry
o D27~D24 D23~D20
p D31~D28 D27~D24
q D35~D32 D31~D28
r D13 ~D10 D35~D32 complete
X0
WSFRP D10 K16 D20 K4
D13 D12 D11 D10
D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20
1 2 3 4
5
4 registers in one group shift to the right
Carry

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Program Example 2:
1. When X0 OFF ON, the bit registers of Y20~Y37 are series a shift area and shift 2 digits to the
right.
2. Please refer to the following n~p steps to perform WSFR instruction of one time shift.
n Y27~Y20 carry
o Y37~Y30 Y27~Y20
p X27~X20 Y37~Y30 complete
X0
WSFRP K1X20 K4 K2
X27 X26 X25 X24
Y37 Y36 Y35 Y34 Y33 Y32 Y31 Y30 Y27 Y26 Y25 Y24 Y23 Y22 Y21 Y20
1
2
3
2 digits shift to the right
Carry
K1Y20
When using Kn device, the specified value must be equal
X23 X22 X21 X20


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API Mnemonic Operands Function
37

WSFL P

Word Shift Left
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * *
D

* * * * * *
n
1
* *
n
2
* *
WSFL, WSFLP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination n
1
: Number of registers to shift n
2
: Number of registers to shift at one
time
Explanations:
1. Shift n
1
registers of S to the left by n
1
registers. Shift n
2
registers of D to the left.
2. This instruction works best with the pulse instruction (WSFLP).
3. When using operand S and D for bit data types, the data type must be equal, for example, one
kind is the KnX, KnY, KnM, KnS and the other kind is T, C, D.
4. When using operand S and D bit data types, the Kn value must be equal.
5. Valid range of operand n1, n2 : 1 n2 n1 512
Program Example:
1. When X0 OFF ON, the registers starting at D20~D35 will shift 4 registers to the left. And 4
registers from D10 will shift into the lower registers of the destination.
2. Please refer to the following n~r steps to perform WSFL instruction during a single scan.
n D35~D32 Carry
o D31~D28 D35~D32
p D27~D24 D31~D28
q D23~D20 D27~D24
r D13~D10 D23~D20 complete
1 3 4
5
2
4 registers in one group shift to the left
Carry
X0
WSFLP D10 K16 D20 K4
D13 D12 D11 D10
D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20

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API Mnemonic Operands Function
38

SFWR P

Shift Register Write
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D

* * * * * *
n * *
SFWR, SFWRP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source device which the data is written in D: Head address device n: Data length
Explanations:
1. n is the length of the First-in/First-out queue and the destination device
2. D is the head address device of the First-in/First-out queue. Use the first number device D as the
pointer and add 1 to the content value of the pointer when executing this instruction. The contents
of the devices specified by S are written into the position specified by the pointer D of the
First-in/First-out queue.
3. If the contents of the pointer D exceed the value n-1, the insertion into the First-in/First-out queue
will stop and the carry flag M1022 will be turned ON.
4. This instruction works best with the pulse instruction (SFWRP).
5. Valid range of operand n: 2 n 512
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Program Example:
1. First, X20=ON reset the content of D0 to 0. When X0 goes from OFF to ON, the content of D0
becomes 1 when the content of D20 is created and built in D1. After changing the content of D20,
X0 is executed to goes from OFF to ON again, then the content of D0 becomes 2 when the
content of D20 is created and built in D2.
2. Please refer to the following n~osteps to perform SFWR instruction.
n The content of D20 is created and built in D1.
o The content of D0 becomes 1.
X20
RST D0
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D20
X0
SFWRP D20 K10 D0
Reset the content of D0 to 0 (zero) previously
Pointer
n = 10 points
D0 = 3 2 1

Points to note:
This API 38 SFWR instruction can be used with the API 39 SFRD instruction to execute the
Write-in/Read Control of the First-in/First-out queue.

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API Mnemonic Operands Function
39

SFRD P

Shift Register Read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * *
D

* * * * * * * *
n * *
SFRD, SFRDP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Head address device D: destination device n: Data length
Explanation:
1. n is the length of the First-in/First-out queue and the source device S is the head address device of
the First-in/First-out queue. Use the first number device S as the pointer and subtract 1 to the
content value of the pointer when executing this instruction. The contents of the devices specified
by S are written into the position specified by the pointer of the First-in/First-out queue.
2. If the contents of the pointer S are equal to 0 (zero), the First-in/First-out queue will be empty and
the zero flag M1020 will be turned ON.
3. This instruction works best with the pulse instruction (SFRDP).
4. Valid range of operand n: 2 n 512
Program Example:
1. When X0 goes from OFF to ON, D9~D2 are all shifted one register to the right and the pointer
content of D0 is subtracted by 1 when the content of D1 is read and moved to D21.
2. Please refer to the following n~p steps to perform SFRD instruction.
n The content of D1 is read and moved to D21.
o D9~D2 are all shifted one register to the right.
p The content of D0 is subtracted by 1.
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D21
X0
SFRDP D0 K10 D21
n = 10 points
Data read
Pointer


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API Mnemonic Operands Function
40

ZRST P

Zone Reset
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D
1
* * * * * *
D
2
* * * * * *
ZRST, ZRSTP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D
1
: Starting destination D
2
: Ending destination
Explanations:
1. When D
1
> D
2
, then only device D
2
is reset.
2. PB models, standard and High speed counters cannot be mixed.
3. This instruction works best with the pulse instruction (ZRSTP).
4. Operand D
1
and D
2
must be the same data type, Valid range: D
1
D
2
.
Program Example:
1. When X0 = ON, M300 to M399 will be reset to OFF.
2. When X1 = ON, C0 to C127 will all be reset. Their present value =0 , coil output will be reset to
OFF.
3. When X20 = ON, T0 to T127 will all be reset. Their present value =0 , coil output will be reset to
OFF.
4. When X2 = ON, the status of S0 to S127 will be reset to OFF.
5. When X3 = ON, the data of D0 to D100 will be reset to 0.
6. When X4 = ON, C235 to C254 will all be reset. Their present value =0 , coil output will be reset to
OFF.
ZRST M300 M399
ZRST C0 C127
ZRST T0 T127
ZRST S0 S127
ZRST D0 D100
ZRST C235 C254
X0
X1
X20
X2
X3
X4

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API Mnemonic Operands Function
41

DECO P

Decode
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D

* * * * * * * *
n * *
DECO, DECOP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source to decode D: Destination n: Number of bits to decode
Explanation:
1. Decodes the lower n bits of source S and stores the result of 2
n
bit at D.
2. This instruction works best with the pulse instruction (DECOP).
3. When operand D is a bit device, n=1~8, when operand D is a word device, n=1~4
Program Example 1:
1. n valid range: 0< n 8. But if n=0 or n>8, an error will occur.
2. When n=8, the maximum decoded data is 2
8
= 256 points.
3. When X20 goes from OFF ON, the data of X0~X2 will be decoded to M100~M107.
4. If S =3, M103 (third position from M100) = ON.
5. After the execution is completed, X20 is changed to OFF. The device which have been decoded is
still acting.
DECOP X0 K3 M100
X20

X2 X1 X0
M107 M106 M105 M104 M103 M102 M101 M100
0 1 1
1 0 0 0 0 0 0 0
3 7 6 5 4 2 1 0
4 1 2
3

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Program Example 2:
1. D valid range: 0< n 4, if n=0 or n>4, an error will occur.
2. When n=4, the maximum decoded data is 2
4
= 16 points.
3. When X20 goes from OFF ON, the data in D10 (b2 to b0) will be decoded and stored at D20 (b7
to b0). The unused bits in D20 (b15 to b8) will be all set to 0.
4. Decodes three lower bits in D10 and stores at eight lower bits in D20 (one bit will be 1) and the
content of eight upper bits are all 0.
5. After the execution is completed, X20 is changed to OFF. The device which have been decoded is
still acting.
DECOP D10 K3 D20
X20

0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
0 1 2 3 4 5 6 7
1 2 4
b15
b15 b0
b0
All be 0 (zero)
When 3 is specified
at b2 to b0 of D10
Result after decoding
When 3 is specified as effective
bits, 8 points are occupied.
b3 at the third position from
b0 turns ON and is set to 1
D10
D20


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API Mnemonic Operands Function
42

ENCO P

Encode
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * *
D

* * * * *
n * *
DECO, DECOP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source to encode D: Destination for storing encode data n: Number of bits to encode
Explanation:
1. Encodes the lower 2
n
bits of source S and stores the result in D.
2. If the source device S multiple bit are 1, processing is performed for the last bit position.
3. This instruction works best with the pulse instruction (ENCOP).
4. When operand S is a bit device, n=1~8, when operand S is a word device, n=1~4
5. PC/PA/PH series: If there is no bit=1 in the source S of ENCO instruction, M1067=M1068=ON.
Program Example 1:
1. S valid range: 0< n 8. If n=0 or n>8, an error will occur.
2. When n=8, the maximum decoded data is 2
8
= 256 points.
3. When X0 goes from OFF ON, the data in (M0 to M7) will be encoded and stored at 2
3
bits of D0
(b2 to b0). The unused bits in D0 (b15 to b3) will be all set to 0.
4. After the execution is completed, X0 is changed to OFF and the data in D remain unchanged.
ENCOP M0 K3 D0
X0

0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
1 2 4
b15 b0
1
0 0 0 0 1 0 0 0
7 6 5 4 3 2 1 0
M07 M06 M05 M04 M03 M02 M01 M00
All be 0 (zero)
When 3 is specified as effective bits, 8 points are occupied.
Result after encoding
Which point, counting from M0, is ON and stored in BIN.
D0


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Program Example 2:
1. S Valid rang: 0< n 4. If n=0 or n>4, an error will occur.
2. When n=4, the maximum decoded data is 2
4
= 16 points.
3. When X0 goes from OFF ON, the data in D10 will be encoded and stored at the three lower bits
D20 (b2 to b0). The unused bits in D20 (b15 to b3) will be all set to 0.
4. After the execution is completed, X0 is changed to OFF and the data in D remain unchanged.
ENCOP D10 K3 D20
X0

0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
b15 b0
1
6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 1 0 1 0 0 1 1 1
b15
b0
7
All be 0 (zero)
Data inactivated
Result after encoding
When 3 is specified as effective bits, 8 points are occupied.
D10
D20


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API Mnemonic Operands Function
43

D SUM P

Sum of ON bits
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D

* * * * *
SUM, DSUMP: 5 steps
DSUM, DSUMP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination stores number of ON bits
Explanation:
1. If the contents of these 16 bits are all 0, the Zero flag, M1020=ON.
2. D will occupy two registers when using in 32-bit instruction.
3. If operand S, D uses index F, it is only available as a 16-bit instruction.
4. If no bits are ON then zero flag, M1020 is set.
Program Example:
When X20 =ON, all the bits that = 1 in D0 will be counted and the number stored in D2.
X20
SUM D0 D2

0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 3
D2 D0

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API Mnemonic Operands Function
44

D BON P

Bit ON Test
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D

* * *
n * * * * * * *
BON, BONP: 7 steps
DBON, DBONP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination for storing result n: Bit number to test
Explanation:
1. The status of the specified bit in the source device is indicated at the destination.
2. The destination device could be said to act as a mirror to the status of the selected bit source.
3. If operand S, n uses index F, then only 16-bit instruction is available.
4. Valid range of operand n : n=0~15 (16-bit), n=0~31 (32-bit)
Program Example:
1. When X0 = ON, and if the 15th bit of D0 = 1, M0 is ON. But if the 15th bit of D0 is 0, M0 is OFF.
2. Once X0 is switched to OFF, M0 will stay at its previous ON/OFF status.
X0
BON D0 M0
0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0
D0
K15
b0
M0=Off
b15
1 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0
D0
b0
M0=On
b15


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API Mnemonic Operands Function
45

D MEAN P

Mean Value
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * *
D

* * * * * * * *
n * * * * * * * * * * *
MEAN, MEANP: 7 steps
DMEAN, DMEANP: 13
steps


Operands:
S: Starting source D: Destination for result n: Number of device to use
Explanations:
1. Add the contents of n registers specified by S, and have the sum divided by n to get the mean
value. Save this mean value in D.
2. If there is remainder it will be ignored.
3. If S is not within the valid range, only those addresses within the range will be processed.
4. If n is out of the valid range (1~64), an error will be generated.
5. If operand D, n uses index F, then only 16-bit instruction is available.
6. Valid range of operand n : n=1~64
Program Example:
When X20 = ON, add up the contents of the three registers starting from D0, and divide the sum by
three to get the mean value. Store this mean value in D10 and ignore the remainder.
MEAN D0 K3 D10
X20
(D0+D1+D2)/D3 D10
D0
D1
D2
K100
K113
K125
K112 D10
Reminder = 3, be ignored


PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
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API Mnemonic Operands Function
46

ANS

Alarm Set
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
m

*
D *
ANS: 7 steps


Operands:
S: Alarm timer m: Time setting prior to alarm D: Alarm
Explanations:
1. ANS instruction is used to drive the output alarm device.
2. PC/PA/PH: Operand S valid range: T0~T191
PV: Operand S valid range: T0~T199
Operand m valid range: K1~K32,767 in units of 100 ms
PC/PA/PH: Operand D valid range: S896~S1023
PV: Operand D valid range: S900~S1023
See ANR for more information
3. Flag: M1048 (ON = Alarm Active), M1049 (ON = Enable Alarms)
Program Example:
If alarm device S999=ON and X3 = ON for more than 5 seconds, S999 will stay ON after X3=OFF. T10
will be reset to OFF, present value=0)
X3
ANS T10 K50 S999


PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
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API Mnemonic Function
47

ANR P Alarm Reset
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A Instruction driven by contact is necessary. ANR, ANRP: 1 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Explanations:
1. ANR instruction is used to reset an alarm.
2. When several alarm devices are ON, the lower number of alarm device will be reset.
3. This instruction works best with the pulse instruction (ANRP).
Program Example:
1. When X20 and X21 are simultaneously ON more than 2 seconds, the alarm S910 = ON. If X20 or
X21 change to OFF, alarm S910 will remain ON. T10 will reset to OFF, present value is 0.
2. When X20 and X21 are simultaneously ON less than 2 seconds, the present value of T10 is reset
to 0.
3. When X3 goes from OFF ON, activated alarms S896~S1023 (PC/PA/PH) or S900~S1023 (PV)
will be reset.
4. When X3 goes from OFF ON again, the second lower alarm device will be reset.
X20
ANS T10 K20 S910
X21
X3
ANRP

Points to note:
Flags:
1. M1048: When M1049 = ON, any alarm S896~S1023 (PC/PA/PH) =ON or S900~S1023 (PV) =ON
will turn M1048 ON. If M1049=OFF, M1048 will not be affected if alarms occur.
2. M1049: When M1049 = ON, D1049 will automatically hold the lowest alarm number during the
execution of this instruction.
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6- 107
Application of alarm device:
X0=forward switch X1=backward switch
X2=front location switch X3=back location switch
X4=alarm device reset button
Y0=forward Y1=forward
Y2=alarm indicator
S910=forward alarm device S920=backward alarm
Y0
ANS T0 K100 S910
X2
X4
ANRP
M1000
M1049
Y1
ANS T1 K200 S920
X3
X0
Y0
X2
M1048
Y2
Y0
X1
Y1
X3
Y1

1. When M1049=ON, Alarms are enabled. If M1048=ON, an alarm has occurred, D1049=lowest
alarm number.
2. If Y0=ON > 10 seconds and has not reach the front location X2, S910=ON.
3. If Y1=ON > 20 seconds and not reach the back location X3, S920=ON.
4. When X1=ON, and Y1=ON, and X3=ON, Y1 = OFF.
5. If an alarm occurs, alarm indicator Y2=ON.
6. Each alarm which are activated will be reset one by one, each time the reset button X4 = ON
during the execution of this instruction. The lowest numbered alarm is reset every execution of this
instruction.

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API Mnemonic Operands Function
48

D SQR P

Square Root
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D

*
SQR, SQRP: 5 steps
DSQR, DSQRP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination to store result
Explanation:
1. Perform a square root on source S and store the result in D.
2. S can only be a positive value. Performing a square root operation on a negative value will result in
an error and the instruction will not be executed. The error flag M1067 and M1068 = ON and
D1067 records error code H0E1B.
3. SQR result D is calculated as an integer only, decimals are ignored. If there is a decimal ignored,
the Borrow flag M1021=ON.
4. When SQR result D = 0, the Zero flag M1020=ON.
5. M1020 (Zero flag) is set ON when square root operation result is equal to zero, answers with
rounded values will activate M1021.
6. Performing any square root operation (even on a calculator) on a negative number will result in an
error. This will be identified by special M coil M1067 being activated.
Program Example:
When X20=ON, SQR of D0 will be stored in D12.
X20
SQR D0 D12
D0 D12


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API Mnemonic Operands Function
49

D FLT P

Floating Point
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
D

*
FLT, FLTP: 5 steps
DFLT, DFLTP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source D: Destination
Explanations:
1. When M1081 = OFF, the source is converted from BIN integer to floating point. At this time, S
source = 16-bit and D occupies 32 bits.
a) If an absolute of conversion result is larger than max. floating value, carry flag M1022=ON.
b) If an absolute of conversion result is less than min. floating value, carry flag M1021=ON.
c) If conversion result is 0, zero flag M1020=ON.
2. When M1081 is ON, the source is converted from floating point to BIN integer. (ignore decimal). At
this time, S source = 32-bit and D Destination occupies 16-bit. This is the same as instruction INT.
a) If conversion result exceeds BIN integer range of D (16-bit, -32,768~32,767 and 32-bit,
-2,147,483,648~2,147,483,647), D will hold either max or min value, The carry flag will be set to
M1022=ON.
b) If the decimal was ignored, borrow flag M1021=ON.
c) If the conversion result = 0, zero flag M1020=ON.
d) After conversion, D is saved by 16 bits.
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6- 110
Program Example 1:
1. When M1081 = OFF, the source data is converted from BIN integer to floating point.
2. When X20 = ON, D0 is converted to D13, D12 (floating point).
3. When X21 = ON, D1, D0 are converted to D21, D20 (floating point).
4. If D0=K10, X20=ON. 32-bit of floating point after conversion will be H41200000 and it will be saved
in 32-bit register D12 (D13).
If 32-bit register D0 (D1)=K100,000, X21 = ON. 32-bit of floating point after conversion will be
H4735000 and it will be saved in 32-bit register D20(D21).
M1002
RST M1081
X20
FLT D0 D12
X21
DFLT D0 D20

Program Example 2:
1. When M1081 = ON, the source data is converted from floating point to BIN integer. (ignore
decimal)
2. When X20 = ON, D0 and D1(floating point) are converted to D12 (BIN integer). If
D0(D1)=H47C35000, the floating point result is 100,000. The result will be D12=K32,767,
M1022=ON, since the value exceeds the max value of the 16-bit register D12.
3. When X21 = ON, D1, D0 (floating point) are converted to D21, D20 (BIN integer). If
D0(D1)=H47C35000, the floating point result is 100,000. The result will be saved in 32-bit register
D20(D21).
M1002
SET M1081
X20
FLT D0 D12
X21
DFLT D0 D20

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6- 111
Program Example 3:
(D10) (X7~X0) K61.5
16 bit BIN 2 bit BCD
(D21,D20)
(D101,D100) (D200) BIN
(D203,D202)
(D301,D300)
(D401,D400)
(D31,D30)
(D41,D40)
1 2
3
4 5
6
7
8
Binary floating point
Binary floating point Binary floating point
Binary floating point
Binary floating point
Decimal floating point (for monitor)
32 bit integer


M1000
FLT D10 D100
BIN K2X0 D200
FLT D200 D202
DEDIV K615 K10
DEDIV D100 D202
DEMUL D400 D300
DEBCD D20 D30
DINT D20 D40
D300
D400
D20
1
2
3
4
5
6
7
8

1. Covert D10 (BIN integer) to D101, D100 (floating point).
2. Covert the value of X7~X0 (BCD value) to D200 (BIN value).
3. Covert D200 (BIN integer) to D203, D202 (floating point).
4. Save the result of K615 K10 to D301, D300 (floating point).
5. Divide the floating point:
Save the result of (D101, D100) (D203, D202) to D401, D400 (floating point).
6. Multiply floating point:
Save the result of (D401, D400) (D301, D300) to D21, D20 (floating point).
7. Covert floating point (D21, D20) to decimal floating point (D31, D30).
8. Covert floating point (D21, D20) to BIN integer (D41, D40).
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API Mnemonic Operands Function
50

REF P

Refresh I/O Immediately
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* *
n

* *
REF, REFP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Starting source of I/O refresh n: Number of I/O to refresh
Explanations:
1. The state of all ELC inputs and outputs will be refreshed after scanning the main program to the
END. The state of inputs is read from external inputs to saved to internal memory. Output are
updates after the main program has been completed. This instruction can be used during scan
time when there is a need to update an I/O point before reaching the program END.
2. D should always be a multiple of 10, i.e. 00, 10, etc., so it should be X0, X10, Y0, Y10 etc. n
should always be a multiple of 8, i.e. 8, 16. and its available range is 8~16. If the value of n is out
of the stated range (8~16) or not a multiple of 8, an error will be generated.
3. Range of n: 8 ~ 256 (has to be the multiple of 8).
4. For PC/PA/PH, the input and output points processed by this instruction are the I/O points of
PC/PA/PH: X0~X7, Y0~Y7 and n=K8
Program Example 1:
When X0 = ON, ELC will read the state of X0~X7 input points immediately and refreshed. No input
delay occurs.
X0
REF X0 K8

Program Example 2:
When X0 = ON, the output signal Y0~Y7 (8 points) are sent to output terminal immediately and
refreshed.
X0
REF Y0 K8

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API Mnemonic Operands Function
51

REFF P

Refresh and Filter Adjust
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
n

* *
REFF, REFFP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
n: Response time setting, in units of ms
Explanation:
1. ELC provides an input filter to prevent noise or interference from creating a false reading. The
input filters of X0~X17 inputs of ELC are digital filters, using REFF can adjust the response time of
the input filters. n set D1020 (adjust the reaction time of X0~X7) and D1021 (adjust the reaction
time of X10~X17) directly.
2. When power ELC turns OFF ON or the END instruction is reached, the response time is dictated
by the value of D1020 and D1021.
3. During program execution, setting the value in D1020 and D1021 by using MOV instruction.
4. The response time can be changed by using the REFF instruction in the execution of the program.
At this time, the response time specified by REFF instruction will be moved into D1020 and D1021
and will be adjusted for the next scan.
5. Range of n: for PC/PA/PH, n = K0 ~ K20; for PV, n = K0 ~ K60.
Program Example:
1. When the power to ELC turns from OFF ON, the response
time of X0~X7 inputs is dictated by the value in D1020 and
D1021.
2. When X20=ON, REFF K5 instruction is executed, response
time will change to 5 ms and will take affect the next scan.
3. When X20=OFF, the REFF instruction will not be executed,
the response time will change to 20ms and will take affect the
next scan.
X20
REFF K5
X0
Y1
X20
REFF K20
X1
Y2
END

Points to note:
Response time is ignored (no delay set) if using any external interrupts or high-speed counters or SPD
instruction.
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API Mnemonic Operands Function
52

MTR

Input Matrix
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
D
1
*
D
2
* * *
n * *
MTR: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Head address of input matrix D
1
: Head address of output matrix D
2
: Corresponding head
address of matrix scan n: Number of banks for the matrix
Explanations:
1. S is the head address that specifies all inputs of the matrix. Once the input is specified, a selection
of 8 continuous input devices is called as input matrix. D
1
is the head address of transistor
output Y of the matrix.
2. This instruction allows a selection of 8 continuous input devices (head address S) to be used
multiple (n) times. Each input has more than one and different D
1
signal being processed. Each
set of 8 input signals are grouped into a rows and there are n number of rows. Each row is
selected by the quantity of outputs from D
1
, used to achieve the matrix are equal to the number of
rows n. The result is stored in a matrix-table which starts at corresponding head address D
2
.
3. The maximum inputs can achieve 64 inputs (8 inputs x 8 rows).
4. When this instruction is used on an interrupt format, processing each row of inputs every 25msec.
This would result in an 8 rows matrix, i.e. 64 inputs (8 inputs x 8 rows) being read in 200msec.
Hence, this instruction is not available for the input signal which its ON/OFF speed is over than
200ms.
5. It is recommended to use special auxiliary relay M1000 (normally open contact).
6. After the completion of performing MTR instruction, the instruction execution completed flag
M1029 is turned ON and this flag is automatically reset when the MTR instruction is turned OFF.
7. This instruction can only be used ONCE.
Program Example:
When ELC run, MTR instruction starts to execute. The external 2 rows, total 16 devices are read by
order and the result are stored in the internal relay M10~M17, M20~M27.
6. I nst ruct i on Set

6- 115
M1000
MTR X40 Y40 M10 K2

The figure below is an example wiring diagram for the operation of MTR instruction. The external 2 rows
consist of X40~47 and Y40~41 and total 16 devices correspond to the internal relay M10~M17,
M20~M27 are used with MTR instruction. For a general precaution to aid successful operation, diodes
should be placed after each input devices. These diodes should have a rating of 0.1A, 50V.
S/S X40 X41 X42 X43 X44 X45 X47 X46
C Y40 Y41 Y42 Y43 Y44 Y45 Y47 Y46
M10
X41
M20
M11 M12 M13 M14 M15 M16 M17
X42 X43 X44 X45 X46 X47
M21 M22 M23 M24 M25 M26 M27
0.1A/50V
Input devices
Diode
+24V 24G

When output Y40 is ON, only those inputs in the first row are read. These result are stored in auxiliary
coils M10~M17. The second step involves Y40 going OFF and Y41 coming ON and this time only inputs
in the second row are read. These results are stored in M20~M27.
2 4 Y41
Y40
25ms
1 3
Read input signal in the first row
Read input signal in the second row
Processing time of each row is about 25ms

ELC Syst em Manual

6- 116
Points to note:
1. Operand S must be a multiple of 10, i.e. 00, 10, 20, 30 etc., so it should be X0, X10 etc. and
occupies 8 continuous devices.
2. Operand D
1
should be a multiple of 10, i.e. 00, 10, 20, 30 etc., so it should be Y0, Y10 etc. and
occupies n continuous devices
3. Operand D
2
should be a multiple of 10, i.e. 00, 10, 20, 30 etc., so it should be Y0, M0, S0 etc.
4. Valid range: n=2~8
5. Flag: M1029 Execution completed flag

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API Mnemonic Operands Function
53

D HSCS

High Speed Counter
Set
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
*
D * * *
DHSCS: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Compare value S
2
: Number of high-speed counter D: Compare result
Explanations:
1. All high-speed counters use an interrupt process; therefore, all compare results D are updated
immediately.
2. DHSCS instruction compares the current value of the selected high-speed counter S
2
against a
selected compare value S
1
. When the counters current value equals S
1
, then D = ON. Once set to
ON if values S
1
and S
2
are not longer equal, D will still be ON.
3. If D is specific as Y0~Y7, when S
1
and S
2
or equal, the compare result will immediately output to
the external inputs Y0~Y7, and other Y devices will be affected normally by the scan cycle.
However, M and S devices are immediately output and not being affected by the scan cycle.
4. Operand limitation:
Operand S
2
of PB should be C235~C238, C241~C244, C246~C249, C251~C254. Operand S
2
of
PC/PA should be C235~C244, C246~C249, C251~C254. Operand S
2
of PH should be C235~
C255.
Valid range of D: I010 to I060 can be set, PB models do not support interrupt function
D of PB/PC/PA/PH series does not support E, F index register modification
Flag: M1150~M1333. Refer to the Remarks for details
5. Flags: M1289 ~ M1294 are interruption disability of the high speed counters in PV series. See
Program Example 3 for more details.
Program Example 1:
After ELC perform a RUN instruction, if M0=ON, DHSCS instruction starts to operate. Y0 = ON
immediately when C235s present value stepped from 99100 or 101100 and be ON constantly.
ELC Syst em Manual

6- 118
M1000
DCNT C235 K1000
M0
DHSCS K100 C235 Y0 On immediately

Program Example 2:
Difference between a Y output for DHSCS instructions and general Y output:
When C249s value changes from 99100 or 101100, Y0 output of DHSCS is immediately output to
the external Y0 using the interrupt process which is independent of the scan time. However, there will
still be a delay due to the output module: relay (10ms) or transistor (10us).
When the present value of high-speed timer C249 changes from 99 to 100, C249 will be activated, and
Y7 will be ON after the END instruction based on the program scan time.
M1000
DCNT C249 K100
SET Y7
C249
DHSCS K100 C249 Y0 ON immediately

Program Example 3:
High-speed counter interrupt:
1. PC/PA/PH models using a high-speed counter interrupt
2. When using DHSCS instruction to specify I interrupt, the specified high-speed counter can not be
use in other DHSCS, DHSCR, DHSZ instruction. If using it, it will result in error.
3. The interrupt pointers I010 to I060 can be used as D operand for DHSCS instruction and this
enables the interrupt routine to be executed when the value of the specified high-speed counter
reaches the value in DHSCS instruction.
4. PC/PA/PH models, there are six high-speed counter interrupts: I010, I020, I030, I040, I050, I060
(6 points) can be used. I010 is used with C235, C241, C244, C246, C247, C249, C251, C252, and
C254. I020 is used with C236, C243; I030 is used with C237, C242; I040 is used with C245, C238;
I050 is used with C239 and I060 is used with C240, C250 and C255.
5. When the present value of C251 changes from 99100 or 101100, the program will jump to the
interrupt pointer I010 to execute the interrupt routine.
6. I nst ruct i on Set

6- 119
M1000
DCNT C251 K1000
FEND
DHSCS K100 C251 I010
M1000
Y1
IRET
END
I010

6. PC/PA/PH models, M1059 is high-speed counter interrupt disable flag
7. PV models, M1289 ~ M1294 are the respectively for I010 ~ I060 high speed counter interruption
forbidden flags, i.e. when M1294 = On, I060 interruption will be forbidden.
Interruption pointer I
No.
Interruption forbidden
flag
Interruption pointer I
No.
Interruption forbidden
flag
I010 M1289 I040 M1292
I020 M1290 I050 M1293
I030 M1291 I060 M1294
Points to note:
1. The output contact of high-speed counter and the compare output of DHSCS instruction, DHSCR
instruction and DHSZ instruction are all activated when there are counted inputs. If using data
operation instruction, such as DADD, DMOVetc. instructions to change the present value of
high-speed counter equal to the setting value, there is comparison will be set or output because
there is no counted inputs.
2. High-speed counter provided in PB series models:
PB models: total counting frequency (X0~X3) is 20 KHz.
1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs Type
Input C235 C236 C237 C238 C241 C242 C244 C246 C247 C249 C251 C252 C254
X0 U/D U/D U/D U U U A A A
X1 U/D R R D D D B B B
X2 U/D U/D R R R R
X3 U/D R S S S

U: Increasing input A: A phase input S: Start input
D: Decreasing input B: B phase input R: Reset input
Input point X0 and X1 can be higher speed counter and 1-phase 1 input can be up to 20KHz.
Input point X2 and X3 can be higher speed counter and 1-phase 1 input can be up to 10KHz. But
total counting frequency of these input points should be less than or equal to total frequency
20KHz. If counting input is 2-phase 2 inputs signal, frequency will be four times of counting
ELC Syst em Manual

6- 120
frequency. Therefore, counting frequency of 2-phase 2 inputs is almost 4KHz.
In PB models, DHSCS and DHSCR instruction cannot be used more than 4 times.
3. High-speed counter provided in PC/PA/PH series models:
PC/PA models: total counting frequency is 30 KHz
1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs
Type
Input
C235 C236 C237 C238 C239 C240 C241 C242 C244 C246 C247 C249 C251 C252 C253 C254
X0 U/D U/D U/D U U U A A B A
X1 U/D R R D D D B B A B
X2 U/D U/D R R R R
X3 U/D R S S S
X4 U/D
X5 U/D

U: Increasing input A: A phase input S: Start input
D: Decreasing input B: B phase input R: Reset input
Input point X0 and X1 can be higher speed counter and 1-phase 1 input can be up to 30KHz.
Input point X2 ~ X5 can be higher speed counter and 1-phase 1 input can be up to 10KHz. But
total counting frequency of these input points should be less than or equal to total frequency
30KHz. If counting input is 2-phase 2 inputs signal, frequency will be four times of counting
frequency. Therefore, counting frequency of 2-phase 2 inputs (C251, C252, C254) is almost 4KHz;
counting frequency of 2-phase 2 inputs (C253) is almost 25KHz.
In PC/PA series models, DHSCS, DHSCR and DHSZ instruction cannot be used more than 6
times.
PH models: total counting frequency is 130 KHz
1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs
Type

Input
C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C245 C248 C246 C247 C249 C250 C251 C252 C254 C255
X0 U/D U/D U/D U U U A A A
X1 U/D R R D D D B B B
X2 U/D U/D R R R R
X3 U/D R S S S
X4 U/D
X5 U/D
X10 U/D U/D U A
X11 U/D R D B

U: Increasing input A: A phase input S: Start input
D: Decreasing input B: B phase input R: Reset input
High-speed counter function of PC/PA series is the same as that of PH series with new added
1-phase 1 input and 2-phase 2 inputs. For 1-phase 1 input, the highest frequency of X10 (C243)
and X11 (C245) can be respectively up to 100kHz with total bandwidth 130kHz. For 1-phase 2
inputs (X10, X11) C250, the highest frequency is up to 100kHz. For 2-phase 2 inputs (X10, X11)
C255, the highest frequency is up to 50kHz.
a) C243 can be set as rising-edge counting, falling-edge counting or rising and falling edge counting.
C245 and C250 can only be set as rising-edge counting or falling-edge counting. C255 can only
6. I nst ruct i on Set

6- 121
be used in 4 times frequency counting and cannot be set as rising-edge or falling-edge counting.
b) When C243 or C245 is used, C250 or C255 cannot be used. Also, when C250 or C255 is in use,
C243 or C245 cannot be used
Input X5 has two functions:
1. When M1260=OFF, C240 is general U/D high-speed counter.
2. When M1260=ON, X5 is the global reset of C235~C239.
The relation graph of high-speed counter and high-speed comparator
X11
X10
C243
C250
C245
Comparator
Compaison
reached contact
Setting Y10
Comparison instruction
of high-speed
Setting Y11
C255

a) When DHSCS and DHSCR use additional high-speed counter, maximum high-speed instruction
can use is the settings of two sets of high-speed comparison instruction. Assume that there is a
set of comparison instruction of DHSCS D0 C243 Y10 is used, only a set of comparison instruction
of DHSCR D2 C243 Y10 or DHSCS D4 C245 Y10 can be used.
b) When additional high-speed counter is used by DHSZ, only a set of comparison instruction can be
used.
c) The original quantity of high-speed comparison instruction provided for PC/PA wont reduce due to
above additional high-speed counter.
d) If it needs high-speed response output for output device setting of high-speed comparison
instruction (DHSCS), it is recommended to use Y10 or Y11. If using other common devices, it will
delay a scan period setting or clear at most. When setting I0x0, C243 corresponds to I020, C245
corresponds to I040 and C250, C255 corresponds to I060.
e) The clear output device of high-speed comparison instruction (DHSCR) allows to clear counter
device. But only the same counter in one instruction can be cleared.
For example: DHSCR K10 C243 C243. Besides, only four special high-speed counters (C243,
C245, C250 and C255) can use this function.
5. Select frequency mode for 2-phase 2 inputs counter mode
High-speed counter of PA/PB/PC/PH series is 2-phase 2 inputs counter mode and set by special device
D1022 with four double frequency modes. The content value of register D1022 is loaded at the first scan
time when ELC controller switch from Stop to Run status.
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Device No. Function Explanation
D1022 Double frequency mode is initial set-point when power OFF ON
D1022=K1 Normal frequency mode
D1022=K2 Double frequency mode
D1022=K4 Four times frequency mode
Double frequency mode (2-phase 2 inputs):
a) D1022=K1 (normal frequency)
Signal Diagram
A-phase
B-phase
Counting up
Counting down

b) D1022=K2 (double frequency)
Signal Diagram
A-phase
B-phase
Counting up
Counting down

c) D1022=K4 (four times frequency)
Signal Diagram
A-phase
B-phase
Counting up
Counting down

6. I nst ruct i on Set

6- 123
6. High-speed counter provided in PV series Models:
PV series supports high speed counters. C235 ~ C240 are program-interruption 1-phase high speed
counter with a total bandwidth of 20KHz, can be used alone with a counting frequency of up to 10KHz.
C241 ~ C254 are hardware high speed counter (HHSC). There are four HHSC in PV series, HHSC0 ~ 3.
The pulse input frequency of HHSC0 and HHSC1 can reach 200KHz and that of HHSC2 and HHSC3
can reach 20KHz (1 phase or A-B phase). The pulse input frequency of HHSC0 ~ 3 of PV series can
reach 200KHz, among which:
C241, C246 and C251 share HHSC0
C242, C247 and C252 share HHSC1
C243, C248 and C253 share HHSC2
C244, C249 and C254 share HHSC3
a) Every HHSC can only be designated to one counter by DCNT instruction.
b) There are three counting modes in every HHSC (see the table below):
i) 1-phase 1 input refers to pulse/direction mode.
ii) 1-phase 2 inputs refers to clockwise/counterclockwise (CW/CCW) mode.
iii) 2-phase 2 inputs refers to A-B phase mode.
Counter
type
Program-interruption
high speed counter
Hardware high speed counter
1-phase 1 input 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs Type
Input C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C246 C247 C248 C249 C251 C252 C253 C254
X0 U/D U/D U A
X1 U/D D B
X2 U/D R R R
X3 U/D S S S
X4 U/D U/D U A
X5 U/D D B
X6 R R R
X7 S S S
X10 U/D U A
X11 D B
X12 R R R
X13 S S S
X14 U/D U A
X15 D B
X16 R R R
X17 S S S
U: Progressively increasing input A: A phase input S: Input started
B: Progressively decreasing input B: B phase input R: Input cleared
ELC Syst em Manual

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c) In PV series, there is no limitation on the times of using the hardware high speed counter
related instructions, DHSCS, DHSCR and DHSZ. However, when these instructions are
enabled at the same time, there will be some limitations. DHSCS instruction will occupy 1
group of settings, DHSCR 1 group of settings and DHSZ 2 groups of settings. There three
instructions cannot occupy 8 groups of settings in total; otherwise the system will ignore the
instructions which are not the first scanned and enabled.
d) System structure of the hardware high speed counters:
i) HHSC0 ~ 3 have reset signals and start signals from external inputs. Settings in M1272,
M1274, M1276 and M1278 are reset signals of HHSC0, HHSC1, HHSC2 and HHSC3.
Settings in M1273, M1275, M1277 and M1279 are start signals of HHSC0, HHSC1,
HHSC2 and HHSC3.
ii) If the external control signal inputs of R and S are not in use, you can set
M1264/M1266/M1268/M1270 and M1265/M1267/M1269/M1271 as True and disable the
input signals. The corresponding external inputs can be used again as general input
points (see the figure below).
iii) When special M is used as a high speed counter, the inputs controlled by START and
RESET will be affected by the scan time.
HHSC0
HHSC1
HHSC2
HHSC3
M1265
M1273
M1267
M1275
M1269
M1277
M1271
M1279
X3 X7 X17 X13
M1272 M1274 M1276 M1278
M1264 M1266 M1268 M1270
X2 X6 X12 X16
M1241 M1242 M1243 M1244
C241 C242 C243 C244
D1225 D1226 D1227 D1228
X1 X5 X11 X15
X14 X10 X4 X0
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
HHSC0 HHSC1 HHSC2 HHSC3
M1246
M1247
M1248
M1249 M1254
M1253
M1252
M1251
DHSCS
DHSCR
DHSCZ
I 010
I 020
I 030
I 040
I 050
I 060
M1289
M1290
M1291
M1292
M1293
M1294 M1294
HHSC0
HHSC1
HHSC2
HHSC3
AND
OR
AND
OR
U/D
U
A
B
D Counti ng pul ses
Counti ng pul ses
Pr esent val ue i n counter
Sel ect counti ng modes
U/D mode setup flag
Reset signal R
Set val ues 1 ~ 4 i ndi cate
Mode 1 ~ 4 (1 ~ 4 ti mes frequency)
Start signal S
Inter rupti on forbi dden fl ag
High-speed
comparative
instruction
Output reaches
compar ati ve val ue
Output reaches
compar ati ve val ue
for outputs
Counti ng up/down
monitori ng fl ag
Comparator
Counti ng reaches set value
8 set val ues
DHSCS occupi es 1 group of set val ues
DHSCR occupies 1 group of set values
DHSCZ occupi es 2 gr oups of set val ues
SET/RESET
010 ~ 060 clear
the pr esent val ue
I I

e) Counting modes:
6. I nst ruct i on Set

6- 125
Special D1225 ~ D1228 are for setting up different counting modes of the hardware high
speed counters (HHSC0 ~ 3) in PV series. There are normal ~ 4 times frequency for the
counting and the default setting is double frequency.
Counting modes Wave pattern
Type
Set value in
special D
Counting up(+1) Counting down(-1)
1
(Normal
frequency)
U/D
U/D FLAG

1-phase
1 input
2
(Double
frequency)
U/D
U/D FLAG

1
(Normal
frequency)
U
D

1-phase
2 inputs
2
(Double
frequency)
U
D

1
(Normal
frequency)
A
B

2
(Double
frequency)
A
B

3
(Triple
frequency)
A
B

2-phase
2 inputs
4
(4 times
frequency)
A
B


f) Special registers for relevant flags and settings of high speed counters:
Flag Function
M1150 DHSZ instruction in multiple set values comparison mode
M1151 The execution of DHSZ multiple set values comparison mode is completed.
M1152 Set DHSZ instruction as frequency control mode
M1153 DHSZ frequency control mode has been executed.
M1235 ~
M1245
Designating the counting direction of high speed counters C235 ~ C245
When M12 = Off, C2 will perform a counting up.
When M12 = On, C2 will perform a counting down.
M1246 ~
M1255
Monitor the counting direction of high speed counters C246 ~ C255
When M12 = Off, C2 will perform a counting up.
When M12 = On, C2 will perform a counting down.
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Flag Function
M1260 X5 as the reset input signal of all high speed counters
M1261 High-speed comparison flag for DHSCR instruction
M1264 Disable the external control signal input point of HHSC0 reset signal point (R)
M1265 Disable the external control signal input point of HHSC0 start signal point (S)
M1266 Disable the external control signal input point of HHSC1 reset signal point (R)
M1267 Disable the external control signal input point of HHSC1 start signal point (S)
M1268 Disable the external control signal input point of HHSC2 reset signal point (R)
M1269 Disable the external control signal input point of HHSC2 start signal point (S)
M1270 Disable the external control signal input point of HHSC3 reset signal point (R)
M1271 Disable the external control signal input point of HHSC3 start signal point (S)
M1272 Internal control signal input point of HHSC0 reset signal point (R)
M1273 Internal control signal input point of HHSC0 start signal point (S)
M1274 Internal control signal input point of HHSC1 reset signal point (R)
M1275 Internal control signal input point of HHSC1 start signal point (S)
M1276 Internal control signal input point of HHSC2 reset signal point (R)
M1277 Internal control signal input point of HHSC2 start signal point (S)
M1278 Internal control signal input point of HHSC3 reset signal point (R)
M1279 Internal control signal input point of HHSC3 start signal point (S)
M1289 High speed counter I010 interruption forbidden
M1290 High speed counter I020 interruption forbidden
M1291 High speed counter I030 interruption forbidden
M1292 High speed counter I040 interruption forbidden
M1293 High speed counter I050 interruption forbidden
M1294 High speed counter I060 interruption forbidden
M1312 C235 Start input point control
M1313 C236 Start input point control
M1314 C237 Start input point control
M1315 C238 Start input point control
M1316 C239 Start input point control
M1317 C240 Start input point control
M1320 C235 Reset input point control
M1321 C236 Reset input point control
M1322 C237 Reset input point control
6. I nst ruct i on Set

6- 127
Flag Function
M1323 C238 Reset input point control
M1324 C239 Reset input point control
M1325 C240 Reset input point control
M1328 Enable Start/Reset of C235
M1329 Enable Start/Reset of C236
M1330 Enable Start/Reset of C237
M1331 Enable Start/Reset of C238
M1332 Enable Start/Reset of C239
M1333 Enable Start/Reset of C240

Special D Function
D1022 Multiplied frequency of A-B phase counters for PB/PC series
D1150
Table counting register for DHSZ multiple set values comparison
mode
D1151
Register for DHSZ instruction frequency control mode (counting by
table)
D1152 (low word)
D1153 (high word)
In frequency control mode, DHSZ reads the upper and lower limits in
the table counting register D1153 and D1152.
D1166
Switching between rising/falling edge counting modes of X10 (for PH
series only)
D1167
Switching between rising/falling edge counting modes of X11 (for PH
series only)
D1225 The counting mode of the 1
st
group counters (C241, C246, C251)
D1226 The counting mode of the 2
nd
group counters (C242, C247, C252)
D1227 The counting mode of the 3
rd
group counters (C243, C248, C253)
D1228 The counting mode of the 4
th
group counters (C244, C249, C254)
D1225 ~ D1228
Counting modes of HHSC0 ~ HHSC3 in PV series (default = 2)
1: Normal frequency counting mode
2: Double frequency counting mode
3: Triple frequency counting mode
4: 4 times frequency counting mode

ELC Syst em Manual

6- 128
API Mnemonic Operands Function
54

D HSCR

High Speed Counter Reset
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
*
D * * * *
DHSCR: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Compare value S
2
: Number of high-speed counter D: Compare result
Explanation:
1. HSCR compares the current value of the counter S
2
against a compare value S
1
. When the
counters current value changes to a value equal to S
1
, then device D is reset to OFF. Once reset,
even if the compare result is no longer unequal, D will still be OFF.
2. If D is specified as Y0~Y7, when the compare value and the present value of high-speed counter
are equal, the compare result will immediately output to the external outputs Y0~Y7 (specified Y
output will be reset), and other Y devices will be affected by the normal scan cycle. However, M
and S devices are also immediately output.
3. Operand S
2
of PB should be C235~C238, C241~C244, C246~C249, C251~C254. Operand S
2
of
PC/PA should be C235~C244, C246~C249, C251~C254. Operand S
2
of PH/PV should be C235~
C255.
4. Operand D of PH could use C243, C245, C250, and C255.
5. Operand D of PB/PC/PA could not use devices C.
6. Operand D of PV could be use C241~C254.
Program Example 1:
1. When M0=ON and C251s present value stepped from 99100 or 101100, Y0 will be reset to
OFF.
2. When C251s present value changes from 199 to 200, the contact C251 will be ON and force
Y20=ON, based on normal program scan time.
M1000
DCNT C251 K200
M0
DHSCR K100 C251 Y0
C251
SET Y20

6. I nst ruct i on Set

6- 129
Program Example 2:
When DHSCR instruction designates the same high speed counter, and the present value in the high
speed counter C251 changes from 999 to 1,000 or 1,001 to 1,000, C251 will be reset to Off.
M1000
DCNT C251 K200
DHSCR K1000 C251 C251

1,000
200
Affected by scan time
C251 output contact
Not affected by scan time

Remarks:
1. ELC all series support high speec counters. For the limitation on the use of instructions, see
remarks of API 53 DHSCS for more details.
2. M1261 of PV series designates the external reset modes of the high speed counter. Some high
speec counters have input points for external reset; therefore, when the input point is On, the
present value in the corresponding high speed counter will be cleared to 0 and the output contact
will be Off. If you wish the reset to be executed immediately by the external output, you have to set
M1261 to be On.
3. M1261 can only be used in the hardware high speed counter C241 ~ C255.
4. Example:
a) X2 is the input point for external reset of C251.
b) Assume Y10 = On.
c) When M1261 = Off and X2 = On, the present value in C251 will be cleared to 0 and the
contact of C251 will be Off. When DHSCR instruction is executed, there will be no counting
input and the comparison result will not output. The external output will not execute the reset;
therefore Y10 = On will remain unchanged.
d) When M1261 = On and X2 = On, the present value in C251 will be cleared to 0 and the
contact of C251 will be Off. When DHSCR instruction is executed, there will be no counting
input but the comparison result will output. Therefore, Y10 will be reset.
M1000
DCNT C251 K1000
DHSCR K0 C251 Y10
X10
M1261

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API Mnemonic Operands Function
55

D HSZ

HSC Zone Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
S *
D * * *
DHSCS: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Low-limit value of zone comparison S
2
: High-limit value of zone comparison S: Number of
high-speed counter D: compared result (occupies 3 continuous bit devices)
Explanations:
1. S
1
should be equal to or smaller than S
2
(S
1
S
2
).
2. Output operation is not affected by the scan time.
3. All outputs and zone comparison all use interrupt operation.
4. Operand S
2
of PC/PA should be C235~C244, C246~C249, C251~C254. Operand S
2
of PH should
be C235~C255.
5. Flag: M1059~M1260 (Refer to DHSCS for more details)
Program Example 1:
1. When D is specified as Y0, then Y0~Y2 will be occupied automatically.
2. When DHSZ instruction is executed and high-speed counter C246 is counting, if the high and low
limit value is reached, one of Y0~Y2 will be ON.
M1000
DCNT C246 K20000
DHSZ K1500 K2000 C246
Y0
Y0
Y1
Y2
When current value of C246 < K1500, Y0=On
When K1500 < current value of C246 < K2000, Y1=On
When current value of C246 > K2000, Y2=On

Program Example 2:
1. When using DHSZ instruction to control stop, high, or low speed, C251 is set as an AB phase
high-speed counter.
6. I nst ruct i on Set

6- 131
2. When X30=ON, DHSZ will turn Y0=ON when the current value K2,000. In order to improve this,
use the DZCPP instruction to compare C251 against K2,000 when the program is RUN at the
beginning. When counting the current value K2,000, Y0=ON and DZCPP instruction is Pulse
execution. Instruction DZCPP can only be executed ONCE in a program and Y0 will be still be ON.
3. When drive contact X20=OFF, Y0~Y2 will be reset to OFF.
X20
RST C251
ZRST Y0 Y2
M1000
DCNT C251 K10000
X30
DZCPP K2000 K2400 C251 Y0
DHSZ K2000 K2400 C251 Y0

Timing diagram
2000
2400
0
X30
Y0
Y1
Y2
0
High speed
forward
Low speed
forward
Stop
Current value of
C251 counter
Speed of variable
speed rotational
equipment

Program Example 3:
1. Program Example 3 is only applicable to PV series.
2. The multiple set values comparison mode: If D of DHSZ instruction designates a special auxiliary
relay M1150, the instruction will be able to compare (output) the present value in the high speed
counter with many set values.
3. In this mode,
ELC Syst em Manual

6- 132
- S
1
: start device in the comparison table. S
1
can only designate data register D and can be
modified by E and F. Once this mode is enabled, S
1
will not be changed even the E and F has
been changed.
- S
2
: number of group data to be compared. S
2
can only designate K1 ~ K255 or H1 ~ HFF and
can be modified by E and F. Once this mode is enabled, S
2
cannot be changed. If S
2
is not
within its range, error code 01EA (hex) will display and the instruction will not be executed.
- S: No. of high speed counter (designated as C241 ~ C254).
- D: Designated mode (can only be M1150)
4. The No. of start register designated in S
1
and the number of rows (groups) designated in S
2

construct a comparison table. Please enter the set values in every register in the table before
executing the instruction.
5. When the present value in the counter C251 designated in S equals the set values in D1 and D0,
the Y output designated by D2 will be reset to Off (D3 = K0) or On (D3 = K1) and be kept. Output Y
will be processed as an interruption. No. of Y output pointss are in decimal (range: 0 ~ 255). If the
No. falls without the range, SET/RESET will not be enabled when the comparison reaches its
target.
6. When this mode is enabled, ELC will first acquire the set values in D0 and D1 as the target value
for the first comparison section. At the same time, the index value displayed in D1150 will be 0,
indicating that ELC performs the comparison based on the group 0 data.
7. When the group 0 data in the table have been compared, ELC will first execute the Y output set in
group 0 data and determine if the comparison reaches the target number of groups. If the
comparison reaches the target, M1151 will be On; if the comparison has not reached the final
group, the content in D1150 will plus 1 and continue the comprison for the next group.
8. M1151 is the flag for the completion of one execution of the table, can be Off by the user. Or when
the next comparion cycle takes place and the group 0 data has been compared, ELC will
automatically reset the flag.
9. When the drive contact of the instruction X10 goes Off, the execution of the instruction will be
interrupted and the content in D1150 (table counting register) will be reset to 0. However, the
On/Off status of all outputs will be remained.
10. When the instruction is being executed, all set values in the comparison table will be regarded as
valid values only when the scan arrives at END instruction for the first time.
11. This mode can only be used once in the program.
12. This mode can only be used on the hardware high speed counters C241 ~ C254.
13. When in this mode, the frequency of the input counting pulses cannot exceed 50KHz or the
neighboring two groups of comparative values cannot differ by 1; otherwise there will not be
6. I nst ruct i on Set

6- 133
enough time for the ELC to react and result in errors.
X10
DHSZ D0 K4 C251 M1150

The comparison table:
32-bit data for comparison
High word Low word
No. of Y output On/Off indication
Table counting
register D1150
D1 (K0) D0 (K100) D2 (K10) D3 (K1) 0
D5 (K0) D4 (K200) D6 (K11) D7 (K1) 1
D9 (K0) D8 (K300) D10 (K10) D11 (K0) 2
D13 (K0) D12 (K400) D14 (K11) D15 (K0) 3

K10: Y10
K11: Y11
K0: Off
K1: On
01230
Cyclic scan
M1151
D1150
Y11
Y10
100
200
300
400
0
1
2
3
0
Present value
in C251

14. Special registers for flags and relevant settings:
Flag Function
M1150 DHSZ instruction in multiple set values comparison mode
M1151 The execution of DHSZ multiple set values comparison mode is completed.

Special D Function
D1150 Table counting register for DHSZ multiple set values comparison mode
Program Example 4:
1. Program Example 4 is only applicable to PV series.
2. DHSZ and DPLSY instructions are combined for frequency control. If D of DHSZ instruction is a
ELC Syst em Manual

6- 134
special auxiliary relay M1152, the present value in the counter will be able to control the pulse
output frequency of DPLSY instruction.
3. In this mode,
- S
1
: start device in the comparison table. S
1
can only designate data register D and can be
modified by E and F. Once this mode is enabled, S
1
will not be changed even the E and F has
been changed.
- S
2
: number of group data to be compared. S
2
can only designate K1 ~ K255 or H1 ~ HFF and
can be modified by E and F. Once this mode is enabled, S
2
cannot be changed. If S
2
is not
within its range, error code 01EA (hex) will display and the instruction will not be executed.
- S: No. of high speed counter (designated as C241 ~ C254).
- D: Designated mode (can only be M1152)
4. This mode can only be used once. For PV series, this mode can only be used in the hardware high
speed counter C241 ~ C254. Please enter the set values in every register in the table before
executing the instruction.
5. When this mode is enabled, ELC will first acquire the set values in D0 and D1 as the target value
for the first comparison section. At the same time, the index value displayed in D1152 will be 0,
indicating that ELC performs the comparison based on the group 0 data.
6. When the group 0 data in the table have been compared, ELC will first execute at the frequency
set in group 0 data (D2, D3) and copy the data to D1152 and D1153, determining if the
comparison reaches the target number of groups. If the comparison reaches the target, M1153 will
be On; if the comparison has not reached the final group, the content in D1151 will plus 1 and
continue the comprison for the next group.
7. M1153 is the flag for the completion of one execution of the table, can be Off by the user. Or when
the next comparion cycle takes place and the group 0 data has been compared, ELC will
automatically reset the flag.
8. If you wish to use this mode with PLSY instruction, please preset the value in D1152.
9. If you wish to stop the execution at the last row, please set the value in the last row K0.
10. When the drive contact of the instruction X10 goes Off, the execution of the instruction will be
interrupted and the content in D1151 (table counting register) will be reset to 0.
11. When in this mode, the frequency of the input counting pulses cannot exceed 50KHz or the
neighboring two groups of comparative values cannot differ by 1; otherwise there will not be
enough time for the ELC to react and result in errors.
6. I nst ruct i on Set

6- 135
X10
DHSZ D0 K5 C251 M1152
PLS M0
DPLSY D1152 K0 Y0
M0

The comparison table:
32-bit data for comparison
High word Low word
Pulse output frequency
0 ~ 200KHz
Table counting
register D1151
D1 (K0) D0 (K0) D3, D2 (K5,000) 0
D5 (K0) D4 (K100) D7, D6 (K10,000) 1
D9 (K0) D8 (K200) D11, D10 (K15,000) 2
D13 (K0) D12 (K300) D15, D14 (K6,000) 3
D17 (K0) D16 (K400) D19, D18 (K0) 4

01234
Cyclic scan
D1151 0
1
2
0
3
4
0
5,000
10,000
15,000
M1153
0
100
200
300
400
500
(Hz)
Present value
in C251

12. Special registers for flags and relevant settings:
Flag Function
M1152 DHSZ instruction in frequency control mode
M1153 The execution of DHSZ frequency control mode is completed.
ELC Syst em Manual

6- 136
Special D Function
D1151 Table counting register for DHSZ multiple set values comparison mode
D1152 (low word)
D1153 (high word)
In frequency control mode, DHSZ reads the upper and lower limits in the
table counting register D1153 and D1152.
D1336 (low word)
D1337 (high word)
Current number of pulses output by DPLSY instruction
13. The complete program:
DHSZ D0 K5 C251 M1152
DMOVP K200 D8
DMOVP K300 D12
DMOVP
K400
D16
PLS M0
M0
DPLSY D1152 K0 Y0
Frequency Number
of
pulses
Output
point
X10
DMOVP K5000 D2
DMOVP K10000 D6
DMOVP K15000 D10
DMOVP K6000 D14
DMOVP K0 D18
DMOVP K0 D0
DMOVP K100 D4

14. During the execution of DHSZ instruction, do not modify the set values in the comparison table.
15. The designated data will be arranged into the the above program diagram when the program
executes to END instruction. Therefore, PLSY instruction has to be executed after DHSZ
instruction has been executed once.
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API Mnemonic Operands Function
56

SPD

Speed Detection
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
* * * * * * * * * * *
D * * *
SPD: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: External pulse input S
2
: Pulse time (ms) D: Result (occupies 5 continuous devices)
Explanations:
1. External pulse input terminals designated in S
1
for all series ELC:
ELC
Input
PB
PA/PC/PH
(new input X0 is added
for V1.2 and above)
PV
Available input points X1, X2 X0, X1, X2 X0 ~ X3
2. PC/PA/PH models, if X0X1 or X2 are used in a SPD instruction, then the related high-speed
counters or external interrupts I001, I101, I201 can not be used.
3. Count the number of pulses received at the inputs specified by S
1
during the time specified by S
2

(ms) and store the result in the register specified by D.
4. D occupies 5 registers, D+1, D indicate the detection value of previous pulse, D+3, D+2 indicate
the present accumulated count value of pulses and D+4 indicates the remaining count time, the
max. is 32767ms.
5. PB models: Maximum frequency: X1=20KHz, X2=10KHz, Total frequency is less than 20KHz.
6. PC/PA/PH models: Maximum frequency: X1=30KHz, X2=10KHz, Total frequency is less than
30KHz.
7. PC/PA/PH models, if X0 is used in a SPD instruction, X0 and X1 will be indicated as the inputs of
A, B phase signals to detect the speed of A, B phase. The maximum input frequency is 4KHz. Use
D1022 to set time frequency.
8. PV models: Maximum frequency: X0 and X1 = 100KHz, X2 and X3 = 10KHz, Total frequency is
less than 100KHz.
9. This instruction is mainly used to obtain a proportional value of rotation speed. The result D and
rotation speed are in proportion. The following equation can used to obtain the rotation speed of
motor.
ELC Syst em Manual

6- 138
N: Rotation speed
n: The number of pulses per rotation of rotation equipment N=
( )
( ) rpm
nt
D
3
10
0 60

t: Detection time specified by S


2
(ms)
10. When M1036 in PH (V1.4 and above) series is enabled, SPD instruction can detect the speeds at
X0 ~ X5 at the same time with a total bandwidth of 40KHz. See 2.11 for more details for how to
use M1036.
11. PV models: When SPD instruction is enabled and M1100 = On, SPD instruction will perform a
sampling at the moment when M1100 goes from Off to On and stop the sampling. If you wish to
resume the sampling, you have to turn Off M1100 and re-enable SPD instruction.
Program Example:
1. When X7=ON, D2 will count the high-speed pulse input from X1. After 1,000ms, it will stop
counting automatically and store the result in D0.
2. After 1000ms of counting has completed, the content of D2 will be reset to 0. When X7 turns ON
again, D2 will recount.
X7
SPD X1 K1000 D0

D4: content
value
D2: current
value
D2: content
value
D0: detection
value
D4:remai ning time (ms)
X7
X1
1000
1000ms 1000ms

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API Mnemonic Operands Function
57

D PLSY

Pulse Output
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D *
PLSY: 7 steps
DPLSY: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Pulse output frequency S
2
: Pulse output number D: External output (only Y0 and Y1 can be
specified)
Explanations:
1. The PLSY instruction can be used twice in the program.
2. S
1
specified as the pulse output frequency
Output frequency range of each series models
Models
PB series
models
PC/PA series
models
PH series models PV
Output
frequency
range
Y01~10,000Hz
Y11~10,000Hz
Y01~30,000Hz
Y11~30,000Hz
Y01~30,000Hz
Y11~30,000Hz
Y1077~100,000Hz
Y1177~100,000Hz
Y0: 0~200,000Hz
Y2: 0~200,000Hz
Y4: 0~200,000Hz
Y6: 0~200,000Hz
3. S
2
specified as the pulse output number.
16-bit instruction: 1~32,767. 32-bit instruction: 1~2,147,483,647.
Continuous pulses
M1010Y0 ON, pulse output is continuous
M1023Y1 ON pulse output is continuous
In PH, set S2 (the output pulse number of Y10, Y11) as K0
In PV, set S2 (the output pulse number of Y0, Y2, Y4 and Y6) as K0
4. For PV series, when the number of output pulses is set to 0, there will be continuous pulse output
with no limitation on the number of pulses. For PB/PC/PA/PH series, you have to make M1010 (Y0)
or M1023 (Y1) On to allow a continuous pulse output with no limitation on the number of pulses.
5. For the pulse output device designated in D, PV series can designate Y0, Y2, Y4 and Y6,
PB/PC/PA series can designate Y0 and Y1, SC series can designate Y0, Y1, Y10 and Y11. (SC
V1.2 and above series supports Y10 and Y11).
6. PV series has four groups of A-B phase pulse output from CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 (Y4,
Y5) and CH3 (Y6, Y7). See 2.3 and remarks for how to set up.
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6- 140
7. When PLSY instruction has been executed, the specified quantity of pulses S
2
will be output
through the pulse output device D at the specified pulse output frequency S
1
.
8. When the PLSY instruction is used in a program, the outputs used in the PLSY instruction cannot
be used in the PWM instruction or PLSR instruction.
9. Pulse output completed flags for all series:
ELC PB/PC/PA/PH PH PV
Output device Y0 Y1 Y10 Y11 Y0 Y2 Y4 Y6
Flag M1029 M1030 M1102 M1103 M1029 M1030 M1036 M1037
a) For PB/PC/PA/PH series, after the Y0 pulse output is complete, M1029 = ON; after the Y1
pulse output is complete, M1030 = ON. When the PLSY instruction is OFF (not executing),
M1029 or M1030 = OFF.
b) The execution completed flag M1029, M1030 should be cleared by the user after the
execution of the instruction has been completed.
c) For PH series, M1102 is set to ON after Y10 finish pulse output and M1103 is set to ON after
Y11 finish pulse output. When PLSY is OFF, M1102 and M1103 will be OFF.
d) For PV series, M1029 is set to ON after Y0 finish pulse output, M1030 is set to ON after Y2
finish pulse output, M1036 is set to ON after Y4 finish pulse output, and M1037 is set to ON
after Y6 finish pulse output. When PLSY is OFF, M1029, M1030, M1036, and M1037 will be
OFF.
10. For PB/PC/PA/PH/PV series, when PLSY and DPLSY instruction is disabled, the pulse output
completed flags will all be Off automatically.
11. For PV series, when PLSY and DPLSY instruction is disabled, the user will have to reset the pulse
output completed flags.
12. While the PLSY instruction is being executed, the output will not be affected if S
2
is changed. To
change the pulse output number, stop the PLSY instruction, then change the pulse number.
13. S
1
can be changed while the PLSY instruction is being executed.
14. The ratio of OFF time and ON time of the pulse output is 1:1.
15. If operand S
1
, S
2
uses index F, then only 16-bit instruction is available.
16. For PC/PA/PH/PV series, there is no limitation on the times using this instruction. For PV series,
the program allows four instructions being executed at the same time.
Program Example:
1. When X0=ON, the pulse of 1KHz for 200 times is generated from output Y0, after the pulse has
been completed, M1029=ON trigger Y20=ON.
6. I nst ruct i on Set

6- 141
2. When X0=OFF, pulse output Y0 will immediately stop. When X0 turns ON again, the pulse output
will restart.
X0
PLSY K1000 K200 Y0
M1029
Y20

1 2 3 200
Output Y0
0.5ms
1ms

Points to note:
1. Flags description:
M1010: When M1010=ON, Y0 will output continuous pulses. When M1010=OFF, the pulse
output numbers of Y0 are decided by S
2
.
M1023: When M1023=ON, Y1 can output limitless continuous pulses. When M1023=OFF, the
pulse output numbers of Y1 are decided by S
2
.
M1029: M1029= ON after Y0 pulse output complete.
M1030: M1030= ON after Y1 pulse output complete.
M1102:
For PH, M1102=ON after Y10 finish pulse output.
M1103: For PH, M1103=ON after Y11 finish pulse output.
M1078: Y0 pulse output stop immediately.
M1079: Y1 pulse output stop immediately.
2. PB/PA/PC models Special D registers description:
D1030: Present total number pulses of output Y0 (LOW WORD).
D1031: Present total number pulses of output Y0 (HIGH WORD).
D1032: Present total number pulses of output Y1 (LOW WORD).
D1033: Present total number pulses of output Y1 (HIGH WORD).
3. PH model Special D registers description:
D1348: Present total number pulses of output Y10 (LOW WORD).
D1349: Present total number pulses of output Y10 (HIGH WORD).
D1350: Present total number pulses of output Y11 (LOW WORD).
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6- 142
D1351: Present total number pulses of output Y11 (HIGH WORD).
4. Flags and special registers for PV series:
M1010: When On, CH0, CH1, CH2 and CH3 will output pulses at END instruction. Off when
the output starts.
M1029: On when CH0 pulse output is completed.
M1030: On when CH1 pulse output is completed.
M1036: On when CH2 pulse output is completed.
M1037: On when CH3 pulse output is completed.
M1334: CH0 pulse output pauses.
M1335: CH1 pulse output pauses.
M1520: CH2 pulse output pauses.
M1521: CH3 pulse output pauses.
M1336: CH0 pulse output has been sent.
M1337: CH1 pulse output has been sent.
M1522: CH2 pulse output has been sent.
M1523: CH3 pulse output has been sent.
M1338: CH0 offset pulses enabled.
M1339: CH1 offset pulses enabled.
M1340: I110 interruption occurs after CH0 pulse output is completed.
M1341: I120 interruption after occurs CH1 pulse output is completed.
M1342: I130 interruption occurs when CH0 pulse output is sending.
M1343: I140 interruption occurs when CH0 pulse output is sending.
M1344: CH0 pulse compensation enabled.
M1345: CH1 pulse compensation enabled.
M1347: CH0 pulse output reset flag
M1348: CH1 pulse output reset flag
M1524: CH2 pulse output reset flag
M1525: CH3 pulse output reset flag
D1220: Phase setting of CH0 (Y0, Y1): D1220 determines the phase by the last two bits;
other bits are invalid.
1. K0: Y0 output
2. K1: Y0, Y1 AB-phase output; A ahead of B.
3. K2: Y0, Y1 AB-phase output; B ahead of A.
4. K3: Y1 output
6. I nst ruct i on Set

6- 143
D1221: Phase setting of CH1 (Y2, Y3): D1221 determines the phase by the last two bits;
other bits are invalid.
1. K0: Y2 output
2. K1: Y2, Y3 AB-phase output; A ahead of B.
3. K2: Y2, Y3 AB-phase output; B ahead of A.
4. K3: Y3 output
D1229: Phase setting of CH2 (Y4, Y5): D1229 determines the phase by the last two bits;
other bits are invalid.
1. K0: Y4 output
2. K1: Y4, Y5 AB-phase output; A ahead of B.
3. K2: Y4, Y5 AB-phase output; B ahead of A.
4. K3: Y5 output
D1230: Phase setting of CH3 (Y6, Y7): D1230 determines the phase by the last two bits;
other bits are invalid.
1. K0: Y6 output
2. K1: Y6, Y7 AB-phase output; A ahead of B.
3. K2: Y6, Y7 AB-phase output; B ahead of A.
4. K3: Y7 output
D1328: Low word of the number of CH0 offset pulses
D1329: High word of the number of CH0 offset pulses
D1330: Low word of the number of CH1 offset pulses
D1331: High word of the number of CH1 offset pulses
D1332: Low word of the number of remaining pulses at CH0
D1333: High word of the number of remaining pulses at CH0
D1334: Low word of the number of remaining pulses at CH1
D1335: High word of the number of remaining pulses at CH1
D1336: Low word of the current number of output pulses at CH0
D1337: High word of the current number of output pulses at CH0
D1338: Low word of the current number of output pulses at CH1
D1339: High word of the current number of output pulses at CH1
D1375: Low word of the current number of output pulses at CH2
D1376: High word of the current number of output pulses at CH2
D1377: Low word of the current number of output pulses at CH3
D1378: High word of the current number of output pulses at CH3
D1344: Low word of the number of compensation pulses at CH0
D1345: High word of the number of compensation pulses at CH0
ELC Syst em Manual

6- 144
D1346: Low word of the number of compensation pulses at CH1
D1347: High word of the number of compensation pulses at CH1
5. When several pulse output instructions (PLSY, PWM, PLSR) use Y0 as the output pulse in the
same program, and simultaneously are executed in the same scan cycle, ELC will perform the
instruction which has fewest step numbers.
6. More explanations on M1347 and M1348:
If M1347 and M1348 is enabled, and when the execution of PLSY instruction has been completed,
M1347/M1348 will be reset automatically, i.e. you do not have to turn the status of the drive contact
from Off to On before PLSY instruction and when PLC scans to the instruction (assume the drive
contact of the instruction is True), there will still be pulse output. ELC detects the status of M1347
and M1348 when END instruction is being executed. Therefore, when the pulse output is completed
and if PLSY instruction is a continuous execution one, there will be a scan time of delay in the next
string of pulse output.
Program Example 1:
M1000
DPLSY K1000 K1000
EI
FEND
Y0 I 001
IRET
SET M1347
M1000
DPLSY K1000 K1000 Y2
I 101
IRET
SET M1348
END

Explanations:
a) Whenever X0 is triggered, Y0 will output 1,000 pulses; whenever X1 is triggered, Y2 will output
1,000 pulses.
6. I nst ruct i on Set

6- 145
b) When X triggers Y pulse output, there should be an interval of at least one scan time between
the end of Y pulse output and the next X-triggered output.
Program Example 2:
X1
M1347
PLSY K1000 K1000 Y0
X2
END

Explanations:
When both X1 and X2 are On, Y0 pulse output will keep operating. However, there will be a short
pause (approx. 1 scan time) every 1,000 pulses before the output of the next 1,000 pulses.

ELC Syst em Manual

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API Mnemonic Operands Function
58

PWM

Pulse Width Modulation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D *
PWM: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Pulse output width S
2
: Pulse output period D: Pulse output device (only be specified as Y1)
Explanations:
1. S
1
is specified as pulse output width as t:0~32,767ms. S
2
is specified as pulse output period as
T:1~32,767ms, S
1
S
2
.
2. D for all series ELC:
ELC PB/PC/PA/PH PV
Output point Y1 Y0, Y2, Y4, Y6
3. PB model, The D output device cannot be the same as the output of PLSY or PLSR instruction
when the PWM instruction is being used in a program.
4. PWM instruction can be used once in the program of PB model.
5. PC/PA models, When several pulse output instructions (PLSY, PWM, PLSR) use Y1 as the output
pulse in the same program, and simultaneously are executed in the same scan cycle, ELC will
perform the instruction which has fewest step numbers.
6. In PA/PC/PH/PV series models, S
1
0 or S
2
0 or S
1
S
2
are regarded as errors (but M1067 and
M1068 will not be On), and there will be no output from pulse output devices. When S
1
= S
2
, the
pulse output device will be always ON.
7. S
1
, S
2
can be changed during the execution of PWM instruction.
8. When M1070=ON, the pulse unit is 100s, when M1070=OFF, the pulse unit is 1ms.
9. For PC/PA/PH/PV series, there is no limitation on the times using this instruction in the program.
For PV series, four instructions are allowed to be executed at the same time.
6. I nst ruct i on Set

6- 147
Program Example:
When X0=ON, Y1 output the following pulse. When
X0=OFF, output Y1 will also turn OFF.
X0
PWM K1000 K2000 Y1
Output Y1
t=1000ms
T=2000ms
Note:
1. When several pulse output instructions (PLSY, PWM, PLSR) use Y1 as the output pulse in the
same program, and simultaneously are executed in the same scan cycle, ELC will perform the
instruction, which has fewest step numbers.
2. Flags and special registers for PV series ELC:
M1010: When On, CH0, CH1, CH2 and CH3 will output pulses when END instruction is
executed. Off when the output starts.
M1070: The setting of time unit of CH0 has to work with D1371.
M1071: The setting of time unit of CH1 has to work with D1372.
M1258: CH0 pulse output signals reverse.
M1259: CH1 pulse output signals reverse.
M1334: CH0 pulse output pauses.
M1335: CH1 pulse output pauses.
M1336: CH0 pulse output has been sent.
M1337: CH1 pulse output has been sent.
M1520: CH2 pulse output pauses.
M1521: CH3 pulse output pauses.
M1522: CH2 pulse output has been sent.
M1523: CH3 pulse output has been sent.
M1526: CH2 pulse output signals reverse.
M1527: CH3 pulse output signals reverse.
M1530: The setting of time unit of CH2 has to work with D1373.
M1531: The setting of time unit of CH3 has to work with D1374.
D1336: Low word of the current number of output pulses from CH0.
D1337: High word of the current number of output pulses from CH0.
D1338: Low word of the current number of output pulses from CH1.
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6- 148
D1339: High word of the current number of output pulses from CH1.
D1371: Time unit of CH0 output pulses when M1070 = On.
D1372: Time unit of CH1 output pulses when M1071 = On.
D1373: Time unit of CH2 output pulses when M1530 = On.
D1374: Time unit of CH3 output pulses when M1531 = On.
D1375: Low word of the current number of output pulses from CH2.
D1376: High word of the current number of output pulses from CH2.
D1377: Low word of the current number of output pulses from CH3.
D1378: High word of the current number of output pulses from CH3.
3. Time unit settings for PV series:
You cannot modify M1070 in the program.
D1371, D1372, D1373 and D1374 determine the time unit of the output pulses from CH0, CH1, CH2
and CH3 and the default setting is K1. If your set value is not within the range, the default value will
be adopted.
D1371, D1372, D1373, D1374 K0 K1 K2 K3
Time unit 10us 100us 1ms 10ms
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6- 149
API Mnemonic Operands Function
59

D PLSR

Pulse Ramp
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
S
3
* * * * * * * * * * *
D *
PLSR: 9 steps
DPLSR: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Maximum speed (HZ) S
2
: Number of pulses S
3
: Acceleration/Deceleration time (ms)
D: Pulse output device (only Y0 and Y1 can be specified)
Explanations:
1. S
1
: the maximum frequency (Hz) for 16-bit instruction: 10 to 32,767 Hz. For 32-bit instruction: 10 to
200,000 Hz. The maximum speed must be multiples of 10, if not, the ones digit will be discarded
automatically. 1/10 of the maximum speed is the max. variation per accel/decel step. Note: This
condition meets acceleration requirements of the step motor and would not result in the step motor
damage.
2. S
2
: Number of pulses for 16-bit instruction: 110~32,767, For 32-bit instruction: 110~2,147,483,647.
The minimum set-point is 110.
3. S
3
: Acceleration/Deceleration time (ms). Set-points: below 5,000ms. The acceleration time and the
deceleration time are the same setting.
a) The accel/decel time must be larger than 10 times the maximum scan time (contents of D1012). If
the set-point is below this, the slope of the accel/decel mayl be inaccurate.
b) Minimum set-point of the accel/decel time could be obtained from the following equation.
90000

If the set-point is smaller than the result of the above-mentioned equation, the accel/decel time will
be greater, and if the set-point is smaller than the 90000/ S
1
, the result value of 90000/ S
1
will be
treated as its regular set-point.
c) Maximum set-point of the accel/decel time could be obtained from the following equation.
818

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d) Number of the accel/decel speed variation steps is fixed 10 steps. If the input
acceleration/deceleration time is greater than the maximum set-point, the maximum set-point will
be treated as its regular set-point. If the set-point is smaller than the minimum set-point, the
minimum set-point will be treated as its regular set-point.
4. The acceleration is conducted when the pulse goes from the static status to reaching its targeted
speed and gets slower the closer it gets to its targeted distance. The pulse will stop its output once
the targeted distance is reached.
5. When the PLSR instruction has been executed, its output frequency is first raised up in increments
of 1/10 of the maximum frequency S
1
/10 and the time of each output frequency is fixed at 1/9 of
S
3
.
6. The output will not be affected if S
1
, S
2
or S
3
are changed when PLSR instruction is being
executed.
7. After the first group (Y0) of pulses have been output, set by S
2
, M1029=ON. After the second
group (Y1) of pulses have been output, set by S2, M1030=ON
8. When the instruction PLSR is activated again, M1029 or M1030 = OFF.
9. The output pulse numbers of the Y0/Y1 are stored in the special registers D1337, D1336 / D1339,
D1338.
10. D for all series:
ELC PB/PC/PA/PH PV
Output point Y0, Y1 Y0, Y2, Y4, Y6
11. PV series has four groups pf A-B phase pulse output CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 (Y4, Y5)
and CH3 (Y6, Y7). See remarks of API 57 PLSY for how to set up.
12. For PV series, when all the CH0 (Y0, Y1) pulses have been sent, M1029 will be On; when all the
CH1 (Y2, Y3) pulses have been sent, M1030 will be On; when CH2 (Y4, Y5) pulses have been
sent, M1036 will be On; when CH3 (Y6, Y7) pulses have been sent, M1037 will be On. Next time
when PLSR instruction is enabled, M1029, M1030, M1036 or M1037 will be 0 again and after the
pulse output is completed, they will become 1 again.
13. During the acceleration of each step, the pulse numbers (each frequency x time) may not all be
integer values, but the output operation of ELC is conducted in whole integer number. Therefore,
the time of each interval may not be the exact same and may have some deviation. The offset is
determined by the frequency value and by discarding the decimal point value. In order to ensure
the output pulse numbers are correct, ELC will fill in pulses as need to keep any deviation to a
minimum.
14. Use transistor output as output module.
15. Flag: M1029, M1030. Execution Completed flag.
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16. For PC/PV series, there is no limitation on the times of using this instruction in the program.
However, for PC/PA/PH series, two instructions can be executed at the same time; for PV series,
four instructions can be executed at the same time.
Program Example:
1. When X0=ON, the maximum frequency of instruction PLSR is 1,000Hz. The D10 is total quantity
of output pulse, the accel/decel time is 3,000ms and pulses output from output Y0. The output
frequency change 1,000/10 Hz every step. The frequency pulse of each is fixed as 3,000/9.
2. When X0 = OFF, the output will be interrupted, and when turned ON again, the pulses will recount
by zero.
X0
PLSR K1000 D10 K3000 Y0

Outputs: Y0 or Y1
Pul se speed(Hz)
Targeted speed: 10~30,000Hz
Time(Sec)
Decel time
below 5000ms
Accel ti me
below 5000ms
16-bit command:110~32,767PLS
32-bit command:110~2,147,483,647PLS
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
1010
Output pul ses
The max. speed of the
one time speed variation
is 1/10 of
10-step
variations
10-step
variations

Note:
1. When the PLSR instruction is used in a program, the outputs used in the PLSR instruction cannot
be used in the PLSY instruction or PWM instruction.
2. When several pulse output instructions (PLSY, PWM, PLSR) use Y0 as the output pulse in the
same program, and simultaneously are executed in the same scan cycle, ELC will perform the
instruction, which has fewest step numbers.
3. The maximum output pulse frequency is the same as that of PLSY. After M1133~M1135 and
D1133 are set in PA/PC/PH series models, the maximum pulse output frequency of Y0 can reach
50KHz. Please refer to Chapter 5 for M Relay and D Register Applications
ELC Syst em Manual

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Range of output frequency for all models
Model PB PA/PC/PH PV
Range of output
frequency
1~10,000Hz
Y01~30,000Hz
Y11~30,000Hz
Y010~200,000Hz
Y110~200,000Hz
Y410~200,000Hz
Y610~200,000Hz
Functions in PV series:
1. Relevant devices for PV series:
X0
PLSR K1000 D10 K3000 Y0

2. The range of pulse speed for this instruction is 10 ~ 200,000Hz. If the set values of maximum
speed and acceleration/deceleration time exceed the range, ELC will operate by the default value
that is within the range.
Operand S
1
S
2
S
3
D
Explanation Max. frequency
Total number of
pulses
Accel/Decel time Output point
16-bit 10 ~ 32,767Hz 110 ~ 32,767
Range
32-bit 10 ~ 200,000Hz 110 ~ 2,147,483,647
1 ~ 5,000ms Y0 ~ Y7
Definition
K0: No output
Kn: Designated
frequency
Kn: Designated
number
Flag: M1067,
M1068
See settings of
D1220, D1221
1 ~ 5,000ms 1 ~ 5,000ms
16-bit instruction: 110 ~ 32,767PLS
32-bit instruction: 110 ~ 2,147,483,647PLS
Frequency F
Maximum speed: 10 ~ 200,000Hz
Decel time Accel time
F0
Start
frequency
Total number of output pulses

3. The acceleration/deceleration of PV series is based on the number of pulses. If the output cannot
reach the maximum acceleration frequency within the acceleration/deceleration time offered, the
instruction will automatically adjust the acceleration/deceleration time and the maximum
6. I nst ruct i on Set

6- 153
frequency.
4. The operands have to be set before the execution of the instruction.
5. All acceleration/deceleration instructions are included with the brake function. The brake function
will be enabled when ELC is performing acceleration and the switch contact is suddenly Off. The
deceleration will operate at the slope of the acceleration.
S
1
F
0
Time T
Frequency F
Origi nal accelerati on path
Brake path

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API Mnemonic Operands Function
60

IST

Manual/Auto Control
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D
1
*
D
2
*
IST: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The starting input number (Operand S will occupy 8 continuous devices). D
1
The smallest number
for the designated-status step point in auto mode. D
2
: The greatest number for the designated-status
step point in auto mode.
Explanations:
1. The IST is a convenient instruction made specifically for the initial state of the step function control
procedure.
2. PB model, The range D
1
and

D
2
= S20~S127 and D
1
< D
2.
PC/PA/PH/PV models, the range D
1
and

D
2
= S20~S899 and D
1
< D
2.

3. IST instruction can only be used one time in a program.
Program Example 1:
M1000
IST X20 S20 S60

S: X20: Individual operation (Manual operation)
X21: Zero point return
X22: Step operation
X23: One cycle operation
X24: Continuous operation
X25: Zero point return start switch
X26: Start switch
X27: Stop switch
1. When the IST instruction is executed, the following special auxiliary relay will switch automatically.
M1040: Movement inhibited
M1041: Movement start
M1042: Status pulse
M1047: STL monitor enable
S0: Manual operation/initial state step point
S1: Zero point return/initial state step point
S2: Auto operation/initial state step point
2. When IST instruction is used, S10~S19 are for zero point return operation and the step point of
this state cant be used as a general step point. However, when using S0~S9 step points, S0
6. I nst ruct i on Set

6- 155
initiates manual operation, S1 initiates zero point return operation and S2 initiates auto
operation. Thus, there should be three circuits of these three initial state step points written first in
the program.
3. When switching to S1 (zero point return mode), zero point return wont have any actions once any
of S10~S19 = ON.
4. When switching to S2 (auto operation mode), auto operation wont have any actions once when S
is between D
1
to D
2
= ON or if M1043=ON
Program Example 2:
The Robot arm control (use IST instruction):
1. Motion request: In the example, two kinds of balls (big and small) are separated and moved to
different boxes.
2. Motion of the Robot arm: lower robot arm, collect balls, raise robot arm, shift to right, lower robot
arm, release balls, raise robot arm, shift to left to finish motion in order.
3. I/O Device
Y0
Y1
Y2 Y3
Left-limit X1
Upper-li mi t X4
Upper-li mi t X5
Right-li mi t X2
(bi g bal ls)
Right-li mi t X3
(small bal ls)
Big Small Big/smal l
sensor X0

4. Control panel
X35
X36
X37
X20
X21
X22
X23
X24
X25
Step X32
One cycle
operation X33
Continuous
operation X34
Manual
operation X30
Zero return X31
Power start
Power stop
Zero return
Auto start
Auto stop
Shi ft
to right
Shi ft
to left
Rel ease
balls
Col lect
balls
Lower
robot arm
Rai se
robot arm

a) Big/small sensor X0.
b) The left-limit of the robot arm X1, the right-limit X2 (big balls), the right-limit X3 (small balls), the
upper-limit X4, and the lower-limit X5.
c) Raise robot arm Y0, lower robot arm Y1, shift to right Y2, shift to left Y3, and collect balls Y4.
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6- 156
5. START circuit:
M1000
IST X30 S20 S80
X0
M1044
X1 Y4

6. Manual operation mode:
X20
SET
RST Y4
Y4
S
S0
X21
X22 Y1
Y0
X23 Y0
Y1
X24 X4
Y2
Y3
X25 X4
Y3
Y2
Collect balls
Release balls
Lower robot arm
Raise robot arm
Condition interlock
Shift to right
Shift to left
Condition interlock
Raise robot arm to the
upper-limit (X4 is ON)

7. Zero point return mode:
a) SFC figure:
S1
S10
X35
S11
X4
S12
X1
RST Y4
RST Y1
Y0
RST Y2
Y3
SET M1043
RST S12
Release balls
Stop lowering robot arm
Raise robot arm to the
upper-limit (X4 is ON)
Stop shifting to right
Shift to left and shift to
the left-limit (X1 is On)
Start zero return completed flag
Zero return operation completed

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6- 157
b) Ladder Diagram:
X35
SET S10
S
S1
RST Y4
S
S10
RST Y1
Y0
X4
SET S11
RST Y2
S
S11
Y3
X1
SET S12
SET M1043
S
S12
RST S12
Enter zero return operation mode
Release balls
Stop lowering robot arm
Raise robot arm to the
upper-limit (X4 is ON)
Stop shifting to right
Shift to left and shift to
the left-limit (X1 is On)
Start zero return completed flag
Zero return operation completed

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6- 158
8. Auto operation (step/one-cycle/continuous operation modes):
a) SFC figure:
S2
S20
S30
S31
M1044
X5
T0
Y1
SET
Y0
S32
X4
X2
S50 Y1
Y2
S2
X1
M1041
X0
Y4
TMR T0 K30
S60 RST
X5
Y4
TMR T2 K30
S70
T2
Y0
S80
X4
Y3
X1
S40
S41
X5
T1
SET
Y0
S42
X4
X3
Y2
X0
Y4
TMR T1 K30
X3 X2
X4
X5
X4
X4

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6- 159
b) Ladder Diagram:
END
RET
SET S20
SET S30
SET Y4
Y0
X5
S31
S
X4
TMR T0
SET S32
S2
S
M1041 M1044
S20
S
S30
S
Y1
X0
SET S40
X5 X0
SET S31
T0
K30
Y2
S32
S
X2
SET S50
X2
SET Y4
TMR T1
S40
S
SET S41
T1
K30
Y0
S41
S
X4
SET S42
Y2
S42
S
X3
SET S50
X3
Y1
S50
S
X5
SET S60
RST Y4
TMR T2
S60
S
SET S70
T2
K30
Y0
S70
S
X4
SET S80
Y3
S80
S
X1
X1
S2
X4
X4
X4
X5
Enter auto operation mode
Lower robot arm
Collect balls
Raise robot arm to the
upper-limit (X4 is ON)
Shift to right
Collect balls
Raise robot arm to the
upper-limit (X4 is ON)
Shift to right
Lower robot arm
Release balls
Raise robot arm to the
upper-limit (X4 is ON)
Shift to left and shift to
the left-limit (X1 is On)

ELC Syst em Manual

6- 160
Flag explanation:
M1040:
Step point movement disabled. When M1040=ON, all movements of the step point are disabled.
1. Manual operation mode: M1040 = ON.
2. Zero point return mode/one cycle operation mode: Pressing the STOP button and pressing
START button again, M1040 = ON.
3. Step operation mode: M1040 = ON, and will only be OFF when the START button is pressed.
4. Continuous operation mode: When ELC goes from STOPRUN, M1040 = ON, and will be OFF
when the START button is pressed.
M1041:
Step point movement start. the special auxiliary relay that reflects the movement of the primary step
point (S2) to the next step point.
1. Manual operation mode/Zero point return mode: M1041 = OFF.
2. Step operation mode/One cycle operation mode: M1041 = ON when the START button is
pressed.
3. Continuous operation mode: Stays ON when the START button is pressed, and turns OFF
when the STOP button is pressed.
M1042:
START pulse: Only once pulses will be sent out when the button is pressed.
M1043:
Zero point return complete: Once M1043 =ON, indicates that the RESET motion has been executed.
M1044:
Conditions of the origin: In continuous operation mode, conditions of the origin, M1044= ON to execute
the initial step point (S2) moving to the next step point.
M1045:
All output reset inhibit. If executing conditions:
1. From manual control S0 to zero point return S1
2. From auto operation S2 to manual operation S0
3. From auto operation S2 to zero point return S1
a) When M1045=OFF and one of S of D
1
~D
2
is ON, step point of SET Y output and actions will be
cleared to OFF.
b) When M1045 =ON, SET Y output will be reserved, and step point during action will be cleared to
6. I nst ruct i on Set

6- 161
OFF.
c) If executing from zero point return S1 to manual operation S0, no matter if M1045=ON or
M1045=OFF, SET Y output will be reserved, and step point action will be cleared to OFF.
M1046:
When STL action = ON: If one of step point S is ON, M1046=ON. After M1047 = ON, M1046 = ON once
one of S is ON. Besides, 8 prior points numbers is ON of step point S will be recorded in D1040~D1047.
M1047:
STL monitor enabled. When IST instruction starts executing, M1047 will be forced to be ON and it will be
forced to ON for each scan time once IST instruction is still ON. This flag is used to monitor all S.
D1040~D1047:
ON state number 1-8 of step point S.
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API Mnemonic Operands Function
61

D SER P

Search a Data Stack
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * * * * * *
D * * * * * *
N * * *
SER, SERP: 9 steps
DSER, DSERP: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Starting source S
2
: Compare value D: Starting destination for storing compared result
(occupies 5 continuous devices) n: Number of devices to compare
Explanations:
1. S
1
specifies the starting registers to compare, n specifies how many registers to compare to the
value specified by S
2
, and the compared result is stored in destination registers specified by D.
The data is compared in algebra format.
2. If operand S
2
uses index F, it is only available in a 16-bit instruction.
3. The range of operand n: n=1~256 (16-bit instruction), n=1~128 (32-bit instruction)
Program Example:
1. When X0=ON, the data stack D10~D19 are compared against D0 and the result is stored in
D50~D54. If there are no equal values, the content of D50~D52 will be 0.
2. The largest value of all compared data will be record in D53 and the samllest value of all compared
data will be record in D54. When there are more then one largest value and smallest value, only
the number of the largest value will be recorded.
X0
SER D10 D0 D50 K10

S
1

Content
value
Compare
data
Data
number
Result D
Content
value
Explanation
D10 88 0 D50 4 The total data numbers of equal value
D11 100 1 Equal D51 1 The number of the first equal value
D12 110 2 D52 8 The number of the last equal value
D13 150 3 D53 7 The number of the smallest value
D14 100 4 Equal D54 9 The number of the largest value
D15 300 5
D16 100 6 Equal
D17 5 7 Smallest
D18 100 8 Equal
D19 500

S
2




D0=K100

9 Largest
n


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API Mnemonic Operands Function
62

D ABSD

Absolute Drum
Sequencer
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * *
D * * *
n * *
ABSD: 9 steps
DABSD: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Starting device of the compared data table S
2
: Number of counter D: Starting destination of
compared result n: Groups of multi-step comparison (n=1~64)
Explanations:
1. The ABSD instruction is a multi-step comparison used in absolute cam control.
2. S
2
of DABSD specifies a high-speed counter. However, when the current value of the high-speed
counter is compared against the set-point value, the result can not output immediately, because it
is influenced by the scan time. If immediate output is required, use the DHSZ instruction.
3. When operand S
1
uses KnX, KnY, KnM, KnS, K4 only a 16-bit instruction can be used, K8 should
be specified as 32-bit instruction.
Program Example:
1. Before executing the ABSD instruction, preload the set-point values into D100~D107. The
content of the even number D register is the lower-limit value and the content of the odd number D
register is the upper-limit value.
2. When X20=ON, the current value of counter C10 is compared against the upper and lower-limit
value of D100~D107 four groups. The compared result is displayed in M10~M13.
3. When X20=OFF, the origin ON/OFF state of M10~M13 will be unchanged.
X20
ABSD D100 C10 M10 K4
C10
RST C10
X21
CNT C10 K400
X21

ELC Syst em Manual

6- 164
4. M10~ M13 = ON when the current value of C10 is equal to or higher than the lower-limit value and
equal to or lower than the upper-limit value.
Lower-limit value Upper-limit value Current value of C10 Output
D100= 40 D101=100 40C10100 M10=ON
D102=120 D103=210 120C10210 M11=ON
D104=140 D105=170 140C10170 M12=ON
D106=150 D107=390 150C10390 M13=ON
5. When the lower-limit value is higher than the upper-limit value, if the current value of C10 is higher
than the lower-limit value (C10>140) and lower than the upper-limit value (C10<60), M12=ON.
Lower-limit value Upper-limit value Current value of C10 Output
D100= 40 D101=100 40C10100 M10=ON
D102=120 D103=210 120C10210 M11=ON
D104=140 D105= 60 60C10140 M12=OFF
D106=150 D107=390 150C10390 M13=ON
400 200 0
40 100
120 210
60 140
150 390
M10
M11
M12
M13


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API Mnemonic Operands Function
63

INCD

Incremental drum
sequencer
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
*
D * * *
n * *
INCD: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Starting device of the compared data table S
2
: Number of counter D: Starting number of
compared result n: Groups of multi-step comparison (n=1~64)
Explanations:
1. The INCD instruction is a multi-step comparison instruction and usually used in relative cam
control.
2. The current value of S
2
is compared against the set-point value of S
1
. Once the current value is
equal to the set-point value, the current value of S
2
will be reset to 0 and be compared again. The
return times will be stored in S
2
+1.
3. When the comparison of n groups data has been completed, the execution completed flag M1029
= ON for one scan cycle.
4. When operand S
1
is specified as KnX, KnY, KnM, KnS, K4 should be specified.
5. In 16-bit instructions, operand S
2
should be C0~C198 and will occupy 2 continuous counters.
6. Flag: M1029 execution completed flag
Program Example:
1. Before executing the INCD instruction, preload the set-point values into D100~D104 in advance.
D100=15, D101=30, D102=10, D103=40, D104=25.
2. The current value of counter C10 is compared against the set-point value of D100~D104. Once
the current value is equal to the set-point value, the current value of C10 will be reset to 0 and will
be compared again.
3. The current counting will be stored in C11.
4. When the content of C11 increase 1, M10~M14 will also change in response. Please refer to the
following timing diagram.
5. When the comparison of 5 groups of data has been completed, the execution completed flag
M1029 = ON for one scan cycle.
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6- 166
6. When X0 turns from ON OFF, C10 and C11 will all be reset to 0 and M10~M14 =OFF. When X0
turns ON again, this instruction will be executed again.
INCD D100 C10 M10 K5
X0
CNT C10 K100
M1013

X0
M10
M12
M11
M13
M14
M1029
15
10
15 15
30 30
40
25
1 1 1
0 0 0
2
3
4
C10
C11
Current value
Current value


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API Mnemonic Operands Function
64

TTMR

Alternate Timer
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D *
n * *
TTMR: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Device number for storing the ON time of the input n: Multiple set-point (n=0~2)
Explanations:
1. The ON time of the external button switch is measured and stored in D +1, the measured unit is
100ms minimum increments. The content of D +1 in seconds is multiplied by n and stored in D.
2. When multiple set-point n=0, the measured unit of D is in seconds. When n=1, the measured unit
of D is 100ms periods (is multiplied by 10). When n=2, the measured unit of D is 10ms periods (is
multiplied by 100).
3. Operand D will occupy 2 continuous devices.
4. PC/PA/PH: The TTMR instruction can only be used eight times in a program.
Program Example 1:
1. The time that the input X0 is pushed (ON duration of X0) will be stored in D1, n is used to specify
the multiple of the time and the total bit time is stored in D0. Then the button switch can be used to
adjust the set-point value of a timer.
2. When X0 = OFF, the content of D1 will be reset to 0 but the content of D0 is unchanged.
X0
TTMR D0 K0
X0
D1
D0
D0
D1
T T
pushed time (sec) pushed time (sec)

3. If ON duration of X0 is T seconds, the relation between D0, D1 and n are shown as the table
below.
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n D0 D1(unit: 100 ms)
K0 (unit: s) 1T D1=D010
K1 (unit: 100 ms) 10T D1=D0
K2 (unit: 10 ms) 100T D1=D0/10
Program Example 2:
1. Using TMR instruction to write 10 groups set-point time.
2. Write the set-point value into D100~D109 in advance.
3. The measured unit of the following timers T0~T9 is 0.1 second and the measured unit of the
alternate Timer is 1 second.
4. Connect one bit digital switch to X0~X3 and use BIN instruction to convert the set-point value of
digital switch to BIN value and store in E.
5. The ON duration (in sec) of X20 is stored in D200.
6. M0 is a pulse for one scan cycle generated when the alternate timer button X20 is released.
7. Use the set-point number of digital switch as the pointers of index register, and then transmit the
content of D100 to D200E (D200~D209).
M10
TMR T0 D100
M11
TMR T1 D101
M19
TMR T9 D109
M1000
BIN K1X0 E
X20
TTMR D200 K0
X20
PLF M0
M0
MOV D100 D200E

Note:
PC/PA/PH models, can only use the TTMR instruction eight times in a program. If used in a CALL
subroutine or interrupt subroutine, it only can be use once.

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API Mnemonic Operands Function
65

STMR

Special Timer
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
m * *
D * * *
STMR: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Number of timer (T0~T191) m: Set-point value of timer (m=1~32,767), unit in 100ms
D: Starting device of output (occupies 4 continuous devices)
Explanations:
1. Range of S: for PC/PA/PH T0 ~ T191; for PV T0 ~ T199
2. STMR instruction is a instruction which provides OFF-delay, one shot and flash loop.
3. The number of timer specified S by STMR instruction can not be repeated.
Program Example:
1. When X20=ON, the set-point value of the timer T0 is 5 seconds. Y0 is the OFF-delay contact :
2. When X20 turns from OFF ON, Y0= ON. When X20 turns ON OFF and delay 5 seconds,
Y0=OFF. When X20 turns from ON OFF, Y1= ON output one time for 5 seconds.
3. When X20 turns from OFF ON, Y2=ON output one time for 5 seconds.
4. When X20 turns from OFF ON,
Y3=ON after a 5 second delay. When
X20 turns from ON OFF, Y3=OFF
after a 5 second delay.
X20
STMR T0 K50 Y0
X20
Y0
Y1
Y2
Y3
5 sec 5 sec
5 sec 5 sec
5 sec
5 sec

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5. Add a b contact Y3 after the drive
contact X20, and then Y1, Y2 can be
used as the output of flash loop. When
X20 turns OFF, Y0, Y1 and Y3 = OFF
and the content of T10 will be reset to
0
X20
STMR T10 K50 Y0
Y3
X20
Y1
Y2 5 sec 5 sec
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API Mnemonic Operands Function
66

ALT P

Alternate ON/OFF
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D * * *
ALT, ALTP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Destination device
Explanations:
1. The status of the destination device (D) is alternated on every operation of the ALT instruction.
2. This means the status of each bit device will flip-flop between ON and OFF. This will occur on
every program scan unless a pulse modifier or a program interlock is used.
3. The ALT instruction is ideal for switching between two modes of operation e.g. stat and stop, ON
and OFF etc.
4. This instruction usually works best as a pulse instruction (ALTP).
Program Example 1:
When X0 turns from OFF ON for the first time, Y0=ON. When X0 turns from OFF ON for the second
time, Y0=OFF.
X0
ALTP Y0
X0
Y0

Program Example 2:
Output Y0 will flash. When X20= ON, T0 will generate a pulse every two seconds and output Y0 will be
switch between ON and OFF depending on the pulse of T0.
X20
TMR T0
ALTP Y0
K20
T0
T0


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API Mnemonic Operands Function
67

RAMP

Ramp variable Value
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
D *
n * * *
RAMP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Starting set-point of ramp signal S
2
: Ending set-point of ramp signal D: Current value of ramp
signal n: Scan times (n=1~32,767)
Explanations:
1. This instruction creates a ramp output. A ramp output linearity depends on a consistent scan.
Therefore, set the scan time a fix time prior to using this RAMP instruction.
2. Preload the starting set-point value D10 and ending set-point value to D11. When X20 = ON, the
set-point value is forwarding from D10 to D11 (set-point value in D10 will be increased) and the
proceeding time (n= 100 times scans) is stored in D12.
3. To set a fixed scan time, set M1039=ON. Then, preload the scan time value into special register
D1039. Take the program below as an example, if the set-point value is 30ms and n=K100, the
time between D10 and D11 is 3 second (30ms100).
4. During the execution of this instruction, when starting signal X20 turns OFF, this instruction will
stop operation. When X20 turns ON again, the content of D12 will be reset to 0(zero) and
calculated again.
5. When M1026=OFF, and the execution of this instruction is completed M1029= ON then the
content of D12 will be reset to the set-point value of D10.
6. Using this instruction with analog signal output can execute the operation of smooth Start/Stop.
7. To ensure proper operation when switching the ELC from STOP to RUN when X20= ON, the
content of D12 should be reset to 0(zero) in the beginning of the program. (If D12 is a latched
area.)
6. I nst ruct i on Set

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Program example:
X20
RAMP D10 D11 D12 K100

If X20=ON,
D10
D12
D11
D11
D12
D10
D10<D11 D10>D11
n times scans
Scan time is stored in D13
n times scans

Points to note:
M1026 ON/OFF mode:
D11
D10
D12
M1029
M1026=ON
X20
D11
D10
D12
M1029
M1026=OFF
Starting signal
X20
Starting signal


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API Mnemonic Operands Function
69

SORT

Data sort
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
m
1
* *
m
2
* *
D *
n * * *
SORT: 11 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Starting device of source data table m
1
: Sort data groups (m
1
=1~32) m
2
: Column numbers of
each data (m
2
=1~6) D: Starting device for storing sort data n: Reference value of sort data (n=1~
m2)
Explanations:
1. The sorted data is stored in the m
1
m
2
registers counted from D. Therefore, if device S and D
specify the same register, the resulting sorted data will be the same as the content of source
device S.
2. Once the SORT instruction has completed, the Flag M1029 (Execution completed flag) = ON.
Program Example:
When X0 = ON, it starts to sort the specified data. After the data sort is complete, M1029= ON. During
the execution of the SORT instruction, data being sorted should not be changed. If the sort data needs
to be changed the SORT instruction should be turned OFF, modify the data, and turn ON the SORT
instruction.
X0
SORT D0 K5 K5 D50 D100

6. I nst ruct i on Set

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Example table of data sort

Data numbers: m
2


Data Column
1 2 3 4 5

Column

Row
Students
No.
English Math. Physics Chemistry
1 D01 D590 D1075 D1566 D2079
2 D12 D655 D1165 D1654 D2163
3 D23 D780 D1298 D1789 D2290
4 D34 D870 D1360 D1899 D2350
D
a
t
a

n
u
m
b
e
r
s
:

m
1

5 D45 D995 D1479 D1975 D2469

3. Sort data table when D100=K3
Data numbers: m
2


Data Column
1 2 3 4 5

Column

Row
Students
No.
English Math. Physics Chemistry
1 D504 D5570 D6060 D6599 D7050
2 D512 D5655 D6165 D6654 D7163
3 D521 D5790 D6275 D6766 D7279
4 D535 D5895 D6379 D6875 D7369
D
a
t
a

n
u
m
b
e
r
s
:

m
1

5 D543 D5980 D6498 D6989 D7490

4. Sort data table when D100=K5
Data numbers: m
2


Data Column
1 2 3 4 5

Column

Row
Students
No.
English Math. Physics Chemistry
1 D504 D5570 D6060 D6599 D7050
2 D512 D5655 D6165 D6654 D7163
3 D525 D5795 D6279 D6775 D7269
4 D531 D5890 D6375 D6866 D7379
D
a
t
a

n
u
m
b
e
r
s
:

m
1

5 D543 D5980 D6498 D6989 D7490
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API Mnemonic Operands Function
70

D TKY

Ten Key Input
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * *
D
1
* * * * * * * *
D
2
* * *
TKY: 7 steps
DTKY: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Start input device (occupies 10 continuous devices) D
1
: Destination for storing key input value
D
2
: Key input signal (occupies 10 continuous devices)
Explanations:
1. This instruction can specify ten external input devices from S and these ten external input devices
is identified as decimal value of 0 to 9. These ten external input devices are connected to ten keys
respectively. When keys is pressed, the value of decimal numbers from 0 to 9,999 (max. 4 digits in
16-bit instruction) or from 0 to 99,999,999 (max. 8 digits in 32-bit instruction) can be input and
stored in destination D
1
. The device D
2
is used to store the state of that key has been pressed.
2. For PC/PA/PH, S and D
2
do not support E, F index register modification
Program Example:
Using this instruction can specify ten input terminals from X30 to connect to ten keys which number is
from 0 to 9. When X20=ON, the instruction is executed and it will store the BIN value which is input by
keys into D0 and M10~M19 is used to store the condition of the key that has been pressed.
X20
TKY X30 D0 M10


ELC
0 1 3 2 4 5 6 7 8 9
X33 X32 X31 X30 S/S X36 X35 X34 X40 X37 X41 +24V 24G


6. I nst ruct i on Set

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0 1 2 3 4 5 6 7 8 9
D0
10
3
10
2
10
1
10
0
number key
BCD value one digit number BCD code
BIN value
overflow
BCD value

1. The chart below has four keys connected to X35, X33, X30 and X31 of a number keyboard. After
pressing the four keys in that order of 1234 and the number 5,301 will be entered into D0. The
max. number which can be entered in D0 is 9,999 i.e. 4 digits. If the entered number exceeds the
allowable range, the highest digits will overflow.
2. After X32 is pressed, M12=ON until another key is pressed. The process is the same as other
keys are pressed.
3. When any key of X30~X41 is pressed, one device of M10~M19 will be ON.
4. If any key is pressed, M20=ON.
X30
X31
X33
X35 1
2
3
4
1 2 3 4
M10
M11
M13
M15
M20
Key output
signal
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API Mnemonic Operands Function
71

D HKY

Hexadecimal Key Input
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S *
D
1
*
D
2
* * * * *
D
3
* * *
HKY: 9 steps
DHKY: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Start scan input device (occupies 4 continuous devices) D
1
: Start scan output device (occupies 4
continuous devices) D
2
: Destination for storing key input value D
3
: Key input signal (occupies 8
continuous device)
Explanations:
1. This instruction can create a 16-key keyboard of 4 continuous external input devices from S and 4
continuous external output devices from D
1
by matrix scan. The key input value will be stored in D
2

and D
3
and is used to store the condition that a key has been pressed.
2. Every time this instruction is executed, the execution completed flag M1029 = ON for the duration
the key is pressed (one scan cycle).
3. If two or more keys are pressed at the same time, only the key activated first will be effective.
4. When HKY instruction is used in a 16-bit instruction, D
2
can store numbers from 0 to 9,999 (max. 4
digits). When DHKY instruction is used in a 32-bit instruction, D
2
can store numbers from 0 to
99,999,999 (max. 8 digits). If the entered number exceeds the above allowable range, the highest
digits will overflow.
5. For PC/PA/PH, S, D
1
and D
2
do not support E, F index register modification
Program Example:
1. Using this instruction to create a 16-key keyboard which is a multiplex of 4 continuous external
input devices X20~X23 and 4 continuous external output devices Y20~Y23. When X4=ON, the
instruction is executed and it will store the BIN value which is inputted by keys into D0 and M0~M7
is used to store the condition of that a key has been pressed.
X4
HKY X20 Y20 D0 M0

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2. Number input:
0 1 2 3 4 5 6 7 8 9
D0
10
3
10
2
10
1
10
0
number key
one digit number BCD code
BCD value
BCD value
BIN value
overflow

3. Function key input:
a) When A key is pressed, M0=ON and latched. Next,
press D key and then, M0=OFF, M3=ON and latch.
b) If two or more keys are pressed at the same time, only
the key activated first is effective.
F E D C B A
M5 M4 M3 M2 M1 M0
4. Key output signal:
a) When any key of A F is pressed, M6=ON for one scan time.
b) When any key of 0 to 9 is pressed, M7=ON for one scan time.
5. When the drive contact X4 = OFF, the previous values do not change but M0~M7 = OFF.
ELC Syst em Manual

6- 180
6. External wiring:
Y23 Y22 Y21 Y20 C
X23 X22 X21 X20 S/S
C D E F
8 9 A B
4 5 6 7
0 1 2 3
ELC(Transistor output)
+24V 24G

Points to note:
1. When this instruction is executed, 8 scan time cycles are required to read the input value of keys
successfully. If the scan cycle is too long or too short, it may cause the key values to be read
incorrectly. Therefore, a fixed scan time is suggested.
a) When scan time is too short, it can not read correct I/O key input, therefore, you can fixed the scan
time.
b) When scan time is too long, use this instruction in subroutine of time interrupt to executed.
2. The function of flag M1167:
a) When M1167=ON, HKY instruction can input hexadecimal value of 0~F.
b) When M1167=OFF, A~F of HKY instruction are used as function keys.
3. Functions of D1037 (only supports PV series):
Write D1037 to set the overlapping time for keys (unit: ms). The overlapping time will vary upon
different program scan time and the settings in D1037.
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API Mnemonic Operands Function
72

DSW

Digital Switch
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S *
D
1
*
D
2
* * *
n * *
DSW: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Starting device of switch input D
1
: Starting device of switch output D
2
: Destination device for
storing the set-point value n: Number of digits (n=1~2)
Explanations:
This instruction is used to read one(n=1) or two(n=2) groups of 4 digits switch through 4 or 8 continuous
external input devices from S and 4 continuous external devices from D
1
and store the set-point value in
destination device D
2
. Flag: Operation complete M1029
Program Example:
1. The first group of switches consists of X20~X23 and Y20~Y23. The second group of switches
consists of X24~X27 and Y20~Y23. When X0=ON, the set-point value of the first group of
switches are read and converted to binary and stored in D20. The set-point value of the second
group of switches are read and converted to binary and stored in D21.
X0
DSW X20 Y20 D20 K2

2. When X0=ON, Y20~Y23 will be ON and scan in circles automatically. After the completion of each
circle scan, execution completed flag M1029=ON is a scan period after a circle scan.
3. Outputs Y20~Y23 please use transistor output. Besides, please make sure that every 1, 2, 4, 8
terminal should connect a diode (0.1A/50V) to the inputs of ELC in serial as shown right.
ELC Syst em Manual

6- 182
X0
Y20
Y21
Y22
Y23
M1029
0.1s
0.1s
0.1s
0.1s
0.1s 0.1s
interrupt
execution completed
operation start

Wiring diagram of digital switch:
S/S X20 X21 X22 X23 X24 X25 X26 X27
Y23 Y22 Y21 Y20 C
1 2 4 8 1 2 4 8
ELC
10 10 10 10
0 1 2 3
10
0
10
1
10
2
10
3
0V +24V
BCD digital
switches
should connect
a diode (1N4148)
in serial
The first group
The second group
Points to note:
When the scan terminals are relay outputs, the following program technique is used with this instruction
to operate successfully:
1. When X30=ON, DSW instruction is executed. When X30 turns OFF, M10 will be ON until the scan
terminals of DSW instruction complete one output scan cycle. Then, M10 will turn OFF.
2. If the drive contact X30 use button switch, every time when X30 is pushed, M10, the scan
terminals specified by DSW instruction, will be reset to OFF after the completion of one output
scan cycle. Then, the instruction will stop executing, the data of digital switch will be read
completely and the scan terminals will be activated while the button switch is pushed. Therefore,
6. I nst ruct i on Set

6- 183
even relay output is used in this situation, the relay can be used for long because the operation of
relay is not frequent.

M10
DSW X20 Y20 D20 K2
X30
SET M10
M1029
RST M10


ELC Syst em Manual

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API Mnemonic Operands Function
73

SEGD P

7-segment Decoder
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * * * *
D * * * * * * * *
SEGD, SEGDP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source device for decoding D: Output device after decoding
Explanations:
A single hexadecimal digit (0 to 9, A to F) occupying the lower 4 bits of source device S is decoded into a
data format used to drive a seven segment display. A representation of the hex digit is then displayed.
The decoded data is stored in the lower 8 bits of destination device D. The upper 8 bits of the same
device are not written to.
Program Example:
When X20=ON, contents (16 bits) of the lower 4 bits (b0~b3) of
D10 will be decoded as readable in the 7-segment display panel
for output. The decoding results will be stored in Y20~Y27.
X20
SEGD D10 K2Y20
Decoding Chart of the 7-segment Display Panel
Status of each segment
16 bits
Bit
Combination
Composition
of the 7-SEG
display
B0(a) B1(b) B2(c) B3(d) B4(e) B5(f) B6(g)
0 0000 On On On On On On Off
1 0001 Off On On Off Off Off Off
2 0010 On On Off On On Off On
3 0011 On On On On Off Off On
4 0100 Off On On Off Off On On
5 0101 On Off On On Off On On
6 0110 On Off On On On On On
7 0111 On On On Off Off Off Off
8 1000 On On On On On On On
9 1001 On On On On Off On On
A 1010 On On On Off On On On
B 1011 Off Off On On On On On
C 1100 On Off Off On On On Off
D 1101 Off On On On On Off On
E 1110 On Off Off On On On On
F 1111

On Off Off Off On On On
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API Mnemonic Operands Function
74

SEGL

7-segment with Latch
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * * * *
D *
n * *
SEGL: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Display source device of 7-segment display D: Start device of 7-segment display scan output
n: Polarity set-point of output signal and scan signal (n=0~7)
Explanations:
1. 8 or 12 continuous external output points that start from this instruction operand D can be
regarded as display and scan signal output of 1 or 2 groups of 4 digits of 7-segment display.
7-segment display module has function to convert input BCD code to 7-segment display and has
control signal to latch it.
2. n will decide the numbers of groups of 4 digits of 7-segment display and also indicate the polarity
of ELC output terminal and 7-segment display input terminal.
3. The points number of 7-segment display output instruction that a group of 4 digits use is 8 points
and 2 groups of 4 digits use are 12 points.
4. Scan output terminal will circulate in sequence when this instruction executes. The drive contact
will be changed from OFF to ON and scan output execute again.
5. SEGL instruction can only be used twice.
6. Flag: M1029 execution completed flag
Program Example:
1. When X20=ON, instruction will start to execute. 7-segment display scan loop is composed of
Y20~Y27. The value of D10 will be converted to BCD code and send to the first group of
7-segment display to display. The value of D11 will be converted to BCD code and send to the
second group of 7-segment display to display. If any value of D10 or D11 is greater than 9,999,
operation error will occur.
X20
SEGL D10 Y20 K4

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2. When X20=ON, Y24~Y27 will scan in circles automatically. Each circle scan needs 12 scan cycles.
M1029=ON is a scan period after a circle scan.
3. 4 digits of a group, n=0~3
a) After the terminal of 1, 2, 4, 8 of decoded 7-segment display connects itself in parallel, they should
connect to Y20~Y23 of ELC. Latch terminal of each number connects to Y24~Y27 of ELC
individually.
b) When X20=ON, the content of D10 will be transmitted to 7-segment display to display in
sequentially according to Y24~Y27 circulates in sequence
4. 4 digits of two groups, n=4~7
a) After the terminal of 1, 2, 4, 8 of decoded 7-segment display connects itself in parallel, they should
connect to Y30~Y33 of ELC. Latch terminal of each number and the first group share Y24~Y27 of
ELC.
b) The content of D10 will be transmitted to the first group of 7-segment display and the content of
D11 will be transmitted to the second group of 7-segment display to display. If D10=K1234 and
D11=K4321, the first group will display and the second group will display 1.
7-segment display scan output wiring
C Y20 Y21 Y22 Y23 Y24 Y25 Y26 Y27 Y30 Y31 Y32 Y33 C C
1 2 4 8
10
0
10
1
10
2
10
3
10
3
10
2
10
1
10
0
V+
10
3
10
2
10
1
10
0
V+
1
2
4
8
1
2
4
8
The first group The second group

Points to note:
1. PB series only provide a group of 4 digits of 7-segment display and use 8 points to output. SEGL
instruction only can be used once in the program and the usage range of operand n is 0 to 3.
2. Scan time must be longer than 10ms while this instruction is executed. If scan time is shorter than
10ms, please use fixed scan time function to fix scan time on 10ms.
3. Please use suitable 7-segment display for the transistor that ELC uses to output.
6. I nst ruct i on Set

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4. Set-points of n: it is used to set the polarity of transistor output loop. It can be set to positive
polarity or negative polarity. What 7-segment display it connects is a group of 4 digits or two
groups of 4 digits.
5. ELC transistor output is NPN type and it is open collect output. When wiring, output should
connect a pull-high resistor to VCC (less than 30VDC). Therefore, when output point Y is ON,
output will be low voltage.
On
ELC
VCC
Y
step up resistor
signal output
Y drive

6. Positive logic (Negative polarity) output of BCD code
BCD value Y output (BCDcode) Signal output
b
3
b
2
b
1
b
0
8 4 2 1 A B C D
0 0 0 0 0 0 0 0 1 1 1 1
0 0 0 1 0 0 0 1 1 1 1 0
0 0 1 0 0 0 1 0 1 1 0 1
0 0 1 1 0 0 1 1 1 1 0 0
0 1 0 0 0 1 0 0 1 0 1 1
0 1 0 1 0 1 0 1 1 0 1 0
0 1 1 0 0 1 1 0 1 0 0 1
0 1 1 1 0 1 1 1 1 0 0 0
1 0 0 0 1 0 0 0 0 1 1 1
1 0 0 1 1 0 0 1 0 1 1 0
7. Negative logic (Positive polarity) output of BCD code
BCD value Y output (BCDcode) Signal output
b
3
b
2
b
1
b
0
8 4 2 1 A B C D
0 0 0 0 1 1 1 1 0 0 0 0
0 0 0 1 1 1 1 0 0 0 0 1
0 0 1 0 1 1 0 1 0 0 1 0
0 0 1 1 1 1 0 0 0 0 1 1
0 1 0 0 1 0 1 1 0 1 0 0
0 1 0 1 1 0 1 0 0 1 0 1
0 1 1 0 1 0 0 1 0 1 1 0
0 1 1 1 1 0 0 0 0 1 1 1
1 0 0 0 0 1 1 1 1 0 0 0
1 0 0 1 0 1 1 0 1 0 0 1
ELC Syst em Manual

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8. Display scan (latch) signal
Positive logic (Negative polarity) output Negative logic (Positive polarity) output
Y output (Latch) Output control signal Y output (Latch) Output control signal
1 0 0 1
9. Parameter n set-points:
Groups number of
7-segment display
A group Two groups
Y of BCD code outputs
Display scan latch signal
n 0 1 2 3 4 5 6 7
: Positive logic (Negative polarity) output
: Negative logic (Positive polarity) output
10. The matching of output polarity of ELC transistor and input polarity of 7-segment display can be
set by set-points of n.

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API Mnemonic Operands Function
75

ARWS

Arrow Key Input
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * *
D
1
* * * * *
D
2
*
n * *
ARWS: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Start device of key input (occupies 4 continuous devices) D
1
: Display device on 7-segment display
D
2
: Scan output start device of 7-segment display n: Polarity set-point of output signal and scan
signal (n=0~3)
Explanations:
1. This instruction displays the contents of a single data device D
1
on a set of 4 digit, seven segment
displays. The data within D
1
is actually in a standard decimal format but is automatically
converted to BCD for display on the seven segment units. Each digit of the displayed number
can be selected and edited. The editing procedure directly changes the value of the device
specified as D
1
.
2. There is no number-of-times limit when using ARWS, but this instruction only can be executed
once in the program.
3. S and D
2
of PC/PA/PH do not support E, F index register modification and it only can be specified
as a multiple of 10, e.g. Y0, Y20etc.
4. Output point that designated by this instruction should use transistor to output.
5. When using this instruction to set the scan time to fixed or put this instruction into time interrupt
subroutine (I6~I7) to execute.
Program Example:
1. When the instruction is executed, X20 is defined as the down key, X21 is defined as the up key,
X22 is defined as the right key and X23 is defined as the left key. These keys are used to edit and
display the external set-point value. The set-point value is stored in D20 and its set-point range is
from 0 to 9,999.
2. When X0=ON, 10
3
is a effective set-point digit number. pressing left key, the effective set-point
digit number will be displayed and jump by the direction from 10
3
10
0
10
1
10
2
10
3
10
0
.
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3. pressing the right key, the effective set-point digit number will be displayed and jump by the
direction from 10
3
10
2
10
1
10
0
10
3
10
2
. Meanwhile, the digit position LED connected from
Y24 to Y27 will also be ON to indicate the effective set-point digit number.
4. pressing the up key to increase , the effective number will change from 0128901. If
pressing the down key, the effective number will change from 098109, meanwhile,
the changed value will be displayed on the 7-segment display.
X0
ARWS X20 D20 Y20 K0

1
2
4
8
10 10 10 10
3 2 1 0
Y20
Y21
Y22
Y23
Y27
Y26
Y25
Y24
LED
Digit
position
7-step display which displays
setting value (4 digits data)
X21
X20
X22 X23
Increase digit value
decrease digit value
Move
to
the left
Move
to
the right
The 4 switches is used to move
digit position to the left or to the
right and increase or decrease
the setting value of the digits


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API Mnemonic Operands Function
76

ASC

ASCII code Conversion
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
D * * *
ASC: 11 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The alphanumeric character to be converted to its ASCII code D: The destination for storing the
ASCII code
Explanation:
1. The alphanumeric character can be used to display error message directly if connect 7-segment
display when using this instruction.
2. Operand S is an 8 alphanumeric character string input by ELCSoft software from PC, or ASCII
code input by HHP units.
3. Flag: M1161 8/16 mode exchange.
Program Example:
When X0=ON, A~H is converted to ASCII code and stored in D0~D3.
X0
ASC A B C D E F G H D0
D0
D1
D2
b15 b0
42H (B) 41H (A)
44H (D) 43H (C)
46H (F) 45H (E)
D3 48H (H) 47H (G)
Low byte High byte

When M1161=ON, the ASCII code converted from
every character will occupy the lower 8-bit (b7~b0) of
one register. The high byte will be invalid and its
content is filled with 0. This also means that one
register only can be used to store one character.
b15 b0
D0
D2
D4
D6
D1
D3
D5
D7
00 H
00 H
00 H
00 H
00 H
00 H
00 H
00 H
41H (A)
42H (B)
43H (C)
44H (D)
45H (E)
46H (F)
47H (G)
48H (H)
Low byte High byte

ELC Syst em Manual

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API Mnemonic Operands Function
77

PR

Outputs ASCII code
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * *
D *
PR: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The device for storing ASCII code (occupies 4 continuous devices) D: The external output device
which outputs ASCII code (occupies 10 continuous devices)
Explanations:
1. This instruction will output ASCII codes stored in 4 registers from S in order of the output devices
specified by D.
2. The PR instruction only can be used twice in the program.
3. Flag: M1029 execution completed flag.
Program Example 1:
1. First, use the ASC instruction convert A~H to ASCII code and store them in D0~D3. Then, using
this instruction output them in the order of A~H.
2. When M1027=OFF and X20=ON, this instruction will be executed to indicate Y20 (lower bit)~Y27
(upper bit) as data output, Y30 as scan signal, and Y32 as monitor signal. This mode can execute
sequential output of 8 characters.
3. If X20 turns from ON OFF while the instruction being executed, the data output will be interrupt,
and all the output will be OFF. When X20 = ON once more, the data will be sent again.
X20
PR D0 Y20

T T T
A B C D H
X20 start signal
Y20~Y27 data
Y30 scan signal
Y31 being executed
T : scan time(ms)

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6- 193
Program Example 2:
1. The PR instruction provides an 8 character serial string output operation. When M1027=OFF, a
maximum of 8 character strings can be output serially. When M1027=ON, a 1 to 16 character
string output operation can be executed.
2. When M1027=ON and X20 is from OFF to ON, this instruction will be executed to indicate Y20
(lower bit)~Y27 (upper bit) as data output, Y30 as scan signal, and Y31 as monitor signal. This
mode can execute sequential output of 16 characters. If the conditional contact is suddenly OFF,
the data output will be interrupt, and all the output will be OFF
3. If the character string 00H (NULL) has been sent, it means the end of the character string and the
operation of PR instruction wont continue.
4. The drive contact X20 is always ON but it will automatically stop after one time operation of data
output. However, if X20 is always ON, M1029 wont be activated.
X20
PR D0 Y20
M1002
SET M1027

T T T
last character first character
T : scan time or
i nterrupt time
X20 start signal
Y20~Y27 data
Y30 scan signal
Y31 being executed
M1029 execution
is completed

Points to note:
1. This instruction should only use transistor output.
2. When using this instruction, set the scan time to fixed or execute this instruction in a time interrupt
subroutine.

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API Mnemonic Operands Function
78

D FROM P

Read CR from
Module
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
m
1
* * *
m
2
* * *
D * * * * * * * *
n * * *
FROM, FROMP: 9 steps
DFROM, DFROMP: 17
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
m
1
: Number for special module m
2
: Number of CR (Control Register) of special module that will be
read D: Location to save read data n: Data words to read at one time
Explanations:
1. ELC uses this instruction to read CR data of special modules.
2. Range of m1 (16-bit and 32-bit): for PB/PC/PA/PH: 0 ~ 7, for PV: 0 ~ 7, 100 ~ 107.
3. Range of m2 (16-bit and 32-bit): for PB/PC/PA/PH: 0 ~ 48, for PV: 0 ~ 499.
4. Range of n:
a) 16-bit: for PB/PC/PA/PH: 1 ~ (49 m
2
), for PV: 1 ~ (500 m
2
).
b) 32-bit: for PB/PC/PA/PH: 1 ~ (49 m
2
)/2, for PV: 1 ~ (500 m
2
)/2.
5. When D indicates a bit device operand, use K1~K4 for 16-bit instruction and K5~K8 for 32-bit
instruction.
6. Flag: When M1083=ON, it enables interrupts during instruction FROM/TO. Refer to following
explanation for detail.
7. PB series doesnt support index register E, F.
Program Example:
1. Read the content of CR#29 of special module#0 to D0 of ELC and to read the content of CR#30 of
special module#0 to D1 of ELC. The 2 words can be read at one time (n=2).
2. The instruction will be executed when X0=ON. The instruction wont be executed when X0=OFF
and the content of previous reading data wont change.
X0
FROM K0 K29 D0 K2


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API Mnemonic Operands Function
79

D TO P

Write CR to Module
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
m
1
* * *
m
2
* * *
S * * * * * * * * * * *
n * * *
TO, TOP: 9 steps
DTO, DTOP: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
m
1
: Number of special module m
2
: Number of CR (Control Register) of special module that will be
written to S: Data to write in CR n: Data words to read at one time
Explanations:
1. Range of m1 (16-bit and 32-bit): for PB/PC/PA/PH: 0 ~ 7, for PV: 0 ~ 7, 100 ~ 107.
2. Range of m2 (16-bit and 32-bit): for PB/PC/PA/PH: 0 ~ 48, for PV: 0 ~ 499.
3. Range of n:
a) 16-bit: for PB/PC/PA/PH: 1 ~ (49 m
2
), for PV: 1 ~ (500 m
2
).
b) 32-bit: for PB/PC/PA/PH: 1 ~ (49 m
2
)/2, for PV: 1 ~ (500 m
2
)/2.
4. When S is a bit operand, K1~K4 can be used for 16-bit instruction and K1~K8 can be used for
32-bit instruction.
5. Flag: M1083 FROM/TO mode exchange.
6. PB series doesnt support index register E, F.
Program Example:
1. Using the 32-bit instruction DTO, program will write D11 and D10 into CR#13 and CR#12 of
special module#0. It writes a group of data at one time (n=1)
2. The instruction will be executed when X0=ON and wont be executed when X0=OFF. The data
that was written previously will stay unchanged.
X0
DTO K0 K12 D10 K1


The rule of instruction operand:
1. m
1
: number of special module. The special module closest to the ELC controller will be assigned 0,
the next closest will be assigned 1, etc. for a total of 8 modules (0~7).
ELC Syst em Manual

6- 196
2. m
2
: number of CR. Built-in of 48 groups of 16-bit memory of special module are called CR (Control
Register). Each CR uses decimal digits (#0~#48).
CR #10 CR #9
Upper 16-bit Lower 16-bit
Specified CR number

D0
D1
D2
D3
D4
D5
CR #5
CR #6
CR #7
CR #8
CR #9
CR #10
D0
D1
D2
D3
D4
D5
CR #5
CR #6
CR #7
CR #8
CR #9
CR #10
Specified device Specified CR Specified device Specified CR
16-bit command when n=6 32-bit command when n=3

3. In PB models, flag M1083 is not provided. When the FROM/TO instruction is executed, all
interrupts (including external or internal interrupt subroutines) will be disabled. All interrupts will be
executed after the FROM/TO instruction is completed. The, FROM/TO instruction can also be
executed in an interrupt subroutine.
4. The function of the flag M1083 (FROM/TO mode) provided in PC/PA/PH/PV models:
a) When M1083=OFF, FROM/TO instruction is executed, all interrupts (including external or internal
interrupt subroutines) will be disabled. All interrupts will be executed after FROM/TO instruction is
completed.
b) When M1083=ON, if an interrupt occurs while the FROM/TO instruction has been programmed,
The FROM/TO instruction will be interrupted to execute the interrupt. The FROM/TO instruction
cannot be executed in the interrupt subroutine
Application program example of FROM/TO instruction:
1. Example 1: Adjust A/D conversion characteristic curve of ELC-AN04ANNN by a set-point OFFSET
value of CH1 to 0V(=K0
LSB
) and GAIN value of CH1 to 2.5V(=K2000
LSB
).
M1002
TO K0 K1 H0 K1
TO K0 K33 H0 K1
X0
TO K0 K18 K0 K1
TO K0 K24 K2000 K1

6. I nst ruct i on Set

6- 197
a) Write H0 to CR#1 of the analog input module No. 0 and set CH1 to mode 0 (voltage input: -10V to
+10V).
b) Write H0 to CR#33 and allow it to adjust the characteristics of CH1 to CH4.
c) When X0 turns from OFF ON, K0
LSB
OFFSET value will be written to CR#18 and K2000
LSB

GAIN value will be written to CR#24.
2. Example 2: Adjust A/D conversion characteristic curve of ELC-AN04ANNN by the set-point
OFFSET value of CH2 to 2mA(=K400
LSB
) and GAIN value of CH2 to 18 mA(=K3600
LSB
).
M1002
TO K0 K1 H18 K1
TO K0 K33 H0 K1
X0
TO K0 K19 K400 K1
TO K0 K25 K3600 K1

a) Write H18 to CR#1 of analog input module No. 0 and set CH2 to mode 3 (current input : -20mA to
+20mA).
b) Write H0 to CR#33 to adjust characteristics of CH1 to CH4.
c) When X0 turns from OFF ON, K400
LSB
of OFFSET value will be written to CR#19 and K3600
LSB

of GAIN value will be written to CR#25.
3. Example 3: Adjust D/A conversion characteristic curve of ELC-AN02NANN by set-point OFFSET
value of CH2 to 0mA(=K0
LSB
) and GAIN value of CH2 to 10mA(=K1000
LSB
).
M1002
TO K1 K1 H18 K1
TO K1 K33 H0 K1
X0
TO K1 K22 K0 K1
TO K1 K28 K1000 K1

a) Write H18 to CR#1 of analog input mode No. 1 and set CH2 to mode 3 (current input : 0mA to
+20mA).
b) Write H0 to CR#33 to adjust characteristics of CH1 and CH2.
c) When X0 turns from OFF ON, K0
LSB
of OFFSET value will be written to CR#22 and K1000
LSB
of
GAIN value will be written to CR#28.
ELC Syst em Manual

6- 198
4. Example 4: Adjust D/A conversion characteristic curve of ELC-AN02NANN by set-point OFFSET
value of CH2 to 2mA(=K400
LSB
) and GAIN value of CH2 to 18mA(=K3600
LSB
).
M1002
TO K1 K1 H10 K1
TO K1 K33 H0 K1
X0
TO K1 K23 K400 K1
TO K1 K29 K3600 K1

a) Write H10 to CR#1 of analog input module No. 1 and set CH2 to mode 2 (current input : +4mA to
+20mA).
b) Write H0 to CR#33 to adjust characteristics of CH1 and CH2.
c) When X0 turns from OFF ON, K400
LSB
of OFFSET value will be written to CR#23 and K3600
LSB

of GAIN value will be written to CR#29.
5. Example 5: Program example when ELC-AN04ANNN and ELC-AN02NANN module are used
together
a) Read the model type from extension module K0 and determine if the data is H88 is a
ELC-AN04ANNN model type.
b) If the model type is ELC-AN04ANNN, set input mode CR#1: (CH1, CH3)= mode 0, (CH2, CH4)=
mode 3.
c) Set the mode of CR#2 and CR#3. The average times of CH1 and CH2 is K32.
d) Read the input signal average value of CH1~CH4 (4 data) from CR#6~CR#9 and store them in
D20 to D23.
e) Read the model type from extension module K1 and determine if the data is H49 is a
ELC-AN02NANN model type.
f) D100 will increase K1 and D101 will increase K5 every second.
g) When value of D100 and D101 attain to K4000, they will be reset to 0.
h) If the model type is ELC- AN02NANN, the drive contact M1 = ON and set input mode CR#1: CH1
mode to 0, CH2 mode to 2.
i) Write the output set-point D100 and D101 to CR#10 and CR#11. The analog output will change
with D100 and D101 value.
6. I nst ruct i on Set

6- 199
Ladder Diagram:
M1000
FROM K0 K0 D0 K1
TO K0 K1 H3030 K1 LD= H88 D0
TO K0 K2 K32 K2
FROM K0 K6 D20 K4
M1000
FROM K1 K0 D0 K1
CMP H49 D0 M0
M1013
INC D100
ADD D101 K5 D101
RST D100 LD= K4000 D100
RST D101 LD= K4000 D101
M1
TO K1 K1 H10 K1
M1
TO K1 K10 D100 K2
END


ELC Syst em Manual

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API Mnemonic Operands Function
80

RS

Serial Data
Communication
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
m * * *
D *
n * * *
RS: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Start device for transmitting data m: Transmitting data group number (m=0~256) D: Start device
for receiving data n: receiving data group number (n=0~256)
Explanations:
1. This instruction allows ELC to use RS-485 to communications. It stores word data in S and sets
length m. It can set a receive data register D and length n.
2. If it doesnt need to transmit data, m can be indicated in K0 and if it doesnt need to receive data, n
can be indicated in K0.
3. Two or more RS instruction cannot be executed at the same time.
4. During execution of the RS instruction, the transmitting data cannot be changed.
5. Use this RS instruction to transmit and receive data between ELC and external/peripheral
equipment (AC drive, etc.).
6. If the communication format of external/peripheral equipment corresponds with the MODBUS
communication format, ELC provides several communication instructions, MODRD, MODWR
and MODRW.
7. Flag: M1120~M1131, M1140~M1143, M1161, see below examples.
8. PB series doesnt support index register E, F.
Program Example 1:
1. Pre-write data into the register that starts from D100 and set M1122=ON (send request-flag).
2. If the RS instruction is executed when X20=ON, ELC will be in a waiting state, waiting for
transmitted and received data. ELC will transmit the 10 data values that start from D100. M1122
will be set to OFF at the end of transmitting (do not use program to execute RST M1122). After
1ms delay, it will start to receive 10 external data values and store them into continuous registers
that start from D120.
6. I nst ruct i on Set

6- 201
3. When the receive operation is complete, M1123 will be set to ON. The ELC program should set
M1123 = OFF when receive is complete and in the state of transmitting data. Do not use ELC
program to execute RST M1123 continuously.
MOV D1120 H86
M1002
SET M1120
MOV D1129 K100
X20
M1123
RST M1123
RS D100 K10 D120 K10
Transmission
request
Pulse
Receiving
completed
Setting communication protocol 9600, 7, E, 1
Communication protocol latched
Setting communication time out 100ms
Write transmitting data in advance
Sending request
Process of receiving data
Receiving completed and flag reset
SET M1120

Program Example 2:
8-bit mode (M1161=ON) / 16-bit mode (M1161=OFF) switch:
8-bit mode:
1. Head code and tail code of ELC transmission data will be set by using M1126 and M1130
according to D1124~D1126. After set-point, ELC will send head code and tail code set by the user
automatically when executing RS instruction.
2. When M1161=ON, the mode will be 8-bit. 16-bit data will be divided into high byte and low byte.
High byte will be ignored and low byte will be received and transmitted.
M1000
M1161
D100 D120 K4 K7 RS
X0

Transmit data: (ELCExternal equipment)
STX D100L D101L D102L D103L ETX1 ETX2
Head
code
source data register will start from
low byte of D100
length = 4
Tail code
1
Tail code
2

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6- 202
Receive data: (External equipmentELC)
D120L D122L D123L D124L D125L D126L D121L
Head
code
Tail code
1
Tail code
2
receive data register will start from
low byte of D120
length = 7

3. ELC will receive all data transmitted from external equipment, including head code and tail code.
Pay attention on set-point length n.
16-bit mode:
1. Head code and tail code of ELC transmitting data is set by using M1126 and M1130 with
D1124~D1126. ELC will send head code and tail code set by the user automatically when
executing RS instruction.
2. When M1161=OFF, the mode will be 16-bit. 16-bit data will be divided into high byte and low byte
for data transmitting and receiving.
M1001
M1161
D100 D120 K4 K7 RS
X0

Transmit data: (ELCExternal equipment)
STX D100L D100L D101L D101L ETX1 ETX2
Head
code
source data register will start from
low byte of D100
length = 4
Tail code
1
Tail code
2

Receive data: (External equipmentELC)
D120L D120H D121L D121H D122L D122H D123L
Tail code
1
Tail code
2
receive data register will start from
low byte of D120
length = 7
Head
code

3. ELC will receive all data transmitted from external equipment, including head code and tail code.
Pay attention on set-point length n.
6. I nst ruct i on Set

6- 203
Points to note:
1. Flags for RS-485 communication instructions RS / MODRD / MODWR / MODRW
Flag Function Explanation Action
M1120
Save Communication settings. If M1120 is set to ON, the
communication parameters established in D1120 will be saved ELC
will reset communication parameters according to special data
register D1120 after the first program scan. When the second
program scan starts and the RS instruction is executed, it will reset
communication parameters according to special data register
D1120. Once communication parameters are set, M1120 can be set
to ON. At this time, communication parameters wont be reset as RS
/ MODRD / MODWR / MODRW is executed even if D1120 setting
are changed.
User
M1121 When M1121 = OFF, RS-485 of ELC is transmitting System
M1122
Send request. Set M1122 to ON, use the pulse instruction when
using RS / MODRD / MODWR / MODRW instruction to transmit and
receive data. If one of the above instructions starts to execute, ELC
will transmit and receive data. M1122 will be cleared after above
instructions completes transmitting.
User for
setting and
system
clears
M1123
Receive complete. M1123 will be set to ON after RS / MODRD /
MODWR / MODRW instructions complete execution. User can
process the received data when M1123 is set to ON and then reset
M1123 to OFF by user.
System sets
ON and user
clears
M1124
Receiving in process. When M1124 is set to ON, ELC is waiting for
receiving data.
System
M1125
Receiving data state . When M1125 is set to ON, ELC
communication state will be reset. After resetting the
communications, M1125 must be reset to OFF.
M1126
After executing the RS instruction, STX/ETX selection. Refer to the
following table for selecting user/system definition and STX/ETX.
M1130
After executing the RS instruction, STX/ETX selection. Refer to the
following table for selecting user/system definition and STX/ETX.
User sets
and clear
ELC Syst em Manual

6- 204
Flag Function Explanation Action
M1127
Communication instruction finishes transmitting and receiving. RS
instruction is not included.
System sets
and user
clears
M1128 Transmitting/receiving indication System
M1129
Receiving time out. This flag will be activated if D1129 is set and the
process of receiving data is not completed within the established
time. After resetting the communications, M1129 should be reset to
OFF.
System sets
and user
clears
M1131
In ASCII mode, M1131=ON during MODRD / MODRW convert data
to HEX. Otherwise M1131 will be OFF.
M1140 MODRD / MODWR / MODRW data received error
M1141 MODRD / MODWR / MODRW instruction error
System
M1143
ASCII / RTU mode selection, ON is RTU mode and OFF is ASCII
mode. (Use with MODRD / MODWR / MODRW instructions)
M1161 8/16-bit mode. ON = 8-bit mode and OFF =16-bit mode
User sets
and clears
6. I nst ruct i on Set

6- 205
2. Special D registers related to RS-485 communication RS / MODRD / MODWR / MODRW
Special register Function Explanation
D1038
When ELC is slave, this sets the data response delay time. Time unit is
0.1ms.
For PC/PA/PH series, by using ELC-Link, D1038 can be set to send next
communication data with delay. (Unit: one scan cycle)
D1050~D1055
After executing the MODRD instruction, ELC will convert ASCII data of
D1070~D1085 to HEX and store hexadecimal data to D1050~D1055.
D1070~D1085
ELC built-in RS-485 communication convenience instruction. Executing
this instruction will receive feedback (return) messages from receiver.
The messages will be stored at D1070~D1085. User can check return
data by viewing the content of the register, not include RS instruction.
D1089~D1099
ELC built-in RS-485 communication convenience instruction. The
transmitting message will be stored in D1089~D1099 when this
instruction is executed. Users can check if the instruction is correct by
the content of the register, not include RS instruction.
D1120 Refer to the following table for RS-485 communication protocol.
D1121 Communication address of ELC when ELC is slave.
D1122 Number of words to transmit.
D1123 Number of words received.
D1124 Start word (STX). Refer to the table above.
D1125 First end word (ETX1). Refer to the following table.
D1126 Second end word (ETX2). Refer to the following table.
D1129
Communication time out. Time unit (ms). If the value of the time is 0, it
means no time out set. ELC will set M1129 = ON, if a timeout occurs
after executing RS / MODRD / MODWR / MODRW instructions M1129
=ON.
D1130 MODBUS error code recorded, not include RS instruction.
D1168
Specific character communication interrupt required(I150)of RS
instruction, it occurs interrupt I150 when received data
character=D1168.
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6- 206
Special register Function Explanation
D1256~D1295
ELC built-in RS-485 communication convenience instruction MODRW.
The characters transmitted by this instruction will be stored in
D1256~D1295 when this instruction is executed. User can check if the
instruction is correct by the content of the registers.
D1296~D1311
After executing the MODRW instruction, ELC will automatically convert
ASCII data in the receiving register specified by user to HEX,
hexadecimal value.
3. D1120: RS-485 communication parameters. Bits b15-b11 is undefined.
Content
b0 Data Length 0: 7 data bits 1: 8 data bits
00: None
01: Odd
b1
b2
Parity bit
11: Even
b3 Stop bits 0: 1 bit 1: 2bits
0001(H1): 110
0010(H2): 150
0011(H3): 300
0100(H4): 600
0101(H5): 1200
0110(H6): 2400
0111(H7): 4800
1000(H8): 9600
1001(H9): 19200
1010(HA): 38400
1011(HB): 57600
b4
b5
b6
b7
Baud rate
1100(HC): 115200
b8 Start word selection 0: None 1: D1124
b9 First end word selection 0: None 1: D1125
b10 Second end word selection 0: None 1: D1126
b11~b15 No definition
6. I nst ruct i on Set

6- 207
4. Bits b8-b10 control user defined start and end words. Setting any of these bits = ON, the value
placed in the corresponding D1124-D1126 registers will be used for start and end words. When
using M1126, M1130, D1124~D1126 to set start and end word, b8~b10 of D1120 of RS485
communication protocol should be set to 1. For the set-points, refer to the following table:
M1130
0 1
0
D1124: user define
D1125: user define
D1126: user define
D1124: H 0002
D1125: H 0003
D1126: H 0000no set-point
M
1
1
2
6

1
D1124: user define
D1125: user define
D1126: user define
D1124: H 003A:
D1125: H 000DCR
D1126: H 000ALF
5. Example for communication format:
Communication format: Baud rate 9600 7, N, 2
STX : :
ETX1 : CR
ETX2 : LF
You can get the communication format H788 via check with table and write into D1120.
b15 b0
0 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0
7 8 8
D1120
0
Don t care

MOV H788 D1120
M1002

When using STX, ETX1 and ETX2 should pay attention to the ON/OFF relationship between
special auxiliary relay M1126 and M1130.
6. M1143: ASCII / RTU mode selection. ON = RTU mode and OFF = ASCII mode.
ELC Syst em Manual

6- 208
Take standard MODBUS format to explanation:
ASCII mode (M1143=OFF):
Field Name Descriptions
STX Start word = : (3AH)
Address Hi
Address Lo
Communication address:
8-bit address consists of 2 ASCII codes
Function Hi
Function Lo
Function code:
8-bit function code consists of 2 ASCII codes
DATA (n-1)
.
DATA 0
Data content:
n 8-bit data content consists of 2n ASCll codes
LRC CHK Hi
LRC CHK Lo
LRC check sum:
8-bit check sum consists of 2 ASCll code
END Hi
END Lo
End word:
END Hi = CR (0DH), END Lo = LF(0AH)
Communication protocol is MODBUS ASCII mode. Each byte consists of 2 ASCII characters. For
example: a 1-byte data 64 Hex shown as 64 in ASCII, consists of 6 (36Hex) and 4 (34Hex). The table
below identifies the usable hexadecimal characters and their associated ASCII codes.
Character 0 1 2 3 4 5 6 7
ASCII code 30H 31H 32H 33H 34H 35H 36H 37H

Character 8 9 A B C D E F
ASCII code 38H 39H 41H 42H 43H 44H 45H 46H
Start word (STX): : (3AH)
Communication address (Address):
0 0: broadcast for all slaves (Broadcast)
0 1: toward the slave at address01
0 F: toward the slave at address15
1 0: toward the slave at address 16 and consequently, the Max. address can be reached is 254
(FE)
Function code (Function):
0 3: read contents from multiple registers
0 6: write one WORD into a single register
1 0: write contents to multiple registers
Data content:
6. I nst ruct i on Set

6- 209
The content of transmitting data send by user
LRC check:
LRC check is the added sum from Address to Data contents. For example, the 01H + 03H +
21H + 02H + 00H + 02H = 29H, then take the complementary of 2, D7H.
End word:
END Hi = CR (0DH), END Lo = LF(0AH)
For example: when the address of the drive is set as 01H, read 2 data contents that exist successively
within the register, as shown follows: the address of the start register is 2102H.
Inquiry message: Response message:
STX : STX :
0 0
Address
1
Address
1
0 0
Function
3
Function
3
2 0
1
Number of data
(count by byte)
4
0 1
Start address
2 7
0 7
0
Content of start
address
2102H
0
0 0
Number of data
(count by word)
2 0
D 0
LRC Check
7
Content of address
2103H
0
CR 7
END
LF
LRC Check
1
CR

END
LF
RTU mode (M1143=ON):
Field Name Descriptions
START Please refer to following explanation
Address Communication address: 8-bit binary
Function Function code: 8-bit binary
DATA (n-1)
.
DATA 0
Data content:
n 8-bit data
CRC CHK Low
CRC CHK High
CRC check:
16-bit CRC consists of 2 8-bit binary
END Please refer to following explanation
ELC Syst em Manual

6- 210
START:
For PB/PC/PA series, RTU Timeout Timer: keep no input signal 10ms.
For PV series, see the table below:
Baud rate(bps) RTU timeout timer (ms) Baud rate (bps) RTU timeout timer (ms)
300 40 9,600 2
600 21 19,200 1
1,200 10 38,400 1
2,400 5 57,600 1
4,800 3 115,200 1
Communication Address (Address):
00 H: broadcast for all driver (Broadcast)
01 H: toward the drive at the 01 address
0F H: toward the drive at the 15 address
10 H: toward the drive at the 16 address and consequently, the Max. address can be reached is
254 (FE)
Function code (Function):
03 H: read contents from multiple registers
06 H: write one WORD into the register
10 H: write contents to multiple registers
Data content:
The content of transmitting data send by user
CRC check: CRC check starts from Address and ends in Data content. Its calculation is as follows:
1. Step 1: Load the 16-bit register (the CRC register) with FFFFH.
2. Step 2: Exclusive OR the first 8-bit byte message instruction with the 16-bit CRC register of
the low byte, then store the result into the CRC register.
3. Step 3: Shift the CRC register one bit to the right and fill 0 in the higher bit.
4. Step 4: Check the value that shifts to the right. If it is 0, store the new value from Step 3 into
the CRC register, otherwise, Exclusive OR A001H and the CRC register, then store the result
into the CRC register.
5. Step 5: Repeat Step 3 and 4 and calculates the 8-bits complete.
6. Step 6: Repeat Steps 2~5 for the next 8-bit message instruction, till all the message
instructions are processed. And finally, the obtained CRC register value is the CRC check
value. What should be noticed is that the CRC check must be placed interchangeably in the
check sum of the message instruction.
END:
6. I nst ruct i on Set

6- 211
For PB V5.8 (and below) and PC/PA V1.1 (and below) series, RTU Timeout Timer: keep no input signal
10ms.
For PV series, see the table below:
Baud rate(bps) RTU timeout timer (ms) Baud rate (bps) RTU timeout timer (ms)
300 40 9,600 2
600 21 19,200 1
1,200 10 38,400 1
2,400 5 57,600 1
4,800 3 115,200 1
For example: when the address of the drive is set as 01H, read 2 continuous data of the register shown
follows: the address of the start register is 2102H
Inquiry message: Response message:
Field Name Example(Hex) Field Name Example(Hex)
Address 01 H Address 01 H
Function 03 H Function 03 H
21 H
Start data
address
02 H
Number of data
(count by byte)
04 H
00 H 17 H
Number of data
(count by word)
02 H
Content of data address
8102H
70 H
CRC CHK Low 6F H 00 H
CRC CHK High F7 H
Content of data address
8103H
00 H
CRC CHK Low FE H

CRC CHK High 5C H

Timing chart of RS-485 communication program flag:
ELC Syst em Manual

6- 212
MOV D1120 H86
M1002
SET M1120
SET
MOV D1129 K100
X20
M1123
RST M1123
RS D100 K2 D120 K8
Setting communication protocol 9600, 7, E, 1
Communication protocol latched
Setting communication time out 100ms
Write transmitting data in advance
Transmission
request
Pulse
Sending request
Receiving
completed
Receiving completed and flag reset
Process of receiving data
X0
M1122


6. I nst ruct i on Set

6- 213
Timing chart:
SET M1122 X0
RS command executes X20
MODRD/RDST/MODRW data
receiving and conversion
completed
M1127
Covert MODRD
to hexadeci mal
/MODRW M1131
Transmission ready M1121
Sending request M1122
Receiving completed M1123
Receiving wait M1124
Communication reset M1125
Transmitting and receiving M1128
Receiving time out M1129
Receive time out
timer set by D1129
Residual words of
transmitting data D1122
Residual words of
receiving data D1123
Auto reset after transmitting data completed
Change
direction
immediately
User must reset in program
User will reset to the transmit
standby status in program
ASCII data converted to hexadecimal,
less than a scan period
It will be activated when receiving time out message
Stop to count time after
receiving data completed
Conversion data
1 2 3 1 2 3 4 5 6 7 8
3
2
1
0
3
2
1
0
4
5
6
7
8

ELC Syst em Manual

6- 214
API Mnemonic Operands Function
81

D PRUN P

Parallel Run
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * *
D * *
PRUN, PRUNP: 5 steps
DPRUN, DPRUNP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Transmission source device D: Destination device
Explanations:
1. Transmit the content of S to D in octal number system format.
2. X, Y, M of KnX, KnY, KnM should be a multiple of 10, e.g. X20, M20, Y20.
3. When operand S is specified as KnX, operand D should be specified as KnM.
4. When operand S is specified as KnM, operand D should be specified as KnY.
Program Example 1:
When X3=ON, transmit the content of K4X20 to K4M10 in octal number system format.
X3
PRUN K4X20 K4M10

X37
M27
X36 X35 X34 X33 X32 X31 X30 X27 X26 X25 X24 X23 X22 X21 X20
M17 M16 M15 M14 M13 M12 M11 M10 M26 M25 M24 M23 M22 M21 M20 M19M18
No change

Program Example 2:
When X2=ON, transmit the content of K4M10 to K4Y20 in octal number system format.
X2
PRUN K4M10 K4Y20

Y37
M27
Y36 Y35 Y34 Y33 Y32 Y31 Y30 Y27 Y26 Y25 Y24 Y23 Y22 Y21 Y20
M17 M16 M15 M14 M13 M12 M11 M10 M26 M25M24 M23 M22 M21 M20 M19 M18
These two devices will not be transmitted

6. I nst ruct i on Set

6- 215
API Mnemonic Operands Function
82

ASCI P

Converts HEX to ASCII
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * *
D * * * * * *
n * *
ASCI, ASCIP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source data D: Destination of result n: Number of digits to convert (n=1~256)
Explanations:
1. 16-bit conversion mode: When M1161=OFF, read n hexadecimal characters from source S and
convert them to ASCII. Then, store the result into high and low byte of D.
2. 8-bit conversion mode: When M1161=ON, read n hexadecimal characters from source S and
convert them to ASCII. Then, store the result into the low byte of D (high byte of D will be set to 0).
3. PB series doesnt support index register E, F.
Program Example 1:
1. When M1161=OFF, conversion mode is 16-bit.
2. When X0=ON, read four hexadecimal characters from D10 and convert them into ASCII. Then,
store the converted characters in the register starting from D20.
X0
ASCI D10 D20 K4
M1001
M1161

3. Supposed condition:
D10=0123 H, D11=4567H, D12=89ABH, D13=CDEFH
ELC Syst em Manual

6- 216
4. When n is 4, the bit structure is:
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1
0 1 2 3
D10=0123 H
D20
D21
0 0 1 1 0 0 0 1 0 0 1 1 0 0 0 0
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0
1
31H
0
30H
3 33H 2 32H
high byte low byte
high byte
low byte

5. When n is 6, the bit structure is:
0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0
0 0 0 0 1 0 0 1 0 1 1 1 1 1 1 0
0 1 1 0 1 0 1 1 0 1 0 0 1 1 0 1
0 1 2 3
D10 = H 0123
b15
b15
7 H 37 6 H 36
Convert to
b15
0 0 1 1 0 1 0 0 0 1 1 0 0 0 0 0
0 1 1 0 0 1 0 0 0 0 1 0 0 1 1 1
b15
3 H 33 2 H 32
D22
b15
b0
b0
b0
b0
b0
D11 = H 4567
4 5 6 7
D20
D21
1 H 31 0 H 30

6. I nst ruct i on Set

6- 217
6. When n = 1 to 16:
n
D
K1 K2 K3 K4 K5 K6 K7 K8
D20 low byte 3 2 1 0 7 6 5 4
D20 high byte 3 2 1 0 7 6 5
D21 low byte 3 2 1 0 7 6
D21 high byte 3 2 1 0 7
D22 low byte 3 2 1 0
D22 high byte 3 2 1
D23 low byte 3 2
D23 high byte 3
D24 low byte
D24 high byte
D25 low byte
D25 high byte
D26 low byte
D26 high byte
D27 low byte
D27 high byte



No
change





n
D
K9 K10 K11 K12 K13 K14 K15 K16
D20 low byte B A 9 8 F E D C
D20 high byte 4 B A 9 8 F E D
D21 low byte 5 4 B A 9 8 F E
D21 high byte 6 5 4 B A 9 8 F
D22 low byte 7 6 5 4 B A 9 8
D22 high byte 0 7 6 5 4 B A 9
D23 low byte 1 0 7 6 5 4 B A
D23 high byte 2 1 0 7 6 5 4 B
D24 low byte 3 2 1 0 7 6 5 4
D24 high byte 3 2 1 0 7 6 5
D25 low byte 3 2 1 0 7 6
D25 high byte 3 2 1 0 7
D26 low byte 3 2 1 0
D26 high byte 3 2 1
D27 low byte 3 2
D27 high byte


No
change



3
ELC Syst em Manual

6- 218
Program Example 2:
1. When M1161=ON, conversion mode is 8-bit.
2. When X0=ON, read four hexadecimal data characters from D10 and convert them into ASCII.
Then, store the converted data to the register started from D20.
X0
ASCI D10 D20 K4
M1000
M1161

3. Supposed condition:
D10=0123H, D11=4567H, D12=89ABH, D13=CDEFH
4. When n is 2, the bit structure is:
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1
0 1 2 3
D10=0123 H
0 0 0 0 0 0 0 1 1 0 0 0
0 0 0 0 0 0 1 1 0 0 1
3
3 3
2
1 0 0 0
1 0 0 0 0
ASCII code of D20=2 is 32H
ASCII code of D21=3 is 33H

5. When n is 4, the bit structure is:
0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
0 0
0 1 2 3
D10 = H 0123
b15
b15
Convert to
b15
0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1
b15
3 H 33
2 H 32
D22
b15
b0
b0
b0
b0
b0
D20
D21
1 H 31
D23
0 H 30
0 0 0 0 0 0 0 0 0 0 1 0 1 1
0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1

6. I nst ruct i on Set

6- 219
6. When n = 1 to 16:
n
D
K1 K2 K3 K4 K5 K6 K7 K8
D20 3 2 1 0 7 6 5 4
D21 3 2 1 0 7 6 5
D22 3 2 1 0 7 6
D23 3 2 1 0 7
D24 3 2 1 0
D25 3 2 1
D26 3 2
D27 3
D28
D29
D30
D31
D32
D33
D34
D35



No
change





n
D
K9 K10 K11 K12 K13 K14 K15 K16
D20 B A 9 8 F E D C
D21 4 B A 9 8 F E D
D22 5 4 B A 9 8 F E
D23 6 5 4 B A 9 8 F
D24 7 6 5 4 B A 9 8
D25 0 7 6 5 4 B A 9
D26 1 0 7 6 5 4 B A
D27 2 1 0 7 6 5 4 B
D28 3 2 1 0 7 6 5 4
D29 3 2 1 0 7 6 5
D30 3 2 1 0 7 6
D31 3 2 1 0 7
D32 3 2 1 0
D33 3 2 1
D34 3 2
D35


No
change




3
ELC Syst em Manual

6- 220

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV

Operands:
S: source data D: Destination for stored result n: number of digits to convert (n=1~256)
Explanations:
1. 16-bit conversion mode: When M1161=OFF, conversion mode is 16-bit. Convert 16-bit ASCII data
of S (high and low byte) to hexadecimal and then store in D per 4-bit for one time. Number of
converted ASCII characters is set by n.
2. 8-bit conversion mode: When M1161=ON, it is 16-bit conversion mode Convert 16-bit ASCII code
of S (high and low byte) to hexadecimal data characters and then transmit to low byte of D.
Number of converted ASCII codes is set by n. (high byte of D are all 0)
3. PB series doesnt support index register E, F.
Program Example 1:
1. When M1161=OFF, it is 16-bit conversion mode.
2. When X0=ON, read ASCII bytes of the register starting from D20 and convert them to
hexadecimal characters. Then, store the converted data to four registers started from D10. (The
converted data is four characters converted as one segment of data)
X0
HEX D20 D10 K4
M1001
M1161

API Mnemonic Operands Function
83

HEX P

Converts ASCII to HEX
Controllers
PB PC PA PH PV
Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * *
D * * * * * *
n * *
HEX, HEXP: 7 steps
6. I nst ruct i on Set

6- 221
3. Supposed condition:
S ASCII code
HEX
conversion
S ASCII code
HEX
conversion
D20 low byte H 43 C D24 low byte H 34 4
D20 high byte H 44 D D24 high byte H 35 5
D21 low byte H 45 E D25 low byte H 36 6
D21 high byte H 46 F D25 high byte H 37 7
D22 low byte H 38 8 D26 low byte H 30 0
D22 high byte H 39 9 D26 high byte H 31 1
D23 low byte H 41 A D27 low byte H 32 2
D23 high byte H 42 B D27 high byte H 33 3
4. When n is 4, the bit structure is:
0 1 0 0 1 0 1 1 1 0 0 0 0 0 0 0
0 0 0 0 1 1 0 1 0 1 0 1 1 0 0 0
1 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1
C D E F
D10
D20
D21
44H D
46H F
43H C
45H E

5. When n = 1 to 16:
D
n
D13 D12 D11 D10
1 ***C H
2 **CD H
3 *CDE H
4

CDEF H
5 ***C H DEF8 H
6 **CD H EF89 H
7 *CDE H F89A H
8

CDEF H 89AB H
9 ***C H DEF8 H 9AB4 H
10 **CD H EF89 H AB45 H
11 *CDE H F89A H B456 H
12
The used
registers which
are not
specified are all
0
CDEF H 89AB H 4567 H
13 ***C H DEF8 H 9AB4 H 5670 H
14 **CD H EF89 H AB45 H 6701 H
15 *CDE H F89A H B456 H 7012 H
16 CDEF H 89AB H 4567 H 0123 H
ELC Syst em Manual

6- 222
Program Example 2:
1. When M1161=ON, it is 16-bit conversion mode.
X0
HEX D20 D10 K4
M1000
M1161

2. Supposed condition:
S ASCII code
HEX
conversion
S ASCII code
HEX
conversion
D20 H 43 C D28 H 34 4
D21 H 44 D D29 H 35 5
D22 H 45 E D30 H 36 6
D23 H 46 F D31 H 37 7
D24 H 38 8 D32 H 30 0
D25 H 39 9 D33 H 31 1
D26 H 41 A D34 H 32 2
D27 H 42 B D35 H 33 3

3. When n is 2, the bit structure is
1 1 1 0 0 0 0 0
0 1 0 1 0 0 0
0 0 0 0 1 0 1 0 0 1
C D
D10
D20
D21
0 0
0
1 1 0 0
43H C
44H D

6. I nst ruct i on Set

6- 223
4. When n = 1 to 16:
D
n
D13 D12 D11 D10
1 ***C H
2 **CD H
3 *CDE H
4

CDEF H
5 ***C H DEF8 H
6 **CD H EF89 H
7 *CDE H F89A H
8

CDEF H 89AB H
9 ***C H DEF8 H 9AB4 H
10 **CD H EF89 H AB45 H
11 *CDE H F89A H B456 H
12
The used
registers which
are not
specified are all
0
CDEF H 89AB H 4567 H
13 ***C H DEF8 H 9AB4 H 5670 H
14 **CD H EF89 H AB45 H 6701 H
15 *CDE H F89A H B456 H 7012 H
16 CDEF H 89AB H 4567 H 0123 H

ELC Syst em Manual

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API Mnemonic Operands Function
84

CCD P

Check Code
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
D * * * * *
n * * *
CCD, CCDP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: source data D: Destination for storing check sum n: Number of values to use in the instruction
(n=1~256)
Explanations:
1. This instruction is used to create check sum of words to ensure data integrity of transmitted
information.
2. 16-bit conversion mode: When M1161=OFF, conversion mode is 16-bit. Create a checksum of n
words (8-bit in one byte) from the register specified by S and store the sum in the register specified
D, the parity bits store in D +1.
3. 8-bit conversion mode: When M1161=ON, conversion mode is 8-bit. Create a checksum of n
words (8-bit in one byte, only low byte are available) from the register specified by S and store the
sum in the register specified D, the parity bits store in D +1
Program Example 1:
1. When M1161=OFF, conversion mode is 16-bit.
2. When X0=ON, checksum of 6 words from the register specified by D0 (8-bit in one byte, n=6
specifies D0~D2) and store the checksum in the register specified by D100 while the parity bits are
stored in D101.
X0
CCD D0 D100 K6
M1000
M1161

6. I nst ruct i on Set

6- 225
(S)
D0 lowbyte K100 = 0 1 1 0 0 1 0 0
D0 high byte K111 = 0 1 1 0 1 1 1 1
D1 lowbyte K120 = 0 1 1 1 1 0 0 0
D1 high byte K202 = 1 1 0 0 1 0 1 0
D2 lowbyte K123 = 0 1 1 1 1 0 1 1
D2 high byte K211 = 1 1 0 1 0 0 1 1
D100 K867 Total
D101 0 0 0 1 0 0 0 1
Content of data(words)
0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1
D100
D101
Parity
An even result is indicated
by the use of 0(zero)
An odd result is indicated
by the use of 1(one)

Program Example 2:
1. When M1161=ON, it is 8-bit conversion mode.
2. When X0=ON, checksum of 6 words from the register specified by D0 (8-bit in one byte, n=6
means to specify D0~D5) and store the checksum in the register specified by D100 while the
parity bits are stored in D101.
X0
CCD D0 D100 K6
M1000
M1161


0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0 D100
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 D101
Parity
An even result is indicated
by the use of 0(zero)
An odd result is indicated
by the use of 1(one)
(S)
D0 lowbyte K100 = 0 1 1 0 0 1 0 0
D1 lowbyte K111 = 0 1 1 0 1 1 1 1
D2 lowbyte K120 = 0 1 1 1 1 0 0 0
D3 lowbyte K202 = 1 1 0 0 1 0 1 0
D4 lowbyte K123 = 0 1 1 1 1 0 1 1
D5 lowbyte K211 = 1 1 0 1 0 0 1 1
D100 K867 Total
D101 0 0 0 1 0 0 0 1
Content of data(words)
ELC Syst em Manual

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API Mnemonic Operands Function
85

VRRD P

Volume Read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * *
D * * * * * * * *
VRRD, VRRDP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Variable resistor number (0~1) D: Destination for storing read value
Explanations:
1. VRRD instruction is used to read the two variable resistors of PC/PH/PV models. The read value
will be converted as value between 0 to 255 and stored in destination D.
2. Flags: M1178 and M1179. (See the Note)
Program Example:
Read the VR volume in order: S=K0 to K1 corresponding
to the 2 volumes, No.0 to No.1. The timer loop converts
the variable resistor value 0~255. The time unit for T0 to
T1 is 0.1 second, therefore, the set-point value is 0 to
25.5 seconds
M1000
VRRD D100
X20
TMR D100 T0
T0
Y0
X21
TMR D101 T1
T1
Y1
END
K 0
VRRD D101 K 1
Note:
1. VR means VARIABLE RESISTOR.
2. PC/PH/PV models, built-in 2 points VR volume can be used with special D and special M.
Device Function
M1178 Start volume VR0
M1179 Start volume VR1
D1178 VR0 value
D1179 VR1value
6. I nst ruct i on Set

6- 227
API Mnemonic Operands Function
86

VRSC P

Volume Scale Read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * *
D * * * * * * * *
VRSC, VRSCP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Variable resistor number(0~1) D: Destination scaled value
Explanation:
VRSC reads the variable resistor scale value of two volumes on PC/PH/PV and the number is No.0 and
No.1., (volume scale value is from 0 to 10). The read data will be stored in destination device D as an
integer from the range 0 to 10.
Program Example 1:
When X0=ON, the volume scale value (0 to10) of No. 0 specified by VRSC instruction is stored in
device D10.
X0
VRSC K0 D10

Program Example 2:
1. Regard as digital switch: Correspond volume scale 0 to 10. Only one contact = ON between M10
to M20. Using DECO instruction (API 41) can decode the volume scale into M10~M25.
2. When X0=ON, store the volume scale value (0 to 10) of specified No. 1 volume to D1.
3. When X1=ON, use DECO instruction (API 41) to decode the volume scale into M10~M25.
X0
VRSC K1 D1
X1
DECO D1 M10 K4
M10
M11
M20
On when volume scale is 0
On when volume scale is 1
On when volume scale is 10
ELC Syst em Manual

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API Mnemonic Operands Function
87

D ABS P

Absolute Value
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D * * * * * * * *
ABS, ABSP: 3 steps
DABS, DABSP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Source and destination for absolute value
Explanation
1. When the instruction is executed, take the absolute value of the specified device, D.
2. This instruction works best using the pulse execution (ABSP).
3. If operand D uses index F, then only 16-bit instruction is available.
Program Example:
When X0 goes from OFFON, take the absolute value of the D0 contents.
X0
ABS D0


6. I nst ruct i on Set

6- 229
API Mnemonic Operands Function
88

D PID

PID Calculation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
S
3
*
D *
PID : 9 steps
DPID: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Target value (SV) S
2
: Present value (PV) S
3
: Parameter (for 16-bit instruction, uses 20
continuous devices, for 32-bit instruction, uses 21 continuous devices) D: Output value (MV)
Explanations:
PID instruction will start execution after completing all parameter settings and the result will be stored in
D. Do not latch D register area.
Program Example:
1. Pre-write the PID parameters into all the registers before executing the PID instruction.
2. This instruction will be executed when X0=ON and the result will be stored in D150. The
instruction will not be executed when X0=OFF and the previous data will be unchanged.
D150
X0
D100 D1 D0 PID

3. Timing chart of the PID instruction (max. operation time is 470us)
A + B B B B B A+B A+B
#1 #2
Scan cycle Scan cycle
Sampling time (Ts) Sampling time (Ts)
Note:#1 It is the time of equati on cal cul ati on during PID operation (about 430us)
#2 It i s the PID operation ti me wi thout equation calcul ation (about 44us)

Points to note:
1. There is no number-of-times limit when using the PID instruction, but the specified devices S
3
~
S
3
+19 cannot be used repeatedly.
ELC Syst em Manual

6- 230
2. For 16-bit instructions: S
3
uses 20 registers. In the example below the parameter area of the PID
instruction that S
3
indicates are D100~D119.
3. Parameter table of 16-bit S
3
:
Device No. Function Set-point range Explanation
S
3
: Sampling time (T
S
)
1~2,000
(unit: 10ms)
Time interval between calculations and
updates of MV done by this instruction. If
T
S
is less than one program scan time,
the PID instruction will execute one time.
If T
S
=0, the PID instruction wont be
executed.
S
3
+1: Propotional gain (K
P
) 0~30,000(%)
Amplified propotional value of the
difference between SVPV
S
3
+2: Integral gain (K
I
) 0~30,000(%)
Amplified proportional value of
accumulated values that each sampling
time unit times difference value.
S
3
+3: Differential gain (K
D
)
-30,000~30,00
0(%)
Amplified proportional value of the
variation from the difference of sampling
time unit
S
3
+4: Control method
0: normal control
1: Forward control (E=SV-PV), When E<0, it is E=0 and
accumulated integral remain the same.
2: Inverse control (E=PV-SV), When E<0, it is E=0 and
accumulated integral remain the same.
3: Auto-tuning for temperature control, Parameter will
automatically be set as K4 after auto-tuning and also set
proper parameters for KP, KI, and KD.
4: Temperature control, Specific function for the temperature
that has been adjusted.
S
3
+5:
The range in which
Error value (E) will not
work
0~32,767
E equals the error value of SV-PV. When
k0 is set, this function will not be enabled.
For example:If the error range of value
(E) is set to 5. If the error value E
between 5~5, the MV will output 0.
6. I nst ruct i on Set

6- 231
Device No. Function Set-point range Explanation
S
3
+6:
Upper limit of
saturated Output
value (MV)
-32,768~32,76
7
Example: if upper limit is set to 1000 and
if output value (MV) is larger than 1000,
MV will output 1000. (upper limit should
be larger than lower limit, i.e. S
3
+6 >
S
3
+7.)
S
3
+7:
Lower limit of
saturated Output
value (MV)
-32,768~32,76
7
For example:If lower limit is set to 1000
and if output value (MV) is less
than 1000, MV will output 1000.
S
3
+8:
Upper limit of
saturated integration
-32,768~32,76
7
For example:If upper limit is set to 1000
and if accumulated integral value is larger
than 1000, it will output 1000 and wont
integrate. (upper limit should larger than
lower limit, i.e. S
3
+8 >= S
3
+9.)
S
3
+9:
Lower limit of
saturated integration
-32,768~32,76
7
For example:If lower limit is set to 1000
and if accumulated integral value is less
than 1000, it will output 1000 and wont
integrate.
If S3+8 & S3+9 are both set to 0, the limit
of integration is disable.
S
3
+10, 11:
Save accumulated
integral value
32-bit floating
point range
It is used usually for reference but user
can clear or modify. (must be modified
using 32-bit floating point)
S
3
+12:
Save previous PV
value
-32,768~32,76
7
This previous PV is usually for reference.
But user can modify.
S
3
+13:
~

S
3
+19:
Reserved for system usage, do not use.
4. S
3
+1~3:
when setting value is out of upper or lower limits, use the value of upper or lower limits.

5. When parameter set-point is out of set-point range, it will be set to upper limit or lower limit. But if
the operation is out of range, it will be set to 0.
6. PID instructions can be used in interrupt subroutine, Step point and CJ instruction.
ELC Syst em Manual

6- 232
7. Max. error range of sampling time T
S
is -a scan time+1ms~+a scan time. If error value has
influence on output, please keep the scan time fixed or execute PID instruction in an interrupt
subroutine of timer.
8. The present value (PV) must be a stable value before the execution of the PID instruction. If using
input value from special modules to perform the PID calculation, pay attention to any conversion
time of the above-mentioned modules.
9. 32-bit instruction S
3
occupies 21 registers. Pre-write the parameter area of the PID instruction
designated by S
3
is D100~D120 before executing PID instruction.
10. 32-bit instruction S
3
+4 device does not support k3 and k4.
11. Parameter table of 32-bit S
3
:
Device No. Function Set-point range Explanation
S
3
: Sampling time (T
S
)
1~2,000
(unit: 10ms)
Time interval between calculations and
updates of MV done by this instruction.
If T
S
is less than one program scan
time, the PID instruction will execute
one time. If T
S
=0, the PID instruction
wont be executed.
S
3
+1:
Proportional gain
(K
P
)
0~30,000(%)
Amplified proportional value of the
difference between SVPV
S
3
+2: Integration gain (K
I
) 0~30,000(%)
Amplified proportional value of
accumulated values that each sampling
time unit times difference value.
S
3
+3: Differential gain (K
D
)
-30,000~30,000(
%)
Amplified proportional value of the
variation from the difference of
sampling time unit
S
3
+4: Control method
0: normal control
1: Forward control (E=SV-PV), When E<0, it is E=0 and
accumulated integral remain the same.
2: Inverse control (E=PV-SV), When E<0, it is E=0 and
accumulated integral remain the same.
S
3
+5, 6:
The range that 32-bit
Error value (E) doesnt
work
0~
2,147,483,647
For example:If the error range of value
(E) is set to 5. If the error value E
between 5~5, the MV will output 0.
6. I nst ruct i on Set

6- 233
Device No. Function Set-point range Explanation
S
3
+7, 8:
Upper limit of 32-bit
saturated Output value
(MV)
-2,147,483,648~
2,147,483,647
For example:If upper limit is set to 1000
and if output value (MV) is larger than
1000, MV will output 1000. (upper limit
should be larger than lower limit, i.e.
S
3
+7,8 > S
3
+9,10.)
S
3
+9, 10:
Lower limit of 32-bit
saturated Output value
(MV)
-2,147,483,648~
2,147,483,647
For example:If lower limit is set
to 1000 and if output value (MV) is
less than 1000, MV will output 1000
S
3
+11, 12:
Upper limit of 32-bit
saturated integrator
-2,147,483,648~
2,147,483,647
For example:If upper limit is set to 1000
and if accumulated integral value is
larger than 1000, it will output 1000 and
wont integrate. (upper limit should
larger than lower limit, i.e. S
3
+11,12 >=
S
3
+13,14.)
S
3
+13, 14:
Lower limit of 32-bit
saturated integrator
-2,147,483,648~
2,147,483,647
For example:If lower limit is set
to 1000 and if accumulated integral
value is less than 1000, it will
output 1000 and wont integrate.
S
3
+15, 16:
32-bit temporary
accumulation integral
value
32-bit floating
point range
It is usually for reference, but user can
clear or modify. (needs to modified by
32-bit floating point)
S
3
+17, 18:
32-bit save previous
PV
-2,147,483,648~
2,147,483,647
The previous PV is usually for
reference. But user can modify.
S
3
+19, 20 Reserved for system usage, do not use.
Explanation
of 32-bit
S
3 and 16-bit
S
3 are almost the same. The difference is the capacity of
S
3+5 ~
S
3+20.
PID Equations:
1. This instruction executes a PID calculation according to speed and differential of a measured
value.
2. The PID operation has five control methods for 16 bit instruction: normal, forward inverse,
auto-tuning and temperature controls. The control method is set by S
3
+4.
ELC Syst em Manual

6- 234
3. PID equations for control method k0~k2:
( ) ( ) ( )S t PV K
S
t E K t E K MV
D I P
*
1
* * + + =

Control Method PID Equations
Forward control, normal control(k0,k1) ( ) PV SV t E =

Inverse control(k2) ( ) SV PV t E =
When ( )S t PV is the differential value of ( ) t PV , and
( )
S
t E
1
is the integral value of ( ) t E .
Notice this instruction is different from the general PID instruction above. The difference is the
change of differential usage. To avoid a too large transient differential value when executing
general PID instruction for the first time, this instruction will lower the output (MV) value once the
change of present value (PV) is too large by monitoring the differential value of present measured
value (PV).
4. Symbols explanation:
MV : Output value
( ) t E : Error value. Forward control ( ) PV SV t E = , Inverse control ( ) SV PV t E =
P
K : Porprotional gain
PV : Present measured value
SV : Target value
D
K : Differential gain
( )S t PV : Differential value of ( ) t PV
I
K : Integral gain
( )
S
t E
1
: Integral value of ( ) t E
5. Control diagram for control method K0~K2:
K
P
1/S K
I
G(s)
S
K
D
E + +
+
-
+
SV
PV
MV
In dotted line is PID command
K
P
1/S K
I
G(s)
S
K
D
E + +
+
-
+
SV
PV
MV
In dotted line is PID command

6. I nst ruct i on Set

6- 235
6. PID equations for control method k3~k4 (Temperature control):
( ) ( ) ( )
(

+
|
.
|

\
|
+ = S t PV K
S
t E
K
t E
K
MV
D
I P
*
1 1 1
, where ( ) PV SV t E =
7. Control diagram for control method K3~K4::
1/K
P
1/S 1/K
I
G(s)
S
K
D
E + +
+
-
+
SV
PV
MV
In dotted line is PID command
1/K
P
1/S 1/K
I
G(s)
S
K
D
E + +
+
-
+
SV
PV
MV
In dotted line is PID command

8. Control method k3 and k4:
a) The functions are specific design for temperature control. When sampling time (T
S
) is set to 4
seconds (k400), indicates output range of MV will be from k0 to k4000, and cycle time of the
GPWM instruction should be set to 4 seconds (k4000).
b) If you have no idea how to adjust the parameters, you can select K3 (auto-tuning), and after all the
parameters are adjusted (the control direction will be automatically set as K4), you can modify
your parameters to better ones according to the result of the control.
Notes and suggestion:
1. S
3
+ 6 ~
S
3
+ 13 are only available in PC/PA/PH/PV series, and PB (v5.7 and above) series.

2. PID instruction can only be used once in PB (v5.6 and below) series. There is no limitation on the
times of using PID instruction in PB (v5.7 and above) series and
PC/PA/PH/PV
series.
3. S
3
+ 3 of PB (v5.7 and below),
PC/PA/PH
(v1.1 and below) and PV (v1.0 and below) series can
only be the value within 0 ~ 30,000.
4. When adjusting the three major parameters, KP, KI and KD, adjust KP first and set 0 to KI and KD.
When adjusting to control, adjust KI (order from small to large) and KD (order from small to large).
Refer to example 4 for adjusting. If KP=100, is 100%. When KP is less than 100%, the error value
will attenuate and when KP is more than 100%, the error value will amplify.
5. PID control is useful for a variety of different environments. Please select an appropriate control
function according to the environment. For example, when auto-tuning (S
3
+4=K3) is selected for
temperature control, it is prohibited in motor control to prevent malfunction from improper control.
ELC Syst em Manual

6- 236
6. When user selects specific function (S
3
+4=K3 and K4) for temperature control, it is recommended
to save parameters in register D of latched area; otherwise, the parameter after auto-tuning
adjustment is likely to disappear due to power cut. Since the parameter with auto-tuning
adjustment cant be guaranteed to fit in with all environments, it is feasible for user to modify the
parameter with their demand. It is better to modify K
I
and K
D
only.
Example 1: PID instruction to control position (control method S
3
+4 should be set to 0)
PID
MV
Encoder
PV
Position command
(SV) Plant

Example 2: PID instruction to control speed (control method S
3
+4 should be set to 0)
PID
S+MV
AC drive
Speed
detection
equipment (P)
Actual accel/decel
speed (PV=S-P)
Accel/Decel
command (SV)
Speed command
(S)
Accel/Decel
output (MV)

Example 3: PID instruction to control temperature (action direction S
3
+4 should be set to 1)
PID
Add temperature
(MV)
Heater
equipment
Temperature
detection
equipment
Actual temperature(PV)
Temperature
command (SV)

Example 4: Suggested steps of PID adjustment
Consider the transfer function of plant
( )
a s
b
s G
+
=
(general AC drive function) in control system,
instruction value SV is 1 and sampling time Ts is 10ms. Suggested Steps are as follows:
6. I nst ruct i on Set

6- 237
Step1:
Set K
I
and K
D
to 0 first, then set K
P
to 5, 10, 20 and 40 in order and record (SV) and (PV) state. The
result will be shown as following figure.
1.5
1
0.5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
K =40
P
K =20
P
K =10
P
SV=1
K =5
P
Time (sec)

Step 2:
In above figure, we will choose the situation K
P
is 10. For the following:
When K
P
is 40, response overshoot occurs. We wont use it.
When K
P
is 20, PV response is close to SV and wont overshoot but transient MV will be to large due to
a fast start-up. We also wont use it.
When K
P
is 10, PV response is close to SV and is smooth. We can consider using it.
When K
P
is 5, the response is too slow. So we wont use it.
Step 3:
When deciding to use the curve K
P
=10, arrange K
I
in order

from small to large (such as 1, 2, 4, 8) and
not larger than K
P
. Then arrange K
D
in order

from small to large (such as 0.01, 0.05, 0.1 and 0.2) and
should not exceed 10% K
P
. You can get following PV and SV relationship.
Application 1:
PID instruction in pressure control system. (Use block diagram of example 1)
Control destination:
Making the control system reach the pressure target value.
Control characteristics:
System should reach the destination. The system may go out of control or overload if it reaches the
destination too fast.
Recommend solve method:
Method 1: reach by using a long sampling time.
ELC Syst em Manual

6- 238
Method 2: reach by using a delay instruction and shown below
PID
MV
D5
SV
PV
D1
D1110
0
511
0
511
0V
10V
0rpm
rpm
3000
D1116
0
255
0V
5V
AC
Drive
pressure
command
value (D0)
pressure
command
delay
A
wave
B
wave
MV
convert
to
speed
speed
convert
to
voltage
voltage
convert
to
command
value
pressure
meter

Applications:
280
0
0
280
250
200
150
100
50
t t
command
value
command
value
A wave B wave
D2 is command interval value
D3 is command interval time
user can adjust by require

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6- 239
Example for DELAY program:
M1002
MOV K10 D3
M10
M0
TMR T0 D3
T0
RST T0
MOV K50 D2 D1 D0 >
MOV K-50 D2 D1 D0 <
MOV K0 D2 D1 D0 =
ADD D2 D1 D1
CMP D2 K0 M10
D0 D1
<
MOV D0 D1
M12
D0 D1
>
MOV D0 D1
M0
PID D1 D1116 D10 D5


Application 2:
Speed control and pressure control system is controlled separately. (Use block diagram of example 2)

Control destination:
Adding pressure control system (PID instruction) after using an open loop to control speed for a period
of time to reach the desired pressure control.

Control characteristics:
This architecture should use open loop to reach the speed control and then reach control target by
closed loop pressure control due to no relationship between speed and pressure of these two systems.
You can add delay instructions to the application to avoid control instruction of pressure control system
changing too fast. Control block diagram is shown in the following.
ELC Syst em Manual

6- 240
D40
0
255
0rpm
3000rpm
D30
D32 D1116
D31
+
+
M3 M2=ON
PID
PV
MV D5
D1
SV
D0
D1110
M0=ON
M1=ON
Speed
command
speed
convert
to
voltage
AC
drive
MV
convert to
accel/decel
pressure
command
delay
function
(optional)
pressure
meter

Partial program application is in the following:
M1
MOV K0 D5
M3
MOV D40 D30
M2
MOV K3000 D32 K3000 D32 >
MOV K0 D32 K0 D32 <
ADD D30 D31 D32
MOV D32 D1116
M1
PID D1 D1110 D10 D5
M1002
MOV K1000 D40
M0
MOV D0 D1
DIV D32 K11 D32
MOV K255 D32 K255 D32 >


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6- 241
Application 3:
Using auto-tuning for temperature control

Control destination:
Calculating optimal parameter of PID instruction for temperature control

Control characteristics:
Since general users are not familiar with the environment characteristics of temperature control at
the first time, user can use auto-tuning function (S
3+4=k3
) for initial tuning. After finished tuning,
this instruction will auto modify control function to the specific function of temperature control
(S
3+4=k4
).
Control environment: oven
Partial program application is in the following:
M1002
MOV D20
END
K4000
MOV D200 K400
MOV D10 K800
TO K2 K0 K1 K2
M1013
FROM K6 K0 K1 D11
M0
MOV D204 K3
RST M0
M1
PID D11 D10 D0 D200
GPWM D20 D0 Y0


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6- 242
The experimental result of auto-tuning is shown as follows: (M0 & M1 set ON)


Auto tuning area
S
3
+4 = k3
PID control area
S
3
+4 = k4
Auto tuning area
S
3
+4 = k3
PID control area
S
3
+4 = k4

The experimental result of specific temperature control method after auto-tuning is shown as follows:
(M0 set OFF, M1 set ON)

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API Mnemonic Operands Function
89

PLS

Rising-edge output
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * *
PLS: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Rising pulse output device
Explanations:
When X0=OFFON (rising-edge trigger), PLS command will be executed and M0 will send the pulse of
one time which the width is a scan time.
Program Example:
Ladder Diagram:
X0
M0 PLS
M0
Y0 SET

Timing Diagram:
X0
M0
Y0
A scan cycle

Command Code: Operation:
LD X0 ; Load A contact of X0
PLS M0 ; M0 rising-edge output
LD M0 ; Load the contact A of M0
SET Y0 ; Y0 latched (ON)

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API Mnemonic Operands Function
90

LDP

Rising-edge detection operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * *
LDP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The device that is detected switching from OFF to ON
Explanations:
Usage of the LDP command is the same as the LD command, but the motion is different. It is used to
reserve present contents and at the same time, saving the detection status of the acquired contact
rising-edge into the accumulative register.
Program Example:
Ladder Diagram:
X0 X1
Y1

Command Code: Operation:
LDP X0 ; Start X0 rising-edge detection
AND X1 ; Series connection A contact of X1
OUT Y1 ; Drive Y1 coil
Points to Note:
1. Please refer to the specification of every model for the operand usage.
2. If specific rising-edge contact state is ON before ELC is power on, rising-edge contact will be True
after ELC is power on.

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API Mnemonic Operands Function
91

LDF

Falling-edge detection operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * *
LDF: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The device that is detected switching from ON to OFF
Explanations:
Usage of the LDF command is the same as the LD command, but the motion is different. It is used to
reserve present contents and at the same time, saving the detection status of the acquired contact
falling-edge into the accumulative register.
Program Example:
Ladder Diagram:
X0 X1
Y1

Command Code: Operation:
LDF X0 ; Start X0 falling-edge detection
AND X1 ; Series connection A contact of X1
OUT Y1 ; Drive Y1 coil

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API Mnemonic Operands Function
92

ANDP

Rising-edge series connection
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * *
ANDP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The serial connection device that is detected switching from OFF to ON
Explanations:
ANDP command is used in the series connection of the contacts rising-edge detection.
Program Example:
Ladder Diagram:
X1 X0
Y1

Command Code: Operation:
LD X0 ; Load A contact of X0
ANDP X1 ; X1 rising-edge detection in series connection
OUT Y1 ; Drive Y1 coil

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API Mnemonic Operands Function
93

ANDF

Falling-edge series connection
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * *
ANDF: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The serial connection device that is detected switching from ON to OFF
Explanations:
ANDF command is used in the series connection of the contacts falling-edge detection.
Program Example:
Ladder Diagram:
X1 X0
Y1

Command Code: Operation:
LD X0 ; Load A contact of X0
ANDF X1 ; X1 falling-edge detection in series connection
OUT Y1 ; Drive Y1 coil

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API Mnemonic Operands Function
94

ORP

Rising-edge Parallel connection
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * *
ORP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The parallel connection device that is detected switching from OFF to ON
Explanations:
The ORP commands are used in the parallel connection of the contacts rising-edge detection.
Program Example:
Ladder Diagram:
X0
X1
Y1

Command Code: Operation:
LD X0 ; Load A contact of X0
ORP X1 ; X1 rising-edge detection in parallel connection
OUT Y1 ; Drive Y1 coil

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API Mnemonic Operands Function
95

ORF

Falling-edge Parallel connection
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * *
ORF: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The parallel connection device that is detected switching from ON to OFF
Explanations:
The ORF commands are used in the parallel connection of the contacts falling-edge detection.
Program Example:
Ladder Diagram:
X0
X1
Y1

Command Code: Operation:
LD X0 ; Load A contact of X0
ORF X1 ; X1 falling-edge detection in parallel connection
OUT Y1 ; Drive Y1 coil

ELC Syst em Manual

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API Mnemonic Operands Function
96

TMR

Timer
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
* *
TMR: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Timer number (T0~T255) S
2
: Set value (K0~K32,767, PB:D0~D599, PC/PA/PH:D0~D4,999)
Explanations:
When TMR command is executed, the specific coil of timer is ON and timer will start to count. When the
setting value of timer is attained (counting value >= setting value), the contact will be as follow:
NO(Normally Open) contact Continuity
NC(Normally Closed) contact Non-continuity
Program example:
Ladder Diagram:
X0
T5 TMR K1000

Command Code: Operation:
LD X0 ; Load A contact of X0
TMR T5 K1000 ; T5 timer Setting is K1000

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API Mnemonic Operands Function
97

CNT

Counter 16-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
* *
CNT: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: 16 bit counter number(C0~C199) S
2
: Set value (K0~K32,767, PB:D0~D599, PC/PA/PH:D0~D4,999)
Explanations:
When the CNT command is executed from OFFON, which means that the counter coil is driven, and
should thus be added to the counters value; when the counter achieved specific set value (value of
counter = the setting value), motion of the contact is as follows:
NO(Normally Open) contact Continuity
NC(Normally Closed) contact Non-continuity
If there is counting pulse input after counting is attained, the contacts and the counting values will be
unchanged. To re-count or to conduct the CLEAR motion, please use the RST command.
Program example:
Ladder Diagram:
X0
C20 CNT K100

Command Code: Operation:
LD X0 ; Load A contact of X0
CNT C20 K100 ; C20 counter Setting is K100

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API Mnemonic Operands Function
97

DCNT

Counter 32-bit
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
* *
DCNT: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: 32 bit counter number (PB: C235~C254, PC/PA/PH: C200~C254)
S
2
: Set value (K-2,147,483,648~K2,147,483,647, PB:D0~D599, PC/PA/PH:D0~D4,999)
Explanations:
1. DCNT is the startup command for the 32-bit high-speed counter that is utilized especially in
counters C235 to C254.
2. For general addition/subtraction counter C200~C234, the present value will count up (add 1) or
count down (subtract 1) according to the flags M1200~M1234 set count mode when command
DCNT is from OFFON.
3. When specific high-speed counter pulse input of high-speed addition/subtraction counters
C235~C254 is from OFFON, it will execute counting. The counter data remains unchanged
when the trigger input is turned ON. See chapter 2.7 counter number and function for high-speed
pulse input terminals (X0~X11) and counting (count up (add 1) and count down (subtract 1)).
4. When DCNT command is OFF, the counter will stop counting, but the counting values will not be
cleared. Users can use RST C2XX command to remove the counting values and the contacts.
High-speed addition/subtraction counters C235~C254 can use external specific input point to clear
the counting values and the contacts.
Program Example:
Ladder Diagram:
M0
C254 DCNT K1000

Command Code: Operation:
LD M0 ; Load A contact of M0
DCNT C254 K1000 ; C254 counter Setting is K1000

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6- 253
API Mnemonic Operands Function
98

INV - Inverse operation
Controllers
PB PC PA PH PV

OP Descriptions Program Steps
N/A Invert the current result of the internal ELC operations INV: 1 step

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Explanations:
Inverting the operation result and use the new data as an operation result.
Program Example:
Ladder Diagram:
X0
Y1

Command Code: Operation:
LD X0 ; Load A contact of X0
INV ; Inverting the operation result
OUT Y1 ; Drive Y1 coil

ELC Syst em Manual

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API Mnemonic Operands Function
99

PLF

Falling-edge output
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * *
PLF: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Falling pulse output device
Explanations:
When X0= ONOFF (falling-edge trigger), PLF command will be executed and M0 will send the pulse
of one time which the width is the time for scan one time.
Program Example:
Ladder Diagram:
X0
M0 PLF
M0
Y0 SET

Timing Diagram:
A scan cycle
X0
M0
Y0

Command Code: Operation:
LD X0 ; Load A contact of X0
PLF M0 ; M0 falling-edge output
LD M0 ; Load the contact A of M0
SET Y0 ; Y0 latched (ON)

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6- 255
API Mnemonic Operands Function
100

MODRD

Modbus Data Read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
n * * *
MODRD: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: External device address (K0~K254) S
2
: Register(s) of external device to read n: Number of
registers to read (K1nK6)
Explanations:
1. MODRD is a specific instruction for the MODBUS ASCII / RTU mode communication. The
MODRD instruction can be used to read MODBUS data from external devices that support
MODBUS communications.
2. S
2
Register(s) of external device to read. If the register value is illegal, the user will be informed by
an error message. The error code will be stored in D1130, while M1141 = ON.
3. The response data from external device will be stored in D1070 to D1085. After receiving all of the
response, ELC will check if the returned data is correct. If there is an error, then M1140 = ON.
4. If using ASCII mode, ELC will automatically convert the response data to hex and store in D1050
to D1055. D1050 to D1055 will be invalid if using RTU mode.
5. After M1140 or M1141 = ON, a correct data will be transmitted to peripheral equipment again. If
the response data is correct, then the flag M1140, M1141 will be clear.
6. Refer to RS instruction for more information
7. PB series doesnt support index register E, F.

ELC Syst em Manual

6- 256
Program Example 1:
Communication between ELC and MVX AC drives (ASCII Mode, M1143= OFF)


ELC MVX, ELC transmits: 01 03 0708 0006 E7
MVX ELC , ELC receives: 01 03 0C 0100 1766 0000 0000 0136 0000 3B
ELC transmits message
Register Data Descriptions
D1089 low byte 0 30 H ADR 1
D1089 high byte 1 31 H ADR 0
ADR (1,0) is AC drive address
D1090 low byte 0 30 H CMD 1
D1090 high byte 3 33 H CMD 0
CMD (1,0) is instruction code
D1091 low byte 0 30 H
D1091 high byte 7 37 H
D1092 low byte 0 30 H
D1092 high byte 8 38 H
Starting data address
D1093 low byte 0 30 H
D1093 high byte 0 30 H
D1094 low byte 0 30 H
D1094 high byte 6 36 H
Number of data (count by word)
D1095 low byte E 45 H LRC CHK 1
D1095 high byte 7 37 H LRC CHK 0
LRC CHK (0,1) is error check
code
MOV D1120 H87
M1002
SET M1120
M1127
Receiving
completed
Setting communication protocol 9600, 8, E, 1
Communication protocol latched
Setting communication time out 100ms
Process of receiving data
Receiving completed and flag reset
Setting transmission flag
X1
X0
MODRD K1 H0708 K6
Setting communication command:
D
Data address H0708
D
ata length 6 words
evice address 01
ELC will convert the receiving data stored
in D1070~D1085 from ASCII character to
value and store the value in D1050~D1055.
MOV D1129 K100
SET M1122
RST M1127
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6- 257
ELC receives response message
Register Data Descriptions
D1070 low 0 30 H ADR 1
D1070 high 1 31 H ADR 0
D1071 low byte 0 30 H CMD 1
D1071 high byte 3 33 H CMD 0
D1072 low byte 0 30 H
D1072 high byte C 43 H
Number of data (count by byte)
D1073 low byte 0 30 H
D1073 high byte 1 31 H
D1074 low byte 0 30 H
D1074 high byte 0 30 H
Content of address
0708 H
ELC automatically converts
ASCII codes to hex and
store the converted value
in D1050 = 0100 H
D1075 low byte 1 31 H
D1075 high byte 7 37 H
D1076 low byte 6 36 H
D1076 high byte 6 36 H
Content of address
0709 H
ELC automatically converts
ASCII codes to hex and
store the converted value
in D1051 = 1766 H
D1077 low byte 0 30 H
D1077 high byte 0 30 H
D1078 low byte 0 30 H
D1078 high byte 0 30 H
Content of address
070A H
ELC automatically converts
ASCII codes to hex and
store the converted value
in D1052 = 0000 H
D1079 low byte 0 30 H
D1079 high byte 0 30 H
D1080 low byte 0 30 H
D1080 high byte 0 30 H
Content of address
070B H
ELC automatically converts
ASCII codes to hex and
store the converted value
in D1053 = 0000 H
D1081 low byte 0 30 H
D1081 high byte 1 31 H
D1082 low byte 3 33 H
D1082 high byte 6 36 H
Content of address
070CH
ELC automatically converts
ASCII codes to hex and
store the converted value
in D1054 = 0136 H
D1083 low byte 0 30 H
D1083 high byte 0 30 H
D1084 low byte 0 30 H
D1084 high byte 0 30 H
Content of address
070D H
ELC automatically converts
ASCII codes to hex and
store the converted value
in D1055 = 0000 H
D1085 low byte 3 33 H LRC CHK 1
D1085 high byte B 42 H LRC CHK 0
ELC Syst em Manual

6- 258
Program Example 2:
Communication between ELC and MVX AC drive (RTU Mode, M1143= ON)
MOV D1120 H87
M1002
SET M1120
MOV D1129 K100
M1127
Receiving
completed
Setting communication protocol 9600, 8, E, 1
Communication protocol latched
Setting communication timeout 100ms
Process of receiving data
Receiving completed and flag reset
Setting transmission flag
X1
The receiving data in HEX value
format is stored in D1070~D1085.
Setting as RTU mode
X0
MODRD K1 H0708
Setting communication command:
D
Data address H0708
D
ata length 2 words
evice address 01
K2
SET M1143
SET M1122
RST M1127

ELC MVX, ELC transmits: 01 03 0708 0002 44 BD
MVX ELC, ELC receives: 01 03 04 1770 0000 FE 5C
ELC transmits message
Register Data Descriptions
D1089 low byte 01 H Address
D1090 low byte 03 H Function
D1091 low byte 07 H
D1092 low byte 08 H
Starting data address
D1093 low byte 00 H
D1094 low byte 02 H
Number of data (count by word)
D1095 low byte 44 H CRC CHK Low
D1096 low byte BD H CRC CHK High
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6- 259
ELC receives response message
Register Data Descriptions
D1070 low byte 01 H Address
D1071 low byte 03 H Function
D1072 low byte 04 H Number of data (count by byte)
D1073 low byte 17 H
D1074 low byte 70 H
Content of address 2102 H
D1075 low byte 00 H
D1076 low byte 00 H
Content of address 2103 H
D1077 low byte FE H CRC CHK Low
D1078 low byte 5C H CRC CHK High
Program Example 3:
1. ELC connected to an MVX AC drive (ASCII Mode, M1143= OFF). If a communication times-out,
retry when the error occurs during receives or sending data.
2. When X0= ON, read data from address H0708 of device 01 (MVX) and save in D1070~D1085 with
ASCII format. ELC will auto convert its content to hex to save in D1050~D1055.
3. Flag M1129 = ON when communication times-out, the program will send a request from M1129 to
ask M1122 to read again.
4. Flag M1140 = ON when a receive error occurs, the program will send a request from M1140 to ask
M1122 to read again.
5. Flag M1141 = ON when a received address error occurs, the program will send a request from
M1141 to ask M1122 to read again.
ELC Syst em Manual

6- 260
Program diagram
M1002
MOV H87 D1120
SET M1120
RST M1127
M1127
RST M1129
Setting communication protocol to 9600, 8, E, 1
Communication protocol latched
Setting communication time-out to 100ms
MODRD K1 H0708 K 6
X0
Setting communication command:
Data address

Data length 6 words
H0708
Device address 01
X0
M1129
M1140
M1141
Setting transmission request
Communication time-out Retry
Data receive error Retry
Sending address error Retry
Receiving completed
Handle received data
The receiving data in ASCII format stored in D1070-D1085.
ELC will convert to numeral and save into D1050-D1055 automatically.
Receiving completed and flag reset
Communication time-out and flag reset
MOV K100 D1129
SET M1122
M1129

Notes:
1. For detailed information of the related flags and special registers, refer to the RS instruction.
2. Rising-edge contact (LDP, ANDP, ORP) and falling-edge contact (LDF, ANDF, ORF) can not be
used with MODRD, MODRW (FUNCTION CODE H03) instructions. Otherwise, the data stored
in the received registers will be incorrect.

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API Mnemonic Operands Function
101

MODWR

Modbus Data Write
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
n * * *
MODWR: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: External device address (K0~K254) S
2
: Register(s) of external device to write to n: Number of
values to write
Explanations:
1. MODWR is a specific instruction for the MODBUS ASCII / RTU mode communication. The
MODWR instruction can be used to write MODBUS data to external devices that support
MODBUS communications.
2. S
2
is the register to write data to. If the register address setting is not valid, the user will be
informed by an error message. The error code will be stored in D1130, while M1141 = ON. For
example, 8000H is an illegal register address in the MVX drive, then M1141 = ON, D1130=2.
Since the error code is generated by the external device. A user will need to refer to the external
devices manual to determine the error. In this case a user would need to refer to the MVX series
user manual.
3. The response from the external device will be stored in D1070 to D1076. After receiving all of the
response, ELC will check if there are any data errors. If there is an error, then M1140 = ON.
4. After M1140 or M1141 = ON, resend the correct data to the external device again. If the response
is correct, then the flag M1140, M1141 will be clear.
5. PB series doesnt support index register E, F.

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Program Example 1:
Communication between ELC and MVX AC drives (ASCII Mode, M1143= OFF)
Program diagram
MOV D1120 H87
M1002
SET M1120
M1127
RST M1127
Receiving
completed
Setting communication protocol 9600, 8, E, 1
Communication protocol latched
Setting communication timeout 100ms
Process of receiving data
Receiving completed and flag reset
Setting transmission flag
X1
X0
Setting communication command:
Data address H0706
Data H1770
Device address 01
The receiving data in ASCII character
format is stored in D1070~D1085
MOV D1129 K100
SET M1122
MODWR H0706 K1 H1770

ELC MVX, ELC transmits: 01 06 0706 1770 65
MVX ELC, ELC receives: 01 06 0706 1770 65
ELC transmits message
Register Data Descriptions
D1089 low 0 30 H ADR 1
D1089 high 1 31 H ADR 0
ADR (1,0) is AC drive address
D1090 low 0 30 H CMD 1
D1090 high 6 36 H CMD 0
CMD (1,0) is instruction code
D1091 low 0 30 H
D1091 high 7 37 H
D1092 low 0 30 H
D1092 high 6 36 H
Data address
D1093 low 1 31 H
D1093 high 7 37 H
D1094 low 7 37 H
D1094 high 0 30 H
Data contents
D1095 low 6 36 H LRC CHK 1
D1095 high 5 35 H LRC CHK 0
LRC CHK (0,1) is error check
code
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ELC receives response message
Register Data Descriptions
D1070 low 0 30 H ADR 1
D1070 high 1 31 H ADR 0
D1071 low 0 30 H CMD 1
D1071 high 6 36 H CMD 0
D1072 low 0 30 H
D1072 high 7 37 H
D1073 low 0 30 H
D1073 high 6 36 H
Data address
D1074 low 1 31 H
D1074 high 7 37 H
D1075 low 7 37 H
D1075 high 0 30 H
Data content
D1076 low 6 36 H LRC CHK 1
D1076 high 5 35 H LRC CHK 0
Program Example 2:
Communication between ELC and MVX AC drives (RTU Mode, M1143= ON)
Program diagram
MOV D1120 H87
M1002
SET M1120
Setting communication protocol 9600, 8, E, 1
Communication protocol latched
Setting communication timeout 100ms
Setting transmission flag
X1
M1127
RST M1127
Receiving
completed
Process of receiving data
Receiving completed and flag reset
The receiving data in HEX value
format is stored in D1070~D1085.
Setting as RTU mode
X0
Setting communication command:
Data address H0706
Write in data H1770
Device address 01
MOV D1129 K100
SET M1143
SET M1122
MODWR H0706 K1 H1770

ELC MVX, ELC transmits: 01 06 0706 1770 66 AB
MVX ELC, ELC receives: 01 06 0706 1770 66 AB
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ELC transmits message
Register Data Descriptions
D1089 low 01 H Address
D1090 low 06 H Function
D1091 low 07 H
D1092 low 06 H
Data address
D1093 low 17 H
D1094 low 70 H
Data content
D1095 low 66 H CRC CHK Low
D1096 low AB H CRC CHK High
ELC receives response message
Register Data Descriptions
D1070 low 01 H Address
D1071 low 06 H Function
D1072 low 07 H
D1073 low 06 H
Data address
D1074 low 17 H
D1075 low 70 H
Data content
D1076 low 66 H CRC CHK Low
D1077 low AB H CRC CHK High
Program Example 3:
1. ELC connects to MVX AC drive (ASCII Mode, M1143= OFF). When communication times-out,
retry when the error occurs during receives or sending.
2. When X0= ON, ELC will write data H1770(K6000) into address H0706 of device 01 (MVX).
3. Flag M1129 = ON when communication times-out and the program will send a request from
M1129 to ask M1122 to read again.
4. Flag M1140 = ON when response is a receive error, the program will send a request from M1140
and ask M1122 to read again.
5. Flag M1141 = ON when the response is a received address error, the program will send a request
from M1141 to ask M1122 to read again.
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Program diagram
M1002
MOV H87 D1120
SET M1120
Setting communication protocol to 9600, 8, E, 1
Communication protocol latched
Setting communication timeout 100ms
MODWR K1 H0706 H1770
X0
Setting communication command:
Data address
Data H1770
H0706
Device address 01
X0
M1129
M1140
M1141
Setting transmission request
Communication time-out Retry
Data receive error Retry
Sending address error Retry
RST M1127
M1127
RST M1129
Receiving completed
Handle received data The receiving data in ASCII format stored in D1070-D1085.
Receiving completed and flag reset
Communication time-out and flag reset
MOV K100 D1129
SET M1122
M1129

Points to note:
1. For detailed information of the related flags and special registers, refer to the RS instruction.
2. If using rising-edge (LDP, ANDP, ORP) or falling-edge (LDF, ANDF, ORF) before MODWR and
MODRW (Function Code H06 and H10) instructions, the program should start the transmission
request M1122 to execute properly.
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API Mnemonic Operands Function
107

LRC P

LRC Generator
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
n * * *
D *
LRC, LRCP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Starting device for the checksum operation (ASCII mode) n: Number of values to perform the
operation on (n=K1~K256) D: Destination for storing the operation result
Explanations:
1. n: n must be even. If n is out of range, an error will occur and the instruction will not be executed.
At this time, M1067 and M1068 = ON and error code H0E1A will be recorded in D1067.
2. 16-bit conversion mode: When M1161= OFF, hexadecimal data that starts from the source S will
be divided into upper 8-bit and lower 8-bit values and perform the checksum operation on n
numbers. Then, store the result into upper and lower 8-bit of D.
3. 8-bit conversion mode: When M1161= ON, divide hexadecimal data that start from the source
device S into upper 8-bit (invalid data) and lower 8-bit and perform the checksum operation on n
numbers. Then, store the result into lower 8-bit of D (upper 8-bit of D all be zero (0)).
4. Flag: M1161 8/16-bit mode
Program Example:
ASCII communication mode: Data stored as following:
Register Data Descriptions
D100 low byte : 3A H STX
D101 low byte 0 30 H ADR 1
D102 low byte 1 31 H ADR 0
ADR (1,0) is AC drive address
D103 low byte 0 30 H CMD 1
D104 low byte 3 33 H CMD 0
CMD (1,0) is instruction code
D105 low byte 0 30 H
D106 low byte 7 37 H
D107 low byte 0 30 H
D108 low byte 8 38 H
Starting data address
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Register Data Descriptions
D109 low byte 0 30 H
D110 low byte 0 30 H
D111 low byte 0 30 H
D112 low byte 6 36 H
Number of data (count by word)
D113 low byte E 45 H LRC CHK 0
D114 low byte 7 37 H LRC CHK 1
LRC CHK (0,1) error check code
D115 low byte CR D H
D116 low byte LF A H
END
The LRC CHK (0,1) above is error check code and it can be calculated by the LRC instruction (8-bit
Mode, M1161= ON).
M1000
LRC D101 K12 D113

LRC check: 01 H + 03 H + 07 H + 08 H + 00 H + 06 H = 19 H, then take the complement of 2, E7 H. At
that time, E(45 H) is stored in the lower 8-bit of D113 and 7 (37 H) is stored in the lower 8-bits of D114.
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API Mnemonic Operands Function
108

CRC P

CRC Generator
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
n * * *
D *
CRC, CRCP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Starting device for the checksum operation (RTU mode) n: Number of values to perform the
operation on (n=K1~K256) D: Destination for storing the operation result
Explanations:
1. If n is out of range, an error will occurred and the instruction wont be executed. At this time,
M1067 and M1068 = ON and error code H0E1A will be recorded in D1067.
2. 8-bit conversion mode: When M1161= ON (16-bit mode, M1161=OFF) divide hexadecimal data
that starts from the source S into high byte (invalid data) and low byte and have the CRC operation
performed on n numbers and store the result into low byte of D (upper 8-bit of D all be zero (0)).
Program Example:
RTU communication mode: Data stored as following:
Register Data Descriptions
D100 low byte 01 H Address
D101 low byte 06 H Function
D102 low byte 07 H
D103 low byte 06 H
Data address
D104 low byte 17 H
D105 low byte 70 H
Data content
D106 low byte 66 H CRC CHK 0
D107 low byte AB H CRC CHK 1
The CRC CHK (0,1) above is error check code and it can be calculated by CRC instruction (8-bit Mode,
M1161= ON).
M1000
CRC D100 K6 D106

CRC check: At the time, 66 H is stored in the lower 8-bit of D106 and AB H is stored in the lower 8-bit of
D107.
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110

D ECMP P

Floating Point Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D * * *
DECMP, DECMPP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: 1st comparison value S
2
: 2nd comparison value D: Destination result, 3 continuous devices
used (occupies 3 continuous devices)
Explanations:
1. The data of S
1
is compared to the data of S
2
and the result (, , ) is showed by three bit
devices in D.
2. If the source operand S
1
or S
2
is indicated as constant K or H, the integer value will automatically
be converted to binary floating point to compare.
Program Example:
1. If the specified device is M10, M10~M12 will automatically be used.
2. When X0= ON, one of M10~M12 = ON. When X0= OFF, DECMP is not executed, M10~M12 will
retain their previous state before X0= OFF.
3. Connect M10~M12 in series or parallel to use the result of , , .
4. Use RST or ZRST instruction to reset the result.
X0
DECMP D0 D100 M10
M10
M11
M12
It is ON when (D1,D0)>(D101,D100)
It is ON when (D1,D0)=(D101,D100)
It is ON when (D1,D0)<(D101,D100)


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API Mnemonic Operands Function
111

D EZCP P

Floating Zone Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S * * *
D * * *
DEZCP, DEZCPP: 17
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Lower limit of zone comparison S
2
: Upper limit of zone comparison S: Comparison value D:
Comparison result, 3 continuous devices used
Explanations:
1. The data of S is compared to the data range of S
1
~ S
2
and the result (, , ) is displayed by
three bit devices in D.
2. If the source operand S
1
or S
2
is indicated as constant K or H, the integer value will automatically
be converted to binary floating point to compare.
3. Operand S
1
should be smaller than operand S
2
, when S
1
S
2
, S
1
will be used as upper and lower
limit for the comparison.
Program Example:
1. If the specified device is M10, M10~M12 will automatically be used.
2. When X0= ON, one of M10~M12 = ON. When X0= OFF, DEZCP instruction is not executed,
M10~M12 will retain their previous state before X0= OFF.
3. Use RST or ZRST instruction to reset the result.
X0
DEZCP D0 D10 D20
M10
M11
M12
It is ON when (D1,D0)>(D21,D20)
It is ON when (D1,D0) (D21,D20) < (D11,D10) <
It is ON when (D21 D20)>(D11,D10) ,
M10

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API Mnemonic Operands Function
112

D MOVR P

Floating point data Move
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S


D * * * * * *
DMOVR, DMOVRP: 9
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Data source of floating points D: Destination of transmitted data
Explanations:
1. Directly input floating point value in S.
2. When instruction is working, move the content of S to D. But if it is not working, D will not vary.
Program Example:
When X0=OFF, D10 and D11 will not change. When X0=ON, transmit F1.20000004768372 to D10 and
D11.
X0
DMOVR F1.20000004768372 D10

Remarks:
DMOVR is the new command for V1.2 of PB series model, V1.2 of PC/PA/PH series model.
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116

D RAD P

Degree Radian
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * *
D *
DRAD, DRADP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: source (degree) D: Destination result (radian)
Explanation:
1. Using following function to convert degree to radian:
Radian degree (/180)
2. Flags: M1020 Zero flag, M1021 Borrow flag, M1022 Carry flag
If absolute value of the results is larger than max. floating point, carry flag M1022= ON.
If absolute value of the results is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
When X0= ON, convert degree value of the binary floating point in (D1, D0) to radian and save in (D11,
D10) and the result is binary floating point.
X0
DRAD D0 D10

D 1 D 0
D11 D10
binary floating point
Degree value
binary floating point
RAD value (degree x /180)


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117

D DEG P

Radian Degree
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * *
D *
DDEG, DDEGP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: data source (radian) D: Destination result (degree)
Explanation
1. Using following function to convert radian to degree:
Degree Radian (180/)
2. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If the absolute value of the result exceed the max floating point, then the carry flag M1022=ON.
If the absolute value of the result is less than min floating point, then the carry flag M1021=ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
When X0= ON, convert the degree value of the binary floating point in (D1, D0) to radian and save in
(D11, D10) and the result is binary floating point.
X0
DDEG D0 D10

D 1 D 0
D 11 D 10
binary floating point
Radian value
binary floating point
Degree value (radian x 180/ )


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118

D EBCD P

Floating to Scientific Conversion
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S *
D *
DEBCD, DEBCDP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Data source D: Destination result
Explanation
1. Convert the binary floating point value at the register specified by S to decimal floating point value
and store in the register specified by D.
2. ELC floating point is operated by the binary floating point format. DEBCD instruction is the specific
instruction used to convert binary floating point to decimal floating point.
3. Flag: M1020 Zero flag, M1021 Borrow flag, M1022 Carry flag
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
When X0= ON, the binary floating point value in D1, D0 will be converted to decimal floating point stored
in D3, D2.
D0 DEBCD
X0
D2

D0 D1
D2 D3
Binary
Floating Point
23 bits for real number, 8 bits for exponent
1 bit for symbol bit
[D2] * 10
[D3]
Decimal
Floating Point
Exponent Real number
Real number Exponent

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119

D EBIN P

Scientific to Float Conversion
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S *
D *
DEBIN, DEBINP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Data source D: Destination result
Explanation:
1. Convert a decimal floating point value at the register specified by S to a binary floating point value
and store in the register specified by D.
2. For example, S =1234, S +1= 3 will become S =1.234 x 10
6

3. D must be a binary floating point format. S and S +1 represent the real number and exponent of
the floating point number respectively.
Program Example 1:
When X1= ON, the decimal floating point
value in D1, D0 will be converted to binary
floating point stored in D3, D2.
D0 DEBIN
X1
D2
D0 D1
D2 D3
[D0] * 10
[D1]
Decimal
Floating Point
Binary
Floating Point
23 bits for real number
8 bits for exponent
1 bit for symbol bit
Exponent Real number
Exponent Real number

Program Example 2:
1. Before performing this floating point operation, you must use the FLT instruction to convert BIN
integer to binary floating point. The source data should be a BIN integer. However, DEBIN
instruction can be used to convert floating point value to binary floating point value.
2. When X0= ON, move K314 to D0 and move K-2 to D1 to generate decimal floating point format
(3.14 = 314 10
-2
).
K314 MOVP
X0
D0
D0 DEBIN D2
K-2 MOVP D1
K314 D0 [D1]
K-2 D1 [D0]
314 x10
(D1 D0) (D3 D2) , ,
314 x10
-2
Binary
Floating Point


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120

D EADD P

Floating Point Addition
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D *
DEADD, DEADDP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Augend S
2
: Addend D: Addition result
Explanations:
1. S
1
+ S
2
= D. The floating point value in the register specified by S
1
and S
2
are added and the result
is stored in the register specified by D.
2. If the source operand S
1
or S
2
is indicated as constant K or H, the integer value will automatically
be converted to binary floating point to perform the addition operation.
3. S
1
and S
2
can specify the same register number (the same device can be used for S
1
and S
2
).
4. This instruction works best when used as the pulse instruction.
5. Flags: M1020 (Zero flag), M1021 (Borrow flag) and M1022 (Carry flag)
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example 1:
When X0= ON, add the binary floating point value of (D1, D0) and binary floating point value of (D3, D2)
and store the result in (D11, D10).
D0 DEADD
X0
D2 D10

Program Example 2:
When X2= ON, add the binary floating point value of (D11, D10) and K1234 (automatically converted to
binary floating point) and store the result in (D21, D20).
D10 DEADD
X2
K1234 D20

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121

D ESUB P

Floating Point Subtraction
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D *
DESUB, DESUBP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Minuend S
2
: Subtrahend D: Subtraction result
Explanation:
1. S
1
S
2
= D. The floating point value in the register specified by S
2
is subtracted from the floating
point value in the register specified by S
1
and the result is stored in the register specified by D. All
data will be operated in floating point format and the result will be also stored in floating point
format.
2. If the source operand S
1
or S
2
is constant K or H, the integer value will automatically be converted
to binary floating point to perform the subtraction operation.
3. S
1
and S
2
can specify the same register number (the same device can be used as S
1
and S
2
). If in
this case and on the continuous execution of the DESUB instruction, the data in the register will be
subtracted one time in every scan program during the cycle when the condition contact = ON.
Therefore, the pulse instruction (DESUBP) is generally used.
4. Flags: M1020 (Zero flag), M1021 (Borrow flag) and M1022 (Carry flag)
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
When X0= ON, binary floating point value of (D3, D2) is subtracted from binary floating point value of
(D1, D0) and the result is stored in (D11, D10).
D0 DESUB
X0
D2 D10


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122

D EMUL P

Floating Point Multiplication
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D *
DEMUL, DEMULP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Multiplicand S
2
: Multiplier D: Multiplication result
Explanations:
1. S
1
S
2
= D. The floating point value in the register specified by S
1
is multiplied with the floating
point value in the register specified by S
2
and the result is stored in the register specified by D. All
data will be operated in floating point format and the result will be also stored in floating point
format.
2. If the source operand S
1
or S
2
is indicated as constant K or H, the integer value will automatically
be converted to binary floating point to perform the multiplication operation.
3. S
1
and S
2
can specify the same register number (the same device can be used as S
1
and S
2
). If in
this case and on the continuous execution of the DEMUL instruction, the data in the register will be
multiplied one time in every scan program during the cycle when the condition contact = ON.
Therefore, the pulse instruction (DEMULP) is generally used.
4. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
When X1= ON, binary floating point value of (D1, D0) is multiplied with binary floating point (D11, D10)
and the result is stored in (D21, D20).
D0 DEMUL
X1
D10 D20


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123

D EDIV P

Floating Point Division
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D *
DEADD, DEADDP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Dividend S
2
: Divisor D: Quotient and Remainder
Explanation:
1. S
1
S
2
= D. The floating point value in the register specified by S
1
is divided by the floating point
value in the register specified by S
2
and the result is stored in the register specified by D. All data
will be operated in floating point format and the result will be also stored in floating point format.
2. If the source operand S
1
or S
2
is indicated as constant K or H, the integer value will automatically
be converted to binary floating point to perform the division operation.
3. If S
2
is 0 (zero), the operation will fail and will result in an operand error, then this instruction will
not be executed.
4. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example 1:
When X1= ON, binary floating point value of (D1, D0) is divided by binary floating point (D11, D10) and
the quotient and remainder is stored in (D21, D20).
D0 DEDIV
X1
D10 D20

Program Example 2:
When X2= ON, binary floating point value of (D1, D0) is divided by K1234 (automatically converted to
binary floating point) and the result is stored in (D11, D10).
D0 DEDIV
X2
K1234 D10

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D EXP P

Float Exponent Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DEXP, DEXPP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: operand source device D: operand result device
Explanations:
1. For example, the base e =2.71828 and exponent is S:
2. EXP
[S +1, S ]
=[ D +1, D ]
3. Both positive and negative values are valid for S. Specific register D needs to use 32-bit format
and floating point for operating. Therefore, S needs to convert to floating point.
4. When operand D= e
S
, e=2.71828 and S is specific source data.
5. Error flags: M1067 and M1068, read D1067 and D1068.
6. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
1. When M0= ON, convert (D0, D1) to binary floating point and save in register (D10, D11).
2. When M1= ON, use (D10, D11) as the exponent to perform exponent operation. The value is
binary floating point and save in register (D20, D21).
3. When M2= ON, convert (D20, D21) binary floating point to decimal floating point and save in
register (D30, D31). (at this time, D31 means D30 to the power of 10)
M0
RST M1081
M1
DEXP D10 D20
M2
DEBCD D20 D30
DFLT D0 D10

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D LN P

Float Natural Logarithm Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DLN, DLNP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: operand source device D: operand result device
Explanations:
1. Perform natural logarithm operation to operand S:
LN[S +1, S ]=[ D +1, D ]
2. Only a positive number is valid for S. Specific register D needs to use 32-bit format and floating
point for operating. Therefore, S needs to converted to floating point.
3. e
D
=S, operand D=ln S and S is specific source data.
4. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
1. When M0= ON, convert (D0, D1) to binary floating point and save in register (D10, D11).
2. When M1= ON, use (D10, D11) to be real number to perform natural logarithm operation. The
value is binary floating point and save in register (D20, D21).
3. When M2= ON, convert (D20, D21) binary floating point to decimal floating point and save in
register (D30, D31). (at this time, D31 means D30 to the power of 10)
M0
RST M1081
M1
DLN D10 D20
M2
DEBCD D20 D30
DFLT D0 D10

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D LOG P

Float Logarithm Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D *
DLOG, DLOGP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: operand base device S
2
: operand source device D: operand result device
Explanations:
1. Perform logarithm operation to S
1
and S
2
and save the result to D.
2. Only positive number is valid for S
1
and S
2
(positive and negative number are valid for S
1
). Specific
register D needs to use 32-bit format and floating point for operating. Therefore, S
1
and S
2
need to
convert to floating point.
3. Flag: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
1. When M0= ON, convert (D0, D1) and (D2, D3) to binary floating point and save in register (D10,
D11) and (D12, D13) individually.
2. When M1= ON, use (D10, D11) and (D12, D13) binary floating point of 32-bit registers to perform
logarithm operation and save the result in 32-bit register (D20, D21).
3. When M2= ON, convert (D20, D21) binary floating point of 32-bit registers to decimal floating point
and save in register (D30, D31). (at this time, D31 means D30 to the power of 10)
M0
RST M1081
M1
M2
DEBCD D20 D30
DFLT D0 D10
D2 D12
DLOG D10 D12 D20
DFLT

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D ESQR P

Float point Square Root
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DESQR, DESQRP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source device D : Destination device to store the result
Explanations:
1. This instruction performs a square root operation on the floating point value of source S and stores
the result at the destination D. All data will be operated in floating point format and the result will be
also stored in floating point format.
2. If the source S is a constant K or H, the integer value will automatically be converted to binary
floating point to perform the addition operation.
3. If operation result of D is 0 (zero), the Zero flag M1020= ON.
4. S can only be a positive value. Performing any square root operation on a negative value will
result in an operation error and this instruction will not be executed. M1067 and M1068 = ON and
error code 0E1B will be recorded in D1067.
5. Flags: M1020 (Zero flag), M1067 (Program execution error)
Program Example 1:
When X0= ON, the square root of binary floating point (D1, D0) is stored in the register specified by
(D11, D10) after the operation of square root.
D0 DESQR
X0
D10
(D1, D0) (D11 D10) ,
Binary floating point Binary floating point

Program Example 2
When X2= ON, the square root of K1234 (automatically converted to binary floating point) is stored in
(D11, D10).
K1234 DESQR
X2
D10

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D POW P

Float point Power Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D *
DPOW, DPOWP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: base device. S
2
: exponent. D: result
Explanations:
1. Perform power operation to binary floating point S
1
and S
2
and save the result to D.
POW [S
1
+1, S
1
]^[ S
2
+1, S
2
]= D
2. Only a positive number is valid for S
1
. Specific register D needs to use 32-bit format and floating
point for operating. Therefore, S
1
and S
2
need to convert to floating point.
3. Error flags: M1067 and M1068, read D1067 and D1068.
If absolute value of the result is larger than max. floating point, carry flag M1022= ON.
If absolute value of the ion result is less than min. floating point, borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.
Program Example:
1. When M0= ON, convert (D0, D1) and (D2, D3) to a binary floating point and save in register (D10,
D11) and (D12, D13) individually.
2. When M1= ON, use (D10, D11) and (D12, D13) binary floating point 32-bit registers to perform
power operation and save the result in 32-bit register (D20, D21).
3. When M2= ON, convert (D20, D21) binary floating point 32-bit registers to decimal floating point
and save in register (D30, D31). (at this time, D31 means D30 to the power of 10)
M0
RST M1081
M1
D10 D12
M2
DEBCD D20 D30
D2 D12
D20 DPOW
DFLT
DFLT
D0 D10
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D INT P

Floating Point to Integer
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
D *
INT, INTP: 5 steps
DINT, DINTP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source device D: Destination device to store the result
Explanations:
1. The binary floating point value of the register S is converted to BIN integer and stored in the
register D. The decimal of BIN integer will be discarded.
2. This instruction is the opposite of the API 49 (FLT) instruction.
3. Flags: M1020 (Zero flag), M1021 (Borrow flag), M1022 (Carry flag)
If operation result of D is 0 (zero), the Zero flag M1020= ON.
If there is any decimal discarded, the Borrow flag M1021= ON.
If the result exceeds the following range (an overflow occurs), the Carry flag M1022= ON.
Program Example:
1. When X0= ON, the binary floating point value of (D1, D0) will be converted to BIN integer and the
result is stored in (D10). The decimal of BIN integer will be discarded.
2. When X1= ON, the binary floating point value of (D21, D20) will be converted to BIN integer and
the result is stored in (D31, D30). The decimal of BIN integer will be discarded.
INT
X0
D0 D10
DINT
X1
D20 D30


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D SIN P

Floating point Sine Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DSIN, DSINP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Specified RAD value (0S360) D: Area where calculated result is stored
Explanations:
1. Source designated by S can be radian or angle by flag M1018.
2. When M1018= OFF, it is set to radian mode. RAD=angle /180.
3. When M1018= ON, it is set to angle mode. Angle range: 0angle360.
4. The SIN value of an angle data specified by S is calculated and the calculated result is stored in
the register specified by D.
5. Flag: M1018 flag for radian/angle.
See the figure below for the relation between radian and result:
S: Radian
R: Result
R
S
-2
3
2
-2 2
3
2 2 2
-
1
-1
0
-

6. If result of D is 0, the Zero flag M1020=ON.
Program Example 1:
When M1018= OFF, is radian mode. When X0= ON, specify RAD value (D1, D0). Calculate SIN value of
angle and store the result in (D11, D10). The result stored in (D11, D10) are all in binary floating point
format.
M1002
RST M1018
X0
DSIN D0 D10

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D1 D0
D11 D10
SIN value
binary floating point
binary floating point
RAD value(degree x /180)

Program Example 2:
When M1018= OFF, is radian mode. Select angle from inputs X0 and X1 and convert it to RAD value to
calculate SIN value.
D10 FLT
M1000
D14
K31415926 K1800000000
D20 D14 D40
K30 MOVP
X0
D10
K60
X1
D10
D50 D40
DEDIV
DSIN
D20
MOVP
DEMUL
(K30 D10)
(K60 D10)
(D10 D15, D14)
( /180) (D21, D20)
(D15, D14) Degree x /180
(D41, D40) RAD binary floating point
(D41 D40) RAD (D51, D50) SIN ,
Binary
floati ng point
Binary floating point
Binary
floati ng point
binary floating point

Program Example 3:
When M1018= ON, is angle mode. When X0= ON, it designates angle value of (D1, D0). Angle range is:
0angle value360. After converting to SIN value to save in (D11, D10) with binary floating point
number.
M1002
SET M1018
X0
DSIN D0 D10

D 1 D 0
D 11 D 10
Angle value
SIN value
(binary floating point)


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D COS P

Floating point Cosine Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DCOS, DCOSP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Specified RAD value (0S360) D: Area where calculated result is stored
Explanations:
1. Source designated by S can be radian or angle by flag M1018.
2. When M1018= OFF, is set to radian mode. RAD=angle /180.
3. When M1018= ON, is set to angle mode. Angle range: 0angle360.
4. The COS value of an angle data specified by S is calculated and the calculated result is stored in
the register specified by D.
See the figure below for the relation between radian and result:
S: Radian
R: Result
S
-2
3
2
-2 2
3
2 2 2
-
1
-1
0
-
R

5. Flag M1018 radian/angle switch: when M1018= OFF, S is RAD value. When M1018= ON, S is
angle value (0~360).
6. If result of D is 0, the Zero flag M1020=ON.
Program Example 1:
When M1018= OFF, it is radian mode. When X0= ON, specify RAD value (D1, D0). Calculate COS
value of angle and store the result in (D11, D10). The value in (D1, D0) and the result stored in (D11,
D10) are all in binary floating point format.
M1002
RST M1018
X0
DCOS D0 D10

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D1 D0
D11 D10
COS value
binary floating point
binary floating point
RAD value(degree x /180)

Program Example 2:
When M1018= ON, it is angle mode. When X0= ON, it is angle of specific (D1, D0). Angle range: 0
angle360. After converting to COS value, save in (D11, D10) with binary floating point.
M1002
SET M1018
X0
DCOS D0 D10

D 1 D 0
D 11 D 10
Angle value
COS value
binary floating point


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D TAN P

Floating point Tangent Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DTAN, DTANP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Specified RAD value (0S360) D: Area where calculated result is stored
Explanations:
1. Source designated by S can be radian or angle by flag M1018.
2. When M1018= OFF, is radian mode. RAD=angle /180.
3. When M1018= ON, is angle mode. Angle range: 0angle360.
4. The TAN value of an angle data specified by S is calculated and the calculated result is stored in
the register specified by D.
See the figure below for the relation between radian and result:
S: Radian
R: Result
R
S
-2
2
3
2
2
2
-
1
-1
0
3
2
-
-
1

5. Flag M1018 radian/angle switch: when M1018= OFF, S is RAD value. When M1018= ON, S is
angle value (0~360).
6. If result of D is 0, the zero flag M1020=ON.
Program Example 1:
When M1018= OFF, is in radian mode. When X0= ON, specify RAD value (D1, D0). Calculate TAN
value of angle and store the result in (D11, D10). The value in (D1, D0) and the result stored in (D11,
D10) are all in binary floating point format.
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M1002
RST M1018
X0
DTAN D0 D10

D1 D0
D11 D10 TAN value
binary floating point
binary floating point
RAD value(degree x / 180)

Program Example 2:
When M1018= ON, is angle mode. When X0= ON, it is angle of specific (D1, D0). Angle range: 0
angle360. After converting to TAN value, save in (D11, D10) with binary floating point.
M1002
SET M1018
X0
DTAN D0 D10

D 1 D 0
D 11 D 10
Angle value
TAN value
(binary floating point)


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D ASIN P

Float Arc Sine Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DASIN, DASINP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Specified source (binary floating point) D: Area where calculated result is stored
Explanations:
1. ASIN value=SIN
-1

See the figure below for the relation between radian and result:
S: Radian
R: Result
R
S
2
2
-
0 -1,0 1,0

2. If result of D is 0, the zero flag M1020=ON.
Program Example:
When X0= ON, specify binary floating point (D1, D0). Calculate ASIN value and save the result in (D11,
D10). The result stored in (D11, D10) is all in binary floating point format.
DASIN
X0
D0 D10

D1 D0
D11 D10 ASIN value
Binary floating point
binary floating point


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D ACOS P

Float Arc Cosine Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DACOS, DACOSP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Specified source (binary floating point) D: Area where calculated result is stored
Explanations:
1. ACOS value=COS
-1

See the figure below for the relation between radian and result:
S: Radian
R: Result
R
S
2
0
1,0 -1,0

2. If result of D is 0, the zero flag M1020=ON.
Program Example:
When X0= ON, specify binary floating point (D1, D0). Calculate ACOS value and save the result in (D11,
D10). The result stored in (D11, D10) is all in binary floating point format.
X0
D0 D10 DACOS

D1 D0
D11 D10 ACOS value
Binary floating point
binary floating point

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D ATAN P

Float Arc Tangent Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DATAN, DATANP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Specified source (binary floating point) D: Area where calculated result is stored
Explanations:
1. ATAN value=TAN
-1

See the figure below for the relation between radian and result:
S: Radian
R: Result
R
S
2
2
-
0

2. If result of D is 0, the zero flag M1020=ON.
Program Example:
When X0= ON, specify binary floating point (D1, D0). Calculate ATAN value and save the result in (D11,
D10). The result stored in (D11, D10) is all in binary floating point format.
DATAN
X0
D0 D10

D1 D0
D11 D10 ATAN value
Binary floating point
binary floating point


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136

D SINH P

Hyperbolic Sine
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DSINH, DSINHP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source value (binary floating point) D: SINH value
Explanations:
1. See the specifications of each model for their range of use.
2. Flags: M1020 (zero flag); M1021 (borrow flag); M1022 (carry flag)
3. SINH value=(e
s
-e
-s
)/2. The result is stored in D.
Program Example:
1. When X0 = On, obtain the SINH value of binary floating point (D1, D0) and store the binary floating
point result in (D11, D10).
DSINH
X0
D0 D10

D1 D0
D11 D10
SINH value
binary floating point
binary floating point

2. If the absolute value of the result maximum floating point available, the carry flag M1022 = On.
3. If the absolute value of the result minimum floating point available, the borrow flag M1021 =
On.
4. If the result = 0, the zero flag M1020 = On.

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D COSH P

Hyperbolic Cosine
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DCOSH, DCOSHP: 9
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source value (binary floating point) D: COSH value
Explanations:
1. See the specifications of each model for their range of use.
2. Flags: M1020 (zero flag); M1021 (borrow flag); M1022 (carry flag)
3. COSH value=(e
s
+e
-s
)/2. The result is stored in D.
Program Example:
1. When X0 = On, obtain the COSH value of binary floating point (D1, D0) and store the binary floating
point result in (D11, D10).
DCOSH
X0
D0 D10

D1 D0
D11 D10
COSH value
binary floating point
binary floating point

2. If the absolute value of the result maximum floating point available, the carry flag M1022 = On.
3. If the absolute value of the result minimum floating point available, the borrow flag M1021 = On.
4. If the result = 0, the zero flag M1020 = On.

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D TANH P

Hyperbolic Tangent
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D *
DTANH, DTANHP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source value (binary floating point) D: TANH result
Explanations:
1. See the specifications of each model for their range of use.
2. Flags: M1020 (zero flag); M1021 (borrow flag); M1022 (carry flag)
3. TANH value=(e
s
-e
-s
)/(e
s
+e
-s
) . The result is stored in D.
Program Example:
1. When X0 = On, obtain the TANH value of binary floating point (D1, D0) and store the binary floating
point result in (D11, D10).
DTANH
X0
D0 D10

D1 D0
D11 D10
TANH value
binary floating point
binary floating point

2. If the absolute value of the result maximum floating point available, the carry flag M1022 = On.
3. If the absolute value of the result minimum floating point available, the borrow flag M1021 =
On.
4. If the result = 0, the zero flag M1020 = On.

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API Mnemonic Operands Function
143

DELAY P

Delay
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
DELAY, DELAYP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Delay time, unit is 0.1ms (K1~K1000)
Explanations:
After executing DELAY instruction, in every scanning cycle, the program after DELAY command will
delay its execution according to the delay time that the user assigns.
Program Example:
If an external interrupt occurs when X0 goes from OFF to ON, the interrupt subroutine will execute the
DELAY instruction and Y0=ON will delay 2 seconds after X1=ON.
M1000
Main routine program
FEND
I001
X1
Y0
IRET
END
EI
REF Y0 K8
DELAY K20

T=2ms
Interrupt input X0
Input X1
Output Y0

Points to note:
1. User can adjust the delay time according to the actual condition.
2. When executing DELAY instruction, the delay time may increase upon the influence of
communication, high-speed counter and high-speed pulse output commands.
3. If the external output (transistor output or relay output) is specified, the delay time may increase
due to the transistor or relay itself.

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API Mnemonic Operands Function
144

GPWM

General PWM Output
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
D * * *
GPWM: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Pulse output width S
2
: Pulse output cycle (occupies 3 devices) D: Pulse output device
Explanations:
1. S
1
is specified as pulse output width as t:0~32,767ms.
2. S
2
is specified as pulse output cycle as T:1~32,767ms, S
1
S
2
.
3. S
2
+1 and S
2
+2 are for system, please dont use them. D pulse output devices: Y, M and S.
4. When the GPWM instruction has been executed, the pulse output width S
1
and pulse output cycle
S
2
is output through pulse output device D.
5. When S
1
0, there is no pulse output from the pulse output device. When S
1
S
2
, the pulse
output device will be always ON.
6. S
1
and S
2
can be modified when executing GPWM instruction.
Program Example:
When D0=K1000,D2=K2000,then X0= ON, Y20 will output following pulse. When X0= OFF, Y20 output
will also be OFF.
X0
GPWM D0 D2 Y20
t T
t=1000ms
T=2000ms
Output Y20

Points to note:
1. This instruction counts by scan cycle so the maximum offset will be a ELC scan cycle. The value of
S1, S2 and (S2 - S1) should be larger than ELC scan cycle. Otherwise an error will occur for the
GPWM outputs.
2. If using this instruction in subroutine or interruption, GPWM output may not be accurate.
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API Mnemonic Operands Function
145

FTC

Fuzzy Temperature
Control
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S
3
*
D *
FTC: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Target value (SV) S
2
: Present measured value (PV) S
3
: Parameter (occupies continuous 6
devices) D : Output value (MV)
Explanations:
1. Operand S
1
range is 1~5000 to show 0.1C ~500C. The unit is 0.1C. If S
3
+1 (refer to Notes) sets
to K0 to show 0.1C~500C.
2. Operand S
2
range is 1~5000 to show 0.1C ~500C. The unit is 0.1C. If S
3
+1 (refer to Notes) sets
to K0 to show 0.1C~500C.
3. Therefore, when the result that analog converts to digital from temperature sensor, it will convert to
the value during 1~5000 by using the four fundamental operations of arithmetic.
4. S
3
is sampling time setting. If setting is less than K1, instruction wont act. If setting exceeds K200,
it will be regarded as K200.
5. The setting bit0 of S
3
+1 be K0 (means C) and K1 (means F). bit1=0 of S
3
+1 has filter
function,bit1=1 of S
3
+1 has no filter function. The bit2~bit5 of S
3
+1 refer to Notes
6. The display range of D is 0~(sampling time*100). When user uses FTC, it is necessary to use
together with other instruction according to heater type. For example, FTC can be used together
with GPWM to control output pulse. (Sampling time*100) is the output cycle of GPWM and MV is
the output width of GPWM pulse. See Example 1.
7. There is no limit to the number of times the FTC instruction can be used, but devices designated
as S
3
cannot be repeatedly used.
Program Example:
1. Preset parameters before executing FTC instruction.
2. When X0= ON, instruction is executed and save result in D150. When X0= OFF, instruction is not
executed and previous data is unchanged.
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X0
FTC D0 D1 D100 D150

Notes:
1. The setting of S
3
is in the following:
Device Function Usage range Explanation
S
3
:
Sampling time
(T
S
)

1~200
(unit: 100ms)
When T
S
is less than a scan time, PID instruction will
execute for a scan time. When T
S
=0, it wont act.
Therefore, the minimum setting of T
S
should be larger
than program scan time.
When setting exceeds 200, it will be regarded as 200.
b0=0 : C
b0=1 : F
Temperature unit
b1=0:no filter
b1=1:filter
When in no filter function, present value(PV)=present
measure value. If in filter function, present
value(PV)=(present measure value + previous
measure value)/2
b2=1 Slow heat environment
b3=1 General heat environment
b4=1 Rapid heat environment
S
3
+1:
b0:Temperature
unit
b1:filter function
b2~b5:heat
environment
b6~b15 preserved
b5=1 High-speed heat environment
S
3
+2:
~

S
3
+6:
For system uses, please dont use.
2. Control Diagram:
Fuzzy
Controller
Temperature
Sensor
SV
FTC
+
-
e
MV
PV

Points to notes:
It is recommended to set sampling time to twice and above of sampling time of temperature sensor to
get better temperature control.

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Example 1: control diagram
Fuzzy
Controller
PT modular

SV
FTC
+
-
e
MV
PV
Temperature
Sensor
GPWM
instruction
Y0
D22
D10
D11

The output D22(MV) of FTC instruction is used to be the input of GPWM instruction. The function of D22
is the pulse output width and D30 is pulse output cycle. The timing chart of output Y0 is shown as
follows.
D22
D30
Output Y0

The settings of FTC instruction for this example are D10=k1500(target temperature), D12=k60(sampling
time is 6 seconds), D13=k8 (Bit3=1) and D30=k6000 (=D12*100). The ladder diagram of this program is
shown as follows.
M1002
MOV K1500 D10
TO K0 K2 K2 K1
FROM K0 K6 D11 K1
MOV K60 D12
MOV K8 D13
MOV K6000 D30
SET M1
M1
FTC D10 D11 D12 D22
GPWM D22 D30 Y0
M1013
FROM K0 K6 D11 K1
END

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The test environment is oven(The temperature it can heat is 250). The records of target and real
temperature are shown as follows.

Example 2: The heat environment is modified to rapid heat environment (i.e. D13=k16) due to overshoot.
The result after testing is shown as follows.



From above figure, you can find that there is no overshoot but it takes more than one hour and fifteen
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minutes to make the error of target temperature within 1. Therefore, current test environment is
correct but long sampling time delays whole time.
Example 3: To make example 2 reach target temperature faster, set sampling time to 4 seconds (i.e.
D12=k40 and D30=k4000). The result after testing is shown as follows.



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API Mnemonic Operands Function
146

CVM

Valve Control
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
* * *
D * * *
CVM: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Target time of valve (absolute position) S
2
: Time from fully-closed to fully-open of valve
(destination) D: Output device
Explanations:
1. S
1
occupies 3 consecutive registers when in use. S
1
+ 0 are for the user to store the designated
value; S
1
+ 1 (the current position of the valve) and S
1
+ 2 are for storing the parameters recorded in
the instruction and please DO NOT use and alter these two registers.
2. D occupies 2 consecutive output devices when in use. D + 0 is the open contact and D + 1 is the
close contact.
3. The unit of time: 0.1 second. When the scan time of the program exceeds 0.1 second, DO NOT use
this instruction to adjust the position of the valve.
4. Frequency of the output device: 10Hz.
5. When the time of S
1
+ 0 the fully-opened time set in S
2
, D + 0 will keep being On and D + 1
being Off. When the time of S
1
+ 0 0, D + 0 will keep being Off and D + 1 being On.
6. When the instruction is enabled, the instruction will start to control the valve from 0 time position.
Therefore, if the user cannot be sure whether the valve is at 0 before executing the instruction,
please designate S
1
+ 0 as less than 0 and execute the instruction for S
2
(time) before sending in
the correct target control time.
Program Example 1:
1. The control valve
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Y0 Y1
Fully-closed Fully-open

2. Definitions of the control valve:
a) When Y0 and Y1 = Off: No valve action
b) When Y0 = On and Y1 = Off: Valve open
c) When Y0 = Off and Y1 = On: Valve closed
d) When Y0 and Y1 = On: The action is prohibited.
3. Timing diagram and program of the control:
M0
Y0
Y1
D0=k40 D0=k20 D0=k30 D0=k10
4sec
2sec
1sec
2sec
1 2 3 4
5

M0
CVM D0 K50 Y0

4. Control phases:
1) Phase 1: When M0 = On, D0 = K40 refers to the valve shall be open (Y0 = On, Y1 = Off) till
the position of 4 seconds.
2) Phase 2: Change the position of the valve and D0 = K20. Due to that the previous position
was at 4 seconds, the valve shall be closed (Y0 = Off, Y1 = On) for 2 seconds, moving the
valve to the position of 2 seconds.
3) Phase 3: Change the position of the valve and D0 = K30. Due to that the previous position
was at 2 seconds, the valve shall be open (Y0 = On, Y1 = Off) for 1 second, moving the valve
to the position of 3 seconds.
4) Phase 4: Change the position of the valve and D0 = K10. Due to that the previous position
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was at 2 seconds, the valve shall be closed (Y0 = Off, Y1 = On) for 2 seconds, moving the
valve to the position of 1 second.
5) Phase 5: Switch off X0 and no actions at the valve (Y0 = Off, Y1 = Off).
Program Example 2:
1. Timing diagram and program of the control:
Y0
Y1
D0=K40
D0=k10
4sec
2sec
1 2
3
4
M0
T0
5sec
D0=K-1

M0
K50
CVM D0 K50 Y0
D0
T0 TMR
MOV K-1
T0

2. Control phases:
1) Phase 1: When M0 = On, due to that we are not sure about where the valve is, set D0 = K-1
to deliberately close the valve (Y0 = Off, Y1 = On) for 5 seconds and make sure the valve is
at the position of 0 before moving on to the next step.
2) Phase 2: When T0 = On, allow D0 = K40 to start is action. Open the valve (Y0 = On, Y1 =
Off) for 4 seconds, moving the valve to the position of 4 seconds.
3) Phase 3: Change the position of the valve and D0 = K10. Due to that the previous position
was at 4 seconds, the valve shall be closed (Y0 = Off, Y1 = On) for 3 seconds, moving the
valve to the position of 1 second.
4) Phase 4: Switch off M0 and the valve will no longer move (Y0 = Off, Y1 = Off).
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API Mnemonic Operands Function
147

D SWAP P

Swap High/Low Byte
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * *
SWAP, SWAPP: 3 steps
DSWAP, DSWAPP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Device for swapping high/low byte.
Explanations:
1. When being 16-bit instruction, swapping the content of high/low byte.
2. When being 32-bit instruction, swapping the content of high/low byte of two registers separately.
3. This instruction works best using the pulse execution (SWAPP, DSWAPP).
4. If operand D uses with device F, it is only available in 16-bit instruction.
Program Example 1:
When X0=ON, swapping the content of high/low byte of D0.
D0 SWAPP
X0

D0
Hi gh Byte Low Byte

Program Example 2:
When X0=ON, swapping upper 8-bit and lower 8-bit of D11 and swapping upper 8-bit and lower 8-bit of
D10.
D10 DSWAP
X0

D11
Hi gh Byte Low Byte
D 0 1
Hi gh Byte Low Byte


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API Mnemonic Operands Function
148

D MEMR P

File Memory Read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
m * * *
D *
n * * *
MEMR, MEMRP: 7 steps
DMEMR, DMEMRP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
m: Address (Constant) for reading data of file register D: Address (Constant) for storing read data
n: Quantity of one time reading data
Explanations:
1. Range of m: K0 ~ K1,599 (PC/PA/PH); K0 ~ K9,999 (PV)
2. Range of D: D2000 ~ D4999 (PC/PA/PH); D2000 ~ D9999 (PV)
3. Range of n: For 16-bit instruction K1 ~ K1,600 (PC/PA/PH), K1 ~ K8,000 (PV); For 32-bit
instruction K1 ~ K800 (PC/PA/PH), K1 ~ K4,000 (PV)
4. PC/PA/PH offers 1,600 16-bit file registers.
5. PV offers 10,000 16-bit file registers.
6. m and n of PC/PA/PH do not support E and F index register modification.
7. If operands m, D and n are out of range, operand error will occur. M1067, M1068= ON and error
code 0E1A will be recorded in D1067.
8. Flag: M1101, please refer the following Note for detail.
Program Example 1:
1. 16-bit instruction MEMR reads 100 items data from the 10th address of file register and store the
read data in the data register started from D2000.
2. When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not executed
and the content of previous read data has will not be changed.
X0
MEMR K10 D2000 K100

Program Example 2:
1. 32-bit instruction DMEMR reads 100 items data from the 20th address of file register and store the
read data in the data register started from D3000.
2. When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not executed
and the content of previous read data has no change.
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X0
DMEMR K20 D3000 K100

Refer to the note of file registers of API149 MEMW

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API Mnemonic Operands Function
149

D MEMW P

File Memory Write
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S *
m * * *
n * * *
MEMW, MEMWP: 7 steps
DMEMW, DMEMWP: 13
steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Device for storing the written data (starting from the designated D) m: Address in the file register
to be written n: Number of data to be written at a time
Explanations:
1. If operands m, D and n are out of range, operand error will be occurred. M1067, M1068= ON and
error code 0E1A will be recorded in D1067.
2. Flag: M1101, please refer the following Note for detail.
Program Example:
1. Range of S: D2000 ~ D4999 (PC/PA/PH); D2000 ~ D9999 (PV)
2. Range of m: K0 ~ K1,599 (PC/PA/PH); K0 ~ K9,999 (PV)
3. Range of n: For 16-bit instruction K1 ~ K1,600 (PC/PA/PH), K1 ~ K8,000 (PV); For 32-bit
instruction K1 ~ K800 (PC/PA/PH), K1 ~ K4,000 (PV)
4. PC/PA/PH/PV uses this instruction to read the data in data registers and write them into file
registers.
5. PC/PA/PH offers 1,600 16-bit file registers.
6. PV offers 10,000 16-bit file registers.
7. m and n of PC/PA/PH do not support E and F index register modification.
8. When X0= ON, the double word instruction DMEMW is executed. Write 100 items 32-bit data
started from D2001, D2000 into the file register address 0 to 199.
9. When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not executed
and the content of previous read data has no change.
X0
DMEMW D2000 K0 K100

File Register:
1. When ELC startup, PC/PA/PH series ELC will determine M1101 (if startup the function of file
register), D1101 (file register starts to give number, K0~K1,599), D1102 (numbers of file registers
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of being read, K1~K1,600), D1103 (destination device which stores the read data of file register,
specified data register D start to give number, K2,000~K4,999) and decide where to automatically
send the content of file register to the specified data register.
2. When the value of D1101 is less than 0 or more than 1,599, or the value of D1103 is less than
2,000 or more than 4,999, reading data from file register to data register is disabled.
3. When file register read data to data register D, if the address of file register or data register
exceeds the limit range, ELC will stop reading.
4. As for the data read and write in of file register, the ELC program only can use API instruction 148
MEMR to read and use API instruction 149 MEMW to write in.
5. There are 1,600 file registers. The file registers dont have real number, therefore the read/write in
function of file register should be performed by the API instruction 148 MEMR and 149 MEMW, or
using a peripheral equipment HHP and ELCSoft software.
6. Related special relays and registers of file register:
Flag Function Explanation
M1101 If startup the function of file register, Latched, Default is OFF

Special
Register
Function Explanation
D1101 File register starts to give number K0~K1,599, Latched, Default is 0
D1102 Numbers of file registers of being read K1~K1,600, Latched, Default is 0
D1103
Destination device which stores the read data of file register, specified data register
D start to give number K2,000~K4,999, Latched, Default is 2,000

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API Mnemonic Operands Function
150

MODRW MODBUS Read/ Write
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S
3
* * *
S *
n * * *
MODRW: 11 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: External device address (K0~K254) S
2
: Function code ( K3(H3), K6(H6), K16(H10) ) S
3
: Data
address being read from or written to within the external device S: Register of being read/write
n: Length of read/write data.
Explanations:
1. S
1
: Address of external device the ELC will communicate with. The valid range is K0~K254.
2. S
2
: Function code. For example: the instruction to read multiple items from an MVX drive is H03.
3. S
3
: Data address internal to the device that ELC is communicating with. If the address is illegal for
the device, there will be fault code stored in D1130 and at the same time, M1141 = ON. For
example, 8000H is illegal for MVX, M1141 = ON and D1130 = 2. Please refer to MVX user manual
for the details on fault codes.
4. S: Memory area in ELC where data to be transmitted and received data is stored.
5. n: Read/Write data length (DATA LENGTH). For PB/PC/PA/PH series, if M1143=ON (RTU Mode),
n=K1~K16; when M1143=OFF (ASCII Mode), n=K1~K8. For PV series, n=K1~K16.
6. Flags: M1120~M1131, M1140~M1143, please refer to the RS (API 80) instruction for more
information.
Program Example 1:
1. Function code K3(H3) : read multiple data items
ELC connects to MVX drive. (ASCII Mode, when M1143=OFF)
ELC connects to MVX drive. (RTU Mode, when M1143=ON)
2. Received data is stored in 16 continuous registers that start from D0 with ASCII format when in
ASCII mode. ELC will convert the content to Hexadecimal and store in registers D1296~D1311
automatically. M1131=ON when ELC starts converting to hexadecimal and M1131 = OFF after
conversion complete.
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3. Use MOV, DMOV or BMOV instructions to move hexadecimal data from D1296~D1311 and store
in general use registers.
4. While in RTU mode, received data is stored in 8 continuous registers that start from D0. At the
same time, using D1296~D1311 is invalid.
5. In ASCII or RTU mode, data to be transmitted by ELC is stored in D1256~D1295. Use MOV,
DMOV or BMOV instructions. Other instructions are invalid to address this area.
6. After receiving data, ELC will automatically check if the received data is correct. If there is any fault,
M1140 = ON and the fault code will be stored in D1130.
7. After M1140=ON or M1141=ON, ELC will re-transmit data to a MVX drive. If received data is
correct, M1140 and M1141 will be reset.
H87 MOV
M1002
D1120
SET M1120
K100 MOV D1129
RST M1127
M1143
X1
Setting communication protocol 9600, 8, E, 1
Communication protocol latched
Setting communication timeout 100ms
MODRW K3 K1
X0
H0708 D0 K6
Connection device
address K1
Function code K3
read many items data
Data address H0708
Data stored register
Read/write data length(word)
Handling received data
ASCII mode : received data is stored in 16 consecutive registers that start from D0 with ASCII format
when in ASCII mode. ELC will convert the content to hexadecimal and store in registers
D1296~D1311 automatically
RTU mode : received data is stored in 8 consecutive registers that start from D0 and specified by
users in hexadecimal type in RTU mode
Receiving data completed and reset flag
RTU mode setting
M1127
SET
X0
M1122 Setting sending request

8. ASCII Mode: ELC connects to MVX drive.
ELC MVX, ELC transmits: 01 03 0708 0006 E7
MVX ELC, ELC receives: 01 03 OC 0100 1766 0000 0000 0136 0000 3B
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ELC transmits data register (transmit message)
Register Data Descriptions
D1256 Low byte 0 30 H ADR 1
D1256 High byte 1 31 H ADR 0
ADR (1,0) is MVX drive address
D1257 Low byte 0 30 H CMD 1
D1257 High byte 3 33 H CMD 0
CMD (1,0) is instruction code
D1258 Low byte 0 30 H
D1258 High byte 7 37 H
D1259 Low byte 0 30 H
D1259 High byte 8 38 H
Data Address
D1260 Low byte 0 30 H
D1260 High byte 0 30 H
D1261 Low byte 0 30 H
D1261 High byte 6 36 H
Number of data (count by word)
D1262 Low byte E 45 H LRC CHK 1
D1262 High byte 7 37 H LRC CHK 0
LRC CHK (0,1) error check
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ELC receives data register (response message)
Register Data Descriptions
D0 low byte 0 30 H ADR 1
D0 high byte 1 31 H ADR 0
D1 low byte 0 30 H CMD 1
D1 high byte 3 33 H CMD 0
D2 low byte 0 30 H
D2 high byte C 43 H
Number of data (count by byte)
D3 low byte 0 30 H
D3 high byte 1 31 H
D4 low byte 0 30 H
D4 high byte 0 30 H
Content of
address 0708 H
ELC automatically converts
ASCII codes to hex and store
the converted value in D1296
= 0100 H
D5 low byte 1 31 H
D5 high byte 7 37 H
D6 low byte 6 36 H
D6 high byte 6 36 H
Content of
address 0709 H
ELC automatically converts
ASCII codes to hex and store
the converted value in D1297
= 1766 H
D7 low byte 0 30 H
D7 high byte 0 30 H
D8 low byte 0 30 H
D8 high byte 0 30 H
Content of
address 070A H
ELC automatically converts
ASCII codes to hex and store
the converted value in D1298
= 0000 H
D9 low byte 0 30 H
D9 high byte 0 30 H
D10 low byte 0 30 H
D10 high byte 0 30 H
Content of
address 070B H
ELC automatically converts
ASCII codes to hex and store
the converted value in D1299
= 0000 H
D11 low byte 0 30 H
D11 high byte 1 31 H
D12 low byte 3 33 H
D12 high byte 6 36 H
Content of
address 070C H
ELC automatically converts
ASCII codes to hex and store
the converted value in D1300
= 0136 H
D13 low byte 0 30 H
D13 high byte 0 30 H
D14 low byte 0 30 H
D14 high byte 0 30 H
Content of
address 070D H
ELC automatically converts
ASCII codes to hex and store
the converted value in D1301
= 0000 H
D15 low byte 3 33 H LRC CHK 1
D15 high byte B 42 H LRC CHK 0

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9. RTU Mode: ELC connects to MVX drive
ELC MVX, ELC transmits: 01 03 0708 0006 45 7E
MVX ELC, ELC receives: 01 03 0C 0000 0503 0BB8 0BB8 0000 012D 8E C5
ELC transmits data register (transmit message)
Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 03 H Function
D1258 Low byte 07 H
D1259 Low byte 08 H
Data Address
D1260 Low byte 00 H
D1261 Low byte 06 H
Number of data (count by word)
D1262 Low byte 45 H CRC CHK Low
D1263 Low byte 7E H CRC CHK High
ELC receives data register (response message)
Register Data Descriptions
D0 low byte 01 H Address
D1 low byte 03 H Function
D2 low byte 0C H Number of data (count by byte)
D3 low byte 00 H
D4 low byte 00 H
Content of
address 0708 H
ELC automatically store the
value in D1296 = 0000 H
D5 low byte 05 H
D6 low byte 03 H
Content of
address 0709 H
ELC automatically store the
value in D1297 = 0503 H
D7 low byte 0B H
D8 low byte B8 H
Content of
address 070A H
ELC automatically store the
value in D1298 = 0BB8 H
D9 low byte 0B H
D10 low byte B8 H
Content of
address 070B H
ELC automatically store the
value in D1299 = 0BB8 H
D11 low byte 00 H
D12 low byte 00 H
Content of
address 070C H
ELC automatically store the
value in D1300 = 0000 H
D13 low byte 01 H
D14 low byte 2D H
Content of
address 070D H
ELC automatically store the
value in D1301 = 012D H
D15 low byte 8E H CRC CHK Low
D16 low byte C5 H CRC CHK High
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Program Example 2:
1. Function code K6(H6) : write one WORD data into register
ELC connects to MVX drive. (ASCII Mode when M1143=OFF)
ELC connects to MVX drive. (RTU Mode when M1143=ON)
2. When in ASCII mode, store the data that will be written to MVX drive in ASCII format in register
D50. Data received from MVX drive will be stored in registers D1070~D1076.
3. When in RTU mode, store data that will be written to MVX drive in hexadecimal format in register
D50. Data received from MVX drive will be stored in registers D1070~D1077.
4. When in ASCII or RTU mode, ELC will transmit the data stored in registers D1256~D1295.
5. After receiving a response, ELC automatically checks if the received data is correct. If there is any
fault, M1140 will be set to ON.
6. If the register address of the MVX drive is illegal, a fault code will be stored in D1130 and M1141 =
ON. For example, 8000H is illegal for MVX and M1141=ON and D1130=2. Refer to MVX user
manual to fault code.
7. After M1140=ON or M1141=ON, ELC will re-transmit the same data to the MVX drive. If the
received data is correct, M1140 and M1141 will be reset.
H87 MOV
M1002
D1120
SET M1120
K100 MOV D1129
RST M1127
M1143
X1
Setting communication protocol 9600, 8, E, 1
Communication protocol latched
Setting communication timeout 100ms
MODRW K6 K1
X0
H0706 D50 K1
Connection device
address K1
Function code K6
write one data in
Data address H0706
Data stored register
Read/write data length(word)
Handling received data
ASCII mode : received data in ASCII format stored in special registers D1070~D1076
RTU mode : received data in hexadecimal format stored in special registers D1070~D1077
Receiving data completed and reset flag
RTU mode setting
M1127
SET
X0
M1122 Setting sending request

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8. ASCII Mode: ELC connects to MVX drive.
ELC MVX, ELC transmits: 01 06 0706 1770 65
MVX ELC, ELC receives: 01 06 0706 1770 65
ELC transmits data register (transmit message)
Register Data Descriptions
D1256 Low byte 0 30 H ADR 1
D1256 High byte 1 31 H ADR 0
ADR (1,0) is MVX drive address
D1257 Low byte 0 30 H CMD 1
D1257 High byte 6 36 H CMD 0
CMD (1,0) is function code
D1258 Low byte 0 30 H
D1258 High byte 7 37 H
D1259 Low byte 0 30 H
D1259 High byte 6 36 H
Data Address
D1260 Low byte 1 31 H
D1260 High byte 7 37 H
D1261 Low byte 7 37 H
D1261 High byte 0 30 H
Data
contents
The content of register D50
(H1770=K6000)
D1262 Low byte 6 36 H LRC CHK 1
D1262 High byte 5 35 H LRC CHK 0
LRC CHK (0,1) is error check
ELC receives data register (response message)
Register Data Descriptions
D1070 Low byte 0 30 H ADR 1
D1070 High byte 1 31 H ADR 0
D1071 Low byte 0 30 H CMD 1
D1071 High byte 6 36 H CMD 0
D1072 Low byte 0 30 H
D1072 High byte 7 37 H
D1073 Low byte 0 30 H
D1073 High byte 6 36 H
Data Address
D1074 Low byte 1 31 H
D1074 High byte 7 37 H
D1075 Low byte 7 37 H
D1075 High byte 0 30 H
Data content
D1076 Low byte 6 36 H LRC CHK 1
D1076 High byte 5 35 H LRC CHK 0
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9. RTU Mode: ELC connects to MVX drive
ELC MVX, ELC transmits: 01 06 0706 1770 66 AB
MVX ELC, ELC receives: 01 06 0706 1770 66 AB
ELC transmits data register (transmit message)
Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 06 H Function
D1258 Low byte 07 H
D1259 Low byte 06 H
Data Address
D1260 Low byte 17 H
D1261 Low byte 70 H
Data
content
The content of register D50
(H1770=K6000)
D1262 Low byte 66 H CRC CHK Low
D1263 Low byte AB H CRC CHK High
ELC receives data register (response message)
Register Data Descriptions
D1070 Low byte 01 H Address
D1071 Low byte 06 H Function
D1072 Low byte 07 H
D1073 Low byte 06 H
Data Address
D1074 Low byte 17 H
D1075 Low byte 70 H
Data content
D1076 Low byte 66 H CRC CHK Low
D1077 Low byte AB H CRC CHK High
Program Example 3:
1. Function code K16(H10) : write multiple WORD items of data into register
ELC connects to MVX drive. (ASCII Mode when M1143=OFF)
ELC connects to MVX drive. (RTU Mode when M1143=ON)
2. In ASCII mode, store the data that will be written to the MVX drive in ASCII format in 8 continuous
specified registers starting from D50. Received data from the MVX drive will be stored in registers
D1070~D1076.
3. When in RTU mode, users store the data that will be written to MVX drive in hexadecimal format in
8 continuous specified register started from D50. Received data from MVX drive will be stored in
registers D1070~D1077.
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4. In ASCII or RTU mode, ELC will transmit data store in registers D1256~D1295. Preload these
registers using MOV, DMOV or BMOV instructions. Other instructions are invalid to write to this
area.
5. After receiving a response, ELC automatically checks if the received data is correct. If there is any
fault, M1140 = ON.
6. If the register address of the MVX drive is illegal, a fault code will be stored in D1130 and M1141 =
ON. For example, 8000H is illegal for MVX and M1141=ON and D1130=2. Refer to MVX user
manual to fault code.
7. After M1140=ON or M1141=ON, ELC will re-transmit the same data to the MVX drive. If the
received data is correct, M1140 and M1141 will be reset.
H87 MOV
M1002
D1120
SET M1120
K100 MOV D1129
RST M1127
M1143
X1
Setting communication protocol 9600, 8, E, 1
Communication protocol latched
Setting communication timeout 100ms
MODRW K16 K1
X0
H0705 D50 K2
Connection device
address K1
Function code K16
write multiple data in
Data address H0705
Data stored register
Read/write data length(word)
Handling received data
ASCII mode : received data in ASCII format stored in special registers D1070~D1076
RTU mode : received data in hexadecimal format stored in special registers D1070~D1077
Receiving data completed and reset flag
RTU mode setting
M1127
SET
X0
M1122 Setting sending request

8. ASCII Mode: ELC connects to MVX drive.
ELC MVX, ELC transmits: 01 10 0705 0002 04 1770 0012 44
MVX ELC, ELC receives: 01 10 0705 0002 E1
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ELC transmits data register (transmits messages)
Register Data Descriptions
D1256 Low byte 0 30 H ADR 1
D1256 High byte 1 31 H ADR 0
ADR (1,0) is MVX drive address
D1257 Low byte 1 31 H CMD 1
D1257 High byte 0 30 H CMD 0
CMD (1,0) is instruction code
D1258 Low byte 0 30 H
D1258 High byte 7 37 H
D1259 Low byte 0 30 H
D1259 High byte 5 35 H
Data Address
D1260 Low byte 0 30 H
D1260 High byte 0 30 H
D1261 Low byte 0 30 H
D1261 High byte 2 32 H
Number of Register
D1262 Low byte 0 30 H
D1262 High byte 4 34 H
Byte Count
D1263 Low byte 1 31 H
D1263 High byte 7 37 H
D1264 Low byte 7 37 H
D1264 High byte 0 30 H
Data contents 1
The content of register D50
(H1770=K6000)
D1265 Low byte 0 30 H
D1265 High byte 0 30 H
D1266 Low byte 1 31 H
D1266 High byte 2 32 H
Data contents 2
The content of register D51
(H12)
D1267 Low byte 4 34 H LRC CHK 1
D1267 High byte 4 34 H LRC CHK 0
LRC CHK (0,1) is error check
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ELC receives data register (response messages)
Register Data Descriptions
D1070 Low byte 0 30 H ADR 1
D1070 High byte 1 31 H ADR 0
D1071 Low byte 1 31 H CMD 1
D1071 High byte 0 30 H CMD 0
D1072 Low byte 0 30 H
D1072 High byte 7 37 H
D1073 Low byte 0 30 H
D1073 High byte 5 35 H
Data Address
D1074 Low byte 0 30 H
D1074 High byte 0 30 H
D1075 Low byte 0 30 H
D1075 High byte 2 32 H
Number of Register
D1076 Low byte E 45 H LRC CHK 1
D1076 High byte 1 31 H LRC CHK 0
9. RTU Mode: ELC connects to MVX drives
ELC MVX, ELC transmits: 01 10 0705 0002 04 1770 0012 91 C2
MVX ELC, ELC receives: 01 10 0705 0002 50 BD
ELC transmits data register (transmits messages)
Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 10 H Function
D1258 Low byte 07 H
D1259 Low byte 05 H
Data Address
D1260 Low byte 00 H
D1261 Low byte 02 H
Number of Register
D1262 Low byte 04 H Byte Count
D1263 Low byte 17 H
D1264 Low byte 70 H
Data
content 1
The content of register D50
(H1770=K6000)
D1265 Low byte 00 H
D1266 Low byte 12 H
Data
content 2
The content of register D51
(H12)
D1262 Low byte 91 H CRC CHK Low
D1263 Low byte C2 H CRC CHK High
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ELC receives data register (response messages)
Register Data Descriptions
D1070 Low byte 01 H Address
D1071 Low byte 10 H Function
D1072 Low byte 07 H
D1073 Low byte 05 H
Data Address
D1074 Low byte 00 H
D1075 Low byte 02 H
Number of Register
D1076 Low byte 50 H CRC CHK Low
D1077 Low byte BD H CRC CHK High
Notes:
1. The contact before MODRD, MODRW, cannot use rising-edge or falling-edge contacts. Otherwise,
the data stored in the received register will be incorrect.
2. Related flags and special registers for MODRW instruction: Refer to the RS instruction for more
information.
Special M Function Description
M1120
Latch communication settings. Any change to D1120 will not be valid after this
is set.
M1121 When it is OFF, RS-485 of ELC is transmitting data.
M1122 Transmit request
M1123 Receive completed
M1124 Receiving message in process
M1125 Receive status disable
M1126 STX/ETX system definition selection
M1127 MODRD / MODWR / MODRW instructions data receive completed
M1128 Transmitting/receiving indication
M1129 Receive time out
M1130 Users/system definition STX/ETX
M1131 MODRD / MODRW data convert to HEX, M1131=ON
M1140 MODRD / MODWR / MODRW data receive error
M1141 MODRD / MODWR / MODRW instruction parameter error
M1142 MVX instruction data receive error
M1143 ASCII/RTU mode selection (OFF = ASCII, ON = RTU)

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Special D Function Description
D1070~D1085 Return response messages are saved in D1070~D1085.
D1120 RS-485 communication protocol, baud, stop bits, etc.
D1121 ELC communication address. (Latched)
D1122 Remaining characters to transmit
D1123 Remaining characters to receive
D1124 Start text definitionSTX
D1125 Definition of the first end characterETX1
D1126 Definition of the second end characterETX2
D1129 Communication time out. Time unit:ms
D1130 Return fault code record of MODBUS
D1256~D1295 Transmit data will be saved in D1256~D1295.
D1296~D1311
If in ASCII mode, ELC automatically converts ASCII data saved in the
register specified by users to hexadecimal format.

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API Mnemonic Operands Function
151

PWD

Detection of Input Pulse Width
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

*
D

*
PWD: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source device D: Destination device for storing the detected result
Explanations:
1. Range of S: X10 ~ X17
2. Range of D: D0 ~ D999, occupying 2 consecutive devices. Can only be used once in the
program.
3. PWD instruction is for detecting the time span of output signals from X10 ~ X17; the valid
frequency range is 1 ~1KHz. When M1169 = On, the instruction will detect the time span of the
continuous rising edge and falling edge of the input signals (time unit: 100us). When M1169 = On,
the instruction will detect the time span of 2 continuous rising edges of the input signals (time unit:
1us). It cannot designate the same X10 ~ X17 as does DCNT and ZRN instructions.
4. D occupies two continuous devices. The longest detectable time is 21,474.83647 seconds, about
357.9139 minutes or 5.9652 hours.
5. Multiple PWD instructions may be used. However, only one instruction can be executed at the
same time in a program..
Program Example:
When X0 = On, record the time span of X10 = On and store it in D1 and D0.
X0
PWD X10 D0

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API Mnemonic Operands Function
152

RTMU

Start of the Measurement of
Execution Time of I Interruption
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D * * *
n

* * *
RTMU: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Device for storing the measuring time (unit: 1us) n: Measurement time base. Parameter range:
K10 ~ K500 (time unit: 1us)
Explanations:
1. Range of D: K0 ~ K9
2. Range of n: K10 ~ K500
3. The designated special D registers (D1156 ~ D1165) can measure up to 10 interruption
subroutines. For example, when D = K5, the designated D register will be D1161.
4. When RTMU is executed, if the D and n entered by the user are legal, interruption of the timer will
be enabled and the counting starts and the special D designated by D is cleared as 0. When
RTMD is executed, interruption of the timer is disabled and the calculated time will be assigned to
special D designated by RTMD.
5. With API 153 RTMD, RTMU can measure the execution time of I interruption service subroutine,
which can be reference for dealing with the high-speed response when the user is at the initial
stage of developing the program.
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API Mnemonic Operands Function
153

RTMD

End of the Measurement of the
Execution Time of I Interruption r
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D

* * *
RTMD: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Device to store the measuring time (unit: 1us).
Explanations:
1. Range of D: K0 ~ K9. The No. of D has to be the same as that designated by D in API 152 RTMU;
otherwise the result of the measurement may be unexpectable.
Program Example:
When X0 goes from Off to On, the program will enter I001 interruption subroutine. RTMU will activate
an 8-bit timer (unit: 10us) and RTMD (when D = K0) will shut down the timer and store the time in the
timer in special D registers (D1156 ~ D1165, designated by K0 ~ K9).
FEND
M1000
RTMU K0 K10
RTMD K0
IRET
I 001
M1000
M1000
RTMU K1 K10
RTMD K1
IRET
I 101
M1000
END
Both K0 should be the same
Both K1 should be the same

Remarks:
1. We suggest you remove this instruction after you finish developing your ELC program.
2. Due to the lower priority of the interruption enabled by RTMU, when RTMU is enabled, other
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high-speed pulse input counting or high-speed pulse output may result in failure to trigger the
timer.
3. If you activate RTMU but do not activate RTMD before the end of the interruption, the interruption
will not be shut down.
4. RTMU instruction activates 1 timer interruption in ELC. Therefore, if many RTMU or RTMD are
executed at the same time, confusion in the timer may occur. Please be aware of the situation.
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API Mnemonic Operands Function
154

RAND P

Random Number
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D

* * * * * * * *
RAND, RANDP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: lower limit for producing the random number S
2
: upper limit for producing the random number
D: Random number result
Explanations:
1. The range of operands S
1
, S
2
is: K0 S
1
, S
2
K32,767, S
1
operand S
2
operand.
2. If S
1
> S
2
, ELC will produce an operand error and will execute the instruction, M1067 and
M1068=ON, and error code 0E1A(HEX) will be recorded in D1067.
Program Example:
When X0=ON, the random number produced between lower limit D0 and upper limit D10 will be saved
in D20.
X0
RAND D0 D10 D20


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API Mnemonic Operands Function
155

D ABSR

Absolute position read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * *
D
1
* * *
D
2
* * * * * * *
DABSR: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Input signal from Servo (occupies 3 continuous devices) D
1
: Control signal for controlling Servo
(occupies 3 continuous devices) D
2
: Absolute position data (32-bit) read from Servo
Explanations:
1. This command provides continuous absolute position data read function of Mitsubishi servo drive
MR-J2 (with absolute position check function).
2. There is no 16-bit command for API 155, only 32-bit command, DABSR is available and it can only
be used for ONCE in program.
3. Flag: For the description of M1010, M1029, M1102, M1103, M1334, M1335, M1336, M1337,
M1346, please refer to the Notes.
4. S is the input signal from Servo and it will use 3 continuous devices S, S +1, S +2. Device S and S
+1 are connected to the ABS (bit0, bit1) of Servo for data transmitting. Device S +2 is connected to
Servo for transmitting data ready flag.
5. D
1
is the control signal for controlling Servo and it will use 3 continuous devices D
1
, D
1
+1, D
1
+2.
Device D
1
is connected to Servo ON (SON) of Servo, device D
1
+1 is connected to ABS data
transmitting mode of Servo and D
1
+2 is connected to ABS data request signal.
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ELC-PC12NNDT
ABS(bit 0)
ABS(bit 1)
SERVO ON
SERVO AMP
MR-J2-A
CN1B
D01 4
19
10
6
ZSP
TLC
SG
5
8
9
SON
ABSM
ABSR
X0
X1
X2
24G
S/S
+24V
Y0
Y1
Y2
C
VDD 3
Transmission data is ready
ABS requirement
ABS transmission mode
\
6. D
2
is the absolute position data (32 bit) read from Servo and it will use 2 continuous devices D
2
,
D
2
+1. D
2
is low word and D
2
+1 is high word. The absolute position data should be stored in the
current value registers (D1348, D1349) corresponding to CH0 pulse or the current value registers
(D1350, D1351) corresponding to CH1 pulse, so it is recommended to specify these two registers.
If specify other devices, finally, the user still has to transmit the data into the current value registers
(D1348, D1349) corresponding to CH0 pulse or the current value registers (D1350, D1351)
corresponding to CH1 pulse.
7. When DABSR command drive contact turns ON and read starts, the command execution
completed flag M1029 will be ON. The flags must be reset by user.
8. When driving the DABSR command, please specify normally open contact. If the drive contact of
DABSR command turns OFF when DABSR command read starts, the execution of absolute
current value read will be interrupted and result in incorrect data. Please be careful and notice that.
9. If the drive contact of DABSR command turns OFF after the read is completed, the Servo ON
(SON) signal connected to D
1
will also turn OFF and the operation will be disabled.
Program Example:
1. When X7= ON, the absolute position data (32 bit) read from Servo should be stored in the current
value register (D1348, D1349) corresponding to CH0 pulse. At the same time, drive a timer T0 to
count 5 seconds. If over 5 seconds and the absolute position data (32 bit) read not complete, it will
drive M10=ON and this means the absolute position data (32 bit) read is abnormal.
2. When connecting to system, please set the power of ELC PV series and SERVO AMP to be ON at
the same time or set the SERVO AMP to be ON earlier than the power of ELC.
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X7
DABSR X0 Y4 D1348
TMR T0 K50
M11
M10
T0
SET M11
M1029
ABS read completed
Execution completed flag
Read overtime
ABS absolute position
data read is abnormal
ABS absolute position
data read completed

Points to notes:
1. Time chart explanation of DABSR command absolute position data read:
SON
ABSM
TLC
ABSR
ZSP
D01
AMP output
SERVO ON
ABS(bit 1)
ABS(bit 0)
ABS data
request
Transmitting
data ready
ABS data
mode transmitting
Current value posi tion data 32-bi t
+(plus) check data 6-bit
Controller output
AMP output
AMP output

2. When DABSR command starts to execute, it will drive the signal of Servo ON (SON) and ABS data
transmitting mode to output.
3. By the transmitting data ready flag and ABS request signal can confirm the transmission and
receipt of both sides and process the data transmission of current value position data (32 bit) plus
check data (6 bit).
4. Data is transmitted by ABS (bit0, bit1) two bits.
5. This command is applicable to the Servo motor equipped with absolute position detect function is
connected, such as Mitsubishi MR-J2-A Servo drive.
6. Please use one of the following methods to proceed the first time zero point return:
z Complete zero point return by using reset signal function to execute API 156 ZRN command.
z After using JOG or manual operation to adjust the zero point position of the equipment, input
reset signal SERVO AMP. As for the reset signal input, please refer to the external switches
diagram below to see if using ELC controller to output. For the detail of the wiring between
ELC and Mitsubishi MR-J2-A, please refer to the API 159 DRVA.
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CR 8
SG 10
Reset
Use Mitsubishi MR-J2-A
as example

Flags and Special Data registers descriptions:
1. M1010: (For PV series) M1010=ON after the first group (Y0, Y1) and the second groups (Y2, Y3)
pulse output complete. M1010=OFF, after the output starts.
2. M1029: (For PV series) M1029=ON after relative command complete execution.
3. M1030: (For PV series) M1030=ON after the second group (Y2, Y3) pulse output complete.
4. M1102: (For PH series) M1102=ON after the first group pulse (Y10) pulse output complete or
other relative command complete execution.
5. M1103: (For PH series) M1103=ON after the second group pulse (Y11) pulse output complete.
6. M1258: (For PV series) M1258=ON after the first group (Y0, Y1) output reverse pulses.
7. M1259: (For PV series) M1259=ON after the second group (Y2, Y3) output reverse pulses.
8. M1305: (For PV series) PLSV, DPLSV, DRVI, DDRVI, DRVA, DDRVA instructions for the first
group (Y1, Y2) reverse running.
9. M1306: (For PV series) PLSV, DPLSV, DRVI, DDRVI, DRVA, DDRVA instructions for the second
group (Y2, Y3) reverse running.
10. M1334: (For PV series) M1334=ON after the first group (Y0, Y1) pulse output stop.
(For PH series) M1334=ON after DDRVI and DDRVA execution criteria stop and the first
group pulse output stop immediately without deceleration.
11. M1335: (For PV series) M1335=ON after the second group (Y2, Y3) pulse output stop.
(For PH series) M1335=ON after DDRVI and DDRVA execution criteria stop and the
second group pulse output stop immediately without deceleration.
12. M1520: (For PV series) M1520=ON after CH2 (Y4, Y5) pulse output stop.
13. M1521: (For PV series) M1521=ON after CH3 (Y6, Y7) pulse output stop.
14. M1336: (For PV series) the first group (Y0, Y1) pulse output indication flag
15. M1337: (For PV series) the second group (Y2, Y3) pulse output indication flag
16. M1346: (For PV series) ZRN instruction for enabling CLEAR output signal flag.
17. D1337, D1336: (For PV series) Registers for the first group (Y0, Y1) output pulse present value of
position control instructions (API 156 ZRN, API 157 PLSV, API 158 DRVI, API 159 DRVA). The
present value increases or decreases according to the corresponding rotation direction. D1337 is
for high word; D1336 is for low word. D1337 is for high word; D1336 is for low word.
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(For PV series) Registers for storing the current number of output pulses of the first group (Y0, Y1)
output of pulse output instructions (API 57 PLSY, API 59 PLSR). D1337 is for high word; D1336 is
for low word.
18. D1338, D1339: (For PV series) Registers for the second group (Y2, Y3) output pulse present
value of position control instructions (API 156 ZRN, API 157 PLSV, API 158 DRVI, API 159 DRVA).
The present value increases or decreases according to the corresponding rotation direction.
D1339 is for high word; D1338 is for low word.
(For PV series) Registers for storing the current number of output pulses of the second group (Y2,
Y3) output of pulse output instructions (API 57 PLSY, API 59 PLSR). D1339 is for high word;
D1338 is for low word.
19. D1340 (D1352): For setting up the frequencies of the first acceleration segment and the last
deceleration segment when the position control instructions (API 156 ZRN, API 158 DRVI, API
159 DRVA) are executing CH0 (CH1) outputs.
Range of setting:
For PV series, the speed has to be higher than 10Hz. Frequency lower than 10Hz or higher than
maximum output frequency will be regarded as 10Hz. The default setting in PV series is 200Hz.
For PH series, the speed has to be 100 ~ 100KHz. Frequency lower than 100Hz will be regarded
as 100Hz and frequency higher than 100KHz will be regarded as 100KHz. The default setting in
PH series is 100Hz.
Note: During the control of the stepping motor, please consider the resonance and the limitation
on the start frequency when you set up the speed.
20. D1341, D1342: (For PV series) For setting up the maximum speed when the position control
instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA) are being executed. D1342 is for high
word; D1341 is for low word.
Range of setting: 200KHz fixed.
21. D1343 (D1353): For setting up the time of the first acceleration segment and the last deceleration
segment when the position control instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA) are
executing CH0 (CH1) outputs.
Range of setting:
For PV series, the acceleration/deceleration time has to be longer than 10ms. The time shorter
than 10ms or longer than 10,000ms will be output by 10ms. The default setting in PV series is
100ms. For PH series, the time has to be 50 ~ 20,000ms. The time shorter than 50ms will be
regarded as 50ms.
Note: During the control of the stepping motor, please consider the resonance and the limitation
on the start frequency when you set up the speed.
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22. D1348, D1349: (For PH series) Registers for the first group (Y0, Y1) output pulse present value of
position control instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA). The present value
increases or decreases according to the corresponding rotation direction. D1349 is for high word;
D1348 is for low word.
23. D1350, D1351: (For PH series) Registers for the second group (Y11) output pulse present value of
position control instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA). The present value
increases or decreases according to the corresponding rotation direction. D1351 is for high word;
D1350 is for low word.
24. D1348, D1349: (For PH series) Registers for the first group (Y0, Y1) output pulse present value of
position control instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA). The present value
increases or decreases according to the corresponding rotation direction. D1349 is for high word;
D1348 is for low word.
25. D1350, D1351: (For PH series) Registers for the second group (Y11) output pulse present value of
position control instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA). The present value
increases or decreases according to the corresponding rotation direction. D1351 is for high word;
D1350 is for low word.
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API Mnemonic Operands Function
156

D ZRN

Zero Return
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * *
S
2
* * * * * * * * * *
S
3
*
D *
DZRN: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Zero return speed S
2
: Creep speed S
3
: Near point signal (DOG) D: Pulse output device
Explanations:
1. S
1
is specified as the zero point return speed. For PV series, the setting range of 16-bit is from 10
~ 32,767Hz and the setting range of 32-bit is from 10 ~ 200,000Hz. When designated speed is
greater(less) than max(min) setting range, max(min) setting range shall prevail. For PH series, the
setting range of 32-bit is from 100 to 100,000Hz. When designated speed is greater(less) than
max(min) setting range, max(min) setting range shall prevail.
2. S
2
is specified as the creep speed(start and end frequency), the lower speed after near point
signal (DOG) turns ON. For PV series, the setting range is from 10 ~ 32,767Hz. For PH series, the
setting range is from 100 to 100,000Hz.
3. S
3
is specified as the near point signal (DOG) input (A contact input). In PV series, if devices other
than the external output device (X10 ~ X17), e.g. X, Y, M, S are designated, they will be affected
by the scan period, resulting in dispersion of the zero point. In addition, please note that they
cannot designate the same input points X10 ~ X17 as those designated by DCNT and PWD
instructions. PH series can only designate X10 and X11 and cannot designate the same input
points as those designated by DCNT instruction.
4. PV series has four groups of A/B phase pulse output, CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 (Y4, Y5)
and CH3 (Y6, Y7).
5. Pulse output device D only can be specified as Y10, Y11.
6. D1343 (D1353) is the accel/decel time setting of Y10 (Y11) and its available range is 50 to
20000ms.
7. When executing API 158 DRVI and API 159 DRVA instruction, the ELC stores the current pulse
value during operation in the registers so that it can always know the machine position. For PV
series, Y0: D1337, D1336; Y2: D1339, D1338, Y4: D1376, D1375; Y6: D1378, D1377. For PH
series, Y10: D1348, D1349; Y11: D1350, D1351. In this way, you can keep track of the position of
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the machine at any time. However, the data may be lost when the power of ELC is OFF. Therefore,
the machine should execute zero point turn during initial operation to input the zero point data.
8. Flag: For the description of M1010, M1029, M1102, M1103, M1334, M1335, M1336, M1337,
M1346, please refer to the instruction ABSR (API 155).
9. Zero return output device in different models
Model PH PV
Zero return output Y10, Y11 Y0, Y2, Y4, Y6
Program Example:
When M10=ON, a frequency of 20KHz outputs from Y10 to make motor execute the action of zero point
return. When it reaches the near point signal (DOG), X10=ON and it will change to creep speed. Then, a
frequency of 1KHz outputs from Y10 and the instruction will be energized. The pulse output will stop
until X10=OFF.
M10
ZRN K20000 K1000 X10 Y10

The Timing Chart of the reset signal
1. Timing chart of the reset signal output for PV series. (PH series does not support this function.)
a) When the reset signal flag M1346 = On, after zero return is completed, the ELC can send the
reset signal to the servo drive and the signal will last for approximately 20ms. After 20ms, the
reset signal will return to Off again.
b) Output devices for reset signals of PV series:
CH0 (Y0, Y1) reset output device (Y10)
CH1 (Y2, Y3) reset output device (Y11)
CH2 (Y4, Y5) reset output device (Y12)
CH3 (Y6, Y7) reset output device (Y13)
Off
On
On
Off
DOG ON
Zero return speed
Scan in circle
Creep speed
Reset signal
Output near point signal (DOG)
Reset signal Y4 or Y5
M1336, M1337
Pulse output monitor
Inside 1 ms
Greater than 20ms
Program interrupt

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Note: The designated devices, X, Y, M, and S, other than the external input devices X10 ~ X17 will be
affected by the scan period, 2 times of the scan period at worst.
Explanations of zero point return operation:
1. When ZRN instruction is executed, accelerate to Zero point return speed S
1
and start to move;
Y10 and Y11 will use S2 as initial frequency. For PV series, the accel/decel time is set by Y10
(D1343) and Y11 (D1353). For PH series, the accel/decel time is set by Y10 (D1343) and Y11
(D1353). The acceleration time of PV/PH series is set by Y10 (D1343) and Y11 (D1353).
2. When the Near point signal (DOG) goes from OFF to ON, it will decelerate to Creep speed S
2

according to the accel/decel time setting (D1343 and D1353).
3. When the Near point signal (DOG) goes from ON to OFF and pulse output stops, 0 will be written
into the Y10 pulse current value (D1337, D1336), Y11 pulse current value (D1339, D1338), Y12
pulse current value (D1375,D1376), and Y13 pulses current value (D1377, D1378) in PV series; 0
will also be written in Y10 pulse current value (D1348,D1349) or Y11 pulse current value
(D1350,D1351) in PH series.
4. When the Near point signal (DOG) goes from On to Off and the reset signal flag M1346=On, Y10
(CH0), Y11 (CH1) , Y12 (CH2) and Y13 (CH3) in PV series will output a reset signal.
5. For PV series, when the pulse output is completed and M1029, M1030, M1036 and M1037 are
enabled, indication flag M1336 sent by CH0 pulses, M1337 by CH1, M1522 by CH2 and M1523 by
CH3 will be Off. For PH series, when the pulse output is completed, M1102 and M1103 will be
enabled.
6. Hence, the command can not search the position of Near point signal (DOG) and the operation of
ZRN command only can be processed in unidirection. In the operation of ZRN command, the
pulse value register (D1337,D1336) of Y10 pulse or the pulse value register (D1339,D1338) of
Y11 pulse will decrease in PV series; the pulse value register (D1348, D1349) of Y10 pulse or the
pulse value register (D1350, D1351) of Y11 pulse will decrease in PH series.
Creep speed
Zero return speed
Near point signal (DOG)ON
(DOG) OFF
Accel/decel time D1343
Time
Acceleration area
(S )
S
1
3
S
3
(S )
2
Speed
START
Dcceleration area
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7. This command is applicable to the Servo motor equipped with absolute positioning function, such
as Mitsubishi MR-J2-A Servo drive. It can record current position even when the power is OFF.
Because the current position of the servo drive can be read by API 155 DABSR command of
ELC-PH/PV series , the ZRN command should only be executed for one time. After the power is
OFF, it is unnecessary to execute the ZRN command again.
8. When Y10 and Y11 pulse execute the ZRN command, the current value of pulse output frequency
will display in (D1348, D1349) and (D1350, D1351). After the operation of ZRN command is
completed, 0 will be stored in (D1348, D1349) and (D1350, D1351).
9. When the drive contact of ZRN command is ON, Y10(Y11) pulse will read the content value set by
D1343(D1353) as aeceleration/deceleration time. After accelerating to zero point return speed,
wait for the entry of the near point signal (DOG) and output the creep speed of low speed by
decelerating. Immediately stop output pulse when the near point signal (DOG) turns OFF.
10. This instruction can be used many times in the program, but only one instruction will be activated
when every ELC program execution. For example, if Y10 is activated, other instructions that use
the same output as Y10 wont be executed. Therefore, instructions are executed in the same order
as they are activated.
11. When user designates Y10 as output device, user can choose X10 or X11 as the near point signal
input of the conversion from acceleration to deceleration. In the same way, when Y11 is
designated as output device, X10 or X11 can also be chose as near point signal input.
12. Since this instruction does not compare between the number of output pulses, the conversion
condition (from OFF to ON) must be inputted from near point signal when using Y10. Otherwise,
the instruction cant be converted from acceleration to deceleration. Moreover, the trigger time
should be more than 10us, otherwise, it will be regarded as noise with no responses.
13. When the instruction is in deceleration and the output frequency reaches creep speed (or end
frequency), then the output action will stop according to the near point signal from ON to OFF.
14. The current accumulated output number of Y10 is stored in D1348 and D1349. The current
accumulated output number of Y11 is stored in D1350 and D1351. It wont be cleared to 0 when
program is from STOP to RUN or from RUN to STOP.
15. When M1102=ON, it indicates Y10 pulse output ends. In the same way, if M1103=ON, it indicates
that Y11 pulse output ends.
16. During instruction execution, all parameters cannot be modified until instruction execution is
completed.
17. When instruction is OFF, all outputs will stop no matter what output it is.


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API Mnemonic Operands Function
157

D PLSV

Adjustable Speed Pulse
Output
Controllers
PB PC PA PH PV

Bit Devices Word Devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D
1
*
D
2
* * *
PLSV: 7 steps
DPLSV: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Pulse output frequency D
1
: Pulse output device (please use transistor output module)
D
2
: Output device for the signal of rotation direction
Explanations:
1. See remarks for the setting range of S, D
1
and D
2
.
2. Flag: see remarks of API 155 ABSR and API 158 DDRVI for more details.
3. S is the designated pulse output frequency. The 16-bit instruction can designate its range 0 ~
+32,767Hz, 0 ~ -32,768Hz. The ranges designated by 32-bit instruction are 0 ~ +200,000Hz and
0 ~ -200,000Hz. +/- signs indicate forward/backward directions. During the pulse output, the
frequency can be changed, but not the frequencies of different directions.
4. D
1
is the pulse output device. PV series can designate Y0, Y2, Y4 and Y6.
5. The operation of D
2
corresponds to the + or - of S. When S is +, D
2
will be On; when S is -,
D
2
will be Off.
6. PLSV instruction does not have settings for acceleration and deceleration. Please use API 67
RAMP for the acceleration and deceleration of pulse output frequency.
7. During the pulse output executed by PLSV instruction, the drive contact turning Off will result in
the immediate stop of the output without going through a deceleration.
8. When the absolute value of the input frequency during the execution of DPLSV is bigger than
200KHz, the output will operate at 200KHz.
9. D1222, D1223, D1383 and D1384 are the time differences sent between the direction setup
signal and pulse output points of CH0, CH1, CH2 and CH3.
10. M1305, M1306, M1532 and M1533 are the flags of the direction signals of CH0, CH1, CH2 and
CH3. When S is +, the output will operate towards a forward direction and the flag will go Off.
When S is -, the output will operate towards a backward direction and the flag will go On.
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Program Example:
When M10 = On, Y0 will output pulses at 20KHz. Y5 = On indicates forward pulses.
M10
PLSV K20000 Y0 Y5

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API Mnemonic Operands Function
158

D DRVI

Relative Position Control
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D
1
*
D
2
* * *
DDRVI: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Numbers of pulses (Target device) S
2
: Pulse output frequency D
1
: Pulse output device
D
2
: Rotation direction signal
Explanations:
1. S
1
is specified as the numbers of pulses (relative position). For PV series, the 16-bit instruction can
designate the range -32,768 ~ +32,767, and the range designated by 32-bit instruction is
-2,147,483,648 ~ +2,147,483,647. For PH series, the range designated by 32-bit instruction is
-2,147,483,648 to +2,147,483,647. The positive (+) and negative (-) symbol indicates the forward
and reverse direction.
2. S
2
is specified as the pulse output frequency. For PV series, the 16-bit instruction can designate its
range 10 ~ 32,767Hz, and the range designated by 32-bit instruction is 10 ~ 200,000Hz. For PH
series, the 32-bit instruction can designate the range 100 ~ 100,000Hz.
3. PV series has four groups of A/B phase pulse output, CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 (Y4, Y5)
and CH3 (Y6, Y7).
4. D
1
is specified as pulse output designation device.
Model PH PV
Pulse output end Y10, Y11 Y0, Y2, Y4, Y6
5. D
2
is specified as rotation direction signal and it operates following the polarity of S
1
. When S
1
is
negative (-),D
2
is OFF. When S
1
is positive (+),D
2
is ON and D
2
wont be OFF immediately after
ending pulse output. D
2
will be OFF when contact switch is OFF.
6. For PV series, S1 is
- The 32-bit data stored in the present value registers D1337 (high word) and D1336 (low word)
of CH0 (Y0, Y1).
- The 32-bit data stored in the present value registers D1339 (high word) and D1338 (low word)
of CH1 (Y2, Y3).
- The 32-bit data stored in the present value registers D1376 (high word) and D1375 (low word)
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of CH2 (Y4, Y5).
- The 32-bit data stored in the present value registers D1378 (high word) and D1377 (low word)
of CH3 (Y5, Y6).
- When in backward direction, the content in the present value register will decrease.
7. The numbers of pulses will be stored in current value register (D1348 high byte, D1349 low byte)
of CH0(Y10) pulse or current value register (D1350 high byte, D1351 low byte) of CH1(Y11) pulse.
When rotation direction is negative, the content value of current value register will decrease. The
content value doesnt change when the program goes from STOP to RUN, or from RUN to STOP.
8. The contents of each operand cannot be changed while the DRVI command is executed. The
contents will be changed when the next execution is driven.
9. If the drive contact turns OFF when the DRVI command is executed, the machine will decelerate
to stop and the execution completed flag M1102 and M1103 turn ON.
10. For PV series, when the drive contact of DRVI instruction is Off, even the indication flag M1336
sent by CH0 pulses, M1337 sent by CH1 pulses, M1522 sent by CH2 pulses and M1523 sent by
CH3 pulses are On, DRVI instruction will not be driven again.
11. D1343 (D1353) is the accel/decel time setting of Y10 (Y11). The acceleration and deceleration
time of PV series shall not be shorter than 10ms. The output will be operated for 10ms if the time is
shorter than 10ms or longer than 10,000ms (default setting = 100ms). The available range for PH
is 50 to 20,000ms.
12. D1340 (D1352) is Y10(Y11) start/end frequency setting. If pulse output frequency that designated
by S
2
is less or equal to start/end frequency, start/end frequency will be regarded as pulse output
frequency to execute.
13. Flag: For the description of M1010, M1029, M1102, M1103, M1334, M1335, M1336, M1337,
M1346, please refer to the instruction ABSR (API 155).
14. For PV series, M1305 (M1306) is the direction signal of CH0 (CH1). When S
1
is a positive number,
the output will be operated in a forward direction and M1305 (M1306) will be Off. When S
1
is a
negative number, the output will be operated in a backward direction and M1305 (M1306) will be
On.
Program Example:
When M10= ON, twenty thousands (20000) of 2KHz frequency pulses outputs from Y10 (relative
position). Y0= ON represents the positive direction.
M10
DDRVI K20000 K2000 Y10 Y0

Points to note:
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1. Operation explanation of relative position control: Using a positive or a negative symbol to specify
travel distance from the current position is also a kind of drive method of relative position control.
a) Explanations on PH series

+3,000
-3,000
0
Y10(D1340)
Y11(D1352)
Current
position
Min value: 100Hz
F0 1st step acceleration
Last step deceleration

b) Explanations on PV series

+3,000
-3,000
0
Y10(D1340)
Current
position
Min value: 10Hz
F0 1st step acceleration
Last step deceleration

2. The setting of relative position and acceleration/deceleration:
a) Explanations on PV series:
Factory setting: 200ms
Y10(D1343)
Factory setting: 200,000Hz
Y10(D1342,D1341)
Y10(D1340)
Y10 (D1340)
Min value: 10Hz
Min value: 10Hz
Y10(D1343)
Acceleration
slope
Sample time
of acceleration
Max. speed
Output pulse frequency
Deceleration
Numbers of
output pulses
Accel/Decel time Accel/Decel time
Factory setting: 200ms
Current
position
Acceleration

b) Explanations on PH series: D1343 (D1353) is the acceleration/deceleration setting of Y10 (Y11)
first step acceleration and last step deceleration. D1340 (D1352) is Y10 (Y11) start/end
frequency setting.
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Factory setting: 200ms
Y10(D1343)
Factory setting: 100,000Hz
Y10(D1348,D1349)
Y10(D1340)
Y10 (D1340)
Min value: 100Hz
Min value: 100Hz
Y11(D1350,D1351)
Y11(D1353)
Y11(D1352)
Y10(D1343)
Y11(D1353)
Y11 (D1352)
Acceleration
slope
Sample time
of acceleration
Max. speed
Output pulse frequency
Deceleration
Numbers of
output pulses
Accel/Decel time Accel/Decel time
Factory setting: 200ms
Current
position
Acceleration

c) This instruction can be used many times in the program, but only one instruction will be
activated whenever the ELC executes the program. For example, if Y10 is activated, other
instructions that use the same output as Y10 wont be executed. Therefore, instructions are
executed in the same order as they are activated.
d) After Y10 is activated by DDRVI instruction, general Y10 output function will be disabled and so
does Y11. The general output function will be enabled after instruction DDRVI is.
e) After activating instruction, all parameters cannot be modified unless instruction is OFF.
f) When instruction is OFF but output is not completed, if M1334=ON, Y10 will stop output
immediately. If M1334=OFF, Y10 will decelerate to the end frequency by deceleration time and
then stop output.
g) When instruction is OFF but output is not completed, if M1335=ON, Y10 will stop output
immediately. If M1335=OFF, Y10 will decelerate to the end frequency by deceleration time and
then stop output
3. Flags description:
a) Flags for PH series:
M1102: For PH series, M1102 will be ON after completing the first pulse CH0 (Y10) output or
other related instructions.
M1103: For PH series, M1103 will be ON after completing the second pulse CH1 (Y11) output.
M1334: For PH series, when M1334=ON, CH0 (Y10) will stop output.
M1335: For PH series, when M1335=ON, CH1 (Y11) will stop output.
b) Flags for PV series:
M1010: For PV, when M1010 = On, CH0, CH1, CH2 and CH3 will output pulses when END
instruction is being executed. M1010 will be Off automatically when the output starts.
M1029: For PV, M1029 = On after CH0 pulse output is completed.
M1030: For PV, M1030 = On after CH1 pulse output is completed.
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M1036: For PV, M1036 = On after CH2 pulse output is completed.
M1037: For PV, M1037 = On after CH3 pulse output is completed.
M1305: For PV, direction signal of CH0.
M1306: For PV, direction signal of CH1.
M1334: For PV, CH0 pulse output stops.
M1335: For PV, CH1 pulse output stops.
M1336: For PV, CH0 sends out pulses indication.
M1337: For PV, CH1 sends out pulses indication.
M1520: For PV, CH2 pulse output stops.
M1521: For PV, CH3 pulse output stops.
M1522: For PV, CH2 sends out pulses indication.
M1523: For PV, CH3 sends out pulses indication.
M1534: For PV, designated deceleration time of CH0 (should be used with D1348).
M1535: For PV, designated deceleration time of CH1 (should be used with D1349).
M1536: For PV, designated deceleration time of CH2 (should be used with D1350).
M1537: For PV, designated deceleration time of CH3 (should be used with D1351).
M1532: For PV, direction signal of CH2.
M1533: For PV, direction signal of CH3.
4. Special register explanation:
a) Special registers for PH series:
D1348, D1349: For PH series, D1349(HIGH WORD), D1348(LOW WORD) represents the
current value that position control instructions (API 156 ZRN, API 158 DRVI,
API 159 DRVA) output to the first output Y10. The current value increases or
decreases in accordance with the direction of rotation.
D1350, D1351: For PH series, D1351(HIGH WORD), D1350(LOW WORD) represents the
current value that position control instructions (API 156 ZRN, API 158 DRVI,
API 159 DRVA) output to the second output Y11. The current value increases
or decreases in accordance with the direction of rotation.
D1340: For PH series, D1340 operates as the frequency setting of the first step acceleration
and last step deceleration of first output Y10 when position control instructions (API 156
ZRN, API 158 DRVI, API 159 DRVA) are executed.
Setting range: 100~100KHz. 100/100KHz will prevail when the setting is less/exceeds
100/100KHz. The factory setting is 200Hz.
Note: When controlling stepping motor, please consider the limit of resonance and start
frequency for speed setting.
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D1352: For PH series, D1352 operates as the frequency setting of the first step acceleration
and last step deceleration of second output Y11 when position control instructions (API
156 ZRN, API 158 DRVI, API 159 DRVA) are executed.
Setting range: 100~100KHz. 100/100KHz will prevail when the setting is less/exceeds
100/100KHz. The factory setting is 200Hz.
Note: When controlling stepping motor, please consider the limit of resonance and start
frequency for speed setting.
D1343: For PH series, D1343 operates as the acceleration/deceleration time setting of the first
step acceleration and last step deceleration of first output Y10 when position control
instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA) are executed.
Setting range: 50~20,000ms. 50/20000 will prevail when the setting is less/exceeds
50/20000ms. The factory setting is 200ms.
Note: When controlling stepping motor, please consider the limit of resonance and start
frequency for speed setting.
D1353: For PH series, D1353 operates as the acceleration/deceleration time setting of the first
step acceleration and last step deceleration of second output Y11 when position control
instructions (API 156 ZRN, API 158 DRVI, API 159 DRVA) are executed.
Setting range: 50~20,000ms. 50/20000 will prevail when the setting is less/exceeds
50/20000ms. The factory setting is 200ms.
Note: When controlling stepping motor, please consider the limit of resonance and start
frequency for speed setting.
b) Special registers for PV series:
D1220: For PV, phase setting of CH0 (Y0, Y1): D1220 determines the phase by the last two bits;
other bits are invalid.
1. K0: Y0 output
2. K1: Y0, Y1 AB-phase output; A ahead of B.
3. K2: Y0, Y1 AB-phase output; B ahead of A.
4. K3: Y1 output
D1221: For PV, phase setting of CH1 (Y2, Y3): D1221 determines the phase by the last two bits;
other bits are invalid.
1. K0: Y2 output
2. K1: Y2, Y3 AB-phase output; A ahead of B.
3. K2: Y2, Y3 AB-phase output; B ahead of A.
4. K3: Y3 output
D1222: For PV, the time difference between the direction signal and pulse output sent by CH0.
6. I nst ruct i on Set

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D1223: For PV, the time difference between the direction signal and pulse output sent by CH1.
D1229: For PV, phase setting of CH2 (Y4, Y5): D1229 determines the phase by the last two
bits; other bits are invalid.
1. K0: Y4 output
2. K1: Y4, Y5 AB-phase output; A ahead of B.
3. K2: Y4, Y5 AB-phase output; B ahead of A.
4. K3: Y5 output
D1230: For PV, phase setting of CH3 (Y6, Y7): D1230 determines the phase by the last two bits;
other bits are invalid.
1. K0: Y6 output
2. K1: Y6, Y7 AB-phase output; A ahead of B.
3. K2: Y6, Y7 AB-phase output; B ahead of A.
4. K3: Y7 output
D1336: For PV, low word of the current number of output pulses from CH0.
D1337: For PV, high word of the current number of output pulses from CH0.
D1338: For PV, low word of the current number of output pulses from CH1.
D1339: For PV, high word of the current number of output pulses from CH1.
D1340: For PV, settings of the first start frequency and the last end frequency of CH0.
D1343: For PV, settings of acceleration/deceleration time for CH0 pulse output.
D1352: For PV, settings of the first start frequency and the last end frequency of CH1.
D1353: For PV, settings of acceleration/deceleration time for CH1 pulse output.
D1375: For PV, low word of the current number of output pulses from CH2.
D1376: For PV, high word of the current number of output pulses from CH2.
D1377: For PV, low word of the current number of output pulses from CH3.
D1378: For PV, high word of the current number of output pulses from CH3.
D1379: For PV, settings of the first start frequency and the last end frequency of CH2.
D1380: For PV, settings of the first start frequency and the last end frequency of CH3.
D1348: For PV, deceleration time for CH0 pulse output when M1534 = On.
D1349: For PV, deceleration time for CH1 pulse output when M1535 = On.
D1350: For PV, deceleration time for CH2 pulse output when M1536 = On.
D1351: For PV, deceleration time for CH3 pulse output when M1537 = On.
D1381: For PV, settings of acceleration/deceleration time for CH2 pulse output.
D1382: For PV, settings of acceleration/deceleration time for CH3 pulse output.
D1383: For PV, the time difference between the direction signal and pulse output sent by CH2.
D1384: For PV, the time difference between the direction signal and pulse output sent by CH3.
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API Mnemonic Operands Function
159

D DRVA

Absolute Position Control
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
D
1
*
D
2
* * *
DDRVA: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Numbers of pulses (Target device) S
2
: pulse output frequency D
1
: pulse output device
D
2
: Rotation direction signal
Explanations:
1. S
1
is specified as the number of output pulses (absolute position). For PV series, the 16-bit
instruction can designate the range -32,768 ~ +32,767. The range designated by 32-bit instruction
is -2,147,483,648 ~ +2,147,483,647. For PH series, the setting range of 32-bit instruction:
-2,147,483,648 ~ +2,147,483,647. The positive (+) and negative (-) symbol indicate the forward
and reverse direction.
2. S
2
is specified as the pulse output frequency. For PV series, the 16-bit instruction can designate its
range 10 ~ 32,767Hz. The range designated by 32-bit instruction is 10 ~ 200,000Hz. For PH series,
The setting range of 32-bit instruction is 100 ~ 100,000Hz.
3. PV series has four groups of A/B phase pulse output, CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 (Y4, Y5)
and CH3 (Y6, Y7).
4. D
1
is pulse output device in different models.
Model PH PV
Pulse output end Y10, Y11 Y0, Y2, Y4, Y6
5. D
2
is specified as rotation direction signal.
6. When S
1
is larger than current absolute position, D
2
is OFF.
7. When S
1
is less than current absolute position, D
2
is ON.
8. After pulse outputs, D
2
wont be OFF immediately. D
2
will be OFF until the contact is OFF by using
instruction.
9. For PV series, S
1
is the relative position of the 32-bit data in the present value registers (high word
in D1337 and low word in D1336) of CH0 (Y0, Y1) pulses, or the relative position of the 32-bit data
in the present value registers (high word in D1339 and low word in D1338) of CH1 (Y2, Y3) pulses,
or the relative position of the 32-bit data in the present value registers (high word in D1376 and low
6. I nst ruct i on Set

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word in D1375) of CH2 (Y4, Y5) pulses, or the relative position of the 32-bit data in the present
value registers (high word in D1378 and low word in D1377) of CH3 (Y6, Y7) pulses. In reverse
direction, the contents in the present value register will decrease.
10. When in backward direction, the content in the present value register will decrease.
11. The numbers of pulses will be stored in current value register (D1349 high byte, D1348 low byte)
of CH0 (Y10) pulse or current value register (D1351 high byte, D1350 low byte) of CH1 (Y11)
pulse. When rotation direction is negative, the content value of current value register will decrease.
12. For PV series, when DRVA instruction is executing pulse output, you cannot change the content of
all operands. The changes will be valid next time when DRVA instruction is enabled.
13. For PV series, when the drive contact of DRVA instruction is OFF, the pulse output will decelerate
to stop and M1029 and M1030 will turn ON. For PH series, the drive condition turns OFF when the
DRVA command is executed, the machine will decelerate and stops and the execution completed
flag M1102, M1103 will turn ON.
14. For PV series, when the drive contact of DRVA instruction is OFF, even the indication flag M1336
sent by CH0 pulses or M1337 sent by CH1 pulses are ON, DRVA instruction will not be driven
again.
15. D1343 (D1353) is the acceleration/deceleartion time of the first step acceleration and last step
deceleration of Y10 (Y11). The acceleration and deceleration time of PV series shall not be shorter
than 10ms. The output will be operated for 10ms if the time is shorter than 10ms or for 100ms
(default) if the time is longer than 10,000ms. For PH series, the setting range is 50~20,000 ms. If
setting exceeds/less than 20,000 ms/50 ms, 20,000 ms/50 ms will prevail.
16. For PV series, M1305 (M1306) is the direction signal of CH0 (CH1). When S
1
is a positive number,
the output will be operated in a forward direction and M1305 (M1306) will be OFF. When S
1
is a
negative number, the output will be operated in a backward direction and M1305 (M1306) will be
ON.
17. D1340 (D1352) is start/end frequency setting of Y10 (Y11). If pulse output frequency designated
by S
2
is less or equal to start/end frequency, start/end frequency will be regarded as pulse output
frequency.
18. Flags: Please refer to API 158 DRVI for M1010, M1102, M1103, M1334, M1335, M1336, M1337,
M1346
Program Example:
When M10=ON, it will output 20,000 pulses from Y10 with 2KHz frequency. Y0=ON indicates positive
direction.
M10
DDRVA K20000 K2000 Y10 Y0

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Points to note:
1. About PV series:
a) Absolute position control: Designating the traveling distance starting from the zero point (0);
also known as an absolute driving method.
+3,000
0
0 Y10(D1340)
Zero
point
Min value: 100Hz
F0 1st acceleration
Last deceleration
Target
position

b) Settings of absolute positioning and the acceleration/deceleration speed:
T Accel/Decel t ime
Current
position
Accel/Decel time
Output pulse frequency
Output pulse
numbers
Acceleration
sampling time
Acceleration slope
Default: 200,000Hz
Max. speed
(D1342, D1341)
First acceleration
segment (D1340)
Min: 10Hz
Default: 100ms
(D1343)
Default: 100ms
(D1343)
Last deceleration
segment (D1340)
Min: 10Hz

2. Explanations on PH series:
a) Operation explanation of absolute position control: Specifying travel distance from a zero point
is also a kind of drive method of absolute position control.
+3,000
-3,000
0
Y10(D1340)
Y11(D1352)
Zero
point
Min value: 100Hz
F0 1st acceleration
Last deceleration
Target
position

b) Settings of absolute position and operation speed: (D1343 (D1353) is the
acceleration/deceleration time setting of the first step acceleration and last step deceleration of
Y10(Y11). D1340 (D1352) is start/end frequency setting of Y10 (Y11)).
6. I nst ruct i on Set

6- 353
Acceleration
slope
accel/decel time accel/decel time
Current
position
Acceleration
sampling time
Output pul se
frequency
Fi rst accel eration segment
Y10 (D1340)
Y11 (D1352) Min: 100Hz
Default: 200ms
Y10 (D1343)
Y11 (D1353)
Default: 200ms
Y10 (D1343)
Y11 (D1353)
Last deceleration segment
Y10 (D1340)
Y11 (D1352)
Min: 100Hz
Output pul se
numbers

3. When this instruction is OFF and output is not completed:
If M1334=ON, Y10 will stop output immediately.
If M1334=OFF, Y10 will decelerate from deceleration time to end frequency and then stop pulse
output.
M1335 corresponds to Y11 and applies the same rule.
4. Please refer to instruction DDRVI Remarks for flag information.
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5. Wiring of ELC-PH12NNDT series and Servo Drive
SG
PP 3
10
SG
NP 2
10
OP
LG
14
PH Series + Ex16
L
N
X0
X1
X2
X3
X4
X5
X20
S/S
Y11
C3
R
S
T
U
V
W
MR-J2 series
CN1B
SON
RES
LSP
LSN
TL
SG
CR
+24V
X21
24G
X22
X23
X24
X25
X26
EMG
SG
5
14
16
17
9
15
10
CN1A
Z phase signal
(zero poi nt signal)
8
20
Y10
C2
Y0
C0
ELC- PH12NNDT + EX16NNDT
Rcal1
Rcal2
Rcal3
1
RD
INP
ALM
VDD
COM
24V
Rc3
Rc2
Rc1
5
14
18
18
13
CN1A
CN1B
220VAC
220VAC
100KPPS
CN2
Start
Zero point reset
JOG(+)
JOG( - )
Stop
Error reset
Forward limit
Reverse limit
Servo
malfunction
SV-END
SV-READY
SON: servo start
RES: servo reset
LSP: forward limit
LSN: reverse limit
TL: emergency stop
Pulse clear
Pulse output
Forward/Reverse direction
Electric
Gear
Error
Counter
Encoder
3-phase power
Mitsubishi Servo Drive
Servo motor

Notes:
(a) The parameter setting of Servo drive should be set: position mode and pulse input type should
be Pulse+DIR.
(b) Please connect forward/reverse limit switch to SERVO AMP.
6. Wiring of ELC-PV series ELC and a Mitsubishi MR-J2S-10A Servo drive:
6. I nst ruct i on Set

6- 355
SG
PP 3
10
SG
NP 2
10
OP
LG
14
PV Series
L
N
X0
X1
X2
X3
X4
X5
X10
S/S
Y10
C3
R
S
T
U
V
W
MR-J2 series
CN1B
SON
RES
LSP
LSN
TL
SG
CR
+24V
X11
24G
X12
X13
X14
X15
X16
EMG
SG
5
14
16
17
9
15
10
CN1A
Z phase signal
(zero poi nt signal)
8
20
Y0
C2
Y1
C0
ELC- PV28NNDT
Rcal1
Rcal2
Rcal3
1
RD
INP
ALM
VDD
COM
24V
Rc3
Rc2
Rc1
5
14
18
18
13
CN1A
CN1B
220VAC
220VAC
100KPPS
CN2
Start
Zero point reset
JOG(+)
JOG( - )
Stop
Error reset
Forward limit
Reverse limit
Servo
malfunction
SV-END
SV-READY
SON: servo start
RES: servo reset
LSP: forward limit
LSN: reverse limit
TL: emergency stop
Pulse clear
Pulse output
Forward/Reverse direction
Electric
Gear
Error
Counter
Encoder
3-phase power
Mitsubishi Servo Drive
Servo motor

Note:
(a) When detecting an absolute position by using DABSR instruction, the parameter setting of a
Mitsubishi MR-J2S-10A servo drive that connects to EATON PV series ELC:
P0: position mode.
P1: using absolute value.
P21: pulse input type as Pulse+DIR.
(b) The forward/reverse limit switch should be connected to SERVO AMP.
(c) When using OP (Z-phase signal) in servo and given that the Z-phase signal is a
high-frequency one when the motor is running at high speed, the valid detection can only be
possible when the signal is within the range detectable by ELC. When using OP (Z phase
signal) of the servo, if Z phase signal is a high frequency signal during high-speed motor
operation, the high frequency signal shall be within the available range that can be detected
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6- 356
by ELC.
7. Settings of pulse output signals in the operation of position control for PV series:
a) Pulse + DIR (recommended)
Pulse
DIR
b) CW/CCW (limited frequency at 10KHz)
CW
CCW
c) A/B-phase output (limited frequency at 10KHz)
A
B
8. For PV series, when Y0 output adopts many high-speed pulse output instructions (PLSY, PWM,
PLSR) and position control instructions (ZRN, PLSV, DRVI, DRVA) in a program and these
instructions are executed synchronously in the same scan period, ELC will execute the
instruction with the fewest step numbers.
Programming example for forward/reverse operation:
For the wiring, see the wiring drawing of DVP-PV series and Mitsubishi MR-J2-A servo drive
One operation mode performs positioning by absolute position:
500Hz
500Hz
500,000
100
200ms
200,000Hz
Zero point
Output pul se frequency
Acceleration/
Decel erati on time

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API Mnemonic Operands Function
160

TCMP P

Calendar Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
S
3
* * * * * * * * * * *
S * * *
D * * *
TCMP, TCMPP: 11 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: hour of comparison time, setting range is K0~K23 S
2
: minute of comparison time, setting range is
K0~K59 S
3
: second of comparison time, setting range is K0~K59 S: Current time of calendar
(occupies 3 continuous devices) D: Comparison result (occupies 3 continuous devices)
The range of operand S
1
, S
2
, S
3
: S
1
=0~23, S
2
=S
3
=K0~59
Explanations:
1. S
1
, S
2
, S
3
is compared to the current value of the clock/calendar S and save the comparison result
in D.
2. S is the hour of current time and the content is K0~K23. S +1 is the minute of current time and the
content is K0~K59. S +2 is the second of current time and the content is K0~K59.
3. The current time of the calendar specified by S is read by using the TRD instruction previously and
then compared by using TCMP instruction. If the content of S exceeds the range, it will result in
operation error. At this time, the instruction wont execute and M1067=ON, M1068=ON, records
error code 0E1A (HEX) in D1067.
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Program Example:
1. When X0= ON, the instruction is executed and the current time of calendar is placed in (D20~D22),
is compared to the set value 12:20:45 and the result is shown at M10~M12. When X0 goes from
ONOFF, the instruction is not executed but the ON/OFF state before M10~M12 is unchanged.
2. Connect M10~M12 in series or in parallel and then the result of , , are given.
X0
M10
TCMP K12 K20 K45 D20 M10
M11
M12
ON when 12:20:45
ON when 12:20:45
ON when 12:20:45
>
=
<
D20 Hour
D21 Minute
D22 Second
D20 Hour
D21 Minute
D22 Second
D20 Hour
D21 Minute
D22 Second


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API Mnemonic Operands Function
161

TZCP P

Calendar Zone Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S * * *
D * * *
TZCP, TZCPP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Lower limit time data S
2
: Upper limit time data S: Current time of calendar
D: Comparison result (occupies 3 continuous devices)
Operand S
1
, S
2
, S occupies 3 continuous devices S
1
should be less than S
2
, i.e. S
1
S
2

Explanations:
1. S is compared to the time period of S
1
~ S
2
and the comparison result is stored in D.
2. S
1
, S
1
+1, S
1
+2: respectively represent Hour, Minute, Second of the lower limit time data.
3. S
2
, S
2
+1, S
2
+2: respectively represent Hour, Minute, Second of the Upper limit time data
4. S , S +1, S +2: respectively represent Hour, Minute, Second of the current time of calendar.
5. The current time of the calendar specified by S is read by using TRD instruction previously and
then compared by using TZCP instruction. If the content of S, S
1
, S
2
exceeds the range, it will
result in operation error. At this time, the instruction wont be executed and M1067=ON,
M1068=ON, records error code 0E1A (HEX) in D1067.
6. If S < S
1
and S < S
2
, D is ON. If S > S
1
and S > S
2
, D+2 is ON .+2 is ON. Besides these two
situations, D +1 is ON. (Lower limit S
1
should be less than upper limit S
2
.)
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6- 360
Program Example:
When X0= ON, the instruction is executed and one of M10~M12 = ON. When X0=OFF, the instruction is
not executed but the state of M10~M12 before X0=OFF is unchanged.
X0
M10
TZCP D0 D20 D10 M10
M11
M12
ON when
ON when
ON when
D0 Hour
D1 Minute
D2 Second
D10 Hour
D11 Minute
D12 Second
D10 Hour
D11 Minute
D12 Second
D0 Hour
D1 Minute
D2 Second
D10 Hour
D11 Minute
D12 Second
D20 Hour
D21 Minute
D22 Second
D20 Hour
D21 Minute
D22 Second


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API Mnemonic Operands Function
162

TADD P

Calendar Data Addition
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D * * *
TADD, TADDP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Time augend S
2
: Time addend D: Addition result
Operand S
1
, S
2
, D occupies 3 continuous devices
Explanations:
1. S
1
+ S
2
= D. The time data in the register specified by S
1
is added to the time data in the register
specified by S
2
and the addition result is stored in the register specified by D.
2. If the time data in S
1
, S
2
exceeds the range, it will result in operation error. At this time, the
instruction wont be executed and M1067=ON, M1068=ON, records error code 0E1A (HEX) in
D1067.
3. If the addition result is in a value greater than 24 hours, the Carry flag M1022=ON. The value of
the result shows in D is the time remaining above 24 hours.
4. If the addition result is equal to 0 (zero, 0 hour, 0 minute, 0 second), the Zero flag M1020= ON.
Program Example:
When X0= ON, the instruction is executed. Add the time data specified by D0~D2 and D10~D12 and
store the result in the register specified by D20~D22.
08:10:20 06:40:06 14:50:26
X0
TADD D0 D10 D20
D0 08(Hour)
D1 10(Min)
D2 20(Sec)
D20 14(Hour)
D21 50(Min)
D22 26(Sec)
D10 06(Hour)
D11 40(Min)
D12 06(Sec)

If the addition result is in a value greater than 24 hours, the Carry flag M1022=ON.
X0
TADD D0 D10 D20
18:40:30 11:30:08 06:10:38
D0 18(Hour)
D1 40(Min)
D2 30(Sec)
D20 06(Hour)
D21 10(Min)
D22 38(Sec)
D10 11(Hour)
D11 30(Min)
D12 08(Sec)

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API Mnemonic Operands Function
163

TSUB P

Calendar Data Subtraction
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
D * * *
TSUB, TSUBP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Time Minuend S
2
: Time Subtrahend D: Subtraction result
Operand S
1
, S
2
, D occupies 3 continuous devices.
Explanations:
1. S
1
S
2
= D. The time data in the register specified by S
2
is subtracted from the time data in the
register specified by S
1
and the result is stored in the register specified by D.
2. If the time data in S
1
, S
2
exceeds the range, it will result in operation error. At this time, the
instruction wont be executed and M1067=ON, M1068=ON, records error code 0E1A (HEX) in
D1067.
3. If the subtraction result is a negative value (less than 0), the Zero flag M1020= ON. The value of
the result shows in D is the time remaining below 0 (zero) hour.
4. If the subtraction result is equal to 0 (zero, 0 hour, 0 minute, 0 second), the Zero flag M1020= ON.
5. Besides using TRD instruction, MOV instruction can also be used to move the special register
D1315 (Hour), D1314 (Minute), D1313 (Second) to the three registers specified to read the current
time of calendar.
Program Example:
When X0= ON, the instruction is executed. The time data specified by D10~D12 is subtracted from the
time data specified by D0~D2 and the result is stored in the register specified by D20~D22.
20:20:05 14:30:08 05:49:57
X0
TSUB D0 D10 D20
D0 20(Hour)
D1 20(Min)
D2 05(Sec)
D20 05(Hour)
D21 49(Min)
D22 57(Sec)
D10 14(Hour)
D11 30(Min)
D12 08(Sec)

If the subtraction result is a negative value (less than 0), the borrow flag M1021= ON.
X0
TSUB D0 D10 D20
05:20:30 19:11:15 10:09:15
D0 05(Hour)
D1 20(Min)
D2 30(Sec)
D20 10(Hour)
D21 09(Min)
D22 15(Sec)
D10 19(Hour)
D11 11(Min)
D12 15(Sec)

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API Mnemonic Operands Function
166

TRD P

Calendar Data Read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D * * *
TRD, TRDP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: The device stores the current time of calendar (occupies 7 continuous devices)
Explanations:
1. The calendar clock in PV/PC/PA/PH series, year (A.D.), week, month, date, hours, minutes and
seconds, total 7 data devices stored in D1319~D1313. The TRD instruction reads the current time
of calendar and stores the values in the 7 data registers specified by D.
2. D1319 is read as a two right digit number of year and can be changed to a four digit number to see
the notes.
3. Flags: M1016, M1017, M1076, please see the Notes.
Program Example:
When X0=ON, read the current time of calendar to the specified register D0~D6.
The content of D1318: 1 is Monday, 2 is Tuesday,, 7 is Sunday.
X0
TRD D0

Special D
device
Meaning Content
General D
device
Meaning
D1319 Year (A.D.) 00~99 D0 Year (A.D.)
D1318 Day (Mon.~Sun.) 1~7 D1 Day (Mon.~Sun.)
D1317 Month 1~12 D2 Month
D1316 Date 1~31 D3 Date
D1315 Hour 0~23 D4 Hour
D1314 Minute 0~59 D5 Minute
D1313 Second 0~59 D6 Second
Notes:
1. There are two methods to correct built-in API calendar:
Specified instruction to correct
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Please refer to instruction TWR (API 167) for reference.
Setting by peripheral
Using ELCSoft (software to edit ladder diagram) to set
2. Display four digit number of year:
It usually displays 2 digit number of year (for example: only display 03 for year 2003). If you want to
display 4 digit number, please key in following program at the start of program.
M1002
SET M1016 Display 4 digit number for year

It will display 4 bits (two right-most digit number + 2000) to replace original 2 digit number.
If you want to write new time setting in 4 digit number display mode, only 2 digit number you can write in
and its range is 00-99 which corresponds to year 2000-2099. For example, 00=year 2000, 50=year
2050 and 99=year 2099.
Error Flag of the calendar in PV/PC/PA/PH series:
Device Name Function
M1016 year display
of calendar
It displays 2 right-most digit number of year of D1319 when
it is OFF.
It displays (2000+ 2 right-most digit number of year of
D1319) when it is ON.
M1017 30 seconds
correction
It will correct when it is from OFFON. (if it is 0-29 seconds,
it will reset to 0. If it is 30-59 seconds, add 1 to minute and
set 0 to second)
M1076 calendar
fault
It = ON when setting is out of range or running output of
battery. (it only check when power is ON)

Device Name Range
D1313 Second 0-59
D1314 Minue 0-59
D1315 Hour 0-23
D1316 Day 1-31
D1317 Month 1-12
D1318 Week 1-7
D1319 Year 0-99 (two right-most digit number of year)

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API Mnemonic Operands Function
167

TWR P

Calendar Data Write In
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D * * *
TWR, TWRP: 5 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
D: Source for new calendar time (occupies 7 continuous device)
Explanations:
1. This instruction writes the value in S into the calendar clock setting a new time.
2. If the time data in S exceeds the valid calendar range, it will result in an operation error. The
instruction wont execute and M1067=ON, M1068=ON, and records error code 0E1A (HEX) in
D1067.
3. Flags: M1016, M1017, M1076.
4. To make adjustment on the RTC built in PV/PC/PA/PH series , use this instruction to write the
correct time into the RTC.
5. Refer to the TRD instruction for more information.
Program Example 1:
When X0= ON, write the new time into the calendar clock.
X0
TWRP D20


General D
device
Meaning Content
Special D
device
Meaning
D20 Year (A.D.) 00~99 D1319 Year (A.D.)
D21
Day
(Mon.~Sun.)
1~7 D1318 Day (Mon.~Sun.)
D22 Month 1~12 D1317 Month
D23 Date 1~31 D1316 Date
D24 Hour 0~23 D1315 Hour
D25 Minute 0~59 D1314 Minute
N
e
w

s
e
t
t
i
n
g

t
i
m
e

D26 Second 0~59 D1313 Second
C
a
l
e
n
d
a
r

C
l
o
c
k

Program Example 2:
Set the time of the calendar and adjust the time to 2004/12/15, Tuesday, 15:27:30.
The content of D0~D6 is the new time of the calendar.
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When X0= ON, change the current time of calendar clock to the new time.
When X1=ON, the calendar clock will perform the 30 seconds correction. Correction means that if the
seconds of the calendar clock is between 1~29 seconds, the time will be automatically set to 0 (zero)
seconds and the minute time wont change. If the seconds of the calendar clock is between 30~59
seconds, the time will also be automatically set to 0 (zero) second but the minute time will increase by
1 minute.
X0
MOV K04 D0
MOV K3 D1
MOV K12 D2
MOV K26 D3
MOV K15 D4
MOV K27 D5
MOV K30 D6
TWR D0
M1017
X1
Year (2004)
Day (Wednesday)
Month(December)
Date
Hour
Minute
Second
Write the setting time in the perpetual calender
30 seconds correction
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API Mnemonic Operands Function
169

D HOUR

Hour Meter
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * * * * * *
D
1
*
D
2
* * *
HOUR: 7 steps
DHOUR: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Hour set-point value, count hours until they reach this value D
1
: current time during counting and
unit is hour (occupies 2 continuous devices) D
2
:output device
Explanations:
1. D
2
ON contact when hours reach S on and unit is hour. range is K1~K32,767. D
1
range is
K0~K32,767. D
1
+1 saves current time that less than one hour and unit is second. Its setting range
is K0~K3,599.
2. If using input contact to be timer, output device = ON when attaining setting time (unit is hour). It
can provide user a timer for managing machine operation or maintain.
3. After output device is ON, timer will keep on counting.
4. When the 16-bit timer counts to its max. value (32,767 hours and 3,599 seconds), it will stop. If you
want to recount, D
1
and D
1
+1 need to clear to 0. When the 32-bit timer counts to its max. value
(2,147,483,647 hours and 3,599 seconds), it will stop. If you want to recount, D
1
- D
1
+2 need to
clear to 0.
5. Operand S can only use a 16-bit instruction when using device F.
6. Instruction HOUR can be used for four times in program.
Program Example 1:
For 16-bit instruction: When X0=ON, Y20 = ON, counting starts. When the time reaches 100 hours, Y0 =
ON and D0 will record the current time (unit is hour, but if D0 is less than one hour, unit will be second
and its range is 0~3599).
HOUR
Y20
K100 Y0 D0
Y20
X0


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API Mnemonic Operands Function
170

D GRY P

BIN GRAY CODE
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * * * *
D * * * * * * * *
GRY, GRYP: 5 steps
DGRY, DGRYP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source device D: Destination to store Gray code result
Explanations:
1. The BIN value in the specified device by S is converted to GRAY CODE equivalent and the
converted result is stored in the device specified by D.
2. The range of S that can be converted to the GRAY CODE is shown as follows:
16-bit instruction: 0~32,767
32-bit instruction: 0~2,147,483,647
3. If the BIN value is outside the range shown above, it is determined as an Operation Error. At this
time, the instruction wont be executed, M1067=ON, M1068=ON, and records error code 0E1A
(HEX) in D1067.
4. Operands S and D can only use 16-bit instruction when using F device.
Program Example:
When X0=ON, constant K6513 is converted to GRAY CODE and stored in the K4Y20.
X0
GRY K6513 K4Y20

0 0 0 1 1 1 0 0 0 1 1 1 1 0 0 0
b15 b0
K6513=H1971
0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1
K4Y20
Y37 Y20
GRAY 6513


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API Mnemonic Operands Function
171

D GBIN P

GRAY CODE BIN
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * * * * * *
D * * * * * * * *
GBIN, GBINP: 5 steps
DGBIN, DGBINP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Source GRAY CODE D: Destination which stores converted BIN result
Explanations:
1. The GRAY CODE value in specified device S is converted to a BIN value equivalent and the
converted result is stored in the device specified by D.
2. This instruction can be used to read the value from an absolute position type encoder (generally a
gray code encoder) which is connected to the ELC inputs. Convert the value to a BIN value and
store it in the specified register.
3. Program scan time plus input response time is equal to the output delay time specified by S.
4. If the source is set to inputs X20~X37, it can speed up the input response time by using REFF
instruction or D1020 (adjust input response time).
5. The range of S that can be converted to the GRAY CODE is shown as follows:
16-bit instruction 0~32,767
32-bit instruction 0~2,147,483,647
6. If the GRAY CODE value is outside the range shown above, it is determined as Operation Error.
Program Example:
When X0=ON, the GRAY CODE value in the absolute position type encoder connected to X20~X37
inputs is converted to BIN value and stored in D10.
X0
GBIN K4X20 D10

0 0 0 1 1 0 1 1 1 0 0 0
b15 b0
H1971=K6513 0 0 0 0 0 0 1 1 1 1 1 1
X37 X20
GRAY6513
K4X20
0 1 0 1
0 0 1 0


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API Mnemonic Operands Function
172

D ADDR P

Floating Point Number
Addition
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
D

*
DADDR: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Floating point number summand S
2
: Floating point number addend D: Sum

Explanations:
1. Floating point numbers can be inserted into S
1
and S
2.

2. PB series models do not support pulse execution command (DADDRP) and index register E and F.
3. DADDR can directly insert floating point numbers into S
1
and S
2
(e.g. F1.2) or store floating point
numbers in register D.
4. When S
1
and S
2
store floating point numbers in register D, their functions will be the same as in API
120 EADD.
5. When DADDR is executing, operand D will store the result obtained from operation of floating point
numbers.
6. S
1
and S
2
can assign the same register No. In this case, if continuous execution commands
(mostly pulse execution command DADDRP) are in use, when drive contact is ON, the register will
be added once in every scan period.
7. If the absolute value of operation result > maximum floating point numbers, the carry flag
M1022=On.
8. If the absolute value of operation result < minimum floating point numbers, the borrow flag
M1021=On.
9. If the operation result equals 0, the zero flag M1020=On.

Program Example 1:

When X0=On, add floating point number F1.20000004768372 with F2.20000004768372 and store the
obtained result F3.40000009536743 in register D10 and D11.
X0
DADDR F1.20000004768372 D10 F1.20000004768372 F2.20000004768372

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Program example 2:
When X0=On, store the result of floating point number value (D1, D0)(D3, D2) into (D11, D10).
X0
DADDR D0 D2 D10

Remarks:
DADDR is the new command for V1.4 of PB series model, V1.4 of PC/PA/PH series model.
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API Mnemonic Operands Function
173

D SUBR P

Floating Point Number
Subtraction
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
D

*
DSUBR: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV

Operands:
S
1
: Floating point number minuend S
2
: Floating point number subtrahend D: Remainder

Explanations:
1. Floating point numbers can be inserted into S
1
and S
2.

2. PB series models do not support pulse execution command (DSUBRP) and index register E and F.
3. DSUBR can directly insert floating point numbers into S
1
and S
2
(e.g. F1.2) or store floating point
numbers in register D.
4. When S
1
and S
2
store floating point numbers in register D, their functions will be the same as in API
120 ESUB.
5. When DSUBR is executing, operand D will store the result obtained from operation of floating point
numbers.
6. S
1
and S
2
can assign the same register No. In this case, if continuous execution commands
(mostly pulse execution command DSUBRP) are in use, when drive contact is ON, the register will
be subtracted once in every scan period.
7. If the absolute value of operation result > maximum floating point numbers, the carry flag
M1022=On.
8. If the absolute value of operation result < minimum floating point numbers, the borrow flag
M1021=On.
9. If the operation result equals 0, the zero flag M1020=On.

Program example 1:
When X0=On, subtract floating point number F1.20000004768372 by F2.20000004768372 and store
the obtained result F-1 in register D10 and D11.
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X0
DSUBR F1.20000004768372 D10 F1.20000004768372 F2.20000004768372


Program example 2:
When X0=On, store the result of floating point number value (D1, D0) (D3, D2) into (D11, D10).
X0
DSUBR D0 D2 D10


Remarks:
DSUBR is the new command for V1.4 of PB series model, V1.4 of PC/PA/PH series model.
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API Mnemonic Operands Function
174

D MULR P

Floating Point Number
Multiplication
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
D

*
DMULR: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Floating point number multiplicand S
2
: Floating point number multiplicator D: Product

Explanations:
1. Floating point numbers can be inserted into S
1
and S
2.

2. PB series models do not support pulse execution command (DMULRP) and index register E and F.
3. DMULR can directly insert floating point numbers into S
1
and S
2
(e.g. F1.2) or store floating point
numbers in register D.
4. When S
1
and S
2
store floating point numbers in register D, their functions will be the same as in API
122 EMUL.
5. When DMULR is executing, operand D will store the result obtained from operation of floating point
numbers.
6. S
1
and S
2
can assign the same register No. In this case, if continuous execution commands
(mostly pulse execution command DMULRP) are in use, when drive contact is ON, the register will
be multiplied once in every scan period.
7. If the absolute value of operation result > maximum floating point numbers, the carry flag
M1022=On.
8. If the absolute value of operation result < minimum floating point numbers, the borrow flag
M1021=On.
9. If the operation result equals 0, the zero flag M1020=On.

Program Example 1:
When X0=On, multiply floating point number F1.20000004768372 by F2.20000004768372 and store
the obtained result F2.64000010490417 in register D10 and D11.
X0
DMULR F1.20000004768372 D10 F1.20000004768372 F2.20000004768372

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Program example 2:
When X1=On, store the result of floating point number value (D1, D0)(D11, D10) into registers
assigned by (D21, D20).
X1
D0 D10 D20


Remarks:
DMULR is the new command for V1.4 of PB series model, V1.4 of PC/PA/PH series model.
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API Mnemonic Operands Function
175

D DIVR P

Floating Point Number
Division
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
D

*
DDIVR: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Floating point number dividend S
2
: Floating point number divisor D: Quotient

Explanations:
1. Floating point numbers can be inserted into S
1
and S
2.

2. PB series models do not support pulse execution command (DDIVRP) and index register E and F.
3. DDIVR can directly insert floating point numbers into S
1
and S
2
(e.g. F1.2) or store floating point
numbers in register D.
4. When S
1
and S
2
store floating point numbers in register D, their functions will be the same as in API
123 EDIV.
5. When DDIVR is executing, operand D will store the result obtained from operation of floating point
numbers.
6. If S
2
= 0, false operation is presumed, DDIVR will not execute, M1067, M1068=On, and D1067
records the error code H0E19.
7. If the absolute value of operation result > maximum floating point numbers, the carry flag
M1022=On.
8. If the absolute value of operation result < minimum floating point numbers, the borrow flag
M1021=On.
9. If the operation result equals 0, the zero flag M1020=On.

Program example 1:
When X0=On, divide floating point number F1.20000004768372 by F2.20000004768372 and store the
obtained result F0.545454561710358 in register D10 and D11.
X0
DDIVR F1.20000004768372 D10 F1.20000004768372 F2.20000004768372


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Program example 2:
When X1=On, divide the floating point number value (D1, D0) by (D11, D10) and store the obtained
quotient into registers assigned by (D21, D20).
X1
DDIVR D0 D10 D20


Remarks:
DDIVR is the new command for V1.4 of PB series model, V1.4 of PC/PA/PH series model.
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API Mnemonic Operands Function
180

MAND P

Matrix AND
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * *
D * * * * * *
n * * *
MAND, MANDP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: matrix source device 1 S
2
: matrix source device 2 D: Area where calculated result is stored
n: matrix length (n=K1~K256)
Explanations:
1. Do matrix AND operation to matrix source device 1 and 2 by length of n and save the result in D.
2. The operation rule of matrix AND is: bit is 1 when 2 bits are all 1 otherwise it is 0.
3. S
1
, and S
2
designate KnX, KnY, KnM and KnS; D designates KnYm KnM and KnS
4. PC/PA/PH can designate n = 4. PV can designate n 4 .Program Example:
5. When X0=ON, do MAND and matrix AND operation to 3 rows (D0-D2) of 16-bit register and 3
rows (D10-D12) of 16-bit register. Then save the result in 3 rows (D20-D22) of 16-bit register.
X0
MAND D0 D10 D20 K3

1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0
b15 b0
MAND
1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0
1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0
1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0
1 1 0 0 0 0 0 0 0 0 0 0 0 0
1 1 0 0 0 0 0 0 0 0 0 0 0 0
1 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0
0 0
0 0
Before
Execution
After
Execution
D0
D1
D2
D10
D11
D12
D20
D21
D22

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Points to note:
1. A matrix is made up of 1 and above continuous 16-bit registers. The register number that made up
matrix is called matrix length n. There are 16 X n bits (dots) for a matrix and a bit (dot) once for a
operand unit.
2. 16 X n bits (serial number b
0
b
16n-1
) will be regarded as a set of a serial single point for matrix
instruction. Thus, operate with a specific point in the set not value.
3. The matrix instruction is convenient and important application instruction for dealing with single
point to multi-points or multi-point to multi-point, such as move, copy, compare, search, etc.
4. It usually needs a 16-bit register to designate one point of 16 X n points during matrix operation.
This register calls Pr (pointer). The setting range is 0 16n-1 and correspond to b0 ~ b16n-1 in
matrix individually.
5. There are actions: shift left, shift right or rotate during operation. Large number is defined to left
and small number is defined to right as shown in the following.
1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1
1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1
1 1 0 1 0 0 0 0 0 0 0 0 1 1 0 0
1 1 0 1 0 0 0 0 0 0 0 0 1 1 0 0
b0
b16
b32
b31
b15
b47
D0
D1
D2
b16n-1
1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1
Left
Right
Width is 16-bit
Dn-1
Length is n

Fixed width of matrix is 16-bit.
Pr: matrix pointer. If Pr is 15, it means designated point is b15.
Matrix length is n and n is 1-256.
Example: The matrix that is made up of D0 and n=3, D0=HAAAA, D1=H5555, D2=HAAFF
C
15
C
14
C
13
C
12
C
11
C
10
C
9
C
8
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0

R
0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D0
R
1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D1
R
2
1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 D2
Example: The matrix that is made up of K2X20 and n=3, K2X20=H37, K2X30=H68, K2X40=H45
C
15
C
14
C
13
C
12
C
11
C
10
C
9
C
8
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0

R
0
0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 X
20
~X
27

R
1
0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 X
30
~X
37

R
2
0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 X
40
~X
47

It needs to fill 0 to R0(C
15
-C
8
), R1(C
15
-C
8
), R2(C
15
-C
8
) once the value is empty.
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181

MOR P

Matrix OR
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * *
D * * * * * *
n * * *
MOR, MORP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: matrix source device 1 S
2
: matrix source device 2. D: Area where calculated result is stored
n: matrix length (n=K1~K256)
Explanations:
1. Do matrix OR operation to matrix source device 1 and 2 by length of n and save the result in D.
2. The operation rule of matrix OR is: bit is 1 when one of 2 bits is 1 and only 2 bits are 0 bit will be 0.
3. If use KnX, KnY, KnM, KnS bit device in S
1
, S
2
, D operands, only indicates n=4.
Program Example:
When X0=ON, do MOR and matrix OR operation to 3 rows (D0-D2) of 16-bit register and 3 rows
(D10-D12) of 16-bit register. Then save the result in 3 rows (D20-D22) of 16-bit register.
X0
MOR D0 D10 D20 K3

1
1 1 0 0 0 1 1 0 0 0 0
1 1 0 0 0 1 1 0 0 0 0
1 1 0 0 0 1 1 0 0 0 0
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1 1 0 0 1 1 0 0
1 1 0 0 1 1 0 0
1 1 0 0 1 1 0 0
1
1
1
1
1
1
1
1
1
1
1
1
1 1 1 1
1
1
1
1
1
1
1
1
b15 b0
MOR
Before
Execution
After
Execution
D0
D1
D2
D10
D11
D12
D20
D21
D22


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API Mnemonic Operands Function
182

MXOR P

Matrix XOR
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * *
D * * * * * *
n * * *
MXOR, MXORP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: matrix source device 1 S
2
: matrix source device 2 D: Area where calculated result is stored
n: matrix length (n=K1~K256)
Explanations:
1. Do matrix XOR operation to matrix source device 1 and 2 by length of n and save the result in D.
2. The operation rule of matrix XOR is: bit is 1 when 2 bits are different otherwise it is 0.
3. If use KnX, KnY, KnM, KnS bit device in S
1
, S
2
, D operands, PC/PA/PH indicates n=4, PV can
designate n 4 .
Program Example:
When X0=ON, do MXOR and matrix XOR operation to 3 rows (D0-D2) of 16-bit register and 3 rows
(D10-D12) of 16-bit register. Then save the result in 3 rows (D20-D22) of 16-bit register.
X0
MXOR D0 D20 K3 D10

Before
Execution
After
Execution
1
1 1 0 0 0 1 1 0 0 0 0
1 1 0 0 0 1 1 0 0 0 0
1 1 0 0 0 1 1 0 0 0 0
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1 0 0 1 0 0
1 0 0 1 0 0
1 0 0 1 0 0
1
1
1
1
1
1
1 1 1 1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
b15 b0
MXOR
D0
D1
D2
D10
D11
D12
D20
D21
D22

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183

MXNR P

Matrix XNR
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * *
D * * * * * *
n * * *
MXNR, MXNRP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: matrix source device 1 S
2
: matrix source device 2 D: Area where calculated result is stored
n: matrix length (K1~K256)
Explanations:
1. Do matrix XNR operation to matrix source device 1 and 2 by length of n and save the result in D.
2. The operation rule of matrix XNR is: bit is 1 when 2 bits are the same otherwise it is 0.
3. If use KnX, KnY, KnM, KnS bit device in S
1
, S
2
, D operands, PC/PA/PH indicates n=4, PV can
designate n 4 .
Program Example:
When X0=ON, do MXNR and matrix XNR operation to 3 rows (D0-D2) of 16-bit register and 3 rows
(D10-D12) of 16-bit register. Then save the result in 3 rows (D20-D22) of 16-bit register.
X0
MXNR D0 D20 K3 D10

Before
Execution
After
Execution
1
1 1 0 0 0 1 1 0 0 0 0
1 1 0 0 0 1 1 0 0 0 0
1 1 0 0 0 1 1 0 0 0 0
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1 0 0 0
1 0 0 0
1 0 0 0
1
1
1
1 1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
b15 b0
MXNR
D0
D1
D2
D10
D11
D12
D20
D21
D22

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API Mnemonic Operands Function
184

MINV P

Matrix Inverse
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
D * * * * * *
n * * *
MINV, MINVP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Matrix source device D: result n : matrix length (K1~K256)
Explanations:
1. Do matrix inverse operation to matrix source device 1 by length of n and save the result in D.
2. If use KnX, KnY, KnM, KnS bit device in S, D operands, PC/PA/PH indicates n=4, PV can
designate n 4 .
Program Example:
When X0=ON, do MINV operation to 3 rows (D0-D2) of 16-bit register and 3 rows (D10-D12) of 16-bit
register. Then save the result in 3 rows (D20-D22) of 16-bit register.
X0
MINV D0 D20 K3

Before
Execution
After
Execution
0
0
0
1 1
1
1
1
1
0
0
0
0
0
0
1 1
1
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
b15 b0
MINV
D0
D1
D2
D20
D21
D22


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185

MCMP P

Matrix Compare
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * *
n * * *
D * * * * * * * *
MCMP, MCMPP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: matrix source device 1 S
2
: matrix source device 2 n: matrix length (K1~K256)
D: pointer Pr, save target address
Explanations:
1. For each comparison, it will compare each bit of S
1
with S
2
from address Pr. This instruction
compares every bit in S
1
with every bit in S
2
starting from location D and finds out the location of
different bits. The location will be stored in D.
2. You can find the result of comparison from comparison flag M1088. If M1088=1 compare the same
value and M1088=0 for difference. Once comparison attains, it will stop comparing immediately
and set bit search flag M1091=1. When comparison attains the last bit, matrix search end flag
M1089 = ON and comparison attained number is saved in D. For next scan period, it will start
comparing from the first bit and set matrix search start flag M1090=1. When D value exceeds the
usage range, point error flag M1092 =1.
3. It usually needs a 16-bit register to designate one of 16n points in matrix to operate. This register
is called pointer, Pr. This is designated by user and the range is 0~16n-1 that correspond to bit b0
~ b16n-1 individually. You should avoid to change Pr in operation to affect correct comparison
search. If Pr value exceeds this range, matrix pointer error flag M1092 will be 1 and this instruction
wont be executed.
4. Matrix search end flag M1089 and set bit search flag M1091 will be 1 at the same time when
occurring at the same time.
5. If use KnX, KnY, KnM, KnS bit device in S
1
, S
2
operands, PC/PA/PH indicates n=4, PV can
designate n 4 .
6. Flag: M1088-M1092
Program Example:
When X0 is from OFFON, matrix search start flag M1090=0 thus it will start comparing to find the
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different bit from the bit (* mark) that present value +1. (M1088=0 means difference)
When present value of pointer D20=2, it can get following four results (n, o, p, q) when X0 is
executed from OFFON for four times.
1. D20=5, matrix bit search flag M1091=1, matrix search end flag M1089=0.
2. D20=45, matrix bit search flag M1091=1, matrix search end flag M1089=0.
3. D20=47, matrix bit search flag M1091=0, matrix search end flag M1089=1.
4. D20=1, matrix bit search flag M1091=1, matrix search end flag M1089=0.
X0
MCMPP D0 D10 D20 K3

b0
1 0 1 1 0 0 0
1 0 0 0 1 1 0 0 0
1 0 0 0 1 1 0 0
1
1
1
1
1
1
1
1
1
D20
1
1
1
0
0
0
0
0
0
1
1
1
1 0 1 0 1 0 1 0 1 0 1 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0
b47
MCMP
b47
b0
0
0 1
1
1 0
Pointer
D0
D1
D2
D10
D11
D12
2

Explanation for flag signal:
M1088: Matrix comparison flag, if M1088=1, the result of comparison is the same, M1088=0 otherwise.
M1089: Matrix search end flag, when comparing to the last bit, M1089=1.
M1090: Matrix search start flag, start comparing from the first bit, M1090=1.
M1091: Matrix bit search flag, it will stop comparing once comparison attained, M1091=1.
M1092: Matrix pointer error flag, pointer Pr exceeds that range, M1092=1.

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MBRD P

Matrix Bit Read
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
n * * *
D * * * * * * * *
MBRD, MBRDP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: matrix source device n: matrix length (K1~K256). D: pointer Pr, save target address
Explanations:
1. When executing instruction, it will start to see if M1094 (matrix pointer clear flag) is ON. If it is ON,
pointer D will be cleared to 0 and read S from the 0 bit and read ON/OFF state of each bit to
M1095 (matrix rotate/shift/output/carry). It will see if M1093 (matrix pointer increase flag) is ON
after reading a bit. And increase 1 to D if it is ON. When reading to the last bit, M1089 (matrix
search end flag) =ON, pointer D records the number of read bit and then end executing this
instruction.
2. Pr (pointer) is designated by user and the range is 0~16n-1 that correspond to bit b0 ~ b16n-1
individually. If Pr value exceeds this range, matrix pointer error flag M1092 will be 1 and this
instruction wont be executed.
3. If use KnX, KnY, KnM, KnS bit device in S operands, PC/PA/PH indicates n=4, PV can designate
n 4 ..
Program Example:
1. When X0 is from OFFON, pointer clear flag M1094=ON, matrix pointer increase flag M1093=1,
and increase 1 to pointer Pr after reading a bit.
2. When present value of pointer D20=45, it can get following three results (n, o, p) when X0 is
executed from OFFON for three times.
D20=46, matrix rotate/shift/output carry flag M1095=0, matrix search end flag M1089=0.
D20=47, matrix rotate/shift/output carry flag M1095=1, matrix search end flag M1089=0.
D20=47, matrix rotate/shift/output carry flag M1095=1, matrix search end flag M1089=1.
X0
MBRDP D0 D20 K3

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b0
D20
45
1 0 1 0 1 0 1 0 1 0 1 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 1 0 1 0 1 0 1 0 1 0 1 0
b47
0
0 1
0 1
Pointer
D0
D1
D2

Explanation for flag signals:
M1089: Matrix search end flag, when comparing to the last bit, M1089=1.
M1092: Matrix pointer error flag, pointer Pr exceeds that range, M1092=1.
M1093: Matrix pointer increase flag, add 1 to present pointer.
M1094: Matrix pointer clear flag, clear present pointer to 0.
M1095: Matrix rotate/shift/output carry flag.


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MBWR P

Matrix Bit Write
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * * * * * *
n * * *
D

* * * * * * * *
MBWR, MBWRP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: matrix source device n: matrix length (K1~K256) D: pointer Pr, save target address.
Explanations:
1. When executing instruction, it will start to see if M1094 (matrix pointer clear flag) is ON. If it is ON,
pointer D will be cleared to 0 and write M1096 (matrix shift/input complement flag) in the 0 bit of S.
It will see if M1093 (matrix pointer increase flag) is ON after writing a bit. And increase 1 to D if it is
ON. When writing to the last bit, M1089 (matrix search end flag) =ON, pointer D records the
number of read bit and then end executing this instruction. If D exceeds range, M1092=1.
2. Pr (pointer) is designated by user and the range is 0~16n-1 that correspond to bit b0 ~ b16n-1
individually. If Pr value exceeds this range, matrix pointer error flag M1092 will be 1 and this
instruction wont be executed.
3. If KnX, KnY, KnM and KnS are used in operand S and PC/PA/PH indicates n = 4, PV will be able
to designate n 4.
4. Flags: Please refer to explanation for M1089-M1096
Program Example:
1. When X0 is from OFFON, pointer clear flag M1094=OFF, matrix pointer increase flag M1093=1,
and increase 1 to pointer Pr after writing a bit.
2. When present pointer is D20=45, M1096 (matrix shift/input complement flag) =1. When X0 is
executed once from OFFON, it can get following result:
X0
MBWRP D0 K3 D20

6. I nst ruct i on Set

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1
b0
0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0
b47
D20 45
1
1
M1096
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0
1
0
1
b47
D20
45
Before
Execution
After
Execution
Pointer
Pointer
(Matrix shift/input complement flag)
D0
D1
D2
D0
D1
D2

Explanation for flag signals:
M1089: Matrix search end flag, when comparing to the last bit, M1089=1.
M1092: Matrix pointer error flag, pointer Pr exceeds that range, M1092=1.
M1093: Matrix pointer increase flag, add 1 to present pointer.
M1094: Matrix pointer clear flag, clear present pointer to 0.
M1096: Matrix shift/input complement flag

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188

MBS P

Matrix Bit Shift
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
D * * * * * *
n * * *
MBS, MBSP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: matrix source device D: result n: matrix length (K1~K256)
Explanations:
1. This instruction is used to shift S to left or right by matrix length. M1097=0 moves to left and
M1097=1 moves to right. It needs to use the state of M1096 (complement flag) to fill the empty bit
(shift to left is b0 and shift to right is b16n-1) due to shift for each bit. If there is one more bit due to
shift (shift to left is b16n-1 and shift to right is b0), it needs to send the state to M1095 (carry flag)
and save the result in D.
2. This instruction works best when used as a pulse instruction (MBSP).
3. If KnX, KnY, KnM and KnS are used in operand S and D and PC/PA/PH indicates n = 4, PV will be
able to designate n 4.
4. Flags:
M1095: matrix rotate/shift/output carry flag
M1096: matrix shift/input complement flag
M1097: matrix rotate/shift direction flag
Program Example 1:
When X0=ON, M1097=OFF means shift matrix to left. Setting complement flag M1096=0, shift 16-bit
registers D0~D2 to left and save the result in 16-bit register D20~D22 and carry flag M1095 will be 1.
X0
RST
MBSP D0 D20 K3
M1097

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Before
Execution
After shifting
to left
1
b0
0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0
b15
0
0
0
M1096
1 0 1 0 1 0 1 0 1 0 1 0 1 0 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0 0
0
1
M1095
M1095
MBS
M1097=0
D0
D1
D2
D0
D1
D2
D20
D21
D22

Program Example 2:
When X1=ON, M1097=ON to shift matrix to right. Setting complement flag M1096=1, shift 16-bit
registers D0~D2 to right and save the result to 16-bit registers D20~D22 and carry flag M1095 will be 0.
X1
M1097
MBSP D0 D20 K3

1
b0
0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0
b15
0
0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 1 1 0 1 0 1 0 1 0 1 0 1 0 0
0 0
M1095
M1095
MBS
M1097=1
1
1
M1096
Before
Execution
After rotating
to right
D0
D1
D2
D20
D21
D22


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189

MBR P

Matrix Bit Rotator
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
D * * * * * *
n * * *
MBR, MBRP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: matrix source device D: result n: matrix length (K1~K256)
Explanations:
1. This instruction is used to rotate S to right or left by matrix length. M1097=0 moves to left and
M1097=1 moves to right. The empty bit (rotate to left is b0 and shift to right is b16n-1) due to
rotation will be filled by the bit (rotate to left is b16n-1 and shift to right is b0) that rotated out and
save the result in D. The bit that is rotated out is not only used to fill the empty bit but also send its
state to carry flag M1095.
2. This instruction works best when used as a pulse instruction (MBRP).
3. If KnX, KnY, KnM and KnS are used in operand S and D and PC/PA/PH indicates n = 4, PV will be
able to designate n 4.
4. Flags:
M1095: matrix rotate/shift/output carry flag
M1097: matrix rotate/shift direction flag
Program Example 1:
When X0=ON, M1097=OFF means rotate matrix to left. To rotate 16-bit registers D0-D2 to left and save
the result in 16-bit register D20-D22. The carry flag M1095 will be 1.
X0
MBRP D0 D20 K3
RST M1097

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Before
Execution
After rotating to left
1
B0
0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0
b15
0
0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0 0
0
1
M1095
M1095
MBR
M1097=0
D0
D1
D2
D20
D21
D22

Program Example 2:
When X1=ON, M1097=ON to rotate matrix to right. To rotate 16-bit registers D0~D2 to right and save
the result to 16-bit registers D20~D22 . The carry flag M1095 will be 0.
X1
MBRP D0 D20 K3
M1097

Before
Execution
After rotating
to right
M1097=1
1
b0
0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0
b15
0
0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
1 0 1 1 0 1 0 1 0 1 0 1 0 1 0 0
0 0
M1095
M1095
MBR
D0
D1
D2
D20
D21
D22


ELC Syst em Manual


6- 394
API Mnemonic Operands Function
190

MBC P

Matrix Bit State Count
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * * * * * * *
n * * *
D * * * * * * * *
MBC, MBCP: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Matrix source device n: matrix length (K1~K256) D: result
Explanations:
1. To count number of bit 1 or bit 0 by matrix length n and number in D.
2. If KnX, KnY, KnM and KnS are used in operand S and D and PC/PA/PH indicates n = 4, PV will be
able to designate n 4.
3. Flags:
M1098: matrix count by bit 1 or bit 0 flag
M1099: it is ON when counted result is 0.
When M1098=1, count the number of bit 1. And count the number of bit 0 when M1098=0. If
counting result is 0, M1099=1.
Program Example:
When X0=ON, it counts bit 1 number of D0~D2 and save the total number in D10. When M1098=0, it
counts bit 0 number of D0~D2 and save the total number in D10.
X0
MBC D0 K3 D10

1 1 1 1 1 1 0 1
1 1 1 1 1 1 0 1 0
1 1 1 1 1 1 0 1 0
0
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
M1098=0
36 M1098=1
D0
D1
D2
D10
D10

6. I nst ruct i on Set

6- 395
API Mnemonic Operands Function
191

D PPMR
2-Axis Relative Point
to Point Motion
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S * * *
D *
DPPMR: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Number of output pulses of X axis S
2
: Number of output pulses of Y axis S: Max. point to point
output frequency D: Pulse output device
Explanations:
1. Flags: M1029, M1030, M1334, M1335. See remarks for more details.
2. This instruction only supports PV series . In terms of pulse output methods, this instructin only
supports pulse + direction mode.
3. S
1
and S
2
are the designated (relative designation) number of output pulses in X axis (Y0 or Y4)
and Y axis (Y2 or Y6). The range of the number is -2,147,483,648 ~ +2,147,483,647 (+/-
represents the forward/backward direction). When in forward direction, the pulse present value
registers CH0 (D1337 high word, D1336 low word), CH1 (D1339 high word, D1338 low word),
CH2 (D1376 high word, D1375 low word) and CH3 (D1378 high word, D1377 low word) will
increase. When in backward direction, the present value will decrease.
4. D can designate Y0 and Y4.
When Y0 is designated:
Y0 refers to 1
st
group X-axis pulse output device.
Y1 refers to 1
st
group X-axis direction signal.
Y2 refers to 1
st
group Y-axis pulse output device.
Y3 refers to 1
st
group Y-axis direction signal.
Y4 refers to 2
nd
group X-axis pulse output device.
Y5 refers to 2
nd
group X-axis direction signal.
Y6 refers to 2
nd
group Y-axis pulse output device.
Y7 refers to 2
nd
group Y-axis direction signal.
When direction signal outputs, Off will not occur immediately after the pulse output is over.
Direction signal will turn Off when the drive contact is Off.
5. D1340 (D1379) refers to the settings of the start/end frequencies of the 1
st
/2
nd
2-axis motion.
ELC Syst em Manual


6- 396
D1343 (D1381) refers to the time of the first acceleration segment and last deceleration segment
of the 1
st
/2
nd
2-axis motion. The time shall be longer than 10ms. If the time is shorter than 10ms or
longer than 10,000ms, the output will be operated for 10ms. Default setting = 100ms.
6. When the 2-axis synchronous motion instruction is enabled, the start frequency and
acceleration/deceleration time in Y axis will be same as the settings in X axis.
7. There shall be at least 59 output pulses for the 2-axis operation to ensure the line drawn is straight
enough.
8. There is no limitation on the number of times using the instruction. However, assume CH1 or CH2
output is in use, the 1st group X/Y axis will not be able to output. If CH3 or CH4 output is in use,
the 2nd group X/Y axis will not be able to output.
Program Example:
1. Draw a rhombus as the figure below.
(0, 0)
(-27000,-27000)
(0, -55000)
(27000,-27000)
X
Y

2. Steps:
a) Set the four coordinates (0,0), (-27000, -27000), (0, -55000), (27000, -27000) (as the figure
above). Calculate the relative coordinates of the four points and obtain (-27000, -27000),
(27000, -28000), (27000, 27000), and (-27000, 27000). Place them in the 32-bit (D200, D202),
(D204, D206), (D208, D210), (D212, D214).
b) Write program codes as follows.
c) ELC RUN. Set M0 as On and start the 2-axis line drawing.
6. I nst ruct i on Set

6- 397
M0
RST
= D0 K1 DPPMR D200 D202 K100000 Y0
= D0 K2 DPPMR D204 D206 K100000 Y0
= D0 K3 DPPMR D208 D210 K100000 Y0
= D0 K4 DPPMR D212 D214 K100000 Y0
MOV D0
M0
INCP
END
M1029
D0
M1029
K1

3. Motion explanation:
When ELC RUN and M0 = On, ELC will start the first point-to-point motion by 100KHz. The content
in D0 will add 1 whenever a point-to-point motion is completed and the second point-to-point motion
will start to execute automatically. The same motion will keep executing until the fourth
point-to-point motion is completed.
Remarks:
1. Flag explanations:
M1029 On when the 1
st
group 2-axis pulse output is completed.
M1036 On when the 2
nd
group 2-axis pulse output is completed.
M1334 On when the 1
st
group 2-axis pulse output is forbidden.
M1336 1
st
group 2-axis pulse output indication flag
M1520 On when the 2
nd
group 2-axis pulse output is forbidden.
M1522 2
nd
group 2-axis pulse output indication flag
2. Special register explanations:
D1336,
D1337
: Pulse present value register for Y0 output of the 1
st
group X-axis motion. The
present value increases or decreases following the rotation direction. (D1337 high
word; D1336 low word)
D1338,
D1339
: Pulse present value register for Y2 output of the 1
st
group Y-axis motion. The
present value increases or decreases following the rotation direction. (D1339 high
word; D1338 low word)
ELC Syst em Manual


6- 398
D1340 : Frequency settings of the first acceleration and last deceleration segment for the Y0
output of the 1
st
group X-axis motion and Y2 of the Y-axis motion for API 191
DPPMR and API 192 DPPMA.
D1343 : Time settings of the first acceleration and last deceleration segment for the Y0
output of the 1
st
group X-axis motion and Y2 of the Y-axis motion for API 191
DPPMR and API 192 DPPMA.
D1375,
D1376
: Pulse present value register for Y4 output of the 2
nd
group X-axis motion. The
present value increases or decreases following the rotation direction. (D1337 high
word; D1336 low word)
D1377,
D1378
: Pulse present value register for Y6 output of the 2
nd
group Y-axis motion. The
present value increases or decreases following the rotation direction. (D1339 high
word; D1338 low word)
D1379 : Frequency settings of the first acceleration and last deceleration segment for the Y4
output of the 2
nd
group X-axis motion and Y6 of the Y-axis motion for API 191
DPPMR and API 192 DPPMA.
D1381 : Time settings of the first acceleration and last deceleration segment for the Y4
output of the 2
nd
group X-axis motion and Y6 of the Y-axis motion for API 191
DPPMR and API 192 DPPMA.
6. I nst ruct i on Set

6- 399
API Mnemonic Operands Function
192

D PPMA
2-Axis Absolute Point
to Point Motion
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S * * *
D *
DPPMA: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Number of output pulses of X axis S
2
: Number of output pulses of Y axis S: Max. point to
point output frequency D: Pulse output device
Explanations:
1. Flags: M1029, M1030, M1334, M1335. See remarks of API 191 DPPMR for more details.
2. This instruction only supports PV series . In terms of pulse output methods, this instruction only
supports pulse + direction mode.
3. S
1
and S
2
are the designated (absolute designation) number of output pulses in X axis (Y0 or Y4)
and Y axis (Y2 or Y6). The range of the number is -2,147,483,648 ~ +2,147,483,647 (+/- represents
the forward/backward direction). When in forward direction, the pulse present value registers CH0
(D1337 high word, D1336 low word), CH1 (D1339 high word, D1338 low word), CH2 (D1376 high
word, D1375 low word) and CH3 (D1378 high word, D1377 low word) will increase. When in
backward direction, the present value will decrease.
4. D can designate Y0 and Y4.
When Y0 is designated:
Y0 refers to 1
st
group X-axis pulse output device.
Y1 refers to 1
st
group X-axis direction signal.
Y2 refers to 1
st
group Y-axis pulse output device.
Y3 refers to 1
st
group Y-axis direction signal.
Y4 refers to 2
nd
group X-axis pulse output device.
Y5 refers to 2
nd
group X-axis direction signal.
Y6 refers to 2
nd
group Y-axis pulse output device.
Y7 refers to 2
nd
group Y-axis direction signal.
When direction signal outputs, Off will not occur immediately after the pulse output is over. Direction
signal will turn Off when the drive contact is Off.
ELC Syst em Manual


6- 400
5. D1340 (D1379) refers to the settings of the start/end frequencies of the 1
st
/2
nd
2-axis motion. D1343
(D1381) refers to the time of the first acceleration segment and last deceleration segment of the
1
st
/2
nd
2-axis motion. The time shall be longer than 10ms. If the time is shorter than 10ms or longer
than 10,000ms, the output will be operated at 10ms. Default setting = 100ms.
6. When the 2-axis synchronous motion instruction is enabled, the start frequency and
acceleration/deceleration time in Y axis will be same as the settings in X axis.
7. The number of the output pulses in the 2-axis operation shall not be 1 ~ 59 to ensure the line drawn
is straight enough.
8. There is no limitation on the number of times using the instruction. However, assume CH1 or CH2
output is in use, the 1
st
group X/Y axis will not be able to output. If CH3 or CH4 output is in use, the
2
nd
group X/Y axis will not be able to output.
Program Example:
1. Draw a rhombus as the figure below.
(0, 0)
(-27000,-27000)
(0, -55000)
(27000,-27000)
X
Y

2. Steps:
a) Set the four coordinates (0,0), (-27000, -27000), (0, -55000), (27000, -27000) (as the figure
above). Place them in the 32-bit (D200, D202), (D204, D206), (D208, D210), (D212, D214).
b) Write program codes as follows.
c) ELC RUN. Set M0 as On and start the 2-axis line drawing.
6. I nst ruct i on Set

6- 401
M0
RST
= D0 K1 DPPMA D200 D202 K100000 Y0
= D0 K2 DPPMA D204 D206 K100000 Y0
= D0 K3 DPPMA D208 D210 K100000 Y0
= D0 K4 DPPMA D212 D214 K100000 Y0
MOV D0
M0
INCP
END
M1029
D0
M1029
K1
ZRST D1336 D1339

3. Motion explanation:
When ELC RUN and M0 = On, ELC will start the first point-to-point motion by 100KHz. The content
in D0 will add 1 whenever a point-to-point motion is completed and the second point-to-point motion
will start to execute automatically. The same motion will keep executing until the fourth
point-to-point motion is completed.
ELC Syst em Manual


6- 402
API Mnemonic Operands Function
193

D CIMR
2-Axis Relative Position
Arc Interpolation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S *
D *
DCIMR: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S1: Number of output pulses of X axis S2: Number of output pulses of Y axis S: Parameter
setting D: Pulse output device
Explanations:
1. Flags: M1029, M1030, M1334, M1335. See remarks of API 191 DPPMR for more details.
2. This instruction only supports PV series . In terms of pulse output methods, this instruction only
supports pulse + direction mode.
3. S
1
and S
2
are the designated (relative designation) number of output pulses in X axis (Y0 or Y4) and
Y axis (Y2 or Y6). The range of the number is -2,147,483,648 ~ +2,147,483,647 (+/- represents the
forward/backward direction). When in forward direction, the pulse present value registers CH0
(D1337 high word, D1336 low word), CH1 (D1339 high word, D1338 low word), CH2 (D1376 high
word, D1375 low word) and CH3 (D1378 high word, D1377 low word) will increase. When in
backward direction, the present value will decrease.
4. The lower 16 bits of S (settings of direction and resolution): K0 refers to clockwise 10-segment
(average resolution) output; K2 refers to clockwise 20-segment (higher resolution) output and a 90
arc can be drawn (see figure 1 and 2). K1 refers to counterclockwise 10-segment (average
resolution) output; K3 refers to counterclockwise 20-segment (higher resolution) output and a 90
arc can be drawn (see figure 3 and 4).
5. The higher 16 bits of S (settings of motion time): K1 refers to 0.1 second. The setting range for
average resolution is K1 ~ K100 (0.1 sec. ~ 10 secs.), for higher resolution is K2 ~ K200 (0.2 sec. ~
20 secs.) This instruction is restricted by the maximum pulse output frequency; therefore when the
set time goes faster than the actual output time, the set time will be automatically modified.
6. I nst ruct i on Set

6- 403
(0, 0)
X
Y
(S , S )
1 2
1
0

s
e
g
m
e
n
t
s
10 segment s
Figur e 1
(0, 0)
X
Y
(S , S )
1 2
2
0

s
e
g
m
e
n
t
s
20 segment s
Figur e 2

(0, 0)
X
Y
(0, 0)
X
Y
(S , S )
1 2 (S , S )
1 2
1
0

s
e
g
m
e
n
t
s
10 segment s
2
0

s
e
g
m
e
n
t
s
20 segment s
Figur e 3 Figur e 4

6. D can designate Y0 and Y4.
When Y0 is designated:
Y0 refers to 1
st
group X-axis pulse output device.
Y1 refers to 1
st
group X-axis direction signal.
Y2 refers to 1
st
group Y-axis pulse output device.
Y3 refers to 1
st
group Y-axis direction signal.
When Y4 is designated:
Y4 refers to 2
nd
group X-axis pulse output device.
Y5 refers to 2
nd
group X-axis direction signal.
Y6 refers to 2
nd
group Y-axis pulse output device.
Y7 refers to 2
nd
group Y-axis direction signal.
When direction signal outputs, Off will not occur immediately after the pulse output is over. Direction
signal will turn Off when the drive contact is Off.
7. Draw four 90 arcs.
8. When the direction signal is On, the direction is positive. When the direction signal is Off, the
direction is negative. When S is set as K0, K2, the arcs will be clockwise (see figure 5). When S is
set as K1, K3, the arcs will be counterclockwise (see figure 6).
ELC Syst em Manual


6- 404
Y
X
Y
X
Quadrant I
Quadrant II
Quadrant II I
Quadrant IV
Quadrant I
Quadrant II
Quadrant II I
Quadrant IV
Figur e 5 Figur e 6

9. When the 2-axis motion is being executed in 10 segments (of average resolution), the operation
time of the instruction when the instruction is first enabled is approximately 5ms. The number of
output pulses cannot be less than 100 and more than 1,000,000; otherwise, the instruction cannot
be enabled.
10. When the 2-axis motion is being executed in 20 segments (of high resolution), the operation time of
the instruction when the instruction is first enabled is approximately 10ms. The number of output
pulses cannot be less than 1,000 and more than 10,000,000; otherwise, the instruction cannot be
enabled.
11. If you wish the number of pulses in 10-segment or 20-segment motion to be off the range, you may
adjust the gear ratio of the servo for obtaining your desired number.
12. Every time when the instruction is executed, only one 90 arc can be drawn. It is not necessary that
the arc has to be a precise arc, i.e. the numbers of output pulses in X and Y axes can be different.
13. There are no settings of start frequency and acceleration/deceleration time.
14. There is no limitation on the number of times using the instruction. However, assume CH1 or CH2
output is in use, the 1
st
group X/Y axis will not be able to output. If CH3 or CH4 output is in use, the
2
nd
group X/Y axis will not be able to output.
15. The settings of direction and resolution in the lower 16 bits of S can only be K0 ~ K3.
16. The settings of motion time in the high 16 bits of S can be slower than the the fastest suggested
time but shall not be faster than the fastest suggested time.
17. The fastest suggested time for the arc interpolation:
Segments Max. target position (pulse) Fastest suggested set time (unit:100ms)
100 ~ 10,000 1
10,001 ~ 19,999 2
: :
Average
resolution
Less than 1,000,000 Less than 100
1,000 ~ 20,000 2
20,000 ~ 29,999 3
Higher
resolution
: :
6. I nst ruct i on Set

6- 405
Less than 10,000,000 Less than 200
Program Example 1:
1. Draw an ellipse as the figure below.
Y
X
( ) 1600,2200
( ) 3200,0
( ) 0,0
(1600,-2200)

2. Steps:
a) Set the four coordinates (0,0), (1600, 2200), (3200, 0), (1600, -2200) (as the figure above).
Calculate the relative coordinates of the four points and obtain (1600, 2200), (1600, -2200),
(-1600, -2200), and (-1600, 2200). Place them in the 32-bit (D200, D202), (D204, D206), (D208,
D210), (D212, D214).
b) Select draw clockwise arc and average resolution (S = K0).
c) Write program codes as follows.
d) ELC RUN. Set M0 as On and start the drawing of the ellipse.
M0
RST
= D0 K1 D200 D202 K0 Y0
= D0 K2 D204 D206 Y0
= D0 K3 D208 D210 Y0
= D0 K4 D212 D214 Y0
MOV D0
M0
INCP
END
M1029
D0
M1029
K1
K0
K0
K0
DCIMR
DCIMR
DCIMR
DCIMR

3. Motion explanation:
When ELC RUN and M0 = On, ELC will start the drawing of the first segment of the arc. The content
in D0 will add 1 whenever a segment of arc is completed and the second segment of the arc will
start to execute automatically. The same motion will keep executing until the fourth segment of arc
ELC Syst em Manual


6- 406
is completed.
Program Example 2:
1. Draw a tilted ellipse as the figure below.
Y
X
(0,0)
(26000,26000)
(34000,18000)
(8000,- 8000)

2. Steps:
a) Find the max. and min. coordinates on X and Y axes (0,0), (26000,26000), (34000,18000),
(8000,-8000) (as the figure above). Calculate the relative coordinates of the four points and
obtain (26000,26000)(8000,-8000)(-26000,-26000), (-8000,8000). Place them respectively in
the 32-bit (D200,D202), (D204,D206), (D208,D210) and (D212,D214).
b) Select draw clockwise arc and average resolution (S = K0).
c) Select DCIMR instruction for drawing arc and write program codes as follows.
d) ELC RUN. Set M0 as On and start the drawing of the ellipse.
M0
RST
= D0 K1 D200 D202 K0 Y0
= D0 K2 D204 D206 Y0
= D0 K3 D208 D210 Y0
= D0 K4 D212 D214 Y0
MOV D0
M0
INCP
END
M1029
D0
M1029
K1
K0
K0
K0
DCIMR
DCIMR
DCIMR
DCIMR

3. Motion explanation:
When ELC RUN and M0 = On, ELC will start the drawing of the first segment of the arc. The content
in D0 will add 1 whenever a segment of arc is completed and the second segment of the arc will
start to execute automatically. The same motion will keep executing until the fourth segment of arc
is completed.
6. I nst ruct i on Set

6- 407
API Mnemonic Operands Function
194

D CIMA
2-Axis Absolute Position
Arc Interpolation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S *
D *
DCIMA: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S1: Number of output pulses of X axis S2: Number of output pulses of Y axis S: Parameter
setting D: Pulse output device
Explanations:
1. Flags: M1029, M1030, M1334, M1335. See remarks of API 191 DPPMR for more details.
2. This instruction only supports PV series . In terms of pulse output methods, this instructin only
supports pulse + direction mode.
3. S
1
and S
2
are the designated (absolute designation) number of output pulses in X axis (Y0 or Y4)
and Y axis (Y2 or Y6). The range of the number is -2,147,483,648 ~ +2,147,483,647. When S
1
and
S
2
are larger than pulse present value registers CH0 (D1337 high word, D1336 low word), CH1
(D1339 high word, D1338 low word), CH2 (D1376 high word, D1375 low word), and CH3 (D1378
high word, D1377 low word), the output direction will be positive and direction signals Y1, Y3, Y5,
Y7 will be On. When S
1
and S
2
are less than pulse present value registers, the output direction will
be negative and direction signals Y1, Y3, Y5, Y7 will be Off.
4. The lower 16 bits of S (settings of direction and resolution): K0 refers to clockwise 10-segment
(average resolution) output; K2 refers to clockwise 20-segment (higher resolution) output and a 90
arc can be drawn (see figure 1 and 2). K1 refers to counterclockwise 10-segment (average
resolution) output; K3 refers to counterclockwise 20-segment (higher resolution) output and a 90
arc can be drawn (see figure 3 and 4).
5. The higher 16 bits of S (settings of motion time): K0 refers to 0.1 second. The setting range for
average resolution is K1 ~ K100 (0.1 sec. ~ 10 secs.), for higher resolution is K2 ~ K200 (0.2 sec. ~
20 secs.) This instruction is restricted by the maximum pulse output frequency; therefore when the
set time goes faster than the actual output time, the set time will be automatically modified.
ELC Syst em Manual


6- 408
(0, 0)
X
Y
(S , S )
1 2
1
0

s
e
g
m
e
n
t
s
10 segment s
Figur e 1
(0, 0)
X
Y
(S , S )
1 2
2
0

s
e
g
m
e
n
t
s
20 segment s
Figur e 2

(0, 0)
X
Y
(0, 0)
X
Y
(S , S )
1 2 (S , S )
1 2
1
0

s
e
g
m
e
n
t
s
10 segment s
2
0

s
e
g
m
e
n
t
s
20 segment s
Figur e 3 Figur e 4

6. D can designate Y0 and Y4.
When Y0 is designated:
Y0 refers to 1
st
group X-axis pulse output device.
Y1 refers to 1
st
group X-axis direction signal.
Y2 refers to 1
st
group Y-axis pulse output device.
Y3 refers to 1
st
group Y-axis direction signal.
When Y4 is designated:
Y4 refers to 2
nd
group X-axis pulse output device.
Y5 refers to 2
nd
group X-axis direction signal.
Y6 refers to 2
nd
group Y-axis pulse output device.
Y7 refers to 2
nd
group Y-axis direction signal.
When direction signal outputs, Off will not occur immediately after the pulse output is over. Direction
signal will turn Off when the drive contact is Off.
7. Draw four 90 arcs.
8. When the direction signal is On, the direction is positive. When the direction signal is Off, the
direction is negative. When S is set as K0, K2, the arcs will be clockwise (see figure 5). When S is
set as K1, K3, the arcs will be counterclockwise (see figure 6).
6. I nst ruct i on Set

6- 409
Y
X
Y
X
Quadrant I
Quadrant II
Quadrant II I
Quadrant IV
Quadrant I
Quadrant II
Quadrant II I
Quadrant IV
Figur e 5 Figur e 6

9. When the 2-axis motion is being executed in 10 segments (of average resolution), the operation
time of the instruction when the instruction is first enabled is approximately 5ms. The number of
output pulses cannot be less than 100 and more than 1,000,000; otherwise, the instruction cannot
be enabled.
10. When the 2-axis motion is being executed in 20 segments (of high resolution), the operation time of
the instruction when the instruction is first enabled is approximately 10ms. The number of output
pulses cannot be less than 1,000 and more than 10,000,000; otherwise, the instruction cannot be
enabled.
11. If you wish the number of pulses in 10-segment or 20-segment motion to be off the range, you may
adjust the gear ratio of the servo for obtaining your desired number.
12. Every time when the instruction is executed, only one 90 arc can be drawn. It is not necessary that
the arc has to be a precise arc, i.e. the numbers of output pulses in X and Y axes can be different.
13. There are no settings of start frequency and acceleration/deceleration time.
14. There is no limitation on the number of times using the instruction. However, assume CH1 or CH2
output is in use, the 1
st
group X/Y axis will not be able to output. If CH3 or CH4 output is in use, the
2
nd
group X/Y axis will not be able to output.
15. The settings of direction and resolution in the lower 16 bits of S can only be K0 ~ K3.
16. The settings of motion time in the high 16 bits of S can be slower than the the fastest suggested
time but shall not be faster than the fastest suggested time.
17. The fastest suggested time for the arc interpolation:
Segments Max. target position (pulse) Fastest suggested set time (unit:100ms)
100 ~ 10,000 1
10,001 ~ 19,999 2
: :
Average
resolution
Less than 1,000,000 Less than 100
1,000 ~ 20,000 2
Higher
resolution
20,000 ~ 29,999 3
ELC Syst em Manual


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: :
Less than 10,000,000 Less than 200
Program Example 1:
1. Draw an ellipse as the figure below.
Y
X
( ) 16000,22000
( ) 32000,0
( ) 0,0
(16000,- 22000)

2. Steps:
a) Set the four coordinates (0,0), (16000, 22000), (32000, 0), (16000, -22000) (as the figure
above). Place them in the 32-bit (D200, D202), (D204, D206), (D208, D210), (D212, D214).
b) Select draw clockwise arc and average resolution (S = K0).
c) Select DCIMA instruction for drawing arc and write program codes as follows.
d) ELC RUN. Set M0 as On and start the drawing of the ellipse.
M0
RST
= D0 K1 D200 D202 K0 Y0
= D0 K2 D204 D206 Y0
= D0 K3 D208 D210 Y0
= D0 K4 D212 D214 Y0
MOV D0
M0
INCP
END
M1029
D0
M1029
K1
K0
K0
K0
DCIMA
DCIMA
DCIMA
DCIMA
ZRST D1336 D1339

3. Motion explanation:
When ELC RUN and M0 = On, ELC will start the drawing of the first segment of the arc. The content
in D0 will add 1 whenever a segment of arc is completed and the second segment of the arc will
6. I nst ruct i on Set

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start to execute automatically. The same motion will keep executing until the fourth segment of arc
is completed.
Program Example 2:
1. Draw a tilted ellipse as the figure below.
Y
X
(0,0)
(26000,26000)
(34000,18000)
(8000,- 8000)

2. Steps:
a) Find the max. and min. coordinates on X and Y axes (0,0), (26000,26000), (34000,18000),
(8000,-8000) (as the figure above). Place them respectively in the 32-bit (D200,D202),
(D204,D206), (D208,D210) and (D212,D214).
b) Select draw clockwise arc and average resolution (S = K0).
c) Select DCIMA instruction for drawing arc and write program codes as follows.
d) ELC RUN. Set M0 as On and start the drawing of the ellipse.
M0
RST
= D0 K1 D200 D202 K0 Y0
= D0 K2 D204 D206 Y0
= D0 K3 D208 D210 Y0
= D0 K4 D212 D214 Y0
MOV D0
M0
INCP
END
M1029
D0
M1029
K1
K0
K0
K0
DCIMA
DCIMA
DCIMA
DCIMA
ZRST D1336 D1339

3. Motion explanation:
When ELC RUN and M0 = On, ELC will start the drawing of the first segment of the arc. The content
in D0 will add 1 whenever a segment of arc is completed and the second segment of the arc will
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start to execute automatically. The same motion will keep executing until the fourth segment of arc
is completed.
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API Mnemonic Operands Function
195

D PTPO
Single-Axis Pulse Output by
Table
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
*
S
2
*
D *
DPTPO: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Source start device S
2
: Number of segments D: Pulse output device
Explanations:
1. Flags: M1029, M1030, M1334, M1335. See remarks for more details.
2. This instruction only supports PV series .
3. According to the value of S
2
+ 0, every segment consecutively occupy four register D. (S
1
+ 0) refers
to output frequency. (S
1
+ 2) refers to the number of output pulses.
4. When the output frequency of S
1
is less than 1, ELC will automatically modify it as 1. When the
value is larger than 200,000KHz, ELC will automatically modify it as 200,000KHz.
5. S
2
+ 0: number of segments (range: 1 ~ 60). S
2
+ 1: number of segments being executed.
Whenever the program scans to this instruction, the instruction will automatically update the
segment No. that is currently being executed.
6. D can only designate output devices Y0, Y2, Y4 and Y6 and can only perform pulse output control.
For the pin for direction control, the user has to compile other programs to control.
7. This instruction does not offer acceleration and deceleration functions. Therefore, when the
instruction is disabled, the output pulses will stop immediately.
8. In every program scan, each channel can only be executed by one instruction. However, there is no
limitation on the number of times using this instruction.
9. When the instruction is being executed, the user is not allowed to update the frequency or number
of the segments. Changes made will not be able to make changes in the actual output.
Program Example:
1. When X0 = On, the output will be operated according to the set frequency and number of pulses in
every segment.
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2. Format of the table:
S
2
= D300, number of
segments (D300 = K60)
S
1
= D0, frequency (S
1
+ 0) S
1
= D0, number of output
pulses (S
1
+ 2)
K1 (1
st
segment) D1, D0 D3, D2
K2 (2
nd
segment) D5, D4 D7, D6
:
:
:
:
:
:
K60 (60
th
segment) D237, D236 D239, D238
3. Monitor the segment No. that is currently being executed in register D301.
X0
D0 DPTPO D300 Y0
END

4. The pulse output curve:
Frequency (Hz)
t t t t
1 2 .. .. 60
(D1,D0)
(D3,D2)
(D239,D238)
(D5,D4)
(D237,D236)
....
....
(D7,D6)
Time (S)

Remarks:
1. Flag explanations:
M1029 On when CH0 (Y0) pulse output is completed.
M1030 On when CH1 (Y2) pulse output is completed.
M1036 On when CH2 (Y4) pulse output is completed.
M1037 On when CH3 (Y6) pulse output is completed.
M1334 When On, CH0 (Y0) pulse output will be forbidden.
M1335 When On, CH1 (Y2) pulse output will be forbidden.
M1520 When On, CH2 (Y4) pulse output will be forbidden.
M1521 When On, CH3 (Y6) pulse output will be forbidden.
M1336 CH0 (Y0) pulse output indication flag
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M1337 CH1 (Y2) pulse output indication flag
M1522 CH2 (Y4) pulse output indication flag
M1523 CH3 (Y6) pulse output indication flag
2. Special register explanations:
D1336, D1337 Pulse present value register of CH0 (Y0) (D1337 high word, D1336
low word)
D1338, D1339 Pulse present value register of CH1 (Y2) (D1339 high word, D1338
low word)
D1375, D1376 Pulse present value register of CH2 (Y4) (D1376 high word, D1375
low word)
D1377, D1378 Pulse present value register of CH3 (Y6) (D1378 high word, D1377
low word)
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API Mnemonic Operands Function
196

HST P

High Speed Timer
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S * *
HST, HSTP: 3 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: Condition to stop the startup of high speed timer
Explanations:
1. Range of S: S = K0 (H0), K1 (H1).
2. Flag: M1015
3. When S = 1, the high speed timer will be enabled and M1015 = On. The high speed timer starts to
time and record the present value in D1015 (min. unit: 100us).
4. Timing range of D1015: K0 ~ K32,767. When the timing reaches K32,767, the next timing will
restart from 0.
5. When S = 0, the high speed timer will be disabled and M1015 = Off. D1015 will stop the timing
immediately.
6. When S is neither 1 nor 0, HST instruction will not be executed.
Program Example :
1. When X10 = On, M1015 will be On. The high speed timer will start to time and record the present
value in D1015.
2. When X10 = Off, M1015 will be Off. The high speed timer will be shut down.
X10
HST K1
X10
HST K0

Remarks:
1. Flag explanations:
M1015: high speed timer start-up flag
D1015: high speed timer
2. PV series do not use this instruction and use special M and special D directly for the timer.
a) Special M and special D are only applicable when ELC RUN.
b) When M1015 = On and ELC scans to END instruction, the high speed timer D1015 will be
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enabled. The minimum timing unit of D1015: 100us.
c) Timing range of D1015: K0 ~ K32,767. When the timing reaches K32,767, the next timing
will restart from K0.
d) When M1015 = Off, D1015 will stop the timing when encountering END or HST instruction.
3. PC/PA/PH series do not use this instruction and use special M and special D directly for the
timer.
a) Special M and special D are applicable when ELC RUN or STOP.
b) When M1015 = On, the high speed timer D1015 will be enabled. The minimum timing unit of
D1015: 100us.
c) Timing range of D1015: K0 ~ K32,767. When the timing reaches K32,767, the next timing
will restart from K0.
d) When M1015 = Off, D1015 will stop the timing immediately.
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API Mnemonic Operands Function
197

D CLLM

Close Loop Position
Control
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* *
S
2
* * *
S
3
* * *
D *
DCLLM: 17 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Feedback source device S
2
: Target number of feedbacks S
3
: Target frequency of output
D: Pulse output device
Explanations:
1. Flags: M1029, M1030, M1334, M1335. See remarks for more details.
2. This instruction only supports PV series.
3. The corresponding interruption of S1:
Source device X0 X1 X2 X3 C241 ~ C254
Corresponding
outout
Y0 Y2 Y4 Y6 Y0 Y2 Y4 Y6
Interruption No. I00 I10 I20 I30 I010 I020 I030 I040
= 1: rising-edige trigger; = 0: falling-edge trigger
a) When S
1
designates X as the input points and the pulse output reaches the set target number
of feedbacks in S
2
, the output will continue to operate by the frequency of the last segment
until the interruption of X input points occurs.
b) When S
1
designates a high speed counter and the pulse output reaches the set target number
of feedbacks in S
2
, the output will continue to operate by the frequency of the last segment
until the feedback pulses reaches the target number.
c) S1 can be a high speed counter C or an external interruption X. If S1 is C, DCNT instruction
should be first executed to enable the high-speed counting function and EI and I0x0
interruption service program to enable the high-speed interruption. If S1 is X, EI instruction
and I0x0 interruption service program should be executed to enable the external interruption
function.
4. The range of S
2
: -2,147,483,648 ~ +2,147,483,647 (+/- represents the forward/backward
direction). When in forward direction, the pulse present value registers CH0 (D1337 high word,
D1336 low word), CH1 (D1339 high word, D1338 low word), CH2 (D1376 high word, D1375 low
6. I nst ruct i on Set

6- 419
word) and CH3 (D1378 high word, D1377 low word) will increase. When in backward direction, the
present value will decrease.
5. If S
3
is lower than 10Hz, the output will operate at 10Hz; if S
3
is higher than 200KHz, the output will
operate at 200KHz.
6. D can only designate Y0, Y2, Y4 and Y6 and the direction signals repectively are Y1, Y3, Y5 and
Y7. When there is a direction signal output, the direction signal will not be Off immediately after
the pulse output is completed. The direction signal will be Off only when the drive contact is Off.
7. D1340, D1352, D1379 and D1380 are the settings of start/end frequencies of CH0 ~ CH3. The
minimum frequency is 10Hz and default is 200Hz.
8. D1343, D1353, D1381 and D1382 are the settings of the time of the first segment and the last
deceleration segment of CH0 ~ CH3. The acceleration/deceleration time cannot be shorter than
10ms. The output will be operated in 10ms if the time set is shorter than 10ms or longer than
10,000ms. The dafault setting is 100ms.
9. D1198, D1199, D1478 and D1479 are the output/input ratio of the close loop control in CH0 ~
CH3. K1 refers to 1 output pulse out of the 100 target feedback input pulses; K200 refers to 200
output pulses out of the 100 target feedback input pulses. D1198, D1199, D1478 and D1479 are
the numerators of the ratio (range: K1 ~ K10,000) and the denominator is fixed as K100 (the user
does not have to enter a denominator).
10. M1305, M1306, M1532 and M1533 are the direction signal flags for CH0 ~ CH3. When S
2
is a
positive value, the output will be in forward direction and the flag will be Off. When S
2
is a negative
value, the output will be in backward direction and the flag will be On.
Close Loop Explanations:
1. Function: Immediately stop the high-speed pulse output according to the number of feedback
pulses or external interruption signals.
2. The execution:
Frequency
Time
Number
C high speed counting = target number of feedbacks
or
occurrence of external interruption
Target frequency
Start/end frequency
Accelerat ion
time
High speed ti me Decelerat ion time
Idling time
Number of output pulses =
target number of feedbacks x percentage value/100

3. How to adjust the time for the completion of the positioning:
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a) The time for the completion of the positioning refers to the time for acceleration + high speed
+ deceleration + idling (see the figure above). For example, you can increase or decrease the
entire number of output pulses by making adjustment on the percentage value and further
increase or decrease the time required for the positioning.
b) Among the four segments of time, only the idling time cannot be adjusted directly by the user.
However, you can determine if the execution result is good or bad by the length of the idling
time. In theory, a bit of idling left is the best result for a positioning.
c) Owing to the close loop operation, the length of idling time will not be the same in every
execution. Therefore, when the content in the special D for displaying the actial number of
output pulses is smaller or larger than the calculated number of output pulses (taget number
of feedbacks x percentage value/100), you can improve the situation by adjusting the
percentage value, acceleration/decelartion time or target frequency.
Program Example:
1. Assume we adopt X0 as the external interruption, together with I001 (rising-edge trigger)
interruption program; target number of feedbacks = 50,000; target frequency = 10KHz; Y0, Y1
(CH0) as output pulses; start/end frequency (D1340) = 200Hz; acceleration time (D1343) = 300ms;
deceleration time (D1348) = 600ms; percentage value (D1198) = 100; current number of output
pulses (D1336, D1337) = 0.
2. Write the program codes as follows:
6. I nst ruct i on Set

6- 421
MOV
MOV
MOV
K100
K600
K300
D0
M1002
D1198
D1343
D1348
SET
DMOV K0 D1336
RST C251
EI
DCNT C251 K100000
FEND
IRET
END
DCLLM X0 K50000 K100000 Y0
INC
M1534
M0
M1000
I010

3. Assume the first execution result as:
100KHz
D1340
D1348 D1343
X0 Off --> On
Frequency
Y0 stops output
Time
Number
Estimated number of output pulses: 50,000
Actual number of output pulses (D1336, D1337) = K49,200

4. Observe the result of the first execution:
a) The actual output number 49,200 estimated output number 50,000 = -800 (a negative
value). A negative value indicates that the entire execution finishes earlier and has not
completed yet.
b) Try to shorten the acceleration time (D1343) into 250ms and deceleration time (D1348) into
550ms.
5. Obtain the result of the second execution:
ELC Syst em Manual


6- 422
100KHz
D1340
D1348 D1343
X0 Off --> On
Frequency
Y0 stops output
Time
Number
Estimated number of output pulses: 50,000
Actual number of output pulses (D1336, D1337) = K50,020

6. Observe the result of the second execution:
a) The actual output number 50,020 estimated output number 50,000 = 20
b) 20 x (1/200Hz) = 100ms (idling time)
c) 100ms is an appropriate value. Therefore, set the acceleration time as 250ms and
deceleration time as 550ms to complete the design.
Program Example 2:
1. Assume the feedback of the encoder is an A/B phase input and we adopt C251 timing (we
suggust you clear it to 0 before the execution); target number of feedbacks = 50,000; target output
frequency = 100KHz; Y0, Y1 (CH0) as output pulses; start/end frequency (D1340) = 200Hz;
acceleration time (D1343) = 300ms; deceleration time (D1348) = 600ms; precentage value
(D1198) = 100; current number of output pulses (D1336, D1337) = 0.
2. Write the program codes as follows:
6. I nst ruct i on Set

6- 423
MOV
MOV
MOV
K100
K600
K300
D0
M1002
D1198
D1343
D1348
SET
DMOV K0 D1336
RST C251
EI
DCNT C251 K100000
FEND
IRET
END
DCLLM K50000 K100000 Y0
INC
M1534
M0
M1000
I010
C251

3. Assume the first execution result as:
100KHz
D1340
D1348 D1343
C251 =K50000
3s
Frequency
Y0 stops output
Time
Number
Estimated number of output pulses: 50,000
Actual number of output pulses (D1336, D1337) = K50,600

4. Observe the result of the first execution:
a) The actual output number 50,600 estimated output number 50,000 = 600
b) 600 x (1/200Hz) = 3s (idling time)
c) 3 seconds are too long. Therefore, increase the percentage value (D1198) to K101.
5. Obatin the result of the second execution:
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100KHz
D1340
D1348 D1343
C251 =K50000
300ms
Frequency
Y0 stops output
Time
Number
Estimated number of output pulses: 50,500
Actual number of output pulses (D1336, D1337) = K50,560

6. Observe the result of the second execution:
a) The actual output number 50,560 estimated output number 50,500 = 60
b) 60 x (1/200Hz) = 300ms (idling time)
c) 300ms is an appropriate value. Therefore, set the percentage value (D1198) as K101 to
complete the design.
Remarks:
1. Flag explanations:
M1010 When On, CH0, CH1, CH2 and CH3 will output pulses when encountering
END instruction. Off when the output starts.
M1029 On when CH0 pulse output is completed.
M1030 On when CH1 pulse output is completed.
M1036 On when CH2 pulse output is completed.
M1037 On when CH3 pulse output is completed.
M1334 When On, CH0 pulse output will be forbidden.
M1335 When On, CH1 pulse output will be forbidden.
M1520 When On, CH2 pulse output will be forbidden.
M1521 When On, CH3 pulse output will be forbidden.
M1336 CH0 pulse output indication flag
M1337 CH1 pulse output indication flag
M1522 CH2 pulse output indication flag
M1523 CH3 pulse output indication flag
M1305 CH0 direction signal flag
M1306 CH1 direction signal flag
M1532 CH2 direction signal flag
M1533 CH3 direction signal flag
M1534 Deceleration time of CH0 setup flag (must used with D1348)
6. I nst ruct i on Set

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M1535 Deceleration time of CH1 setup flag (must used with D1349)
M1536 Deceleration time of CH2 setup flag (must used with D1350)
M1537 Deceleration time of CH3 setup flag (must used with D1351)
2. Special register explanations:
D1198 Close loop output/input ratio of CH0 (default: K100)
D1199 Close loop output/input ratio of CH1 (default: K100)
D1478 Close loop output/input ratio of CH2 (default: K100)
D1479 Close loop output/input ratio of CH3 (default: K100)
D1220 Phase setting of CH0 (Y0, Y1): determined by the last 2 digits of D1220;
other digits are invalid.
1. K0: Y0 output
2. K1: Y0, Y1 AB-phase output; A ahead of B
3. K2: Y0, Y1 AB-phase output; B ahead of A
D1221 Phase setting of CH1 (Y2, Y3): determined by the last 2 digits of D1221;
other digits are invalid.
1. K0: Y2 output
2. K1: Y2, Y3 AB-phase output; A ahead of B
3. K2: Y2, Y3 AB-phase output; B ahead of A
D1229 Phase setting of CH2 (Y4, Y5): determined by the last 2 digits of D1229;
other digits are invalid.
1. K0: Y4 output
2. K1: Y4, Y5 AB-phase output; A ahead of B
3. K2: Y4, Y5 AB-phase output; B ahead of A
D1230 Phase setting of CH3 (Y6, Y7): determined by the last 2 digits of D1230;
other digits are invalid.
1. K0: Y6 output
2. K1: Y6, Y7 AB-phase output; A ahead of B
3. K2: Y6, Y7 AB-phase output; B ahead of A
D1222 Time difference between the direction signal and pulse output of CH0
D1223 Time difference between the direction signal and pulse output of CH1
D1383 Time difference between the direction signal and pulse output of CH2
D1384 Time difference between the direction signal and pulse output of CH3
D1336 Low word of the current number of output pulses of CH0
D1337 High word of the current number of output pulses of CH0
D1338 Low word of the current number of output pulses of CH1
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D1339 High word of the current number of output pulses of CH1
D1375 Low word of the current number of output pulses of CH2
D1376 High word of the current number of output pulses of CH2
D1377 Low word of the current number of output pulses of CH3
D1378 High word of the current number of output pulses of CH3
D1340 Start/end frequency settings of CH0 (default: K200)
D1352 Start/end frequency settings of CH1 (default: K200)
D1379 Start/end frequency settings of CH2 (default: K200)
D1380 Start/end frequency settings of CH3 (default: K200)
D1348 Deceleration time of CH0 pulse output when M1534 = On (default: K100)
D1349 Deceleration time of CH1 pulse output when M1535 = On (default: K100)
D1350 Deceleration time of CH2 pulse output when M1536 = On (default: K100)
D1351 Deceleration time of CH3 pulse output when M1537 = On (default: K100)
D1343 Acceleration/deceleration time of CH0 pulse output (default: K100)
D1353 Acceleration/deceleration time of CH1 pulse output (default: K100)
D1381 Acceleration/deceleration time of CH2 pulse output (default: K100)
D1382 Acceleration/deceleration time of CH3 pulse output (default: K100)

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API Mnemonic Operands Function
202

SCA L P

Calculation of
Proportional Value
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
* * *
S
3
* * *
D *
SCAL,SCLAP: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Source of value S
2
: slope . The unit of S
2
is 0.001 S
3
: offset D: destination device
The range for operands S1, S2, S3 is -32767~32767.
Explanations:
1. Internal command equation: D = (S
1
S
2
)1000+ S
3

2. The values of S
2
and S
3
has to be calculated first following the slope and offset equations below
with decimal rounding off to get a 16-bit integer as an input value.
3. Slope equation: S
2
= [(Max. destination value Min. destination value)(Max. source value Min.
source value)] 1000
4. Offset equation: S
3
=Min. destination value Min. source value S
2
1000
5. The output curve is as below:
D
1
Min. destination value
Max. Destination value
Destination value
Source value
Max.
source value
Min.
source val ue


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6- 428
Program Example 1:
1. S
1
is known as 500, S
2
as 168 and S
3
as 4. When X0=On, SCAL instruction executes and the
desired proportional value is obtained at D0.
2. EquationD0 = (500 168 )1000+ (-4)=80
X0
SCAL
K500 K168 K-4 D0

D
1 0
=500
Slope=168
Offset=-4
Destination value
Source value


Program Example 2:
1. S
1
is known as 500, S
2
as 168 and S
3
as 534. When X10=On, SCAL instruction executes and the
desired proportional value is obtained at D10.
2. EquationD10 = (500 -168 )1000+ 534=450
X10
SCAL
K500 K-168 K534 D10

Offset=534
D
S =500 1 0
Slope=-168
Destination value
Source value

6. I nst ruct i on Set

6- 429
Remarks:
1. This SCAL instruction is applicable on the known slope and offset. If the slope and offset are
unknown, use SCLP instruction for calculation.
2. The inserted parameter S
2
has to be within the range 32,768 ~ 32,767 (the actual value should
be 32,768 ~ 32,767). If the actual value of S
2
exceeds the range, please use SCLP instruction for
calculation.
3. When adopting the slope equation, the user has to be aware that the Max. source value should be
larger than the Min. source value. The Max. destination value does not need to be larger than the
Min. destination value.
4. If D > 32,767, D =32,767. If D < -32,768, D =-32,768.
5. SCAL is the new command for V1.4 of PB series model, V1.4 of PC/PA/PH series model.

ELC Syst em Manual

6- 430
API Mnemonic Operands Function
203

D SCLP P

Calculation of Parameter
Proportional Value
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps
Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * *
S
2
*
D

*
SCLP, SCLPP: 9 steps
DSCLP, DSCLPP: 13 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Source of value S
2
: Parameter D: Destination device
Explanations:
1. The parameter settings of 16-bit command operand S
2
are as follows.
Device No. Parameter Range
S
2
Max. source value -32768~32767
S
2
+1 Min. source value -32768~32767
S
2
+2 Max. destination value -32768~32767
S
2
+3 Min. destination value -32768~32767
2. 16-bit command operand S
2
will continuously occupy 4 devices.
3. The parameter settings of 32-bit command operand S
2
are as follows.
Range
Device No. Parameter
Integer Floating point number
S
2
S
2
+1 Max. source value
S
2
+23 Min. source value
S
2
+45 Max. destination value
S
2
+67 Min. destination value
-2,147,483,648~2,147,483,647
Range of 32-bit floating
point number
4. 32-bit command operand S
2
will continuously occupy 8 devices.
5. Internal command equation D = [(S
1
Min. source value) (Max. destination value Min.
destination value)] (Max. source value Min. source value) + Min. destination value
6. Equation of source value and destination value:
n y=kx+b, y=Destination value (D) , k=slope=(Max. destination value Min. destination value)
(Max. source value Min. source value) , x=Source value (S
1
) , b=offset=Min. destination value
Min. source value slope
7. Place all the parameters into y=kx+b and bring forth the internal command equation:
6. I nst ruct i on Set

6- 431
y=kx+b= D =k S
1
+b=slope S
1
offsetslope S
1
Min. destination value Min. source value
slope=slope( S
1
Min. source value)Min. destination value=( S
1
Min. source value)(Max.
destination value Min. destination value)(Max. source value Min. source value)Min.
destination value
8. If S
1
> Max. source value, S
1
= Max. source value. If S
1
< Min. source value, S
1
= Min. source
value. When the input value and parameters are set, the output curve will show as the table below:
D
1
Min. destination value
Max. Destination value
Destination value
Source value
Max.
source value
Min.
source val ue

Program Example 1:
1. S
1
is known as 500, Max. source value as D0=3000, Min. source value as D1=200, Max.
destination value as D2=500, and Min. destination value as D3=30. When X0=On, SCLP
instruction executes and the desired proportional value is obtained at D10.
2. Equation: D10 = [(500 200) (50030)] (3000200) +30=80.35. Rounding off the result into
an integer, D10 =80.
X0
SCLP
K500 D0 D10
X0
MOV
MOV
MOV
MOV
K3000
K200
K500
K30
D0
D1
D2
D3

ELC Syst em Manual

6- 432
D
S
1
0
=500
=30
=500
Source value
Destination value


Program Example 2:
1. S
1
is known as 500, Max. source value as D0=3000, Min. source value as D1=200, Max.
destination value as D2=30 and Min. destination value as D3=500. When X0=On, SCLP
instruction executes and the desired proportional value is obtained at D10.
2. Equation: D10 = [(500 200) (30500)] (3000200) +500=449.64. Rounding off the result into
an integer, D10 =450.
X0
SCLP
K500 D0 D10
X0
MOV
MOV
MOV
MOV
K3000
K200
K30
K500
D0
D1
D2
D3

S
1=500
D
0
=30
=500
Destination value
Source value

6. I nst ruct i on Set

6- 433
Program Example 3:
1. The source value S
1
is known as D100=F500, Max. source value as D0=F3000, Min. source value
as D2=F200, Max. destination value as D4=F500 and Min. destination value as D6=F30. When
X0=On, SET M1162 is calculated by floating point number and DSCLP instruction executes. The
desired proportional value is obtained at D10.
2. Equation: D10 = [(F500 F200) (F500F30)] (F3000F200) +F30=F80.35. Rounding off the
result into an integer, D10 =F80.
X0
DSCLP D100 D0 D10
X0
DMOVR
DMOVR
F3000
F200
F500
F500
F30
D0
D2
D4
D6
DMOVR
DMOVR
DMOVR
D100
SET M1162

Remarks:
1. The range of 16-bit operand S
1
: Max. source valueS
1
Min. source value. -32768~32767. If the
value exceeds boundary value, use boundary value for calculation.
2. The range of 32-bit integer operand S
1
: Max. source value S
1
Min. source value.
-2,147,483,648~2,147,483,647. If the value exceeds boundary value, use boundary value for
calculation.
3. The range of 32-bit float point operand S
1
: Max. source valueS
1
Min. source value, according
to the range of 32-bit float point number. If the value exceeds boundary value, use boundary value
for calculation.
4. Please be aware that the Max. source value should be larger than Min. source value. The Max.
destination value does not need to be larger than Min. destination value.
5. SCAL is the new command for V1.4 of PB series model, V1.4 of PC/PA/PH series model.
ELC Syst em Manual

6- 434
API Mnemonic Operands Function
215~
217

D LD#

Logic Contact Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
LD#: 5 steps
DLD#: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Data source device 1 S
2
: Data source device 2
Explanations:
1. Compare the contents of S
1
and S
2
. Take LD& as an example, if the comparison result is NOT 0
the contact is in continuity, and if it is 0, the contact is in discontinuity.
2. This instruction must be the first instruction of a rung.
API No.
16 -bit
instruction
32 -bit
instruction
Continuity
condition
Discontinuity
condition
215 LD& DLD& S
1
& S
2
0 S
1
& S
2
=0
216 LD| DLD| S
1
| S
2
0 S
1
| S
2
=0
217 LD^ DLD^ S
1
^ S
2
0 S
1
^ S
2
=0
3. Operators: & : Logic AND operation, | : Logic OR operation, ^ : Logic XOR operation
4. If the 32-bit length counter (C200~) is used with this instruction for comparison, be sure to use the
32-bit instruction (DLD#). If the 16-bit instruction (LD#) is used, a Program Error, will occur and
the red ERROR indicator on the ELC panel will blink.
Program Example:
1. If the result of the LD& (Logic AND operation) instruction to compare the content of C0 and C10.
If the result is not equal to 0, Y20=ON.
2. If the result of the LD| (Logic OR operation) instruction to compare the content of D200 and D300.
If the result is not equal to 0 and X1=ON, set Y21=ON.
LD
C0 C10
LD
D200 D300 SET
X1
&
| Y21
Y20

6. I nst ruct i on Set

6- 435
API Mnemonic Operands Function
218~
220

D AND#

Series Logic Contact Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
AND#: 5 steps
DAND#: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Data source device 1 S
2
: Data source device 2
Explanation:
1. Compare the contents of S
1
and of S
2
. Take AND& as an example, if the comparison result is
NOT 0, the contact is in continuity, and if it is 0, the contact is in discontinuity.
2. Instruction AND# is used to connect to contact in series.
API No.
16 -bit
instruction
32 -bit
instruction
Continuity
condition
Discontinuity
condition
218 AND& DAND& S
1
& S
2
0 S
1
& S
2
=0
219 AND| DAND| S
1
| S
2
0 S
1
| S
2
=0
220 AND^ DAND^ S
1
^ S
2
0 S
1
^ S
2
=0
3. Operators:
& : Logic AND operation, | : Logic OR operation, ^ : Logic XOR operation
4. If the 32-bit length counter (C200~) is used with this instruction for comparison, be sure to use the
32-bit instruction (DAND#). If the 16-bit instruction (AND#) is used, a Program Error, will occur
and the red ERROR indicator on the ELC panel will blink.
Program Example:
1. When X0=ON, using the AND& (Logic AND operation) instruction to compare the content of C0
and C10. If the result is not equal to 0, Y20=ON.
2. When X1=OFF, using the AND| (Logic OR operation) instruction to compare the content of D10
and D0. If the result is not equal to 0, set Y21=ON.
AND C0 C10
AND D10 D0 SET
&
| Y21
Y20
X0
X1

ELC Syst em Manual

6- 436
API Mnemonic Operands Function
221~
223

D OR#

Parallel Logic Contact Operation
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
OR#: 5 steps
DOR#: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Data source device 1 S
2
: Data source device 2
Explanation:
1. Compare the contents of S
1
and S
2
. Take OR& as an example, if the comparison result is NOT 0,
the contact is in continuity, and if it is 0, the contact is in discontinuity.
2. Instruction OR# is used to connect to contact in parallel.
API No.
16 -bit
instruction
32 -bit
instruction
Continuity
condition
Discontinuity
condition
221 OR& DOR& S
1
& S
2
0 S
1
& S
2
=0
222 OR| DOR| S
1
| S
2
0 S
1
| S
2
=0
223 OR^ DOR^ S
1
^ S
2
0 S
1
^ S
2
=0
3. Operators:
& : Logic AND operation, | : Logic OR operation, ^ : Logic XOR operation
4. If the 32-bit length counter (C200~) is used with this instruction for comparison, be sure to use the
32-bit instruction (DOR#). If the 16-bit instruction (OR#) is used, a Program Error, will occur and
the red ERROR indicator on the ELC panel will blink.
Program Example:
If both X2 and M30 are ON, or when using the OR| (Logic OR operation) instruction to compare the
content of D10 and D20 and the result is not equal to 0, or when using the OR^ (Logic XOR operation)
instruction to compare the content of D100 and D200 and the result is not equal to 0, M60=ON.
OR D100 D200
OR D10 D20
^
|
X2 M30
M60

6. I nst ruct i on Set

6- 437
API Mnemonic Operands Function
224~
230

D LD*

Contact Comparison
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
LD*: 5 steps
DLD*: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Data source device 1 S
2
: Data source device 2
Explanations:
1. Compare the contents of S
1
and of S
2
. Take LD= as an example, if the comparison result is = ,
the contact is in continuity, and if it is , the contact is in discontinuity.
2. This instruction must be the first instruction of a rung.
API No.
16 -bit
instruction
32 -bit
instruction
Continuity
condition
Discontinuity
condition
224 LD DLD S
1
S
2
S
1
S
2

225 LD DLD S
1
S
2
S
1
S
2

226 LD DLD S
1
S
2
S
1
S
2

228 LD DLD S
1
S
2
S
1
S
2

229 LD DLD S
1
S
2
S
1
S
2

230 LD DLD S
1
S
2
S
1
S
2

3. When the left most bit, MSB (the 16-bit instruction: b15, the 32-bit instruction: b31), from S
1
and S
2

is 1, this comparison value will be viewed as a negative value for comparison.
4. If the 32-bit length counter (C200~) is used with this instruction for comparison, be sure to use the
32-bit instruction (DLD*). If the 16-bit instruction (LD*) is used, a Program Error, will occur and
the red ERROR indicator on the ELC panel will blink.
Program Example:
1. If the content of counter C10 is equal to K200, Y20=ON.
2. When the content of D200 is smaller or equal to K30, and that X1=ON, set Y21=ON.
LD=
K200 C10 Y20
LD<=
D200 K-30
X1
SET Y21

ELC Syst em Manual

6- 438
API Mnemonic Operands Function
232~
238

D AND*

Series Contact Comparison
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
AND*: 5 steps
DAND*: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Data source device 1 S
2
: Data source device 2
Explanations:
1. Compare the contents of S
1
and of S
2
. Take AND= as an example, if the comparison result is = ,
the contact is in continuity, and if it is , the contact is in discontinuity.
2. Instruction AND* is the comparison instruction that connect to contact in series.
API No.
16 -bit
instruction
32 -bit
instruction
Continuity
condition
Discontinuity
condition
232 AND DAND S
1
S
2
S
1
S
2

233 AND DAND S
1
S
2
S
1
S
2

234 AND DAND S
1
S
2
S
1
S
2

236 AND DAND S
1
S
2
S
1
S
2

237 AND DAND S
1
S
2
S
1
S
2

238 AND DAND S
1
S
2
S
1
S
2

3. When the left most bit, MSB (the 16-bit instruction: b15, the 32-bit instruction: b31), from S
1
and S
2

is 1, this comparison value will be viewed as a negative value for comparison.
4. If the 32-bit length counter (C200~) is used with this instruction for comparison, be sure to use the
32-bit instruction (DAND*). If the 16-bit instruction (AND*) is used, a Program Error, will occur
and the red ERROR indicator on the ELC panel will blink.
Program Example:
1. If X0=ON and the current value of counter C10 equals K200, Y20=ON.
2. If X1=OFF and the content of register D0 not equal to K10, set Y21=ON.
AND= K200 C10 Y20
AND<> K-10 D0 SET Y21
X1
X0

6. I nst ruct i on Set

6- 439
API Mnemonic Operands Function
240~
246

D OR*

Parallel Contact Comparison
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * * * * * *
S
2
* * * * * * * * * * *
OR*: 5 steps
DOR*: 9 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S
1
: Data source device 1 S
2
: Data source device 2
Explanations:
1. Compare the contents of S
1
and of S
2
. Take OR= as an example, if the comparison result is =,
the contact is in continuity, and if it is , the contact is in discontinuity.
2. Instruction OR*is the comparison instruction that connect to contact in parallel.
API No.
16-bit
instruction
32-bit
instruction
Continuity
condition
Discontinuity
condition
240 OR DOR S
1
S
2
S
1
S
2

241 OR DOR S
1
S
2
S
1
S
2

242 OR DOR S
1
S
2
S
1
S
2

244 OR DOR S
1
S
2
S
1
S
2

245 OR DOR S
1
S
2
S
1
S
2

246 OR DOR S
1
S
2
S
1
S
2

3. When the left most bit, MSB (the 16-bit instruction: b15, the 32-bit instruction: b31), from S
1
and S
2

is 1, this comparison value will be viewed as a negative value for comparison.
4. If the 32-bit length counter (C200~) is used with this instruction for comparison, be sure to use the
32-bit instruction (DOR*). If the 16-bit instruction (OR*) is used, a Program Error, will occur and
the red ERROR indicator on the ELC panel will blink.
Program Example:
If both X2 and M30 are ON, or if the contents of the 32-bit registers D101 and D100 are greater or
equal to K100,000, M60=ON.
DOR>= D100 K100000
X2 M30
M60
ELC Syst em Manual

6- 440
MEMO


7- 1
Communications
This chapter contains information regarding the communications ports of the ELC.

This Chapter Contains

7.1 Communication Ports .............................................................................................................. 7-2
7.2 Communication Protocol ASCII mode.................................................................................... 7-3
7.2.1 ADR (Communication Address) .................................................................................... 7-3
7.2.2 CMD (Command code) and DATA (data characters) .................................................... 7-3
7.2.3 LRC CHK (check sum) .................................................................................................. 7-5
7.3 Communication Protocol RTU mode...................................................................................... 7-8
7.3.1 Address (Communication Address)............................................................................... 7-8
7.3.2 Function (Function Code) and DATA (Data Contents) .................................................. 7-8
7.3.3 CRC CHK (check sum)................................................................................................ 7-10
7.4 ELC Device Address............................................................................................................... 7-12
7.5 Command Code...................................................................................................................... 7-14
7.5.1 Command Code : 01, Read Coil Status ...................................................................... 7-14
7.5.2 Command Code : 02, Read Input Status..................................................................... 7-15
7.5.3 Command Code : 03, Read Holding Register ............................................................. 7-16
7.5.4 Command Code : 05, Force Single Coil ...................................................................... 7-17
7.5.5 Command Code : 06, Preset Single Register ............................................................. 7-18
7.5.6 Command Code : 15, Force Multiple Coils.................................................................. 7-19
7.5.7 Command Code : 16, Preset Multiple Register ........................................................... 7-20
7.5.8 Command Code : 17, Report Slave ID........................................................................ 7-20
7.6 ELC Device Addresses by Controller ................................................................................... 7-22
ELC Syst em Manual

7- 2
7 Communications over a network
7.1 Communication Ports
All ELC models have 2 communication ports.

Front port (DIN) is a RS-232 communication port, and is only a slave port making it ideal for HMI or
slave to higher end communication networks like DeviceNet, ModbusTCP, etc.

Bottom port is a RS-485 communication port that is master/slave.
Both ports can be programmed for Modbus ASCII or RTU.
Communication Frame:
Com port
Parameter
RS-232 RS-485
Baud rate 110~115200 bps 110~115200 bps
Data length 7bits (8bits
#1
) 7~8bits
Parity Even parity (Odd, None
#1
) Even/Odd/None parity
Stop bits length 1 bit (2-bits
#1
) 1~2 bits
Setting ELCSoft (D1036
#1
) D1120
ASCII mode Slave is available Master/(Slave
#1
) are available
RTU mode (Slave
#1
)

is available Master/(Slave
#1
) are available
16 registers
#2
16 registers
#2

Data length to
read/write
(ASCII)
100 registers
#3
100 registers
#3

16 registers
#2
16 registers
#2

Data length to
read/write
(RTU)
100 registers
#3
100 registers
#3

#1
Available in PC/PA/PH/PV_V1.0 and above, PB_V1.2 and above.
#2
Available in below PC/PA/PH _V1.2, PB_V1.4.
#3
Available in PC/PA/PH _V1.2 and above, PB_V1.4 and above, PV_V1.0 and above.
Default communication settings for both ports are:
Modbus ASCII
7 data bits
1 stop bit
Even parity
9600 baud

7. Communi cat i ons

7- 3
7.2 Communication Protocol ASCII mode
Communication Data Frame
9600 (Baud rate), 7 (data bits), Even (Parity), 1 (Start bit), 1 (Stop bit)

STX Start character :(3AH)
ADR 1 Communication address:
ADR 0 8-bit address consists of 2 ASCII codes
CMD 1 Command code:
CMD 0 8-bit command consists of 2 ASCII codes
DATA (0) Contents of data:
DATA (1) n8-bit data consist of 2n ASCII codes.
.
n37, maximum of 74 ASCII codes
(Available in below PC/PA/PH _V1.2, PB_V1.4.)
DATA (n-1)
n205, maximum of 410 ASCII codes
(Available in PC/PA/PH _V1.2 and above, PB_V1.4 and above,
PV _V1.0 and above.)
LRC CHK 1 LRC check sum:
LRC CHK 0 8-bit check sum consists of 2 ASCII codes
END 1 End character:
END 0 END 1 = CR (0DH)END 0 = LF (0AH)

7.2.1 ADR(Communication Address)
Valid communication addresses are in the range of 0254. Communication address equals to 0
means broadcast to all ELCs. ELC will not respond to a broadcast message. ELC will reply to a
normal message (non-broadcast) to the master device.

Example, communication to an ELC with address 16 decimal (10hex):
(ADR 1, ADR 0)=1,01=31H, 0 = 30H

7.2.2 CMD (Command code) and DATA (data characters)
The data character format depends on the command code. For example, reading continuous 8 words
form starting device address 0614H of ELC with address 01H.

Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 03
Starting Address Hi 06
Starting Address Lo 14
ELC Syst em Manual

7- 4
Field Name Example (Hex)
Number of Points Hi 00
Number of Points Lo 08
Error Check ( LRC ) DA
END 1 0D
END 0 0A

ExampleReading Coils T20~T27 from slave device 01
PCELC
: 01 03 06 14 00 08 DA CR LF
ELCPC
: 01 03 10 00 01 00 02 00 03 00 04 00 05 00 06 00 07 00 08 C8 CR LF

Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 03
Bytes Count 10
Data Hi (T20) 00
Data Lo (T20) 01
Data Hi (T21) 00
Data Lo (T21) 02
Data Hi (T22) 00
Data Lo (T22) 03
Data Hi (T23) 00
Data Lo (T23) 04
Data Hi (T24) 00
Data Lo (T24) 05
Data Hi (T25) 00
Data Lo (T25) 06
Data Hi (T26) 00
Data Lo (T26) 07
Data Hi (T27) 00
Data Lo (T27) 08
Error Check (LRC) C8
END 1 0D
END 0 0A
7. Communi cat i ons

7- 5
7.2.3 LRC CHK(check sum)
LRC (Longitudinal Redundancy Check) is calculated by summing up, module 256, the values of the
bytes from ADR1 to last data character then calculating the hexadecimal representation of the
2s-complement negation of the sum.

For example, reading 1 word form address 0401H of the ELC with address 01H

STX
ADR 1 0
ADR 0 1
CMD 1 0
CMD 0 3
0
4
0
Starting data address
1
0
0
0
Number of data
1
LRC CHK 1 F
LRC CHK 0 6
END 1 CR
END 0 LF

01H+03H+04H+01H+00+01H = 0AH, the 2s-complement negation of 0AH is F6H
Exception response:
The ELC is expected to return a normal response after receiving command messages from the master
device. The following depicts the conditions that either a no response or an error response is replied to
the master device.
The ELC did not receive a valid message due to a communication error; thus the ELC has no response.
The master device will eventually process a timeout condition.
The ELC receives a valid message without a communication error, but cannot accommodate it, an
exception response will return to the master device. In the exception response, the most significant bit
of the original command code is set to 1, and an exception code explaining the condition that caused
the exception is returned.

ELC Syst em Manual

7- 6
An example of exception response of command code 01H and exception 02H:

Command message:
Field Name Example (Hex)
Heading 3A
Slave Address 01
Function 01
Starting Address Hi 04
Starting Address Lo 00
Number of Points Hi 00
Number of Points Lo 10
Error Check (LRC) EA
END 1 0D
END 0 0A

Response message:
Field Name Example (Hex)
Heading 3A
Slave Address 01
Function 81
Exception Code 02
Error Check (LRC) 7C
END 1 0D
END 0 0A

Exception
code:
Meaning:
01
Illegal command code:
The command code received in the command message is not available for
the ELC.
02
Illegal device address:
The device address received in the command message is not available for the
ELC.
03
Illegal device value:
The device value received in the command message is not available for the
ELC.
7. Communi cat i ons

7- 7
Exception
code:
Meaning:
07
Check Sum Error
Check if the check Sum is correct
Illegal command messages
The command message is too short.
Command message length is out of range.

The format of data characters depends on the command. The available command codes are described
as followed.
Code Name Description
01 Read Coil Status S, Y, M, T, C
02 Read Input Status S, X, Y, M,T, C
03 Read Holding Registers T, C, D
05 Force Single Coil S, Y, M, T, C
06 Preset Single Register T, C, D
15 Force Multiple Coils S, Y, M, T, C
16 Preset Multiple Register T, C, D
17 Report Slave ID None
ELC Syst em Manual

7- 8
7.3 Communication Protocol RTU mode
Communication Data Frame
9600 (Baud rate), 8 (data bits), EVEN (Parity), 1 (Start bit), 1 (Stop bit)

START Keep the non-input message greater or equal to 10 ms
Address Communication Address: the 8-bit binary address
Function Function Code: the 8-bit binary address
DATA (n-1)
.
DATA 0
Data Contents:
n 8-bit data, n<=34 (Available in below PC/PA/PH _V1.2,
PB_V1.4.)
n8-bit data, n<=202 (Available in PC/PA/PH _V1.2 and above,
PB_V1.4 and above, PV _V1.0 and above.)
CRC CHK Low
CRC CHK High
CRC Check Sum:
The 16-bit CRC check sum is composed of 2 8-bit binary codes
END Keep the non-input message greater or equal to 10 ms

7.3.1 Address (Communication Address)
Valid communication addresses are in the range of 0254. Communication address equals to 0
means broadcast to all ELCs. ELC will not respond to a broadcast message. ELC will reply to a
normal message (non-broadcast) to the master device.

Example, communication to an ELC with address 16 decimal (10hex): Address= 10H

7.3.2 Function (Function Code) and DATA (Data Contents)
The data character format depends on the command code. For example, reading continuous 8 words
form starting device address 0614H of ELC with address 01H.

Field Name Example (Hex)
START Keep the non-input message greater or equal to 10 ms
Slave Address 01
Function code 03
06
Starting Address
14
00
Number of Points
08
CRC CHK Low 04
CRC CHK High 80
END Keep the non-input message greater or equal to 10 ms
7. Communi cat i ons

7- 9
Example: Reading Coils T20~T27 from slave device 01
PCELC
: 01 03 06 14 00 08 DA CR LF
ELCPC
: 01 03 10 00 01 00 02 00 03 00 04 00 05 00 06 00 07 00 08 C8 CR LF

Field Name Example (Hex)
START Keep the non-input message greater or equal to 10 ms
Slave Address 01
Command code 03
Bytes Count 10
Data Hi (T20) 00
Data Lo (T20) 01
Data Hi (T21) 00
Data Lo (T21) 02
Data Hi (T22) 00
Data Lo (T22) 03
Data Hi (T23) 00
Data Lo (T23) 04
Data Hi (T24) 00
Data Lo (T24) 05
Data Hi (T25) 00
Data Lo (T25) 06
Data Hi (T26) 00
Data Lo (T26) 07
Data Hi (T27) 00
Data Lo (T27) 08
CRC CHK Low 72
CRC CHK High 98
END Keep the non-input message greater or equal to 10 ms
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7- 10
7.3.3 CRC CHK (check sum)
The CRC Check starts from Address and ends in Data Contents. Its calculation is as follows:
Step 1: Load the 16-bit register (the CRC register) with FFFFH.
Step 2: Exclusive OR the first 8-bit byte message command with the 16-bit CRC register of the lower
bit, then save the result into the CRC register.
Step 3: Shift the CRC register one bit to the right and fill in 0 to the higher bit.
Step 4: Check the value that shifts to the right. If it is 0, save the new value from Step 3 into the CRC
register, otherwise, Exclusive OR A001H and the CRC register, then save the result into the CRC
register.
Step 5: Repeat Steps 3 and 4 and calculates the 8-bit.
Step 6: Repeat Steps 2~5 for the next 8-bit message command, till all the message commands are
processed. And finally, the obtained CRC register value is the CRC Check value. What should be
noted is that the CRC Check must be placed interchangeably in the Check Sum of the message
command.
What follows is the calculation example of the CRC Check using the C language:
unsigned char* data // index of the message command
unsigned char length // length of the message command
unsigned int crc_chk(unsigned char* data, unsigned char length)
{
int j;
unsigned int reg_crc=0Xffff;
while(length--)
{
reg_crc ^= *data++;
for (j=0;j<8;j++)
{
If (reg_crc & 0x01) reg_crc=(reg_crc>>1) ^ 0Xa001; /* LSB(b0)=1 */
else reg_crc=reg_crc >>1;
}
}
return reg_crc; // the value that sent back to the CRC register finally
}

7. Communi cat i ons

7- 11
Exception response:
The ELC is expected to return a normal response after receiving command messages from the master
device. The following depicts the conditions that either a no response or an error response is replied to
the master device.
The ELC did not receive a valid message due to a communication error; thus the ELC has no response.
The master device will eventually process a timeout condition.
The ELC receives a valid message without a communication error, but cannot accommdate it, an
exception response will return to the master device. In the exception response, the most significant bit
of the original command code is set to 1, and an exception code explaining the condition that caused
the exception is returned.

An example of exception response of command code 01H and exception 02H:

Command message:
Field Name Example (Hex)
START Keep the non-input message greater or equal to 10 ms
Slave Address 01
Function code 01
04
Starting Address
00
00
Number of Points
10
CRC CHK Low 3C
CRC CHK High F6
END Keep the non-input message greater or equal to 10 ms

Response message:
Field Name Example (Hex)
START Keep the non-input message greater or equal to 10 ms
Slave Address 01
Function 81
Exception Code 02
CRC CHK Low C1
CRC CHK High 91
END Keep the non-input message greater or equal to 10 ms
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7- 12
7.4 ELC Device Address
Effective Range
Device Range
PB PC/PA/PH PV
Address
S 000~255 0000~00FF
S 246~511 0100~01FF
S 512~767 0200~02FF
S 768~1023
000~127 000~1023 000~1023
0300~03FF
X 000~377 (Octal) 000~177 (Octal) 000~177 (Octal) 000~377 (Octal) 0400~04FF
Y 000~377 (Octal) 000~177 (Octal) 000~177 (Octal) 000~377 (Octal) 0500~05FF
T 000~255 000~127 000~255 000~255 0600~06FF
M 000~255 0800~08FF
M 256~511 0900~09FF
M 512~767 0A00~0AFF
M 768~1023 0B00~0BFF
M 1024~1279 0C00~0CFF
M 1280~1535 0D00~0DFF
M 1536~1791 B000~B0FF
M 1792~2047 B100~B1FF
M 2048~2303 B200~B2FF
M 2304~2559 B300~B3FF
M 2560~2815 B400~B4FF
M 2816~3071 B500~B5FF
M 3072~3327 B600~B6FF
M 3328~3583 B700~B7FF
M 3584~3839 B800~B8FF
M 3840~4095
0000~1279 0000~4095 0000~4095
B900~B9FF
C 000~255
000~127
235~255
000~255 000~255 0E00~0EFF
D 000~255 1000~10FF
D 256~511 1100~11FF
D 512~767 1200~12FF
D 768~1023 1300~13FF
D 1024~1279
000~599
1000~1143
1256~1311
1400~14FF
D 1280~1535 1500~15FF
D 1536~1791 1600~16FF
D 1792~2047 1700~17FF
D 2048~2303 1800~18FF
D 2304~2559 1900~19FF
D 2560~2815 1A00~1AFF
D 2816~3071 1B00~1BFF
D 3072~3327 1C00~1CFF
D 3328~3583 1D00~1DFF
D 3584~3839 1E00~1EFF
D 3840~4095
None
0000~4095 0000~4095
1F00~1FFF
7. Communi cat i ons

7- 13
Effective Range
Device Range
PB PC/PA/PH PV
Address
D 4096~4351 9000~90FF
D 4352~4999 9100~91FF
D 4608~4863 9200~92FF
D 4864~5119
4096~4999
9300~93FF
D 5120~5375 9400~94FF
D 5376~5631 9500~95FF
D 5632~5887 9600~96FF
D 5888~6143 9700~97FF
D 6144~6399 9800~98FF
D 6400~6655 9900~99FF
D 6656~6911 9A00~9AFF
D 6912~7167 9B00~9BFF
D 7168~7423 9C00~9CFF
D 7424~7679 9D00~9DFF
D 7680~7935 9E00~9EFF
D 7936~8191 9F00~9FFF
D 8192~8447 A000~A0FF
D 8448~8703 A100~A1FF
D 8704~8959 A200~A2FF
D 8960~9215 A300~A3FF
D 9216~9471 A400~A4FF
D 9472~9727 A500~A5FF
D 9728~9983 A600~A6FF
D
9984~9999
None
None
4096~9999
A700~A70F
ELC Syst em Manual

7- 14
7.5 Command Code
7.5.1 Command Code01, Read Coil Status
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 01
Starting Address Hi 06
Starting Address Lo 14
Number of Points Hi
00
Number of Points Lo
25
Error Check (LRC)
BF
END 1 0D
END 0 0A
Number of Points (max) = 255 = 0x00FF
ExampleReading Coils T20~T56 from slave device 01
PCELC :01 01 06 14 00 25 BF CR LF
ELCPC :01 01 05 CD 6B B2 0E 1B D6 CR LF

Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 01
Bytes Count 05
Data (Coils T27T20) CD
Data (Coils T35T38) 6B
Data (Coils T43T36) B2
Data (Coils T51T44) 0E
Data (Coils T56T52) 1B
Error Check (LRC) E6
END 1 0D
END 0 0A
7. Communi cat i ons

7- 15
7.5.2 Command Code02, Read Input Status
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 02
Starting Address Hi 05
Starting Address Lo 14
Number of Points Hi 00
Number of Points Lo 25
Error Check (LRC) BF
END 1 0D
END 0 0A
Example: Reading Contact Y024~Y070 from slave device 01
PCELC : 01 02 05 14 00 25 BF CR LF
ELCPC : 01 01 05 CD 6B B2 0E 1B E5 CR LF
Field Name Example (Hex)
Heading 3A
Slave Address
01
Command code
02
Bytes Count
05
Data (Coils Y033Y024)
CD
Data (Coils Y043Y034)
6B
Data (Coils Y053Y044)
B2
Data (Coils Y063Y054)
0E
Data (Coils Y070Y064)
1B
Error Check (LRC)
E5
END 1 0D
END 0 0A
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7- 16
7.5.3 Command Code03, Read Holding Register
Holding RegisterT, C, D
Field Name Example (Hex)
Heading
3A
Slave Address
01
Command code
03
Starting Address Hi
06
Starting Address Lo
14
Number of Points Hi
00
Number of Points Lo
08
Error Check (LRC)
DA
END 1 0D
END 0 0A
Example: Reading Coils T20~T27 from slave device 01
PCELC
: 01 03 06 14 00 08 DA CR LF
ELCPC
:01 03 10 00 01 00 02 00 03 00 04 00 05 00 06 00 07 00 08 B8 CR LF
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 03
Bytes Count 10
Data Hi (T20) 00
Data Lo (T20) 01
Data Hi (T21) 00
Data Lo (T21) 02
Data Hi (T22) 00
Data Lo (T22) 03
Data Hi (T23) 00
Data Lo (T23) 04
Data Hi (T24) 00
Data Lo (T24) 05
Data Hi (T25) 00
Data Lo (T25) 06
7. Communi cat i ons

7- 17
Field Name Example (Hex)
Data Hi (T26) 00
Data Lo (T26) 07
Data Hi (T27) 00
Data Lo (T27) 08
Error Check (LRC) C8
END 1 0D
END 0 0A

7.5.4 Command Code05, Force Single Coil
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 05
Coil Address Hi 05
Coil Address Lo 00
Force Data Hi FF
Force Data Lo 00
Error Check (LRC) F6
END 1 0D
END 0 0A
MMNN = 0xFF00.Coil ON
MMNN = 0x0000.Coil OFF
Example: Forcing Coil Y000 ON
PCELC : 01 05 05 00 FF 00 F6 CR LF
ELCPC : 01 05 05 00 FF 00 F6 CR LF

Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 05
Coil Address Hi 05
Coil Address Lo 00
Force Data Hi FF
Force Data Lo 00
Error Check (LRC) F6
ELC Syst em Manual

7- 18
Field Name Example (Hex)
END 1 0D
END 0 0A

7.5.5 Command Code06, Preset Single Register
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 06
Register Address Hi 06
Register Address Lo 00
Preset Data Hi 12
Preset Data Lo 34
Error Check (LRC) AD
END 1 0D
END 0 0A
ExampleSetting Register T0 to 12 34
PCELC : 01 06 06 00 12 34 AD CR LF
ELCPC : 01 06 06 00 12 34 AD CR LF
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 06
Register T0 Address Hi 06
Register T0 Address Lo 00
Preset Data Hi 12
Preset Data Lo 34
Error Check (LRC) AD
END 1 0D
END 0 0A
Switch ( c )
Case 0: T0
Q : 01 06 06 00 12 34 AD CR LF
Case 1: C0
Q : 01 06 0E 00 12 34 AF CR LF
Case 2: C232
7. Communi cat i ons

7- 19
Q : 01 06 0E E8 12 34 56 78 EF CR LF
Case 3: D10
Q : 01 06 10 0A 12 34 99 CR LF
Case 4: D1000
Q : 01 06 13 E8 12 34 BA CR LF

7.5.6 Command Code15, Force Multiple Coils
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 0F
Coil Address Hi 05
Coil Address Lo 00
Quantity of Coils Hi 00
Quantity of Coils Lo 0A
Byte Count 02
Force Data Hi CD
Force Data Lo 01
Error Check (LRC) 11
END 1 0D
END 0 0A
Quantity of Coils (max) = 255
Example: Setting Coil Y007Y000 = 1100 1101, Y011Y010 = 01.
PCELC : 01 0F 05 00 00 0A 02 CD 01 11 CR LF
ELCPC : 01 0F 05 00 00 0A E1 CR LF
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 0F
Register T0 Address Hi 05
Register T0 Address Lo 00
Preset Data Hi 00
Preset Data Lo 0A
Error Check (LRC) E1
END 1 0D
END 0 0A

ELC Syst em Manual

7- 20
7.5.7 Command Code16, Preset Multiple Register
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 10
Starting Address Hi 06
Starting Address Lo 00
Number of Register Hi 00
Number of Register Lo 02
Byte Count 04
Data Hi 00
Data Lo 0A
Data Hi 01
Data Lo 02
Error Check (LRC) C6
END 1 0D
END 0 0A
Example: Setting Register T0 to 00 0A, T1 to 01 02.
PCELC : 01 10 06 00 00 02 04 00 0A 01 02 C6 CR LF
ELCPC : 01 10 06 00 00 02 E7 CR LF
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 10
Starting Address Hi 06
Starting Address Lo 00
Number of Registers Hi 00
Number of Registers Lo 02
Error Check (LRC) E7
END 1 0D
END 0 0A

7.5.8 Command Code17, Report Slave ID
Returns a description of controller present at the slave address, the current status of the slave Run
indicator, and other information specific to the slave device.
7. Communi cat i ons

7- 21
Command message:
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 11
Error Check (LRC) EE
END 1 0D
END 0 0A

Response message:
Field Name Example (Hex)
Heading 3A
Slave Address 01
Command code 11
Byte Count 04
Slave ID 01
Run Indicator Status
00 = OFF
FF = ON
FF
Data 0 (D1001 HI) 40
Data 1 (D1001 LOW) 10
Error Check (LRC) 9A
END 1 0D
END 0 0A
ELC Syst em Manual

7- 22
7.6 ELC Device Addresses by Controller
ELC Range
Device Range Type
Address
(HEX)
Modbus address
PB PC/PA/PH PV
S 000~255 bit 0000~00FF 000001~000256
S 246~511 bit 0100~01FF 000257~000512
S 512~767 bit 0200~02FF 000513~000768
S 768~1023 bit 0300~03FF 000769~001024
0~127 0~1023 0~1023
X 000~377 (Octal) bit 0400~04FF 101025~101280
Y 000~377 (Octal) bit 0500~05FF 001281~001536
0~177 0~177 0~377
000~255 bit 0600~06FF 001537~001792 0~127 0~255 0~255
T
000~255 word 0600~06FF 401537~401792 0~127 0~255 0~255
M 0000~1535 bit 0800~0DFF 002049~003584
M 1536~4095 bit B000~B9FF 045057~047616
0~1279 0~4095 0~4095
Bit 0E00~0EC7 003585~003784 0~127 0~199 0~199
000~199 16-bit
Word 0E00~0EC7 403585~403784 0~127 0~199 0~199
Bit 0EC8~0EFF 003785~003840 232~255 200~255 200~255
C
200~255 32-bit
Word 0700~076F 401793~401903* 232~255 200~255 200~255
D 0000~4095 Word 1000~1FFF 404097~408192
D 4096~8191 Word 9000~9FFF 436865~440960
D 8192~9999 Word A000~A70F 440961~443008
0~1311 0~4999 0~9999
* Odd address valid


8- 1
Sequential Function Charts
This chapter contains information in programming in SFC mode.

This Chapter Contains

8.1 Step Ladder Command [STL], [RET] ...................................................................................... 8-2
8.2 Sequential Function Chart (SFC) ............................................................................................ 8-3
8.3 Step Ladder Command Explanation....................................................................................... 8-5
8.4 Reminder of Design on the Step Ladder Program.............................................................. 8-11
8.5 Categories of Procedures...................................................................................................... 8-13
8.6 IST Command ......................................................................................................................... 8-24

ELC Syst em Manual

8- 2
8 Sequential Function Charts
8.1 Step Ladder Command [STL], [RET]
Mnemonic Operands Function Program steps
STL S0~S1023
Step Transition Ladder Start
Command
1
Controllers
PB PC PA PH PV
Explanation:
The step ladder command, STL Sn, has constituted the stepping point, and when the STL command
showed up in the program, it implies that the program is now at the step ladder diagram condition that is
controlled by the step procedure. The step ladder command RET represents the end of the step
ladder diagram (from S0~S9) that is to return to the BUS command. The SFC diagram is represented
through the step ladder diagram composed of STL/RET. The number of step point S cant be repeated.

Mnemonic Operands Function Program steps
RET None
Step Transition Ladder
Return Command
1
Controllers
PB PC PA PH PV
Explanation:
At the end of the step procedure, be sure to write in the RET command; the RET command indicates the
end of the step procedure. Maximum is 10 step procedures (S0~S9) for an ELC program and it should
have RET command at the end of each step procedure.
Program Example:
Step ladder diagram:
M1002
ZRST S0 S127
SET S0
SET S20
Y0
SET S30
Y1
SET S40
Y2
S0
RET
END
X0 S0
S
S20
S
X1
S30
S
X2
S40
S
X3

SFC:
S0
S20
S30
S40
S0
M1002
X0
X1
X2
X3
Y0
Y1
Y2

8. Sequent i al Funct i on Char ts

8- 3
8.2 Sequential Function Chart (SFC)
In automatic control field, it often needs to cooperate with electric control and mechanical control to
reach the goal. SFC can be divided into several serial STEP (i.e. several phases). Each STEP should
finish its actions. It usually has transition to transfer from each step to the next step. That is the design
concept of Sequential Function Chart to have transition to end the action of the previous step and start
the action of the next step (the previous step will be clear at this time).
Features:
1. You dont need to do SFC design for constant state step. ELC
will execute the action of interlock and double output between
each state. It is only needed do simple SFC design for each
state.
2. The action is easy to understand and easy to adjust initial ELC
start-up, detect and maintain.
3. SFC edition theory is made by IEC1131-3. It is figure edition
mode and the structure looks like flow chart. Each ELC
internal step relay S is used to be step point and also equal to
each step of flow chart. After finishing present step, it will
transfer to the next step, i.e. next step point S, by setting
condition. By repeating this way, it can reach the result that
user needs.
4. Explanation of right side SFC figure: each step has its own
transition condition to move from one step to the next step. In
this figure, primary step point S0 will move to step point S21
once this transition condition X0 is established, and S21 can
move to S22 or S24 by transition condition X1 or X2 and S25
will move to S0 to finish a whole procedure once transition
condition X6 is established. By this way, it can circulate control
with repeat again and again.
SFC:
S0
S21
S24
S25
S0
X0
X1
X5
X6
X2
S22
X4
X3
S24


It is used for ladder step mode. This figure means internal edition program is a
general step ladder diagram not step ladder program.
ELC Syst em Manual

8- 4

It is for primary step point. This double-frame is used for SFC primary step point and
the usage devices are S0~S9.

It is used for general step point and the usage devices are S10~S1023.

It is JUMP step point that used to move from step point to another which is not next
to it. (it can be used to disconnect jump up or jump down in the same program
procedure, return to primary step point or jump between different program
procedure.

It is the transition condition of step point that is used to move between each step
point.

It is alternative divergence that is used for a step point to move to different
corresponding step point by different transition condition.

It is alternative convergence that is used for two step points and above to move to
the same step point according to transition condition.

It is simultaneous divergence that is used for a step point move to two step points
and above by the same transition condition.

It is simultaneous convergence that is used for two step points and above to move
to the same step point with the same transition condition when the condition is
established at the same time.
8. Sequent i al Funct i on Char ts

8- 5
8.3 Step Ladder Command Explanation
STL command: this command is used in the syntax design for the Sequential Function Chart (SFC).
This command helps the program designer to have clearer ideas on the program procedure, and thus
the procedure will be more readable. As shown in the following diagrams, we could switch our
procedure diagram from the left diagram to the right ELC structure diagram.
At the end of the step procedure, be sure to write in the RET command; the RET command indicates the
end of the step procedure. Several step procedures could be written in to the same program, just
make sure to write in the RET command at the end of the step procedure. There is no limitation to the
usage of the RET command, and this command should match up with the usage of the step points
(S0~S9).
If the RET command is not written in at the end of the step procedure, this error will be detected by the
editing device.
S0
S21
S22
S23
M1002
S0
SET
SET S22
S0
RET
S21
S
S22
S
SET
S21
S0
S
S23
S
SET S23
M1002
primary pulse

Step Ladder Action:
The step ladder is made up of numerous step points; each step point represents one control procedure
action, and each step point needs to execute following three missions:
1. Drive output coil
2. Specific transition condition
3. Designate what step point is to be appointed to take over the control power of the present step
point
ELC Syst em Manual

8- 6
Example:
SET Y1
Y0
SET S20
Y20
SET S30
S10
S
X0
S20
S
X1
SET Y1
Y0
SET S20
Y20
SET S30
S10
S
X0
S20
S
X1
When X0=ON,
S20=On,
S10=Off.

Explanation:
When S10=ON, Y0 and Y1 are ON. When X0=ON, S20=ON and Y20 is ON, too.
And when S10 is OFF, Y0 will be OFF, but Y1 is ON. (Since Y1 uses the SET command, it will keep in
ON status)
Step ladder timing:
When state contact Sn is ON, circuit will be activated and circuit wont be activated when state contact
Sn is OFF. (Above action will be executed after delaying a scan time)
The repeated usage of the output coil:
1. Output coils of the same number could be used
in different step points.
2. Such as right diagram, there is the same output
device Y0 in the different state. No matter S10
or S20 is ON, Y0 will be ON.
3. Y0 will be close during the transition from S10 to
S20 and output Y0 after S20 is ON. Thus in this
case, Y0 will be ON no matter S10 or S20 is ON.
4. For general ladder diagrams, repeated usages
of the output coils should be avoided. Output
coil number used in step point should be
avoided to use after returning to general ladder
diagram.
SET Y1
Y0
SET S20
SET S30
S10
S
X0
S20
S
X1
Y0

8. Sequent i al Funct i on Char ts

8- 7
Repeated usage of the timer:
Same as general output points, the timer could be
used repeatedly for different step points. (this is one
feature of step ladder diagram, but for general ladder
diagrams, repeated usages of the output coils should
be avoided. Output coil number used in step point
should be avoided to use after returning to general
ladder diagram.)
Note: as right diagram, PB/PC/PA/PH series timer
only used repeatedly in disconnected step point.
S20
S30
S40
X1
X2
TMR T1 K10
TMR T2 K20
TMR T1 K30

Transfer of the step point:
SET Sn and OUT Sn commands are both used to start (or to transfer to) another step point, and the
occasions to use these commands could be different: when the controlling power is transferred to
another step point, the status of the original step point S and the action of the output point would all be
erased. Due to that numerous step control procedures could exist at the same program
simultaneously (take S0~S9 as the starting and ending points to lead the step ladder diagram), the
transfer of steps could thus be on the same step procedure or could be transferred to different step
procedures. And thus, the transfer commands, SET Sn and OUT Sn, of the step point might vary
somewhat in usage; please refer to the following explanations:
SET Sn
Within the same procedure, it is used to drive up the next status step point, and after the status is
transferred, outputs of previous action status points will be clear.
Y0
SET S12
SET S14
S10
X0
S12
X1
Y1
When executing SET S12,
status step point moves from
S10 to S12 and clear S10 and
all outputs (Y0).

OUT Sn
Within the same procedure, transfer of the simultaneous convergence point and different procedures
are used to drive up separate step points, and after the status is transferred, outputs of previous action
ELC Syst em Manual

8- 8
status points will be clear.
SFC diagram: Step Ladder Diagram:
S0
S21
S24
S25
X7
X2
OUT
OUT
S24
S21
S
S0
S
S23
S
X2
S24
S
S25
S
S0
X7
RET
Drive jump step point
return to primary step point
S25 uses OUT to return
to primary step point S0
Using OUT S24
Using OUT S0

1. Within the same procedure, it is used to return to primary step point.
2. Within the same procedure, it is used for the step points to jump up or down between
disconnected step point.
3. At different procedures, it is used to drive up separate step points.
SFC figure: Step Ladder diagram:
S0
S21
S23
X2
OUT
OUT
S1
S41
S43
OUT
S42
S42
S21
S
S0
S
S1
S
X2
S42
S
S43
S
RET
S23
S
RET
Drive separate
step point
step procedure
inducted by S0
step procedure
inducted by S1
Using OUT S42
S0 and S1 two different step procedures
S23 return to primary step point
S0 by using OUT
S43 return to primary step point
S1 by using OUT

8. Sequent i al Funct i on Char ts

8- 9
Notice of Driving Output Points:
As in the following left diagram, after the LD or LDI command is written in the second line of BUS
beyond the step point, output coil cant be connected from BUS directly. There will be error when
compiling. It is needed to modify to following middle and left diagram to correct diagram.
Y0
S
S
Y1
Y2
M0
n
Y0
S
S
Y2
Y1
n
M0
Y0
S
S
Y1
Y2
M0
n
M1000
BUS
modify position
or
normally open contact
in RUN mode
Usage restrictions for partial commands:
Program of every step point is identical to the general ladder diagram, and every kind of series and
parallel connection circuits or application commands could all be utilized, however, part of the
commands are under certain restrictions, please refer to the following descriptions:
Basic commands that are to be used within the step point
Basic command

Step point
LD/LDI/LDP/LDF
AND/ANI/ANDP/ANDF
OR/ORI/ORP/ORF
INV/OUT/SET/RST
ANB/ORB
MPS/MRD/MPP
MC/MCR
Primary step point/ General step point Yes Yes No
General output Yes Yes No
Diverging step
point/
Converging
step point
Step point transfer Yes Yes No
1. MC/MCR commands are not to be used within the step point.
2. The STL command could not be used in general sub-programs and the interruption service
sub-program.
3. Use of the CJ command is not prohibited within the STL command, however, it will complicate the
action and should thus be avoided.
4. MPS/MRD/MPP command position:
ELC Syst em Manual

8- 10
Ladder Diagram:
Y1
S
S
M0
Y2
X2
n
X3
X1 X0
MPP
MRD
MPS
BUS
LD X0

Command code:
STL Sn
LD X0
MPS
AND X1
OUT Y1
MRD
AND X2
OUT M0
MPP
AND X3
OUT Y2
Explanation:
The BUS of step point cant use
commands MPS / MRD / MPP
directly. It needs to use command
LD or LDI before using commands
MPS / MRD / MPP.
Other Notice:
For general, commands (SET S or OUT S) that used to transfer to next state are better to use after
finishing all relative outputs and actions.
In the following figure, they are the same after executing by ELC. If there are many conditions or actions
in S10, it is recommended to execute SET S20 after modifying from left figure to right figure and
finishing all relative outputs and actions. In this way, the procedure is clear and easy to maintain.
SET
Y0
S10
S
S20
S
Y2
S20
Y1 SET
Y0
S10
S
S20
S
Y2
S20
Y1

It is needed to add RET command after finishing step
ladder program and RET command is also needed to
add after STL as shown in right figure.
S0
S20
S
RET
X1
S0
S20
S
RET
X1

8. Sequent i al Funct i on Char ts

8- 11
8.4 Reminder of Design on the Step Ladder Program
1. The step point up front in SFC is called the primary step point, S0~S9. Utilize the primary step
point to be the start of the procedure, and use the RET command as the end to construct a
complete procedure.
2. If the STL command is not in use, S could be served as general auxiliary relay.
3. The number for the step point, S, could not be used repeatedly.
4. Categories of procedures:
Single procedure: there is only a procedure in a program (the alternative diverge and converge, the
simultaneous diverge and converge arent included)
Complicated single procedure: there is only a procedure in a program and it includes alternative
diverge, alternative converge procedures, Simultaneous diverge and simultaneous converge
procedures.
Combination procedure: there are numerous single procedures in a program and maximum is 10
(S0~S9) procedures.
5. Procedure separation: it is allowed to write in numerous procedures within one step ladder
diagram
There are two single procedures S0 and S1 at the right
diagram; procedure of the program is to write in S0 ~S30
first, and then S1~S43.
Either one step point on the procedure could jump to any
one specified step point on other procedures.
Once the condition below S21 at the right diagram is held, it
could jump to the specified S42 step point on the S1
procedure; this motion is called the separate step point.
S0
S21
S30
OUT
OUT
S1
S41
S43
OUT
S42

6. Restrictions on the diverging procedure: (See following examples)
a) Up to 8 diverging step points could be used within a diverging procedure.
b) Up to 16 loops could be used in the combination of plural diverging or simultaneous
converging procedures.
c) Either one step point on the procedure could jump to any one specified step point on other
procedures.
ELC Syst em Manual

8- 12
7. Reset of the step point and the output prohibition:
a) Use the ZRST command to Reset a section f step points to be OFF.
b) Use the output Y prohibition of ELC (M1034=ON).
8. Retaining step point:
When ELC encountered power failure, the retaining step point will memorize the ON/OFF status,
and go on with the execution before the power failure after the power is turned back on.
9. Special auxiliary relay and special register: refer to IST command for detail.
Device Description
M1040
Step transition inhibits. When M1040 is ON, all movement of step point are
inhibited.
M1041 Step transition start. Flag for IST command.
M1042 Start pulse. Flag for IST command.
M1043 Origin reset completed. Flag for IST command.
M1044 Origin condition. Flag for IST command.
M1045 All outputs clear inhibit. Flag for IST command.
M1046 STL state setting. Once there is a step point ON, M1046 is ON.
M1047 STL monitor enable
D1040 ON state number 1 of step point S
D1041 ON state number 2 of step point S
D1042 ON state number 3 of step point S
D1043 ON state number 4 of step point S
D1044 ON state number 5 of step point S
D1045 ON state number 6 of step point S
D1046 ON state number 7 of step point S
D1047 ON state number 8 of step point S
8. Sequent i al Funct i on Char ts

8- 13
8.5 Categories of Procedures
Single procedure:
The basic step action is single procedure control action.
The first step point of step ladder diagram is called primary step point and the number is S0~S9. Those
step points after primary step point are called general step point and the number are S10~S1023.
S10~S19 will be used as origin reset step points once use command IST.
1. Single Procedure without Divergence and Convergence
After finishing a procedure, transferring control power of step point to primary step point.
M1002
ZRST S0 S127
SET S0
SET S20
Y0
SET S30
Y1
SET S40
Y4
S0
RET
END
X0 S0
S
S20
S
X1
S30
S
X2
S60
S
X5
Y2
SET S50
S40
S
X3
Y3
SET S60
S50
S
X4
Step Ladder Diagram

S0
S20
S30
S40
S0
M1002
X0
X1
X2
X5
Y0
Y1
Y2
SFC diagram
S50
X3
Y3
S60
X4
Y4

ELC Syst em Manual

8- 14
2. JUMP Procedure
a) Transfer control power of step point to upper certain step point.
S0
S21
S42
S43
OUT
OUT

b) Transfer control power of step point to step point of other procedure.
S0
S21
S41
OUT
OUT
S1
S41
S43
OUT
S42

3. Reset Procedure
At the right diagram, S50 will Reset itself and end the
procedure when condition is held.
S0
S21
S50
RST

Complicated single procedure:
It includes alternative diverge, alternative converge procedures, Simultaneous diverge and
simultaneous converge procedures.
8. Sequent i al Funct i on Char ts

8- 15
1. Structure of simultaneous divergence
The situation that transfers to many states when present condition is held is called structure of
simultaneous divergence as shown in following. When X0=ON, S20 will transfer to S21, S22, S23
and S24 at the same time.
Ladder diagram of simultaneous divergence:
X0
SET
SET S22
S21
S
SET S23
S20
SET S24

SFC diagram of simultaneous divergence:
S20
S21 S22 S23 S24

2. Structure of the alternative divergence
The situation that transfers to individual state when individual condition of present state is held is
called structure of alternative divergence as shown in following. S20 will transfer to S30 when
X0=ON, S20 will transfer to S31 when X1=ON and S20 will transfer to S32 when X2=ON.
Ladder diagram of alternative divergence:
X0
SET
SET S31
S30
S
SET S32
S20
X1
X2

SFC diagram of alternative divergence:
ELC Syst em Manual

8- 16
S20
S30 S31 S32
X0 X1 X2

3. Structure of the simultaneous convergence
The situation that transfers to next state when continuous states are held at the same time is
called simultaneous convergence.
Ladder diagram of simultaneous convergence:
X2
SET S50
S
S40
S
S41
S
S42

SFC diagram of simultaneous convergence:
S40
S50
S41 S42
X2

4. Structure of the alternative convergence
The following ladder diagram is alternative convergence. That means it will transfer to S60 once
one of S30, S40 and S50 is held.
Ladder diagram of alternative convergence:
X0
SET
SET S60
S60
S
SET S60
S30
X1
X2
S
S40
S
S50

SFC diagram of alternative convergence:
S30
S60
S40 S50
X0 X1 X2

8. Sequent i al Funct i on Char ts

8- 17
Example of the alternative divergence and alternative convergence procedures
Step Ladder Diagram: SFC Diagram:
M1002
ZRST S0 S127
SET S1
SET S20
Y0
SET S30
Y1
SET S40
Y2
END
X0 S1
S
S20
S
X1
S30
S
X2
S40
S
X3
SET S31
X4
SET S32
X7
SET S50
Y3
S31
S
X5
SET S41
Y4
S41
S
X6
SET S50
Y5
S32
S
X20
SET S42
Y6
S42
S
X21
SET S50
S50
S
T1
SET S60
TMR T1 K10
Y7
S60
S
X22
RET
S1
S1
S20
S30
S40
S1
M1002
X0
X1
X2
X22
Y0
Y1
Y2
S50
X3
S60
T1
Y7
S31
S41
X4
X5
Y3
Y4
X6
TMR T1 K10
S32
S42
X7
X20
Y5
Y6
X21
ELC Syst em Manual

8- 18
Example of the simultaneous divergence and simultaneous convergence procedures
Step Ladder Diagram: SFC Diagram:
M1002
ZRST S0 S127
SET S3
SET S20
Y0
SET S30
Y1
SET S40
Y2
END
X0 S3
S
S20
S
X1
S30
S
X2
S40
S
SET S31
SET S32
Y3
S31
S
X3
SET S41
Y4
S41
S
Y5
S32
S
X4
SET S42
Y6
S42
S
X5
SET S50
S50
S
T1
SET S60
TMR T1 K10
Y7
S60
S
X6
RET
S3
S40
S
S41
S
S42
S

S3
S20
S30
S40
S3
M1002
X0
X1
X2
X6
Y0
Y1
Y2
S50
X5
S60
T1
Y7
S31
S41
X3
Y3
Y4
TMR T1 K10
S32
S42
X4
Y5
Y6

8. Sequent i al Funct i on Char ts

8- 19
Example of the simultaneous divergence and alternative convergence procedures
Step Ladder Diagram: SFC Diagram:
S127
K10
M1002
ZRST S0
SET S4
SET S20
Y0
SET S30
Y1
SET S40
Y2
END
X0 S4
S
S20
S
X1
S30
S
X2
S40
S
X3
SET S31
SET S32
SET S50
Y3
S31
S
X4
SET S41
Y4
S41
S
X5
SET S50
Y5
S32
S
X6
SET S42
Y6
S42
S
X7
SET S50
S50
S
T1
SET S60
TMR T1
Y7
S60
S
X6
RET
S4
S4
S20
S30
S40
S4
M1002
X0
X1
X2
Y0
Y1
Y2
S50
X3
S60
T1
Y7
S31
S41
X4
Y3
Y4
TMR T1 K10
S32
S42
X6
Y5
Y6
X5 X7
ELC Syst em Manual

8- 20
Combination example 1: (includes the alternative divergence and convergence, the
simultaneous divergence and convergence)
Step Ladder Diagram:
S127
M1002
ZRST S0
SET S0
Y1
SET S30
Y2
SET S40
Y3
S
X1
S30
S
X4
S31
S
X5
SET S31
SET S32
SET S40
Y5
S40
S
X7
SET S50
Y7
S50
S
X21
SET S60
Y23
S60
S
SET S51
X2
X3
S20
Y0
SET S20
S
X0
S0
END
Y20
S51
S
X22
SET S61
S61
S
X25
SET S70
Y24
Y27
S70
S
X27
RET
S0
S60
S
S61
S
Y4
S32
S
X6
SET S41
Y6
S41
S
X20
SET S52
SET S53
Y22
S53
S
X24
SET S63
Y25
S62
S
Y26
S63
S
X26
S0
S62
S
S63
S
Y21
S52
S
X23
SET S62
8. Sequent i al Funct i on Char ts

8- 21
SFC Diagram:
S0
S20
S30
S40
S0
M1002
X0
X1
X4
X27
Y1
Y2
Y5
S50
X7
S70 Y27
S51
S61
X22
Y20
Y24
S52
S62
X23
Y21
Y25
X21
X25
S60 Y23
Y0
Y7
S31 Y3
X5
X2
S32 Y4
X6
X3
S41 Y6
X20
X26
S53
S63
Y22
Y26
X24
S0


ELC Syst em Manual

8- 22
Combination example 2: (includes the alternative divergence and convergence, the
simultaneous divergence and convergence)
Step Ladder Diagram: SFC Diagram:
S127
M1002
ZRST S0
SET S0
SET S30
Y0
SET S31
Y1
SET S33
Y2
END
X0 S0
S
S30
S
X1
S31
S
X2
S32
S
X3
SET S32
SET S33
Y3
S33
S
X4
SET S34
Y4
S34
S
X5
SET S35
Y6
S36
S
X6
SET S37
Y7
S37
S
S0
S35
S
RET
X1
SET S36
Y5
S35
S
X7 S37
S

S0
S30
S31
S33
M1002
X0
X1
X2
Y0
Y1
Y3
S34
X4
S36
S37
X6
Y6
Y7
X5
S35 Y5
Y4
S32 Y2
X3
X1
S0
X7

8. Sequent i al Funct i on Char ts

8- 23
Restrictions on the divergence procedure:
1. Up to 8 divergence step points could be used in a divergence procedure. In following diagram,
maximum divergence step points after step point S20 are 8 (S30 - S37).
2. Up to 16 loops could be used in the combination of plural divergence or simultaneous
convergence procedures. In following diagram, 4 step points after step point S40, 7 step points
after step point S41 and 5 step points after step point S42. In this procedure, maximum is 16
loops.
3. Either one step point on the procedure could jump to any one specified step point on other
procedures.
SFC Diagram:
Y26 S60
X26
X41
S0
S20
S30
S40
S0
M1002
X0
X1
X11
X51
Y0
Y1
Y11
S50
X20
S80 Y41
S51
S71
X33
Y15
Y33
S53
S73
X35
Y17
Y35
X32
X44
S70 Y32
Y14
S31 Y2
X12
X2
S32 Y4
X15
X4
S41 Y12
X21
X52
S54 Y20
S0
SET
S32 Y3
X14
X3
S52
S72
X34
Y16
Y34
S0
SET
X13
S20
OUT
S20
OUT
S81
X45
Y42
SET
S34 Y5
X15
X5
S35
X15
X6
S55
S74
X36
X22
X46
Y27 S61
X27
X42
Y30 S62
X30
Y31 S63
X31
Y40 S76
X43
X50
Y6 S36
X16
X7
Y7
Y21
Y36
S56 Y22 S57 Y23 S20
X23
OUT
RST
S36
Y10
Y13
Y25
Y37
S58
X37
X24
Y24
RST
S58
S37
S42
S59
S75
X40
X47
X10
X17
X25
SET
S0 OUT
S42


ELC Syst em Manual

8- 24
8.6 IST Command
API Mnemonic Operands Function
60

IST

Manual/Auto Control
Controllers
PB PC PA PH PV

Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
S

* * *
D
1
*
D
2
*
IST: 7 steps

PULSE 16-bit 32-bit
PB PC PA PH PV PB PC PA PH PV PB PC PA PH PV
Operands:
S: The starting input number (Operand S will occupy 8 continuous devices). D
1
The smallest number
for the designated-status step point in auto mode. D
2
: The greatest number for the designated-status
step point in auto mode.
Explanations:
1. The IST is a convenient instruction made specifically for the initial state of the step function control
procedure.
2. PB model, The range D
1
and

D
2
= S20~S127 and D
1
< D
2.
PC/PA/PH/PV models, the range D
1
and

D
2
= S20~S899 and D
1
< D
2.

3. IST instruction can only be used one time in a program.
Program Example 1
M1000
IST X30 S20 S60

S= X30: Individual operation (Manual operation)
X31: Zero point return
X32: Step operation
X33: One cycle operation
X34: Continuous operation
X35: Zero point return start switch
X36: Start switch
X37: Stop switch
1. When the IST instruction is executed, the following special auxiliary relay will switch automatically.
M1040: Movement inhibited
M1041: Movement start
M1042: Status pulse
M1047: STL monitor enable
S0: Manual operation/initial state step point
S1: Zero point return/initial state step point
S2: Auto operation/initial state step point
8. Sequent i al Funct i on Char ts

8- 25
1. When IST instruction is used, S10~S19 are for zero point return operation and the step point of
this state cant be used as a general step point. However, when using S0~S9 step points, S0
initiates manual operation, S1 initiates zero point return operation and S2 initiates auto
operation. Thus, there should be three circuits of these three initial state step points written first in
the program.
2. When switching to S1 (zero point return mode), zero point return wont have any actions once any
of S10~S19 = ON.
3. When switching to S2 (auto operation mode), auto operation wont have any actions once when
S is between D1 to D2 = ON or if M1043=ON
Program Example 2
The Robot arm control (use IST instruction):
1. Motion request: In the example, two kinds of balls (big and small) are separated and moved to
different boxes.
2. Motion of the Robot arm: lower robot arm, collect balls, raise robot arm, shift to right, lower robot
arm, release balls, raise robot arm, shift to left to finish motion in order.
3. I/O Device:
Y0
Y1
Y2 Y3
Left-limit X1
Upper-li mi t X4
Upper-li mi t X5
Right-li mi t X2
(bi g bal ls)
Right-li mi t X3
(small bal ls)
Big Small Big/smal l
sensor X0

4. Control panel
X35
X36
X37
X20
X21
X22
X23
X24
X25
Step X32
One cycle
operation X33
Continuous
operation X34
Manual
operation X30
Zero return X31
Power start
Power stop
Zero return
Auto start
Auto stop
Shi ft
to right
Shi ft
to left
Rel ease
balls
Col lect
balls
Lower
robot arm
Rai se
robot arm

a) Big/small sensor X0.
ELC Syst em Manual

8- 26
b) The left-limit of the robot arm X1, the right-limit X2 (big balls), the right-limit X3 (small balls),
the upper-limit X4, and the lower-limit X5.
c) Raise robot arm Y0, lower robot arm Y1, shift to right Y2, shift to left Y3, and collect balls Y4.
5. START circuit:
M1000
IST X30 S20 S80
X0
M1044
X1 Y4

6. Manual operation mode:
X20
SET
RST Y4
Y4
S
S0
X21
X22 Y1
Y0
X23 Y0
Y1
X24 X4
Y2
Y3
X25 X4
Y3
Y2
Collect balls
Release balls
Lower robot arm
Raise robot arm
Condition interlock
Shift to right
Shift to left
Condition interlock
Raise robot arm to the
upper-limit (X4 is ON)

7. Zero point return mode:
a) SFC Diagram:
S1
S10
X35
S11
X4
S12
X1
RST Y4
RST Y1
Y0
RST Y2
Y3
SET M1043
RST S12
Release balls
Stop lowering robot arm
Raise robot arm to the
upper-limit (X4 is ON)
Stop shifting to right
Shift to left and shift to
the left-limit (X1 is On)
Start zero return completed flag
Zero return operation completed
8. Sequent i al Funct i on Char ts

8- 27
b) Step Ladder Diagram:
X35
SET S10
S
S1
RST Y4
S
S10
RST Y1
Y0
X4
SET S11
RST Y2
S
S11
Y3
X1
SET S12
SET M1043
S
S12
RST S12
Enter zero return operation mode
Release balls
Stop lowering robot arm
Raise robot arm to the
upper-limit (X4 is ON)
Stop shifting to right
Shift to left and shift to
the left-limit (X1 is On)
Start zero return completed flag
Zero return operation completed

ELC Syst em Manual

8- 28
8. Auto operation (step/one-cycle/continuous operation modes):
a) SFC Diagram:
S2
S20
S30
S31
M1044
X5
T0
Y1
SET
Y0
S32
X4
X2
S50 Y1
Y2
S2
X1
M1041
X0
Y4
TMR T0 K30
S60 RST
X5
Y4
TMR T2 K30
S70
T2
Y0
S80
X4
Y3
X1
S40
S41
X5
T1
SET
Y0
S42
X4
X3
Y2
X0
Y4
TMR T1 K30
X3 X2

8. Sequent i al Funct i on Char ts

8- 29
b) Step Ladder Diagram:
SET S20
SET S30
SET Y4
Y0
END
X5
S31
S
X4
TMR T0
SET S32
S2
S
M1041 M1044
S20
S
S30
S
Y1
X0
SET S40
X5 X0
SET S31
T0
K30
Y2
S32
S
X2
SET S50
X2
SET Y4
TMR T1
S40
S
SET S41
T1
K30
Y0
S41
S
X4
SET S42
Y2
S42
S
X3
SET S50
X3
Y1
S50
S
X5
SET S60
RST Y4
TMR T2
S60
S
SET S70
T2
K30
Y0
S70
S
X4
SET S80
Y3
S80
S
X1
X1
RET
S2
Enter auto operation mode
Collect balls
Release balls
Lower robot arm
Shift to right
Raise robot arm to the
upper-limit (X4 is ON)
Shift to left and shift to
the left-limit (X1 is On)
Collect balls
Raise robot arm to the
upper-limit (X4 is ON)
Shift to right
Lower robot arm
Raise robot arm to the
upper-limit (X4 is ON)

ELC Syst em Manual

8- 30
Flag explanation:
M1040:
Step point movement disabled. When M1040=ON, all movements of the step point are disabled.
1. Manual operation mode: M1040 = ON.
2. Zero point return mode/one cycle operation mode: Pressing the STOP button and pressing
START button again, M1040 = ON.
3. Step operation mode: M1040 = ON, and will only be OFF when the START button is pressed.
4. Continuous operation mode: When ELC goes from STOPRUN, M1040 = ON, and will be OFF
when the START button is pressed.
M1041:
Step point movement start: the special auxiliary relay that reflects the movement of the primary step
point (S2) to the next step point.
1. Manual operation mode/Zero point return mode: M1041 = OFF.
2. Step operation mode/One cycle operation mode: M1041 = OFF when the START button is
pressed.
3. Continuous operation mode: Stays ON when the START button is pressed, and turns OFF when
the STOP button is pressed.
M1042:
START pulse: Only one pulse will be sent out when the button is pressed.
M1043:
Zero point return complete: Once M1043 =ON, indicates that the RESET motion has been executed.
M1044:
Conditions of the origin: In continuous operation mode, conditions of the origin, M1044= ON to execute
the initial step point (S2) moving to the next step point.
M1045:
1. All output reset inhibit. If executing conditions:
a) From manual control S0 to zero point return S1
b) From auto operation S2 to manual operation S0
8. Sequent i al Funct i on Char ts

8- 31
c) From auto operation S2 to zero point return S1
2. When M1045=OFF and one of S of D1~D2 is ON, step point of SET Y output and actions will be
cleared to OFF.
3. When M1045 =ON, SET Y output will be reserved, and step point during action will be cleared to
OFF.
4. If executing from zero point return S1 to manual operation S0, no matter if M1045=ON or
M1045=OFF, SET Y output will be reserved, and step point action will be cleared to OFF.
M1046:
Set STL = ON: If one of step point S is ON, M1046=ON. After M1047 = ON, M1046 = ON once one of S
is ON. Besides, 8 points numbers before S is on will be recorded in D1040~D1047.
M1047:
STL monitor enabled. When IST instruction starts executing, M1047 will be forced to be ON and it will be
forced to ON for each scan time once IST instruction is still ON. This flag is used to monitor all S.
D1040~D1047: ON state number 1-8 of step point S.
Points to Note:
5. Operand S will occupy 8 continuous devices.
6. The range D
1
and

D
2
= S20~S899 and D
1
< D
2.

7. IST instruction can only be used one time in a program.
8. Flag: M1040~M1047.
ELC Syst em Manual

8- 32
MEMO


9- 1
Troubleshooting
This chapter contains information on troubleshooting the ELC.

This Chapter Contains

9.1 Common Problems and Solutions.......................................................................................... 9-2
9.2 Fault Code Table....................................................................................................................... 9-4
9.3 Error Detection Devices........................................................................................................... 9-7
9.4 Periodic Inspection .................................................................................................................. 9-7

ELC Syst em Manual

9- 2
9 Fault Indication From Panel
9.1 Common Problems and Solutions
The following tables list some common problems and troubleshooting procedures for the ELC system
in the event of faulty operation.
System Operation
Symptom Troubleshooting and Corrective Actions
All LEDs are OFF Check the power supply wiring. If the power supplied to the ELC control
units is in the range of the rating.
Be sure to check the fluctuation in the power supply.
Disconnect the power supply wiring to the other devices if the power
supplied to the ELC control unit is shared with them.
If the LEDs on the ELC control unit turn ON at this moment, the capacity of
the power supply is not enough to control other devices as well. Prepare
another power supply for other devices or increase the capacity of the
power supply.
If the POWER LED still does not light up when the power is on after the
above corrective actions, the ELC should be sent back to the dealer or the
distributor whom you purchased the product from.
ERROR LED is
flashing
If the ERROR LED is flashing, the problem may be an invalid commands,
communication error, invalid operation, or missing instructions, error
indication is given by self-checking function and corresponding error code
and error step are stored in special registers. The corresponding error
codes can be read from the ELCSoft or HHP. Error codes and error steps
are stored in the following special registers.
Error code: D1004
Error step: D1137
If the connections between the ELC are failed and the LED will flash
rapidly, this indicates the DC24V power supply is down and please check
for possible DC24V overload.
The LED will be steady if the program loop execution time is over the
preset time (D1000 preset value), check the programs or the WDT (Watch
Dog Timer). When the LED lights up, switch the power ON and OFF to see
if the RUN LED is off. If not, please check if there is any noise interference
or any foreign object in the ELC.
9. Troubl eshoot i ng

9- 3
Symptom Troubleshooting and Corrective Actions
Diagnosing Input
Malfunction
Check the wiring of the input devices(input indicator LEDs are OFF)
Check that the power is properly supplied to the input terminals.
If the power is properly supplied to the input terminal, there is probably an
abnormality in the ELCs input circuit. Please contact your dealer.
If the power is not properly supplied to the input terminal, there is probably
an abnormality in the input device or input power supply. Check the input
device and input power supply.
Check the input condition (input indicator LEDs are ON)
Monitor the input condition using a programming tool.
If the input monitored is OFF, there is probably an abnormality in the ELCs
input circuit. Please contact your dealer.
If the input monitored is ON, check the program again. Also, check the
leakage current at the input devices (e.g., two-wire sensor) and check for
the duplicated use of output or the program flow when a control instruction
such as MC or CJ is used.
Check the settings of the I/O allocation.
Diagnosing Output
Malfunction
Check the wiring of the loads. (output indicator LEDs are ON)
Check if the power is properly supplied to the loads.
If the power is properly supplied to the load, there is probably an
abnormality in the load. Check the load again. If the power is not supplied
to the load, there is probably an abnormality in the ELCs output circuit.
Pleas contact your dealer.
Check of output condition (output indicator LEDs are OFF)
Monitor the output condition using a programming tool.
If the output monitored is turned ON, there is probably a duplicated output
error.
Forcing ON the output using a programming tool.
If the output indicator LED is turned ON, go to input condition check.
If the output LED remains OFF, there is probably an abnormality in the
ELCs output circuit. Please contact your dealer.


ELC Syst em Manual

9- 4
9.2 Fault Code Table
Fault Code Description Action
0001 Operand bit device S exceeds the valid range
0002 Label P exceeds the valid range or duplicated
0003 Operand KnSm exceeds the valid range
0102 Interrupt pointer I exceeds the valid range or duplicated
0202 Instruction MC exceeds the valid range
0302 Instruction MCR exceeds the valid range
0401 Operand bit device X exceeds the valid range
0403 Operand KnXm exceeds the valid range
0501 Operand bit device Y exceeds the valid range
0503 Operand KnYm exceeds the valid range
0601 Operand bit device T exceeds the valid range
0604 Operand word device T register exceeds limit
0801 Operand bit device M exceeds the valid range
0803 Operand KnMm exceeds the valid range
0B01 Operand K, H available range error
0D01 DECO operand misuse
0D02 ENCO operand misuse
0D03 DHSCS operand misuse
0D04 DHSCR operand misuse
0D05 PLSY operand misuse
0D06 PWM operand misuse
0D07 FROM/TO operand misuse
0D08 PID operand misuse
0D09 SPD operand misuse
0D0A DHSZ operand misuse
0D0B IST operand misuse
0E01 Operand bit device C exceeds the valid range
0E04 Operand word device C register exceeds limit
0E05 DCNT operand CXXX misuse
0E18 BCD conversion error
0E19 Division error (divisor=0)
0E1A Device use is out of range (including index registers E, F)
0E1B Negative number after radical expression
Check the D1137
(Error step number)

Re-enter the
instruction correctly
9. Troubl eshoot i ng

9- 5
Fault Code Description Action
0E1C FROM/TO communication error
0F04 Operand word device D register exceeds limit
0F05 DCNT operand DXXX misuse
0F06 SFTR operand misuse
0F07 SFTL operand misuse
0F08 REF operand misuse
0F09 Improper use of operands of WSFR, WSFL instructions
0F0A Times of using TTMR, STMR instruction exceed the range
0F0B Times of using SORT instruction exceed the range
0F0C Times of using TKY instruction exceed the range
0F0D Times of using HKY instruction exceed the range
1000 ZRST operand misuse
10EF E and F misuse operand or exceed the usage range
2000 Usage exceed limit (MTR, ARWS, TTMR, PR, HOUR)
Check the D1137
(Error step number)

Re-enter the
instruction correctly

Fault Code Description Action
C400 An unrecognized instruction code is being used
C401 Loop Error
C402 LD / LDI continuously use more than 9 times
C403 MPS continuously use more than 9 times
C404 FOR-NEXT exceed 6 levels
C405



STL / RET used between FOR and NEXT
SRET / IRET used between FOR and NEXT
MC / MCR used between FOR and NEXT
END / FEND used between FOR and NEXT
C407 STL continuously use more than 9 times
C408 Use MC / MCR in STL, Use I / P in STL
C409 Use STL/RET in subroutine or interrupt program
C40A

Use MC/MCR in subroutine
Use MC/MCR in interrupt program
C40B MC / MCR does not begin from N0 or discontinuously
C40C MC / MCR corresponding value N is different
C40D Use I / P incorrectly
A circuit error occurs
if a combination of
instructions is
incorrectly specified.

Select programming
mode and correct the
identified error
ELC Syst em Manual

9- 6
Fault Code Description Action
C40E

IRET doesnt follow by the last FEND instruction
SRET doesnt follow by the last FEND instruction
C40F

PLC program and data in parameters have not been
initialized
C41B Invalid RUN/STOP instruction to extension module
C41C

The number of input/output points of I/O extension unit is
larger than the specified limit
C41D
Number of extension modules exceeds the range
C41F
Failing to write data into memory
C430
Initializing parallel interface error
C440
Hardware error in high-speed counter
C441
Hardware error in high-speed comparator
C442
Hardware error in MCU pulse output
C443
No response from extension unit
C4EE No END command in the program
A circuit error occurs if
a combination of
instructions is
incorrectly specified.

Select programming
mode and correct the
identified error
C4FF Invalid instruction (no such instruction existing)
9. Troubl eshoot i ng

9- 7
9.3 Error Detection Devices
Error Check
Devices
Description Drop Latch STOP RUN RUN STOP
M1067 Program execution error flag None Reset Latch
M1068 Execution error latch flag None Latch Latch
D1067 Algorithm error code None Reset Latch
D1068 Step value of algorithm errors None Latch Latch

Device D1067
Error Code
Description
0E18 BCD conversion error
0E19 Division error (divisor=0)
0E1A Floating point exceeds the usage range
0E1B The value of square root is negative

9.4 Periodic Inspection
1. Preventive maintenance is required to operate this ELC in its optimal condition, and to ensure a
long life. Be sure to observe the following precautions when selecting a mounting location. Failure
to observer these precautions may void the warranty!
2. Do not mount the ELC near heat-radiating elements or in direct sunlight.
3. Do not install the ELC in a place subjected to high temperature, high humidity, excessive vibration,
corrosive gasses, liquids, airborne dust or metallic particles.
4. Periodically check if the wiring and terminals are tight.
ELC Syst em Manual

9- 8
MEMO

10- 1
Handheld Programmer ELC-HHP
This chapter contains information regarding the handheld programmer.

This Chapter Contains

10.1 Introduction........................................................................................................................... 10-2
10.2 ELC-HHP Standard Specification........................................................................................ 10-4
10.2.1 ELC-HHP Dimensions................................................................................................. 10-4
10.2.2 Specifications............................................................................................................... 10-4
10.3 Initial Setup........................................................................................................................... 10-6
10.3.1 ELC ON-LINE Mode.................................................................................................... 10-7
10.3.2 PC ON-LINE Mode...................................................................................................... 10-9
10.3.3 ELC-HHP OFF-LINE Mode ....................................................................................... 10-12
10.4 ELC-HHP Program Read / Write........................................................................................ 10-14
10.4.1 ELC Program Read / Write........................................................................................ 10-14
10.4.2 PC Program READ / WRITE..................................................................................... 10-18
10.4.3 M_CARD READ / WRITE and Password Settings.................................................... 10-22
10.5 Program Mode .................................................................................................................... 10-26
10.5.1 Screen Display .......................................................................................................... 10-26
10.5.2 Basic Instruction Input ............................................................................................... 10-26
10.5.3 Application Instruction Input ...................................................................................... 10-27
10.5.4 Instruction INSERT / DELETE................................................................................... 10-29
10.5.5 [STEP] Function ........................................................................................................ 10-29
10.5.6 REPLACE Function................................................................................................... 10-31
10.5.7 Searching Application Instruction .............................................................................. 10-32
10.5.8 Searching for the API Codes ..................................................................................... 10-32
10.5.9 Indirect Index Register Application............................................................................ 10-34
10.6 ELC RUN / STOP Mode ...................................................................................................... 10-36
10.7 MON / TEST Mode .............................................................................................................. 10-37
10.8 Clear Users Program Memory.......................................................................................... 10-43
10.9 ELC and ELC-HHP Program Verifications........................................................................ 10-45
10.10 Parameters Settings........................................................................................................... 10-47
10.11 M_CARD Functions............................................................................................................ 10-50
10.12 File Register........................................................................................................................ 10-51
10.13 Error Code Explanations ................................................................................................... 10-54
10.14 Instruction Table................................................................................................................. 10-57
10.15 Troubleshooting and Error Message................................................................................ 10-64
10.16 ELC-HHP Connection......................................................................................................... 10-65
10.17 ELC-HHP Operation Flow Chart........................................................................................ 10-66
ELC Syst em Manual
10- 2
10 Handheld Programmer
10.1 Introduction
The Handheld Programmer (ELC-HHP) is a powerful programming and monitor panel. Please refer to
the following figure for detail.
The programs store in the ELC-HHP contain power loss retain function, when ELC-HHP connects to
ELC (the connection time is more than 120 seconds) and then disconnect, the data can be preserved
in the ELC-HHP for more than 3 days. Memory can be selected from 2000, 4000, 8000, 16000 STEPs
as user defined memory (factory default is 4000 STEPs).


M_Card(Flash)
ELC-CBHHELC15(1.5m)
M_Card slot
LCD module
(16 characters x 4 lines)
(yellow-green back lighted)
Keypad
ELC-HHP
Series communication port
( RS232 )



Keypad Arrangement

INS
STEP EDIT
LD RUN
MAIN
MON
SHIFT
CLEAR
DEL
TEST
STOP
SPACE
X
AND
Y M
OR API
S
LDI
T
ANI
H
ORI
K
-
P/I
OUT
C
ANB
D
ORB
E
END
F
SET
8
TMR
9
MC
A
STL
B
RST
4
CNT
5
MCR
6
RST
7
NOP
0
MPS
1
MRD
2
MPP
3
10. Handhel d Progr ammer
10- 3
MAIN

MAIN MENU: Pressing the key calls the MAIN MENU select screen, regardless of
the current display mode.
EDIT
WR

EDIT: Enter programming edit mode. this key is the same as the selection 1 PGM
EDIT in the MAIN MENU.
INS
DEL

INSERT/DELETE: this is a toggle key. Pressing this key once calls the INSERT
function. Pressing it again calls the DELETE function.
MON
TEST

MONITOR/TEST: this is a toggle key. Pressing this key once calls the MONITOR
function. Monitoring the content of every output points, counters, timer and data
registers, yet it can not perform the forced I/O. Pressing it again, calls the TEST
function, it will perform the forced I/O function.
Pressing this key will run the monitor function during editing programs.
SHIFT

SHIFT: In MON mode, pressing this prior to enter any monitor instruction.
Pressing this key again, prior to enter any new monitored component.
In EDIT mode, this key can perform as replacement function.
CLEAR

CLEAR: clear the most recent input instruction, and return to the previous
instruction.
RUN
STOP

RUN/STOP: forced RUN/STOP instructions.
STEP

STEP: this key is used to input step numbers. Refer to Section 10.5.5
SPACE

SPACE: this key is used whenever a device or a constant is to be input.

Cursor [] [] keys: the cursor keys are used to select the items in the EDIT,
INS, DEL and MON modes or go to the previous/next pages in the MAIN MENU.

ENTER: The [ ] key is used to enter and execute instructions, to scroll displayed
information, or to continue a search.
Instruction,
Devices, and
Number keys
Instruction keys are located at the left-upper corner, devices and number keys are
located at the down-right corner.
ELC Syst em Manual
10- 4
10.2 ELC-HHP Standard Specification
10.2.1 ELC-HHP Dimensions
(Unit: mm)

E 0000 LD X0000
0002 OUT Y0000
0004 END
0006 NOP



10.2.2 Specifications
Items Specification
Ambient Temperature 0 to 40
Ambient Humidity 50~95 % RH
Frequency Acceleration Amplitude
10 to 55Hz 1G 0.1 mm (0.004 in) Vibration
2 hours each in X/Y/Z directions
Shock Resistance 10G, 3 times each in X/Y/Z directions
Environment No corrosive gasses, liquid, or airborne dust
Supply Voltage 5V DC 5% (Supply from ELC)
Current Consumption 300mA (normal), 400mA (momentary Max)
Start Current 500mA MAX
Start Setting Time 0.5 seconds
User Memory Capacity 4000 / 8000 / 16000 STEPS
Latched Memory
There is a flash card to preserve internal program permanently and
set the function of passwords.
10. Handhel d Progr ammer
10- 5
Items Specification
Memory Backup for
Power Failure
Memory backup capacitor
After power is on for 120 seconds, it can retain internal device data
for 3 days without externally supplied power.
Display Unit LCD with backlight
Character
Matrix
1 character: 40 dots (8 x 5)
Bottom line: 5 dots (1 x 5 dots) are used for prompt.
Number of
Characters
64 characters (16 columns x 4 lines)
Display
Contents
Character
Types
Alphanumeric
File Register For PC/PA/PH/PV series to save register
Keypad 36 keys
Build-in Interface Used ELC-CBHHELC15 cable to connect to the ELC
Built-in RS-232
Series Communication
Interface
RS-232
Using for PCHHP and ELCHHP transmission.
Please refer to Section 10.3 for detail.
External Dimensions 180 x 90 x 29 mm
Weight 265.5g
ELC Syst em Manual
10- 6
10.3 Initial Setup
In order to begin to understand the ELC-HHP, lets use a program sample to operate it step by step.
This will give you a feel of the ELC-HHP. This Chapter is to prepare so that you can create a program
with the ELC-HHP in the ON-LINE mode, monitor and test it.

Three working mode of ELC-HHP are:
1. ELC ON-LINE mode
2. PC ON-LINE mode
3. OFF-LINE mode
Please refer to the following for detail.


Using ELC-CBHHELC15 cable to connect ELC and ELC-HHP or
using external power +5V to supply power. Because the ELC-HHP
does not have its own power supply, power is supplied from the ELC
through the programming cable. The initial screen will display the
version (VER 1.0) for 2 seconds. At this moment, the ELC-HHP is
self-test.

After self-test, it will enter the next mode. If the display is shown as
left, it means ELC-HHP is in malfunction. Please return it to your
distributor.

After finishing self-test, ELC-HHP will test the PC connection.
To make sure PC is in connection.

In PC ON-LINE mode, main menu will be shown as left.

If it cant connect to PC, ELC-HHP will test if it connects to ELC.
To make sure ELC is in connection.

Please execute the ELC ON-LINE mode to display main menu.
10. Handhel d Progr ammer
10- 7

If the connection to PC and ELC is failed, it will show as left.
Pressing [ ] to enter OFF-LINE mode.
Pressing [CLEAR] to execute connection testing between PC and
ELC. If the connection is successful, it will display main menu.
Otherwise, it will back to the OFF-LINE MODE.

The main menu in OFF-LINE MODE is the same as ELC connection
mode, but some items are disabled in this mode.

10.3.1 ELC ON-LINE Mode
Connecting ELC-HHP to ELC in ELC ON-LINE MODE, you can read ELC program from ELC-HHP or
write ELC-HHP program into ELC. Please refer to the following explanation.


After entering to the MAIN MENU, using [] and [] keys to select
the desired function, or press number keys 0 to 8. Press [ ] key
when complete.


Definitions of items 0 to 8:
0.ELCHHP:
It is program transmission between ELC-HHP and ELC (read and write). After entering, ELC will check
if there is password first. If yes, you should input the correct password to enter the following items.
1. HHPELC:
To download the programs from ELC to ELC-HHP user programming area (Read). You can
choose to read the segment program (end with the END instruction) or the whole program. And
setting the parameter PGM CAPACITY of ELC-HHP to the same program capacity as ELC.
2. HHPELC:
Writing the program from ELC-HHP to ELC (Write). ELC-HHP will check the capacity first. If
ELC-HHP setting is larger than ELC, it will have the message of the capacity is mismatch.
Otherwise, it can write and you can only write segment program (end with the END instruction) or
the whole program.
ELC Syst em Manual
10- 8
1.PGM EDIT:
Entering the EDIT mode by selecting item 1 from the MAIN MENU or press EDIT key in the keypad.
ELC-HHP will set edition range according to the parameter PGM CAPACITY.
4K: 3792 STEPS, for PB model
8K: 7920 STEPS, for PC/PA/PH model
16K: 15872 STEPS, for PV model

2.MONITOR/TEST:
Entering the MON/TEST mode by selecting number 2 from the MAIN MENU or MON/TEST key in the
keypad.
1. MONITOR: monitor ELC internal components status and content.
2. TEST mode: setting ELC internal components status and content.

3.PGM CLEAR:
To clear the content of user program or memory card.
1. ALL CLEAR: To clear the entire user program (16K STEPS). There is no correlation between this
setting and PGM CAPACITY setting.
2. SEGMENT CLEAR: To clear partial of the user program. (You can input the start address and the
end address.)
3. M_CARD CLEAR: To clear the entire memory card content. The password in M- CARD will also
be clear.

4.PGM CHECK:
To execute grammar analysis and check if the users programs are correct.

5.PGM VERIFY:
Program comparison.
1. HHP : ELC: It will compare ELC-HHP users programs with ELC internal programs and stop at the
instruction END. After comparing, parameter PGM CAPACITY will set to the same program
capacity as ELC.
2. HHP : M_CARD: It will compare ELC-HHP users programs with M_CARD internal programs and
stop at the instruction END.
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6.PARAMETER SET:
Parameter setting.
1. PGM CAPACITY: To display the ELC-HHP internal user programming capacity and modify its
capacity for all ELC models. (Users can select 4000 or 8000 or 16000 STEPS).
2. OS VERSION: To display ELC-HHP operation system version.
3. PASSWORD: To set or remove the ELC password.

7.ELCM_CARD:
ELC-HHP will check if it needs password. If yes, you should input the correct password to enter the
following item.
1. HHPM_CARD: Reading the M_CARD internal program to ELC-HHP user programming area. It
will use all memory (16K) and the setting of parameter PGM CAPACITY doesnt have any
change.
2. HHPM_CARD: Writing the program of ELC-HHP user programming area (16K) all into
M_CARD. (No matter what the setting of PGM CAPACITY is.) Before writing into M_CARD, you
can choose to set password or not.
3. M_CARD CHECK: Check sum of M_CARD.

8.FILE REGISTER:
The file register for transmitting files between ELC-HHP and PC/PA/PH/PV series.
1. HHPELC: To download the file from ELC to ELC-HHP (read).
2. HHPELC: To write the file from ELC-HHP to ELC (write).

10.3.2 PC ON-LINE Mode
User can connect ELC-HHP to PC (personal computer) in PC ON-LINE MODE and transmit data from
ELC-HHP to PC (ELCSoft) and vise versa. ELC-HHP is master and PC is slave during transmission.
The connection is shown below. External power +5V is the power supply used in PC ON-LINE MODE
or in OFF-LINE MODE.
Connection:
Input power of external power +5V. It is used to provide the power for ELC-HHP.
Step1:
Please make sure that PC ELCSoft (for WINDOWS) is in the status of waiting to connect to ELC-HHP.
Step2:
Connecting ELC-HHP to PC with RS-232.
ELC Syst em Manual
10- 10
Step3:
Plug in CABLE as following.
8PIN MINI DIN
ELC-HHP
5
2
1
4
3
6
7
8
ELC-HHP SIDE
PIN 5: RX
PIN 4: TX
PIN 3,6,8: GND
PIN 1,2: 5V
PIN 7: NC
ELC-CBHHELC15
DB9(Female)
RS-232
To RS-232
COM Port
PC
DB9(Female)


After completing connection, entering main menu to set.



After entering to the MAIN MENU, using [] and [] keys to select
the desired item, or press number keys 0 to 8. Pressing [ ] key and
then press [] or [] key to select next item.

Definitions of items 0 to 8:
0.PCHHP:
It is program transmission between ELC-HHP and ELC (read and write).
1. HHPPC: To download the programs from PC to ELC-HHP user programming area (Read). You
can only read segment program (end with the END instruction) or the whole program.
2. HHPPC: Entering the user programs from ELC-HHP to PC (Write). You can only write segment
program (end with the END instruction) or the whole program.

1.PGM EDIT:
Entering the EDIT mode by selecting item 1 from the MAIN MENU or EDIT key in the keypad.

2.MONITOR/TEST:
It is disabled in the PC ON-LINE MODE.
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3.PGM CLEAR: To clear the content of user program or memory card.
1. ALL CLEAR: To clear the entire user program.
2. SEGMENT CLEAR: To clear partial of the user program. (You can input the start address and the
end address.)
3. M_CARD CLEAR: To clear the entire memory card. The passwords will also be clear.

4.PGM CHECK:
To execute grammar analysis and check if the users programs are correct.

5.PGM VERIFY:
Program comparison.
1. HHP : ELC: It is disabled in the PC ON-LINE MODE.
2. HHP : M_CARD : It will compare ELC-HHP users programs with M_CARD internal programs.

6.PARAMETER SET:
Parameter setting.
1. PGM CAPACITY: To display the ELC-HHP internal user programming capacity and modify
ELC-HHP users programs for all ELC models. (Users can select 4000 or 8000 or 16000 STEPS).
2. OS VERSION: Displaying ELC-HHP operation system version.
3. PASSWORD: It is disabled in PC ON-LINE MODE.

7.ELC M_CARD:
HHP will check if it needs password. If yes, you should input the correct password to enter the following
items.
1. HHPM_CARD: Reading the M_CARD internal program to ELC-HHP user programming area. It
will use all the memory (16K) but parameter PGM CAPACITY doesnt have any change.
2. HHPM_CARD: Writing the program of ELC-HHP user programming area (16K) into M_CARD.
(No matter what the setting of PGM CAPACITY is.) Before writing, you can choose to set
password or not.
3. M_CARD CHECK: Check sum of M_CARD.

8.FILE REGISTER:
The register for transmitting file between ELC-HHP and ELCSoft.
1. HHPELC: To download the file from PC (edited by ELCSoft) to ELC-HHP. (Read)
2. HHPELC: To write the file from ELC-HHP to PC (ELCSoft).
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10- 12
10.3.3 ELC-HHP OFF-LINE Mode
ELC-HHP OFF-LINE mode: ELC-HHP can execute partial functions in OFF-LINE mode. It doesnt
connect to PC or ELC now and the power supply is from external power +5V.



After entering to the MAIN MENU, press [] and [] keys to select
the desired item, or press number keys 0 to 8. Then pressing [ ]
key to enter the item.


Definitions of items 0 to 8:
0.ELCHHP:
It is disabled in ELC-HHP OFF-LINE MODE.

1.PGM EDIT:
Entering the EDIT mode by selecting item 1 from the MAIN MENU or EDIT key in the keypad.

2.MONITOR/TEST:
It is disabled in ELC-HHP OFF-LINE MODE.

3.PGM CLEAR:
To clear the content of user program or memory card.
1. ALL CLEAR: To clear the entire user program content.
2. SEGMENT CLEAR: To clear partial of the user program. (You can input the start address and the
end address.)
3. M_CARD CLEAR: To clear the entire memory card content. The passwords will also be cleared.

4.PGM CHECK:
To execute grammar analysis and check if the users programs are correct.

5.PGM VERIFY:
Program comparison.
1. HHP: ELC: It is disabled in ELC-HHP OFF-LINE MODE.
2. HHP: M_CARD: To compare ELC-HHP users programs with M_CARD internal programs.

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6.PARAMETER SET:
Parameter setting.
1. PGM CAPACITY: To display the ELC-HHP internal user programming capacity and modify
ELC-HHP users programs for all ELC models. (Users can select 4000 or 8000 or 16000 STEPS).
2. OS VERSION: To display ELC-HHP operation system version.
3. PASSWORD: It is disabled in ELC-HHP OFF-LINE MODE.

7.ELCM_CARD:
ELC-HHP will check if it needs password first. If yes, you should input the correct password to enter the
following items.
1. HHPM_CARD: Reading internal program from the M_CARD to ELC-HHP user programming
area. It will use all the memory (16K), but parameter PGM CAPACITY doesnt have any change.
2. HHPM_CARD: Writing the program from ELC-HHP user programming area into M_CARD. (No
matter what the setting of PGM CAPACITY is) Before writing, you can choose to set password or
not.
3. M_CARD CHECK: Check sum of M_CARD.

8.FILE REGISTER:
It is disabled in OFF-LINE mode.
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10- 14
10.4 ELC-HHP Program Read / Write
There are three parts of ELC-HHP program Read / Write.
1. ELC-HHP to ELC
2. ELC-HHP to PC
3. ELC-HHP to M_CARD

10.4.1 ELC Program Read / Write
Please refer to the following steps for operating in ELC connection mode.

Read segment program (ELCELC-HHP)

To move the cursor to item 0 and press [ ] or [NOP/0].
Entering the transmission between ELC-HHP and ELC.

To move the cursor to item 1 and press [ ] or [MPS/1].
Entering the READ mode.

To move the cursor to item 1 and press [ ] or [MPS/1].
Entering the segment program mode.

Pressing [CLEAR] key to cancel the program read segment
function and return to the previous step.
Pressing [ ] key to execute program read segment function.

Entering program read segment mode, and it is reading.

Reading from ELC program, which address is from 0 to END
instruction, to ELC-HHP.
After reading, press [ ] key to return to main menu.

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10- 15
Read the whole program (ELCELC-HHP)

To move cursor to item 0 and press [ ] or [NOP/0]
Entering the program transmission between ELC-HHP and ELC.

To move cursor to item 1 and press [ ] or [MPS/1]
Entering the READ mode.

To move cursor to item 2 and press [ ] or [MRD/2]
Entering read all program mode.

Pressing [CLEAR] key to cancel program read all function and
return to the previous step.
Pressing [ ] key to enter program read all function.

Entering program read ALL mode and it is reading.

Reading all ELC program from ELC to ELC-HHP.
Pressing [ ] key to return to menu when completed.


Write segment ELC program (ELC-HHPELC)

To move cursor to item 0 and press [ ] or [NOP/0].
Entering the program transmission between ELC-HHP and ELC.

To move cursor to item 2 and press [ ] or [MRD/2].
Entering the WRITE mode.
ELC Syst em Manual
10- 16

If the message as shown in the left is displayed, it means the
capacity of ELC-HHP and ELC are mismatch.
Pressing [ ] key to modify the capacity of ELC-HHP to be the
same as ELC and enter WRITE mode.
Pressing [CLEAR] key to cancel and return to the previous page.
And user also can enter item 6 PARAMETER SET to reset the
capacity of user program of ELC-HHP. Please refer to Section 10.10
for detail.

To move cursor to item 1 and press [ ] or [MPS/1].
Entering SEGMENT PROGRAM MODE.

Pressing [CLEAR] key to cancel write segment program function,
and return to the previous step.
Pressing [ ] key to execute write segment program function.

Writing ELC-HHP segment program into ELC.
Entering the WRITE mode and the data is writing.
Pressing [CLEAR] key to break the WRITE function

Writing the ELC-HHP program, which locates from address 0 to
END instruction, into ELC.
Pressing [ ] key to return to menu when completed.

If the display unit shows the message as the left during the WRITE
mode, which means program error (the ELC ERROR LED will flash
at this moment). You can check the ERROR CODES on Section
10.13 to find out the exact error.
Pressing [ ] key to return to main menu.

Write all ELC program (ELC-HHPELC)

To move cursor to item 0 and press [ ] or [NOP/0].
Entering the program transmission between ELC-HHP and ELC.
10. Handhel d Progr ammer
10- 17

To move cursor to item 2 and press [ ] or [MRD/2].
Entering the WRITE mode.

If the message as shown in the left is displayed, it means the
capacity of ELC-HHP and ELC are mismatch.
Pressing [ ] key to modify the capacity of ELC-HHP to be the
same as ELC and enter WRITE mode.
Pressing [CLEAR] key to cancel and return to the previous page.
And user also can enter item 6 PARAMETER SET to reset the
capacity of user program of ELC-HHP. Please refer to Section 10.10
for detail.

To move cursor to item 2 and press [ ] or [MRD/2]
Entering the write all program MODE.

Pressing [CLEAR] key to cancel program write all function and
return to the previous step.
Pressing [ ] key to execute program write all function.

Writing all ELC-HHP program into ELC.
Entering the WRITE mode and the data is writing.
Pressing [CLEAR] key to break the WRITING.

If the display unit shows the message as the left during the WRITE
mode, which means program error (the ELC ERROR LED will flash
at this moment). You can check the ERROR CODES on Section
10.13 to find out the exact error.
Pressing [ ] key to return to main menu.

If the display unit shows the message as the left, it indicates that
ELC is running. At this moment, it cant write and you must stop the
ELC first. Please refer to the Section 10.5.
Pressing [CLEAR] key to return to main menu.
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10- 18

If the unit shows the error message displayed at the left while in
WRITE mode, partial data is incorrect or cannot be written. Repeat
the steps, if the unit displays the same error message, then the ELC
unit is malfunctioning.
Pressing [ ] key to return to main menu.

To complete to Programs WRITE. Pressing [ ] key to return to
main menu.


10.4.2 PC Program READ / WRITE
To set the connection item to ELC-HHP in the ELCSoft of PC in the PC ON-LINE MODE. Following is
the basic operation.

READ partial PC program (PCELC-HHP)

To move cursor to item 0 and press [ ] or [NOP/0]
Entering the program transmission between ELC-HHP and PC.

To move cursor to item 1 and press [ ] or [MPS/1]
Entering the READ mode.

To move cursor to item 1 and press [ ] or [MPS/1]
Entering segment program MODE.

Pressing [CLEAR] key to cancel program read segment function
and return to the previous step.
Pressing [ ] key to enter program read segment function.

Entering the READ mode and the data is reading.
10. Handhel d Progr ammer
10- 19

Reading PC program, which locates from address 0 to END
instruction, to ELC-HHP programming area.
After reading, pressing [ ] key to return to main menu.


READ all PC program (PCELC-HHP)

To move cursor to item 0 and press [ ] or [NOP/0]
Entering the program transmission between ELC-HHP and PC.

To move cursor to item 1 and press [ ] or [MPS/1]
Entering the READ mode.

To move cursor to item 2 and press [ ] or [MRD/2]
Entering read all program mode.

Pressing [CLEAR] key to cancel program read all function and
return to the previous step.
Pressing [ ] key to enter program read all function.

Entering the program read all mode and the data is reading.

Reading whole PC program (ELCSoft) to ELC-HHP programming
area.
Pressing [ ] key to return to the main menu.


Write Partial PC Program (ELC-HHPPC)

To move cursor to item 0 and press [ ] or [NOP/0]
Entering the program transmission between ELC-HHP and PC.
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10- 20

To move cursor to item 2 and press [ ] or [MRD/2]
Entering the WRITE mode.

To move cursor to item 1 and press [ ] or [MPS/1]
Entering write segment program mode.

Pressing [CLEAR] key to cancel program write segment function
and return to the previous step.
Pressing [ ] key to execute program write segment function.

Writing partial ELC-HHP program into PC (ELCSoft).
Entering the program write segment mode and the data is writing.
Pressing [CLEAR] key to break writing.

Writing ELC-HHP which address is from 0 to END instruction into
PC (ELCSoft).
Pressing [ ] key to return to the MAIN MENU, when completed.

Write all PC Program (ELC-HHPPC)

To move cursor to item 0 and press [ ] or [NOP/0]
Entering the program transmission between ELC-HHP and PC.

To move cursor to item 2 and press [ ] or [MRD/2]
Entering the WRITE mode.

To move cursor to item 2 and press [ ] or [MRD/2]
Entering the write all program mode.
10. Handhel d Progr ammer
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Pressing [CLEAR] key to cancel program write all function and
return the previous step.
Pressing [ ] key to execute program write all function.

Writing all ELC-HHP program into PC (ELCSoft).
Entering the WRITE mode and the data is writing.
Pressing [CLEAR] key to break the writing.

Completing to write whole program.
Pressing [ ] key to return to main menu.
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10.4.3 M_CARD READ / WRITE and Password Settings
You can execute the program in the M_CARD, READ / WRITE to the ELC-HHP and check M_CARD in
any mode with M_CARD. If it needs password for M_CARD and you should input the correct password
to enter. Please refer to the following to operate.

Without M_CARD:

To move the cursor to item 7 and press [ ] or [RET/7] .
Entering to program transmission between ELC-HHP and M_CARD
and check M_CARD.

Pressing [CLEAR] key to return the MAIN MENU without M_CARD.

Return to the MAIN MENU.

M_CARD is locked by password:

To move cursor to item 7 and press [ ] or [RET/7] key.
Entering to program transmission between ELC-HHP and M_CARD
and check M_CARD.

Please enter four characters for password if M_CARD is locked as
shown in the left. (Password can be digits and capital letters.)
If user forgets the password, it cant enter to operate the function of
M_CARD.

When forgetting password, there is a set of universal code (four
[SPACE]) to disable the password. But after disabled, the program
in M_CARD will be clear. Please use it carefully.
User can use the function of clear program to clear the program
and password in M_CARD. Please refer to Section 10.8 for detail.
10. Handhel d Progr ammer
10- 23

Pressing [ ] key to execute clear M_CARD.
Pressing [CLEAR] key to cancel the function clear M_CARD and
return to main menu.
MRD
2
MPS
1
SET
8
RET
7
MCR
6
NOP
0
RST
4
MPP
3
SPACE
TMR
9
CNT
5
1 2 3 4
Key
Times

You can set password by using the left chart.
The cursor will go to the next if you dont press any key in one
second after pressing.
You can press [CLEAR] key to go to the previous character to set
the password.
Please refer to the following explanation for M_CARD write and
password setting.

If finishing password setting and password is incorrect, the
Password error as shown in the left to enter the correct password.
Pressing [CLEAR] key to return to main menu.

After entering the correct password, it will enter the display as
shown in the left.
If it doesnt need password for M_CARD, you can enter the display
as shown in the left directly.

Read M_CARD (M_CARDELC-HHP)

To move the cursor to item 1 and press [ ] or [MPS/1]
Entering the READ mode.
ELC Syst em Manual
10- 24

Pressing [CLEAR] key to cancel read program function and return
to the previous step.
Pressing [ ] key to execute read program function.

Entering the READ mode and the data is reading.

After finishing to read program, press [ ] key to return to main
menu.
The password still exists after reading. You need to enter the
password for the next time.


Write M_CARD (ELC-HHPM_CARD) and Password Settings

To move the cursor to item 2 and press [ ] or [MRD/2]
Entering the WRITE mode.

System will inquire to set password or not.
Pressing [ ] key to execute set password.
Pressing [CLEAR] key to cancel the function of set password and
enter the item program write. At this time, the password function is
disabled.

It needs four characters for password. (Password can be digitals
and capital letters)
Please refer to the chart above to set the password.

To input password again to confirm. After inputting, it will enter the
item of write program.

Pressing [CLEAR] key to cancel write program function and return
to the previous step.
Pressing [ ] key to execute write program function.
10. Handhel d Progr ammer
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Entering the WRITE mode and the data is writing.

Finishing to write program. You can press [ ] to return to main
menu.
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10- 26
10.5 Program Mode
10.5.1 Screen Display
Function mode
di l
Line Cursor
Step number
32-bit command
E means EDIT mode
Application command
Instruction
Device symbol
Device number
PLUSE type
it means that operand
uses indirect register


10.5.2 Basic Instruction Input
After entering the basic instruction directly, input device name and device number. And press Enter key
to enter the item. If you want to interrupt the instruction, please press [CLEAR] key.

Example: Basic Instruction LD Y10

Entering the EDIT mode.

Pressing [LD/X] key.
Pressing [CLEAR]key to cancel the function of input instruction
and return to edit mode.

Pressing [AND/Y]key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [MPS/1] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [NOP/0]key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.
10. Handhel d Progr ammer
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Pressing [ ] key.
After finishing inputting instruction, the cursor will move to next
instruction.


10.5.3 Application Instruction Input
In Edit mode, the order for you to input should be [API/S], API number (please refer to Section 10.14
for detail), [SPACE] , the first operand and then press [SPACE]. In this way, you can keep on entering
the following instruction. After input the last instruction, you should press [ ] to finish the input. During
the input, you can press [CLEAR] to return to the prevous status. When using 32-bit instruction, you
should press [ANB/D] after [API/S]. In the same way, if you want to input pulse instruction, you should
press [-/PI]after [API/S].

Example: (API = 10) CMP K10 H5 Y1

Entering the EDIT mode.
Pressing [API/S] key.

Pressing [MPS/1], [NOP/0] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [SPACE] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [ORI/K] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [MPS/1],[NOP/0] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [SPACE] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.
ELC Syst em Manual
10- 28

Pressing [ANI/H] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [CNT/5] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [SPACE], [AND/Y], [MPS/1] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

Pressing [ ] key.
Pressing [CLEAR] key to cancel the instruction input and return to
the EDIT mode.

After finishing inputting instruction, cursor will move to the next
instruction.
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10.5.4 Instruction INSERT / DELETE
Insert Instruction


Entering the EDIT mode.
Pressing [INS/DEL] key.

Entering the instruction insert mode.
To move the cursor to the instruction you want to insert and input.

Instruction Delete


Entering the EDIT mode.
Pressing [INS/DEL] key one time.

Entering the instruction insert mode.
Pressing [INS/DEL] key again.

Entering the instruction delete mode.
To move the cursor to the instruction you want to delete and press
[CLEAR] key.

10.5.5 [STEP] Function
There are two functions of [STEP] key in the EDIT or INS / DEL and MONITOR modes:
1. JUMP
2. Device SEARCH
JUMP: pressing the [STEP] key, enter step number and press [ ]. The cursor will jump to the step
number.


Entering the EDIT or INS / DEL or MONITOR modes.
Pressing [STEP]key.
ELC Syst em Manual
10- 30

Pressing [MPS/1], [MRD/2], [NOP/0] keys.
Pressing [CLEAR] key to cancel JUMP function and return to the
EDIT mode.

Pressing [ ]key.
Pressing [CLEAR] key to cancel JUMP function and return to the
EDIT mode.

Cursor jumps to STEP 120.

If jump instruction exceed the range of user program, the display
will show the message of OVER RANGE.

Device SEARCH: Pressing [STEP] and then input the device name and number.


Entering the EDIT or INS / DEL or MONITOR modes.
Pressing [STEP] key.

Pressing [LD/X] key.
Pressing [CLEAR] key to cancel Device JUMP function and return
to the EDIT mode.

To input the DEVICE name: X12
Pressing [MPS/1], [MRD/2] key.

Pressing [ ] key.
Pressing [CLEAR] key to cancel Device JUMP function and return
to the EDIT mode.

Cursor jumps to X12, press [ ] key to continus searching for next
X12.
10. Handhel d Progr ammer
10- 31

If it cant find the device and it will show the message of NOT
FOUND.


10.5.6 REPLACE Function
This function allows user to replace all the same device number to a new one. But the DEVICE name
and indirect register doesnt have any change.

Points to note:
This function can only be executed in the EDIT mode.
Indirect register cant be replaced.

DEVICE REPLACE


Entering the EDIT mode.
Pressing [SHIFT] key.

Entering the REPLACE function.

To input the replaced device number: X10.
Pressing [LD/X], [MPS/1] and [NOP/0] key and then press
[SHIFT] key or [ ] key.

To input the new device number: X11.
Pressing [MPS/1] [MPS/1] key.

Pressing [ ] key.
ELC Syst em Manual
10- 32

Replacement completed.

If it cant find the device and it will show the message of NOT
FOUND.


10.5.7 Searching Application Instruction
To move the cursor to the specified API code: pressing [ API ] + [ STEP ] + API code + [ ]

Entering the EDIT or INS / DEL or MONITOR modes.
Pressing [API/S], [STEP] keys.

Pressing [MPS/1], [MRD/2] keys.

Pressing [ ] key.

It means there is no such code (API 12) in the line, If the display is
shown as the left. Please press [CLEAR] to return to the previous
step.

If there is API 12 in the line, the cursor will directly jump to the
address.

10.5.8 Searching for the API Codes
User can use the following steps of Searching function to look for the API mnemonic codes.

Entering the EDIT or INS / DEL or MONITOR modes.
Pressing [API/S] key.
10. Handhel d Progr ammer
10- 33

Pressing [SHIFT] key to show the searching menu.

Using UP and DOWN key or key in directly to choose group 0 to 24
to look for the appropriate API mnemonic codes.

Example: Looking for the API code number of MOV

Pressing [MPS/1], [ ] keys.
To select 1, entering the MOVE/COMPARE instruction group.

From the display shown in the left:
The API code number of MOV is 12 and it has 32-bit instruction
and PULSE instruction.

You can press UP and DOWN to choose other instruction.
Pressing [CLEAR] key to return to the previous step.
ELC Syst em Manual
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10.5.9 Indirect Index Register Application
Both indirect Index registers E (E0~E7) and F (F0~F7) are 16-bit registers. When using 32-bit, you
must use indirect Index register E (E0~E7).
When using K, H with E, F, the order for you to input should be: input K, H first, press [SHIFT]
key and then input the indirect Index register E and F. For other operand X, Y, M, S, KnX, KnY, KnM,
KnS, T, C and D, you can input the indirect Index register directly without pressing [SHIFT] key.
Example: Input the instruction: API 10 CMP K200E2 K2Y2F2 Y1
To input the first operand K200E2 with indirect register

Entering Edit mode.
Pressing [API/S] key.

Pressing [MPS/1] and [NOP/0] keys.
Pressing [CLEAR] key to cancel the function of input instruction
and return to Edit mode.

Pressing [SPACE] key.
Pressing [CLEAR] key to cancel the function of input instruction
and return to Edit mode.

Pressing [ORI/K] key.
Pressing [CLEAR] key to cancel the function of input instruction
and return to Edit mode.

Pressing [ORI/K] [MRD/2] [NOP/0] [NOP/0] keys.
Pressing [SHIFT] Key.

Pressing [ORB/E] and [MRD/2] keys to input the indirect Index
register E2.
Pressing [SPACE] key to complete input and press [SPACE] to
continue to input the next operand.
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To input the second operand K2Y2F2 with indirect register

Pressing [ORI/K] [MRD/2] [AND/Y] [MRD/2] keys.

Pressing [END/F] [MRD/2] key to input the indirect Index register
F2.
Pressing [SPACE] key to complete input and press [SPACE] to
continue to input the next operand.

Pressing [AND/Y] and [MPS/1] keys.
Pressing [CLEAR] key to cancel the function of input instruction
and return to edit mode.
Pressing [ ] key to finish inputting instruction.

To move the cursor to the address of next instruction.
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10.6 ELC RUN / STOP Mode
After succeeding to connect to ELC, user can enter the RUN/STOP instructions in both MAIN MENU,
program monitor and MONITOR/TEST modes to the ELC. Due to the ELC-HHP is displayed according
to the users input, the displays in the following maybe slightly different from yours.

RUN Instruction

Entering the MAIN MENU, Program monitor and MONITOR/TEST
mode.
Pressing [RUN/STOP] key.

The display will be shown as left when ELC is in the STOP status.
Pressing [ ] key to confirm the execution.
Pressing [CLEAR] key to cancel and return to the previous step.

RUN function completed.
Pressing [ ] key to return to the previous step.

STOP Instruction

Entering the MAIN MENU or MONITOR/TEST mode.
Pressing [RUN/STOP] key.

The display will be shown as left when ELC is in the RUN status.
Pressing [ ] key to confirm the execution.
Pressing [CLEAR] key to cancel and return to the previous step.

STOP function completed.
Pressing [ ] key to return to the previous step.

If ELC ERROR blinks at this moment, press [RUN/STOP] key to
display the specified ERROR CODE as shown in the left.
Pressing [ ] key to return to the previous step.
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10.7 MON / TEST Mode
MON/TEST mode applications:
1. MONITOR Mode: DEVICE status, VALUE READING and PROGRAM monitor.
2. TEST Mode: Bit Device force ON/OFF, DEVICE VALUE SETTING, DEVICE monitor and VALUE
READING.

MONITOR Mode:
There are two functions of the MONITOR mode, DEVICE monitor and PROGRAM monitor. This
function should be used in ELC ON-LINE mode. Its disabled in PC ON-LINE and OFF-LINE modes

DEVICE Monitor Mode:
Enter Monitor mode by selecting the item 2 in the main menu. The devices it can monitor are X, Y, M, S,
T, C, D, E and F. X, Y, M, S are bit device and the ON/OFF status in X, Y, M, S can be got by monitor.
And you can get the contact and coil status, current timer, counter, and settings (timer or counter
values) from device T and C (timer and counter). Contact: when counter or timer sustained, the contact
will be ON, otherwise, it will be OFF. Coil: when the device is counting or timing, the coil is ON,
otherwise it is OFF.

Example:

Pressing [MON/TEST] [MRD/2] key or press [] [] key to select
2 to enter DEVICE MONITOR.

If there is a M display in the left corner that means it is in the
MONITOR mode. Pressing [SHIFT] key each time prior to enter a
new device name.

Pressing [SHIFT] key, then enter[LD/X] [MPS/1] to monitor X1.
Pressing [ ] key to complete.

The symbol appears at the left side of X1. This indicates that X1 is
ON.
At this moment, press UP/DOWN key to select the monitor device
from the menu.
Pressing [SHIFT] key and key in the new device name.
Pressing [CLEAR] to return to the MAIN MENU.
ELC Syst em Manual
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When the device code (is keyed to be monitored) is exceeded the
limit of ELC, ELC will send a wrong message to ELC-HHP to
indicate that the code is illegal to ELC.


Example: Searching for timer T0 status.

Entering the MONITOR mode.
Pressing [SHIFT] [LDI/T] keys.

Input T0.
Pressing [ ] key to complete.

To display the modes of timer T0. The display shown as left K00000
indicates timer T0 value. NONE indicates that the program does not
use timer T0 in ELC.
You can then use UP/DOWN or [SHIFT] key to select next timer.

If display shows as the left, which means the ELC timer K100 is
activated. Coil means T1 timer is activated and the value is K10.


Example:
Searching the content of D0 16-bit data register.

Entering the DEVICE MONITOR mode.
After pressing [SHIFT] key, press [ANB/D] key.
Pressing [ ] key to monitor the content of 16-bit data register.

Searching the content of D0 (D1) 32-bit data register.

To indicate 32-bit (Double), press [SHIFT] [ANB/D] and [ANB/D]
again in order in the DEVICE MONITOR mode.
Pressing [ ] key to monitor the content of 32-bit data register.
Display the value of 32-bit data register D0 and D1, where as D0 is
lower 16-bit and D1 is higher 16-bit.
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Program Monitor Modes
In Section 10.4 and 10.5 we have discussed the program READ and EDIT functions. Therefore, using
ELC-HHP to read the programs from ELC, then enter the program editing modes, press [MON/TEST]
key, to monitor program status.

Entering the EDIT mode.
Pressing [MON/TEST] key.

Entering the program monitor mode to monitor the program status.
Pressing [] [] key to monitor the next program status.
Pressing [EDIT] key to return to the EDIT mode.

TEST Mode
This function should be used in ELC ON-LINE mode. Its disabled in PC ON-LINE and OFF-LINE
modes.
ON/OFF setting of bit devices (X, Y, M, S) status:
After entering the bit device monitor mode, press MON / TEST key to enter TEST mode. It can force
the bit device to be ON or OFF.

Example:

Pressing [MON/TEST] key to enter DEVICE MONITOR mode and
then press [MON/TEST]key to enter TEST mode.

If the display shows T at the left corner, which means it is in the
TEST mode. The input method of the device name is the same as
the MONITOR mode.
Pressing [SHIFT] key each time prior to enter the new device name.

If you want to monitor Y1, please press [SHIFT] key and then enter
[AND/Y][MPS/1].
Pressing [ ] key to complete.

Pressing [SET/8] key to force Y1 ON.
Pressing [RST/4] key to force Y1 OFF.
Pressing UP/DOWN key to monitor the previous or the next device
status.
ELC Syst em Manual
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16-bit word device T, C, D, E, F present value setting
To exchange the decimal and the hexadecimal display of Word device (T, C, D, E, F) present value
setting and value monitor, please operate as the following:


Pressing [MON/TEST] key to enter the device monitor mode, and
then press [MON/TEST] key again to enter the TEST mode.

The input method of device name is the same as the monitor mode.
Pressing [SPACE] key to enter the content setting of word device.

To input the word device name.
For example: D20.
Pressing [ANB/D] [MRD/2] [NOP/0] keys.

Pressing [ ] key.

To input the setting value: Knnnnn or Hnnnn.


For example: K200. Press [ORI/K] [MRD/2] [NOP/0] [NOP/0] keys.
Pressing [ ] key.

To confirm the set value.
Pressing [ ] key to complete the input of setting value.
Pressing [CLEAR] key to cancel the setting.

Return to the original display.
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In this mode, press [SHIFT] key to use the device monitor function
to monitor the content of D20.
Pressing [ANB/D] [MRD/2] [NOP/0] keys.

Pressing [ ] key to complete the input of the device monitor.

Display shows the content of D20 is K200 (decimal).

Pressing [ANI/H] key to display in hexadecimal.
To switch to hexadecimal, display as HC8.

Present setting of 32-bit word device (T, C, D, E, F)


Pressing [SPACE] key to enter the present value setting of word
device.
32-bit data setting: D10 (D11), whereas D10 is lower 16-bit and D11
is upper 16-bit.

Pressing [ANB/D] key twice, the second time to press [ANB/D] key
indicates 32-bit, double (two 16-bit).

Pressing [MPS/1], [NOP/0] keys to select D10.

Pressing [ ] key.
Waiting for the input of the setting value.

Pressing [ORI/K] [MRD/2] [NOP/0] [NOP/0] [NOP/0] [NOP/0]
[NOP/0] keys to input K200000.
ELC Syst em Manual
10- 42

Pressing [ ] key to confirm the input of the setting value.
Pressing [CLEAR] key to cancel the setting.

Pressing [ ] key.
Return to the original display.

In this mode, press [SHIFT] key to use device monitor function to
monitor if the content of the D10 (D11) is K200000.

Pressing [ANB/D] key twice, the second time indicates 32-bit (two
16-bit).

To input device numbers and press [MPS/1] [NOP/0] key to select
D10.
Pressing [ ] key.

To display 32-bit data (composed by D10 and D11). D10 is the
lower 16-bit that is HD40 and the D11 is the upper 16-bit that is H3.
Therefore the value of H30D40 is K200000.
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10.8 Clear Users Program Memory
In the three working modes, you can enter it by pressing the item [3] PGM CLEAR in the MAIN MENU.

Using [] [] key to the item or input the selected item number and
then press [ ] key.

After entering, you can use [] [] keys to select the item or input
the selected item number and then press [ ] key.

Item 1: ALL CLEAR (Clear all the programs)

To confirm that all the programs in ELC-HHP will be cleared.
Pressing [ ] key to start clearing all the programs.
Pressing [CLEAR] key to cancel the instruction and return to the
previous display.

Item 2: SEGMENT CLEAR (Clear segment programs)

To clear partial programs in ELC-HHP. After entering this mode, user
will be requested to enter the range for clearance.
First, enter the start address and then press [ ] key.
Second, enter the end address and press [ ] to complete.
Pressing [CLEAR] key to cancel and return to the previous display.

Pressing [ ] key to start clearing parts of the programs.
Pressing [CLEAR] key to cancel the instruction and return to the
MAIN MENU.

Item 3: M_CARD CLEAR (Clear the content of M_CARD)

When you dont have the M_CARD, please press [CLEAR] key to
return to the MAIN MENU.
ELC Syst em Manual
10- 44

After pressing [ ] key, it will start to clear all programs in the
M_CARD.
Pressing [CLEAR] key to cancel the instruction and return to the
MAIN MENU.

Clear completed.
Pressing [ ] key to return to the MAIN MENU.

If M_CARD cant be cleared, display will be shown as left. It
means M_CARD is malfunction.
Pressing [CLEAR] key to return to main menu.


Check Users Program
After finishing editing the programs, user can select Item [0] ELCELC-HHP directly in MAIN MENU,
and enter the programs directly into ELC. ELC will check if the grammar is correct. Or select Item [4]
PGM CHECK to check the grammar before sending the information to ELC.


Using [] [] key to the item or input the selected item number
and then press [ ] key.

Entering Check mode.

Select Item 4 from the MAIN MENU to check the edited programs.
If the grammar of the programs is correct, the display will be
shown as left.
Press [ ] key to return to the MAIN MENU.

If there is an error detected in the grammar, it will display (ERROR
CODE). User can check with Section 10.15 to find out the error
codes and the corresponding reasons.
Pressing [ ] key to return to the MAIN MENU.

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10.9 ELC and ELC-HHP Program Verifications
There are two selections in this function: 1. To verify both program contents of ELC and ELC-HHP. It
can be used in the ELC ONLINE mode. 2. To verify both program contents of M_CARD and ELC-HHP.
It can be used in the three modes.

Item 1: To verify both program contents of ELC and ELC-HHP.

Using [] [] key to the item or input 5 and then press [ ] key.

Using [] [] key to select item 1 or input 1 and then press [ ]
key to verify with ELC program.

Pressing [ ] key to verify both program contents of ELC and
ELC-HHP.
Pressing [CLEAR] key to cancel and return to the MAIN MENU.

Program contents of ELC and ELC-HHP are the same.
Pressing [ ] key to cancel and return to the MAIN MENU.

Display will show the difference line number once a mismatch is
detected and stop verifying.
Pressing [ ] key to cancel and return to the MAIN MENU.

Item 2: To verify both program contents of M_CARD and ELC-HHP.

Using [] [] key to the item or input 5 and then press [ ] key.

Using [] [] key to select item 2 or input 2 and then press [ ]
key to verify with M_CARD program.
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10- 46

Pressing [CLEAR] key to return to main menu when there is no
M_CARD.

Pressing [ ] key to verify program contents of M_CARD and
ELC-HHP.
Pressing [CLEAR] key to cancel and return to the MAIN MENU.

Program contents of M_CARD and ELC-HHP are the same.
Pressing [ ] key to cancel and return to the MAIN MENU.

Display will show the difference line number once a mismatch is
detected and stop verifying.
Pressing [ ] key to cancel and return to the MAIN MENU.
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10.10 Parameters Settings
There are three items in this function:
1. Setting the program capacity of the ELC-HHP
2. Display the operation version of ELC-HHP
3. Setting the ELC password

Item 1: Setting the program capacity.
After ELC-HHP connects to ELC, execute the function of Program Read. It will display ELC program
memory capacity. User can select item 6 PARAMETER SET to check ELC memory capacity.
You can check if memory capacity of ELC-HHP is matched with ELC by execute item Program
Write-in in MAIN MENU. If they are mismatched, the display will show the message as following.

If the display is shown as left, it means the memory capacity of
ELC-HHP and ELC are mismatched.
Pressing [ ] key to modify the memory capacity of ELC-HHP
to be the same as ELC and enter WRITE mode.
Pressing [CLEAR] key to cancel and return to the previous
page. Users can also set ELC-HHP program capacity by using
item 6 PARAMETER SET. Please refer to Section 10.10 for
detail.

Please enter this item to reset the memory capacity.

You can use UP/DOWN key to select 6 in the MAIN MENU or
press [MCR/6] key to enter the setting parameter function.

Using UP/DOWN key to select 1 or press [MPS/1] key to modify
the memory capacity.

The first line displays the capacity of ELC-HHP program area.
Pressing [ ] key to modify the memory capacity.
Pressing [CLEAR] key to cancel and return to the MAIN MENU.
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Please set the memory capacity of ELC-HHP program according to
the capacity of ELC program. For example: 8000 STEPS.
Using UP/DOWN key or press [MRD/2] key to select item 3.

Pressing [ ] key to confirm the setting and return to the MAIN
MENU.
Pressing [CLEAR] key to cancel and return to the MAIN MENU.

Item 2: Display the ELC-HHP operation system version.

Using UP/DOWN or press [MRD/2] key to select item 2 to enter
the OS version function.

Display the operation system version of ELC-HHP is 1.0.
Pressing [ ] key to return to the MAIN MENU.

Item 3: Password setting.

Using UP/DOWN key or press [MPP/3] key to select item 3 to
enter the password function.
After entering this function, ELC-HHP will query whether you want
to set password or not. After diagnosing, the first line will show the
following action. The action may be to input password or not.

If the message displayed as left, it means ELC doesnt have
password. Please enter the password to set the password.
(Password should be four characters and it can be digitals and
capital letters)
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10- 49
MRD
2
MPS
1
SET
8
RET
7
MCR
6
NOP
0
RST
4
MPP
3
SPACE
TMR
9
CNT
5
1 2 3 4
Key
Times

Please refer to the left chart for the characters that each numeric
button represents
After pressing the button, if you dont press any other key in one
second, the cursor will move to the next position for inputting.
During inputting password, you can modify the character by
pressing [CLEAR] to return to the previous character.

To input password again to verify the password. If it is the same as
the previous password, it will lock ELC directly.

If the message shows as left, it means password of ELC is locked.
ELC-HHP cant read and modify ELC program.
The locked password will be disabled if you input the correct
password.
If the original password is missing, users could key in the general
password by pressing [SPACE] key for 4 times. The ELC
password lockup could thus be removed. However, the internal
program memory within ELC will all be clear after executing this
action. Please use carefully.
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10- 50
10.11 M_CARD Functions
In three modes of ELC-HHP, the functions of READ/WRITE of M_CARD and ELC-HHP program and
M_CARD check can be executed. If it needs password to enter M_CARD, you should input the correct
password to execute the functions. When ELC-HHP enter this function, it will check if it has M_CARD.
If not, it will display the message of NO MEMORY CARD.


Using UP/DOWN key or press [RET/7] key to select item 7 in the
MAIN MENU to enter the functions of M_CARD and ELC-HHP.
(Please refer to Section 10.4.3 for M_CARD with password.)

There are three items in this function:
a) Read M_CARD program, M_CARDELC-HHP.
b) Write M_CARD program, ELC-HHPM_CARD.
c) Check M_CARD.
Item 1: Read M_CARD program, M_CARDELC-HHP. (Please refer to Section 10.4.3)
Item 2: Write M_CARD program, M_CARDELC-HHP. (Please refer to Section 10.4.3)
Item 3: Check if there is data in M_CARD.


To display the working situation and ask for the confirmation of the
next step.
Pressing [ ] key to confirm.
Pressing [CLEAR] key to cancel and return to the MAIN MENU.

To list the check result and display two bits of CHECK SUM.
If there is no program in M_CARD, it will display the message of
CHECK SUM : 00.

Pressing [ ] key to return to the MAIN MENU.
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10.12 File Register
There are 1600 file registers (16-bit) in ELC of PC/PA/PH/PV series for user to save files. Users can
read/write by using ELC-HHP or PC ELCSoft.
This function can be divided into two parts:
1. ELC-HHPELC
2. ELC-HHPPC

Read/Write of File Register for ELC
Please refer to the following for basic operation in ELC connection mode.

READ for ELC file register (ELCELC-HHP)

To move cursor to item 8 and press [ ] or [SET/8] key.
Entering file register to transmit file between ELC-HHP and ELC.

To move cursor to item 1 and press [ ] or [MPS/1] key.
Entering read mode

It is reading

After reading, press [ ] key to return to main menu.

Write of file register for ELC (ELC-HHPELC)

To move cursor to item 8 and press [ ] or [SET/8] key.
Entering file register to transmit file between ELC-HHP and ELC.

To move cursor to item 2 and press [ ] or [MRD/2] key.
Enter WRITE mode.
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It is writing

After writing, press [ ] key to return to main menu.


Read/Write of File Register for PC
In PC ELCSoft (for WINDOWS), you should set to connect to ELC-HHP. After connecting, please refer
to the Section 10.3.2 for detail. Please refer to the following for basic operation.

READ of file register for PC (ELCSoft)PCELC-HHP

To move cursor to item 8 and press [ ] or [SET/8] key.
Entering file register to transmit file between ELC-HHP and PC
(ELCSoft).

To move the cursor to item 1 and press [ ] or [MPS/1] key.
Entering READ mode.

It is reading.

After reading, press [ ] key to return to main menu.


WRITE of file register for PC (ELCSoft) (ELC-HHPPC)

To move cursor to item 8 and press [ ] or [SET/8] key.
Entering file register to transmit file between ELC-HHP and ELC.
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To move cursor to item 2 and press [ ] or [MRD/2] key.
Entering WRITE mode.

It is writing.

After writing, press [ ] key to return to main menu.
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10.13 Error Code Explanations
After programs are entered to the ELC, ELC ERROR LED is flashing, yet the grammar is correct. The
reason may be the bit devices (operand instructions) are misused. User can check the ERROR
CODES, Fault Descriptions and Special Data Register Error Codes to find out what or where goes
wrong. The error occurred will be stored in the data register D1137. Each bit device usage range can
be found in the ELC user manual.

Device Misused
Store Error
Number
Associated Meaning Action
0001 Operand bit device S exceeds the valid range
0002 Label P exceeds the valid range or duplicated
0003 Operand KnSm exceeds the valid range
0102 Interrupt pointer I exceeds the valid range or duplicated
0202 Instruction MC exceeds the valid range
0302 Instruction MCR exceeds the valid range
0401 Operand bit device X exceeds the valid range
0403 Operand KnXm exceeds the valid range
0501 Operand bit device Y exceeds the valid range
0503 Operand KnYm exceeds the valid range
0601 Operand bit device T exceeds the valid range
0604 Operand word device T register exceeds limit
0801 Operand bit device M exceeds the valid range
0803 Operand KnMm exceeds the valid range
0B01 Operand K, H available range error
0D01 DECO operand misuse
0D02 ENCO operand misuse
0D03 DHSCS operand misuse
0D04 DHSCR operand misuse
0D05 PLSY operand misuse
0D06 PWM operand misuse
0D07 FROM/TO operand misuse
0D08 PID operand misuse
0D09 SPD operand misuse
0D0A DHSZ operand misuse
0D0B IST operand misuse
0E01 Operand bit device C exceeds the valid range
Check the D1137(Error
step number)

Re-enter the instruction
correctly
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Store Error
Number
Associated Meaning Action
0E04 Operand word device C register exceeds limit
0E05 DCNT operand CXXX misuse
0E18 BCD conversion error
0E19 Division error (divisor=0)
0E1A Device use is out of range (including index registers E, F)
0E1B Negative number after radical expression
0E1C FROM/TO communication error
0F04 Operand word device D register exceeds limit
0F05 DCNT operand DXXX misuse
0F06 SFTR operand misuse
0F07 SFTL operand misuse
0F08 REF operand misuse
1000 ZRST operand misuse
10EF E and F misuse operand or exceed the usage range
2000 Usage exceed limit (MTR, ARWS, TTMR, PR, HOUR)
Check the D1137(Error
step number)

Re-enter the instruction
correctly

Loop Check
Store Error
Number
Associated Meaning Action
C400 An unrecognized instruction code is being used
C401 Loop Error
C402 LD / LDI continuously used more than 9 times
C403 MPS continuously used more than 9 times
C404 FOR-NEXT exceed 6 levels
C405
STL / RET used between FOR and NEXT
SRET / IRET used between FOR and NEXT
MC / MCR used between FOR and NEXT
END / FEND used between FOR and NEXT
C407 STL continuously use more than 9 times
C408 Use MC / MCR in STL, Use I / P in STL
C409
Use STL / RET in Subroutine, Use STL / RET in Interrupt
Subroutine
C40A
Use MC / MCR in Subroutine
Use MC / MCR in Interrupt Subroutine
C40B MC / MCR doesnt begin from N0 or discontinuously
A circuit error occurs if a
combination of
instructions is incorrectly
specified.

Select programming
mode and correct the
identified error
ELC Syst em Manual
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Store Error
Number
Associated Meaning Action
C40C MC / MCR corresponding value N is different
C40D Use I / P incorrectly
C40E
IRET does not follow by the last FEND instruction.
SRET does not follow by the last FEND instruction.
C41C
The number of input/output points of I/O extension unit is
larger than the specified limit.
C4EE The END instruction is not given in the main program
A circuit error occurs if a
combination of
instructions is incorrectly
specified.

Select programming
mode and correct the
identified error

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10.14 Instruction Table
Basic INSTRUCTION and Ladder Diagram

Standard Instructions
Instruction Function Device STEP
LD Load a contact S, X, Y, M, T, C 1
LDI Load b contact S, X, Y, M, T, C 1
AND Series connection-a contact S, X, Y, M, T, C 1
ANI Series connection-b contact S, X, Y, M, T, C 1
OR Parallel connection-a contact S, X, Y, M, T, C 1
ORI Parallel connection-b contact S, X, Y, M, T, C 1
ANB Series connection (Multiple circuits) None 1
ORB Parallel connection (Multiple circuits) None 1
MPS Stores the operation result None 1
MRD Reads the operation result None 1
MPP Reads, then clears the operation result None 1

Output Instruction
Instruction Function Device STEP
OUT Output coil S, Y, M 1
SET Latch (ON) S, Y, M 1
RST Clear the contact or the register S, Y, M, T, C, D 3

End Instructions
Instruction Function Device STEP
END Program END None 1

Timer and Counter
API No. Instruction Function Device STEP
96 TMR 16-bit Timer T-K or T-D 4
97 CNT 16-bit Counter C-K or C-D (16-bit) 4
97 DCNT 32-bit Counter C-K or C-D (32-bit) 6

ELC Syst em Manual
10- 58
Master Control Instructions
Instruction Function Device STEP
MC Master control START instruction N0 - N7 3
MCR Master control RESET instruction N0 - N7 3

Contact Rising / Falling edge Instructions
API No. Instruction Function Device STEP
90 LDP Rising-edge detection operation S, X, Y, M, T, C 3
91 LDF Falling-edge detection operation S, X, Y, M, T, C 3
92 ANDP
Series connection instruction for the
rising-edge detection operation
S, X, Y, M, T, C 3
93 ANDF
Series connection instruction for the
falling-edge detection operation
S, X, Y, M, T, C 3
94 ORP
Parallel connection instruction for the
rising-edge detection operation
S, X, Y, M, T, C 3
95 ORF
Parallel connection instruction for the
falling-edge detection operation
S, X, Y, M, T, C 3

Rising / Falling edge Output Instruction
API No. Instruction Function Device STEP
89 PLS Rising-edge output Y, M 3
99 PLF Falling-edge output Y, M 3

Other Instructions
API No. Instruction Function Device STEP
- NOP No operation action None 1
98 INV Inverting operation None 1
- P Pointers P0~P255 1
- I Interrupt pointers I 1

Ladder Step Instructions
Instruction Function Device STEP
STL Step transition ladder start instruction S 1
RET Step transition ladder return instruction None 1
10. Handhel d Progr ammer
10- 59
Application Instructions
Mnemonic Steps
API
16-bit 32-bit
P Functions Operand
16bits 32bits
00 CJ 9 Conditional jump S 3
01 CALL 9 Call subroutine S 3
02 SRET Subroutine return None 1
03 IRET Interrupt return None 1
04 EI Enable interrupts None 1
05 DI Disable interrupts None 1
06 FEND First end None 1
07 WDT 9 Watchdog timer refresh None 1
08 FOR Start of FOR-NEXT loop S 3
09 NEXT End of FOR-NEX loop None 1
10 CMP DCMP 9 Compare S1, S2, D 7 13
11 ZCP DZCP 9 Zone compare S1, S2, S, D 9 17
12 MOV DMOV 9 Data Move S, D 5 9
13 SMOV 9 Shift Move S, m1, m2, D, n 11
14 CML DCML 9 Compliment S, D 5 9
15 BMOV 9 Block move S, D, n 7
16 FMOV DFMOV 9 Fill move S, D, n 7 13
17 XCH DXCH 9 Data exchange D1, D2 5 9
18 BCD DBCD 9 Covert BIN into BCD S, D 5 9
19 BIN DBIN 9 Covert BCD into BIN S, D 5 9
20 ADD DADD 9 Addition S1, S2, D 7 13
21 SUB DSUB 9 Subtraction S1, S2, D 7 13
22 MUL DMUL 9 Multiplication S1, S2, D 7 13
23 DIV DDIV 9 Division S1, S2, D 7 13
24 INC DINC 9 Increment D 3 5
25 DEC DDEC 9 Decrement D 3 5
26 WAND DAND 9 Logical AND S1, S2, D 7 13
27 WOR DOR 9 Logical OR S1, S2, D 7 13
28 WXOR DXOR 9 Logical XOR S1, S2, D 7 13
29 NEG DNEG 9 Negation D 3 5
30 ROR DROR 9 Rotate to the right D, n 5 9
31 ROL DROL 9 Rotate to the left D, n 5 9
32 RCR DRCR 9 Rotate right with carry D, n 5 9
33 RCL DRCL 9 Rotate left with carry D, n 5 9
34 SFTR 9 Bit shift right S, D, n1, n2 9
35 SFTL 9 Bit shift left S, D, n1, n2 9
36 WSFR 9 Word shift right S, D, n1, n2 9
37 WSFL 9 Word shift left S, D, n1, n2 9
38 SFWR 9 Shift register write S, D, n 7
39 SFRD 9 Shift register read S, D, n 7
40 ZRST 9 Zone reset D1, D2 5
41 DECO 9 Decode S, D, n 7
42 ENCO 9 Encode S, D, n 7
43 SUM DSUM 9 Sum of active bits S, D 5 9
44 BON DBON 9 Check specified bit status S, D, n 7 13
ELC Syst em Manual
10- 60
Mnemonic Steps
API
16-bit 32-bit
P Functions Operand
16bits 32bits
45 MEAN DMEAN 9 Mean S, D, n 7 13
46 ANS Alarm device output S, m, D 7
47 ANR 9 Alarm device reset NONE 1
48 SQR DSQR 9 Square root S, D 5 9
49 FLT DFLT 9 Floating point S, D 5 9
50 REF 9 Refresh D, n 5
51 REFF 9 Refresh and filter adjust n 3
52 MTR Input Matrix S, D1, D2, n 9
53 HSCS DHSCS High speed counter set S1, S2, D 7 13
54 HSCR DHSCR High speed counter reset S1, S2, D 7 13
55 HSZ DHSZ HSC zone compare S1, S2, S, D 9 17
56 SPD Speed detect S1, S2, D 7
57 PLSY DPLSY Pulse Y output S1, S2, D 7 13
58 PWM Pulse width modulation S1, S2, D 7
59 PLSR DPLSR Ramp Pulse output S1, S2, S3, D 9 17
60 IST Manual/Auto control S, D1, D2
61 SER DSER 9 Search a data stack S1, S2, D, n 9 17
62 ABSD DABSD Absolute drum sequencer S1, S2, D, n 9 17
63 INCD Increment drum sequencer S1, S2, D, n 9
64 TTMR Teaching timer D, n 5
65 STMR Special timer S, m, D 7
66 ALT Alternate state D 3
67 RAMP Ramp variable value S1, S2, D, n 9
69 SORT Data sort S, m1, m2, D, n 11
70 TKY DTKY 10-key keypad input S, D1, D2 7 13
71 HKY DHKY 16-key keypad input S, D1, D2, D3 9 17
72 DSW Digital switch input S, D1, D2, n 9
73 SEGD 9 Seven segment decoder S, D 5
74 SEGL Seven segment with latch S, D, n 7
75 ARWS Arrow switch S, D1, D2, n 9
76 ASC ASCII code S, D 11
77 PR Print S, D 5
78 FROM DFROM 9
Read from a special module
CR data
m1, m2, D, n 9 17
79 TO DTO 9
Write to a special module CR
data
m1, m2, S, n 9 17
80 RS Serial data communication S, m, D, n 9
81 PRUN DPRUN 9
Octal number system
transmission
S, D 5 9
82 ASCI 9 Covert HEX into ASCII S, D, n 7
83 HEX 9 Covert ASCII into HEX S, D, n 7
84 CCD 9 Check code S, D, n 7
85 VRRD 9 Volume read S, D 5
86 VRSC 9 Volume scale read S, D 5
87 ABS DABS 9 Absolute value D 3 5
10. Handhel d Progr ammer
10- 61
Mnemonic Steps
API
16-bit 32-bit
P Functions Operand
16bits 32bits
88 PID DPID PID calculation S1, S2, S3, D 9 17
89 PLS Rising-edge output Y, M 3
90 LDP Rising edge pulse S, X, Y, M, T, C 3
91 LDF Falling edge pulse S, X, Y, M, T, C 3
92 ANDP
Serial connection of rising
edge pulse
S, X, Y, M, T, C 3
93 ANDF
Serial connection of falling
edge pulse
S, X, Y, M, T, C 3
94 ORP
Parallel connection of rising
edge pulse
S, X, Y, M, T, C 3
95 ORF
Parallel connection of falling
edge pulse
S, X, Y, M, T, C 3
96 TMR Timer T 4
97 CNT DCNT Counter C 4 6
98 INV Inverting operation S, X, Y, M, T, C 1
99 PLF Falling edge output Y, M 3
100 MODRD Modbus data read S1, S2, n 7
101 MODWR Modbus data write S1, S2, n 7
107 LRC 9 LRC error check S, n, D 7
108 CRC 9 CRC error check S, n, D 7
110 ECMP DECMP 9 Floating point compare S1, S2, D 7 13
111 EZCP DEZCP 9 Floating point zone compare S1, S2, S, D 9 17
112 - DMOVR 9 Floating point data move S, D - 9
116 - DRAD 9 DegreeRadian S, D - 9
117 - DDEG 9 RadianDegree S, D - 9
118 EBCD DEBCD 9 Float to scientific conversion S, D 5 9
119 EBIN DEBIN 9 Scientific to float conversion S, D 5 9
120 EADD DEADD 9 Floating point addition S1, S2, D 7 13
121 ESUB DESUB 9 Floating point subtraction S1, S2, D 7 13
122 EMUL DEMUL 9 Floating point multiplication S1, S2, D 7 13
123 EDIV DEDIV 9 Floating point division S1, S2, D 7 13
124 - DEXP 9
Floating point exponent
operation
S, D - 9
125 - DLN 9
Floating natural logarithm
operation
S, D - 9
126 - DLOG 9
Floating point logarithm
operation
S1, S2, D - 13
127 ESQR DESQR 9 Floating point square root S, D 5 9
128 - DPOW 9 Floating point power operation S1, S2, D 13
129 INT DINT 9 Float to integer S, D 5 9
130 SIN DSIN 9 Sine S, D 5 9
131 COS DCOS 9 Cosine S, D 5 9
132 TAN DTAN 9 Tangent S, D 5 9
133 - DASIN 9
Floating point Arcsine
operation
S, D - 9
134 - DACOS 9
Floating point Arccosine
operation
S, D - 9
ELC Syst em Manual
10- 62
Mnemonic Steps
API
16-bit 32-bit
P Functions Operand
16bits 32bits
135 - DATAN 9
Floating point Arctangent
operation
S, D - 9
143 DELAY - 9 Delay instruction S 3 -
144 GPWM - -
General pulse width
modulation
S1, S2, D 7 -
145 FTC - - Fuzzy temperature control S1, S2, , S3, D 9 -
147 SWAP DSWAP 9 Swap high/low byte S 3 5
148 MEMR DMEMR 9 Data backup Memory read m, D, n 7 13
149 MEMW DMEMW 9 Data backup Memory write S, m, n 7 13
150 MODRW Modbus data read/write S1, S2, S3, S4, n 11
154 RAND 9 Random value S1, S2, D 7
155 ABSR DABSR ABS current value read S1, D1, D2 7 13
156 ZRN DZRN Zero return S1, S2, S, D 9 17
158 DRVI DDRVI Drive to increment S1, S2, S, D 9 17
159 DRVA DDRVA Drive to absolute S1, S2, S, D 9 17
160 TCMP 9 Time compare S1, S2, S3, S, D 11
161 TZCP 9 Time zone compare S1, S2, S, D 9
162 TADD 9 Time addition S1, S2, D 7
163 TSUB 9 Time subtraction S1, S2, D 7
166 TRD 9 Time data read D 3
167 TWR 9 Time data write S 3
169 HOUR DHOUR Hour meter S1, S2, D 7 13
170 GRY DGRY 9 Convert BIN into Gray code S, D 5 9
171 GBIN DGBIN 9 Convert Gray code into BIN S, D 5 9
172 DADDR 9 Floating point number addition S1, S2, D 13
173

DSUBR 9
Floating point number
subtraction
S1, S2, D

13
174

DMULR 9
Floating point number
Multiplication
S1, S2, D

13
175 DDIVR 9 Floating point number division S1, S2, D 13
180 MAND 3 Matrix AND S1, S2, D, n 9
181 MOR 3 Matrix OR S1, S2, D, n 9
182 MXOR 3 Matrix XOR S1, S2, D, n
9

183 MXNR 3 Matrix XNR S1, S2, D, n
9

184 MINV 3 Matrix inverse S, D, n
7

185 MCMP 3 Matrix compare S1, S2, n, D
9

186 MBRD 3 Matrix bit read S, n, D
7

187 MBWR 3 Matrix bit write S, n, D
7

188 MBS 3 Matrix bit shift S, D, n
7

189 MBR 3 Matrix bit rotate S, D, n
7

190 MBC 3 Matrix bit state count S, n, D
7

202 SCAL - 3
Calculation of Proportional
Value
S, m1, m2, D 9 -
10. Handhel d Progr ammer
10- 63
Mnemonic Steps
API
16-bit 32-bit
P Functions Operand
16bits 32bits
203 SCLP DSCLP 3
Calculation of Parameter
Proportional Value
S1, S2, D 9 13
215 LD& DLD& S1 & S2 S1, S2 5 9
216 LD| DLD| S1 | S2 S1, S2 5 9
217 LD^ DLD^ S1 ^ S2 S1, S2 5 9
218 AND& DAND& S
1
& S
2
S1, S2 5 9
219 AND| DAND| S1 | S2 S1, S2 5 9
220 AND^ DAND^ S1 ^ S2 S1, S2 5 9
221 OR& DOR& S1 & S2 S1, S2 5 9
222 OR| DOR| S1 | S2 S1, S2 5 9
223 OR^ DOR^ S
1
^ S
2
S1, S2 5 9
224 LD= DLD= S1 S2 S1, S2 5 9
225 LD> DLD> S1 S2 S1, S2 5 9
226 LD< DLD< S1 S2 S1, S2 5 9
228 LD<> DLD<> S1 S2 S1, S2 5 9
229 LD<= DLD<= S1 S2 S1, S2 5 9
230 LD>= DLD>= S1 S2 S1, S2 5 9
232 AND= DAND= S1 S2 S1, S2 5 9
233 AND> DAND> S1 S2 S1, S2 5 9
234 AND< DAND< S1 S2 S1, S2 5 9
236 AND<> DAND<> S1 S2 S1, S2 5 9
237 AND<= DAND<= S1 S2 S1, S2 5 9
238 AND>= DAND>= S1 S2 S1, S2 5 9
240 OR= DOR= S1 S2 S1, S2 5 9
241 OR> DOR> S1 S2 S1, S2 5 9
242 OR< DOR< S1 S2 S1, S2 5 9
244 OR<> DOR<> S1 S2 S1, S2 5 9
245 OR<= DOR<= S1 S2 S1, S2 5 9
246 OR>= DOR>= S1 S2 S1, S2 5 9
ELC Syst em Manual
10- 64
10.15 Troubleshooting and Error Message
The ELC-HHP has a comprehensive fault diagnostic system that includes several different alarms and
error messages. Once a fault is detected, the corresponding protective functions will be activated to
protect the ELC-HHP. Below are the fault descriptions, for a fault shown on the ELC-HHP keypad
display.

Error Message Fault Descriptions Corrective Actions
CPU error CPU has been damaged. Change CPU
RAM error
The READ/WRITE instructions of CPU
external RAM is abnormal
Change CPU
SRAM error
The READ/WRITE instructions of CPU
external RAM is abnormal
Change external RAM
Over range I / P content exceeds the maximum range
Revise I / P according to ELC
user manual.
COMM. ERROR Serial communication port is abnormal
Check ELC-HHP connection
cable
EXCEPTION
CODE: 0002
Receive the exception code from ELC
Make sure the monitor devices
are within the range
PGM DISMATCH
ELC-HHP and the ELC program cannot
match each other
Check the user programs
according to the return address
NOT FOUND Instruction can not be found Process next step
MISS END
There is no end instruction at the end of
program
Add the END instruction at the
end of the program
INSTRUCTION
ERROR
Can not recognize the program codes Enter the correct instructions
ONLINE FAIL Connecting ELC and PC
Retry or operate the ELC under
OFFLINE mode
CANNOT
WRITE-IN
WHEN ELC IS
RUNNING
Can not write in during the ELC RUN
mode
Set ELC in the STOP mode
VERIFY ERROR Verify errors Rephrase inconsistent address
UNEQUAL Unequal program space. Revise the program space
CODE ERROR
Unrecognizable instruction during the
grammar checking
Recheck users grammar
ELC ERROR
ELC error from the content of return
message D1004
Refer to the ERROR CODE chart
ERROR CODE Grammar error Refer to the ERROR CODE chart
10. Handhel d Progr ammer
10- 65
10.16 ELC-HHP Connection
ELC-CBHHELC15:
ELC-HHP SIDE ELC SIDE
8 PIN MINI DIN(M) 8 PIN MINI DIN(M)
PIN 1,2: 5V
PIN 3,6,8: GND
PIN 4: TX
PIN 3,6,8: GND
PIN 1,2: 5V
PIN 4: RX
2
1
3
4
5 8
7
6
6 3
7
8 5
4
2
11
2
3
4
5
6
7
8
6
7
8
2
4
5
3
1




9 PIN D-SUB:

ELC-HHP


ELC Syst em Manual
10- 66
10.17 ELC-HHP Operation Flow Chart
ELC-HHP
Display version type after
power on
FATAL ERROR
SELFTEST FAIL
RUN
STOP
MON
TEST
Error
Normal
Error
Self test
Connecting
Connecting
test
Normal
On-line
Off-line
Main Menu
Select On/Off-line
processing mode
Off-line processing
mode
Main Menu
Enter MONITOR mode
Enter EDIT mode
Enter RUN or STOP mode
Press key
Press
select item 0
key, select
item 0 to 8
Read/Write program
Edit program
Monitor mode
Clear program
Check program
EDIT
MAIN Press or CLEAR
NOP
0
MPS
1
MRD
2
MPP
3
CNT
5
MCR
6
RET
7
SET
8
RST
4
MAIN
Press key
MAIN
Screen displays
select item 1
Press key
Press key
Press key
Press key
Press key
select item 2
select item 3
Press key
Press key
select item 4
Program Comparison
Parameter Setting
M_CARD function
File Register
Press key
Press key
Press key
Press key
select item 5
select item 6
select item 7
select item 8
Press key
Press key
MAIN Press or CLEAR

Eaton Corporation
Electrical Group
1000 Cherrington Parkway
Moon Township, PA 15108
United States
877-ETN-CARE (877-386-2273)
Eaton.com
2008 Eaton Corporation
All Rights Reserved
Printed in USA
Publication No. MN05003003E / Z7919
November 2008
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