5-A H-Bridge for DC-Motor Applications

TLE 5205-2

1 1.1

Overview Features

Delivers up to 5 A continuous 6 A peak current Optimized for DC motor management applications Operates at supply voltages up to 40 V Very low RDS ON; typ. 200 m @ 25 C per switch Output full short circuit protected Overtemperature protection with hysteresis and diagnosis Short circuit and open load diagnosis with open drain error flag Undervoltage lockout CMOS/TTL compatible inputs with hysteresis No crossover current Internal freewheeling diodes Wide temperature range; 40 C < Tj < 150 C Ordering Code Package Q67000-A9283 P-TO220-7-11 Q67006-A9237 P-DSO-20-12 Q67006-A9325 P-TO263-7-1 Q67000-A9324 P-TO220-7-12

P-TO220-7-11

P-DSO-20-12

Type TLE 5205-2 TLE 5205-2GP TLE 5205-2G TLE 5205-2S

P-TO263-7-1

Description The TLE 5205-2 is an integrated power H-bridge with DMOS output stages for driving DC-Motors. The part is built using the Infineon multi-technology process SPT which allows bipolar and CMOS control circuitry plus DMOS power devices to exist on the same monolithic structure. Operation modes forward (cw), reverse (ccw), brake and high impedance are invoked from just two control pins with TTL/CMOS compatible levels. The combination of an extremely low RDS ON and the use of a power IC package with low thermal resistance and high thermal capacity helps to minimize system power dissipation. A blocking capacitor at the supply voltage is the only external circuitry due to the integrated freewheeling diodes.
P-TO220-7-12

Data Sheet

2001-06-19

TLE 5205-2
Overview 1.2 Pin Configuration (top view) TLE 5205-2 TLE 5205-2GP

GND N.C. N.C. N.C. N.C. VS Q1 EF IN1 GND

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12 11
AEP01680

GND N.C. N.C. N.C. N.C. VS Q2 N.C. IN2 GND

TLE 5205-2S
EF OUT1 GND IN1 IN2 VS OUT2
AEP01990

TLE 5205-2G

2 3

4 5 6

1 2

6 7

OUT1 IN1 IN2 OUT2 EF GND V S

AEP01991

OUT1 EF

IN1

IN2 VS

OUT2
AEP02513

GND

Figure 1

Data Sheet

2001-06-19

TLE 5205-2
Overview 1.3 Pin Definitions and Functions Pin No. P-DSO 7 8 9 1, 10, 11, 20 12 6, 15 14 Symbol OUT1 EF IN1 GND IN2 Function Output of Channel 1; Short-circuit protected; integrated freewheeling diodes for inductive loads. Error Flag; TTL/CMOS compatible output for error detection; (open drain) Control Input 1; TTL/CMOS compatible Ground; internally connected to tab Control Input 2; TTL/CMOS compatible Supply Voltage; block to GND Output of Channel 2; Short-circuit protected; integrated freewheeling diodes for inductive loads. Not Connected

Pin No. P-TO220 1 2 3 4 5 6 7

VS
OUT2

2, 3, 4, 5, N.C. 16, 17, 18, 19

Data Sheet

2001-06-19

TLE 5205-2
Overview 1.4 Functional Block Diagram

VS EF 2 Error Flag
Diagnosis and Protection Circuit 1

IN1

3
1 0 0 1 1

IN 2

OUT 1 2

OUT1

IN2

0 1 0 1 0 1 0 0 0 1 Z Z

OUT2

Diagnosis and Protection Circuit 2

4 GND
AEB02394

Figure 2

Block Diagram

Data Sheet

2001-06-19

TLE 5205-2
Overview 1.5 Circuit Description

Input Circuit The control inputs consist of TTL/CMOS-compatible schmitt-triggers with hysteresis. Buffer amplifiers are driven by this stages. Output Stages The output stages consist of a DMOS H-bridge. Integrated circuits protect the outputs against short-circuit to ground and to the supply voltage. Positive and negative voltage spikes, which occur when switching inductive loads, are limited by integrated freewheeling diodes. A monitoring circuit for each output transistor detects whether the particular transitor is active and in this case prevents the corresponding source transistor (sink transistor) from conducting in sink operation (source operation). Therefore no crossover currents can occur. 1.6 Input Logic Truth Table

Functional Truth Table IN1 L L H H IN2 L H L H OUT1 H L L Z OUT2 L H L Z Comments Motor turns clockwise Motor turns counterclockwise Brake; both low side transistors turned-ON Open circuit detection

Notes for Output Stage Symbol L H Z Value Low side transistor is turned-ON High side transistor is turned-OFF High side transistor is turned-ON Low side transistor is turned-OFF High side transistor is turned-OFF Low side transistor is turned-OFF

Data Sheet

2001-06-19

TLE 5205-2
Overview 1.7 Monitoring Functions

Undervoltage lockout (UVLO): When VS reaches the switch on voltage VS ON the IC becomes active with a hysteresis. All output transistors are switched off if the supply voltage VS drops below the switch off value VS OFF. 1.8 Protective Function

Various errors like short-circuit to + VS, ground or across the load are detected. All faults result in turn-OFF of the output stages after a delay of 50 s and setting of the error flag EF to ground. Changing the inputs resets the error flag. a. Output Shorted to Ground Detection If a high side transistor is switched on and its output is shorted to ground, the output current is internally limited. After a delay of 50 s all outputs will be switched-OFF and the error flag is set. b. Output Shorted to + VS Detection If a low side transistor is switched on and its output is shorted to the supply voltage, the output current is internally limited. After a delay of 50 s all outputs will be switched-OFF and the error flag is set. c. Overload Detection An internal circuit detects if the current through the low side transistor exceeds the trippoint ISDL. In this case all outputs are turned off after 50 s and the error flag is set. d. Overtemperature Protection At a junction temperature higher than 150 C the thermal shutdown turns-OFF, all four output stages commonly and the error flag is set with a delay. e. Open Load Detection The output Q1 has a 10 k pull-up resistor and the output Q2 has a 10 k pull-down resistor. If E1 and E2 are high, all output power stages are turned-OFF. In case of no load between Q1 and Q2 the output voltage Q1 is VS and Q2 is ground. This state will be detected by two comparators and an error flag will be set after a delay time of 50 s. Changing the inputs resets the error flip flop.

Data Sheet

2001-06-19

TLE 5205-2
Overview

V EH = Pull UP 10 k EF = Pull Down 10 k V EL & 50 s RS FF

AES02395

Figure 3

Simplified Schematic for Open Load Detection

Data Sheet

2001-06-19

TLE 5205-2
Diagnosis 2 Diagnosis

Various errors as listed in the table Diagnosis are detected. Short circuits and overload result in turning off the output stages after a delay tdSD and setting the error flag simultaneously [EF = L]. Changing the inputs to a state where the fault is not detectable resets the error flag (input toggling) with the exception of short circuit from OUT1 to OUT2 (load short circuit).
Flag Open circuit between OUT1 and OUT2 IN1 IN2 OUT1 OUT2 EF Remarks 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 H L L Z L H L Z 1 1 1 0 0 0 1 1 0 1 1 1 1 0 1 1 1 0 0 1 0 1 0 1 0 0 0 0 Not detectable Not detectable Not detectable Nr. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 1 = No error 0 = Error

Short circuit from OUT1 to OUT2

VS/2 VS/2
L Z GND GND GND GND H L L L

VS/2 VS/2
L Z L H L L GND GND GND GND L H H H

Not detectable Not detectable Not detectable Not detectable Not detectable Not detectable Not detectable Not detectable Not detectable

Short circuit from OUT1 to GND

Short circuit from OUT2 to GND

Short circuit from OUT1 to VS

VS VS VS VS
H L H H Z Z Z Z

Not detectable Not detectable Not detectable

Short circuit from OUT2 to VS

VS VS VS VS
Z Z Z Z

Overtemperature or undervoltage

IN:

EF: 0 = Logic LOW OUT: Z = Output in tristate condition 1 = Logic HIGH = VS /2 due to internal Pull-up/down resistors L = Output in sink condition H = Output in source condition

Data Sheet

2001-06-19

TLE 5205-2
Electrical Characteristics 3 3.1 Electrical Characteristics Absolute Maximum Ratings 40 C < Tj < 150 C Symbol Limit Values min. Voltages Supply voltage Logic input voltage Diagnostics output voltage max. Unit Remarks

Parameter

VS VIN1, 2 VEF

0.3 1 0.3 0.3

40 40 7 7

V V V V

t < 0.5 s; IS > 5 A 0 V < VS < 40 V

Currents of DMOS-Transistors and Freewheeling Diodes Output current (cont.) Output current (peak) Output current (peak)

IOUT1, 2 IOUT1, 2 IOUT1, 2

5 6

5 6

A A A

tp < 100 ms; T = 1 s tp < 50 s; T = 1 s;

internally limitted; see overcurrent

Temperatures Junction temperature Storage temperature Thermal Resistances Junction case Junction ambient Junction case Junction ambient

Tj Tstg

40 50

150 150

C C

RthjC RthjA RthjC RthjA

3 65 75 5 50

K/W K/W K/W K/W K/W

P-TO220-7-11/12, P-TO263-7-1 P-TO220-7-11/12 P-TO263-7-1 P-DSO-20-12 P-DSO-20-12

Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit.

Data Sheet

2001-06-19

TLE 5205-2
Electrical Characteristics 3.2 Operating Range Symbol Limit Values min. Supply voltage Supply voltage increasing Supply voltage decreasing Logic input voltage Junction temperature 3.3 max. V After VS rising above VUV ON Outputs in tristate condition Unit Remarks

Parameter

VS

VUV ON 40
0.3 0.3

VUV ON V VUV OFF V

7 150 V

VIN1, 2 Tj

0.3 40

Electrical Characteristics

6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); 40 C < Tj < 150 C; unless otherwise specified Parameter Symbol Limit Values min. Current Consumption Quiescent current typ. max. Unit Test Condition

IS

10

mA

IN1 = IN2 = LOW; VS = 13.2 V

Under Voltage Lockout UV-Switch-ON voltage UV-Switch-OFF voltage UV-ON/OFF-Hysteresis

VUV ON VUV OFF VUV HY

3.5 0.2

5.3 4.7 0.6

6 5.6

V V V

VS increasing VS decreasing VUV ON VUV OFF

Data Sheet

10

2001-06-19

TLE 5205-2
Electrical Characteristics 3.3 Electrical Characteristics (contd)

6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); 40 C < Tj < 150 C; unless otherwise specified Parameter Symbol Limit Values min. Outputs OUT1, 2 Static Drain-Source-On Resistance Source IOUT = 3 A typ. max. Unit Test Condition

RDS ON H

220 350

350 500 500 800 350 500 600

m m m m m m m

6 V < VS < 18 V Tj = 25 C 6 V < VS < 18 V

Sink

RDS ON L

230 400

IOUT = 3 A

1000 m

VS ON < VS 6 V Tj = 25 C VS ON < VS 6 V 6 V < VS < 18 V Tj = 25 C 6 V < VS < 18 V VS ON < VS 6 V Tj = 25 C VS ON < VS 6 V

Note: Values of RDS ON for VS ON < VS 6 V are guaranteed by design. Overcurrent Source shutdown trippoint ISDH 6 Sink shutdown trippoint 8 8 50 10 10 80 A A A A A A

ISDL

Tj = 40 C Tj = 25 C Tj = 150 C Tj = 40 C Tj = 25 C Tj = 150 C

Shutdown delay time

tdSD

25

Data Sheet

11

2001-06-19

TLE 5205-2
Electrical Characteristics 3.3 Electrical Characteristics (contd)

6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); 40 C < Tj < 150 C; unless otherwise specified Parameter Symbol Limit Values min. Short Circuit Current Limitation Source current Sink current Open Circuit Pull up resistor Pull down resistor Switching threshold H Switching threshold L Detection delay time ISCH 20 15 A A typ. max. Unit Test Condition

ISCL

t < tdSD t < tdSD

RUP RDOWN VEH VEH tdSD

5 5 2 2 25

10 10 2.5 2.4 50

20 20 3 3 80

k k V V

Output Delay Times (Device Active for t > 1 ms) Source ON Sink ON Source OFF Sink OFF

td ON H td ON L td OFF H td OFF L

10 10 2 2

20 20 5 5

s s s s

IOUT = 3 A
resistive load

IOUT = 3 A
resistive load

IOUT = 3 A
resistive load

IOUT = 3 A
resistive load

Data Sheet

12

2001-06-19

TLE 5205-2
Electrical Characteristics 3.3 Electrical Characteristics (contd)

6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); 40 C < Tj < 150 C; unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition

Output Switching Times (Device Active for t > 1 ms) Source ON Sink ON Source OFF Sink OFF

tON H tON L tOFF H tOFF L

15 5 2 2

30 10 5 5

s s s s

IOUT = 3 A resistive load IOUT = 3 A resistive load IOUT = 3 A

resistive load

IOUT = 3 A
resistive load

Clamp Diodes Forward Voltage High-side Low-side Leakage Current Source Sink Logic Control Inputs IN 1, 2 H-input voltage threshold L-input voltage Hysteresis of input voltage H-input current L-input current

VFH VFL

1 1.1

1.5 1.5

V V

IF = 3 A IF = 3 A

ILKH ILKL

100 50 50

100

A A

OUT1 = VS OUT2 = GND

VINH VINL VINHY IINH IINL

2.8 0.4 2 10

2.5 1.7 0.8 0 4

1.2 1.2 2 0

V V V

A A

VIN = 5 V VIN = 0 V

Data Sheet

13

2001-06-19

TLE 5205-2
Electrical Characteristics 3.3 Electrical Characteristics (contd)

6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); 40 C < Tj < 150 C; unless otherwise specified Parameter Symbol Limit Values min. Error Flag Output EF Low output voltage Leakage current Thermal Shutdown Thermal shutdown junction temperature Thermal switch-on junction temperature Temperature hysteresis Shutdown delay time typ. max. Unit Test Condition

VEFL IEFL

0.25

0.5 10

IEF = 3 mA VEF = 7 V

TjSD TjSO
T

150 120 25

175 30 50

200 170 80

C C
K

tdSD

Note: Values of thermal shutdown are guaranteed by design.

Data Sheet

14

2001-06-19

TLE 5205-2
Electrical Characteristics

FU ; S
6 2 3 5 EF IN1 IN2 VS OUT1 470 nF 1 4700 F 63 V

EF IN1
V EF

OUT1
R Load VS

TLE 5205-2
OUT2 GND 4 7

IN2
V IN1 V IN2

OUT2

V OUT1 V OUT2

FL
AES02396

Figure 4

Test Circuit Overcurrent Short Circuit Open Circuit

IOUT

ISD

ISC

IOC

Data Sheet

15

2001-06-19

TLE 5205-2
Electrical Characteristics

VIN V 5 50% 0
_ 100 ns tr = tf <

OUT Source
A 3

t dONH 80% 50% 20% t ONH t OFFL 80% 50% 20% t dOFFL

t dOFFH 80% 50% 20% t OFFH t ONL 80% 50% 20% t dONL

OUT Sink
A 3

t
AET01994

Figure 5

Switching Time Definitions

+5V +V S 2 k 2 P 3 5 EF IN1 IN2 6 VS OUT1 1 100 nF OUT2 GND 4
AES02397

100 F

TLE 5205-2
7

N =3A BL = 6 A

Figure 6

Application Circuit

Data Sheet

16

2001-06-19

TLE 5205-2
Electrical Characteristics

IN1, 2

SCH OUT1, 2 SDH

VOUT1, 2

R Short x SCH t dSD V FL

EF
AED01997

Figure 7

Timing Diagram for Output Shorted to Ground

IN1, 2

SCL OUT1, 2 SDL

VOUT1, 2

VS R Short x SCL t dSD V FU

EF
AED01998

Figure 8

Timing Diagram for Output Shorted to VS

Data Sheet

17

2001-06-19

TLE 5205-2
Electrical Characteristics Diagrams Quiescent Current IS (Active) versus Junction Temperature Tj
7
AED02398

Static Drain-Source ON-Resistance versus Junction Temperature Tj

0.6 R ON 0.5 Low Side Transistor
AED02399

mA 6

0.4

V S = 18 V

0.3

3 VS =6V

0.2

High Side Transistor

0.1

1 -50

50

100 Tj

C 150

0 -50

50

100 Tj

C 150

Input Switching Thresholds VINH, L versus Junction Temperature Tj

3.0 V INH, L 2.5 V INH
AED02400

Clamp Diode Forward Voltage VF versus Junction Temperature Tj

1.3 VF 1.2 High Side Transistor
AED02401

2.0 V INL 1.5

1.1 Low Side Transistor

1.0

1.0

0.9

0.5

0.8

0 -50

50

100 Tj

C 150

0.7 -50

50

100 Tj

C 150

Data Sheet

18

2001-06-19

TLE 5205-2
Electrical Characteristics Overcurrent Shutdown Threshold ISD versus Junction Temperature Tj
12
AED02402

Switching Threshold VEH, VEH versus Junction Temperature Tj

3.0 V EH ,V EL 2.8
AED02404

SD
10 Low Side Transistor 8 High Side Transistor

2.6 V EH 2.4 V EL

2.2

2.0

0 -50

50

100 Tj

C 150

1.8 -50

50

100 C 150 Tj

Error-Flag Saturation Output Voltage VEF versus Junction Temperature Tj

0.6 V EF 0.5
AED02403

0.4

0.3

0.2

0.1

0 -50

50

100 C 150 Tj

Data Sheet

19

2001-06-19

TLE 5205-2
Package Outlines 4 Package Outlines P-TO220-7-11 (Plastic Transistor Single Outline Package)

10 0.2 9.9 0.2 8.5

1)

A 4.4 1.27 0.1

15.65 0.3

12.95

0...0.3

1)

2.8 0.2 3.7 -0.15

17 0.3

8.6 0.3

10.2 0.3

7x 0.6 0.1 0...0.15 6x 1.27

1)

3.7 0.3

0.5 0.1 3.9 0.4

2.4 0.25
M

A C

8.4 0.4

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information. Data Sheet 20

Dimensions in mm 2001-06-19

GPT09083

Typical Metal surface min. X=7.25, Y=12.3 All metal surfaces tin plated, except area of cut.

1.6 0.3

0.05

9.25 0.2

TLE 5205-2
Package Outlines P-DSO-20-12 (Plastic Dual Small Outline Package)

3.5 max.

1.3

0.25 +0.0 7

1.2 -0.3

0 +0.15 3.25 0.1

-0.02

11 0.15 1) 2.8

15.74 0.1 1.27 0.4

+0.13

0.1 0.25
M

6.3 14.2 0.3

A 20x

Heatsink 0.95 0.15 0.25

M

20

11

Index Marking

1 1 x 45

10

A 1) Does not include plastic or metal protrusion of 0.15 max. per side

15.9 0.15 1)

GPS05791

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information. SMD = Surface Mounted Device Data Sheet 21

Dimensions in mm 2001-06-19

5 3
B

TLE 5205-2
Package Outlines P-TO263-7-1 Option E3180 (Plastic Transistor Single Outline Package)
4.4 10 0.2 0...0.3 8.5 1) A 1.27 0.1 B 0.05 2.4 0.1

10.3

(15)

9.25 0.2

7.551)

0...0.15 7x0.6 0.1 6x 1.27 0.25

M

4.7 0.5

2.7 0.3

0.5 0.1
A B

8 max.
0.1 B

1)

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information. SMD = Surface Mounted Device Data Sheet 22

Dimensions in mm 2001-06-19

GPT09114

Typical Metal surface min. X=7.25, Y=6.9 All metal surfaces tin plated, except area of cut.

TLE 5205-2
Package Outlines P-TO220-7-12 (Plastic Transistor Single Outline Package)

10 0.2 9.9 0.2 8.5

1)

B 4.4 1.27 0.1

17 0.3 15.65 0.3

12.95

0...0.3

1)

2.8 0.2 3.7 -0.15

2.4

110.5

C 0...0.15

13 0.5

0.5 0.1 7x 0.6 0.1 2.4

M

6x 1.27
1)

0.25

A B C

Typical Metal surface min. X=7.25, Y=12.3 All metal surfaces tin plated, except area of cut.

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information. Data Sheet 23

9.25 0.2

0.05

Dimensions in mm 2001-06-19