Nyquist-Rate D/A Converters

1. Resistor String Converters

Based on selecting one tap of a segmented resistor-string by a switch network which is connected in a tree-like decoder. The voltage selected propagates through N levels (3 in the figure) before getting to the buffer. As N increases, the delay through the switch network imposes a major limitation on the speed. Suitable for N 10. .

In a higher-speed implementation, the tree decoder is replaced with a digital decoder. The logic circuit is an N-to-2N decoder and the common node of all switches is directly connected to the buffer via a bus. The decoder can take a large area and also the 2N transistor junctions result in a large capacitive loading on the bus.

BUS

To reduce the amount of digital decoding and large capacitive loading, a folded resistor-string D/A can be used. This approach makes the decoding very similar to that for digital memory, which reduces the total decoding area. The total number of transistor junctions on the output line is reduced to 2 2N .

2. Binary-Scaled Converters
The most popular approach for realising at least some portion of D/A converters is to combine an appropriate set of signals that are related in binary fashion. 2.1 Binary-Weighted Resistor Converters

b b b b Vout = RF Vref 1 2 3 4 R R R R 2 4 8 16

This approach does not require many resistors or switches. However, the resistor and current ratios are on the order of 2N, which may be large.This large current ratio requires that the switches be scaled so that equal voltage drops appear across them for widely varying current levels. Also monotonicity is not guaranteed. Popular for bipolar technology.
3 4

2.2 Reduced-Resistance-Ratio Ladders To reduce the large resistor ratios in a binaryweighted array, signals in portions of the array can be scaled by introducing a series resistor.

For the 4-bit R-2R D/A converter shown above, we see that:
Ir = Vref 2R ,

Vout = R F
i=1

b iIr R N b = Vref F ii i1 2 R i=1 2

2.3 R-2R Based Converters

To reduce the current ratio through the switches the configuration shown below is used. However, this circuit is slower since the internal nodes of the R-2R ladder now exhibit some voltage swings.

R4 = 2R R 4 = 2R || 2R = R R 3 = R + R 4 = 2R R 3 = 2R || R 3 =R and so on.

I1 =

Vref 2R

I2 =

Vref 4R Vref I3 = and so on. 8R

2.4 Current-Mode D/A Converters These are very similar to resistor-based converters, but are intended for higher-speed applications. The basic idea is to switch currents to either the output or to ground.

3. Thermometer-Code Converters
To reduce the effect of glitches, the input binary values are digitally recoded to a thermometercode equivalent. A thermometer-based converter has low DNL errors and guaranteed monotonicity. This technique does not increase the size of the analogue circuitry compared to the binaryweighted approach.

Glitches are a major limitation during high-speed operation. These are mainly the result of different delays occurring when switching different signals. The glitch disturbance can be reduced by limiting the bandwidth, but this slows down the circuit.

3.1 Current-Mode D/A Converters

3.2 Single-Supply Positive-Output DACs

Thermometer-code decoders are used for both row and column decoders, resulting in inherent monotonicity and good DNL errors. Current is switched to the output when both row and column lines for a cell are high. Also, in high-speed applications, the output feeds directly into an offchip 50 or 75 resistor, rather than an output op-amp. Cascode current sources are used to reduce current-source variations. 9

A matched feedback loop is used to set up accurate known current-source biasing. Also to maintain accurate current matching that is independent of Vout, one side of each differential current-steering pair is connected to Vbias rather than to the inversion of the bit signal. Q2 and Q3 form a cascode current source when they drive current to the output. The circuit can be clocked at the maximum rate without the need for precisely timed edges.

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4. Hybrid Converters
These are very popular because they combine the advantages of different approaches. For example, a thermometer-code approach is commonly used for the top few MSBs while using a binary-scaled technique for the lower LSBs. In this way glitching is reduced and accuracy is improved for the MSB (where it is needed most), whereas in the LSBs where these requirements are low, valuable area is saved with a binary-scaled approach.

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