Chapter 10

Compensator

10.1 Introduction

Fig 1.1-1: Compensator

k. s + a ;
s + b

phase lead or phase lag compensator.

Compensating networks are used in closed-loop system to improve performance. The compensators shown are made-up of electric resistors and capacitors, which are passive elements.

220 Compensator.
The transfer functions developed are based on no loading effect upon the output. All the transfer functions are expressed in non dimensional form. From the filtering standpoint, the high pass filter is often referred to as a phase-lead controller since positive phase is introduced to the system over some appropriate frequency range. The low-pass filter is also known as a phase-lag controller, since the corresponding phase introduced is negative.

10.2 Phase-Lag Compensator

Fig 10.2-1: Typical lag compensator circuit. The circuit shown is a typical lag or integral compensator. The output signal is proportional to the sum of the input signal and its integral. The designation lag applied to this network is based on the steady-state sinusoidal response. The sinusoidal response E2 with a sinusoidal input E1. Initial conditions are considered to be zero.
I (s)(R 1 + 1 ) E2(s) 1 + R 1C1s !+T1s C1s = = = 1 + + E1(s) 1 ( R R ) C s 1 + T2s 2 1 1 I (s)(R 2 + R 1 + )
C1s

; where

T1 = R1C1

and

T2 = (R1+R2)C1

+1 1 1 + s1 / T s s 1 = 1 + 1 + 1 / T1 1 / T2 1 + s1 / T 2

(10.1)

where T1 < T2 slope T slope Freq. -1 -1 1/T2 +1 0 1/T1

221 Compensator.

Several general effects of lag compensation are: 1. The bandwidth of the system is usually decreased. 2. The predominant time constant of the increased, producing a more sluggish system. system is usually

3. For a given relative stability, the value of the error constant is increased. 4. For a given improved. value of error constant, relative stability is

Example 10. 2 - 1:
The open-loop transfer function of the original system and the performance specifications are given as follows:
G p(s) = k ; s (1 + .1s)(1 + .2s) k v = 100 sec 1

(10.2)

relative damping ratio = .707

G p(s) = 50k s (s + 5)(s + 10)

(10.3) kv = 100, k = 100 ,

The root locus of compensated system, for which corresponds to an unstable system:

222 Compensator.
k v = lim s G (s) = lim k = k = 100 (k v )
s0 s0

(10.4)

Characteristic equation is: s(s+5)(s+10) + 50k = 0. The graph is shown below in ( Fig 10.2-2): (10.5)

Fig 10.2-2 When k = 1.635 ; the uncompensated characteristic equation roots are: -11.118 , -1.91+j1.91 and -1.91-j1.91, which corresponds to a relative damping ratio of .707. The compensator equation:

Gc =

1 + T1s = 1 + aTs 1 + T2s 1 + Ts

T1 = aT2 and a = R2 R1 + R 2

(10.6)

where

a < 1;

The value of a is set to the ratio of the two values of k, that is:
a = k to realize the desired damping k to realize to steady - state performance

= 1.635 = .01635 100

Let us set T to be arbitrarily large at 100, compensator is described by the transfer function: the

(10.7) phase lag

223 Compensator.
1.635 (s + .6135) = .01635 s + .6135 G (s) = 1 + 1.635s = s + .01 100 (s + .01) 1 + 100s

and the open loop transfer function of the compensated system is:
.815k (s + .6135) ; where G (s) = G c(s) G p(s) = s (s + 5)(s + 10)(s + .01) k = 100

When k = 100 , the roots of the compensated characteristic equation are at -11.13, -1.198, -1.341 j1.397. The relative damping ratio of the complex roots is slightly less than 0.7. This can be improved by selecting a smaller value for a or a large T.

Fig 10.2-1: Unit step response of the system with phase-lag control. The unit step response of the system with the phase-lag controller as is shown. The peak overshoot of the response is approximately 36 percent.

10.3 Phase Lead Compensator

The circuit shown is a lead compensator. the output signal is proportional to the sum of the input signal and its derivative. The lead designation of this network is based on the steady-state sinusoidal response. The sinusoidal output E2 leads the sinusoidal input E1.

Fig 10.3-1: Passive phase-lead.

224 Compensator.
1 +1 E2(s) T 1 + T1s s 1 + s = 2 = Q1 + E1(s) T1 1 + T2s 1 / T2 1 / T1

where

T1 = R 2C2

; T2 =

R 1R 2C2 R1 + R 2

& Q =

T2 < 1 T1

or

E2(s) = E1(s) where

s + 1 / aT ; a > 1 s + 1/T

(10.8)

a =

R1 + R 2 R2

and

T =

R 1R 2 C R1 + R 2

The lead network provides compensation by virtue of its phase-lead property in the low to medium frequency range and its negligible attenuation at high frequencies. The low to medium frequency range is defined as the vicinity of the resonant frequency p

Although the network may be simplified further, representing a low-pass filter by eliminating R2 .

and

still

be

225 Compensator.

Example 10.3-1:
The block diagram shown below describes the components of a sumseeker control system.

Fig 10.3-1: Block diagram of a sum-seeker control system.

The system may be mounted on a space vehicle so that it will track the sun with high accuracy. The variable r represents the reference angle of the solar ray and o denotes the vehicle axis. The objective for the sun-seeker control system is to maintain the error between r , o and near zero. The parameters of the system are given as: Rf = 10000 kb = .0125 ki = .0125 Ra = 6.25 J = 10-6 ks = .1
kg-m
2

V/rad/sec N.m/A

A/rad

k : to be determined B = 0 n = 800 The open-loop transfer function of the uncompensated system is:

ksR Fkki / n o(s) = (s) R aJs2 + kik bs

(10.9)

226 Compensator.
Substituting the numerical values of the system parameters:
o(s) = 2500k (s) s (s + 25)

(10.10)

The specifications of the system are given as follows: 1. The steady-state value of (t) due to a unit ramp function input for r(t) should be less than or equal to .01 rad per rad/sec of the final steady-state output velocity. In other words, the steady-state error due to a ramp input should be less than or equal to 1 percent. 2. The peak overshoot should be less than 10 percent. The loop gain of the system is determined from the steady-state error requirement. Applying the final-value theorem to (t), we have:
lim (t) = lim s (s) = lim
s0

sr(s) (s) s0 1 + o (s)

(10.11)

For the unit ramp input:

r(s) = 1 lim (t) = .01 k s0 s2

(10.12)

Thus for the steady-state error to be less than or equal to .01 , k must be greater than or equal to 1. For k = 1, the worst case, the characteristic equation of the uncompensated system is: s
2

+ 25s + 2500 = 0

(10.13)

Thus the damping ratio of the uncompensated system is merely 25 percent, which corresponds to a peak overshoot of over 44.4 percent. The open-loop transfer function of the system with the phase-lead compensator is:
G (s) = 2500 (1 + aTs) s (s + 25)(1 + Ts)

(10.14)

where ramp error constant kv = 100. The characteristic equation becomes: s(s+25)(1+Ts) + 2500 = 0 (10.15) (10.16)

1+

Ts2(s + 25) s2 + 25s + 2500

= 0

this equation is of the form

1+ G1(s) = 0

227 Compensator.

The characteristic equation of the compensated system now becomes: s(s+25)(1+Ts) + 2500 (1+aTs) = 0
1+ 2500aTs = 0 s (s + 25)(1 + Ts) + 2500

(10.17) (10.18)

this equation is of the form

1+ G2(s) = 0 (10.19) in the denominator can be

2500aTs G 2(s) = s (s + 25)(1 + Ts) + 2500

For very neglected : s

small
2

T,

the

term

(1+Ts)

+ 25(1+100aT)s + 2500 = 0

(10.20)

Let us select the damping ratio for the approximating second-order system to be .707. Then gives: = .707 = 25aT + .25 aT = .0183

If we select a values for T a overshoot % characteristic equation roots .00588 .0015 .0022 5.83 12 8 7.3 6.6 13.8 -30.93 , -82.07 j 83.73 -433.6 , -45.68 j 28.21 -460.3 , -32.35 j 40.85 T = .00588

If we select in this case with a = 5.83 , then

The transfer function of phase-lead compensator is:

G c(s) = s + (1 / a) T = s + 29.17 s + (1 / T) s + 170

(10.21)

10.4

Phase Lead-Lag Compensator

The circuit shown is a lead-lag compensator, which combines the characteristics of the lag and the lead compensators. This is called a lead-lag network because the phase of the sinusoidal response E2, compared with the sinusoidal input E1, varies from a lag to a lead angle as the frequency is increased from zero to infinity. The phase angle can be determined from the steady-state solution of the differential equation.

228 Compensator.

E2(s) = E1(s)

(1 + T1s)(1 + T2s) 1 + (T1 + T3 + T4) s + T1T2s2

s s 1 + 1 + 2 3 s 1 + s 1 + 4 1 T2 = R2C2
s 1 + 1
-1

(10.22)

where

T1 = R1C1

T3 = R1C2
+1

, and
+1

T4 = R2C1
1

E2(s) = E1(s)

s 1 + 2

1 + s 3

s 1 + 4

Gc (s)

(10.23)

229 Compensator.
aT1 = R 1C1 bT2 = R 2C2

or

G c(s) =

(1 + aT1s) (1 + bT2s) (1 + T1s) (1 + T2s)

(10.24)

lead lag T1T2 = R1R2C1C2 ; abT1T2 = R1R2C1C2

ab = 1.

which means that a and b cant be specified independently.

Design Sample:
1- Given the block diagram:

The specifications are: i) Asymptotically stable. ii) kv 1000 iii) c 200

Td Tp 1 = 1 = 10 3 1000 kv 3 = 3 = 0 . 015 c 200
rad/sec

(10.25)

(c = p )

(10.26)

230 Compensator.
Design procedures:
1Bode plot
s 1 1 + s 1 G(s) = 1000 1 + s 10 1000

(10.27)

crossover slope

1000 10 -1 -1 -1 -2 10 -1 -3
3

When, we have slope = -2 the system is unstable, so we should make it stable.

1 +1 2 Gc(s)G(s) = 1000 1 + s 1 + s 1 + s s 10 50 1000

(10.28)

s G c(s) = 1 + 50

+1

1 + s s 1 = 50 1 + s 1000 1 + 1000

(10.29)

231 Compensator.

E2 (s) 1 + s/(1/R1C) = E1(s) s 1 + R1 + R 2 R1R 2

1 = 50 R 1C R1 + R 2 = 1000 R 1R 2

(10.30)

If

C = 10

-3

R1 = 20

, R2 = 1.05

Example 10.4-1:
Design a Lag compensator that will provide a phase lag of 50 and an attenuation of 15 db at = 2 rad/sec.

Solution:
q = - tan 50 = -1.192 c = 10
Mc/10

= .0316

(Mc = gain)

232 Compensator.
q 2 - c + 1 = 2.3887 2 2q c = .0898 Hence Solving 2.3887
2

(q 2c + c - 1) c = - .0292

+ .0898 - .0292 = 0.

= .09336
1/2

is positive root.

2 c c b = c 1

= 3.295

and the transfer function is obtained as :

G c(s) = (s + b) .09336 s + .3076 = s + b s + .3076

10.5

Digital Implementation of Compensators

Since digital control systems have many advantages over continuous-data systems, compensators that are designed in the analog domain are implemented digitally. The block diagram of the analog PID controller, where PID stands for Proportional, Integral, and Derivative, is shown below.

Fig 10.5-1: PID Controller.

kp is implemented digitally by a gain element. Since a digital computer or processor always has a finite digital word length. Most digital computers are based on the binary-number system. The time derivative of a function f(t) at t = kT can be approximated numerically by use of the values of f(t) measured at t = kT and t = (k+1)T , that is df (t) = 1 [f(kT) - f((k - 1)T)] dt t = kT T (10.31)

233 Compensator.
To find the z-transfer function of the derivative operation described numerically above we take the z-transform on both sides, we have:

df (t) -1 F 1 (s) = z 1 F (z) dt = T (1 - z ) Tz t = kT

(10.32)

Thus, the z-transfer function of the digital differentiator is written:

GD(z) = KD z 1
Tz

(10.33)

Where KD is the proportional constant of the derivative Ts . So when the sampling period T compensator. Replacing z by e approaches zero, GD(z) approaches KD s , which is the transfer function of the analog derivative compensator. For the integrator, we normally have a number of choices of digital approximation. This approximation is equivalent to the sample-and-hold (zero order) operation. The block diagram representation of rectangular integration.

(a) Rectangular integration.

(b) Equivalent rectangular integration with sample-and-hold.

Fig 10.5-2: (a) & (b)

The z - transfer function of the digital integrator can be written GI(z) = Kz . Z

1 e Ts 1 kIT = s s z1

(10.34)

Again, as T approaches zero, GI(z) approaches KI /s , the transfer function of the analog integral controller.

234 Compensator.
In practice, there are other numerical integration rules. Such as the trapezoidal integration, Simpsons rule, and so on. The block of a digital PID controller is shown below:

Fig 10.5-3:

Block diagram of a digital PID compensator.

Once the transfer function of a digital compensator is determined, the compensator can be implemented by a digital processor or computer. The operator z-1 is interpreted as a time delay of T seconds, where T is the sampling period. The time delay is implemented by storing a variable in some convenient storage location in the computer and then taking it out after T has clasped. For the digital differentiator, the transfer function is written: GD(z) =
KD (1 z 1) T

(10.35)

for the digital integrator, it is : GI(z) =

KITz1

1 z 1

(10.36)

Any continuous data compensator can be made into a digital compensator simply by adding sample and hold units at the input and the output terminals. The sampling period T should be sufficiently small so that the dynamic characteristic of the continuous-data compensator are not lost through the digitization. The system shown below actually suggests that given the continuous-data compensator Gc(s), the equivalent Gc(z) can be obtained as shown.

Fig 10.5-4:

Realization of digital controller by an analog controller with sample-and-hold.

235 Compensator.

Fig 10.5-5:

Digital program realization.

Consider that the continuous-data compensator is represented by the transfer function: Gc(s) =

s + 1 s + 1.61
is written:

(10.37)

The transfer function Gc(z)

Gc(z) = (1-z-1) Z s + 1 = z .5 (s + 1.61) z .2 s

(10.38)