Lab 12: ALU (Arithmetic and Logic Unit) Performed: 9/7, 11/7, 12/7, 16/7/2013 17 July, 2013 Author:

Derek Byers

Purpose
The purpose of this lab was to gain experience with the ALU, or Arithmetic and Logic Unit, I.C. chip. The class task was to modify the register file constructed in Lab 11: Register Files to be propagated through the ALU. To achieve the two inputs for the ALU, a 4-bit latch was constructed out of the 7474 Dual D Flip Flop chip. Also, the operation of the ALU was determined by 4 inputs from DIP switches using inverted logic sources. The ALU outputs are connected to a BCD to 7-Segment Display decoder and displayed. The output of the ALU is also brought into a 4-input 2:1 multiplexor, allowing the selection of the ALU output or data inputs. The circuit was then connected to the LogicPort Logic Analyzer, where the time was extended so that the human interaction with the board could take place and be recorded by the computer program.

Procedure
The first step in this lab was to create an Altera Quartus simulation of the circuit. . This was done by using two counters, one for reading and one for writing to the register file. The counters were manipulated by their UP inputs, and their outputs flowed into the read and write inputs of the register file. Also flowing into the register was a write enable, and the output of the 74157 4-input 2:1 multiplexor, which has inputs D[0-3] and F[0-3] with a selector input. The output of the register is split into a 4-bit latch, constructed out of two 7474 Dual D Flip Flop chips, and the B input of the ALU. The 4-bit latch is controlled by a latch enable, and the output is connected to the A input of the ALU. The function of the ALU is chosen by changing the four selector inputs and the M input; Cn was set high for the whole procedure. The output of the ALU, F[0-3], was then fed into a BCD to 7-Segment Display decoder and into the 4-input 2:1 multiplexor. After the schematic was made, waveform simulations were run to show how the inputs were stored and read out of the register into the latches and ALU and displayed on the BCD 7-Segment Display. The simulation reads in four hexadecimal numbers into the 4x4 register, then adds the first two. The output from the ALU is taken and stored in the first address. Then the first address and the third address were added, the output then stored again in the first address. Lastly, the first address and the fourth address were added, the output again stored in the first address. This was to maintain the first three hexadecimal numbers as asked. (Waveform show in Figure 1 in the Appendix, to show detail) These 1s and 0s correspond to each of the 7 segments of the display, in order from A-G (Figure A).

Figure A This shows the pin connection diagram of the 7-Segment Display. The Labeling of the pieces of the display start at the top with A, run clockwise around to F, and G is the cross bar in the middle.

After the simulation was completed, the schematic was built on the protoboards. The chips used include: two 7400 NAND chips used for the de-bounced switches, two 74193 counters, two 74247 BCD-to-7 Segment decoders, one 74670 4-bit x 4-address register file, two DIP switches, two 7 Segment Displays, two 7474 Dual D Flip Flops, and one 74181 Arithmetic and Logic Unit. The chips were wired according to the schematic, with the de-bounced switches connected to the COUNT_UP_WRT, COUNT_UP_READ and WRT_EN_N inputs so that we could switch between the addresses as well as write in the values. Four switches of a DIP switch were used with 1 k pull-up resistors as inverted logic sources to provide the input data. Another four switches of a DIP Switch were used with a 1 k pull-up resistors as inverted logic sources were used to determine the function of the ALU. Once the circuit was tested, the LogicPort Logic Analyzer was connected to the circuit to show that the physical circuit operated in the same manner as the Quartus simulation.

Results
Once the probes of the logic analyzed were attached to the inputs and outputs of the circuit, simulations were run using the computer program. Several adjustments had to be made for a simulation of this type, however, since human interaction was a key component of the functionality of the circuit. The Pre-Fill time was set to .5 seconds, and the Post-Fill time was set to 30 seconds, which allowed for the time it took to manipulate the switches in order. The Sample Rate was set to 1 KHz, and the Logic Threshold was set to 0.95 V. Because of the coordination required to operate the switches on the board, along with the DIP switches for the inputs, a simpler sequence was chosen, this time being 0, 1, 2, 3. In this picture of the LogicPort running, you can see as the switches are manipulated: the COUNT_UP_WRT being pushed each time a new address is selected, the D inputs and corresponding Q outputs changing. The decoders also changed to light up the correct pieces of the LEDs to show the corresponding numbers: all pieces except G to show 0, only pieces B and C for 1, all pieces except C and F for 2, and all pieces except E and F for 3 (the results were not inverted, so a 0 denotes the light being on and a 1 denotes the light being off). Lastly, the WRT_EN_N can be seen being toggled each time a value was to be recorded (Figure B)

Figure B 4

This shows the LogicPort Simulation described in the results section above.

Conclusions
This lab provided an introduction to and one new part, and elaborated on familiar parts: counters, BCD-decoders, 7 Segment Displays, and register files were all previously used components, while the ALU was a new component to the class.. The experiment provided a comprehensive and intuitive use of each of these, with added features, such as using the LEDs to display the current address, to help show how the device was working and to make it more user friendly. Also, the need to use manual switches in order to count and write values provides an appreciation for the ability of computers to implement these functions by using their hardware and software, without needing to open the case and adjust parts of the computer yourself.

References
1. Worked with Robert Timmons 2. Consulted ECE 0501 Website for part schematics and pin diagrams. 3. Consulted the LogicPort Slide Show on the 0501 website for help using the LogicPort.

Appendix
The following pages make up the Appendix, which for this lab report, was used to provide space for full-page printouts of the schematic of the circuits and the waveform corresponding to the schematic. Without this space, the data in the photos would have been impossible to read.