MRAM Processing NOZIERES PDF

inMRAM
2013
MRAM PROCESSING
InMRAM 2013 JP.Nozieres
MRAM IS AN ABOVE-IC PROCESS

- MTJ used as a variable resistance - Resistance compatible with CMOS (~ k) - End-of-back-end process - No trade-off with logic process -Easy / cheap to embedd - 0 to 3 add-masks - No HV required - Front-end contamination ? - Low-T BE process (T<350C)
Modify conventional dielectric /metal depositions /cure Mostly new recipies on standard tools Avoid sharing low-T /high-T process on same tools (particles) Requalify process (reliability)
inMRAM
2013
Magnetic element level CMOS logic level
Microcontamination procedure
Element Concentration (g/cm2) <10 10-100 <10 10-100 <10 10-100 <10 10-100 <10 10-100
inMRAM
2013
B Co Fe Ir Mg Mn Ni Pt Ru Ta
Table values are for blanket film. Etch reduces values by 30-80% on patterned wafer SEZ backside clean post deposition and etch steps Monitoring of tools pre/post MRAM wafers using TXRF TXRF procedure:
Elements to be detected: Fe, Ir, Mn, Ni, Pt, Ru, Co, Cu Measured on Si wafers, face-up and face-down, 25pt/wafer Contamination limits: tool/materials dependant.
Would contamination occur, run blanket resist or oxide wafers to absorb contaminants from chamber/ handling system
3
MRAM DEMO CHIPS

MR A M
inMRAM
2013
90n
0. 2 9 Bit m 2 Ce ll
mC
MO S
Freescale / Everspin 4Mb Toggle MRAM

90nm front end CMOS. Cladded Cu M5 / M6 lines
MRAM DEMO CHIPS

Hynix 32 Mb planar STT
inMRAM
2013
14F
PROCESS SCHEMATIC - STT MRAM
inMRAM
2013
Pads
Low-T Back end Regular Front end
Bit line
Cell Strap
MTJ
Non-standard Process Standard Process
M0
PROCESS SCHEMATIC FIELD MRAM inMRAM

2013
Pads M4 Bit-Line
Shallow via MTJ

V3
Low-T Back end Regular Front end
VM2
V4
MM1 MM2 - Strap
Non-standard Process Standard Process Cladded line
M2 Bit-Line V2 M1 V1 M0 STI
FIELD MRAM - CLADDED LINES

Decreases write current by ~2x (improved power, electromigration) Lower cladded line easy to process
Simple replacement of liner material with ferromagnetic material (e.g. NiFe)
inMRAM
2013
NiFe
Upper cladded line more complex

multi-step process to preserve film continuity and prevent ferromagnetic material at the bottom of the bit line.
Beware of changes in wire resistivity and inductance !
Pads M4 Bit-Line
VM2 MM1 MM2 - Strap
FRONT END BUILD-UP
inMRAM
2013
V2
Ta(100A)/SiNx(100A)
oxide SiNx M2
V2
M2
Process Target Key issues Impact
Cu CMP Oxide surface roughness <0.3nm rms Defects, Oxide/Cu dishing minimal Breakdown voltage, shorts/opens, Nel coupling.
FRONT END BUILD-UP Hotspots / Orange peel coupling

Smooth (5x5 m)
inMRAM
2013
Orange peel coupling
Rough (1x1 m
FRONT END BUILD-UP Cu CMP issues

No porous dielectrics No large-grain-boundary metals Extra smoothing polish on dielectric or metal layer before mag dep Beware of hillocks and voids in Cu Beware of dishing
Self-aligned Cu cap (etch back + backfill + smoothing CMP)
inMRAM
2013
Beware of residual slurry particles

In situ megasonic cleaning or use of abrasive-free slurries
FRONT END BUILD-UP ILD surface roughness
inMRAM
2013
edge right side center edge 0,17 0,24 nm rms
Pads M4 Bit-Line
VM2 MM1 MM2 - Strap
MAGNETIC STACK DEPOSITION / ANNEAL
inMRAM
2013
V2
Hard mask Storage layer Reference layer oxide SiNx M2 V3 M2 Strap / etch stop
Process Target Key issues
Magnetic PVD / Anneal RA / TMR uniformity < few % MgO integrity (pinholes, hot spots, ), layers roughness, proper magnetics Materials contamination
Impact
Cells resistance distribution, switching current distribution
13
MAGNETIC STACK DEPOSITION / ANNEAL

Top Electrode Etch stop layer
inMRAM
2013
Thermal barrier Spin injection layer
Protects MTJ during process Capping layer Storage layer Tunnel barrier Reference layer Pinning layer Seed layer NiFe(3) / CoFe(2) : Stores data (2 stable states) MgO (1.1) : Defines cell R & TMR CoFeB(2) / Ru(0.8)/CoFe(2) : SAF, immune to external fields PtMn(20) : AF layer sets direction of reference layer Ta(5) or NiFeCr(10) : Promotes texture of critical layers Contact to select transistor + diffusion barrier
Base electrode
MAGNETIC STACK DEPOSITION

inMRAM
2013
Magnetic film stack grown entirely without breaking vacuum as interface properties are of high importance in magnetics. Conventional PVD tools poorly suited to MTJ film deposition, as they lack the necessary control of film thickness, film uniformity, and surface roughness. Additional chamber required for finely-controlled oxidation of tunnel barriers Specialized deposition tools derived from HDD industry
TMR read head
inMRAM
2013
inMRAM
2013
10 targets, rotating drum Deposition chamber
Oxidation module : Plasma oxidation Natural oxidation RF reactive deposition
inMRAM
2013
inMRAM
2013
inMRAM
2013
inMRAM
2013
MAGNETIC STACK DEPOSITION Influence of water partial pressure
inMRAM
2013
Sputter Ta in chamber (used as H2O getter) during MgO deposition. With Ta getter
w/o Ta getter
MAGNETIC STACK ANNEAL
inMRAM
2013
Anneal (Magnetic)
Set pinning layer(s) with desired magnetization direction. T~250-300C (depends upon AF material) In-plane MTJ requires magnetic field, H~1T, low skew Perpendicular MTJ may not require magnetic field anneal
Anneal (Structural)
MgO / CoFeB crystallization Perpendicular layers crystallization Beware, magnetic films can change stoichiometry dramatically
MAGNETIC STACK ANNEAL
inMRAM
2013
MAGNETIC STACK ANNEAL Growth of Tunnel Barrier

As-deposited Cap layer (Ta or Ru) Amorphous CoFeB
Polycrystalline (001) textured MgO
inMRAM
2013
Annealing
After annealing
Crystallization of bcc CoFe from the MgO Cap layer (Ta or Ru) interface and expulsion B rich CoFeB of the B out-of the CoFeB alloy bcc CoFe Improvement of MgO crystallization Crystallization of bcc CoFe from the MgO interface and expulsion of the B out-of the CoFeB alloy crystalline (001) textured MgO
Amorphous CoFeB Ru spacer
bcc CoFe B rich CoFeB Ru spacer
Important to attract B away from the tunnel barrier during the crystallization process Insert B getters nearby free and reference layer (Ta, Ru, Ti, Nb, Zr, Hf)
MAGNETIC STACK ANNEAL Influence of annealing T
inMRAM
2013
Higher Tanneal better (MgO) but issues with interdiffusion in the metallic layers
Ru-based SAF reference layer important for anneal at T>300C Mn diffusion limits anneal T at ~400C Ultrafast (flash) anneals also allow to get good recrystallization while preventing interdiffusion
Pads M4 Bit-Line
VM2 MM1 MM2 - Strap
MTJ ETCH
inMRAM
2013
V2
oxide SiNx M2
V3 M2
Hard mask Cl-RIE Ash / Clean + MTJ etch (IBE or RIE) / Clean >85-deg sidewall (e.g. CD gain), limited O/E Prevent sidewalls redeposition, magnetic layers damage/corrosion, CD control Insert proper etch stop layers / post etch clean
Impact
Cell Resistance distribution, R/W performances, reliability
27
MTJ ETCH ISSUES

CD variation Parasitic resistances parallel (shunts) serial (contact R) Edge tapering / defects Influences switching process Materials damage Influences witching process Decreased TMR (read margin) Corrosion (reliability) Etch remains the major process challenge
CD variation
inMRAM
2013
Contact R
Parallel R shunt
MTJ ETCH Distribution Considerations (Read)
inMRAM
2013
MTJ ETCH Distribution Considerations (STT Write)
inMRAM
2013
ION BEAM ETCHING (IBE)

Etch Clean
inMRAM
2013
HM MTJ
Low-density MRAM Cell
HM MTJ
High-density MRAM Cell
Low reactivity with etched films Control of incident angle (sidewalls clean) Similar etch rates across a wide range of different materials
Non volatile species (conductive sidewall redeposits) Poor selectivity (wrt. mask) Shadowing (limits density / AR) Low throughput No 300mm history (uniformity ?)
ION BEAM ETCHING (IBE)

Taper angle (~ 10) for physical removal of sidewall redeposits.
Tradeoff between optimal cleanliness, damage of upper layers and CD control
inMRAM
2013
Option 1 : Single angle etch (e.g. 70-80)

Good CD control Important redepositions
Metallic Redeps
Option 2 : Dual angle etch

High angle etch for CD control Low angle sidewalls clean Can etch down to bottom layer
Ta MgO PtMn Ta
REACTIVE ION ETCHING (RIE)

Process of choice in semiconductor industry High throughputs Good CD control / Vertical sidewalls Volatile etch by-product Limited sidewalls redepositions No shadowing effects Possibility to process dense (low pitch) devices Poor volatility of magnetic materials byproducts at moderate T Process is very materials (stack) dependent
inMRAM
2013
Applied Materials Hot cathode DPS+ Etcher
2 MHz
Tc=150-250C

Chlorine, Bromine RIE
Chlorine attack of magnetic films (corrosion, undercut) Poor reactant volatility (sidewall redeposits) Degraded magnetic properties (halogen exposure)
inMRAM
2013
Carbonyl-based RIE (methanol or CO/NH3)
more volatile byproducts higher selectivity with metallic masks (Ti,Ta) low propensity towards corrosion in these chemistries
Option 1 : Stop on MgO

Prevents impact of sidewals redeps Poor selectivity for MgO stop (footing / residues) Additional masking/etch step required (cost, cell size)
Option 2 : Full MTJ etch

High selectivity to underlayer possible healthy overetch to scrub MTJ sidewalls Sidewalls redeps critical Moderate taper angle

Three-step process in RIE process
1- Hard mask etch : TiN, Ta, TN Cl2 / F based chemistries in DPS+ T>150C Stop on Ru etch stop (capping) layer 2- Post Etch Treatment : Importance of in situ clean before MTJ etch Avoid Chlorine diffusion within the magnetic stack NH3 clean to remove Cl and F from Ru surface
SiO2 HM Ta Ru FeMn NiFe CoFe MgO CoFeB Ru CoFe PtMn Ta TA-MRAM Stack
inMRAM
2013
Hard mask
Storage
Reference
3- Magnetic Tunneling Junction etching : One step process in DPS+ reactor CO/NH3, NH3 or N2H2 chemistries Tcat.=150-250C Formation of volatile carbonyl based products expected at elevated T
REACTIVE ION ETCHING (RIE) Post etch treatment

Chlorine effect on MTJ stack :
Evidence of chlorine contamination at the surface
Metallic Salts formation on Ru after air exposure
inMRAM
2013
To avoid metallic salt formation and corrosion,

chlorine must be removed.
Dechlorination using NH3 plasma :

NH3 (100 sccm) - 5mTorr - 800Ws / 0Wb 2min
200 nm
Efficiency of NH3 Clean step to remove Cl and F from Ru surface.

From IBE . to Chlorine to carbonyls (methanol, CONH3) to hydrogen (NH3, N2H2) to IBE !
inMRAM
2013
Important physical damage to MTJ
Volatile by-products but e decomposed by plasma ! E-lik IB Nice morphology like E Degraded magnetics IB Mixed RIE/IBE process (IBE for critical layers and/or sidewalls clean)
Pads M4 Bit-Line
VM2 MM1 MM2 - Strap
LINER DEPOSITION
inMRAM
2013
V2
oxide SiNx M2
V3 M2
Nitride PECVD stress: -50 to -150 MPa; mean thickness: 300 30A, < 2% 1s unif,, > 70% conformality Conformal coverage, Queue time (corrosion) Reliability
Impact
38
LINER DEPOSITION
Protects devices during further processing
In-situ MTJ encapsulation after etch better but not mandatory Silicon oxide (TEOS precursor)
void-free / conformal films at T<250 C oxygen diffusion in magnetic layers
inMRAM
2013
Silicon nitride (PECVD)

Great barrier (strong interfacial bonds at dielectric / metal interfaces) Poor conformallity at T<400C
Process of Record : SiN / SiO2 + CMP

Thin SiN layer (MTJ-compatible sealing) Thick TEOS overlayer (conformal)
Beware of stress (magnetostriction) Alternative are ALD (cf. HDD industry) and/or low-temperature-cured spin-on-glass (avoids CMP)
Pads M4 Bit-Line
VM2 MM1 MM2 - Strap
STRAP ETCH
inMRAM
2013
V2
oxide SiNx M2
V3 M2
RIE (mostly Cl-based) of metal strap (usually Ta) Option 1 : After cell etch
Photo on topology
Option 2 : Before cell etch

Photo alignment (inflated cell size)
Option 3 : Before MTJ deposition

Front-end build up (roughness) must be adjusted
40
Pads M4 Bit-Line
VM2 MM1 MM2 - Strap
TOP CONTACT TO MTJ

Two strategies
inMRAM
2013
V2
Contact via (damascene process) Direct contact (CMP-open)

M4
Oxide or SoG SiNx M2
V3 M2
oxide SiNx M2
V3 M2
41
TOP CONTACT TO MTJ

CMP open Use (conducting) hard mask as self-aligned contact Contact via Additional via in damascene process
inMRAM
2013
Fewest processing steps (cost) Need good control of CMP Shadowing during MTJ etch.
Standard process Overlay implies large cell size Beware of punch-through (contamination)
Pads M4 Bit-Line
VM2 MM1 MM2 - Strap
FINAL WIRINGS TO PADS
inMRAM
2013
V2
M4
Regular process if not for

- Low Temperature - Shorter via - Potential materials contamination
V4 oxide SiNx M2
M4
Possibility of using MTJ stack as peripheral via fill Multiple options for metal line
Substractive (Al) etch Damascene
V3 M2
May require requalification of CMOS reliability (substantial expense !)

43
TOOLING CMP open / Damascene fill Process

/
Cu CMP Cell Photo ILD
inMRAM
2013
Trench Etch/Clean
Cell Etch / Clean
Oxide CMP
Backside clean
Surface polish
Encapsulation
Etch stop layer Dep
Cu seed
Mag deposition
Backside clean
Via Photo
Cu fill
Mag anneal
Strap Photo
Via Etch/Clean
Cu CMP
Backside clean
Strap Etch
Trench Photo
Cell
Contact
TOOLING
FURNACE DEPOSITION PHOTO ETCH / STRIP WET / Clean
inMRAM
2013
CMP
MAGNETIC SOLUTIONS MRT2000
SINGULUS TIMARIS (for MTJ + stap + HM dep)
NIKON /ASML DUV (193 nm) + track TEL ACT 8
AMAT Centura DPS+ RIE (for TMR +HM + Metal)
LAM SEZ (for back side cleaning)
EBARA FREX -200 or AMAT mirra mesa (for Cu CMP)
AMAT CENTURA or NOVELLUS C2 SEQUEL (for low-T oxyde / nitride)
NIKON /ASML UV (248 nm or i-line) + MUV track
VEECO IBE TOOL FOR TMR STACK
SEZ or SEMITOOL RAIDER (for wet)
EBARA FREX -200 (for or AMAT mirra mesa Oxide CMP)
AMAT ENDURA or LAM EXL (for seed & Pads deposition)
APPLIED CENTURA MxP+ or TEL UNITY (for oxide/nitride etch)
SEMITOOL EPA (for Cu fill)
TEL SCCM or LAM EXL (for slug etch back)
Specific tools Standard / Dedicated tools Standard / Generic tools
MAGNETIC METROLOGY EQUIPMENT

Need for rapid in-line (magnetic) process monitoring Measurement of process yield
Standard serpentine-comb and via chain structures Probes MTJ cell / contacts / lines resistances
inMRAM
2013
Measurements of the MRAM-specific layers

Requires magnetic fields sweep (slow) Must be non destructive Probes magnetics and magneto-transport properties (Hc, Hexch, RA, TMR, )
On-chip testing of arrays

Standard e-test without magnetic fields Probes cell functionality (read/write, reliability, )
Magneto-Optical Kerr Effect (MOKE)
inMRAM
2013
Principle : Rotation of light polarization after reflection from magnetic surface
Non Contact, fast Small Signal sensitivity No sample size limitation Spot measurement on wafer (~m) In line wafer mapping Penetration depth limited No absolute magnetization
inMRAM
2013
Current-In-Plane tunneling (CiPTec)

x x x
inMRAM
2013
Problem : How to measure RA, TMR in blankets films ?

Rsq
TOP LAYER [FREE]
I+ V+ V- IRt x
Small probe pitch measures Rt

RT
BARRIER BOTTOM LAYER [PINNED]
Intermediate probe pitch measures RA and MR
x I+
TOP LAYER [FREE] BARRIER
x V+ VRt x
x I-
RT // RB
Large probe pitch measures RT // RB

Probe pitch
RA x Rb x
RA x
BOTTOM LAYER [PINNED]
V R = I
R T || R
RT K R B
x K
2 x + ln
(2 )
Current-In-Plane tunneling (CiPTec)
inMRAM
2013
No need to pattern Local measurement (~100m) Non destructive if done in scribe line Mapping possible Need special capping layer (probe-to-stack contact) May require low conductivity underlayer Tips wear / cost
Magnetic QSW
Principle : Standard Electroglass wafer prober platform with built-inquadrupole magnet for rotating field generation
inMRAM
2013
Hysteresis cycles WT801768-15 S 7 10 11

1 4
inMRAM Resistance distribution

2013
300 299 298 297 296 295 294 293 292 291 290 -1500 -1000 -500 0 500 1000
15 row 0.5 20
i= 80 easyax norm biasPt= 0 RsatP= 298.5486 RsatN= 290.6136 Rzero= 296.7983

Vbrk(corrected for Rseries) over wafer 2 25
1.5
10 0
Magnetotransport (TMR, RA)

5 -0.5
6 column
10
12
-1
V-breakdown
inMRAM
2013
THANK YOU !

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inMRAM

InMRAM 2013 JP.Nozieres

MRAM IS AN ABOVE-IC PROCESS

Magnetic element level CMOS logic level

InMRAM 2013 JP.Nozieres

MRAM DEMO CHIPS

Freescale / Everspin 4Mb Toggle MRAM

InMRAM 2013 JP.Nozieres

MRAM DEMO CHIPS

InMRAM 2013 JP.Nozieres

PROCESS SCHEMATIC - STT MRAM

Low-T Back end Regular Front end

Non-standard Process Standard Process

InMRAM 2013 JP.Nozieres

PROCESS SCHEMATIC FIELD MRAM inMRAM

Shallow via MTJ

Low-T Back end Regular Front end

MM1 MM2 - Strap

Non-standard Process Standard Process Cladded line

InMRAM 2013 JP.Nozieres

FIELD MRAM - CLADDED LINES

Upper cladded line more complex

Beware of changes in wire resistivity and inductance !

InMRAM 2013 JP.Nozieres

FRONT END BUILD-UP

Process Target Key issues Impact

InMRAM 2013 JP.Nozieres

FRONT END BUILD-UP Hotspots / Orange peel coupling

Orange peel coupling

InMRAM 2013 JP.Nozieres

FRONT END BUILD-UP Cu CMP issues

Beware of residual slurry particles

InMRAM 2013 JP.Nozieres

FRONT END BUILD-UP ILD surface roughness

edge right side center edge 0,17 0,24 nm rms

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION / ANNEAL

Process Target Key issues

Cells resistance distribution, switching current distribution

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION / ANNEAL

Thermal barrier Spin injection layer

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION

10 targets, rotating drum Deposition chamber

Oxidation module : Plasma oxidation Natural oxidation RF reactive deposition

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION

InMRAM 2013 JP.Nozieres

MAGNETIC STACK DEPOSITION Influence of water partial pressure

InMRAM 2013 JP.Nozieres

MAGNETIC STACK ANNEAL

InMRAM 2013 JP.Nozieres