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Distribution Bus Voltage Control using DVR under the Supply Frequency Variations

Monika Chawla, Abhinav Rajvanshy, Arindam Ghosh, Fellow, IEEE, and Avinash Joshi
the reported techniques for this purpose. An iterative technique for fast and accurate estimation of power system frequency has been presented in [8], [9]. Most of the algorithms mentioned here are based upon the assumption that the fundamental frequency of power systems is known, and hence a fixed sampling frequency depending on the known frequency can be adopted. In those cases, the accuracy of frequency estimation is always beyond the anticipation. This paper discusses the voltage regulation of a critical bus using a dynamic voltage restorer (DVR) under frequency mismatch conditions. It is assumed that the frequency of the supply voltage is varying or is different from the system nominal frequency. The duration of a frequency deviation can range between several cycles to several hours. The variations are usually caused by rapid changes in the loads connected to the system. The reference voltages injected by the DVR are tracked in the closed-loop output feedback switching control [10]. The operation under frequency mismatch is studied and it is shown that under such condition the entire average load power is supplied by the DVR. Moreover, the injected voltage in this case can be very high. This requires expensive dc storage and is not desirable. If the DVR is supplied by a dc capacitor, it will discharge rapidly as it has to supply the entire power demand. Hence, an alternative arrangement has been made where the dc link of the DVR is supplied through an uncontrolled rectifier that provides a path for the real power flow [11]. However, in this arrangement, the DVR has to inject voltages with large magnitude, which is completely undesirable. So, in a varying frequency condition, if the power is injected at estimated frequency, the control operation will be smooth. To realize this, a method for estimating the frequency from the sampled injected voltage signal has been presented. II. VOLTAGE CONTROL USING DVR The equivalent circuit diagram of a 3-phase distribution system compensated by a DVR is shown in Fig. 1. A DVR is a power-electronic-converter-based device that protects critical loads from all supply-side disturbances other than outages. It is connected in series with a distribution feeder and is capable of generating or absorbing real and reactive power at its terminals. In Fig. 1, the load is supplied by the voltage source vs through a feeder (represented by Rs and Ls). In this, the DVR is connected in series between the point of common coupling (PCC) and the critical load. The PCC voltages and the load voltages are denoted by vt and vl respec-

Abstract-- This paper discusses a frequency estimation strategy that, when used in conjunction with dynamic voltage restorer (DVR), can hold the magnitude of any distribution bus voltage constant as the supply frequency varies. First the impact of supply frequency variation on the performance of a DVR is illustrated. It has been shown that if a dc battery supplies the DVR, the battery ends up supplying the real power demand of the load. Moreover, the injected voltage in this case can be very high. An alternative mode of operation is discussed which uses the rectifier and DVR in cascade to supply the load. In this mode, a large amount of voltage is injected by the DVR, which is completely undesirable. To avoid this problem, the frequency of the load voltage that has to be regulated by the DVR must be synchronized with the system frequency. In this paper, frequency estimation method is used that can accurately estimate two frequencies even when they are very close to each other. The DVR can then be made to operate at the estimated source frequency. PSCAD/EMTDC and MATLAB results are presented to illustrate the above statements Index Terms-- Distribution system, DFT, DVR, Pole shift control, PSCAD/EMTDC.

REQUENCY is an important parameter in power system relaying, power-quality monitoring, and operation and distribution automation. As the fundamental frequency varies dynamically in a power system, the voltage control by custom power devices based on constant frequency modeling is affected significantly. Accurate power fundamental frequency is a necessity to check the state of health of the power index, and a guarantee for accurate quantitative measurement of power parameters, such as voltages, currents, active power, reactive power, and energy. Available frequency estimation techniques, in general, use digitized samples of system voltage. Considering the power system voltage waveform as pure sinusoidal, the time between two zero crossings is an indication of system frequency. However, in reality, the measured signals are available in distorted form and, thus, a number of techniques are available for frequency estimation. Least mean square [1], Kalman filtering [2], [3], Discrete Fourier transform [4], [5], Smart discrete Fourier Transform [6] and Newton method [7], are some of
The authors are with the Department of Electrical Engineering, Indian Institute of Technology Kanpur, Kanpur - 208 016, India E-mail: monika,abhinav,aghosh,ajoshi@iitk.ac.in

I. INTRODUCTION

0-7803-9525-5/06/$20.00 2006 IEEE

tively. The DVR injects three independent single-phase voltages in the distribution feeder such that the load voltage is perfectly regulated at system nominal frequency.

vs

+ Rs

Ls

vt

vi +
il

vl
Critical Load

Feeder

is PCC

quency (fs) is maintained constant at its nominal value. It is imperative that the DVR operating frequency (fp) should be synchronized with the system frequency. The system shown in Fig. 1 is simulated using PSCAD/EMTDC. The system data chosen for the simulation studies are given in Table I. The controller parameters are calculated using MATLAB. It is desired to hold the magnitude of the load voltage, vl to 11 kV (L-L, rms). This implies that peak of the line phase voltage (L-n) should be 9 kV.
TABLE I SYSTEM DATA

+
Vdc

DVR
Fig. 1. Equivalent circuit of a series compensated distribution system.

System quantities Source voltage (vs) System fundamental frequency (fs) Feeder impedance Rs + jLs Balanced RL load Filter parameters (primary side) Desired load voltage

Values 11 kV rms (L-L) 50 Hz 0.605 + j4.84 72.6 + j54.44 Lf = 61.62 H Cf = 2348.8 F 11 kV (L-L) or 9.0 kV peak at nominal frequency

The complete DVR structure is shown in Fig. 2. It contains three H-bridge voltage source converters (VSCs) that are connected to common dc storage. The output of each converter is connected to a single-phase transformer. The transformers not only reduce the voltage requirement of the inverters but also provide isolation between the inverters. A switch frequency LC filter (LfCf) is placed in the transformer primary [12], [13] i.e., inverter side. The secondary of the transformer is directly connected to the distribution feeder. This will constrain the switching frequency harmonics mainly to the primary side of the transformer.

The simulation results are shown in Fig. 3. The dc battery voltage (Vdc) is maintained at a steady state level of 1.5 kV. It can be seen from Fig. 3 (a), that the load voltages, (vl) are balanced sinusoids with a peak of 9 kV as desired, exhibiting a satisfactory system performance.

vt

via

isa

vib +

vic +
Critical Load

Cf

Cf

Vdc

Lf

Lf

Lf
Fig. 3. Various waveforms showing the system performance.

Fig. 2. DVR structure with LC filter.

The basic aim of the DVR in this paper is to regulate the load voltage vl to a reference value through the switching action of the inverter. The technique of pole-shift control [10] is incorporated to determine the switching actions such that the reference voltage is tracked accurately. The controller is designed in discrete-time using pole shifting law in the polynomial domain that radially shifts the open loop system poles towards the origin. A. DVR operation at constant nominal frequency The satisfactory working of the whole system depends upon the system fundamental frequency and the DVR injected voltage frequency, as will be shown in this section. Here, we will study the performance of the DVR when supply voltage fre-

B. DVR operation with DC Battery at varying frequency Let us now investigate the system performance with a constant dc battery of 1.5 kV, when the source frequency is varying. It is assumed that the dc battery is able to supply the entire load thereby holding the dc bus voltage constant. The supply voltage frequency (fs) is taken to be 49 Hz and the PCC voltage frequency (fp) is taken as 50 Hz. The simulation results are shown in Fig. 4. For clarity only a phase waveforms have been shown. It is apparent from Fig. 4 (a) that the load voltage (vla) follows the pre-specified reference voltage with a peak of 9 kV. The injected voltage (via) is shown in Fig. 4 (b). It has two frequency components (49 Hz and 50 Hz), as evident from this figure. Moreover, the peak of via is alarmingly high (up to

20 kV), which is highly undesirable. In this case, the entire average load power that is at nominal frequency has to be supplied by the DVR. This requires expensive dc batteries which may not be feasible. Hence, some alternative arrangement has to be made where the dc link of the DVR is supplied through an uncontrolled rectifier that provides a path for the real power flow, which is discussed next.

the inverters is maintained as the required power is flowing through the rectifier, which is shown in Fig. 6(c). DVR PARAMETERS
System Quantities System Nominal frequency Single-phase transformers DC link voltage Filter parameters (Primary side) Rf (Primary side) Pole shift factor () Values 50 Hz 5 MVA, 0.88 kV/11 kV, with leakage inductance of 10% 0.55 kV Lf = 61.62 H Cf = 2348.8 F 0.015 m 0.70 TABLE II

Fig. 4. System performance with DC battery fed VSI with fs = 49 Hz.

C. Rectifier Supported DVR The single line diagram of a rectifier-supported DVR compensated distribution system is shown in Fig. 5. In the rectifier-supported DVR compensated distribution system, the dc bus of the VSC realizing the DVR is supported from the distribution feeder itself through a three-phase uncontrolled full bridge diode rectifier [11]. The rectifier is supplied by a Y-Y connected transformer that is connected to the PCC. Hence, the DVR can supply real power from the feeder through the dc link.

Fig. 6. System performance with rectifier supported DVR.

However, in this mode, huge amount of voltages are injected by the DVR, as can be seen from Fig. 6(b), which is completely undesirable. III. FREQUENCY ESTIMATION As is clear from the previous section that a small variation in the frequency of the source voltage leads to two frequency components in the injected voltage, whose peak can be extremely high. It is therefore very important for power utilities to somehow measure or estimate the supply frequency and accordingly operate the DVR such that it continuously changes the frequency of the PCC voltage in sympathy with the changes in the source voltage frequency. With the use of fiber optic cables, information regarding the frequency at the source end can be transferred to the DVR end. But this is not a viable option when either the source end is remotely located and is not accessible or when the voltage is being supplied by more than one feeder. When a phase lock loop (PLL), is placed at the PCC bus, it locks on to the voltage of this bus. However, since the DVR controls the load voltage, this is a rather futile process. The operation of the circuit can be explained as follows. Consider the circuit of Fig. 1. Assume that the DVR is an ideal sinusoidal voltage source connected in shunt at the PCC. If fs fp, then this information about the two frequencies is only available from the injected voltage signal. A PLL will be of no help here. Now an algorithm will be discussed to estimate the

Fig. 5. The rectifier-supported DVR compensated distribution system.

A shunt capacitor filter, Cd is also connected in shunt at the PCC to provide a low impedance path for the harmonic currents generated by the rectifier to flow. The frequency of the source voltage is assumed to be 49 Hz. The rectifier transformer and capacitor values are given in Table II. The PCC voltage, the load and the injected voltages are shown in Fig. 6. For clarity only the a-phase waveforms are shown. From Fig. 6(a), it can be seen that the critical load voltages are perfectly regulated to its pre-specified magnitude i.e., 9 kV. Also, the voltage across the dc capacitor supplying

two frequencies present in the injected voltage signal A. Algorithm to estimate frequencies Consider the sampled injected voltage signal given by [5]
vi (k ) = v(kTs ) =

V
n n =1

cos(n 0 kTs + n (kTs )) +

cos n1kTs + ' n (kTs )

(1)

tion for all the results subsequently shown. Fig. 7 (a) shows the a-phase injected voltage for a source frequency of 49 Hz and PCC voltage frequency of 50 Hz. The application of the algorithm estimates the frequencies to be 49.0098 and 50.0100 Hz and the corresponding frequency spectrum has been shown in Fig. 7 (b).
TABLE III ESTIMATED FREQUENCIES FOR DIFFERENT SAMPLING RATES AND NUMBER OF SAMPLES Sampling Rate (ms) 0.5 0.5 0.1 0.2 0.2 0.2 Number of samples 8000 10000 10000 10000 15000 20000 Total estimation time (sec) 4 5 1 2 3 4 Actual Frequencies (Hz) 49.8 50.0 49.8 50.0 49.8 50.0 49.8 50.0 49.8 50.0 49.8 50.0 Estimated frequencies (Hz) 49.7624 50.0125 49.8100 50.0100 49.0098 50.0100 49.5009 50.0100 49.6733 50.0067 49.7550 50.0050

where Ts is the sampling rate, 0 = 2fs and 1 = 2fp are the two frequencies in the injected voltage signal. We can then define a measurement window Vi(k) as a set of N consecutive samples such that
Vi (k ) = [v(k + 1) v(k + 2) LL v(k + N )]
T

(2)

Let us now, define a vector F of length N/2 with elements


F (k ) = k N (2Ts ) 1 2 N where k = 0,1,2 L 1 2

(3)

Given the measurement window, we can estimate the frequencies by Discrete Fourier Transform (DFT). For length N input voltage vector, the DFT is a vector VDFT of length N, with elements
VDFT (k ) =

v(n) e(
n =1

j 2 (k 1)(n 1) N )

(4)
N

This method has been applied on different combinations of source frequency and PCC voltage frequency. The results have been summarized in Table IV.

where k = 1,2, L

The discrete frequency is estimated at the end of the measurement window to provide the most recent estimate of the frequency. The elements of the injected voltage vector on which DFT has been done (VDFT) are sorted in descending order to obtain the indices of the elements with highest magnitude, which actually represent the two frequency components, the source and the injected voltage frequencies. These indices are then used to find the corresponding elements from the vector F, which will give the values of the estimated frequencies. The above algorithm is inherently insensitive to harmonics because of the application of DFT, but requires long measurement windows when frequency deviation from the nominal value is small. The attractive simplicity of this method makes it very easy for implementation. B. Simulation Results and Discussion The algorithm discussed above has been tested in MATLAB. Table III gives the results for various combinations of sampling rate and number of samples. The optimum solution has been achieved with a sampling rate of 0.5 ms and taking 10,000 samples in the measurement window. The reason for this choice is the accuracy with which the two close frequencies are estimated and the total time taken for computation. The term estimated frequency relates to the result of application of proposed technique for assessment of the actual frequency. From Table III, it is evident that the accurate estimates are obtained if a sampling rate of 0.5 ms is chosen along with 10,000 data samples. We shall therefore choose this combina-

Fig. 7. Frequency estimation with sampling rate of 0.5 ms.

The key properties of this method are: 1. The resolution of the estimated frequencies by this method depends not only on the sampling rate of the signal, but also on the number of samples taken. 2. If the two frequencies in the signal are close to each other then with lower sampling rate, the results are better than with higher sampling rate assuming the same number of samples. This can be seen from rows 2-4 in Table III. 3. As expected, longer data sets used for fitting in DFT method produce better immunity to noise and improve the resolution. But the tradeoff is the increase in time taken for sampling as well as for computation, which is undesirable.

From the properties listed above and from Table III, it can be concluded that the resolution of the algorithm F can be given by the following expression

F = 1 (Ts N )

(5)

As can be seen from the Table IV, the proposed method gives us satisfactory results for different combinations of source frequency and PCC voltage frequency.
TABLE IV FREQUENCY ESTIMATION RESULTS Sampling Rate (ms) Number of samples Total estimation time (sec) Actual Frequencies (Hz) 48.0 50.0 49.2 50.0 49.8 50.2 50.2 50.4 49.4 50.1 48.6 49.4 Estimated Frequencies (Hz) 48.0096 50.0100 49.2098 50.0100 49.8100 50.2100 50.2100 50.4101 49.4099 50.2100 48.6097 49.4099

The application of the algorithm in this case accurately estimates the frequency to be 49.6099 Hz, where the samples have been collected for 5 seconds starting from time zero. The corresponding frequency spectrum is shown in Fig. 8 (b). Now, let us consider the case when the peak of supply voltage in all three phases swells from 9kV to 11kV at 2 sec, as shown in Fig. 9(a). The supply frequency is at 49.6 Hz. The application of the algorithm in this particular case estimates the frequency to be 49.6099 Hz for the samples collected from 0-5 seconds. The corresponding frequency spectrum is sown in Fig. 9(b).

0.5

10000

As the frequency variations in a system are not that rapid, the time taken by a dedicated processor for monitoring the supply frequency and maintaining the PCC voltage frequency at that value would be acceptable. The total estimation time taken by this algorithm with a total of 10,000 samples can easily monitor and track the frequency variations. It might appear from Table IV that there is about 0.01 Hz discrepancy between actual and estimated frequencies. However since the source frequency is estimated continuously, this error will not cause the system voltage to fall. C. Sag/Swell in Source Voltage Let us consider the case, when the peak of supply voltage in all three phases drops from 9kV to 8kV at 2 sec, as is shown in Fig. 8(a). The supply frequency is assumed to be 49.6 Hz.

Fig. 9. Frequency estimation under voltage swell condition.

From Fig. 8 and 9, we have seen that the algorithm is robust enough to eliminate transient changes in the voltage. In this case, the data is collected from 0 to 5 s, while the voltage sag/swell occurs at 2 s. However, the change in the magnitude of the voltage has no influence on the frequency estimator since the frequency of the voltage remains unchanged. D. Distorted Source Voltage It is assumed here that the source voltage is a square-wave. In this case, the fundamental source frequency is assumed to be 50.6 Hz. This results in two dominant frequency components (i.e., 50.6 Hz and 50 Hz) with harmonics in the source voltage as shown in Fig. 10(a).

Fig. 8. Frequency estimation under voltage sag condition. Fig. 10. Frequency estimation when there are harmonics in the source voltage.

The implementation of the above algorithm estimates the frequencies as 50.0011 and 50.6101 Hz and the frequency spectrum has been shown in Fig. 10(b). Hence, it is clear from this discussion that the proposed method gives satisfactory results even when the source voltage is not sinusoidal. The same estimation algorithm has been tested for various voltage signals containing number of harmonics and it has been observed that the method is immune to the presence of harmonics. Thus, the method is reliable, robust and easy to implement. IV. CONCLUSION The distribution bus voltage control using a DVR under frequency variations has been discussed in this paper. It has been shown that under source voltage frequency mismatch, the injected voltage signal not only contains two frequencies but its magnitude is also unacceptably high. To solve the problem, an algorithm to estimate the supply frequency from the injected voltage signal has been presented. Once this frequency is obtained, the PCC voltage frequency can be maintained at that value by DVR control. As shown in Section III, the algorithm works satisfactorily even when the deviation from the nominal frequency is very small. Also, in the presence of harmonics, the frequencies are estimated with a high degree of accuracy. V. REFERENCES
[1] [2] A. K. Pradhan, A. Routray, and A. Basak, Power System Frequency Estimation Using Least Mean Square Technique, IEEE Trans. Power Delivery, Vol. 20, No. 3, pp. 1812-1816, July 2005. R. Aghazadeh, H. Lesani, M. Sanaye-Pasand and B. Ganji, New technique for frequency and amplitude estimation of power system signals, IEE Proc.-Gener. Transm. Distrib., Vol. 152, No. 3, pp. 435440, May 2005. K. Kennedy,G. Lightbody and R. Yacamini, Power System harmonic analysis using the Kalman Filter, in Proc. IEEE Power Eng. Soc. General Meeting, Toronto, Vol. 2, pp. 752-757 , July 2003. A. G. Phadke, J. S. Thorp and M. G. Adamiak, A new measurement technique for tracking voltage phasors, local system frequency, and rate of change of frequency, IEEE Trans. Power App. Syst., Vol. PAS-102, No. 5, pp. 10251038, May 1983. M. M. Begovic, Petar M. Djuric, S. Dunlap and A. G. Phadke, Frequency tracking in power networks in the presence of harmonics, IEEE Trans. Power Delivery, Vol. 8, No. 2, pp. 480-486, April 1993. J. Z. Yang and C. W. Liu, A precise calculation of power system frequency and phasor, IEEE Trans. Power Delivery, Vol. 15, No. 2, pp. 494-499, April 2000.

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[11]

[12] [13]

V. V. Terzija, M. B. Djuric, and B. D. Kovacevic, Voltage phasor and local system frequency estimation using newton type algorithm, IEEE Trans. Power Del., Vol. 9, No. 3, pp. 13681374, July 1994. T. S. Sidhu and M. S. Sachdev, An iterative technique for fast and accurate measurement of power system frequency, IEEE Trans. Power Delivery, Vol. 13, No. 1, pp. 109-115, January 1998. T. S. Sidhu, Accurate measurement of power system frequency using a digital signal processing technique, IEEE Trans. Insrum. Meas., Vol. 48, No. 1, pp. 75-81, February 1999. A. Ghosh, A. K. Jindal and A. Joshi, Inverter control using output feedback for power compensating devices, IEEE TENCON 2003 Conf. on Convergent Technologies for Asia-Pacific Region, Vol. 1, pp. 4852, 14-17 Oct. 2003. A. K. Jindal, A. Ghosh, and A. Joshi, Voltage Regulation using Dynamic Voltage Restorer for large frequency Variations, in Proc. IEEE Power Eng. Soc. Gen. Meeting, San Francisco, CA, pp 1780-1786, June 2005. A. Ghosh and G. Ledwich, Structures and control of a dynamic voltage regulator (DVR), in Proc. IEEE Power Eng. Soc. Winter Meeting, Columbus, OH, 2001. A. Ghosh and G. Ledwich, Power Quality Enhancement Using Custom Power Devices, Norwell, MA: Kluwer, 2002.

VI. BIOGRAPHIES
Monika Chawla received the B. Tech. degree in electrical engineering from National Institute of Technology, Kurukshetra, India in 2004. She is currently pursuing M. Tech. degree in electrical engineering at the Indian Institute of Technology (IIT) Kanpur, India. Her areas of interest are embedded systems, custom power devices and power system quality. Abhinav Rajvanshy received the B.E. degree in electrical engineering from MBM engineering college, JNV University, Jodhpur, India in 2004. He is currently pursuing M. Tech. degree in Electrical engineering at the Indian Institute of Technology (IIT) Kanpur, India. His areas of interest are power system quality and power electronics application in power systems. Arindam Ghosh (S80-M83-SM93F06) received the Ph.D. in electrical engineering from University of Calgary, Calgary, AB, Canada in 1983. Currently, he is a Professor of electrical engineering at Indian Institute of Technology (IIT) Kanpur, India. He has held visiting positions in Nanyang Technological University, Singapore, and the University of Queensland, Brisbane, Australia, and Queensland University of Technology, Brisbane. He has also been a Fulbright Scholar at the University of Illinois at UrbanaChampaign, USA. His interests are in control of power systems and power electronic devices. Avinash Joshi received a Ph. D. degree in electrical engineering from the University of Toronto, Toronto, ON, Canada, in 1979. He is a Professor of Electrical Engineering at Indian Institute of Technology (IIT) Kanpur, India. He worked at the General Electric Company (G.E.C.) of India Ltd., Calcutta, India from 1970-1973. His research interests include power electronics, circuits, digital electronics, and microprocessor systems.

[3] [4]

[5] [6]

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