VLSI Technology 12MEVL_E18 Course Plan Lecturer: Mahendra Babu.G.

R Semester : 3 2013-14
Number of Credits: 3 Course Type: Elective Course Synopsis: This course is designed to introduce the basic concepts of VLSI technology and provide an understanding of the VLSI manufacturing process of different methods. The course also helps the students to develop the skills in VLSI technology for various applications.

Course Outcomes (C.O)

C.O.1: Ability to understand the initial processes crystal growth, wafer preparation etc in IC manufacturing. C.O.2: Ability to interpret, discuss and apply deposition, duffusion, Ion implementation and metallization. C.O.3: Ability to interpret, discuss and apply process simulation and process integration. C.O.4: Ability to interpret, discuss and apply concepts of analytical, assembly techniques and packaging of VLSI devices.

Course Syllabus
UNIT I CRYSTAL GROWTH, WAFER PREPARATION, EPITAXY AND OXIDATION [Lecture 1, 2 & 3] Electronic Grade Silicon, Czochralski crystal growing, Silicon Shaping, processing consideration, Vapor phase Epitaxy, Molecular Beam Epitaxy, Silicon on Insulators, Epitaxial Evaluation, Growth Mechanism and kinetics, Thin Oxides, Oxidation Techniques and Systems, Oxide properties, Redistribution of Dopants at interface, Oxidation of Poly Silicon, Oxidation inducted Defects. UNIT II LITHOGRAPHY AND RELATIVE PLASMA ETCHING [Lecture 4] Optical Lithography, Electron Lithography, X-Ray Lithography, Ion Lithography, Plasma properties, Feature Size control and Anisotropic Etch mechanism, relative Plasma Etching techniques and Equipments, UNIT III DEPOSITION, DIFFUSION, ION IMPLEMENTATION AND METALISATION [Lecture 5 & 6] Deposition process, Polysilicon, plasma assisted Deposition, Models of Diffusion in Solids, Flicks one dimensional Diffusion Equation Atomic Diffusion Mechanism

Measurement techniques Range theory- Implant equipment. Annealing Shallow junction High energy implantation Physical vapour deposition Patterning.

UNIT IV PROCESS SIMULATION AND VLSI PROCESS INTEGRATION [Lecture 7 & 8] Ion implantation Diffusion and oxidation Epitaxy Lithography Etching and Deposition- NMOS IC Technology CMOS IC Technology MOS Memory IC technology - Bipolar IC Technology IC Fabrication. UNIT V ANALYTICAL, ASSEMBLY TECHNIQUES AND PACKAGING OF VLSI DEVICES [Lecture 9] Analytical Beams Beams Specimen interactions - Chemical methods Package types banking design consideration VLSI assembly technology Package fabrication technology.

WEE K 1

LECTURE DATES

LECTURE

TEST / EXAM

ASSIGN REMARKS

17,19,20,21 Lecture 1: Electronic Grade Silicon, CIA T1 Q1 June Czochralski crystal growing, Silicon ESE Q1 Shaping, processing consideration, Vapor phase Epitaxy 24,26,27,28 Lecture 2: Molecular Beam Epitaxy, CIA T1 Q1 June Silicon on Insulators, Epitaxial ESE Q1 Evaluation, Growth Mechanism and kinetics 1,3,4,5 July Lecture 3: Thin Oxides, Oxidation CIA T1 Q2 Seminar Techniques and Systems, Oxide ESE Q1 properties, Redistribution of Dopants at interface 8,10,11,12 Lecture 3: Oxidation of Poly Silicon, CIA T 1 Q2 Seminar ESE Q1 July Oxidation inducted Defects 15,17,18,19 Lecture 4: Optical Lithography, CIA T1 Q3 Seminar July Electron Lithography, X-Ray ESE Q2 Lithography, Ion Lithography, Plasma properties 22,24,25,26 Lecture 4: Feature Size control and CIA T1 Q4 Seminar July Anisotropic Etch mechanism, ESE Q2 relative Plasma Etching techniques

Wednesday Student Seminar

and Equipments 7 29,31 July Lecture 5: Deposition process, CIA T1 Q5 Seminar Polysilicon, plasma assisted ESE Q3 1,2 Aug Deposition, Models of Diffusion in Solids, Flicks one dimensional Diffusion Equation 5,7,8,9 Aug Lecture 5: Atomic Diffusion CIA T1 Q5 Seminar Mechanism Measurement ESE Q3 techniques Range theory- Implant equipment. 19,21,22,23 Topics: Week 1 to Week 8 Aug TEST I

11

2,4,5,6 Sep Lecture 6: Annealing Shallow CIA T2 Q1 Seminar Wednesday junction High energy implantation ESE Q3 Student Physical vapour deposition Seminar Patterning. PBL: 9,11,12,13 Lecture 7: Ion implantation CIA T2 Q2 Seminar Problem Based Sep Diffusion and oxidation Epitaxy ESE Q4 Learning Lithography Etching and Deposition

12

16,18,19,20 Lecture 7: NMOS IC Technology CIA T2 Q3 Seminar Sep CMOS IC Technology MOS Memory ESE Q4 IC technology 23,25,26,27 Lecture 8: Bipolar IC Technology CIA T2 Q3 Seminar ESE Q4 Sep IC Fabrication. 30 Sep, 2,3,4 Lecture 9: Analytical Beams Oct Beams Specimen interactions Chemical methods CIA T2 Q4 Seminar - ESE Q5

13

14

15

7,9,10,11 OctLecture 9: Package types banking CIA T2 Q5 Seminar design consideration VLSI ESE Q5 assembly technology Package fabrication technology. 21,23,24,25 Revision Clinic (Unit 1 to 5) Oct 28,29,30 Oct Topics: Week 11 to Week 16 TEST II

16

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REFERENCE BOOKS
1. S.M.Sze, 1998, VLSI Technology, Mc.Graw.Hill, New Delhi. 2. Amar mukherjee, 2000, Introduction to NMOS and CMOS VLSI System design, Prentice Hall India 3. James D Plummer, Michael D. Deal, Peter B.Griffin, 2000, Silicon VLSI Technology: fundamentals practice and Modeling, Prentice Hall India 4. Wai Kai Chen, 2003, VLSI Technology, CRC Press

CONTINOUS INTERNAL ASSESSMENT

Test 1 & 2 Seminar (assgn) Attendance : : 30 marks 5 marks : 5 marks : 60 marks 100 marks

SEMESTER EXAMS
Total

SEMINAR (ASSIGNMENT)
Each student will have to give a seminar presentation on any one of the following topics according to roll no. in the form of PPT presentation for 20 minutes (three students per week) Seminar Evaluation (communication skill: 2 marks; presentation: 2 marks; attitude: 1 mark) Seminar Topics 1. Introduction to VLSI manufacturing process 2. Silicon on Insulators 3. Epitaxial Evaluation 4. Growth Mechanism and kinetics, 5. Oxidation inducted Defects 6. Feature Size control and Anisotropic Etch mechanism 7. Relative Plasma Etching techniques and Equipments 8. Measurement techniques Range theory9. Implant equipment. 10.Physical vapour deposition Patterning. 11.MOS Memory IC technology 12.Bipolar IC Technology 13.IC Fabrication 14.Banking design consideration 15.VLSI assembly technology 16.Package fabrication technology