Invited Talk QDS2000 : Special Edition of Japanese Journal of Applied Physics

Single Photon Detection with a Quantum Dot Transistor

Andrew J Shields,1 Martin P OSullivan,1,2 Ian Farrer,2 David A Ritchie,2 Mark L Leadbeater,1 Nalin K Patel,1 Richard A Hogg, 1 Carl E Norman, 1 Neil J Curson2 and Michael Pepper1,2
1

Toshiba Research Europe Limited, 260 Cambridge Science Park, Milton Road, Cambridge CB4 0WE. U.K.
2

Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge CB3 0HE. U.K.

We propose and demonstrate a type of GaAs/AlGaAs modulation-doped field effect transistor (FET) which is sensitive to single photons. The FET contains a layer of InAs quantum dots formed using an in-situ, self-organising method, adjacent to the channel and separated from it by a thin AlGaAs barrier. Capture of a single photo-excited carrier by a quantum dot leads to a sizeable change in the source drain current through the transistor, allowing the detection of a single photon. We show this is because the mobility of the electron channel is extremely sensitive to the charge trapped in the dots. This discovery may allow a new type of single photon detector to be developed which does not rely upon avalanche processes.

Keywords : quantum dot, single photon detector, photo-detector, field effect transistor, semiconductor. * email : andrew.shields@crl.toshiba.co.uk

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1. Introduction
The other papers in this volume demonstrate the wide range of optoelectronic applications envisaged for quantum dots, which would benefit from their unique properties. For instance, as the gain medium in diode lasers, where the discrete density of states in 0D is expected to lead to reduced threshold current and temperature sensitivity, due to the removal of the dark states lying above the lasing energy in a conventional quantum well laser which make no contribution to the lasing gain.1,2) Quantum dots can be used to make not just better optical devices, but also those with a totally new functionality. Another application is as an optical data storage medium, where bits of information are stored as electrons or holes confined within the dots. 3-7) One advantage of these is that since the information is typically stored as a single (or few) electron, these devices should require a very low switching energy. The charge to be stored in the dots can be written by optical illumination, which, by wavelength selective writing or local probe techniques, can approach the situation where each quantum dot carries a bit of information. Such quantum dot optical memory devices could potentially achieve ultra-dense storage capacities of Terabit/in2 . This would require a scheme to detect the presence of photo-excited charge in a single (or just a few) quantum dots. The results presented here demonstrate that using a transistor structure it is indeed possible to detect the presence of a single photo-excited carrier in a single quantum dot. Progress on the fabrication of quantum dots using self-organising growth techniques has brought the realisation of these devices a step nearer. One such technique uses the Stranskii-Krastinov growth mode for semiconductors on a substrate with different lattice constant, for instance InAs on GaAs. The InAs grows initially on the GaAs as a highlystrained two-dimensional sheet, called the wetting layer. However, beyond a critical thickness of just a few monolayers the InAs self-organises, in order to minimise the strain, into tiny islands which sit on top of the wetting layer. This method is particularly attractive for fabricating optical devices because t i produces a high density of dots, which have nanometer dimensions and which can be readily incorporated into an epitaxial structure.

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We demonstrate here another potential application of quantum dots for the detection of single, visible or near-infra red photons. The device structure consists of a modulation doped field effect transistor (FET) containing a layer of self-organised quantum dots separated from the conducting channel by a thin barrier layer. We show that the Coulomb interaction resulting from the capture of a single photo-excited carrier by a quantum dot, produces a detectable change in the source-drain resistance of the transistor. This effect makes the device sensitive to individual photons in the incident light. The device is fundamentally different from other types of single photon detector such as the photomultiplier tube (PMT) or the avalanche photo-diode (APD), which rely upon an avalanche multiplication process to produce the gain required to measure a single photon. 8,9) The principles might be extended to facilitate the detection of mid infra-red photons, relying on intraband processes.10) Recently inter-Landau level processes in quantum dots formed using surface gates in a high magnetic field have been used to detect single far infra red photons.11) Single photon detection is required for high sensitivity measurements of very low light levels. By counting the number of incident photons it is possible to have a system limited by shot noise, in which amplifier noise is effectively eliminated. This is useful for a wide range of applications in areas such as medical imaging and diagnosis, chemical analysis, laser scanning, laser ranging, materials characterization and scientific research. There is also a great deal of interest in using single photons for quantum information processing and communication. In the following sections we first introduce the concept of the quantum dot photon detector. Following this we discuss the device structure in Section 3 and show results measured on devices with both a large (Sect 4) and small (Sect 5) active area. In Section 6, we present a model for the conduction in the device and finally discuss the outlook for its development as a useful device. 2. Quantum Dot Single Photon Detector: Device Concept Figure 1 shows a schematic of the device structure. It consists of a GaAs/Al0.33Ga0.67As modulation doped FET containing a layer of InAs quantum dots separated from the two dimensional electron gas (2DEG) in the GaAs channel by a thin Al0.33Ga0.67As barrier.12) The doped Al0.33Ga0.67As barrier layers provide excess carriers to the GaAs quantum well and the quantum dot layer. Since the conduction band level in the quantum dots lies to
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lower energy than that in GaAs, as shown schematically in Fig.2, each dot traps several excess electrons. The negative charge trapped in the dots raises the local electron potential and repels electrons in the neighbouring quantum well layer. As a consequence the energy of the conduction and valance band edges in the quantum well layer show strong spatial variations, shown schematically in Fig. 3. Maxima form in the potential in the quantum well adjacent to each dot, where the excess electron density falls to zero. One can picture the quantum dots acting as negatively charged nano-gates, which locally deplete the 2DEG. The presence of these electron-less regions in the 2DEG adjacent to each quantum dot, results in a relatively low electron mobility. In operation the 2DEG density is set to a value for which the source-drain conductivity is low. Under these conditions, the channel current is extremely sensitive to the charge trapped in the dots. Thus capture of even a single photo-excited charge can produce a detectable change in the source-drain conductance. Absorption of a photon inside the semiconductor produces an electron-hole pair. One of these carriers can be captured by the quantum dot, thereby altering the height of the potential island in the adjacent 2DEG layer. For the example shown, the photo-excited hole will be attracted to the negatively charged quantum dot. Capture of a hole by the dot will reduce its negative potential and increase the local electron density in the 2DEG layer, thereby increasing the 2DEG conductance. Thus if the active area of the device, i.e. the area containing charged quantum dots, is sufficiently small, it could be possible to detect a change in the 2DEG conductance due to capture of a single photo-excited carrier by a dot. 3. Layer Structure and Fabrication The layers were grown by molecular beam epitaxy on a (100)-oriented GaAs substrate. All the results shown here were recorded on a wafer consisting of GaAs buffer, 250 nm Al0.33Ga0.67As, 40 nm (Si doped 1018 cm-3) Al0.33Ga0.67As, 40 nm Al0.33Ga0.67As, 20 nm GaAs channel, 10 nm Al0.33Ga0.67As, 2 nm GaAs, a thin InAs layer which forms the quantum dots, 60 nm Al0.33Ga0.67As, 30 nm Al0.33Ga0.67As (Si doped 1018 cm-3 ), 10 nm GaAs. Most of the wafer was grown at a nominal growth temperature of 590 oC. However, the quantum dot layer and 10 nm of the Al0.33Ga0.67As capping the dot layer

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were grown at 530 oC, since at higher temperatures the InAs desorbs. structures with closely spaced dot and 2DEG layers gave similar results.

Other layer

Photoluminescence spectra taken on the wafer display the typical signature of a high quality InAs quantum dot layer, with several peaks between 1.1 and 1.3 eV due to recombination of electrons and holes in different states confined in the dots. The wafers were formed into FET structures using standard photolithography. E-beam lithography was also used to define some of the smaller gates. The single photon detection experiments were performed on structures with a small area gate. A mesa was etched using photolithography to confine the conducting channel to a narrow bar measuring 2 x 20 m. Source and drain NiAuGe Ohmic contacts (not shown in Fig.1) were made to the electron channel on either end of the bar. A semi-transparent Schottky contact, consisting of a 7 nm thick layer of NiCr, was defined across the centre of the bar using e-beam lithography. Structures were prepared with different gate lengths (along the mesa) of between 1 and 10 m. Larger Hall bars, for which the gate measured 1.5 x 1.5 mm, were also fabricated for comparison. Figure 4 shows an SEM image of one of the small area devices, for which the mesa (running from top to bottom) has a nominal width of 2 m and the gate has a nominal length of 1 m. The SEM image reveals the true width of the top and bottom of the mesa to be 0.8 and 1.55 m, respectively, and the g ate length to be 0.76 m. We can thus expect the GaAs channel of the FET to measure approximately 1.35 x 0.76 m. The electrical measurements were made using standard low frequency ac lock-in techniques. Both two and four terminal measurements of the conductance and resistance were made. Most of the data presented here was recorded for a sample temperature of 4 K, unless otherwise stated. The devices were illuminated using a red LED with an emission peak at 650 nm. 4. Characterisation of Large Area Device Figure 5 displays the bistability observed in the source-drain conductance of the large area device. This curve was generated by strongly illuminating the device with an LED while the gate bias was maintained at 0.5 V and then sweeping the g ate bias from 0.5 to +0.82 V and then back to 0.5 V. On the forward sweep, the device follows the higher
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conductance curve, while on the return, it follows the lower one. Thus at each gate bias there are two possible values of the source-drain conductance, which can differ by over an order of magnitude. It is important to realise that this curve was recorded after the initial illumination of the device following cooldown, i.e. after all the electrons trapped on DX centres had been liberated. The curve can be reproduced over many cycles of illumination and forward gate bias. The conductance of this device is strongly affected by the layer of quantum dots. The negatively charged dots raise the local electron potential, as shown schematically in Fig. 3, and thereby repel electrons in the adjacent 2DEG layer. This effect is sufficiently strong to produce electronless region next to each dot. As a consequence the mobility, and thus the conductance, of the 2DEG is relatively low. Under illumination photo-excited holes are swept toward the negatively charged dots where they recombine with one of the electrons trapped there. This has the result of lowering the potential surrounding the dot and raising the 2DEG density locality. We have shown previously7) that illumination can produce a large increase in the mobility of the 2DEG. This is the origin of the photo-induced increase in the 2DEG conductance after illumination. Applying a forward gate bias, resets the source-drain conductance to its value prior to illumination. This resetting seems to be associated with the small leakage current which flows between the gate and the 2DEG under forward bias. We suppose the dots are able to recharge with electrons when a current flows between the gate and 2DEG, which returns the 2DEG to its low mobility state. Figure 6 plots the rise in the source-drain resistance under weak illumination. The eleven curves shown here are recorded with different LED currents of between 0 and 10 A, in steps of 1 A. Using a silicon photodiode we verified that the LED output is roughly linear with drive current over this range. The fact that the detector shows a response to even a few microamps of LED drive current, shows the device is very sensitive to light. Initially there is a gradual rise in the conductance with time, which is discussed in more detail later. This is followed by an approximately linear change in the conductance with time, after which the conductance saturates.

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Each curve was recorded at a fixed gate bias of 0.36 V. Prior to each measurement sweep, the gate bias was set to +0.8 V, so as to reset the charge state of the dots. It can be seen that the rate of change of the conductance increases with the LED current. This is because the rate at which the dots are discharged increases with the photon flux. Figure 7 plots the rise in the conductance with time under a constant LED illumination (4 A) measured at different gate biases. Prior to each scan the device was reset by setting the gate bias to +0.8V. The initial and final conductance values are both higher at the less negative gate biases. Notice that for the most negative gate biases, there is a considerable time delay before the rise in the source-drain conductance. This delay in the rise of the source-drain conductance is again apparent in Fig. 8, which plots the conductance versus time recorded after different reset gate biases of between 0.0 and +0.9 V, in steps of 0.1 V. For this data set, the same measurement bias of 0.36 V was used for each scan, while the LED current was fixed as 4 A. It can be seen that, although the rise in the conductance is quite similar for each scan, there is an increasing delay before the rise with increasing reset gate bias. 5. Small Area Device Figure 9 plots the gate-drain bias dependence of the source-drain conductance of the FET with a nominally 2 m wide mesa and 1 m long gate. Following strong illumination of the device with a red LED for a few seconds, the conductance follows the upper curve in Fig. 9. After the gate voltage has been swept to +0.8 V, the conductance follows the lower conductance curve on the reverse sweep. Thus over a wide range of gate biases there are two possible values for the conductance, set by illumination and applied gate bias. Notice that the small area device shows the same qualitative behaviour as the large area one. However, the maximum conductance of the small area device is considerably lower than that of the large area one. Furthermore the range of voltages over which bistability is observed is much broader for the small area device. The relatively high resistance observed for the small device under forward bias derives from regions of the mesa outside the gate. The central region of the mesa consists of a long thin bar of 2 m width and 20 m length and the gate runs over the centre of this. Thus there are two 2 x ~9.5 m regions of the mesa in series with the 2 x 1 m gated region. Since the 2 x 9.5 m
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regions are ungated, we can expect the series resistance to be around 20 kOhms, in rough agreement with that observed. Decreasing the gate bias reduces the density of the 2DEG under the gate area. Below some critical density electrons localise in potential minima within the channel leading to sharp decrease in the 2DEG mobility and thus conductivity. In this structure the mobility of the 2DEG layer in this structure is limited by the potential induced by the nearby negatively-charged quantum dot layer. Illumination creates electron-hole pairs within the structure. Holes photo-excited in the quantum well or barrier layers are swept into the negatively-charged dots, where they recombine with the excess electrons trapped there. Thus illumination reduces the number of electrons trapped within the dots, as evidenced by magneto-transport measurements made on large gate area devices. This has the effect of smoothing the 2DEG potential, allowing conduction to a lower 2DEG density, explaining why the conductance edge shifts to a more negative gate bias (i.e. lower 2DEG density) after illumination. The dots are recharged under forward gate bias (the reset gate bias), thus returning the conduction edge to ~0 V. The solid line in Fig. 9 was recorded by illuminating the device and sweeping the gate bias from 0.5 to +0.8 V and back. The dashed line, on the other hand, shows the curve formed by sweeping the bias from 0.5 to 0.0 V and back. Notice that in the latter case, the voltage region over which the bistability extends is much narrower. Increasing the value of the reset gate bias, gradually widens the width of the bistable region. This suggests that the number of dots charged during the reset increases with the value of the reset bias. When more dots are recharged, the potential in the plane of the 2DEG becomes rougher and conduction only becomes possible at a higher 2DEG density. Figure 10 shows experimental data taken at 4 K on our prototype device, demonstrating detection of single photons. The curve plots the change in source-drain conductance with time under very weak illumination by a LED passing a current of 2 A. For this current, the photon flux incident on the gate was estimated, by averaging the photocurrent generated in a calibrated large-area photodiode, to be ~4 photons/sec. Prior to illumination, the gate is biased at 0.76 V, so as to recharge dots under the gate region with electrons, resulting in a low source-drain conductance initially. Notice that the conductance rises in a series of discrete steps. This is in sharp contrast to the behaviour seen for the large area device (Figure 6) where the conductance rose
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smoothly under illumination. Devices with longer gates of between 2 and 10 m showed similar behaviour to that in Fig. 10, but with smaller jumps in the conductance, consistent with a larger number of dots under the gate. Other FET wafers with a thin barrier between the 2DEG and dot layers also displayed step increases in conductance under weak illumination. The steps observed for the small area device are the response to the quanta of the incident light, i.e. single photons. The gated area of the nominally 2x1 m device, actually measuring 1.35x0.76 m, contains ~100 dots for a typical density of 1010 cm-2. However, the active width of the mesa could be somewhat narrower than 1.35 m, because of surface pinning at the mesa edges. Since the source-drain conductance is controlled by a small number of charged dots, it is possible to resolve a signal due to the photo-induced discharge of individual dots. Figure 11 plots the average rate of photon events measured by the device as a function of the average illumination intensity, varied by changing the LED current. The vertical error bars indicate the shot noise in the measured photon rate, determined assuming a light source displaying Poissonian statistics. The fact that the error seems to be overestimated in Figure 11, may indicate that the noise is in-fact sub-Poissonian.12) The figure demonstrates that the photon detection rate increases approximately linearly with the incident photon flux, demonstrating that the steps in the conductivity are triggered by single photon events. From the best fit (solid line) to the data, we determine the quantum efficiency for the device under these measurement conditions to be 0.9%. This value is limited by the fact that most of the photons detected by the device at this illumination wavelength are absorbed in the thin quantum well and dot layers. However, by introducing thicker absorbing layers into the device, and replacing the semi-reflective NiCr gate layer with a doped semiconductor layer, we can expect a large improvement in quantum efficiency. Similar behaviour is also observed with the sample maintained at 77 K in a dewar of liquid Nitrogen. Figure 12 plots the source-drain resistance of the device under continuous weak illumination. Notice that the resistance of the device is again seen to fall in a series of steps, each one associated with detection of a single photon. Figure 13 plots the rise in the conductance of the small area device under weak illumination, measured with different gate biases. For each scan, the device was first
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reset by setting the gate to +0.7 V, and the gate was then maintained at different values between 0.2 and 0.0 V. As can be seen in Figure 9 these biases are in the bistable region. During each measurement the device was illuminated by the LED passing a tiny current of 4 A. For 0.0 V, which is just on the non-conducting side of the conduction threshold of the reset state, illumination produces an immediate rise in the conductance. At more negative biases, however, which lie away from the conduction threshold, there is a considerable delay before the conductance begins to rise. Although similar behaviour was observed for the large area structure (Figure 7), it is much more marked for the small area device. Figure 14 plots the rise in the conductance under weak illumination, after the device has been reset at different gate biases between 0.70 and 0.78 V. For each curve the measurement gate bias was fixed as 0.0 V and the LED current as 4 A. It can be seen that there is an increasing delay before the conductance rises, after application of a higher reset bias. This trend is again similar to that observed for the large area device, except the conductance again rises in steps associated with the photo-induced discharge of individual dots. The curves in Figure 15 are again recorded after different reset biases, but this time for a measurement gate bias of 0.25 V. This measurement bias is towards the more negative voltage side of the bistability region in Fig.9 and therefore requires a smaller reset bias to block conduction. These curves show the same qualitative behaviour to those in Fig.14; again there is an increasing delay before the conductance begins to rise after higher reset biases. For a large reset bias (e.g. 0.8 V) and a negative measurement bias (e.g. 0.25V) it can take 1000s of seconds before the conductance begins to rise at this illumination intensity.

6. Discussion
The fact that we observe a delay before the channel starts to conduct conductance indicates that a number of the dots must be discharged before the conductance reaches a measureable value. Applying a higher reset gate bias, charges up a larger number of quantum dots. As a result a greater number of dots have to be optically discharged before the conductance rises to a particular value. This explains why increasing the reset gate

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bias in Figure 8 for the large area device, or Figures 14 and 15 for the small area one, results in an increased delay before the rise in the conductance. Reducing the measurement gate bias, lowers the electron density in the channel. Conductance at a lower electron density requires a smoother conduction band profile in the channel in order to avoid localization of the electrons in the potential minima. This explains why the dead time is longer at the more negative measurement biases in Figures 7 (large area) and 13 (small area). The operating voltages of the single photon detector must be chosen carefully in order to achieve the maximum quantum efficiency. As discussed above, if the reset bias is too large, or the measurement bias too low, the system displays a dead time over which it is not sensitive to photons. At very low conductance, conditions under which the system is close to the insulating state, photons which discharge dots away from the conducting paths will not contribute a signal and will therefore not be detected. The best situation is at higher conductance values at which the most photons will be detected. gate bias. As we have shown, these conditions can be created with appropriate choice of reset and measurement

7. Future Prospects
We have demonstrated here that a field effect transistor containing a layer of selforganised quantum dots can detect individual photons. A number of challenges remain before the structure can be translated into a device which is useful for photon detection. The photon count rates measured here are limited by the lock-in detection system used to make the measurements. However, as the device is based upon a short gate FET, its intrinsic response time could be designed to be very short, allowing much higher count rates to be detected. The quantum efficiency of the device can also be greatly increased by using a doped semiconductor, rather than the metal, layer on the front surface, and by increasing the thickness of the absorbing layer. If these challenges can be overcome, the

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quantum dot field effect transistor could provide a cheap, robust, low voltage solution for single photon detection.

Acknowledgements: We thank Dr S. Egusa and C. L. Foden for interesting discussions and K. Cooper for processing the samples. MPO thanks the EPSRC (UK) and TREL for funding under a CASE award.

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References
1. Y. Arakawa and H. Sakaki, Appl. Phys. Lett. 40, 939 (1982) 2. M. Asada, Y. Miyamoto and Y. Suematsu, IEEE J. Quantum Electron. QE-22, 1915 (1986) 3. S. Muto, Jpn. J. Appl. Phys. 34, L210 (1995). 4. K. Imamura, Y. Sugiyama, Y. Nakata, S. Muto and N. Yokoyama, Jpn. J. Appl. Phys. 34, L1445 (1995). 5. G. Yusa and H. Sakaki, Appl. Phys. Lett. 70, 345 (1997). 6. J.J. Finley, M. Skalitz, M. Arzberger, A. Zrenner, G. Bohm and G. Abstreiter, Appl. Phys. Lett. 73, 2618 (1998). 7. A.J. Shields, M.P. OSullivan, I. Farrer, D.A. Ritchie, K. Cooper, C.L. Foden and M. Pepper, Appl. Phys. Lett. 74, 735 (1999). 8. A. Lacaita, S. Cova, A. Spinelli and F. Zappa, Appl. Phys. Lett. 62, 606 (1993) 9. J.Kim, Y.Yamamoto and H.H. Hogue, Appl. Phys. Lett. 70, 2852 (1997) 10. S.-W. Lee, K. Hirakawa, and Y. Shimada, Appl. Phys. Lett. 75, 1428 (1999). 11. S. Komiyama, O. Astafiev, V. Antonov, T. Kutsuwa and H. Hirai, Nature 403, 405 (2000) 12. A.J. Shields, M.P. OSullivan, I. Farrer, D.A. Ritchie, R. A. Hogg, M. L. Leadbeater, C. E. Norman and M. Pepper, Appl. Phys. Lett. 76, 3673 (2000). 13. M. Kobayashi, M. Kohno, Y. Kadoya, M. Yamanishi, J. Abe, and T. Hirano, Appl. Phys. Lett. 72, 284 (1998).

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Figures
Fig. 1 : Cross-sectional view of quantum dot FET structure with a small area Schottky gate. Fig. 2 : Schematic of the conduction and valance band edge along the growth direction of the device. Fig. 3 : Schematic in-plane variation of the conduction and valance band profiles in the 2DEG layer of the device. Local maxima form in the conduction band of the 2DEG layer, due to the negatively charged dots in an adjacent layer. The 2DEG current must flow around these maxima, leading to a relatively low conductance. An absorbed photon produces an electron-hole pair. The photo-excited hole is captured by a dot, thereby lowering its potential, allowing a larger 2DEG current to flow. Fig. 4 : SEM image of device with a nominally 2 m wide mesa (running from top of picture to bottom) and a 1 m long gate. Fig. 5 : Conductance bistability of a large area device. This curve was recorded by illuminating the device and sweeping the gate bias from 0.5 V to +0.82 V and back. The conductance follows the upper curve on the forward sweep and the lower one on the reverse. Fig. 6 : Conductivity versus time under different illumination intensities, corresponding to LED currents of 0 (lowest) to 10 A (uppermost curve) in steps of 1 A. Each curve was measured at a gate bias of 0.36 V, after applying a reset gate bias of +0.8 V. Fig. 7 : Conductance (log scale) versus time under weak illumination for different measurement gate biases between 0.04 (uppermost) and 0.40 V (lowest) in steps of 0.04 V. Fig. 8 : Conductance (log scale) versus time under weak illumination measured for a gate bias of 0.36 V after different reset gate biases of +0.1 (uppermost) to +0.9 V (lowest) in steps of 0.1 V. Fig. 9 : Conductance (log scale) bistability of the 2 x 1 m gate device. The solid curve was generated by illumination of the device at 0.5 V, followed by sweeping the gate bias from 0.5 V to +0.8 V and back to 0.5 V. The dashed line was generated in a similar manner, but sweeping the gate bias to 0 V and back. Fig. 10 : Conductivity versus time of the small area device under weak LED illumination. The upper curve is the time-differential of the conductance. Fig. 11 : Photon detection rate as a function of the LED current. Fig. 12 : Single photon detection at 77 K. The figure plots the photo-induced drop in the source-drain resistance measured with the device in a dewar of liquid Nitrogen under weak illumination. Fig. 13 : Time dependence of the conductance (log scale) recorded under weak illumination at different measurement gate biases between 0.0 and 0.2 V, after reset at +0.7 V. Fig. 14 : Conductance (log scale) versus time under weak illumination intensities, measured for a gate bias of 0V, after different reset biases between +0.7 and +0.78 V. Fig. 15 : Conductance versus time under weak illumination intensities measured for a gate bias of 0.25 V, after different reset biases between 0.0 and +0.35 V.

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