FAN7382 High-And Low-Side Gate Driver: Features Description

FAN7382 High- and Low-Side Gate Driver
February 2007

Features
Floating Channels Designed for Bootstrap Operation
Description
The FAN7382, a monolithic high and low side gate-drive IC, can drive MOSFETs and IGBTs that operate up to +600V. Fairchilds high-voltage process and commonmode noise canceling technique provides stable operation of the high-side driver under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The input logic level is compatible with standard TTL-series logic gates. UVLO circuits for both channels prevent malfunction when VCC or VBS is lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for fluorescent lamp ballasts, PDP scan drivers, motor controls, etc.
to +600V Typically 350mA/650mA Sourcing/Sinking Current Driving Capability for Both Channels Common-Mode dv/dt Noise Canceling Circuit Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VCC=VBS=15V VCC & VBS Supply Range from 10V to 20V UVLO Functions for Both Channels TTL Compatible Input Logic Threshold Levels Matched Propagation Delay Below 50nsec Output In-phase with Input Signal
Applications
PDP Scan Driver Fluorescent Lamp Ballast SMPS Motor Driver
8-SOP
8-DIP
14-SOP
Ordering Information
Part Number
FAN7382N FAN7382M
(1)
Package
8-DIP 8-SOP 14-SOP
Pb-Free
Operating Temperature Range
Packing Method
Tube Tube
FAN7382MX(1) FAN7382M1(1) FAN7382M1X Note:

(1)
Yes
-40C ~ 125C
Tape & Reel Tube Tape & Reel
1. These devices passed wave soldering test by JESD22A-111.
2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8
www.fairchildsemi.com
Typical Application Circuit
15V
RBOOT DBOOT
600V
1 VCC 2
VB 8 Q1 HO 7 CBOOT VS 6 Q2 R3 R1 R2
HIN LIN
C1
HIN
3 LIN 4 COM
LO 5
Load
R4
FAN7382 Rev.05
Figure 1. Application Circuit for Half-Bridge
Internal Block Diagram
8
UVLO
VB
DRIVER
PULSE GENERATOR
HO
HIN
2
500K
HS(ON/OFF)
NOISE CANCELLER
R S
R Q
VS
UVLO
1 DRIVER
VCC
LS(ON/OFF)
LIN
3
500K
DELAY
LO
COM
FAN7382 Rev.04
Figure 2. Functional Block Diagram
2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 2
Pin Assignments
FAN7382N FAN7382M VCC HIN LIN COM

1 2 3 4 8 7 6 5
FAN7382M1
VB HO VS LO
VCC HIN LIN NC NC
1 2 3 4 5 6 7
14 13 12 11 10 9 8
NC VB HO VS NC NC NC
FAN7382 Rev.05
COM LO
FAN7382 Rev.01
Figure 3. Pin Configuration (Top View)
Pin Definitions
Name
VCC HIN LIN COM LO VS HO VB Low-Side Supply Voltage Logic Input for High-Side Gate Driver Output Logic Input for Low-Side Gate Driver Output Logic Ground and Low-Side Driver Return Low-Side Driver Output High-Voltage Floating Supply Return High-Side Driver Output High-Side Floating Supply
Description
Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VS VB VHO VCC VLO VIN COM dVS/dt PD(2)(3)(4)
Characteristics
High-side offset voltage High-side floating supply voltage High-side floating output voltage HO Low-side and logic fixed supply voltage Low-side output voltage LO Logic input voltage (HIN, LIN) Logic ground Allowable offset voltage slew rate
Min.
VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 VCC-25 8-SOP
Max.
VB+0.3 625 VB+0.3 25 VCC+0.3 VCC+0.3 VCC+0.3 50 0.625 1.0 1.2 200 110 100 150 150
Unit
V/ns W
Power dissipation
14-SOP 8-DIP 8-SOP
JA TJ TSTG Notes:
Thermal resistance, junction-to-ambient Junction temperature Storage temperature
14-SOP 8-DIP
C/W C C
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances.
Recommended Operating Ratings

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VB VS VHO VLO VIN VCC TA
Parameter
High-side floating supply voltage High-side floating supply offset voltage High-side (HO) output voltage Low-side (LO) output voltage Logic input voltage (HIN, LIN) Low-side supply voltage Ambient temperature
Min.
VS+10 6-VCC VS COM COM 10 -40
Max.
VS+20 600 VB VCC VCC 20 125
Unit
Electrical Characteristics
VBIAS (VCC, VBS)=15.0V, TA = 25C, unless otherwise specified. The VIN and IIN parameters are referenced to COM. The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO.
Symbol
VCCUV+ VBSUV+ VCCUVVBSUV-
Characteristics
VCC and VBS supply under-voltage positive going threshold VCC and VBS supply under-voltage negative going threshold
Test Condition
Min.
8.2 7.6
Typ. Max.
9.2 8.7 0.6 10.0 9.6
Unit
VCCUVH VCC supply under-voltage lockout VBSUVH hysteresis ILK IQBS IQCC IPBS IPCC VIH VIL VOH VOL IIN+ IINIO+ IOVS Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Operating VBS supply current Operating VCC supply current Logic "1" input voltage Logic "0" input voltage High-level output voltage, VBIAS-VO Low-level output voltage, VO Logic "1" input bias current Logic "0" input bias current Output high short-circuit pulsed current Output low short-circuit pulsed current Allowable negative VS pin voltage for HIN signal propagation to HO IO=20mA VIN=5V VIN=0V VO=0V, VIN=5V with PW<10s VO=15V, VIN=0V with PW<10s 250 500 VB=VS=600V VIN=0V or 5V VIN=0V or 5V fIN=20kHz,rms value fIN=20kHz,rms value 2.9
50 45 70 120 180 600 600 0.8 1.0 0.6 10 1.0 350 650 -9.8 -7.0 20 2.0 A mA V A A
Dynamic Electrical Characteristics

VBIAS (VCC, VBS)=15.0V, VS=COM, CL=1000pF and, TA = 25C, unless otherwise specified.
Symbol
ton toff tr tf MT Note:
Characteristics
Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Delay matching, HS & LS turn-on/off
Test Condition
VS=0V VS=0V or 600V(5)
Min.
100 100 20
Typ.
170 200 60 30
Max.
300 300 140 80 50
Unit
ns
5. This parameter guaranteed by design.
Typical Characteristics
Turn-On Propagation Delay [nsec]
Turn-On Propagation Delay [nsec]
300
300 275 250 225 200 175 150 125 100 75 50
250
VCC=VBS V =VBS CC COM=0V COM=0V CL=1nF C L=1nF Ta=25 C =25 C T A
VCC=VBS=15V V =VBS=15V CC COM=0V COM=0V CL=1nF =1nF C L
High-Side Low-Side
200
High-Side
150
Low-Side
100 10 12 14 16 18 20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Temperature[ C]
Figure 4. Turn-On Propagation Delay vs. Supply Voltage
Figure 5. Turn-On Propagation Delay vs. Temp.
Turn-Off Propagation Delay [nsec]
Turn-Off Propagation Delay [nsec]
300 280 260 240 220 200 180 160 140 120 100 10 12 14 16 18 20
300 275 250 225 200 175 150 125 -40 -20 0 20 40 60 80 100 120
VCC=V VCC=VBS BS COM=0V COM=0V CL=1nF CL=1nF Ta=25 C C TA=25
VCC=VBS=15V V =VBS=15V CC COM=0V COM=0V CL=1nF =1nF C L
High-Side Low-Side
High-Side Low-Side
Supply Voltage [V]
Temperature [ C]
Figure 6. Turn-Off Propagation Delay vs. Supply Voltage
Figure 7. Turn-Off Propagation Delay vs. Temp.
64
Turn-On Rising Time [nsec]
60 58 56 54 52 50 48 46 44 42 10 11 12 13 14 15
Turn-On Rising Time [nsec]
62
80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0
VCC=VBS=15V V =VBS=15V CC COM =0V COM=0V CL=1nF =1nF C L
Low-Side High-Side
Low-Side High-Side
16
17
18
19
20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Tem perature [ C]
Figure 8. Turn-On Rising Time vs. Supply Voltage
Figure 9. Turn-On Rising Time vs. Temp.
Typical Characteristics (Continued)

50
34
Turn-Off Falling Time [nsec]
Turn-Off Falling Time [nsec]
32 30 28 26 24 22 20 18 16
45 40 35 30 25 20 15 10
VCC=VBS=15V V =VBS=15V CC CO M=0V COM=0V CL=1nF =1nF C L
High-Side
High-Side
Low-Side
Low-Side
10
11
12
13
14
15
16
17
18
19
20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Tem perature [ C]
Figure 10. Turn-Off Falling Time vs. Supply Voltage

600
Figure 11. Turn-Off Falling Time vs. Temp.
Output Sourcing Current [mA]
550 500 450 400 350 300 250 200 150 100 10
V VCC=VBS CC=VBS COM=0V COM=0V LO=HO=0V LO=HO=0V Ta=25 C TA=25C
Output Sourcing Current [mA]
440 420 400 380 360 340 320 300 280
V VCC=VBS=15V CC=VBS=15V COM=0V COM=0V LO=HO=0V LO=HO=0V
High-Side Low-Side
High-Side Low-Side
12
14
16
18
20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Temperature [ C]
Figure 12. Output Sourcing Current vs. Supply Voltage
Figure 13. Output Sourcing Current vs. Temp
900
850
Output Sinking Current [mA]
Output Sinking Current [mA]
800
700
V VCC=VBS CC=VBS COM=0V COM=0V LO=VCC, HO=VB LO=V , HO=V CC B Ta=25 C TA=25C
800 750 700
V =VBS=15V VCC=VBS=15V CC COM=0V COM=0V LO=VCC, HO=VB LO=VCC, HO=VB
Low-Side
600
High-Side
High-Side
650 600 550 500
500
Low-Side
400
300 10 12 14 16 18 20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Temperature [ C]
Figure 14. Output Sinking Current vs. Supply Voltage
Figure 15. Output Sinking Current vs. Temp.

Allowable VS Voltage AllowableNegative Negative VS Voltage for Signal Propagatio to High-Side [V] for Signal Propagation to High-Side [V]
Allowable Negative VS Voltage Allowable Negative VS Voltage for Signal Propagation to High-Side High-Side [V] for Signal Propagation to [V]
-4 -6 -8 -10 -12 -14 -16 -18 10 12 14
-9.0 -9.2 -9.4 -9.6 -9.8 -10.0 -10.2 -10.4 -40 -20 0 20 40 60 80 100 120
VCC=VBS VCC=V BS COM=0V COM=0V Ta=25C TA=25C
VCC=VBS=15V V CC=VBS=15V COM=0V COM=0V
16
18
20
Supply Voltage [V]
Temperature [C]
Figure 16. Allowable Negative VS Voltage for Signal Propagation to High Side vs. Supply Voltage
100
Figure 17. Allowable Negative VS Voltage for Signal Propagation to High Side vs. Temp.
95
80
IQCC [uA] IQCC [ A]
IQCC [[uA] A] IQCC
V VBS=15V BS=15V COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V Ta=25 C TA=25C
90 85 80 75 70 65 60
VVCC=VBS=15V =VBS=15V CC CO M=0V COM=0V HIN=LIN=0V HIN=LIN=0V
60
40
20
55 50
0 0 5 10 15 20
45 -40 -20 0 20 40 60 80 100 120
Supply Voltage [V]
Tem perature [ C]
Figure 18. IQCC vs. Supply Voltage
Figure 19. IQCC vs. Temp.
80 70 60
IQBS [ A] IQBS [uA]
50 40 30 20 10
IQBS [A] IQBS [uA]
V =15V VCC=15V CC COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V Ta=25 C TA=25C
52 50 48 46 44 42 40 38 36
VCC =15V VCC=15V COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V
0 0 5 10 15 20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Tem perature [ C]
Figure 20. IQBS vs. Supply Voltage
Figure 21. IQBS vs. Temp.

0.7 0.60
0.6
VOH [V] VOH [V]
0.5
V VOH [V] OH [V]
VCC=VBS VCC =VBS COM=0V COM=0V HIN=LIN=5V HIN=LIN=5V IL=20mA IL=20mA Ta=25 C TA=25C
0.55 0.50 0.45
VCC=VBS=15V V CC=VBS=15V COM=0V COM=0V HIN=LIN=5V HIN=LIN=5V IL=20mA IL=20mA
High-Side
0.4
Low-Side
0.40
High-Side
0.35 0.30 0.25
Low-Side
0.3
0.2 10 12 14 16 18 20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Temperature [ C]
Figure 22. High-Level Output Voltage vs. Supply Voltage
Figure 23. High-Level Output Voltage vs. Temp.
0.18
0.17
VOL [V] VOL [V]
VOL [V] VOL [V]
0.16
VCC =VBS VCC=VBS COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V IL=20mA IL=20mA Ta=25C TA=25C
0.22 0.20 0.18 0.16
V VCC=VBS=15V CC=VBS=15V COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V IL=20mA IL=20mA
High-Side Low-Side
0.14 0.12 0.10
0.15
High-Side
0.14
Low-Side
0.13
0.12 10 12 14 16 18 20
-40
-20
20
40
60
80
100
120
Supply Voltage [V]
Temperature [C]
Figure 24. Low-Level Output Voltage vs. Supply Voltage
Figure 25. Low-Level Output Voltage vs. Temp.
40 35 30
16
IN+/IN[uA] IN+/IN[ A]
IN+ IN+[uA] [A]
25 20 15 10
VCC=VBS V =VBS CC COM=0V COM=0V IN=VCC or IN=0V or IN=0V IN=V CC Ta=25 C TA=25C
HIN=LIN=5V
14
12
IN+
LIN
10
HIN
8
6 5 0 0 5 10
IN15 20
4 -40 -20 0 20 40 60 80 100 120
Supply Voltage [V]
Tem perature [ C]
Figure 26. Input Bias Current vs. Supply Voltage
Figure 27. Input Bias Current vs. Temp.

10.0 9.8 10.0 9.8
VCCUV+/VCCUVVCCUV+/VCCUV+ [V][V]
VBSUV+/VBSUV[V] VSBUV+/VSBUV+ [V]
9.6 9.4 9.2 9.0 8.8 8.6 8.4 8.2 8.0 -40 -20 0 20 40 60 80 100 120
9.6 9.4 9.2 9.0 8.8 8.6 8.4 8.2 8.0 -40 -20 0 20 40 60 80 100 120
VCCUV+ VCCUV+
VSBUV+ VBSUV+
VCCUVVCCUV-
VSBUVVBSUV-
Temperature [ C]
Temperature [ C]
Figure 28. VCC UVLO Threshold Voltage vs. Temp.

5
Figure 29. VBS UVLO Threshold Voltage vs. Temp.

3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
Input Logic Threshold Voltage [V]
VB -to-CO M =650V V B-to-COM=650V

4
VIH (LIN) VIH(LIN) VIH (HIN) VIH(HIN) VIL (LIN) VIL(LIN)

VIL(HIN) V (HIN)
IL
V VCC=VBS=15V CC=VBS=15V COM=0V COM=0V
ILK [uA] ILK [ A]
0 -40 -20 0 20 40 60 80 100 120
-40
-20
20
40
60
80
100
120
Tem perature [ C ]
Temperature [ C]
Figure 30. VB to COM Leakage Current vs. Temp.
Figure 31. Input Logic Threshold Voltage vs. Temp.
15V
15V
1 VCC 100nF 10uF 4 COM
VB 8 10uF VS 6
1nF
100nF
HIN LIN
HIN
HO 7 LO 5 1nF FAN7382 Rev.05
HIN LIN
3 LIN
HO LO
FAN7382 Rev.03
Figure 32. Switching Time Test Circuit
Figure 33. Input / Output Timing Diagram
HIN LIN
50%
t on : Turn-on Delay Time t off : Turn-off Delay Time t r : Turn-on Rise Time t f : Turn-off Fall Time tr
50%
HIN LIN
50%
50%
t on
t off
tf
LO HO
MT t off-H t off-L 90%

LO HO
10%
90%
HO LO
90% 10%
FAN7382 Rev.03
t on-L MT
t on-H
10%
FAN7382 Rev.03
Figure 34. Switching Time Waveform Definition
Figure 35. Delay Matching Waveform Definition
Mechanical Dimensions
8-SOP
Dimensions are in millimeters (inches) unless otherwise noted.
MIN 1.55 0.20 0.061 0.008
0.1~0.25 0.004~0.001
#1
#8
4.92 0.20 0.194 0.008
5.13 MAX 0.202
(
#4 #5 6.00 0.30 0.236 0.012 1.80 MAX 0.071 3.95 0.20 0.156 0.008 5.72 0.225 0.50 0.20 0.020 0.008
September 2001, Rev B1 sop8_dim.pdf
0.56 ) 0.022
Figure 36. 8-Lead Small Outline Package
0~ 8
MAX0.10 MAX0.004
1.27 0.050
0.41 0.10 0.016 0.004

+0.10 0.15 -0.05 +0.004 0.006 -0.002
Mechanical Dimensions (Continued)

8-DIP
#1
#8
9.20 0.20 0.362 0.008 9.60 MAX 0.378
#4
#5
2.54 0.100
7.62 0.300
5.08 MAX 0.200 3.40 0.20 0.134 0.008
3.30 0.30 0.130 0.012 0.33 MIN 0.013
0.25 0.05
0~15
+0.10
0.010 0.002
September 1999, Rev B 8dip_dim.pdf
+0.004
Figure 37. 8-Lead Dual In-Line Package
0.018 0.004
1.524 0.10 0.060 0.004

0.46 0.10
6.40 0.20 0.252 0.008
0.79 ) 0.031
Mechanical Dimensions (Continued)

14-SOP
MIN 1.55 0.10 0.061 0.004
0.05 0.002
#1
#14
8.70 MAX 0.343
8.56 0.20 0.337 0.008
#7
#8
6.00 0.30 0.236 0.012
1.80 MAX 0.071
+0.10 0.20 -0.05 +0.004 0.008 -0.002
3.95 0.20 0.156 0.008
5.72 0.225 0.60 0.20 0.024 0.008
0~
January 2001, Rev. A 14sop225b_dim.pdf
Figure 38. 14-Lead Small Outline Package
MAX0.10 MAX0.004
1.27 0.050
+0.10 0.406 -0.05 +0.004 0.016 -0.002
0.47 ) 0.019
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Rev. I23
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
No Identification Needed
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FAN7382 High- and Low-Side Gate Driver