QUAD 2-INPUT MULTIPLEXER

The LSTTL / MSI SN54 / 74LS157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the true (non-inverted) form. The LS157 can also be used to generate any four of the 16 different functions of two variables. The LS157 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.

SN54/74LS157

QUAD 2-INPUT MULTIPLEXER

LOW POWER SCHOTTKY

Schottky Process for High Speed Multifunction Capability Non-Inverting Outputs Input Clamp Diodes Limit High Speed Termination Effects Special Circuitry Ensures Glitch Free Multiplexing ESD > 3500 Volts CONNECTION DIAGRAM DIP (TOP VIEW)
VCC 16 E 15 I0c 14 I1c 13 Zc 12 I0d 11 I1d 10 Zd 9
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 16

J SUFFIX CERAMIC CASE 620-09

1

1 S

2 I0a

3 I1d

4 Za

5 I0b

6 I1b

7 Zb

8 GND LOADING (Note a) HIGH LOW 0.5 U.L. 0.5 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L.

16 1

N SUFFIX PLASTIC CASE 648-08

PIN NAMES S E I0a I0d I1a I1d Za Zd Common Select Input Enable (Active LOW) Input Data Inputs from Source 0 Data Inputs from Source 1 Multiplexer Outputs (Note b)

1.0 U.L. 1.0 U.L. 0.5 U.L. 0.5 U.L. 10 U.L.

16 1

D SUFFIX SOIC CASE 751B-03

ORDERING INFORMATION
SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC

NOTES: a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.

LOGIC DIAGRAM
I0a
2 3

I1a
5

I0b
6

I1b
14

I0c
13

I1c
11

I0d
10

I1d E S
15 1

LOGIC SYMBOL
15 2 3 5 6 14 13 11 10

E I0a I1a I0b I1b I0c I1c I0d I1d 1 S Za Zb Zc Zd

12

12

VCC = PIN 16 GND = PIN 8 = PIN NUMBERS Zd

VCC = PIN 16 GND = PIN 8

Za

Zb

Zc

FAST AND LS TTL DATA 5-1

SN54/74LS157
FUNCTIONAL DESCRIPTION The LS157 is a Quad 2-Input Multiplexer fabricated with the Schottky barrier diode process for high speed. It selects four bits of data from two sources under the control of a common Select Input (S). The Enable Input (E) is active LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The LS157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select Input. The logic equations for the outputs are:

Za = E (I1a S + I0a S) Zc = E (I1c S + I0c S)

Zb = E (I1b S + I0b S) Zd = E (I1d S + I0d S)

A common use of the LS157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select Input. A less obvious use is as a function generator. The LS157 can generate any four of the 16 different functions of two variables with one variable common. This is useful for implementing highly irregular logic.

TRUTH TABLE
ENABLE E H L L L L
H = HIGH Voltage Level L = LOW Voltage Level X = Dont Care

SELECT INPUT S X H H L L

INPUTS I0 X X X L H I1 X L H X X

OUTPUT Z L L H L H

GUARANTEED OPERATING RANGES

Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 0.4 4.0 8.0 Unit V C mA mA

FAST AND LS TTL DATA 5-2

SN54/74LS157
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits S b l Symbol VIH VIL VIK VOH P Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 54 74 54, 74 VOL Output LOW Voltage 74 Input HIGH Current I0, I1 E, S I0, I1 E, S IIL IOS ICC Input LOW Current I0, I1 E, S Short Circuit Current (Note 1) Power Supply Current 20 0.35 0.5 20 40 0.1 0.2 0.4 0.8 100 16 V A 2.5 2.7 54 74 0.65 3.5 3.5 0.25 0.4 Min 2.0 0.7 0.8 1.5 V V V V Typ Max U i Unit V V T Test C Conditions di i Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input p LOW Voltage g for All Inputs VCC = MIN, IIN = 18 mA VCC = MIN, , IOH = MAX, , VIN = VIH or VIL per Truth Table IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table

VCC = MAX, VIN = 2.7 V

IIH

mA

VCC = MAX, VIN = 7.0 V

mA mA mA

VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25C)

Limits S b l Symbol tPLH tPHL tPLH tPHL tPLH tPHL P Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Propagation Delay Select to Output Min Typ 9.0 9.0 13 14 15 18 Max 14 14 20 21 23 27 U i Unit ns ns ns Figure 2 Figure 1 Figure 2 VCC = 5.0 50V CL = 15 pF T Test C Conditions di i

AC WAVEFORMS
VIN 1.3 V tPHL VOUT 1.3 V 1.3 V tPLH 1.3 V VOUT 1.3 V tPHL 1.3 V 1.3 V tPLH 1.3 V

VIN

Figure 1

Figure 2

FAST AND LS TTL DATA 5-3