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Submitted for the fulfillment for the award of the degree of BACHELOR OF ENGINEERING

Project Report On

In Electronics & Communication Engineeering Submitted To

RAJIV GANDHI PROUDYOGIKI VISHWAVIDYALAYA, BHOPAL(M.P.)

Under The Guidance Mr. Sachin Dubey

(Lecturer EC Department)

Submitted By
A Anupama(0203EC091001) Anuradha Chowrha(0203EC091009) Rupal Maheshwari(0203EC091044) Sakshi Pandey(0203EC091047) Sonam Bhojak(0203EC091059)
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGG. HCET, JABALPUR 2013

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D De ep pa ar rttm me en ntt O Off E Elle ec cttr ro on niic cs s& &C Co om mm mu un niic ca attiio on n

certificate
This is to certify that the project entitled Virtual Streetwhich hs been completed & submitted by A.Anupama(01), Anuradha Chowrha(09), Rupal Maheshwari(44), Sakshi Pandey(47) and Sonam Bhojak(59) students of Bachelor Of Engineering(EC) is a bonafide work done by them. This project has been completed under our supervision. This project report is in accordance with the requirement of degree of B.E(EC) awarded by Rajiv Gandhi Proudyogiki Vishwavidyalaya,Bhopal.

Mr.Sameer Vaidya (Principal) HCET, JBP

Mr.RAKESH TIWARI (Head Of Department) HCET,EC Deptt.JBP

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D De ep pa ar rttm me en ntt O Off E Elle ec cttr ro on niic cs s& &C Co om mm mu un niic ca attiio on n

certificate
This is to certify that the project entitled Virtual Streetwhich hs been completed & submitted by A.Anupama(01), Anuradha Chowrha(09), Rupal Maheshwari(44), Sakshi Pandey(47) and Sonam Bhojak(59) students of Bachelor Of Engineering(EC) is a bonafide work done by them. This project has been completed under our supervision. This project report is in accordance with the requirement of degree of B.E(EC) awarded by Rajiv Gandhi Proudyogiki Vishwavidyalaya,Bhopal.

Mr.Sachin Dubey Project Guide HCET, JBP

Mr.RAKESH TIWARI (Head Of Department) HCET,EC Deptt.JBP

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ACKNOWLEDGEMENT

We are honoured to present this initial report on VIRTUAL STREET.First of all, we take this opportunity to thank the Almighty by whose blessing this report has reached its present form. Secondly, we would like to thank our teacher for giving us a chance to bring out our skills and for guiding us.We would thank our parents who have guided and motivated us throughout.. And last but not the least , we do thank all those who have worked behind the curtains to make this work of ours a great success. A.Anupama Anuradha Chowrha Rupal Maheshwari Sakshi Pandey Sonam Bhojak

ABSTRACT
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More and more transportation surveys use GPS technology, while GSM technology is used only in a few research projects. GPS technology provides very accurate data but is not always applicable due to technical restrictions like open view to the satellites which is especially crucial when participants use public transport. GSM is virtually always available but its spatial accuracy is less accurate. The combination of both technologies is promising more complete spatial data (origin,route, destination) when tracking individuals routes.

Both tracking technologies can support transportation research in many different ways. This project explains how either the parallel use of GPS and GSM tracking technology at the same time or the use of GSM tracking technology only, combined with a historic GPS/GSM tracking database can produce reliable tracking results. Based on the parallel use of GPS and GSM tracking the knowledge of the individuals location can be used for adapted user response and thus reduce user burden. Portable electronic devices equipped with GPS/GSM can be used to interview the respondents in real time respectively on site. The knowledge of the location will be used to reduce the amount and the complexity of questions asked.Questions about origin/route/destination or transportation mode will be asked only if tracking data are unclear and thus need to be specified.

First test drives provided promising results regarding the combination of GPS and GSM tracking.Based on this tracking some strategies for adapted user response are developed and first dialogues for adapted electronic questionnaires are designed.

INTRODUCTION
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One reason spending so much effort in developing tracking technologies is human inability to report geographic information as precise and reliable as needed for transportation research. It has been reported that people can not support this kind of data by themselves. In a feasibility study in Germany, information collected in a conventional travel survey (CATI) has been used to geo-code the self reported trips. The results showed that ca. 50% of the trip s origin and/or destination could not be matched to a street section respectively 70% 80% to an address (infas, 2001).

The demand for more precise and reliable spatial data is partly derived from increasing microscopic data analysis and modelling. In addition to simple origin/destination coordinates even more complex data about the route is needed. However, route information is too complex to be included into classic paper pencil questionnaires for now and most probably in the future. Facing these problems researchers look for alternatives for conventional travel surveys.

During the last years an increasing number of GPS based transportation research projects have been carried out to meet the required tracking data quality. Under certain conditions tracking technologies provide the means to improve the spatial information of the whole trip. Due to technical constraints like power supply or weight most of the early research projects focused on vehicle-based transportation mainly by private car. Recent feasibility tests on tracking in public transport produced poor results which leads to further research in this field.

At the same time the introduction of electronic questionnaires on mobile devices allow new approaches in transportation research. This technology provides the opportunity to adapt flexible questionnaires to complex research designs.

Since tracking technologies can not provide reliable data in every situation this project will describe how the parallel use of mobile electronic questionnaires and GPS/GSM tracking technologies can be used to collect missing or to specify inaccurate tracking data.

Our goal is to develop computational approaches for studying groups of agents with natural mobility and social interactions. Such systems differ in many ways from engineered mobile systems because their agents can move on their own due to complex natural behaviors as well as under the control of the environment (for
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example moving toward a food or water source). We wish to generate models of such systems using observed physical data and to use these models to synthesize controllers for the movement of the mobile agents.

There are complex interactions with the environment, such as looking for a water source in a new paddock by perimeter tracing along the fence and random walking within the perimeter.

The purpose of the project GPS based virtual street is to construct a virtual street that functions similar to physical street. A virtual street is a dynamic path that uses LCD system to guide someone to the desired location & incorporation of an audio-visual alarm helps to alert the user when moved out of the original path. It may find its applications in military,defence,naval services as well as it can be used as an security device at some places. For this purpose we make use of the current location of the user which can be known with the help of the GPS and whenever it is about to cross its guided path it will have a beeping sound which will make the user aware of the false path and help him to stay in the location to which it was restricted.

The very much similar concept has been used in GPS based virtual fencing whose functioning includes construction of a virtual fencing that functions similar to physical fencing. A virtual fence is a barrier that uses electric shock to deter animals or people from crossing a boundary. The voltage of the shock may have effects ranging from uncomfortable, to painful or even lethal (capable of causing death). Mostly used today for agricultural fencing and other forms of animal control purposes, though it is frequently used to enhance security of sensitive areas, and there exist places where lethal voltages are used. Virtual fencing for the wild animals is meant to restrict animals to move in only few areas.

HARDWARE SNAPSHOT

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BLOCK DIAGRAM

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KEYPAD

LCD DISPLAY

ALARM

MICRO CONTROLLER

GSM MODULE

VISUAL INDICATOR

GPS MODULE

CIRCUIT DIAGRAM

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GLOBAL POSITIONING SYSTEM(GPS):VIRTUAL STREET

INTRODUCTION The Global Positioning System (GPS) is a burgeoning technology, which provides unequalled accuracy and flexibility of positioning for navigation, surveying and GIS data capture. The GPS NAVSTAR (Navigation Satellite timing and Ranging Global Positioning System) is a satellite-based navigation, timing and positioning system. The GPS provides continuous three-dimensional positioning 24 hrs a day throughout the world. The technology seems to be beneficiary to the GPS user community in terms of obtaining accurate data up to about100 meters for navigation, meter-level for mapping, and down to millimeter level for geodetic positioning. The GPS technology has tremendous amount of applications in GIS data collection, surveying, and mapping.

The Global Positioning System (GPS) is a U.S. space-based radio navigation system that provides reliable positioning, navigation, and timing services to civilian users on a continuous worldwide basis -- freely available to all. For anyone with a GPS receiver, the system will provide location with time. GPS provides accurate location and time information for an unlimited number of people in all weather, day and night, anywhere in the world. The Global Positioning System (GPS) is a satellite-based navigation system made up of a network of 24 satellites placed into orbit by the U.S. Department of Defense. GPS was originally intended for military applications, but in the 1980s, the government made the system available for civilian use. GPS works in any weather conditions, anywhere in the world, 24 hours a day. There are no subscription fees or setup charges to use GPS.

The GPS is made up of three parts: satellites orbiting the Earth; control and monitoring stations on Earth; and the GPS receivers owned by users. GPS satellites broadcast signals from space that are picked up and

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identified by GPS receivers. Each GPS receiver then provides three-dimensional location (latitude, longitude, and altitude) plus the time. Individuals may purchase GPS handsets that are readily available through commercial retailers. Equipped with these GPS receivers, users can accurately locate where they are and easily navigate to where they want to go, whether walking, driving, flying, or boating. GPS has become a mainstay of transportation systems worldwide, providing navigation for aviation, ground, and maritime operations. Disaster relief and emergency services depend upon GPS for location and timing capabilities in their life-saving missions. The accurate timing provided by GPS facilitates everyday activities such as banking, mobile phone operations, and even the control of power grids. Farmers, surveyors, geologists and countless others perform their work more efficiently, safely, economically, and accurately using the free and open GPS signals. Geo positioning -- Basic Concepts By positioning we can understand the determination of stationary or moving objects. These can be determined as follows a. In relation to a well-defined coordinate system, usually by three coordinate values and b. In relation to other point, taking one point as the origin of a local coordinate system. The first mode of positioning is known as point positioning, the second as relative positioning. If the object to be positioned is stationary, we can term it as static positioning. When the object is moving, we call it kinematics positioning. Usually, the static positioning is used in surveying and the kinematics position in navigation. GPS - Components and Basic Facts The GPS uses satellites and computers to compute positions anywhere on earth. The GPS is based on satellite ranging. That means the position on the earth is determined by measuring the distance from a group of satellites in space. The basic principles behind GPS are really simple, even though the system employs some of the hightechest equipment ever developed. In order to understand GPS basics, the system can be categorized into 5 Logical steps. They are listed below

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1. Triangulation from the satellite is the basis of the system. 2. To triangulate, the GPS measures the distance using the travel time of the radio message. 3. To measure travel time, the GPS need a very accurate clock. 4. Once the distance to a satellite is known, then we need to know where the satellite is in space. 5. As the GPS signal travels through the ionosphere and the earth's atmosphere, the signal is delayed. To compute a position in three dimensions, we need to have four satellite measurements. The GPS uses a trigonometric approach to calculate the positions, The GPS satellites are so high up that their orbits are very predictable and each of the satellites is equipped with a very accurate atomic clock. 5.2 COMPONENTS OF GPS The GPS is divided into three major components

The Control Segment The Space Segment The User Segment

The Control Segment The Control Segment consists of five monitoring stations (Colorado Springs, Accession Island, Diego Garcia, Hawaii, and Kwajalein Island). Three of the stations (Ascension, Diego Garcia, and Kwajalein) serve as uplink installations, capable of transmitting data to the satellites, including new ephemeredes (satellite positions as a function of time), clock corrections, and other broadcast message data, while Colorado Springs serves as the master control station. The Control Segment is the sole responsibility of the DOD who undertakes construction, launching, maintenance, and virtually constant performance monitoring of all GPS satellites. The DOD monitoring stations track all GPS signals for use in controlling the satellites and predicting their orbits. Meteorological data also are collected at the monitoring stations, permitting the most accurate evaluation of tropospheric delays of GPS signals. Satellite tracking data from the monitoring stations are transmitted to the master control station for processing. This processing involves the computation of satellite ephemeredes and satellite clock corrections. The master station controls orbital corrections, when any satellite strays too far from its assigned position, and necessary repositioning to compensate for unhealthy (not fully functioning) satellites.

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The Space Segment The Space Segment consists of the Constellation of NAVASTAR earth orbiting satellites. The current Defence Department plan calls for a full constellation of 24 Block II satellites (21 operational and 3 in-orbit spares). The satellites are arrayed in 6 orbital planes, inclined 55 degrees to the equator. They orbit at altitudes of about 12000, miles each, with orbital periods of 12 sidereal hours (i.e., determined by or from the stars), or approximately one half of the earth's periods, approximately 12 hours of 3D position fixes. The next block of satellites is called Block IIR, and they will provide improved reliability and have a capacity of ranging between satellites, which will increase the orbital accuracy. Each satellite contains four precise atomic clocks (Rubidium and Cesium standards) and has a microprocessor on board for limited self-monitoring and data processing. The satellites are equipped with thrusters which can be used to maintain or modify their orbits.

The User Segment The user segment is a total user and supplier community, both civilian and military. The User Segment consists of all earth-based GPS receivers. Receivers vary greatly in size and complexity, though the basic design is rather simple. The typical receiver is composed of an antenna and preamplifier, radio signal microprocessor, control and display device, data recording unit, and power supply. The GPS receiver decodes the timing signals from the 'visible' satellites (four or more) and, having calculated their distances, computes its own latitude, longitude, elevation, and time. This is a continuous process and generally the position is updated on a second-by-second basis, output to the receiver display device and, if the receiver display device and, if the receiver provides data capture capabilities, stored by the receiver-logging unit.

How it works
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GPS satellites circle the earth twice a day in a very precise orbit and transmit signal information to earth. GPS receivers take this information and use triangulation to calculate the user's exact location. Essentially, the GPS receiver compares the time a signal was transmitted by a satellite with the time it was received. The time difference tells the GPS receiver how far away the satellite is. Now, with distance measurements from a few more satellites, the receiver can determine the user's position and display it on the unit's electronic map.

GPS receiver must be locked on to the signal of at least three satellites to calculate a 2D position (latitude and longitude) and track movement. With four or more satellites in view, the receiver can determine the user's 3D position (latitude, longitude and altitude). Once the user's position has been determined, the GPS unit can calculate other information, such as speed, bearing, track, trip distance, distance to destination, sunrise and sunset time and more.

The GPS satellite system The 24 satellites that make up the GPS space segment are orbiting the earth about 12,000 miles above us.

They are constantly moving, making two complete orbits in less than 24 hours. These satellites are traveling at speeds of roughly 7,000 miles an hour. GPS satellites are powered by solar energy. They have backup batteries onboard to keep them running in the event of a solar eclipse, when there's no solar power. Small rocket boosters on each satellite keep them flying in the correct path.

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Here are some other interesting facts about the GPS satellites (also called NAVSTAR, the official U.S. Department of Defense name for GPS)

The first GPS satellite was launched in 1978. A full constellation of 24 satellites was achieved in 1994. Each satellite is built to last about 10 years. Replacements are constantly being built and launched into orbit.

A GPS satellite weighs approximately 2,000 pounds and is about 17 feet across with the solar panels extended.

Transmitter power is only 50 watts or less.

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GPS METHOD OF OPERATION

A GPS receiver calculates its position by carefully timing the signals sent by the constellation of GPS satellites high above the Earth. Each satellite continually transmits messages containing the time the message was sent, a precise orbit for the satellite sending the message (the ephemeris), and the general system health and rough orbits of all GPS satellites (the almanac). These signals travel at the speed of light through outer space, and slightly slower through the atmosphere. The receiver uses the arrival time of each message to measure the distance to each satellite thereby establishing that the GPS receiver is approximately on the surfaces of spheres centered at each satellite. The GPS receiver also uses, when appropriate, the knowledge that the GPS receiver is on (if vehicle altitude is known) or near the surface of a sphere centered at the earth center. This information is then used to estimate the position of the GPS receiver as the intersection of sphere surfaces. The resulting coordinates are converted to a more convenient form for the user such as latitude and longitude, or location on a map, then displayed. It might seem that three sphere surfaces would be enough to solve for position, since space hasthree dimensions. However a fourth condition is needed for two reasons. One has to do with position and the other is to correct the GPS receiver clock. It turns out that three sphere surfaces usually intersect in two points. Thus a fourth sphere surface is needed to determine which intersection is the GPS receiver position. For near earth vehicles, this knowledge that it is near earth is sufficient to determine the GPS receiver position since for this case there is only one intersection which is near earth. A fourth sphere surface is also needed to correct the GPS receiver clock. More precise information is needed for this task. An estimate of the radius of the sphere is required. Therefore an approximation of the earth altitude or radius of the sphere centered at the satellite must be known.

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BLOCK DIAGRAM

The GPS Receiver consist of two units, first is active antenna which receives RF signals and amplifies it. The antenna is active in the sense it takes power from the module and amplifies the signal for high sensitivity. The RF signal is filtered and processed to generate NMEA format serial data output.

GPS SPECIFICATION

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SOFTWARE FOR MONITORING GPS DATA The NMEA data from GPS unit can be monitored by following. Download GPS monitoring software http://www.sunrom.com/files/TrimbleStudio_V1-01-21.exe

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NMEA PROTOCOL This section provides a brief overview of the NMEA 0183 protocol, and describes both the standard and optional messages offered by the GPS Receiver. NMEA 0183 is a simple, yet comprehensive ASCII protocol which defines both the communication interface and the data format. The NMEA 0183 protocol was originally established to allow marine navigation equipment to share information. Since it is a well established industry standard, NMEA 0183 has also gained popularity for use in applications other than marine electronics. The GPS receiver supports the latest release of NMEA 0183, Version 3.0 (July 1, 2000). The primary change in release 3.0 is the addition of the mode indicators in the GLL, RMC, and VTG messages. For those applications requiring output only from the GPS receiver, the standard NMEA 0183 sentences are a popular choice. Many standard application packages support the standard NMEA output messages. The standard NMEA output only messages are: GGA, GLL, GSA, GSV, RMC, VTC, and ZDA. NMEA record GGA GLL GSA GSV RMC VTG ZDA description GPS fix data Geographic GNSS DOP and active satellites GNSS satellitre in view Recommended minimum specific GNSS data Course over ground and ground speed Time & data

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GPS APPLICATIONS One of the most significant and unique features of the Global Positioning Systems is the fact that the positioning signal is available to users in any position worldwide at any time. With a fully operational GPS system, it can be generated to a large community of likely to grow as there are multiple applications, ranging from surveying, mapping, and navigation to GIS data capture. The GPS will soon be a part of the overall utility of technology. There are countless GPs applications, a few important ones are covered in the following passage. Surveying and Mapping The high precision of GPS carrier phase measurements, together with appropriate adjustment algorithms, provides an adequate tool for a variety of tasks for surveying and mapping. Using DGPs methods, accurate and timely mapping of almost anything can be carried out. The GPS is used to map cut blocks, road alignments, and environmental hazards such as landslides, forest fires, and oil spills. Applications, such as cadastral mapping, needing a high degree of accuracy also can be carried out using high grade GPS receivers. Continuous kinematic techniques can be used for topographic surveys and accurate linear mapping. Navigation Navigation using GPS can save countless hours in the field. Any feature, even if it is under water, can be located up to one hundred meters simply by scaling coordinates from a map, entering waypoints, and going directly to the site. Examples include road intersections, corner posts, plot canters, accident sites, geological formations, and so on. GPS navigation in helicopters, in vehicles, or in a ship can provide an easy means of navigation with substantial savings. Remote Sensing and GIS It is also possible to integrate GPS positioning into remote-sensing methods such as photogrammetry and aerial scanning, magnetometry, and video technology. Using DGPS or kinematic techniques, depending upon the accuracy required, real time or post-processing will provide positions for the sensor which can be projected to the ground, instead of having ground control projected to an image. GPS are becoming very effective tools for GIS data capture. The GIS user community benefits from the use of GPS for locational data capture in various GIS applications. The GPS can easily be linked to a laptop computer in the field, and, with appropriate software, users can also have all their data on a common base with every little distortion. Thus GPS can help in several aspects of construction of accurate and timely GIS databases. Geodesy Geodetic mapping and other control surveys can be carried out effectively using high-grade GPs equipment. Especially when helicopters were used or when the line of sight is not possible, GPS can set new standards of accuracy and productivity. Military The GPS was primarily developed for real time military positioning. Military applications include airborne, marine, and land navigation.

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MICROCONTROLLER ATMEGA32:-

The ATmega32 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega32 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The ATmega32 provides the following features: 32K bytes of In-System Programmable Flash Program memory with Read-While-Write capabilities, 1024 bytes EEPROM, 2K byte SRAM, 32 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for Boundary scan, On-chip Debugging support and programming, three flexible Timer/Counters with compare modes, Internal and External Interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional differential input stage with programmable gain (TQFP package only), a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, and six software selectable power saving modes. The Idle mode stops the CPU while allowing the USART, Two-wire interface, A/D Converter, SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning.

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The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next External Interrupt or Hardware Reset. In Power-save mode, the Asynchronous Timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low-power consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run.

The device is manufactured using Atmels high density nonvolatile memory technology. The Onchip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation.

By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega32 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many embedded control applications.

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Features High-performance, Low-power AVR 8-bit Microcontroller Advanced RISC Architecture 131 Powerful Instructions Most Single-clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 16 MIPS Throughput at 16 MHz On-chip 2-cycle Multiplier

High Endurance Non-volatile Memory segments 32K Bytes of In-System Self-programmable Flash program memory 1024 Bytes EEPROM 2K Byte Internal SRAM Write/Erase Cycles: 10,000 Flash/100,000 EEPROM Data retention: 20 years at 85C/100 years at 25C(1) Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation Programming Lock for Software Security

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 JTAG (IEEE std. 1149.1 Compliant) Interface Boundary-scan Capabilities According to the JTAG Standard Extensive On-chip Debug Support Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface Peripheral Features Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode Real Time Counter with Separate Oscillator Four PWM Channels 8-channel, 10-bit ADC -8 Single-ended Channels -7 Differential Channels in TQFP Package Only -2 Differential Channels with Programmable Gain at 1x, 10x, or 200x Byte-oriented Two-wire Serial Interface Programmable Serial USART Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator

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 Special Microcontroller Features Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Standby I/O and Packages 32 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF Operating Voltages 2.7 - 5.5V for ATmega32L 4.5 - 5.5V for ATmega32 Speed Grades 0 - 8 MHz for ATmega32L 0 - 16 MHz for ATmega32 Power Consumption at 1 MHz, 3V, 25C for ATmega32L Active: 1.1 mA Idle Mode: 0.35 mA Power-down Mode: < 1 A --Extended

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Pin Configuration:

Pin Descriptions VCC GND Port A (PA7..PA0) :Digital supply voltage. :Ground. :Port A serves as the analog inputs to the A/D Converter.

Port A also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B (PB7..PB0): Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running.
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Port C (PC7..PC0): Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the JTAG interface is enabled, the pull-up resistors on pins PC5(TDI), PC3(TMS) and PC2(TCK) will be activated even if a reset occurs. The TD0 pin is tri-stated unless TAP states that shift out data are entered. Port D (PD7..PD0): Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. RESET: Reset Input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting Oscillator amplifier. AVCC: AVCC is the supply voltage pin for Port A and the A/D Converter. It should be externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter. AREF: AREF is the analog reference pin for the A/D Converter.

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AVR CPU Core This section discusses the AVR core architecture in general. The main function of the CPU core is to ensure correct program execution. The CPU must therefore be able to access memories, perform calculations, control peripherals, and handle interrupts.

In order to maximize performance and parallelism, the AVR uses a Harvard architecture with separate memories and buses for program and data. Instructions in the program memory are executed with a single level pipelining. While one instruction is being executed, the next instruction is pre-fetched from the program memory. This concept enables instructions to be executed in every clock cycle. The program memory is InSystem Reprogrammable Flash memory. The fast-access Register File contains 32 x 8-bit general purpose working registers with a single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typical ALU operation, two operands are output from the Register File, the operation is executed, and the result is stored back in the Register File in one clock cycle. Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data Space addressing enabling efficient address calculations. One of the these address pointers

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can also be used as an address pointer for look up tables in Flash Program memory. These added function registers are the 16-bit X-, Y-, and Z-register, described later in this section. The ALU supports arithmetic and logic operations between registers or between a constant and a register. Single register operations can also be executed in the ALU. After an arithmetic operation, the Status Register is updated to reflect information about the result of the operation. Program flow is provided by conditional and unconditional jump and call instructions, able to directly address the whole address space. Most AVR instructions have a single 16-bit word format. Every program memory address contains a 16- or 32-bit instruction. Program Flash memory space is divided in two sections, the Boot program section and the Application Program section. Both sections have dedicated Lock bits for write and read/write protection. The SPM instruction that writes into the Application Flash memory section must reside in the Boot Program section. During interrupts and subroutine calls, the return address Program Counter (PC) is stored on the Stack. The Stack is effectively allocated in the general data SRAM, and consequently the Stack size is only limited by the total SRAM size and the usage of the SRAM. All user programs must initialize the SP in the reset routine (before subroutines or interrupts are executed). The Stack Pointer SP is read/write accessible in the I/O space. The data SRAM can easily be accessed through the five different addressing modes supported in the AVR architecture. The memory spaces in the AVR architecture are all linear and regular memory maps. A flexible interrupt module has its control registers in the I/O space with an additional global interrupt enable bit in the Status Register. All interrupts have a separate interrupt vector in the interrupt vector table. The interrupts have priority in accordance with their interrupt vector position. The lower the interrupt vector address, the higher the priority. The I/O memory space contains 64 addresses for CPU peripheral functions as Control Registers, SPI, and other I/O functions. The I/O Memory can be accessed directly, or as the Data Space locations following those of the Register File, $20 - $5F. ALU Arithmetic Logic Unit The high-performance AVR ALU operates in direct connection with all the 32 general purpose working registers. Within a single clock cycle, arithmetic operations between general purpose registers or between a register and an immediate are executed. The ALU operations are divided into three main categories arithmetic, logical, and bit-functions. Some implementations of the architecture also provide a powerful multiplier supporting both signed/unsigned multiplication and fractional format.

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Status Register The Status Register contains information about the result of the most recently executed arithmetic instruction. This information can be used for altering program flow in order to perform conditional operations. Note that the Status Register is updated after all ALU operations, as specified in the Instruction Set Reference. This will in many cases remove the need for using the dedicated compare instructions, resulting in faster and more compact code. The Status Register is not automatically stored when entering an interrupt routine and restored when returning from an interrupt. This must be handled by software.

The AVR Status Register SREG is defined as:

Bit 7 I: Global Interrupt Enable The Global Interrupt Enable bit must be set for the interrupts to be enabled. The individual interrupt enable control is then performed in separate control registers. If the Global Interrupt Enable Register is cleared, none of the interrupts are enabled independent of the individual interrupt enable settings. The I-bit is cleared by hardware after an interrupt has occurred, and is set by the RETI instruction to enable subsequent interrupts. The I-bit can also be set and cleared by the application with the SEI and CLI instructions, as described in the instruction set reference. Bit 6 T: Bit Copy Storage The Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source or destination for the operated bit. A bit from a register in the Register File can be copied into T by the BST instruction, and a bit in T can be copied into a bit in a register in the Register File by the BLD instruction. Bit 5 H: Half Carry Flag The Half Carry Flag H indicates a half carry in some arithmetic operations. Half Carry is useful in BCD arithmetic.

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Bit 4 S: Sign Bit, S = N V The S-bit is always an exclusive or between the Negative Flag N and the Twos Complement Overflow Flag V. Bit 3 V: Twos Complement Overflow Flag The Twos Complement Overflow Flag V supports twos complement arithmetics.. Bit 2 N: Negative Flag The Negative Flag N indicates a negative result in an arithmetic or logic operation. Bit 1 Z: Zero Flag The Zero Flag Z indicates a zero result in an arithmetic or logic operation. Bit 0 C: Carry Flag The Carry Flag C indicates a carry in an arithmetic or logic operation.

General Purpose Register File:The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve the required performance and flexibility, the following input/output schemes are supported by the Register File: One 8-bit output operand and one 8-bit result input Two 8-bit output operands and one 8-bit result input Two 8-bit output operands and one 16-bit result input One 16-bit output operand and one 16-bit result input Figure 4 shows the structure of the 32 general purpose working registers in the CPU.

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Figure 4. AVR CPU General Purpose Working Registers

Most of the instructions operating on the Register File have direct access to all registers, and most of them are single cycle instructions.

As shown in Figure 4, each register is also assigned a data memory address, mapping them directly into the first 32 locations of the user Data Space. Although not being physically implemented as SRAM locations, this memory organization provides great flexibility in access of the registers, as the X-, Y-, and Z-pointer Registers can be set to index any register in the file.

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The X-register, Yregister and Z-register: The registers R26..R31 have some added functions to their general purpose usage. These registers are 16-bit address pointers for indirect addressing of the Data Space. The three indirect address registers X, Y, and Z are defined as described in Figure 5.

In the different addressing modes these address registers have functions as fixed displacement, automatic iNcrement, and automatic decrement (see the Instruction Set Reference for details).

Instruction Execution Timing: This section describes the general access timing concepts for instruction execution. The AVR CPU is driven by the CPU clock, directly generated from the selected clock source for the chip. No internal clock division is used. Figure shows the parallel instruction fetches and instruction executions enabled by the Harvard architecture and the fast-access Register file concept. This is the basic pipelining concept to obtain up to 1 MIPS per MHz with the functions per power-unit. corresponding unique results for functions per cost, functions per clocks, and

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The Parallel Instruction Fetches and Instruction Executions

Below figure shows the internal timing concept for the Register file. In a single clock cycle an ALU operation using two register operands is executed, and the result is stored back to the destination register.

Figure. Single Cycle ALU Operation:

AVR ATmega32 Memories: This section describes the different memories in the ATmega32. The AVR architecture has two main memory spaces, the Data Memory and the Program Memory space. In addition, the ATmega32 features an EEPROM Memory for data storage. All three memory spaces are linear and regular.

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In-System Reprogrammable Flash Program Memory

The ATmega32 contains 32K bytes On-chip In-System Reprogrammable Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 16K x 16. For software security, the Flash Program memory space is divided into two sections, Boot Program section and Application Program section.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega32 Program Counter (PC) is 14 bits wide, thus addressing the 16K program memory locations. The operation of Flash Programming in SPI, JTAG, or Parallell Programming mode. Constant tables can be allocated within the entire program memory address space (see the LPM Load Program Memory Instruction Description).

Timing diagrams for instruction fetch and execution are presented in Instruction Execution Timing on above.

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SRAM Data Memory: The below fig shows the ATmega32 SRAM Memory is organized. The lower 2144 Data Memory locations address the Register File, the I/O Memory, and the internal data SRAM. The first 96 locations address the Register File and I/O Memory, and the next 2048 locations address the internal data SRAM. The five different addressing modes for the data memory cover: Direct, Indirect with Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register File, registers R26 to R31 feature the indirect Addressing Pointer Registers. The direct addressing reaches the entire data space. The Indirect with Displacement mode reaches 63 address locations from the base address given by the Y- or Z-register. When using register indirect addressing modes with automatic pre-decrement and post-increment, the address registers X, Y, and Z are decremented or incremented.

The 32 general purpose working registers, 64 I/O Registers, and the 2048 bytes of internal data SRAM in the ATmega32 are all accessible through all these addressing modes.

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Data Memory Access Times: This section describes the general access timing concepts for internal memory access. The internal data SRAM access is performed in two clkCPU cycles as described in below figure.

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Block diagram of Atmega32:

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LIQUID CRYSTAL DISPLAY (LCD)

LCD can be abbreviated as Liquid Crystal display has the distinct advantage of having a low power requirement than that of LED. It is typically in the order of microwatts for display as compared to the same order of milliwatts for LED. It does however require an external or internal light source and is limited to a temperature range of 0 to 60 degrees C. Life time is an area because LCD can degrade chemically. The types receiving major interest today are the Field-effect and the dynamic-scattering units.

Liquid crystal is a material that will flow like a liquid whose molecular structure has some properties normally associated with solids for the light scattering units the greatest interest is in nematic liquid crystal having crystal structure. The individual molecules have rod like appearance. The indium-oxide conducting surface is transparent and the incident light will simply pass through and crystal appears clear. If a voltage is applied across conducting surfaces, the molecular arrangement is disturbed, with the result the result that regions will be established with different indices of refraction. The incident light is therefore reflected in different directions at the interface between regions of different indices of refraction with the result that the scattered light has a frosted glass appearance.

As indicated earlier LCD does not generate its own light but depends on an external or internal source .Under dark conditions it would be necessary for the unit to have its own internal light source either behind or to the side of the LCD. During the day, or in lighted areas, a reflector can be put behind the LCD to reflect the light back through the display for maximum intensity. For optimum operation we can use a combination of transmissive and reflective modes called transflective.

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LCD JHD 162A: Fig. below shows front view of LCD JHD162A:

Back view of the LCD:

There are 16 pins in all. They are numbered from left to right 1 to 16 (if you are reading from the backside). LCD shown above is marked to indicate which the 1st pin was and which the 16th was. You can see the markings right next to 1st and 16th pins.

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FEATURES: Display construction16 Characters * 2 Lines Display modeTN/STN Display type..Positive Transflective Backlight..LED(B/5.0V) Viewing direction..6 oclock Operating temperature..Indoor Driving voltage.Single power Driving method1/16 duty,1/5 bias Type.COB (Chip On Board) Number of data line.8-bit parallel ConnectorPin
BLOCK DIAGRAM:-

TIMING DAIGRAM:VIRTUAL STREET

WRITE OPERATION

READ OPERATION

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Pin Description: Pin 1 and 2 are the power supply pins. They need to be connected to the negative rail and the positive rail of a +5v power supply respectively. To get a stable +5v Power supply, you can use a 7805 voltage regulator. It will regulate any voltage that you give it into +5v. Pin 3 is the contrast setting pin. It is said that it must be connected to a potentiometer to control the contrast. However, it works if you just connect a variable resistor in series with it to GND. The lower the resistance, the greater the contrast. Set it at around 1.5K 2K. If you set the value too low or short the pin directly to ground, you will see only dark boxes on the screen. You must set the voltage to around 1-1.5V for optimum contrast. Pins 4, 5 and 6 are control pins of the LCD. Pins 7 to 14 are the Data pins of the LCD. Pin 7 is the least significant bit and pin 14 is the most significant bit (MSB) of the data inputs. If you want to display some number or letter on the display, you have to input the appropriate codes for that character on these pins. These pins are also used for giving certain commands to the display like clearing the display or moving the cursor to a different location. Upon giving the correct signals to the 3 control pins, the character codes or the commands that you have given to the Data pins will be written to the display or executed by the LCD respectively. Pins 15 and 16: Most LCDs have a backlight. A backlight is a light within the LCD panel which makes seeing the characters on screen easier. When you leave your cell phone or mp3 player untouched for sometime, the screen goes dark. That is the backlight turning off. It is possible to use the LCD without the backlight as well. Many LCDs come without a backlight. If your LCD has only 14 pins, then it has no backlight. However, the working of the LCD still remains the same even if your LCD doesnt have a backlight. The Backlight is nothing but an LED. So, a resistor must be connected in series with it to limit the current. The allowable current is 100ma. Then it is best to have a variable resistor (or a transistor) and adjust the current till it is around 90mA.
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The RS Pin: The LCD has basically two operating modes: Instruction mode and Character Mode. Depending on the status of this pin, the data on the 8 data pins (D0-D7) is treated as either an instruction or as character data. You have to activate the command mode if you want to give an Instruction to the LCD. Example Clear the display, Move cursor to home etc. You have to activate the character mode if you want to tell the LCD to display some character. To set the LCD in Instruction mode, you set the 4th pin of the LCD (R/S) to GND. To put it in character mode, you connect it to Vcc. The Enable Pin The enable pin has a very simple function. It is just the clock input for the LCD. The instruction or the character data at the data pins (D0-D7) is processed by the LCD on the falling edge of this pin. The Enable pin should be normally held at Vcc by a pull up resistor. When a momentary button switch is pressed, the Pin goes low and back to high again when you leave the switch. Your instruction or character will be executed on the falling edge of the pulse. (i.e. the moment the switch closes) The RW Pin Generally, we always use the LCD to show things on the screen. However, in some rare cases, we may need to read from the LCD what it is displaying. In such cases, the R/W pin is used. For all practical purposes, the R /W pin has to be permanently connected to GND.

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Instruction Set for the LCD

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Heres the character code table for the LCD which shows the corresponding binary values for each character:

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GLOBAL SYSTEM FOR MOBILE COMMUNICATION (GSM):

GSM (Global System for Mobile Communications, originally Groupe Spcial Mobile), is a standard set developed by the European Telecommunications Standards Institute (ETSI) to describe protocols for second generation (2G) digital cellular networks used by mobile phones. It became the de facto global standard for mobile communications with over 80% market share.

GSM is worldwide standard that allows users of different operators to connect and to shares the services simultaneously. GSM has been the backbone of the phenomenal success in mobile telecommunication over the last decade. Now, atthe dawn of the era of true broadband services, GSM continues to evolve to meet new demands. One of GSM's great strengths is its international roaming capability, giving consumers a seamless service in about 160 countries. This has been a vital driver in growth, with around 300 million GSM subscribers currently in Europe and Asia. In the Americas, today's 7 million subscribers are set to grow rapidly, with market potential of 500 million in population, due to the introduction of GSM 800, which allows operators using the 800 MHz band to have access to GSM technology too.

The Europeans realized this early on, and in 1982 the Conference of EuropeanPosts and Telegraphs (CEPT) formed a study group called the Groupe SpcialMobile (GSM) to study and develop a pan-European public land mobile system.The proposed system had to meet certain criteria: good subjective speech quality, low terminal and service cost, support for international roaming, ability to support handheld terminals, support for range of new services and facilities spectral efficiency, and ISDN compatibility.

GSM is a standard for a Global System for Mobile communications. GlobalSystem for Mobile communications, a mobile phone system based on multipleradio cells (cellular mobile phone network). It has been agreed upon and iscompleted by ETSI, the European Telecommunications Standards Institute.

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Two Main Standards of GSM: 1.GSM 900 (global system for mobile communications in the 900 MHz band) 2.DCS 1800 (digital cellular system for the 1800 MHz band) GSM 900 is a designed for extensive radio coverage even in rural areas. DCS1800 is designed for radio coverage in areas with very high subscriber density.GSM is a global standard, GSM 900 being used in most European, Asian andpacific countries, GSM 1800 being used in the same place to increase thecapacity of the system, and GSM 1900 being used primarily in the US. In its simplest form, Global System for Mobile Communication (GSM) is a set of ETSI standards specifying the infrastructure for a digital cellular service. The Europe, Japan and Australia. The international designation of a public mobile radio network is PLMN (public land mobile network), as opposed to the PSTN (public switched telephone network).Several PLMN, which are designed on the basis of same standards, are compatible to each other. Therefore, a mobile subscriber can use the GSM/DCS specific mobile equipment and services in these compatible networks. Specifications and Characteristics for GSM: Frequency band - the frequency range specified for GSM is 1,850 to1,990 MHz (mobile station to base station). Duplex distance - the duplex distance is 80 MHz. Duplex distance is thedistance between the uplink and downlink frequencies. A channel has twofrequencies, 80 MHz apart. Channel separation - the separation between adjacent carrier frequencies. In GSM, this is 200 kHz. Modulation - Modulation is the process of sending a signal by changingthe characteristics of a carrier frequency. This is done in GSM viaGaussian minimum shift keying (GMSK). Transmission rate - GSM is a digital system with an over-the-air bit rateof 270 kbps. Access method - GSM utilizes the time division multiple access (TDMA)concept. TDMA is a technique in which several different calls may sharethe same carrier. Each call is assigned a particular time slot. Speech coder - GSM uses linear predictive coding (LPC). The purpose of LPC is to reduce the bit rate. The LPC provides parameters for a filter thatmimics the vocal tract. The signal passes through this filter, leaving behinda residual signal. Speech is encoded at 13 kbps.

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GSM ARCHITECTURE:

MS: The MS consists of the physical equipment used by the subscriber to access a PLMN for offered telecommunication services. Functionally, the MS includes a Mobile Termination (MT) and, depending on the services it can support, various Terminal Equipment (TE), and combinations of TE and Terminal Adaptor (TA) functions (the TA acts as a gateway between the TE and the MT) Various types of MS, such as the vehiclemounted station, portable station, or handheld station, are used. The MSs come in ve power classes which dene the maximum RF power level that the unit can transmit. Tables 5.1 and 5.2 provide the details of maximum RF power for various classes in GSM and DCS-1800. Vehicular and portable units can be either class I or class II, whereas handheld units can be class III, IV, and V. The typical classes are II and V. Table 5.3 provides the details of maximum RF power for GSM and DCS-1800 micro-BSs.

BSS: The BSS is the physical equipment that provides radio cover to prescribed geographical areas, known as the cells. It contains equipment required to communicate with the MS. Functionally, a BSS consists of a control function carried out by the BSC and a transmitting function performed by the BTS. The BTS is the radio transmission equipment and covers each cell. A BSS can serve several cells because it can have multiple BTSs. The BTS contains the Transcoder Rate Adapter Unit (TRAU). In TRAU, the GSM-specic speech encoding and decoding is carried out, as well as the rate adaptation function for data. In certain situations the TRAU is located at the MSC to gain an advantage of more compressed transmission between the BTS and the MSC.

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NSS: The NSS includes the main switching functions of GSM, databases required for the subscribers, and mobility management. Its main role is to manage the communications between GSM and other network users. Within the NSS, the switching functions are performed by the MSC. Subscriber information relevant to provisioning of services is kept in the HLR. The other database in the NSS is the VLR. The MSC performs the necessary switching functions required for the MSs located in an associated geographical area, called an MSC area.

The MSC monitors the mobility of its subscribers and manages necessary resources required to handle and update the location registration procedures and to carry out the handover functions. The MSC is involved in the interworking functions to communicate with other networks such as PSTN and ISDN. The interworking functions of the MSC depend upon the type of the network to which it is connected and the type of service to be performed. The call routing and control and echo control functions are also performed by the MSC.

The HLR is the functional unit used for management of mobile subscribers. The number of HLRs in a PLMN varies with the characteristics of the PLMN. Two types of information are stored in the HLR: subscriber information and part of the mobile information to allow incoming calls to be routed to the MSC for the particular MS. Any administrative action by the service provider on subscriber data is performed in the HLR. The HLR stores IMSI, MS ISDN number, VLR address, and subscriber data (e.g., supplementary services).

The VLR is linked to one or more MSCs. The VLR is the functional unit that dynamically stores subscriber information when the subscriber is located in the area covered by the VLR. When a roaming MS enters an MSC area, the MSC informs the associated VLR about the MS; the MS goes through a registration procedure. The registration procedure for the MS includes these activities: The VLR recognizes that the MS is from another PLMN. If roaming is allowed, the VLR nds the MSs HLR in its home PLMN. The VLR constructs a Global Title (GT) from the IMSI to allow signaling from the VLR to the MSs HLR via the PSTN/ISDN networks. The VLR generates a Mobile Subscriber Roaming Number (MSRN) that is used to route incoming calls to the MS. The MSRN is sent to the MSs HLR.

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The information in the VLR includes MSRN, TMSI, the location area in which the MS has been registered, data related to supplementary service, MS ISDN number, IMSI, HLR address or GT, and local MS identity, if used. The NSS contains more than MSCs, HLRs, and VLRs.

In order to deliver an incoming call to a GSM user, the call is rst routed to a gateway switch, referred to as the Gateway Mobile Service Switching Center (GMSC). The GMSC is responsible for collecting the location information and routing the call to the MSC through which the subscriber can obtain service at that instant (i.e., the visited MSC). The GMSC rst nds the right HLR from the directory number of the GSM subscriber and interrogates it. The GMSC has an interface with external networks for which it provides gateway function, as well as with the SS7 signaling network for interworking with other NSS entities.

Operation and Maintenance Subsystem (OMSS) : The OMSS is responsible for handling system security based on validation of identities of various telecommunications entities. These functions are performed in the Authentication Center (AuC) and EIR. The AuC is accessed by the HLR to determine whether an MS will be granted service. The EIR provides MS information used by the MSC. The EIR maintains a list of legitimate, fraudulent, or faulty MSs. The OMSS is also in charge of remote operation and maintenance functions of the PLMN. These functions are monitored and controlled in the OMSS. The OMSS may have one or more Network Management Centers (NMCs) to centralize PLMN control. The Operational and Maintenance Center (OMC) is the functional entity through which the service provider monitors and controls the system. The OMC provides a single point for the maintenance personnel to maintain the entire system. One OMC can serve multiple MSCs.

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Advantages of GSM: GSM is mature; this maturity means a more stable network with robustfeatures Less signal deterioration inside buildings Ability to use repeaters Talk-time is generally higher in GSM phones due to the pulse nature of transmission The availability of Subscriber Identity Modules allows users to switchnetworks and handsets at will GSM covers virtually all parts of the world so international roaming is not aproblem. The subscriber can enjoy the broadest international coverage. It ispossible with the GSM roaming service. Good coverage indoors on 850/900 MHz. Repeaters possible. 35 km hard limit. Very good due to simple protocol, good coverage and mature, power-efficient chipsets.

Disadvantages of GSM: Pulse nature of TDMA transmission used in 2G interferes with someelectronics, especially certain audio amplifiers. 3G uses W-CDMA now. Intellectual property is concentrated among a few industry participants,creating barriers to entry for new entrants and limiting competition amongphone manufacturers. GSM has a fixed maximum cell site range of 35 km, which is imposed bytechnical limitations.

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GSM MODEM (SIM 300):

INTRODUCTION:

This document describes the hardware interface of the SIMCOM SIM300 module that connects to the specific application and the air interface. As SIM300 can be integrated with a wide range of applications, all functional components of SIM300 are described in great detail. This document can help you quickly understand SIM300 interface specifications, electrical and mechanical details. With the help of this document and other SIM300 application notes, user guide, you can use SIM300 module to design and set-up mobile applications quickly.

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Features:

Quad Band GSM/GPRS 850/900/1800/1900 Mhz GPRS multi-slot class 10/8 GPRS Mobile station class B Compliant to GSM Phase 2/2+ o Class 4 (2W@850/900Mhz) o Class 1(1W@1800/1900Mhz)

Control via AT commands(GSM 07.07, 07.05 and enhanced AT commands) Operation Temperature(-20 deg C to +55 deg C)

Interfaces:

RS-232 through D-TYPE 9 pin connector, Serial port baud rate adjustable 1200 to115200 bps (9600 default) Stereo connector for MIC & SPK Power supply through DC socket SMA antenna connector Push switch type SIM holder LED status of GSM / GPRS module

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PRODUCT CONCEPT:

Designed for global market, SIM300 is a Tri-band GSM/GPRS engine that works on frequencies EGSM 900 MHz, DCS 1800 MHz and PCS1900 MHz. SIM300 provides GPRS multi-slot class 10 capability and support the GPRS coding schemes CS-1, CS-2, CS-3 and CS-4. With a tiny configuration of 40mm x 33mm x 2.85 mm , SIM300 can fit almost all the space requirement in your application, such as Smart phone, PDA phone and other mobile device

The physical interface to the mobile application is made through a 60 pins board-to-board connector, which provides all hardware interfaces between the module and customers boards except the RF antenna interface.

The keypad and SPI LCD interface will give you the flexibility to develop customized applications. Two serial ports can help you easily develop your applications. Two audio channels include two microphones inputs and two speaker outputs. This can be easily configured by AT command.

SIM300 provide RF antenna interface with two alternatives: antenna connector and antenna pad. The antenna connector is MURATA MM9329-2700. And customers antenna can be soldered to the antenna pad. The SIM300 is designed with power saving technique, the current consumption to as low as 2.5mA in SLEEP mode.

The SIM300 is integrated with the TCP/IP protocolExtended TCP/IP AT commands are developed for customers to use the TCP/IP protocol easily, which is very useful for those data transfer applications.

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SIM300 key features at a glance:

Feature Power supply Power saving Frequency bands Implementation Single supply voltage 3.4V 4.5V Typical power consumption in SLEEP mode to 2.5mA -band: EGSM 900, DCS 1800, PCS 1900. The band can be set by AT COMMAND, and default band is EGSM 900 and DCS 1800.

GSM class Transmit power GPRS connectivity

Small MS

-slot class 10

Temperature range and +55C to +70C

-20C to +55C -25C to -20C -40C to +80C

DATA GPRS: CSD: CSD:

85.6 kbps GPRS data downlink transfer: max. 85.6 kbps GPRS data uplink transfer: max. 42.8 kbps Coding scheme: CS-1, CS-2, CS-3 and CS-4 SIM300 supports the protocols PAP (Password Authentication Protocol) usually used for PPP connections. The SIM300 integrates the TCP/IP protocol. Support Packet Switched Broadcast Control Channel (PBCCH) CSD transmission rates: 2.4, 4.8, 9.6, 14.4 kbps, non-transparent Unstructured Supplementary Services Data (USSD) support

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SMS

MT, MO, CB, Text and PDU mode SMS storage: SIM card Support transmission of SMS alternatively over CSD or GPRS. User can choose preferred mode. Group 3 Class 1 Supported SIM card: 1.8V ,3V Connected via 50 Ohm antenna connector or antenna pad Speech codec modes: Half Rate (ETS 06.20) Full Rate (ETS 06.10) Enhanced Full Rate (ETS 06.50 / 06.60 / 06.80) Echo suppression Serial Port 1 Seven lines on Serial Port Interface Serial Port 1 can be used for CSD FAX, GPRS service and send

FAX SIM interface External antenna Audio features

Two serial interfaces

Application Interface: All hardware interfaces except RF interface that connects SIM300 to the customers cellular application platform is through a 60-pin 0.5mm pitch board-to-board connector. Sub-interfaces included in this board-toboard connector are described in detail in following chapters: Power supply Dual serial interface Two analog audio interfaces SIM interface

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Examples for send and receive SMS: For sending SMS in text Mode: AT+CMGF=1 press enter AT+CMGS=mobile number press enter Once The AT commands is given > prompt will be displayed on the screen. Type the message to sent via SMS. After this, press ctrl+Z to send the SMS. If the SMS sending is successful, ok will be displayed along with the message number.

For reading SMS in the text mode: AT+CMGR= no. Number (no.) is the message index number stored in the sim card. For new SMS, URC will be received on the screen as +CMTI: SM no. Use this number in the AT+CMGR number to read the message.

Sample Code for Interfacing with microcontroller for sending SMS: void main() { initADC(); // setup ADC serialInit(); // setup 9600 serial communication while(1) { printf("AT\n"); delayms(2000); // 2 sec delay printf("AT+CMGF=1\n"); delayms(2000); // 2 sec delay printf("AT+CMGS=\"09825858509\"\n"); delayms(2000); // 2 sec delay printf ("CH#1=%bu ", getADC(1)); // sends ADC value as SMS putchar(26); // transmit message delayms(20000); // 20 sec delay }}

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LCD interface: SIM300 provides a serial LCD display interface that supports serial communication with LCD device. These are composite pins that can be used as GPIO ports or LCD display interface according to your application. When use as LCD interface, the following table is the pin define. LCD interface timing should be united with the LCD device.

PIN define of LCD interface: Pin (On board-to-board connector) 18 20 22 24 26 Name SPI_DATA SPI_CLK SPI_CS SPI_D/C SPI_RST Function Display data output Display clock for LCD Display enable Display data or address select LCD reset

Network status indication LED lamp: The PIN 30 on the board-to-board connector can be used to drive a network status indication LED lamp. The working state of this pin is listed in following table:

Working state of network status indication LED pin State Off 64ms On/ 800ms Off 64ms On/ 3000ms Off 64ms On/ 300ms Off SIM300 function SIM300 is not running SIM300 does not find the network SIM300 find the network GPRS communication

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We provide a reference circuitry for you, show as following Figure:

Power supply: The power supply of SIM300 is from a single voltage source of VBAT= 3.4V...4.5V. In some case, the ripple in a transmit burst may cause voltage drops when current consumption rises to typical peaks of 2A, So the power supply must be able to provide sufficient current up to 2A. For the VBAT input, a local bypass capacitor is recommended. A capacitor (about 100F, low ESR) is recommended. Multi-layer ceramic chip (MLCC) capacitors can provide the best combination of low ESR and small size but may not be cost effective. A lower cost choice may be a 100 F tantalum capacitor (low ESR) with a small (1 F to 10F) ceramic in parallel, which is illustrated as following figure. And the capacitors should put as closer as possible to the SIM300 VBAT pins. The following figure is the recommended circuit.

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The following figure is the VBAT voltage ripple wave at the maximum power transmit phase, the test condition is VBAT=4.0V, VBAT maximum output current =2A, CA=100 F tantalum capacitor (ESR=0.7) and CB=4.7F.

FigureVBAT ripple wave at the maximum power transmit phase

Power up and power down scenarios: Turn on SIM300: SIM300 can be turned on by various ways: Via PWRKEY pin: starts normal operating mode Via RTC interrupt: starts ALARM modes Note: Only enter AT command through serial port after SIM300 is power on and Unsolicited Result Code RDY is received from serial port.

Turn on SIM300 using the PWRKEY pin (Power on): You can turn on the SIM300 by driving the PWRKEY to a low level voltage for period time. The power on scenarios illustrate as following figure.

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When power on procedure complete, SIM300 will send out following result code to indicate the module is ready to operate: RDY Turn on SIM300 using the RTC (Alarm mode): Alarm mode is a power-on approach by using the RTC. The alert function of RTC makes the SIM300 wake up while the module is power off. In alarm mode, SIM300 will not register to GSM network and the software protocol stack is close. Thus the parts of AT commands related with SIM card and Protocol stack will not accessible, and the others can be used as well as in normal mode. Use the AT+CALARM command to set the alarm time. The RTC remains the alarm time if SIM300 was power down by AT+CPOWD=1 or by PWRKEY pin. Once the alarm time expires and executed, SIM300 goes into the Alarm mode. In this case, SIM300 will send out an Unsolicited Result Code (URC): RDY ALARM MODE During Alarm mode, using AT+CFUN command to query the status of software protocol stack; it will return 0 which indicates that the protocol stack is closed. Then after 90S, SIM300 will power down automatically. However, during Alarm mode, if the software protocol is started by AT+CFUN=1, 1 command, the process of automatic power down will not available. In ALARM mode, driving the PWRKEY to a low level voltage for a period will cause SIM300 to power down (Please refer to the power down scenarios in 3.3.2.1). The table follow briefly summarizes the AT commands that are used usually during alarm mode, for details of the instructions refer to document: AT commands used in Alarm mode AT USE command AT+CALARM Set alarm time AT+CCLK Set data and time of RTC AT+CPOWD Power down AT+CFUN Start or close the protocol stack

Turn off SIM300: Following procedure can be used to turn off the SIM300: Normal power down procedure: Turn off SIM300 using the PWRKEY pin Normal power down procedure: Turn off SIM300 using AT command Under-voltage automatic shutdown: Takes effect if Under-voltage is detected Over-temperature automatic shutdown: Takes effect if Over-temperature is detected

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Turn off SIM300 using the PWRKEY pin (Power down): You can turn off the SIM300 by driving the PWRKEY to a low level voltage for period time. The power down scenarios illustrate as following Figure. This procedure will let the module to log off from the network and allow the software to enter into a secure state and save data before completely disconnect the power supply. Before the completion of the switching off procedure the module will send out result code: POWER DOWN After this moment, no any AT commands can be executed. Module enters the POWER DOWN mode, only the RTC is still active. POWER DOWN can also be indicated by VDD_EXT pin, which is a low level voltage in this mode. Figure

Turn off SIM300 using AT command: You can use an AT command AT+CPOWD=1 to turn off the module. This command will let the module to log off from the network and allow the software to enter into a secure state and safe data before completely disconnect the power supply. Before switching off the module will send out result code: POWER DOWN After this moment, no any AT commands can be executed. Module enters the POWER DOWN mode, only the RTC is still active. POWER DOWN can also be indicated by VDD_EXT pin, which is a low level voltage in this mode.

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AUDIO VISUAL ALARM

Transistor BC547The BC547 transistor is an NPN Epitaxial Silicon Transistor. The BC547 transistor is a general-purpose transistor in small plastic packages. It is used in general-purpose switching and amplification BC847/BC547 series 45 V, 100 mA NPN general-purpose transistors.

FIG 3.8(a): BC 547 TRANSISTOR PINOUT

The BC547 transistor is an NPN bipolar transistor, in which the letters "N" and "P" refer to the majority charge carriers inside the different regions of the transistor. Most bipolar transistors used today are NPN, because electron mobility is higher than whole mobility in semiconductors, allowing greater currents and faster operation. NPN transistors consist of a layer of P-doped semiconductor (the "base") between two N-doped layers. A small current entering the base in common-emitter mode is amplified in the collector output. In other terms, an NPN transistor is "on" when its base is pulled high relative to the emitter. The arrow in the NPN transistor symbol is on the emitter leg and points in the direction of the conventional current flow when the device is in forward active mode. One mnemonic device for identifying the symbol for the NPN transistor is "not pointing in." An NPN transistor can be considered as two diodes with a shared anode region. In typical operation, the emitter base junction is forward biased and the base collector junction is reverse biased. In an NPN transistor, for example, when a positive voltage is applied to the base emitter junction, the equilibrium between thermally generated carriers and the repelling electric field of the depletion region becomes unbalanced, allowing thermally excited electrons to inject into the base region. These electrons wander (or "diffuse") through the base from the region of high concentration near the emitter towards the region of low concentration near the collector. The electrons in the base are called minority carriers because the base is doped p-type which would make holes the majority carrier in the base.
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POWER SUPPLY

Power supply is the major concern for every electronic device. Since the controller and other devices used are low power devices there is a need to step down the voltage and as well as rectify the output to convert the output to a constant dc.

3.1 BLOCK DIAGRAM

Fig 3.1.1: Block Diagram of Regulated Power Supply

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3.2 COMPONENTS OF POWER SUPPLY Transformer Transformer is a device used to increment or decrement the input voltage given as per the requirement. The transformers are classified into two types depending upon there functionality Step up transformer Step down transformer Here we use a step down transformer for stepping down the house hold ac power supply i.e. the 230240v power supply to 5V. We use a 5-0-5 v center tapped step down transformer.

Rectifier The output of the transformer is an ac and should be rectified to a constant dc for this it is necessary to feed the output of the transformer to a rectifier. The rectifier is employed to convert the alternating ac to a constant dc. There are many rectifiers available in the market some of them are

Half wave rectifier Full wave rectifier Bridge rectifier

The rectification is done by using one or more diodes connected in series or parallel. If only one diode is used then only first half cycle is rectified and it is termed as half wave rectification and the rectifier used is termed as half wave rectifier. If two diodes are employed in parallel then both positive and negative half cycles are rectified and this is full wave rectification and the rectifier is termed as full wave rectifier. If the diodes are arranged in the form of bridge then it is termed as Bridge rectifier, it acts as a full wave rectifier. In our project we make use of the rectifiers which are readily available in the market in the form of integrated chips (I.Cs).
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Voltage Regulator The voltage regulator is used for the voltage regulation purpose. We use IC 7805 voltage regulator. The IC number has a specific significance. The number 78 represents the series while 05 represent the output voltage generated by the IC.

Light Emitting Diode We employ a light emitting diode for testing the functionality of the power supply circuit. Here we use a 5 volts LED which is connected in series with the power supply circuit it verifies the functioning of the power supply. LEDs are also employed in other areas for many purposes. The fallowing are the advantages of using LEDs.

It helps us while troubleshooting the device i.e. when the device is malfunctioning it would be easy to detect where the actual problem a raised. LED employed with microcontroller verifies whether data is being transmitted. It verifies the functionality of the power supply.

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RESISTORS

A resistor is a passive two-terminal electrical component that implements electrical resistance as a circuit element. The current through a resistor is in direct proportion to the voltage across the resistor's terminals. This relationship is represented by Ohm's law:

where I is the current through the conductor in units of amperes, V is the potential difference measured across the conductor in units of volts, and R is the resistance of the conductor in units of ohms. The ratio of the voltage applied across a resistor's terminals to the intensity of current in the circuit is called its resistance, and this can be assumed to be a constant (independent of the voltage) for ordinary resistors working within their ratings. Resistors are common elements of electrical networks and electronic circuits and are ubiquitous in electronic equipment. Practical resistors can be made of various compounds and films, as well as resistance wire (wire made of a high-resistivity alloy, such as nickel-chrome). Resistors are also implemented within integrated circuits, particularly analog devices, and can also be integrated into hybrid and printed circuits. The electrical functionality of a resistor is specified by its resistance: common commercial resistors are manufactured over a range of more than nine orders of magnitude. When specifying that resistance in an electronic design, the required precision of the resistance may require attention to the manufacturing tolerance of the chosen resistor, according to its specific application. The temperature coefficient of the resistance may also be of concern in some precision applications. Practical resistors are also specified as having a maximum power rating which must exceed the anticipated power dissipation of that resistor in a particular circuit: this is mainly of concern in power electronics applications. Resistors with higher power ratings are physically larger and may require heat sinks. In a high-voltage circuit, attention must sometimes be paid to the rated maximum working voltage of the resistor.

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PROGRAM
#include "main.h" #include "clcd.h" #include "softUart.h" #include <util/delay.h> #include <stdio.h> #include <string.h> #include <avr/interrupt.h> #include <stdlib.h>

#define debug 1 #define RESCUE_NUMBER "+919589852261" #define BEEP_ON (PORTC |= 0x55) #define BEEP_OFF (PORTC &= ~0x55)

volatile char fix_status=0, lock_flag=0, d0, d1, lat_cross, long_cross, fset=0; volatile char InpBuf[YAB], num_buf[NUM], latitude[15], longitude[15], sampleTime[15], nos[5], msgNum[5]; volatile unsigned short number_of_satellite=0, lock_radius; volatile long lockLat,lockLong;

static int put_char(char c, FILE *stream); static FILE mystdout = FDEV_SETUP_STREAM(put_char,NULL,_FDEV_SETUP_WRITE);

long LocationMapper(char * loc){ char loci[15], *cptr; long answer;

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strcpy(loci,loc); cptr=strtok(loci,"."); answer = atol(cptr); cptr=strtok(NULL,"."); answer *= 10000; answer += atol(cptr); return answer;

} void SendLocationRescue(void) { char msg[64]; while(!fix_status) ; strcpy((char*)num_buf,RESCUE_NUMBER); sprintf(msg,"Help \r\nLat=%s\r\nLong=%s",latitude,longitude); send_response(msg); lockLat = LocationMapper((char*)latitude); lockLong = LocationMapper((char*)longitude); lock_flag = 1; _delay_ms(1000); } void init_key(void) { MCUCSR |= ( 1<< ISC2); GICR |= (1 << INT2);
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} ISR( INT2_vect ){ /* This is key sensing part */ char ch; lcd_goto(0,0); if((ch=(PIND & 0xE0))){ //This indicates a fault condition if((( ch >> 5 )+'0')=='1') { /*----------Below lines are simulation they need to be removed from final code---------------- IMP REMOVE THESE THREE LINES IN FINAL CODE*/ //fix_status=1; //strcpy((char*)latitude,"2309.2089"); //strcpy((char*)longitude,"7957.0019"); /*===================================Here ends the simulation code================================*/ lcd_clear(); Lcd_Out(1,5,"Sending"); Lcd_Out(2,1,"Emergency MSG !"); SendLocationRescue(); fset=0; }

}else{

ch = PINB & 0xF8; lcd_putchar(( ch >> 3 )+'A');

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//key_state_switcher(( ch >> 3 )+'A'); }

} int main(void){ char aMsg, msg_mem[MAX_MEM];//, localBuf[64]; unsigned char gSet=0; long cur_lat, cur_long; short diff,i=0; init(); sei();

while(1){ if( fix_status ){ aMsg = msg_in_memory(); if((aMsg > 0 )&&(aMsg < 40)){ fset = 0; fast_lcd_puts("Packet Id:"); if(debug){ Lcd_Out(2,1,(char *)msgNum); _delay_ms(2000); } fast_lcd_puts("Reading Msg:");

read_msg_in_memory((char*) msg_mem);
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//flush((char*)num_buf,sizeof(num_buf)); //*** HERE WE NEED TO HANDLE A SPECIAL CASE i.e Msg from NetworkProvider***// if(strlen((char*)num_buf) < 10){ //Delete the message delete_msg_in_mem(aMsg); continue; } //** Handle Finishes Here**// if(debug){ Lcd_Out(2,1,(char *)num_buf); _delay_ms(2000); // fast_lcd_puts((char*)msg_mem); // _delay_ms(2000); }

response_logic((char*)msg_mem); /*if(debug){ fast_lcd_puts((char*)msg_mem); _delay_ms(2000); }*/ send_response((char*)msg_mem);

delete_msg_in_mem(aMsg); /*if(debug){ lcd_clear();

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//itoa(aMsg,num_buf); sprintf((char*)num_buf,"%d",aMsg); Lcd_Out(1,1,(char*)num_buf); temp = msg_in_memory(); //itoa(temp,num_buf); sprintf((char*)num_buf,"%d",temp); Lcd_Out(2,1,(char*)num_buf); _delay_ms(3000); } temp = msg_in_memory(); if(temp == aMsg){ delete_msg_in_mem(temp); if(debug) fast_lcd_puts("Deleted msg !"); }*/ }else{ if(debug && !fset) { lcd_clear(); Lcd_Out(1,2,"Virtual Street"); Lcd_Out(2,1,"-- No Packets --"); fset = 1; }

}
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} for(i=4;i>0;i--){ if(get_current_GPS_Status()){ //sprintf(localBuf,"l%s%c l%s%c %s f%d",latitude, d0, longitude, d1,nos,fix_status); //fast_lcd_puts(localBuf); //printf("%s",localBuf);

} }

latitude[9] = '\0'; longitude[10] = '\0'; if(lock_flag){ cur_lat = LocationMapper((char*)latitude); cur_long = LocationMapper((char*)longitude); diff = lockLat - cur_lat; if((diff > lock_radius) || (diff < -lock_radius)) lat_cross=1; else lat_cross=0;

diff = lockLong - cur_long; if((diff > lock_radius) || (diff < -lock_radius)) long_cross=1; else
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long_cross=0;

if(long_cross || lat_cross) BEEP_ON; else BEEP_OFF; if((!gSet) && fix_status){ Lcd_Out(2,1," -- GPS FiX -- "); _delay_ms(2000); fset=0; gSet = 1; } }

_delay_ms(200);

} }

unsigned char get_current_GPS_Status(void){ unsigned short i=0; char temp, *aptr, *cptr, *dptr, *fptr, *nptr; char myBuf[128]; i=0;

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do{ temp = getch_soft(); }while(temp != '$');

while(temp != '\n'){ myBuf[i++] = temp; temp = getch_soft(); } myBuf[i]='\0';

if(strncmp(myBuf,"$GPGGA",6)==0){

if(strlen(myBuf) > 50){ //fast_lcd_puts(myBuf); aptr = strtok(myBuf,",");

aptr = strtok(NULL,","); sprintf((char*)sampleTime,"%s",aptr); //Time

cptr = strtok(NULL,","); sprintf((char*)latitude,"%s",cptr); //Latitude

dptr = strtok(NULL,","); d0 = *dptr;

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//This will be oberwritten

printf("2%c\r",d0);

//

dptr = strtok(NULL,","); sprintf((char*)longitude,"%s",dptr); //Longitude

d1 = *(strtok(NULL,",")); printf("4%c\r",d1);

//

fptr = strtok(NULL,","); fix_status = *fptr-'0';

nptr = strtok(NULL,","); sprintf((char*)nos,"%s",nptr);

return fix_status;

}else return 0; } else return 0; }

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void init(void){

init_lcd(); extInterruptInit(); timerInit(); init_key(); uart_init(); stdout = &mystdout; printf("\r\nATE0\r\n"); _delay_ms(250); printf("\r\nATV0\r\n"); Lcd_Out(1,2,"Virtual Street"); Lcd_Out(2,1,"Awaiting GPS Fix"); DDRC = 0x55; //_delay_ms(3000); }

void init_Buf_Struct(pVal *dataS){ dataS->head = 0; dataS->tail = 0; dataS->activity = 0; dataS->mFlags = 0; }

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static int put_char(char ch, FILE *stream){ while(!(UCSRA & (1<<UDRE))) ; UDR = ch; return 0; } //Deprecated to make more programming space //Not Too Cool huh.. ?

void uart_init(void) { UCSRA = 0; UCSRB = ( 1 << TXEN )|( 1 << RXEN );//|(1<<RXCIE); UCSRC = ( 1 << URSEL)|( 3 << UCSZ0); UBRRH = 0; UBRRL = 103; UBRR = 51 } /// 103 UBRR means 9600 @ 16Mhz.. If required 19200 baud then use

void flush(char *cptr, unsigned short count){ while(count > 0){ *cptr++ = 0; count -= 1; } } unsigned char msg_in_memory(void){
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unsigned char temp;char temp2=0, *sp; unsigned short i=0;

printf("AT+CPMS?\r\n"); flush((char*)InpBuf,128); flush((char*)msgNum,5);

//UART1_Read_Text(InpBuf, "0\r", 100); //*--------------------------------*// temp = getch(); while(!((temp =='\n') &&(temp2=='\r'))){ InpBuf[i++] = temp; temp2 = temp; temp = getch(); } //printf("e"); temp = getch(); while(!((temp =='\n') &&(temp2=='\r'))){ InpBuf[i++] = temp; temp2 = temp; temp = getch(); } //printf("f");
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temp = getch(); while(!((temp =='\r') &&(temp2=='0'))){ //InpBuf[i++] = temp; temp2 = temp; temp = getch(); } //printf("g"); //*--------------------------------*// sp = (char*)InpBuf; while(isChar(*sp++)) ; *sp = '\0'; sp = strchr((char*)InpBuf,','); if(sp){ sp++; temp = 0; while(*sp != ','){ msgNum[temp++] = *sp ; sp+=1; }

msgNum[temp]='\0'; //update_lcd((char *)msgNum); return atoi((char*)msgNum); } return 0; } void read_msg_in_memory(char *mems){

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char temp, *sp; unsigned short i=0; //ASCii rep of msg to be read is already in the memory printf("AT+CMGR="); printf("%s",msgNum); printf("\r\n");

flush((char*)mems,255); flush((char*)InpBuf,128);

//UART1_Read_Text(InpBuf, "\r\n", 100); temp = getch(); while(temp != '\n'){ temp = getch(); } //UART1_Read_Text(InpBuf, "\r\n", 100); temp = getch(); while(temp != '\n'){ InpBuf[i++] = temp; temp = getch(); }

//UART1_Read_Text(msg_mem, "0\r", 100);

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i=0; temp = getch(); while(temp != '\r'){ mems[i++] = temp; temp = getch(); }

//printf("x");

//update_lcd((char *)InpBuf); //Delay_ms(2000); //update_lcd((char *)msg_mem); sp = strchr((char*)InpBuf,','); if(sp){ //TODO: read in senders number ..Done flush((char*)num_buf,sizeof(num_buf)); i = 0; sp += 2; while(*sp != '"') num_buf[i++] = *sp++; num_buf[i] = '\0'; } //printf("%s",num_buf); } void delete_msg_in_mem(unsigned char msg_number){
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char temp; //itoa(i,digIt);

flush((char*)InpBuf,128); // // // // // strcpy((char*)InpBuf,"AT+CMGD="); UART1_Write_Text("AT+CMGD="); strcat(InpBuf,digIt); strcat(InpBuf,"\r\n"); UART1_Read_Text(InpBuf, "0\r", 10);

printf("AT+CMGD=%d\r\n",msg_number); //UART1_Write_Text(InpBuf); //UART1_Read_Text(InpBuf, "0\r", 10); temp = getch(); while(temp != '\r'){ temp = getch(); }

} void response_logic(char * msgmem){ /* @TODO : compare input buf with predefined stuff ..Done */ char *temp; temp = strstr((char*)msgmem,"path"); if(temp){ temp = strtok((char*)msgmem," ");
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temp = strtok(NULL," "); if(temp){ lock_radius = atoi(temp); }else lock_radius=5;

sprintf(msgmem,"Locked \r\nlat=%ld\r\nlong=%ld\r\nradius=%d",lockLat,lockLong,lock_radius); }else{ temp = strstr((char*)msgmem,"locate"); if(temp){ sprintf(msgmem,"current location is \r\nLat=%s\r\nLong=%s",latitude,longitude); }else{ sprintf(msgmem,"Unknown Request !"); } }

} void send_response(char * msg_mem){ char temp,temp2=0; printf("AT+CMGS=\""); printf("%s",num_buf); printf("\"\r\n"); temp = getch(); while(temp != ' '){ temp2 = temp;
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temp = getch(); } if(temp2 == '>') { printf("%s",msg_mem); //UART1_Read_Text(InpBuf, "> ", 255); //UART1_Write_Text(msg); _delay_ms(500); printf("%c",0x1A); //_delay_ms(200); } else{ lcd_clear(); Lcd_Out(1,2,"Error Sending"); Lcd_Out(2,4,"Message!"); } } char getch(void){ while(!(UCSRA & (1 << RXC))) ; return UDR; } unsigned short isChar(char cp){ if((cp > 0x1F ) &&( cp < 127 )) return 1;
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else{ if((cp == '\r') || (cp == '\n')) return 1; } return 0; }

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ADVANTAGES Fast speed. Leads us in right direction. Helps in improving maping skills. Makes navigation easier. Provides us with continous communication. Accurate upto 5m range.

DISADVANTAGES: Doesnt work inside metal chambers (i.e buildings). Takes 3-4 second time to detect error in position.

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APPLICATIONS
Military:- Due to its capability of finding the way in an completely unoccupied land and continous communication from base station can make it possible to be used in some of the military applications. Marine,aeronautical and terrestrial navigation:-All the three require a good knowledge of the directions at any point of time.Since showing the direction is one of then key features incorporated in our project thus making marine.aeronotical and terrestrial navigation possible. Disaster relief:-Virtual street can help in disaster relief as well by forming a virtual path to the place which may have got distructed by the disaster. Surveying:-Surveying the area can include mountain,forest any kind of land.So the virtual street can help us in surveying the new places and our location can also be made secure by continous communication with the base station. Shipping:-During shipping also it is very necessary that we must have a good knowledge of the directions and a continuous communication should be maintained with the base station.Thus virtual street provides us with the ease in shipping.

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CONCLUSION
In this project we are making use of a GPS receiver for communication purpose. We are going to construct the virtual street with GPS and GSM module for military applications and navigations. The LCD displays the latitude and longitudes, distance and radius of the street. This project can develop a virtual street which acts similar to the physical path and has got the extra feature of providing buzzer sound in case if person deviates from the path. By this we can completely design our own path anywhere on the earth irrespective of the slope, hill, steep and above water surfaces etc.

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DATASHEETS L7800 SERIES

POSITIVE VOLTAGE REGULATORS
OUTPUT CURRENT TO 1.5A OUTPUT VOLTAGES OF 5; 5.2; 6; 8; 8.5; 9; 10; 12; 15; 18; 24V THERMAL OVERLOAD PROTECTION SHORT CIRCUIT PROTECTION OUTPUT TRANSITION SOA PROTECTION

DESCRIPTION The L7800 series of three-terminal positive regulators is available in TO220, TO-220FP, TO-220FM, TO-3 and D2PAK packages and several fixed output voltages, making it useful in a wide range of applications. These regulators can provide local on-card regulation, eliminating the distribution problems associated with single point regulation. Each type employs internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltage and currents.

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Table 1: Absolute Maximum Ratings

Table 2: Thermal Data

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SINGLE PHASE BRIDGE RECTIFIER

DF005 THRU DF10 DB101 THRU DB107

VOLTAGE RANGE 50 to 1000 Volts CURRENT 1.0 Ampere

FEATURES: Glass passivated chip junction High forward surge current capability Ideal for printed circuit board High temperature soldering guaranteed: 260/10 seconds at terminals

MECHANICAL DATA Case: Transfer molded plastic Epoxy: UL94V-0 rate flame retardant Terminals solderable per MIL-STD202E method 208C Polarity: Molded on body Mounting position: Any Weight: 0.04 ounce, 1.0 gram

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MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS Ratings at 25ambient temperature unless otherwise specified Single Phase, half wave, 60Hz, resistive or inductive load For capacitive load derate current by 20%

RATING AND CHARACTERISTIC CURVES

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Piezoelectric Buzzer

Features
They can be used with automated inserters. Moisture-resistant models are also available. The lead wire type(PS1550L40N) with both-sided adhesive tape installed easily is prepared. The PS series are high-performance buzzers that employ unimorph piezoelectric elements and are designed for easy incorporation into various circuits. They feature extremely low power consumption in comparison to electromagnetic units. Because these buzzers are designed for external excitation, the same part can serve as both a musical tone oscillator and a buzzer.

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NEO-6 u-blox 6 GPS Modules

GPS PERFORMANCE

BLOCK DIAGRAM

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BIBLIOGRAPHY
References Why Did the Department of Defense Develop GPS?" http://www.trimble.com/gps/whygps.shtml#0. Retrieved 2010-01-13. Trimble Navigation Ltd.

"A Guide to the Global Positioning System (GPS) - GPS Timeline". Radio Shack. http://support.radioshack.com/support_tutorials/gps/gps_tmline.htm. Retrieved 2010-01-14.

Daly, P.. "Navstar GPS and GLONASS: global satellite navigation systems". IEEE. http://ieeexplore.ieee.org/iel1/2219/7072/00285510.pdf?arnumber=285510.

The Global Positioning System by Robert A. Nelson Via Satellite, November 1999

Web References http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en010296 http://www.howstuffworks.com http://en.wikipedia.org/wiki/Gps http://www.8051projects.com www.csiro.au/science/Virtual-Fencing-Project.html

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