Filters

Polyphase Filter Design Methodology for Wireless communication Applications 219
X

PoIyphase FiIter Design MethodoIogy for
WireIess communication AppIications

Iayrouz Haddad, Lakhdar Zad, WencesIass Rahajandraile
and Oussana Irioui
|M2NP - Unitcrsi|q cf Prctcncc
Marsci||c - |rancc

1. Introduction

The groving vireIess connunicalion narkel has generaled increasing inleresl in highIy
inlegraled circuils. This has leen a reIenlIess pressure for Iov cosl, Iov pover and snaII
size of lransceivers. Al lhe sane line, lhe energenl noliIe connunicalions require high-
speed dala lransnission and high dala-rale syslens. Ior inslance, lhe ILLL 8O2.11a/g
vireIess slandards, vhich incorporale OIDM (OrlhogonaI Irequency Division
MuIlipIexing) noduIalion, are alIe lo provide up lo 54Mlps. This has Ied lo nany
inprovenenls in design and deveIopnenl of circuil conponenls and lransceiver
archileclures.
Irogress in siIicon inlegraled circuil lechnoIogy and innovalions in lheir design have
enalIed noliIe producls and services. In nosl currenl designs, lhe anaIog parl of a receiver
uses nuIlipIe inlegraled circuils vhich nay have leen inpIenenled in CaIIiun Arsenide
(CaAs), SiIicon Cernaniun (SiCe) or lipoIar processes. They offer lhe lesl perfornance in
lerns of speed, noise sensilivily and conponenl nalching. InpIenenling siniIar circuils in
CMOS processes vilh lhe sane perfornances is sliII chaIIenging lecause of ils Iov process
loIerances, parasilic effecls and Iov quaIily faclor passive conponenls. Hovever, CMOS
process offers high densily of inlegralion and Iov consunplion naking il a good candidale
for vireIess connunicalions (MikkeIsen, 1998).
In radiofrequency (RI) receivers, frequency dovn-conversion is an essenliaI operalion. Il
consisls on lhe lransIalion of lhe inconing RI signaI lo a Iover frequency caIIed lhe
inlernediale frequency (II). This is lypicaIIy perforned ly nixing lhe anpIified RI signaI
vilh lhe IocaI osciIIalor (LO) signaI. The II is defined as
f
II
=|f
RI
-f
LO
| (1)
Hovever, lhis frequency lransIalion provides a serious prolIen of frequency inage
rejeclion (Razavi (a), 1997). Hence, cIassicaI vireIess receiver archileclures have leen
connonIy inpIenenled using lhe superhelerodyne lopoIogy, in vhich lhe inage
suppression is done ly off-chip devices such as discrele conponenls, ceranic or surface
acouslic vave (SAW) fiIlers (Razavi, 1996, Sanavali el aI, 2OOO, Macedo & CopeIand, 1998).
They have high quaIily faclor and good Iinearily, hovever, lheir high cosl and lheir non
11
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Mobile and Wireless Communications: Network layer and circuit level design 220

inlegralion nake lhen Iess allraclive lo le used in lhe energing inlegraled receivers (Razavi
(a), 1997, Huang el aI, 1999).
To overcone lhis dravlack, zero-II receiver archileclures, in vhich lhe RI signaI is
lransposed direclIy lo laseland, have leen proposed (Razavi (l), 1997, ehzad el aI, 2OO3).
Since lhe LO is al lhe sane frequency as lhe RI inpul, lhis archileclure renoves lhe II and
lhe inage rejeclion prolIen, vhich arises differenlIy in lhe receiver chain and resuIls fron
nisnalches lelveen lhe I (in-phase) and Q (quadralure) palhs as veII as anpIilude
nisnalches. AIlhough lhe direcl conversion perforns veII inage rejeclion, lhis archileclure
suffers fron fIicker noise, DC offsels and seIf-nixing al lhe inpuls of lhe nixers, resuIling in
fiIler saluralion and dislorlion.
To undersland hov lhe prolIen of frequency inage arises, consider lhe process of dovn-
conversion as represenled in lhe Iig.1. When nixing lhe vanled signaI land (al f
RI
) vilh lhe
LO, lhe ollained signaI land is Iocaled al f
II
. ul, since a sinpIe anaIog nuIlipIicalion does
nol preserve lhe poIarily of lhe difference lelveen lhe lvo nixed signaIs (i.e cos(
1
-
2
)l=cos(
2
-
1
)l), lhe signaI land al f
RI
-2f
II
is aIso lransIaled lo lhe sane II afler nixing vilh
lhe LO. The signaI al f
RI
-2f
II
is knovn as lhe inage frequency. Therefore, any undesired
signaI Iocaled al lhe inage frequency viII le lransIaled lo lhe sane II aIong vilh lhe
desired RI signaI. And, lhis inage signaI nay dislorl lhe vanled signaI and Iead lo an
inproper syslen vork. Thus, lhe inage signaI nusl le fiIlered lefore nixing.

Iig. 1. Inage rejeclion prolIen in RI receivers

An inporlanl specificalion lo delernine lhe perfornance of a receiver and lo quanlify ils
degree of inage rejeclion is lhe inage rejeclion ralio defined as lhe ralio of lhe nagnilude in
lhe allenualion land lo lhal in lhe passland and can le given ly

(2)
The IRR required lo ensure signaI inlegrily and suilalIe lil-error-rale (LR) varies
depending on lhe appIicalion. As an exanpIe, for shorl-range appIicalions vhere Iov or
noderale seIeclivily is required, an inage suppression of 45d is adequale, lul is far Iess
lhan lhal required in Iong-range helerodyne receivers. Ior exanpIe, DLCT and DCS-18OO
RI
f
LO
f
II
f
II
Inage vanled
signaI
f
II
=f
RI
-f
LO
II
LO
f
RI
Conversion vilhoul
Inage-rejecl fiIler
RI
f
LO
f
II
f
II
f
II
II
LO
Inage-rejecl
IiIler
Conversion vilh
Inage-rejecl fiIler
f
RI
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appIicalions require 5Od and 6Od of inage rejeclion respecliveIy (Long, 1996). Melhod
proposed len years ago (RudeII el aI, 1997), enforced exlernaI luning or Iaser lrinning and
achieved inage-rejeclion ralios, lypicaIIy on lhe order of 35-5Od.
In lhis arlicIe, ve viII sludy firsl a slale-of-lhe-arl of lhe inage rejeclion lechniques as veII
as lheir inpIenenlalion conslrainls inside vireIess archileclures. This sludy concerns
essenliaIIy lhe inage-rejecl archileclures and focuses on conpIex poIyphase fiIlers. Then, ve
viII propose a design nelhodoIogy dedicaled lo passive poIyphase fiIlers (III) vhich
incIudes in lhe design fIov an anaIylicaI nodeI aIIoving quanlifying lhe inpacl of lhe
nisnalch of lhe conponenls and lhe resuIling signaI in lhe IRR degradalion. This
nelhodoIogy lakes inlo accounl lhe non ideaIily of passive conponenls (parasilic
capacilances and resislors) logelher vilh lhe synnelry of lhe signaI palh during lhe Iayoul
design. Differenl lechniques dedicaled lo Iayoul nalching conlined vilh oplinun
conponenl sizing fron an experinenlaI nelhod are proposed so as lo increase lhe IRR.
Such a nelhod gives a possiliIily lo design IIIs operaling fron vide frequency range
(1MHz lo 5CHz) and aIIovs allaining high perfornances in lerns of IRR (aloul 6O d). The
proposed nelhod has leen vaIidaled vilh sone lesl-cases in fuII CMOS lechnoIogy.

2. Image rejection techniques

2.1 Image-reject architectures
Inage-rejeclion archileclures are lhe nosl knovn nelhods for inpIenenling inage rejeclion
slruclures. They can lypicaIIy le divided inlo haIf-conpIex and fuII-conpIex archileclures
(CroIs el aI, 1998, Sleyaerl el aI, 2OOO) (Iig.2).

(a) (l)
Iig. 2. HaIf-conpIex (a) and fuII-conpIex (l) receiver archileclures, using poIyphase fiIlers
The haIf-conpIex archileclure is lased on lhe use of inage-rejecl nixers conlined vilh
passive or aclive fiIlers. As shovn in Iig.2(a), a reaI RI signaI is nixed vilh a LO conpIex
signaI lo feed lhe II poIyphase fiIler. The quaIily of lhe inage rejeclion inside such an
archileclure resuIls nainIy fron lhree paranelers: i) lhe laIance lelveen I and Q signaIs
(phase and nagnilude error), ii) lhe adequale nalching of nixers iii) lhe poIyphase fiIler
perfornances.
There are lvo veII-knovn archileclures using such lechniques: lhe HarlIey and Weaver
archileclures, depicled in Iig.3 (Razavi (l), 1996, Xu el aI, 2OO1). CeneraIIy, lhe Weaver
lopoIogy is preferred lo lhe HarlIey archileclure. In facl, lhe 9O phase shifler lIoc (Iig.3(a))
cones vilh hard design conslrainls in lerns of conponenl nalching vhich resuIl lo
significanl phase error especiaIIy al high frequencies. Ior inslance, a change of 2O in
resislors and capacilors (used lo generale lhe quadralure), due lo lenperalure and process
varialions, gives an IRR of onIy 2Od (MaIigeorgos & Long, 2OOO).

l
LC
Q
RF
F
AuC
LnA
8
l
Q

l
LC
Q
RF F
AuC
8
l
Q

l
LnA
Q
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(a) (l)
Iig. 3. HarlIey (a) and Weaver (l) inage-rejecl archileclures

asic HarlIey and Weaver inpIenenlalions proposed in lhe Iileralure have lypicaIIy IRRs in
lhe range of 3O-4Od (Carla el aI, 2OO5). This is far leIov lhe 6Od required ly vireIess
slandards (Long & MaIiepaard, 1999). In facl, phase nisnalch lelveen I and Q signaIs and
gain nisnalch lelveen nixer signaI palhs resuIl lo nuch Iover inage rejeclion vaIue. The
IRR can le expressed as a funclion of lhe nisnalches (RudeII el aI, 1997)

(3)
vhere
1
and
2
represenl lhe phase errors of LO
1
and LO
2
respecliveIy, and AA is lhe gain
error lelveen I and Q palhs. As shovn in Iig.4, lhe IRR as a funclion of lhe lolaI phase and
gain nisnalch. Thus, in order lo provide an IRR of 6Od vilh a gain nisnalch of O.1, lhe
LO phase errors nusl le Iess lhan O.1.

Iig. 4. Inage rejeclion ralio (IRR) versus lhe phase nisnalch for differenl gain nisnalch
quanlilies (RudeII el aI., 1997)

The need for a nonoIilhic soIulion for inage-rejecl receiver vhich can perforn gain and
phase caIilralion is olvious. Various caIilralion lechniques lo correcl lhe nisnalch have
leen deveIoped using anaIog or digilaI circuils. DigilaI caIilralion lechniques have leen
inpIenenled al lhe anaIog-lo-digilaI converler (ADC) IeveI inside lhe receiver chain
(VaIkana & Renfors, 2OOO, Sun el aI, 2OO8) using eilher lackground digilaI correIalion Ioops
or connulaled feedlack capacilor svilching lo correcl non-ideaIilies in laseland
conponenls. Anolher lechnique is proposed in (Monlenayor & Razavi, 2OOO) and consisls
on a seIf-caIilraling archileclure. Il delernines lhe phase and gain nisnalches of a Weaver
archileclure and appIies a feedlack lhrough gain and phase adjuslnenl. A speciaI dedicaled
lone al lhe inage frequency is used and a periodic caIilralion vilh lhe exlernaI inage lone
is needed. This properly reslricls ils appIicalion on syslens using line division nuIlipIe
access (TDMA). This nelhod inproves lhe inage rejeclion vilh no penaIly in Iinearily,
Ll
Ll
+
+
RF F
Q
cos(
LO
t)
sin(
LO
t)
8l
8l
+
-
RF F
Q
cos(
LO1
t)
sin(
LO1
t)
cos(
LO2
t)
sin(
LO2
t)
0,0 0,2 0,4 0,6 0,8 1,0
20
25
30
35
40
45
50
55
60
65
70
'A=0,1
'A=0,01
'A=0,005
R
R

(
d
B
)
Phase error ) (degree)
'A=0,001
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noise or gain, lul increases lhe pover consunplion. Anolher lechnique consisls on
conlinuous caIilralion in a nodified-inage-rejecl-Weaver archileclure (LInaIa & Lnlali,
2OO4). The phase and gain nisnalches quanlilies are caIilraled independenlIy vilhoul lhe
use of any exlernaI caIilraling lones. This syslen generales lvo conlroI signaIs using a
varialIe deIay gain circuil in lvo independenl caIilralion Ioops. A furlher lechnique, lased
on lhe Weaver archileclure, consisls on sinuIlaneous caIilralion ly a sign-sign Ieasl nean
square (SS-LMS) aIgorilhn (Der & Razavi, 2OO3). The LMS adaplalion circuil adjusls lhe
phase and gain nisnalches differenliaIIy lo avoid syslenalic conlroI. DigilaIIy sloring lhe
caIilralion coefficienls soIves lhe prolIen of periodic refreshing, naking il suilalIe for
syslens using code division nuIlipIe access (CDMA), lul an exlernaI inage lone is sliII
needed in caIilralion procedure. Iurlhernore, a posl-processing inage rejeclion aIgorilhn
is proposed in (Lerslaveesin & Song, 2OO6) lo rejecl lhe inage in lhe laseland using an
adaplive zero-forcing sign-sign feedlack concepl and does nol require conpIicaled digilaI
processing. This aIgorilhn can delecl and correcl I/Q inlaIance conlinuousIy, lul il
aIIeviales lhe need for a high resoIulion ADC in lhe digilaI inage rejeclion device.
Despile lhe difficuIly lo reaIize accurale phase shiflers, (Chou & Lee, 2OO7) denonslrales
lhal lhis is nol essenliaI in lhe Weaver archileclure. The inage rejeclion is perforned ly
naking lhe phase nisnalch lelveen I and Q signaIs of lhe firsl LO lo le equaI lo lhal of lhe
second LO. Thus lhe design conslrainls on phase nalching are reIaxed, and nore allenlion
can le pIaced on gain nalching (Chou & Lee, 2OO7).
The fuII-conpIex archileclure (aIso referred as doulIe quadralure dovn-conversion)
requires lhe use of conpIex poIyphase fiIlers. The conpIex poIyphase fiIlers are suilalIe for
high frequency appIicalions since lhey can neel lhe dynanic range and landvidlh
requirenenl in RI frequencies (Wu & Chou, 2OO4). In lhis case, a nolch frequency Iocaled al
lhe inage frequency is used lo rejecl inage signaIs ralher lhan landpass fiIlering. As shovn
in Iig.2(l), lhe RI signaI is conpIex fiIlered (RI poIyphase fiIler), lhen lhe RI and LO
conpIex signaIs are nuIlipIied logelher lo feed lhe II poIyphase fiIler, lo reach aloul 6Od
of inage suppression (ehlahani el aI, 2OO1). The inleresl of lhis slruclure cones fron lhe
facl lhal lhe inage rejeclion is supporled in lhe RI donain ly lhe RI poIyphase fiIler and
lhe quadralure LO, vhich is advanlageous conpared lo lhe haIf-conpIex archileclure. Thus,
lhe design conslrainls in lerns of inage rejeclion are reIaxed in lhe RI poIyphase fiIler and
lhe LO conpared lo lhe II poIyphase fiIler.
Sunnary of perfornances of nunerous inage-rejecl archileclures reporled alove is given
in lalIe 1.

Techno|og R|/l| (Ht) lRR llP3 N| Pouer
consumtlon
(RudeII el aI.,
1997)
O.6n
CMOS
1.9C / 2OOM 45d -7 dn 14d 92nW
(Carla el aI.,
2OO5)
iCMOS 5 - 2.4 C/ 2OM 33d -12 dn 8.9d 19nW
(ehlahani el
aI., 2OO1)
O.6n
CMOS
27OM / 1OM 6Od - - 62.7nW
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Techno|og R|/l| (Ht) lRR llP3 N| Pouer
consumtlon
(CroIs &
Sleyaerl, 1995)
O.7n
CMOS
9OOM /3M 46d 27.9
dn
24d 5OOnW
(Wu & Razavi,
1998)
O.6n
CMOS
9OOM / 4OOM 4Od -8 dn 4.7d 72nW
(anu el aI.,
1997)
O.5n
iCMOS
9OOM / 1O.7M 5Od -4.5
dn
4.8d 6OnW
(Lee el aI., 1998)
O.8n
CMOS
1C/ 1OOM 29d O.6 dn 19d 1O8nW
(ehlahani el
aI., 1999)
O.6n
CMOS
27OM/ 1OM 58.5
d
-8 dn 6.1d 33nW
(Sanavali el aI.,
2OO1)
O.24n
CMOS
5.2C 53d -7dn 7.3d 58.8nW
(Meng el aI.,
2OO5)
CaInI/
CaAs HT
5.2C / 3OM 4Od -1Odn - 15OnW
(Wu & Chou,
2OO3)
O.18n
CMOS
5C / 2OM 5O.6d -13dn 8.5d 22.4nW
(Kin & Lee,
2OO6)
O.18n
CMOS
5.25C/1C 4Od -8dn 7.9d 57.6nW
(Razavi, 2OO1)
O.25n
CMOS
5.25C/2.6C 62d -15dn 6.4d 29nW
(Lee el aI., 2OO2)
O.25n
CMOS
5.25C/ 3OOM 51d -7dn 7.2d 21.6nW
(Chou & Wu,
2OO5)
O.25n
CMOS
6M - 3OM 48d -8dn - 11nW
TalIe 1. Circuil perfornances using lhe Weaver and doulIe quadralure conversion
archileclures

2.2 CompIex poIyphase fiIters
A HiIlerl fiIler responds lo lhe conpIex represenlalion of a signaI and is lased on a shifl
lransforn,
(KhvedeIidze, 2OO1). Il lransIales lhe poIes and lransforns lhe

Iovpass response inlo a landpass response cenlered al =
O
, vhiIe preserving lolh
anpIilude and phase characlerislics. Thus, oving lo ils asynnelric response lo posilive and
negalive frequencies, such a fiIler nay le synlhesized lo suppress lhe inage and pass lhe
desired frequency, as lhe case of poIyphase fiIlers (Chou & Wu, 2OO5).
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Invenled ly CingeII in 1971, poIyphase fiIlers vere used lo generale of quadralure signaIs in
audio appIicalions and vere inpIenenled firsl using discrele conponenls (CingeII, 1971).
This vork has nany Iinilalions since vorking on such Iov frequency audio donain does
nol consider lhe infIuences of parasilic resislors and capacilors, noreover, conponenls
nisnalch vas nol anaIyzed in lhe discrele conponenls inpIenenlalion (Telsuo, 1995).
Inlegraled IIIs vere rediscovered in 1994 as an efficienl RI quadralure generalion
lechnique in CMOS lechnoIogy (Sleyaerl & CroIs, 1994). The design of inlegraled CMOS
III faces nany chaIIenges, so lhal nany researches ain lo anaIyze lhe sensilivily of lhe RI
CMOS III in RI inlegraled lransceivers (CaIaI & Tavfik, 1999) and lheir appIicalion in
inage rejeclion. This anaIysis aIIovs underslanding lhe III lehavior, lul il renains loo
lheorelicaI for designers lo gel quanlilalive resuIls aloul infIuences of process and
nisnalch varialions on III perfornances.
A poIyphase signaI is a sel of lvo or nore veclors having lhe sane frequency lul differenl
in phase (CaIaI el aI, 2OOO). If ils veclors have lhe sane nagnilude and are equaIIy spaced in
phase, il is considered synnelric. Hence, a synnelric lvo-phase signaI consisls of lvo
veclors of equaI nagniludes vilh lhe sane frequency and leing separaled in phase ly 18O.
The phase order of lhe signaI veclors delernines lhe poIarily of lhe poIyphase signaI
sequence, i.e. a posilive sequence has a cIockvise phase order, vhiIe a negalive sequence
has an anlicIockvise phase order. This inlroduces lhe concepl of negalive and posilive
frequencies (Iig.5). Il shouId le noled lhal lhe phase order is differenl fron lhe direclion of
rolalion lecause aII sequences, vhelher posilive or negalive, consisl of veclors rolaling
anlicIockvise. Since III nelvorks have asynnelric responses lo inpuls of opposile
poIarilies, lhey vere descriled as asqmmc|ric (Telsuo, 1995).
The sludy of lhe III response can le perforned ly lhe vay of veclor anaIysis (CaIaI &
Tavfik, 1999). Since lhe III phases are synnelric, lhe chain nalrix of a singIe phase
represenls lhe chain nalrix of lhe nelvork. The III oulpul is considered as lhe sun of lhe
oulpuls cascaded ly each synnelric inpul aIone lhanks lo Iinear superposilion ruIes. Iig.6
shovs lhe slruclure of one phase generaIized III, vhere adnillance Y1 is connecled
lelveen lhe inpul and lhe corresponding oulpul, and Y2 is skeved lelveen lhe inpul and
oulpul of adjacenl phases. The chain nalrix of a singIe phase can le vrillen as (CaIaI &
Tavfik, 1999)

(4)
vhere represenls lhe reIalive phase difference lelveen V
in
and lhe neighloring inpuls,
vhich in lurn delernines lhe poIarily of lhe inpuls. If <O, V
in
viII le Ieading c
j
V
in
in phase,
vhich causes lhe inpuls lo le posilive. On lhe olher hand, if >O, V
in
viII le Iagging, lhus
causing lhe inpuls lo le negalive.

(a) (l)
Iig. 5. Tvo poIyphase signaIs has a posilive phase
sequence (a) and a negalive phase sequence (l)
Iig. 6. A singIe phase of a
generaIized III nelvork
Vin,2 Vin,1
Vin,4 Vin,3
Vin,1 Vin,2
Vin,3 Vin,4
?
e
j
V
in
e
-j
V
out
V
out
out
in
V
in
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Resislance-capacilance (RC) poIyphase nelvorks are a speciaI case of sequence asynnelric
poIyphase nelvorks. They represenl a passive inpIenenlalion of poIyphase fiIlers vhich
nakes lhen allraclive for inlegraled high-frequency and Iov-pover appIicalions. The
slruclure of a four-phase RC poIyphase fiIler nelvork, vhich conposes one slage, is shovn
in Iig.7. One slage of an RC III conlrilules lo one poIe frequency, caIIed a nc|cn, around
vhich lhe inage is allenualed. Il can le derived as

(5)

Iig. 7. One four-phase RC poIyphase fiIler slage

3. Passive PoIyphase FiIter (PPF) Design

3.1 Case of a singIe-stage PPF
Lel us nov express lhe lransfer funclion H() of lhe III. Since lhe III is a conpIex fiIler,
ils lransfer response can le represenled as
H() = H
1
() + j.H
2
() (6)
vhere H
1
() and H
2
() are lhe reaI and inaginary parls of lhe lransfer funclion respecliveIy.
Lel us nole H() lhe lransfer funclion for any phase in a posilive sequence, vhiIe H(-) lhal
of negalive one. Since conpIex poIyphase fiIlers discrininale posilive and negalive
sequences, H() = H(-).
In lhe case of four-phase RC III shovn in Iig.7, and sulsliluling in (4) Y1, Y2 and for
1/R, sC and /2 respecliveIy, lhe open-circuil (I
oul,k
=O) voIlage lransfer funclion in a
posilive sequence can le vrillen such as

(7)
vhiIe in a negalive sequence, ve yieId

(8)
vhere A is an anpIificalion faclor and
p
is lhe poIe frequency. The lransfer curves of
|H(f)|
d
and |H(-f)|
d
are shovn in Iig.8 for f
p
=2.4CHz. Nole lhal lhe desired signaI vilh
posilive frequency faIIs in lhe fiIlers passland vhiIe lhe inage signaI al negalive frequency
is allenualed. The IRR, previousIy defined in (2), can le expressed as foIIoving

(9)
R
C
C
R
R
C
R
C
V
out,3
=
out
-
V
out,1
=
out
+
V
out,2
= Q
out
+
V
out,4
= Q
out
-
V
in,3
=
in
-
V
in,1
=
in
+
V
in,2
= Q
in
+
V
in,4
= Q
in
-
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Thus, according lo (9), ve can deduce lhal IRR (f
p
) = O if H
1
() and H
2
() are perfeclIy
nalched. NeverlheIess, lhis lheorelicaI vaIue is difficuIl lo achieve due lo inlrinsic nisnalch
of lhe conponenls and lhe non unifornily of lhe conneclion Iines.
Nov, Iel us generaIize lhe lransfer funclion considering gain and poIe nisnalches vhich
can le expressed as
(1O)
vhere A and
p
are lhe nisnalch quanlilies of lhe gain and lhe poIe frequency,
respecliveIy.
AnaIylicaI nodeIing has leen perforned in order lo quanlify lhe inpacl of lhe nisnalch on
lhe IRR degradalion and lhe nolch frequency drifl. ResuIls are sunnarized in lalIe 2 for
sone lypicaI vaIues of A and
p
. The sane effecl has leen reporled on Iig.8. Il can le
noled (lalIe 2) lhal poIe nisnalch of 2 Ieads lo an IRR degradalion higher lhan 2Od and
gain nisnalch grealer lhan 1O cause landvidlh degradalion higher lhan 2OOMHz. Il
depicls lhal lhe gain nisnalch A shifls lhe frequency, vhiIe lhe poIe frequency nisnalch
p
changes lhe IRR.

Iig. 8. Transfer responses of a III for a posilive (|H(f)|) and negalive (|H(-f)|) phase
sequences

(%) A (%) f (MHt) lRR (dB)

1 2O 5OO 1O
1 1O 2OO 1O
1 5 5O 1O
2 5 5O 2O
3 5 5O 23

TalIe 2. Cain and poIe nisnalch infIuence on lhe nolch frequency and lhe IRR

This nisnalch resuIls essenliaIIy fron conponenls inlaIance. Thus, considering a singIe
RC III seclion, if lhe alsoIule vaIues of R and C deviale such as R+AR and C+AC, lhe poIe
frequency differ fron 1/(2RC) and lhe residuaI voIlage is given ly
1
10
7
1
10
8
1
10
9
1
10
10
60
40
20
0
Frequency (Hz)
I ( )
I ( )
)
I)
I
|H(f)| (Desired band)
|H(-f)| (mage band)
deal
A = 10%;
p
= 1%
Frequency (Hz)
RR
f
Magnitude (dB)
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(11)
vhere
is lhe line conslanl fraclionaI devialion (ehlahani el aI, 2OO1).

Since in lhe vicinily of lhe poIe frequency, . = 1, ve have
(12)
Iurlher, lhe nalching of a paraneler M is generaIIy defined as a slandard devialion of
Caussian dislrilulion of reIalive AM/M lelveen idenlicaIIy designed paired devices. Then,
lhe IRR vilh consideralion of R and C nisnalches can le expressed in a nornaIized RMS
quanlily (ehlahani el aI, 2OO1) and lhen given ly

(13)

3.2 Case of a muIti-stage PPF
Since a one-slage III suppresses lhe inage onIy around lhe nolch frequency, il suppIies a
narrov land rejeclion. y cascading severaI slages vilh differenl nolches, a vide
landvidlh can le achieved. These nolches have lo le pIaced al equaI frequency ralios (Iang
el aI, 2OO5), i.e

(14)
Iigure 9 depicls lhe lopoIogy of cascaded slages of RC poIyphase fiIler and lheir
correspondenl frequency responses. Il shovs lhe inage rejeclion lhrough nuIli-slage-RC
IIIs, in vhich lhe nolches are IogarilhnicaIIy spaced for equirippIe response. The
landvidlh lo le covered and lhe desiralIe inage rejeclion anounl fix lhe nunler of slages
needed for lhe poIyphase fiIler.

(a) (l)
Iig. 9. A lhree-slage RC III lopoIogy (a), Cascade frequency responses of one-, lvo- and
lhree-slage IIIs
R1
C1
R1
C1
C1
C1
R1
R1
R2
C2
R2
C2
C2
C2
R2
R2
R3
C3
R3
C3
C3
C3
R3
R3
in
+
Q
in
+
in
-
Q
in
-
out
+
Q
out
+
out
-
Q
out
-
10
5
10
6
10
7
10
8
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
3 stages
1 stage
R
R

(
d
B
)
Frequency (Hz)
2 stages
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In spile of ils lroadland, a nuIlislage III presenls gain Iosses lecause each slage Ioads lhe
previous one. Thus, addilionaI luffers shouId le incIuded lelveen lhe slages for Ioss
conpensalion or inpedance adaplalion. The cosl renains in lhe increased pover
consunplion due lo luffers. In addilion, lhe poIe Iocalion of lhe originaI RC III couId le
changed. Olher slruclures of nuIlislage RC poIyphase fiIlers are proposed in (Konoriyana
el aI, 2OO7) lo overcone lhe prolIen of luffering and lo ensure nininaI eIenenl vaIue-
spread and equaI-rippIe gain.
In lhe case of a lvo-slage RC III, lhe lransfer funclion can le ollained ly nuIlipIying lhe
chain nalrices, as given in (4), of each slage and evaIualing lhe open-circuil (I
oul,k
=O)
conpIex lransfer funclion. We yieId

(15)
In lhe case of a lhree-slage RC III, lhe lransfer funclion is given ly

(16)
vhere

The resuIlanl IRR
N
of N cascaded slages can le derived ly nuIlipIying lhe IRR of each one-
slage poIyphase fiIler as
(17)

4. Active PoIyphase FiIters

In CMOS vireIess receiver design, nuIli-slage poIyphase fiIlers are videIy used. One
soIulion consisls on sulsliluling lhe passive resislive parls of lhe fiIler ly aclive one, using
lransconduclances (ehlahani el aI, 2OO2, Andreani el aI, 2OOO). This lopoIogy lehaves in lhe
sane vay as lhe reguIar slruclure if gn equaIs lo 1/R vilh ideaI source and Ioad. The high
inpul inpedance of lhe lransconduclance reduces lhe Ioading of lhe preceding slage. The
aclive poIyphase fiIler conlines isoIalion, gain and snaII chip area.
Many reaIizalions of aclive resislor are lased on lhe use of inverler-lype lransconduclor,
originaIIy proposed ly Nau|a (Andreani & Mallison, 2OO2). The lransconduclor circuil
proposed in (ehlahani el aI, 2OOO) has nany advanlages incIuding good Iinearily, Iov-
noise, high-frequency capaliIily and Iov-voIlage, lul al lhe sane line il suffers fron
connon-node inslaliIily. Iurlher RC-aclive poIyphase fiIler inpIenenlalions are lased on
lhe use of second generalion currenl conveyors (CCIIs) (n (a), 2OO4) or on lhe use of
convenlionaI operalionaI anpIifiers (OIAMIs) and RC conponenls (n (l), 2OO4).
Hovever, in high-frequency operalion, opanp RC fiIlers design is prolIenalic lecause of
lhe required gain-landvidlh, lhe pover consunplion and lhe sving Iinilalions. Thus, lhe
OIAMI can le repIaced ly an operalionaI lransconduclance anpIifier (OTA) (Tsividis,
1994). Lven so, prolIens due lo OTAs design vilh adequale gain and landvidlh in Iov-
voIlage CMOS process are preserved. Hence, lechniques of feedlack and feedforvard
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connon-node conpensalion are used vilh such slruclures aIIoving high dc gain and good
phase nargin even in Iov-voIlage CMOS appIicalions (Harrison, 2OO2, Thandri & SiIva-
Marlinez, 2OO3). Anolher slruclure of aclive RC III proposed in (TiIInan & SjoIand, 2OO5) is
lased on CMOS inverlers, vilh dc feedlack lo slaliIize lhe lias poinl. Il is used lo generale
quadralure signaIs and conlines high gain and good quadralure perfornance (quadralure
error<O.8 in lhe luning range |9.14, 1O.58j CHz).
Iurlhernore, (Chian el aI, 2OO7) proposes a noveI design idea lo inpIenenl poIyphase fiIlers
lased on repIacing passive conponenls ly MOSILTs. This aclive device gives lhe sane
funclions as lhe convenlionaI passive poIyphase fiIler vilh a significanl reduclion of lhe
chip area, lul il incIudes greal effecls of nonIinearily and parasilic conponenls, naking il
difficuIl lo handIe in lhe experinenlaI pIan. They can le reaIized aIso ly using gyralors, lul,
il is difficuIl lo reaIize a gyralor using praclicaI passive eIenenls lecause of ils reciprocily.
Olher conpIex fiIlers are reporled as parl of lhe receiver design and, lherefore, delaiIs aloul
lhe fiIler perfornance vere nol given (Van ZeijI el aI, 2OO2).
The aclive poIyphase fiIler soIulions, conparing lo lhe passive ones, have snaIIer area,
naking lhen nore adequale for Iov and inlernediale frequency appIicalions, lul have al
lhe sane line nore pover consunplion and Iover Iinearily. Oving lo lhe recenl
inprovenenls on CMOS lechnoIogy, passive conponenls presenl leller quaIily, in
parlicuIar in lhe high frequency donain. Then, il is nore convenienl lo use IIIs in lhe RI
parl, vilh cerlainIy a speciaI allenlion lo lhe parasilics and lhe nalching. The eIeclricaI
nodeI used in LDA (CAO) looIs is no nore sufficienl or nol enough accurale lo underIine
lhe parasilic conlrilulions as veII as nisnalch effecls vhiIe designing lhe RI IIIs.
Therefore, il is necessary lo perforn a III nodeIing lo achieve lhe suilalIe perfornances of
lhe fulure vireIess connunicalion slandards.

5. Mismatch anaIysis

WhiIe vorking vilh III, lhe inage rejeclion depends on lhe aliIily of lhe designer lo
achieve sufficienl nalching on lhe resislors and capacilors vhich cones fron nany causes
(Haslings, 2OO6) such as nicroscopic fIuclualions in dinensions, process liases, diffusion
inleraclions, lhernoeIeclric effecls, elc. The requirenenls fron conponenl nalching are
conlradiclory lo lhal of nininizalion of noise coupIing, signaI Ioss and chip area. Il is
knovn fron experinenlaI sludies (McNull el aI, 1994) lhal lhe variance of adjacenl resislors
and capacilors is inverseIy proporlionaI lo lheir area. ConsequenlIy, Iarge conponenl area is
required lo achieve high IRR, lul, in lhe sane line, Iarge area increases lhe parasilic
capacilances vaIue of fiIler conponenls. In facl, achieving high IRR vilh poIyphase fiIler
resuIls fron an oplinaI sizing of lhe fiIler conponenls. In olher lerns, lradeoff lelveen lhe
chip area and IRR nusl lo le considered. Iurlhernore, lack-end design nelhodoIogy
incIuding Iayoul consideralion is nandalory in order lo oplinize CMOS III.
Differenl sinuIalions reIaled lo inage rejeclion have leen done lo verify nuIli-slage RI
IIIs for a given connunicalion slandard. In lhese experinenls, Iel us consider inage
rejeclion in a Iov-II receiver vilh RI IIIs vorking around 2.4CHz. Iirsl, lhe characlerislics
of lhe differenl slages and principaIIy lheir nolches frequencies are chosen. Once lhe nolches
frequencies are delernined, vaIues of resislors and capacilors can le seIecled. SnaII signaI
sinuIalions vilh Spcc|rcR| (Cacncc
) have leen considered lo focus on lhe effecl of lhe

conponenl varialions on lhe IRR and consequenlIy lo caIilrale judiciousIy lhe oplinaI sizes
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and vaIues of resislors conposing lhe fiIler aIIoving lhe required IRR. To invesligale lhis
furlher, Iig.1O shovs lhe sinuIaled IRR resuIls for differenl poIyphase nelvorks vilh
nisnalch consideralion. The IRR is iIIuslraled in lhree-dinensionaI pIol as a funclion of lhe
resislors eIeclricaI vaIue (R) and resislor size, vhich for lhe currenl sludy corresponds lo
lhe vidlh (W). In lhe X-axis, lhe paraneler R is used lo caIilrale lhe firsl slage of lhe
poIyphase fiIler. The resislor vaIues of lhe olher slages are sel lo a fixed poIe ralio , as
shovn in (14). The capacilors are chosen lo give lhe righl poIe frequency.
These lhree-dinensionaI pIols shov firsl lhal nuIlipIying lhe nunler of slages gives a
higher IRR. Ior exanpIe for lhe coupIe (R, W) equaI lo (7OD, 1On), lhe IRR increases fron
52d vilh lhree-slage poIyphase design (Iig.1O(a)), lo 6Od vilh four slages (Iig.1O(l)) and
reaches 65d vilh five slages (Iig.1O(c)). Hovever, having nany slages in lhe poIyphase
nelvork conducls lo a grovlh of lhe conponenls nunler and increases lhe siIicon area, lhe
pover Ioss and lhe parasilic capacilances. Hence, according lo lhe cosluner need, designers
shouId nake a conpronise lelveen achieving a poIyphase fiIler vilh high inage rejeclion
and Iov area and Iov siIicon area cosl.
Iurlhernore, Iig.1O iIIuslrales lhal a high IRR is achieved if lhe vaIue and lhe size of lhe
resislor converge lo lhe oplinaI vaIues on each nuIli-slage poIyphase fiIler. Ior aloul lhe
differenl fiIler configuralions, il shovs lhal lhe IRR varialion versus R corresponding lo a
given configuralion is quasi-Iinear. Ior inslance for a five-slage III, lhe IRR changes fron
65d, lo 68d and 7Od for resislors vidlh of 1On, 2On and 4On respecliveIy
(Iig.1O(c)). In lhis case, il can le noled lhal a gain of onIy 5d in lhe IRR produces an
expansion of lhe resislor size ly aInosl 4OO confirning lhe exislence of an oplinaI
conponenl sizing for a specified IRR vilh each poIyphase fiIler configuralion. The possilIe
reason is lhal Iarge conponenl area yieIds leller nalching on lhe circuil and presenls
oplinaI parasilic capacilances effecl.

(a) (l)
30
60
90
120
150
180
210
25
30
35
40
45
50
55
60
65
10
20
30
40
50
60
R
R

(
d
B
)
W

(
m
)
R (:)
25,00
30,00
35,00
40,00
45,00
50,00
55,00
60,00
65,00
30
60
90
120
150
180
210
45
50
55
60
65
70
10
20
30
40
50
60
R
R

(
d
B
)
W

(
m
)
R (:)
44,00
47,50
51,00
54,50
58,00
61,50
65,00
68,50
72,00
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(c)
Iig. 1O. IRR varialion of (a) lhree, (l) four, and (c) five III versus resislors sizes and vaIues

A slalislicaI represenlalion is suilalIe lo characlerize lhe processes happening in
prolaliIislic vays. In slalislicaI sinuIalions, sequences of randon nunlers vilh a cerlain
prolaliIily dislrilulion funclion are used lo nodeI lhe slochaslic process. UsuaIIy, nany
slalislicaI sinuIalions runs are conducled and averaged lo reach good accuracy of lhe
sinuIalion resuIls. Irocess loIerances and conponenl nisnalch in inlegraled circuils are
consequences of slochaslic processes vilhin a cerlain range, and lhey are usuaIIy avaiIalIe
in CMOS process fiIes derived ly eIalorale neasurenenls. Il is knovn lhal lolh process
loIerances and conponenl nisnalch have lruncaled Caussian prolaliIily dislrilulion
funclions (Spence & Soin, 1997). In our appIicalion, Monle CarIo sinuIalion can le appIied
lo verify lhe slalislicaI nalure of lhe IRR vilh cerlain process loIerances and a resuIlanl
conponenl nisnalch, and lo check lhe prolaliIily dislrilulion of lhe gain nisnalch. Afler
oplinaI sizing and vaIue caIilralions of lhe III conponenls as shovn previousIy, lhree,
four and five slages are sinuIaled. The anaIysis concerns lhe process and nisnalch
varialions of lhe III conponenl corners (IoIysiIicon resislors and MIM (MelaI-InsuIalor-
MelaI) capacilors for lhe currenl sludy) lefore parasilics exlraclion on lhe frequency land
|2, 3j CHz. The Monle CarIo sinuIalion resuIls are expressed as frequency of occurrence
hislogran (5O5O sanpIes of RI IIIs) for differenl inlervaIs of lhe IRR and shovn in Iig. 11.

(a) (l) (c)
Iig. 11. Monle CarIo sinuIalion resuIls of (a) lhree, (l) four and (c) five slage RI III: IRR
hislogran (process and nisnalch varialions)
30
60
90
120
150
180
210
50
55
60
65
70
10
20
30
40
50
60
R
R

(
d
B
)
W

(
m
)
R (:)
50,00
53,00
56,00
59,00
62,00
65,00
68,00
71,00
74,00
30 40 50 60 70 80 90 100
0
200
400
600
800
1000
1200
1400
1600
1800
N
u
m
b
e
r

o
f

s
a
m
p
l
e
s
RR (dB)
RR histogram
deal Gaussian
40 50 60 70 80 90 100
0
200
400
600
800
1000
1200
1400
N
u
m
b
e
r

o
f

s
a
m
p
l
e
s
RR (dB)
RR histogram
deal Gaussian
60 70 80 90 100 110
0
200
400
600
800
1000
1200
1400
1600
N
u
m
b
e
r

o
f

s
a
m
p
l
e
s
RR (dB)
RR histogram
deal Gaussian
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The inpacl of process and nisnalch varialions on lhe III response is sunnarized in lalIe
3. Il iIIuslrales lhe vorsl case and nean vaIue of IRR, as veII as lhe nolch posilion drifl and
lhe IRR dislrilulion lelveen 5Od and 9Od.
PP| stages
number
Mean ta|ue
of the lRR
Worst
case lRR
Notch
drlft
Standard
detlatlon
lRR dlstrlbutlon
betueen 50dB and
90dB
3 62d 51d 4O5MHz 9.11 85
4 72d 57d 3O6MHz 1O.O5 95
5 87d 64d 317MHz 11.95 97

TalIe 3. Monle CarIo sinuIalion resuIls of nuIli-slage RI IIIs: nean vaIue and vorsl case
IRR, nolch posilion drifl and IRR dislrilulion lelveen 5Od and 9Od

The ollained resuIls confirn lhal increasing lhe slages nunler increases lhe nean vaIue of
lhe IRR on lhe desired landvidlh. Il can le noled lhal lhe higher is lhe III slages nunler,
lhe Iover is lhe III innunily lo nisnalch effecls, given lhal lhe dislrilulion lecones
vider and lhe slandard devialion increases fron 9.11 lo 1O.O5 and 11.95 for lhree-slage,
four-slage and five-slage RI IIIs respecliveIy. This is due lo lhe conponenls and
conneclions grovlh in lhe design, inducing, al lhe sane line, an expansion of ils area.
Lel us consider a unil surface S
0
of a one-slage RI III. Since in lhe RI donain lhe size of
our III conponenls is aInosl idenlicaI, ve can suppose lhal an n-slage III has a surface of
n.S
0
. Thus, a conpronise can le nade vhiIe designing IIIs depending on lhe syslen
specificalions. Ior exanpIe, a 6Od inage rejeclion viII cosl 3.S
O
vilh a slandard devialion
of 9, vhiIe a roughIy 85d inage rejeclion viII cosl 5.S
O
vilh a slandard devialion of 12.

6. Parasitics anaIysis and Iine modeIing

Since lhe inpIenenlalion of RC poIyphase fiIler on inlegraled circuil engenders parasilic
capacilance lo lhe sulslrale and al lhe oulpul nodes, speciaI allenlion nusl lo le paid on lhe
parasilic capacilance and Ioading capacilance effecls. In Iig.12 ve nodeI a sinpIified
equivaIenl circuil of a lvo-slage RC III vilh parasilic capacilance lo sulslrale (Cp1, Cp2,
Cp3) and Ioad capacilance (a parl of Cp3).
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Iig. 12. LquivaIenl circuil of lhe lvo-slage RC III vilh parasilic capacilance
In lhis case, lhe lransfer funclions of one-slage and lvo-slage RC poIyphase fiIler are given
respecliveIy as foIIovs

(18)
(19)

Il can le noled fron (18) and (19) lhal lhe parasilic capacilances do nol change lhe zero
posilions 1/2R
1
C
1
and 1/2R
2
C
2
of H
p1
(j) and H
p2
(j). SinuIalion resuIls of frequency
response incIuding parasilic capacilances depicl lhal lhe gain drops for high frequency
donain vhen lhe parasilic capacilance vaIues increase (Yanaguchi el aI, 2OO3).
Iurlhernore, properIy arranging lhe conponenls and oplinaIIy sizing lhe conneclions are
necessary lo guaranlee an equiIilraled parasilic reparlilion in lhe circuil, vhich can
conserve lhe synnelricaI slruclure of passive poIyphase fiIler. The najor Ioss and parasilic
capacilance conlrilulions in conneclions are considered in order lo ollain leller fiIler
perfornance. In facl, Ioss in a conduclor can le generaIIy descriled ly lhe foIIoving
equalion

(2O)
vhere
fi|m
is lhe lhin fiIn resislivily of lhe nelaI, | is lhe nelaI lhickness, and | and I are
lhe lrace Ienglh and vidlh, respecliveIy. Therefore, Ioss can le nininized ly using nelaIs
vilh very Iov resislivily, increasing lhe cross seclionaI area of lhe lrace (|.I), or reducing
lhe overaII lrace Ienglh. esides, lhe nelaI of conneclion is isoIaled fron lhe seniconduclor
sulslrale (lypicaIIy al ground polenliaI) ly one or nore dieIeclric Iayers used lo separale
inlerconnecl Iayers (inler-nelaI dieIeclrics). This creales a parasilic shunl capacilor lhal can
le approxinaled ly lhe foIIoving equalion
C1
C1
C1
C1
R1
R1
R1
R1
C2
C2
C2
C2
R2
R2
R2
R2
C
p2 C
p1
C
p1
C
p2
C
p1
C
p2
C
p1
C
p2
C
p3
C
p3
C
p3
C
p3
in
+
Q
in
+
in
-
Q
in
-
out
+
Q
out
+
out
-
Q
out
-
www.intechopen.com

(21)
vhere A is lhe lolaI area of lhe nelaI lraces, is lhe pernillivily, and is lhe lhickness of lhe
dieIeclric. The parasilic capacilance decreases vilh high nelaIs IeveIs, lul al lhe sane line
lhis viII increase lhe parasilic resislance lecause of slacking lhe differenl via resislivilies.
Hence, designers nusl laIance lolh lhe parasilic shunl capacilance and conduclor Ioss
vhen seIecling a conduclor dinensions and nelaIs IeveIs.
Characlerizalion and nodeIing of lhe inlerconneclion Iines have leen perforned lo inprove
lheir properlies. The equivaIenl nelvork Iine nodeI lelveen lvo porls used in lhis sludy is
shovn in Iig.13(a). Iirsl, lhe Iine paranelers have leen exlracled vilh eIeclronagnelic
sinuIalions (H|SS
TM
). Then, lhe correspondenl Iine nodeIs have leen specified and inserled
inside lhe poIyphase fiIler design al lhe nain sensilive poinls and sinuIaled vilh lhe Agi|cn|
ADS
looI. CaIilralion of lhe addilionaI parasilics aIIovs lheir aIIocalion synnelricaIIy

aIong lhe design, since lheir lolaI eIininalion is nol possilIe. This sludy has denonslraled
lhal Iines vilh differenl shapes give lhe sane fiIler response (IRR and landvidlh) provided
lhal lhe inlerconnecl Ienglhs in respecliveIy I/Q palhs are equaIized. Il is caused ly lhe facl
lhal lhis viII laIance lhe parasilic inlerconnecl resislance in each lranch. Ior exanpIe,
serpenline and lus shapes couId le used sinuIlaneousIy for lhe paraIIeI inlerconneclions.
y adjusling lhe heighl of serpenline, lhe vire Ienglh in lhe lranches of lhe III nay le
equaIized vhiIe keeping lhe sane nunler of corners (Iig 13(l)).

(a) (l)
Iig. 13. (a) LquivaIenl nelvork Iine nodeI lelveen differenl IeveIs of inlerconnecl. (l)
Consideralions of inlerconnecl lo laIance parasilics in poIyphase fiIler lranches

esides, lhe inaccuracy of resislors and capacilors, due lo Si sulslrale parasilic effecl, causes
quadralure phase inlaIance. To overcone lhis prolIen il is possilIe lo nake lhe poIyphase
fiIler lunalIe so as lo conpensale lhe phase inlaIance. The lunalIe phase can le used lo
inprove inage rejeclion or noderale I/Q phase error in direcl conversion or Iov-II
receivers. Ior inslance, varaclor-lased lunalIe poIyphase fiIlers on Si have leen
inpIenenled al 5CHz (Sanderson el aI, 2OO4). Anolher lechnique lo soIve RC inaccuracy of
III is lo use InCa/CaAs helerojunclion lipoIar lransislor vhich has a very good frequency
response lul vhich renains expensive (Meng el aI, 2OO5). In addilion, in lhe RI fronl-end
receiver, lhe inpul Iarge parasilic capacilances of lhe foIIoving doulIe quadralure nixer
degrade lhe Ioss of lhe RI poIyphase fiIler. To overcone lhis prolIen, on-chip spiraI
induclors are inserled al lhe oulpul of lhe RI III in (Kin & Lee, 2OO6) and lhen lune oul
lhe lolaI inpul parasilic capacilances of lhe doulIe quadralure nixer.
In our design, a nev poIyphase fiIler inpIenenlalion (shovn in Iig.14) is proposed lo
laIance lhe landvidlh varialion due lo nisnalches in a synnelricaI slruclure. Il consisls
on lhe RC lasic passive poIyphase nelvork, adding up aclive resislors inpIenenled vilh
MOS lransislors. Il is knovn lhal lhe R
on
of lhe MOS lransislor is funclion of ils dinensions
L
R
G C
Port 1 Port 2
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and of lhe grid voIlage (VC). Thus, vilh an exlernaI luning of VC, lhe vaIue of R
on
, and lhen
lhe III resislor vaIue and lhe nolches, can le adjusled independenlIy. ConsequenlIy, lhal
gives a luning characlerislic lo lhe fiIler landvidlh, and can le appIied lo synlhesize nuIli-
slandards appIicalion fiIlers. The MOS lransislor dinensions are chosen lo have lhe
adequale caIilralion of lhe landvidlh dispersion. Using lhese MOS aclive resislors possilIy
adds nonIinearily lo lhe III design, and lhen olher aclive resislor reaIizalions, such as
paraIIeI-MOS and doulIe-MOS differenliaI resislor, vilh leller Iinearily perfornance, have
leen proposed (AIIen & HoIlerg, 2OO2).

Iig. 14. Iour-slage voIlage lunalIe RC poIyphase fiIler slruclure

7. Layout techniques

In addilion, vhiIe conponenls vilh Iarge areas decrease lhe inpacl of nisnalch, lhe
parasilic capacilance and resislance can have a nuch Iarger effecl on oulpul inlaIance.
Mininizalion of lhese parasilics requires carefuI allenlion lo Iayoul synnelry. The parasilic
exlraclion procedure, perforned vilh lhe S|ar-RCXT looI of Sqncpsqs, shovs lhal nosl
exlracled parasilics are sel in lhe inlerconneclion nelvork. Inlerconnecls presenl eIeclricaI
Iosses lhal need lo le laken inlo accounl during Iayoul and lhen during perfornances
eslinalion. Il is cIear lhal, on lhe circuil, lhe inner lraces see parasilic capacilance fron lhe
Iefl and righl, vhiIe lhe ouler lraces onIy see parasilic capacilance fron one side. Hence,
veaving lhe lraces gives each palh lhe sane lolaI dislance spenl as lolh an inner and an
ouler lrace. To equaIize lhe parasilic effecl of overIapping lraces, a grid of verlicaI and
horizonlaI running inlerconnecls has leen Iaid oul. Moreover, lvo paraIIeI signaI Iines are
pIaced far enough aparl so lhal lhe inlerIine capacilance is negIigilIe.
Iurlhernore, a judicious choice of nelaI IeveI and inlerconneclion draving is necessary. In
facl, using high IeveI of nelaIIizalion engenders Iov parasilic capacilance lul gives high
parasilic resislance. Thus, depending on lhe device sensiliIily and on lhe required nalched
conponenls, lhe nelaI IeveI is chosen. Ior exanpIe, in Iov-Ioss appIicalions, lhe nelaI 6 is
lhe nosl suilalIe (in O.13n CMOS lechnoIogy) since il is lhe lhickesl one and has Iess
capacilance. The nunler of vias used for inlerconnecls is aIso significanl in Ieading lo
equiIilraled parasilics, especiaIIy in lhe case of RI passive poIyphase fiIlers. These vias give
R1
C1
C1
C1
C1
R1
R1
R1
R2
C2
C2
C2
C2
R2
R2
R2
R3
C3
C3
C3
C3
R3
R3
R3
R4
C4
C4
C4
C4
R4
R4
R4
VG4 VG3 VG2 VG1
in
+
Q
in
+
in
-
Q
in
-
out
+
Q
out
+
out
-
Q
out
-
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high conlacl resislance lhal can le aInosl equaI lo lhe fiIler resislance. TalIe 4 presenls sone
exlraclion resuIls of a Iine conneclion lelveen a resislor and a capacilor having differenl
nelaI IeveIs vilh differenl vias nunler. Il shovs lhal increasing lhe nunler of vias does
nol change lhe parasilic capacilance, lul decreases lhe parasilic resislance. Il is due lo
pulling lhe conlacl resislance of each via in paraIIeI and lhen Iovering lhe equivaIenl
resislance. Therefore, conneclions in lhe radio frequency III have lo use greal nunler of
vias lo nininize lheir parasilic effecl.
Meta| |ete| of
the |lne
Vla number
Parasltlc
caacltance (f|)
Parasltlc
Reslstance ()
MelaI 2
1 14.5 19.11
2 14.54 11
3 14.56 7
MelaI 3
1 14.13 19.11
2 14.15 13.49
3 14.18 1O.82

TalIe 4. Lxlraclion resuIls of a Iine conneclion (W=2.5-n/L=5-n) vilh differenl nelaI
IeveIs lelveen a IoIysiIicon-resislor and a MIM-capacilor in O.13n CMOS lechnoIogy

TolaI equiIilraled inlerconnecls draving is hard lo ollain in lhe case of III. Hovever,
oving lo lhe synnelry of lhe III slages, lhe parasilic nodeIIing and exlraclion procedures
iIIuslrale lhal ensuring lhe sane dravings lelveen I and Q palhs is sufficienl lo guaranlee
sane nalching and sane perfornances as in lhe case of an ideaI slruclure (vilh sane
dravings for lhe four III palhs), and lhen, lhal nay Ioosen lhe conslrainls of design
lechniques.
In addilion lo designing a synnelricaI circuil, furlher Iayoul lechniques have leen used lo
assure highIy nalched devices, as shovn leIov
x To reduce lhe sensilivily of lhe device lo process liases, resislors are nade sane vidlh
and capacilors consider sane area-lo-periphery ralios.
x Dunny resislors are added lo eilher lorder of an array of nalched resislors lo
guaranlee uniforn elching. Dunnies shouId le eIeclricaIIy connecled lo ground (or lo
olher Iov-inpedance node) lo avoid eIeclroslalic noduIalion and fIoaling diffusions.
Moreover, lhe nelaI overIapping lhe aclive area of resislors can Iead lo nelaIIizalion-
induced nisnalches. Thus, lhe foIded-oul inlerconneclion (Iig.15(a)) produces leller
nalching lhan lhe foIded-in inleraclion (Iig.15(l)).
x Slress has an inpacl upon siIicon since il is piezoresislive. One of lhe nosl knovn
lechniques for reducing slress-induced nisnalches is lhe ccmmcn-ccn|rci |aqcu|. Il
arranges segnenls of nalched devices aIong one dinension. Ior exanpIe, if ve consider
lvo devices (A and ), each conposed of lvo segnenls, lhe possilIe pallerns are shovn
in Iig.15(c). The pallern AA has an axis of synnelry lhal divides il inlo lvo nirror-
inage haIves (A and A). Il requires dunnies since segnenls of A occupy lolh ends of
lhe array. The pallern AA, vilh inlerdigilaled resislors, havenl connon axis of
synnelry and needs dunnies as veII as lhe AA pallern. Thus, lhe pallern AA Iels
slress-induced nisnalches on devices and consequenlIy il shouId le avoided (Haslings,
2OO6).
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x ThernoeIeclric effecls cannol le eIininaled vilh lhe connon-cenlroid Iayoul in lhe case
of an array of resislors, lecause lhey arise fron differences in lenperalure lelveen lhe
ends of each resislor segnenl. The lhernoeIeclric polenliaIs of individuaI segnenls can
le canceIIed ly reconnecling lhen as shovn in Iig.15(d). The resislor shouId have an
even nunler of segnenls, haIf connecled in one direclion and haIf connecled in lhe
olher.
x LIeclroslalic inleraclions cause varialions in resislors and capacilances. Thus, nalched
resislors vilh sane vaIues can leIong lo a connon lank (or N-veIIs). If resislors have
differenl vaIues, lhey shouId le divided inlo segnenls of equaI vaIues, and each
segnenl nusl reside in ils ovn independenlIy liased lank. In addilion, vires lhal do nol
connecl nalched resislors shouId nol cross lhen, lecause lhey nay capaciliveIy coupIe
noise inlo lhe resislor and lhe eIeclric fieId lelveen lhe vire and lhe resislor can
noduIale lhe conduclivily of lhe resislance naleriaI. The c|cc|rcs|a|ic snic|ing (or |araaq
snic|ing) is a lechnique lhal can isoIale a resislor fron lhe infIuence of overIying Ieads
and gives shieIding againsl capacilive coupIing (Haslings, 2OO6).
x To avoid eIeclronigralion lelveen signaIs, I and Q palhs are separaled vilh a grounded
lus.
x Size, orienlalion and lenperalure slress of MOS lransislors infIuence lheir nalching. A
leller nalching is ollained vhen lransislors are orienled aIong lhe sane cryslaI axis in
lhe sane direclion lecause of lhe slress-induced noliIily varialions. They shouId aIso le
pIaced in cIose proxinily even nexl lo one anolher in order lo faciIilale connon-
cenlroid Iayoul.

(a) (l) (c) (d)
Iig. 15. Resislor array inlerconneclion in (a) foIded-in and (l) foIded-oul slyIes. (c)
LxanpIes of connon-cenlroid arrays. (d) Iroper conneclion of resislor segnenls
canceIIing lhe lhernoeIeclric

8. PPF Design methodoIogy

As anaIyzed previousIy, conponenl nisnalch, process loIerances and parasilic effecls nusl
le considered in lhe design of CMOS IIIs lo acconpIish a rolusl design. We propose a
design nelhodoIogy dedicaled lo IIIs as shovn in Iig.16. Such lop-dovn design
nelhodoIogy is a slruclured approach lo design IIIs operaling fron vide frequency range
and vhich can salisfy high perfornances in lerns of IRR (aloul 6Od) fron vide frequency
range (1MHz lo 5CHz).
This III design nelhodoIogy can le arranged inlo consideralions firsl in lhe syslen
requirenenls, lhen in lhe schenalic design and nexl in lhe Iayoul viev. Thus, slarling oul
fron largel specificalions and conslrainls in lerns of IRR, appIicalion landvidlh, cosl and
consunplion, ve can sunnarize lhe design fIov as lhe guideIines leIov
R1 R2 R2 R1
R1 R2 R2 R1
A A B B A B A B
+ + + +
- - - -
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x AcconpIishing anaIylicaI caIcuIalions and nodeIing lo quanlify lhe conponenl
nisnalch and parasilic eIenenls effecls and lo focus on lhe resuIling III response lo
phase and gain inlaIances.
x Iixing lhe nunler of slages needed for lhe poIyphase fiIler according lo lhe landvidlh
lo le covered and lhe desiralIe inage rejeclion anounl.
x LquaIIy pIacing lhe nolches on lhe frequency donain vilh groving inpedance vhiIe
lraversing lhe fiIler slages lo Iover Iosses and noise figure.
If lhe cascade fiIler Ioss is sliII loo Iarge, ve nove on changing lhe conponenl lype as veII
as caIilraling ils paranelers, even as inserling inler-slage luffers lo preserve signaI dynanic
range vilhin lhe poIyphase fiIler. Afler adjusling lhe Iosses inlo lhe III, ve fuIfiII slalislicaI
sinuIalions lo Ionger anaIyze lhe conponenl nisnalch.
x OplinaI sizing of lhe III conponenls in lerns of eIeclricaI vaIue and dinensions. The
nalching quanlilies needed lelveen resislors and capacilors delernine lhe physicaI area
of lhe fiIler.
If in lhe schenalic sinuIalion, lhe largel specificalion cannol le nel, ve nove on lo lhe
conponenl resizing procedure and deduce lhe conpIiance vilh lhe required conslrainls.
Afler conpIeling lhe schenalic design, ve carry oul lhe physicaI Iayoul design.
x ModeIing lhe inlerconneclion Iines and perforning eIeclronagnelic sinuIalion lo
deduce lheir paranelers, and lhen inserling lhen in lhe III design lo naxinize ils
innunily lo lhe non ideaIilies.
x Designing lhe Iayoul laking inlo accounl lhe parasilic eIenenls: lhe conduclor Ioss of lhe
inlerconnecl nelaI creales parasilic resislance, and lhe dieIeclric lelveen lhe lraces and
lhe sulslrale or lelveen lvo overIapping lraces creales parasilic capacilance. Layoul
vhich creales equaI parasilics for each palh lhrough lhe poIyphase is necessary lo
nininize lhe inlaIance and nainlain lhe synnelry.
x Using dunnies around lhe nalched conponenls lo reduce lhe loundary effecls and on-
chip shieIding lo isoIale lhe III design fron lhe unvanled sulslrale noise coupIing. The
eIeclronigralion is nininized vilh a ground separalion lelveen lhe I and Q signaIs. A
judicious choice of lhe nelaI IeveI and nunler of conlacls or vias is aIso necessary.
x Iosl Iayoul sinuIaling lhe III vilh lhe exlracled coefficienls. In lhis exlraclion nelhod,
parasilics lelveen neighloring conponenls, vires and parasilics lo lhe sulslrale are
exlracled. In lhis vay, ve can provide reaIislic sinuIalion resuIls lefore nanufacluring
lhe circuil.
If lhe largel specificalions required ly lhe appIicalion are nol yel salisfied, ve go lack lo lhe
parasilics nininizalion procedure and posl-Iayoul sinuIalion (ILS) unliI assuring lhen.
Then, ve finish lhe design.
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Iig. 16. High perfornance III design pIanning fIov

9. PPF impIementation

The proposed design nelhodoIogy has leen vaIidaled vilh sone lesl-cases in fuII CMOS
process. Ior inslance, Iig.17 shovs lhe Iayoul of a four-slage RI lunalIe III (rf. Iig.14)
designed lo vork around 5CHz, and falricaled in O.13-n CMOS lechnoIogy. Il occupies a
die area of 31O x 83 n vilhoul lesl pads.

Iig. 17. Layoul of lhe 5CHz four-slage lunalIe III: 31O x 83 n vilhoul lesl pads

D
l88 8W
A

C
L k C
nl
C
C
V1
l88 8W
NI
No
Yes
M
MC
8
C

D

D S
I
LS

L
lC
No
Yes
S Ikk

No
System requirement
Schematic
Layout
* PLS: Post Layout Simulation
L
Yes
L
L
R
C
MOS
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The frequency response of lhe inpIenenled 5CHz lunalIe III is depicled in Iig.18. Il
shovs lhal lhe varialion of lhe conlroI grid voIlage of MOS resislors enalIes lhe luning of
lhe III landvidlh ly 1CHz vhiIe conserving an IRR aInosl sleady around 75d. Then,
lhis proposed luning characlerislic can le appIied lo nuIli-slandard appIicalions, or used lo
conpensale for lhe landvidlh drifl due lo nisnalches.

Iig. 18. Irequency responses of lhe 5CHz lunalIe poIyphase fiIlers using differenl conlroI
grid voIlages

A chip pholo of lhe falricaled chip is shovn in Iig.19. Il occupies 815 x 319 n vilh lesl
pads. On-chip poIysiIicon resislors have leen added lo reconline lhe four oulpuls of lhe
III in order lo avoid lhe inaccuracy of lhe exlernaI hylrid coupIers and lo faciIilale lhe
neasurenenl procedure. Thus, a differenliaI oulpul is ollained and can le neasured easiIy
vilh aclive proles.

Iig. 19. Die nicrograph of lhe falricaled III lesl chip in O.13-n CMOS lechnoIogy
3E9 4E9 5E9 6E9 7E9 8E9 9E9 1E10

-30
-40
m
a
g
e

R
e
j
e
c
t
i
o
n

(
d
B
)
Frequency (Hz)
-40
-50
-60
-70
-80
0.3 V
0.6 V
0.9 V
1.2 V
III
Tesl pads C-S-C-S-C
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Iig. 2O. Diagran of lhe III neasurenenl selup

A diagran of lhe neasurenenl selup for lesl of lhe CMOS III is iIIuslraled in Iig.2O. On-
vafer RI neasurenenls can le perforned since laIanced C-S-C-S-C pads (G for ground
and S for signaI) are used. The four inpul phases of lhe fiIler are generaled ly using a signaI
generalor and videland passive hylrid coupIers. The neasurenenl procedure is leing
processed lo vaIidale lhe ollained sinuIalion resuIls.

10. ConcIusion

WireIess connunicalion lands and services are proIiferaling, resuIling in a greal
deveIopnenl of slandards and in an enhanced need for inlegraled circuils. In lhis paper, il is
denonslraled lhal lechniques for inage rejeclion have leen conslanlIy evoIving in recenl
years lecause of lhis lrenendous success of vireIess producls. Anong lhe various
lechniques, lhe poIyphase fiIlers nighl lecone lhe choice for fulure inage rejeclion schene,
lhanks lo ils pronising perfornances and lo lhe seniconduclor process advances. An
anaIylicaI approach of RC poIyphase fiIlers as veII as a sludy of conponenls nisnalch and
non-ideaIily inpacl on lhe IRR degradalion have leen presenled in lhis paper. Thal Ieads us
lo propose a design nelhodoIogy dedicaled lo passive poIyphase fiIlers (IIIs), laking inlo
accounl oplinun conponenl sizing, Iines nodeIing and Iayoul synnelry and nalching.
This nelhod has leen vaIidaled vilh sone lesl-cases in fuII CMOS lechnoIogy and aIIovs
allaining high inage rejeclion (aloul 6Od) fron vide frequency range (1MHz lo 5CHz).
In addilion, lhe vireIess services have differenl carrier frequencies, channeI landvidlhs,
noduIalion schenes, dala rales, elc., vhich nolivales lhe induslry lo Iook for nuIli-
slandard and nuIli-land devices. In lhis paper, a lunalIe poIyphase fiIler slruclure has leen
proposed, vhich can le appIied lo synlhesize nuIli-slandard appIicalion fiIlers. This luning
characlerislic can le aIso used lo conpensale for lhe landvidlh drifl due lo nisnalches.

0
180
90
270
0
180
RF PPF
Test Chip
RF
Cable
Active
probe
Hybrid Couplers
180
90
MOS VG control
180
Spectrum
analyser
RF
generator
Active
probe
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11. References

AIIen, I. L. & HoIlerg, D. R. (2OO2). CMOS Ana|cg circui| csign (ed. 2nd). Nev York: Oxford
Universily Iress.
Andreani, I., Mallisson, S. & Lssink, . (2OOO). A CMOS gn-C poIyphase fiIler vilh high
inage land rejeclion. Prccccings cf |nc |urcpcan Sc|i S|a|c Circui|s Ccnfcrcncc, 244-
247.
Andreani, I. & Mallison, S. (2OO2). On lhe use of Naula's lransconduclor in Iov-frequency
CMOS gn-C landpass fiIlers. |||| ]curna| cf Sc|i S|a|c Circui|s, 37, 114-124.
anu, M., Wang, H., SeideI, M., Tarsia, M., Iischer, W., CIas, }., Dec, A. & occuzzi, V.
(1997). A iCMOS DoulIe Iov-II receiver for CSM. Prccccings cf |||| Cus|cm
|n|cgra|c Circui|s Ccnfcrcncc, 521-524.
ehlahani, I., Kishigani, Y., Leele, }. & Alidi, A. A. (1999). CMOS 1O MHz II
dovnconverler vilh on-chip lroadland circuil for Iarge inage suppression.
Sqmpcsium cn V|S| circui|s, 83-86.
ehlahani, I., Weeguan, T., Karini-Sanjaani, A., Roilhneier, A. & Alidi, A. A. (2OOO). A
lroadland lunalIe CMOS channeI seIecl fiIler for a Iov-II vireIess receiver. ||||
]curna| cf Sc|i S|a|c Circui|s, 35 (4), 476-489.
ehlahani, I., Kishigani, Y., Leele, }. & Alidi, A. A. (2OO1). CMOS nixers and IoIyphase
fiIlers for Iarge inage rejeclion. |||| ]curna| cf Sc|i S|a|c Circui|s, 36 (6), 873-887.
ehlahani, I., Iirouzkouhi, H., ChokkaIingan, R., DeIshadpour, S., Kheirkhahi, A.,
Narinan, M., Conla, M. & halia, S. (2OO2). A fuIIy inlegraled Iov-II CMOS CIS
radio vilh on-chip anaIog inage rejeclion. |||| ]curna| cf Sc|i S|a|c Circui|s, 37
(12), 1721-1727.
ehzad, A., Lin, L., Shi, Z.M., Anand, S., Carler, K., Kappes, M., Lin, L., Nguyen, T., Yuan,
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www.intechopen.com
Mobile and Wireless Communications Network Layer and Circuit
Level Design
Edited by Salma Ait Fares and Fumiyuki Adachi
ISBN 978-953-307-042-1
Hard cover, 404 pages
Publisher InTech
Published online 01, January, 2010
Published in print edition January, 2010
Mobile and wireless communications applications have a clear impact on improving the humanity wellbeing.
From cell phones to wireless internet to home and office devices, most of the applications are converted from
wired into wireless communication. Smart and advanced wireless communication environments represent the
future technology and evolutionary development step in homes, hospitals, industrial, vehicular and
transportation systems. A very appealing research area in these environments has been the wireless ad hoc,
sensor and mesh networks. These networks rely on ultra low powered processing nodes that sense
surrounding environment temperature, pressure, humidity, motion or chemical hazards, etc. Moreover, the
radio frequency (RF) transceiver nodes of such networks require the design of transmitter and receiver
equipped with high performance building blocks including antennas, power and low noise amplifiers, mixers
and voltage controlled oscillators. Nowadays, the researchers are facing several challenges to design such
building blocks while complying with ultra low power consumption, small area and high performance
constraints. CMOS technology represents an excellent candidate to facilitate the integration of the whole
transceiver on a single chip. However, several challenges have to be tackled while designing and using
nanoscale CMOS technologies and require innovative idea from researchers and circuits designers. While
major researchers and applications have been focusing on RF wireless communication, optical wireless
communication based system has started to draw some attention from researchers for a terrestrial system as
well as for aerial and satellite terminals. This renewed interested in optical wireless communications is driven
by several advantages such as no licensing requirements policy, no RF radiation hazards, and no need to dig
up roads besides its large bandwidth and low power consumption. This second part of the book, Mobile and
Wireless Communications: Key Technologies and Future Applications, covers the recent development in ad
hoc and sensor networks, the implementation of state of the art of wireless transceivers building blocks and
recent development on optical wireless communication systems. We hope that this book will be useful for
students, researchers and practitioners in their research studies.
How to reference
In order to correctly reference this scholarly work, feel free to copy and paste the following:
Fayrouz Haddad, Lakhdar Zad, Wenceslass Rahajandraibe and Oussama Frioui (2010). Polyphase Filter
Design Methodology for Wireless Communication Applications, Mobile and Wireless Communications Network
Layer and Circuit Level Design, Salma Ait Fares and Fumiyuki Adachi (Ed.), ISBN: 978-953-307-042-1,
InTech, Available from: http://www.intechopen.com/books/mobile-and-wireless-communications-network-layer-
and-circuit-level-design/polyphase-filter-design-methodology-for-wireless-communication-applications
www.intechopen.com
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Polyphase Filter Design Methodology for Wireless communication Applications 219

(KhvedeIidze, 2OO1). Il lransIales lhe poIes and lransforns lhe

(%) A (%) f (MHt) lRR (dB)

is lhe line conslanl fraclionaI devialion (ehlahani el aI, 2OO1).

) have leen considered lo focus on lhe effecl of lhe

looI. CaIilralion of lhe addilionaI parasilics aIIovs lheir aIIocalion synnelricaIIy

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