System Block Diagram for Apple Computer PDF CSA Contents

8
PDF CSA CONTENTS
SYNC MASTER
DATE
PDF CSA CONTENTS
System Block Diagram
FINO-M23
08/26/2005
Power Block Diagram
FINO-M23
08/26/2005
Table Items
FINO-M23
10/07/2005
FUNC TEST 1 OF 2
FINO-M23
08/26/2005
POWER CONN / ALIAS
M33-PC
06/20/2005
Signal Alias
FINO-M23
08/29/2005
FUNC TEST 2 OF 2
FINO-M23
08/26/2005
11
1.8V VREG
M33-PC
06/20/2005
11
12
1.5V Vreg
FINO-M23
10/07/2005
13
1.2V Vreg
FINO-M23
08/26/2005
15
2.5V Vreg
FINO-M23
08/26/2005
16
5V & 3.3V Fets
FINO-M23
08/26/2005
17
Vesta Core / Misc
FINO-M23
08/26/2005
19
KODIAK CORE & BYPASS
Q63
08/26/2005
20
KODIAK & SHASTA MISC
FINO-M23
08/26/2005
23
Shasta Core Power
Q63
08/26/2005
24
Shasta Serial / Misc
FINO-M23
08/26/2005
25
PULSAR2 POWER
Q63
08/26/2005
26
PULSAR2 CLOCKS
FINO-M23
08/26/2005
22
27
Pulsar Aliases
FINO-M23
08/26/2005
28
System Management Unit
Q63
08/26/2005
29
SMU SUPPLEMENTAL (2)
FINO-M23
09/20/2005
30
FINO-M23
09/20/2005
31
FINO-M23
08/26/2005
32
Fan 0, 1 & System Temp
FINO-M23
08/26/2005
33
Fan 2 & HD Temp
M33-HS
08/04/2005
39
I2C Connections
FINO-M23
08/26/2005
41
KODIAK EI PWR & CAPS
Q63
08/26/2005
42
KODIAK EI A
Q63
08/26/2005
32
43
CPU EI AND IO
FINO-M23
08/26/2005
44
KODIAK EI B
Q63
08/26/2005
47
CPU STRAPS
FINO-M23
08/26/2005
48
CPU POWER AND BYPASS
FINO-M23
08/26/2005
49
PROC DECOUPLING
FINO-M23
08/26/2005
54
138 Shasta FireWire
Q63
08/26/2005
139 Vesta FireWire PHY
Q63
08/26/2005
140 FIREWIRE CONNECTORS
FINO-M23
08/26/2005
142 USB Host Interfaces
FINO-M23
08/26/2005
143 USB Device Interfaces
FINO-M23
09/20/2005
144 Flash Media Ctrl
FINO-M23
09/27/2005
145 Flash Connector
FINO-M23
09/27/2005
147 AUDIO: CODEC
FINO-SO
10/07/2005
148 AUDIO: LINE INPUT AMP
FINO-SO
10/07/2005
150 AUDIO: LINE OUT AMP
FINO-SO
10/07/2005
152 AUDIO: SPEAKER AMP
FINO-SO
10/07/2005
153 AUDIO: CONNECTORS
FINO-SO
10/07/2005
154 AUDIO: POWER SUPPLIES
FINO-SO
10/07/2005
TABLE_TABLEOFCONTENTS_ITEM
59
Kodiak Memory Dq/Ctl
FINO-M23
78
08/26/2005
61
Parallel Term
FINO-M23
79
08/26/2005
62
Main Memory Clock Buffer FINO-M23
80
08/26/2005
63
MEMORY ADDR BRANCHING
FINO-M23
81
08/26/2005
67
Memory Dimm A
FINO-M23
82
08/26/2005
68
MLB Mem Series Term
FINO-M23
83
08/26/2005
69
On-Board DDR SDRAM
FINO-M23
84
08/26/2005
70
On-Board DDR SDRAM
FINO-M23
85
08/26/2005
82
KODIAK PCI-E X16
Q63
86
08/26/2005
84
GPU PCIe
FINO-M23
87
08/18/2005
85
Graphics Vregs
M33-DD
88
06/20/2005
86
GPU Core Power
FINO-M23
89
10/07/2005
87
GPU Frame Buffer
FINO-M23
10/07/2005
55
88
FB Series Termination
FINO-M23
08/26/2005
56
89
GPU GDDR SDRAM A
FINO-M23
10/07/2005
57
90
GPU GDDR SDRAM B
FINO-M23
10/07/2005
58
91
FB Parallel Termination
M33-DD
06/20/2005
92
GPU Straps
FINO-M23
08/26/2005
93
GPU DVI & DACs
FINO-M23
10/07/2005
96
TMDS / ExtVGA
M33-DD
06/20/2005
97
KODIAK PCI-E CONST
FINO-M23
08/26/2005
98
KODIAK HT16
Q63
08/26/2005
101 HT ALIASES
FINO-M23
08/26/2005
103 Shasta HyperTransport
Q63
08/26/2005
119 Shasta PCI Interface
Q63
08/26/2005
120 PCI SERIES TERMINATION
FINO-M23
08/26/2005
59
60
61
62
63
64
65
66
67
DIMENSIONS ARE IN MILLIMETERS
68
121 AIRPORT & BLUETOOTH
FINO-M23
08/26/2005
69
122 USB 2.0 PCI Interface
Q63
08/26/2005
125 BootROM
Q63
08/26/2005
Apple Computer Inc.
METRIC
XX
X.XX
DRAFTER
70
NOTICE OF PROPRIETARY PROPERTY
DESIGN CK
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
X.XXX
ENG APPD
MFG APPD
QA APPD
DESIGNER
RELEASE
SCALE
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
ANGLES
71
127 Shasta Disk
M33-DC
06/20/2005
129 Disk Connectors
M33-DC
06/20/2005
130 ENET SERIES TERM
FINO-M23
08/26/2005
TITLE
DO NOT SCALE DRAWING
SCH,MLB,IMG5,20
50
CPU VCORE VREG
M33-HS
06/20/2005
52
CPU VCORE MORE BYPASS
FINO-M23
08/26/2005
37
77
08/26/2005
36
Q63
35
KODIAC NBMEM PWR & CAPS
34
58
33
53
08/26/2005
52
FINO-M23
31
51
136 ETHERNET CONNECTOR
30
76
08/26/2005
29
FINO-M23
28
50
08/26/2005
27
49
Q63
26
48
132 Vesta Ethernet PHY
25
47
08/26/2005
24
46
Q63
23
45
131 Shasta Ethernet
44
DATE
21
43
11/01/05 ?
20
CPU ALIASES & MISC
19
56
18
42
SYNC MASTER
DATE
17
75
08/29/2005
16
FINO-M23
15
T,V,I SENSORS
14
55
13
41
PRODUCTION RELEASED
12
74
10/07/2005
FINO-M23
10
CPU AVDD VREG
54
40
408133
PDF CSA CONTENTS
39
ENG
APPD
DESCRIPTION OF CHANGE
TABLE_TABLEOFCONTENTS_HEAD
DATE
38
ECN
DATE
SYNC MASTER
ZONE
REV
IMG5 20" REV F

11/01/05
1
CK
APPD
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
72
NONE
73
SIZE
THIRD ANGLE PROJECTION
MATERIAL/FINISH
NOTED AS
APPLICABLE
DRAWING NUMBER
REV.
051-6863
SHT
F
OF
154
U4300
CPU
U2800
U2801
FANS
NEO 10S
SMU
TEMP SENSORS
PAGE 43,48
J9602, J9603
PAGES 32,33
RTC
PAGE 28
PAGE 28
TMDS
EXT VGA
32-BIT
APPLE PI
ELASTIC INTERFACE
667MHZ OR 733MHZ
PAGE 96
U6200
CLOCK
PAGE 62
PAGE 89
PAGE 42
M23:1.8V/600MHZ
M33:1.8V/700MHZ
U1900
GPU
64-BIT
FRAME BUFFER
PCIE
PCIE X16
2.5GHZ
M23:RV370 XT
M33:RV380 XT
POWER
CLOCKS
FRAME
BUFFER B
PAGE 25
PAGE 26
PAGE 90
ONBOARD MEMORY
J6700
64-BIT
MAIN MEMORY
1.8V/533MHZ
DIMM
PARALLEL
SERIES
TERM
64MX8
TERM
PAGES 29,30
MEMORY
PAGES 68
PAGE 61
PAGE 19
PAGES 67,70
PAGE 67
MISC
HYPERTRANSPORT
PAGE 20
PAGE 98
JE310/JE320/JE330
JE350
USB
CONNECTORS
8-BIT
HYPERTRANSPORT
1.2V/800MHZ
BNDI
INTERFACE
PAGE 143
PAGE 143
CONTROL = 2.5V
U9000, U9001
PULSAR2
CORE
PAGES 84,86,87,93
64-BIT
FRAME BUFFER
M23:1.8V/600MHZ
M33:1.8V/700MHZ
U2500
KODIAK
PAGE
82
BUTTONS
ALS
SYSTEM LED
BATTERY
PAGE 59
FRAME
BUFFER A
MAIN MEMORY
APPLE PI
U8400
U8900, U8901
SMU SUPPLEMENTAL
BUFFER
I2C
UE401
USB
HUB
PAGE 39
1
PAGE 144
UE400
FLASH
CTLR
PAGE 144
USB
PAGE 142
UC200
UC500
JC150
USB 2.0
BOOTROM
uPD720101
PCI
PAGE 125
PAGE 103
SATA
PAGE 129
SATA2
UATA
CONNECTOR
UATA/133
3.3V/133MHZ
UATA
PAGE 127
OPTICAL
CORE
PAGE 23
NCs
PAGE 131
32-bit PCI (5V-3.3V/33MHz)
PAGE 138
I2S
PAGE 24
SCCA
I2S0
I2S1
SCCB
I2S2
1394 OHCI (3.3V/98MHz)

8-bit TX/RX
GMII (3.3V/125MHz)
8-bit TX & 8-bit RX
UE700
S/PDIF
AUDIO CODEC
PCM3052A
VESTA
PAGE 132
A
4 Diff pairs
JD600
LINE OUT
AMP
PAGE 147
JF301
PAGE 139
0
1
PAGE 140
PAGE 152
System Block Diagram
SPEAKER
CONNECTOR
SYNC_MASTER=FINO-M23
PAGE 148
SYNC_DATE=08/26/2005
PAGE 153

JEC00, JEC01
PAGE 136
SPEAKER
AMP
LINE IN
AMP
2 Diff pairs
FIREWIRE A
CONNECTORS
PAGE 153
LINE OUT
PAGE 150
FIREWIRE A
ETHERNET
CONNECTOR
OPTICAL OUT
JF303
COMBO OUT
CONNECTOR
U1701
GIG ETHERNET
SD
PAGE 142
ETHERNET FIREWIRE
PAGE 129
CF
PAGE 145
PAGE 121
U2300
SHASTA
JC901
PCI
HYPERTRANSPORT
PAGE 127
1.2V/1.5GHZ
PAGE 122
JE500
MEDIA CARD CONNECTOR
PAGE 24
SATA/150
GPIO/PCI64
SATA
CONNECTOR
SATA1
HARD DRIVE
PAGE 119
JC900
WIRELESS
CONNECTOR
JF300
LINE IN
BNDI
INTERFACE

CONNECTOR
SIZE
PAGE 153
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
F
154
1
SMU
SYS_POWERUP_L
POWER SEQUENCE PIN

6
NC_SMU_PWRSEQ_P1_0
NC_SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_0
SMU_PWRSEQ_P1_4
13 12
TURN_ON_PP1V2_L
SMU_PWRSEQ_P1_1
28
SYS_POWERUP_L
J700
PAGE 7
POWER CONNECTOR
PWR_GOOD_PP1V5
PWR_GOOD_PP1V8
TURN_ON_PP3V3_PWRON_L
PP3V3_PWRON
28
PP12V_ALL
PP12V_RUN
FW CONN
PP5V_RUN
20" PANEL POWER

17" LCD INVERTER
PP5V_ALL
PP3V3_ALL
PP3V3_RUN
OPTICAL
16 15
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P1_2
SMU_PWRSEQ_P1_3
28
28
28
28
28
PCI BUS
AUDIO CODEC
PP1V2_ALL
PP2V5_ALL
SWITCHER
1
R431
PAGE 13
PP1V5_PWRON
SWITCHER
10K
VESTA CORE
5%
1/16W
MF-LF
2 402
PAGE 12
PULSAR
KODIAK CORE
PP1V5_RUN
FET SWITCH
CPU CORE
SWITCHER
PP4V5_RUN_AUDIO
LINEAR
PAGE 154
PAGE 50
PP2V5_RUN_CPU_AVDD
PP3V3_PWRON
FET SWITCH
USB CONN
PP2V5_GPU_A2VDD
LINEAR
LINEAR
PAGE 54
PAGE 16
PAGE 16
AUDIO CODEC
PAGE 12
PP5V_PWRON
FET SWITCH
PAGE 85
MODEM & BT
USB2 HOST
EI
PP1V2_TPVDD
3
PP1V5_PWRON
LINEAR
PP1V8_TPVDD
GPU CORE
SWITCHER
PAGE 85
PP1V8_PWRON
SWITCHER
PP2V5_ALL
LINEAR
LINEAR
COMPARE_PP1V5
5%
1/16W
MF-LF
402
PAGE 85
IN
VESTA
MAIN MEMORY
PP1V2_PWRON
FET SWITCH
PP1V8_GPU
LINEAR
PP1V8_RUN
IN
PP1V8_RUN
POWER SW
PP2V5_PWRON
FET SWITCH
PAGE 11
GPU MEMORY
SOI-LF
14
GND
12
C430
0.01UF
PP1V2_RUN
FET SWITCH
PAGE 13
20%
2 16V
CERM
402
IN
PAGE 13
HT BUS
SHASTA CORE
PAGE 85
U400
100K 2
1
PAGE 15
PAGE 11
LM339A
PS_1V_REF
R430
PAGE 85
LINEAR
PAGE 85
V+
PP1V5_VDDC_CT
PP2V5_RUN
FET SWITCH
PP2V5_ALL
PP2V5_ALL
PAGE 15
PAGE 15
PP5V_ALL
R442
150K
R441
10K
LM339A
V+
R440
U400
100K 2
5%
1/16W
MF-LF
402
COMPARE_PP1V8
SOI-LF
1
GND
1
12
C440
0.01UF
20%
2 16V
CERM
402
5%
1/16W
MF-LF
2 402
PS_1V_REF
PAGE 91
5%
1/16W
MF-LF
2 402
PP0V9_GPU_VTT
LINEAR
C441
0.1UF
20%
2 10V
CERM
402
R443
100K
1%
1/16W
MF-LF
2 402
PP2V5_ALL
U400P2
Power Block Diagram
LM339A
V+
U400
5
SOI-LF
GND
12

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
F
154
PROCESSORS
ASICS
NEED TO UPDATED BIN CODES AS NOTES

TABLE_5_HEAD
TABLE_11_HEAD
PART #
QTY
DEVICE
PACKAGE
DESCRIPTION
VALUE
VOLT.
WATT.
TOL.
REFERENCE DESIGNATOR(S)
PART#
BOM OPTION
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
TABLE_11_HEAD
337S3224
PROCESSOR CBGA-576-1MM IC,GPUL,DD3.1,1.9G,85C
1.9GHZ
1.10V
45W
50MV
U4300
17_INCH_LCD
CRITICAL
343S0379
IC,KODIAK,V1.2,PBGA,200MM
U1900
343S0377
IC,ASIC,SHASTA,V1.1,PBGA,LF
U2300
343S0356
IC,ASIC,VESTA,V1.3,LF
U1701
343S0319
IC,PULSAR2,100P,P8MM,BGA
U2500
CRITICAL
TABLE_5_ITEM
TABLE_11_HEAD
337S3220
PROCESSOR CBGA-576-1MM IC,GPUL,DD3.1,2.1G,85C
2.1GHZ
1.10V
45W
50MV
U4300
20_INCH_LCD
CRITICAL
CRITICAL
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
CRITICAL
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
337S3225
337S3224
17_INCH_LCD
U4300
IC,DD3.1,1.9G,1.15V
337S3226
337S3224
17_INCH_LCD
U4300
IC,DD3.1,1.9G,1.20V
337S3227
337S3224
17_INCH_LCD
U4300
IC,DD3.1,1.9G,1.25V
337S3228
337S3224
17_INCH_LCD
U4300
IC,DD3.0X,1.9G,1.15V
337S3229
337S3224
17_INCH_LCD
U4300
IC,DD3.0X,1.9G,1.20V
337S3230
337S3224
17_INCH_LCD
U4300
IC,DD3.0X,1.9G,1.25V
337S3231
337S3224
17_INCH_LCD
U4300
IC,DD3.0X,1.9G,1.30V
337S3221
337S3220
20_INCH_LCD
U4300
IC,DD3.1,2.1G,1.15V
337S3222
337S3220
20_INCH_LCD
U4300
IC,DD3.1,2.1G,1.20V
337S3223
337S3220
20_INCH_LCD
U4300
IC,DD3.1,2.1G,1.25V
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
MISC PARTS
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
051-6790
PCB,SCHEM,MLB,M23
SCH1
17_INCH_LCD
051-6863
PCB,SCHEM,MLB,M33
SCH1
20_INCH_LCD
820-1783
PCB,FAB,MLB,M23
MLB1
17_INCH_LCD
820-1766
PCB,FAB,MLB,M33
MLB1
20_INCH_LCD
062-2082
SPEC,VENDOR PACKAGING PROCEDURE
VPP1
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
825-6447
BARCODE LABEL, MLB
341T1751
IC,FLASH,1MX8,3.3V,90NS
UC500
LBL1
341T1752
PURCH ASSY, SMU BIG
U2800
603-7318
M23 CPU HEATSINK
MECH1
OMIT
603-7321
M33 CPU HEATSINK
MECH1
OMIT
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
603-7319
M23 GPU HEATSINK
MECH2
OMIT
603-7322
M33 GPU HEATSINK
MECH2
OMIT
CRITICAL
HEATSINKS ARE NOW ON THE PD BOM
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
603-7320
M23 NB HEATSINK
MECH3
OMIT
603-7323
M33 NB HEATSINK
MECH3
OMIT
875-1905
CPU GAP FILLER
GAP1
875-2429
LED COVER TAPE
TAPE1
CRITICAL
TABLE_5_ITEM
CRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
17_INCH_LCD
ALTERNATES
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
378S0140
378S0141
343S0388
343S0356
BOM OPTION
REF DES
COMMENTS:
LED700,LED702
KINGBRIGHT LED
TABLE_ALT_ITEM
TABLE_ALT_ITEM
U1701
VESTA A4
TABLE_ALT_ITEM
126S0078
126S0086
C722
EL CAP
126S0068
126S0088
CF000
EL CAP
353S1321
353S1105
U400
LM339
138S0558
138S0547
10UF CAP ALL LOC.
124-0338
124-0333
PANASONIC CAPS
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
Table Items

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
F
154
NO TEST XW NETS
I307
I826
I997
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
GND_U1100 11
GND_U1200 12
GND_U1300
PP_2V5PWRONNBMISC
PP_1V2PWRONSBVCORE
PP_3V3PWRONSBPCI64
PP_2V5PWRONSB
PP_1V2PWRONSBPLL45VDD
PP_OVDD_PULSAR1
PP_1V2PWRONPULSAR1
PP_1V5PULSAR2
PP_1V5PWRONPULSAR2
GND_SMU_AVSS
PP_3V3ALLSMUAVCC
PP_3V3ALLSMU
PP_VEINB
GND_CPU_AVDD
VC_AGND
VC_OUTSEN_R
KPVDD2_FMAX
GND_GPU_PVSS
GND_GPU_MPVSS
I1042
NO_TEST=YES
GND_AUDIO_MIC
I947
I948
I949
I950
I951
I952
I953
I954
I984
I985
I986
I987
I988
I989
I990
I991
I992
I993
I994
I995
I996
I998
I1000
13
I999
20
I1002
23
I1001
23
I1003
23
I1004
24
I1005
25
I1007
25
I1006
25
I1008
25
I1010
28 55
I1009
28
I1011
28
I1027
41
I1026
48
I1029
50
I1028
50
I1031
55
I1030
86
I1033
87
I1032
I1043
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
GND_GPU_TPVSS
GND_GPU_TXVSSR
GND_GPU_VSSDI
GND_GPU_AVSSN
GND_GPU_AVSSQ
GND_GPU_A2VSSN
GND_GPU_A2VSSQ
KOD_L15_GND
PP_3V3SBPCI_B9
PP_2V5PWRONSB_B9
PP_VIOPCIUSB2_C2
PP_1V2PWRONDISKSB_CC
PP2V5_VESTA_BIASVDD1
PP2V5_VESTA_XTALVDD1
PP1V2_VESTA_PLLVDD1
PP1V2_VESTA_PLLVDD2
PP1V2_VESTA_FAVDDL
PP2V5_VESTA_FAVDDM
PP3V3_VESTA_FAVDDH
PP3V3_PWRON_NEC_AVDD
GND_AUD_LOAMP
93
I1012
93
I1014
93
I1013
93
I1016
93
I1015
93
I1017
93
I1018
98 101
I1019
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
GND_NEC_AVSS_R
142
GND_AUDIO_SPKRAMP_PLANE 152 154
GND_AUDIO_CODEC
147 148 150 154
KPGND2_FMAX
55
TDIODE_POS_FMAX
55
TDIODE_NEG_FMAX
55
DAGND
55
INA138_OUT
55
I837
I836
I839
I841
I846
I847
I848
I849
I850
119
I1020
122
I1022
127
I1024
132
I1023
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAMCLK_AVSS
PP12V_AUDIO_SPKRAMP
GND_AUDIO
GND_AUDIO_SPKRAMP
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
KOD_H05_GND
KOD_K07_GND
KOD_G10_GND
KOD_J13_GND
KOD_L13_GND
KOD_H08_GND
PCIE_SLOTA_PRSNT_L
U8500_GND
GND_AUD_LOAMP_CHGPMP
62
I851
7 152
I429
7 154
I428
7 152 154
I375
132
132
I376
I1035
139
I1034
139
I1037
139
I1036
139
I1039
139
I1038
139
I1041
142
I1040
150 154
I1044
82 97
I348
82 97
I350
82 97
I349
82 97
I356
82 97
I357
82 97
I358
82 84
I360
85
I362
150 154
I361
153 154
I883
I1263
EE IDENTIFIED NO TEST NETS
I1264
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
TP_FBBCS1_L
AUD_4V5_FB
ITS_RUNNING
LED801_1
LED802_1
PCI_CLK66M_SB_INT_R
Q800_D
Q800_G
Q801_B
Q802_B
Q802_E
Q803_B
TP_USB2_PWREN<0>
TP_USB2_PWREN<1>
TP_SB_FSTEST
TP_SB_PLLTEST
TP_USB2_PWREN<2>
TP_USB2_PWREN<3>
TP_USB2_PWREN<4>
TP_NEC_NTEST1
TP_NEC_SMC
TP_NEC_SMI_L
TP_NEC_SRCLK
TP_NEC_SRMOD
TP_NEC_TEST
UATA_DASP_L_DS
FUNC TEST NETS
87
154
7
NOTES FROM TOM FUSSELMAN
8
8
26
PLACE TWO TEST POINTS ON TOP SIDE

FOR PP3V3_ALL AND GND
PLACE WITHIN 1 INCH OF EACH OTHER
USE FAT TRACES
8
8
8
8
8
143
143
24
I1080
24
I1088
143
I1089
I955
I957
I958
I959
I960
I961
I962
I963
I964
I965
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NC_EI_NB_TO_CPU_B_CLK_P
NC_EI_NB_TO_CPU_B_CLK_N
NC_EI_NB_TO_CPU_B_AD<0..43>
NC_EI_NB_TO_CPU_B_SR_P<0..1>
NC_EI_NB_TO_CPU_B_SR_N<0..1>
NC_EI_CPU_B_TO_NB_CLK_P
NC_EI_CPU_B_TO_NB_CLK_N
NC_EI_CPU_B_TO_NB_AD<0..43>
NC_EI_CPU_B_TO_NB_SR_P<0..1>
NC_EI_CPU_B_TO_NB_SR_N<0..1>
56
I1096
56
I1097
56
I1098
56
I1099
56
I1100
56
I1101
56
I1102
56
I1103
56
I1104
56
I1105
I1106
I1107
I1108
I969
I971
I972
I973
I975
I974
I976
I978
I977
I982
I1045
I1046
I1047
I1048
I1049
I1050
I1051
I1052
I1054
I1053
I1055
I1057
I1056
I1060
I1058
I1059
I1062
I1061
I1063
I1065
I1064
I1068
I1066
I1067
I1069
I1070
I1071
I1072
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NC_NB_CPU_A1_INT_L
NC_NB_CPU_B0_INT_L
NC_NB_CPU_B1_INT_L
NC_CPU_A1_QACK_L
NC_CPU_B0_QACK_L
NC_CPU_B1_QACK_L
NC_HT_MB_TO_NB_CAD_P<8..15>
NC_HT_MB_TO_NB_CAD_N<8..15>
NC_HT_NB_TO_MB_CAD_P<8..15>
NC_HT_NB_TO_MB_CAD_N<8..15>
NC_CLK_RAI_200M_N<0>
NC_CLK_RAI_200M_P<0>
NC_CLK_RAI_PCIEA_N<0>
NC_CLK_RAI_PCIEA_P<0>
NC_CLK_RAI_PCIEB_N<0>
NC_CLK_RAI_PCIEB_P<0>
NC_CLK_RAI_PCIEC_N<0>
NC_CLK_RAI_PCIEC_P<0>
NC_A_AVREG_0
NC_A_AVREG_1
NC_A_AVREG_2
NC_CPU_B_APSYNC
NC_EI_CPU_B_SYSCLK_N
NC_EI_CPU_B_SYSCLK_P
NC_HT_NB_TO_MB_CLK_N<1>
NC_HT_NB_TO_MB_CLK_P<1>
NC_J2904_11
NC_J2904_12
NC_NCV1009_1
NC_NCV1009_2
NC_NCV1009_3
NC_NCV1009_4
NC_NCV1009_5
NC_NCV1009_ADJ
NC_RAM_ARB0_REF25MHZ
NC_SMU_PWRSEQ_P1_0
NC_SMU_PWRSEQ_P1_4
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<38>
RFBD<37>
RFBD<36>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<34>
RFBD<33>
RFBD<32>
RFBD<31>
RFBD<30>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<28>
RFBD<27>
RFBD<26>
RFBD<25>
56
I1109
56
I1110
56
I1111
56
I1112
56
I1113
56
I1114
101
I1115
101
I1116
101
I1117
101
I1118
27
I1120
27
I1121
27
I1122
27
I1123
27
I1124
27
I1125
27
I1126
27
I1127
82
I1128
82
I1129
82
I1130
27
I1131
27
I1132
27
I1133
101
I1134
101
I1135
29
I1136
29
I1137
55
I1138
55
I1139
55
I1140
55
I1141
55
I1142
55
I1143
27
I1155
27
I1156
I1157
I1158
88 89
I1179
88 89
I1181
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
KPVDD2
KPGND2
CPU_DIODE_POS
CPU_DIODE_NEG
FMAXT_P
FMAXT_M
CORE_ISNS_P
CORE_ISNS_M
PPV_RUN_CPU_AVDD_R_L
NC_CLK_RAI_GIGE_25MHZ
NC_CLK_RAI_REFCLK_66M
NC_CPU_B_TBEN_CLK_US
NC_PMR_CLK_DIS_L
NC_I2S2_MCLK
NC_SATA_RXD_N2_C
NC_SATA_RXD_P2_C
NC_SATA_TXD_N2
NC_SATA_TXD_P2
TP_SB<29>
TP_SB<28>
TP_SB<27>
TP_SB<26>
TP_SB<25>
TP_SB<24>
TP_SB<23>
TP_SB<22>
TP_SB<21>
TP_SB<20>
TP_SB<19>
TP_SB<18>
TP_SB<17>
TP_SB<16>
TP_SB<15>
TP_SB<14>
TP_SB<13>
TP_SB<12>
TP_SB<11>
TP_SB<10>
TP_SB<9>
TP_SB<8>
TP_SB<7>
TP_SB<6>
TP_SB<5>
TP_SB<4>
TP_SB<3>
TP_SB<2>
TP_SB<1>
TP_SB<0>
RFBD<61>
RFBD<60>
RFBD<59>
NO_TEST=YES
NO_TEST=YES
RFBD<57>
RFBD<56>
I1267
48 50 55
48 50 55
I1197
48 55
I1200
48 55
I1199
I1161
I1162
I1165
I1166
I1167
I1168
143
I1091
122
I1092
122
I1093
122
I1094
122
I1171
I1172
I1173
I1269
I1095
55
55
I1202
55
I1203
55
I1204
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<122>
RFBD<121>
RFBD<120>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<118>
RFBD<117>
RFBD<116>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<114>
RFBD<113>
RFBD<112>
I1272
88 90
I1273
88 90
I1275
I1206
27
I1207
26
I1208
I1277
88 90
I1276
RFBD<19>
RFBD<18>
129
I1211
129
I1212
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<16>
RFBD<15>
RFBD<14>
RFBD<13>
NO_TEST=YES
NO_TEST=YES
RFBD<11>
RFBD<10>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<8>
RFBD<7>
RFBD<6>
RFBD<5>
88 89
I1335
I1280
88 90
I1281
88 90
I1214
I1215
142
I1216
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<110>
RFBD<109>
RFBD<108>
I1283
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<106>
RFBD<105>
RFBD<104>
88 90
I1176
I1177
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<23>
RFBD<22>
RFBD<21>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
I1337
88 89
I1338
88 89
I1339
88 89
I1340
RAM_DQ_R<60>
RAM_DQ_R<59>
RAM_DQ_R<58>
RAM_DQ_R<57>
RAM_DQ_R<56>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<54>
RAM_DQ_R<53>
RAM_DQ_R<52>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<50>
RAM_DQ_R<49>
RAM_DQ_R<48>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<46>
RAM_DQ_R<45>
RAM_DQ_R<44>
RAM_DQ_R<43>
I1307
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<41>
RAM_DQ_R<40>
RAM_DQ_R<37>
RAM_DQ_R<38>
I1310
NO_TEST=YES
RAM_DQ_R<36>
I1285
88 90
I1288
I1218
142
I1220
142
I1219
I1287
88 90
I1289
88 90
I1292
I1221
142
I1223
142
I1224
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<102>
RFBD<101>
RFBD<100>
I1291
88 90
I1293
88 90
142
I1226
142
I1227
142
I1228
142
I1229
142
I1230
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<98>
RFBD<97>
RFBD<96>
RFBD<95>
RFBD<94>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<92>
RFBD<91>
RFBD<90>
I1297
88 90
I1296
88 90
I1299
88 90
I1301
88 90
I1300
I1232
142
I1233
142
I1234
I1302
88 90
I1303
88 90
I1306
I1236
142
I1237
142
I1238
142
I1239
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<88>
RFBD<87>
RFBD<86>
RFBD<85>
I1305
88 90
I1242
I1241
142
I1244
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<83>
RFBD<82>
RFBD<81>
NO_TEST=YES
NO_TEST=YES
RFBD<79>
RFBD<78>
I1245
88 89
I1246
88 89
88 89
I1182
I1184
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<54>
RFBD<53>
RFBD<52>
88 90
I1311
88 90
I1313
88 90
I1312
C
PP1V2_ALL
88 89
88 89
I1188
88 89
I1189
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
88 89
I1249
88 89
I1250
88 89
I1252
88 89
I1253
88 89
I1314
88 90
I1316
88 90
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<76>
RFBD<75>
RFBD<74>
88 90
I1318
88 90
I1320
88 90
I1254
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<72>
RFBD<71>
RFBD<70>
RFBD<69>
88 90
I1324
88 90
I1323
88 90
I1325
88 90
I1326
RFBD<50>
RFBD<49>
RFBD<48>
RFBD<47>
88 89
88 89
88 89
PP1V2_ALL
PP3V3_ALL
PP5V_ALL
I1190
88 89
I1192
NO_TEST=YES
NO_TEST=YES
88 89
I1193
88 89
I1196
88 89
I1195
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
88 89
88 89
PP1V8_RUN
PP2V5_RUN
PP3V3_RUN
PP12V_RUN
61 68 70
7
61 68 70
16 7
61 68 70
7
PP1V8_RUN
PP2V5_RUN
PP3V3_RUN
PP12V_RUN
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
61 68 70
61 68 70
61 68 70
PP1V5_PWRON
7
61 68 70
PP1V5_PWRON
FUNC_TEST=TRUE
61 68 70
61 68 70
GND
FUNC_TEST=TRUE
61 68 70
61 68 70
61 68 70
61 68 70
61 68 70
61 68 70
61 68 70
I1341
61 68 70
I1343
61 68 70
I1344
61 68 70
I1345
61 68 70
I1346
61 68 70
I1348
NO_TEST=YES
RAM_DQ_R<9>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<8>
RAM_DQ_R<7>
RAM_DQ_R<6>
RAM_DQ_R<5>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<3>
RAM_DQ_R<2>
RAM_DQ_R<1>
61 68 69
61 68 69
61 68 69
61 68 69
61 68 69
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<34>
RAM_DQ_R<33>
RAM_DQ_R<32>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<30>
RAM_DQ_R<29>
RAM_DQ_R<28>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<31>
RAM_DQ_R<25>
RAM_DQ_R<24>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<22>
RAM_DQ_R<21>
RAM_DQ_R<20>
RAM_DQ_R<19>
61 68 70
I1350
61 68 69
61 68 69
61 68 69
61 68 70
61 68 70
61 68 69
61 68 69
61 68 69
61 68 69
61 68 69
61 68 69
FUNC TEST 1 OF 2
61 68 69
61 68 69
61 68 69
61 68 69
88 89
88 89
I1257
88 89
I1258
88 89
I1259
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RFBD<67>
RFBD<66>
RFBD<65>
88 90
I1327
88 90
I1329
88 89
88 89
I1262
NO_TEST=YES
RFBD<62>
I1333
88 89
I1334
RFBD<42>
RFBD<41>
RFBD<40>
RAM_DQ_R<17>
RAM_DQ_R<16>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
RAM_DQ_R<14>
RAM_DQ_R<13>
RAM_DQ_R<12>
RAM_DQ_R<11>
61 68 69
61 68 69

I1330
RFBD<45>
RFBD<44>
NO_TEST=YES
NO_TEST=YES

88 90
88 89
88 89
PP5V_ALL
88 89
I1255
I1185
PP3V3_ALL
88 90
I1317
88 89
88 89
29
88 89
88 90
142
88 89
28 29
88 89
I1349
142
28 29
88 90
142
142
28 29
88 90
142
142
28 29
88 90
142
142
28 29
88 90
I1294
142
28 29
88 90
142
142
SMU_BOOT_SCLK
SMU_BOOT_RXD
SMU_BOOT_CE
SMU_BOOT_CNVSS
SMU_BOOT_TXD
SMU_BOOT_BUSY
SMU_MANUAL_RESET_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
88 89
RFBD<3>
RFBD<2>
RFBD<1>
RAM_DQ_R<63>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
I1286
88 90
142
142
7 12 28 50 85
88 90
I1332
I1175
88 89
142
28 29
129
129
129
29
88 89
7
88 90
I1278
I1210
29
TOP SIDE ONLY

NO_TEST=YES
NO_TEST=YES
88 90
20
154
28 29
88 90
48
27
SYS_POWER_BUTTON_L
POWER_BUTTON_L
RESET_BUTTON_L
SMU_RESET_L
SYS_POWERUP_L
7 8
122
I1090
88 90
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
50
7 28 29
122
88 90
I1322
I1187
I1170
I1268
88 90
PPVCORE_CPU
=PP3V3_ALL_SMU
=PP5V_RUN_CPU
88 89
I1183
I1164
RFBD<126>
RFBD<125>
RFBD<124>
I1271
I1248
I1160
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
143
I1336
I1266
61 68 69
61 68 69
SIZE
61 68 69
61 68 69
APPLE COMPUTER INC.
88 89
SCALE
88 89
REV.
051-6863
F
6
154
SHT
NONE
88 89
DRAWING NUMBER
OF
RUN RAILS
ONLY ON IN RUN
PWRON RAILS
ALL RAILS
ON IN RUN AND SLEEP
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
PP5V_PWRON
PP12V_ALL
PP12V_RUN
62
CRITICAL
PP3V3_ALL
PP12V_RUN PP5V_RUN
J700
PP3V3_RUN
PP3V3_ALL
PP5V_ALL
PP12V_ALL
HM9607E-P2
M-RT-TH1
1
R702
10K
5%
1/16W
MF-LF
2 402
SYS_POWERFAIL_L
92 LCD_PWM
28
10
11
12
13
14
INV_CUR_HI
VOLTAGE=12V
PP12V_RUN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MAKE_BASE=TRUE
NET_SPACING_TYPE=POWER
=PP12V_GPU
20%
2 6.3V
ELEC
6.3X8-SM
VOLTAGE=0V
PP12V_AUDIO_SPKRAMP
1
U700
14
2
VOLTAGE=5V
MAKE_BASE=TRUE
R710
1.5K
2 ITS_PLUGGED_IN
5%
1/10W
MF-LF
603
SYS_POWERUP_L_BUF
LED702
GREEN-3.6MCD
2.0X1.25MM-SM
7 16 96
16 6
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_RUN
R701
330
1
1
LED700
GREEN-3.6MCD
2.0X1.25MM-SM
5%
1/10W
MF-LF
603
ITS_RUNNING
DEVELOPMENT
PP2V5_RUN
1
LED701
GREEN-3.6MCD
2.0X1.25MM-SM
2
SILKSCREEN:1
SILKSCREEN:2
PP2V5_RUN
MAKE_BASE=TRUE
VOLTAGE=2.5V
PP1V8_RUN
=PP2V5_RUN_I2C
PP1V8_PWRON
VOLTAGE=2.5V
MAKE_BASE=TRUE
23 24 119 138
PP2V5_ALL
MAKE_BASE=TRUE
VOLTAGE=2.5V
PP1V2_ALL
25
136
98
PP1V8_RUN
VOLTAGE=1.8V
MAKE_BASE=TRUE
=PPV_GPU_MEM
=PP1V8_RUN_RAM
17 132 139
=PP1V2_ENETFW
17 132 139
20 28 30 39
XW702
SM
154 6
GND_AUDIO
XW706
SM
1
2 =PP1V5_PWRON_PULSAR
XW703
SM
7 25
154 152 6
GND_AUDIO_SPKRAMP
PP1V5_PWRON_PULSAR
VOLTAGE=1.5V
MAKE_BASE=TRUE
XW707
SM
1
CHASSIS GND
96
=PP1V5_PWRON_PULSAR 7 25
=PP1V5_PULSAR
25
=PPV_PWRON_NB_REFCLK 42 59
96
136
140
GND_CHASSIS_RIGHT
MAKE_BASE=TRUE
VOLTAGE=0
GND_CHASSIS_VGA
GND_CHASSIS_RJ45
GND_CHASSIS_FIREWIRE
NOSTUFF
R721
OMIT
ZH704
4P25R3P5
OMIT
C704
ZH701
0.01UF
4P75R4
20%
2 16V
CERM
402
0.01UF
ZH702P1
0.01UF
20%
16V
2 CERM
402
0.01UF
C707
B
OUT
153
143
GND_CHASSIS_AUDIO_INTERNAL
GND_CHASSIS_BNDI
VOLTAGE=0
MAKE_BASE=TRUE
HS_SDF801
NOSTUFF
1
C703
0.01UF
20%
16V
2 CERM
402
R790
4P75R4
C702 ZH703P1 1
20%
16V
2 CERM
402
0.01UF
ZH703
NOSTUFF
NOSTUFF
1
GND_CHASSIS_LEFT
MAKE_BASE=TRUE
VOLTAGE=0
GND_CHASSIS_USB
GND_CHASSIS_AUDIO_EXTERNAL
OMIT
ZH706
4P25R3P5
C706ZH706P1
MAKE_BASE=TRUE
4P75R4
ZH705P1
NOSTUFF
GND_CHASSIS_TMDS
VOLTAGE=0V
ZH702
4P25R3P5
OMIT
84
143
154 153
5%
1/16W
MF-LF
402
OMIT
ZH705
C705
20%
16V
2 CERM
402
PP3V3_RUN
OMIT
NOSTUFF
1
=PP1V2_GPU_PCIE
ZH700P1
ZH704P1
PPVCORE_GPU
MAKE_BASE=TRUE
4P75R4
NOSTUFF
OMIT
CHASSIS MOUNTING
86 85
96
ZH700
GPU MOUNTING
=PPOVDD_PULSAR 25
=PPV_EI_CPU
29 30 47 48 56
=PPV_EI_NB
41 42 56
PP1V5_RUN
PP1V5_RUN
VOLTAGE=1.5V
MAKE_BASE=TRUE
85
=PP2V5_ENETFW
GND RAILS
98 103
=PPVCORE_PWRON_NB
19
=PPVCORE_PWRON_NB_PCIE 82
=PPVCORE_PWRON_NB_HT 98
=PP1V2_PWRON_SB_HT
103
=PP1V2_PWRON_DISK_SB 127
=PP1V2_PWRON_SB
24
=PP1V2_PWRON_SB_VCORE 23
=PP1V2_PWRON_PULSAR 25
=PP1V2_PWRON_HT_NBTX 98
39
12
140
17 132 139
82
5%
1/16W
MF-LF
402
PP1V2_PWRON
VOLTAGE=1.2V
MAKE_BASE=TRUE
61 62
55
R711
PP1V5_PWRON
MAKE_BASE=TRUE
VOLTAGE=1.5V
PP1V2_PWRON
87 89 90 91
6 28 29
=PP3V3_FW
=PP3V3_ENETFW
=PP3V3_ALL_GPU
PP1V2_ALL
MAKE_BASE=TRUE
VOLTAGE=1.2V
NOSTUFF
PP1V5_PWRON
85
=PP3V3_ALL_SMU
=PP3V3_ALL_CPU
132 136
=PP1V8_PWRON_NBMEM
20 39 58 59
=PP1V8_PWRON_RAM_I2C_VDD 67
=PP1V8_PWRON_RAM
62
=PP1V8_PWRON_DIMM
67 69 70
SILKSCREEN:RUN
6
=PP5V_ALL_GPU
PP3V3_ALL
MAKE_BASE=TRUE
VOLTAGE=3.3V
28 30 43
=PP2V5_PWRON_SB
=PP2V5_PWRON_PULSAR
=PP2V5_ENET
=PP2V5_PWRON_NB_HT
=PP2V5_PWRON_NB_PCIE
=PP2V5_PWRON_HT
=PP2V5_PWRON_NB_MISC
6 8
=PP3V3_GPU
85 92 93 96
=PP3V3_AUDIO
147 152 153 154
=PP3V3_RUN_CPU
54 55
=PP3V3_PATA
129
=PP3V3_SB_PCI
=PP3V3_PCI
121 125
=PPVIO_PCI_USB2 122
=PP3V3_RUN_PULSAR 25
PP3V3_RUN_SB
119
=PP3V3_RUN_SB_PCI 24
=PP3V3_RUN_I2C
39
=PP3V3_RUN_SMU
20 28 30
DEVELOPMENT
ITS_ALIVE
VOLTAGE=5V
MAKE_BASE=TRUE
PP3V3_ALL
PP3V3_RUN
PP3V3_RUN
5%
1/10W
MF-LF
603
PP2V5_PWRON
VOLTAGE=2.5V
MAKE_BASE=TRUE
PP1V8_PWRON
20%
10V
2 CERM
402
125
1 TSSOP
R700
820
=PP5V_GPU
=PP5V_RUN_CPU
50 55
PP5V_ALL
150 153 154
0.1UF
PP3V3_PWRON
C700
3
7
PP5V_ALL
74LC125
PP2V5_PWRON
PP5V_AUDIO_ANALOG
=PP5V_PATA
129
PP5V_RUN
=PP3V3_ENET
=PP3V3_PWRON_SMU
=PP3V3_PWRON_BNDI
XW700
SM
140
=PP12V_CPU
PP2V5_ALL
PP5V_RUN
PP3V3_ALL
SYS_POWERUP_L
=PP3V3_PWRON_SB
20 23 24 56 119
=PP3V3_PWRON_SB_PCI64 23
=PP3V3_PWRON_SB_PCI32 23
=PP3V3_PWRON_PULSAR 25
=PP3V3_PWRON_USB
142 144 145
=PP3V3_PWRON_BT
121
=PP3V3_PWRON_CPU
55
6 152
85
143
6
XW708
SM
P/N 518-0188
85 50 28 12 6
=PP5V_PWRON_BNDI
XW701
SM
2
=PP12V_ALL_GPU
=PP12V_ALL_FW
PP5V_ALL
330UF
92
143
PP3V3_PWRON
C722
1
96
=PP5V_PWRON_USB
PP3V3_PWRON
VOLTAGE=3.3V
MAKE_BASE=TRUE
XW705
SM
CRITICAL
PP5V_PWRON
VOLTAGE=5V
MAKE_BASE=TRUE
PP12V_ALL
MAKE_BASE=TRUE
VOLTAGE=12V
20%
16V
2 CERM
402
33
5%
1/4W
MF-LF
2 1206
Q790_D
LEAKAGE HACK
POWER CONN / ALIAS
Q790
SYNC_MASTER=M33-PC
2N7002
96 16 7
SYS_POWERUP_L_BUF
SOT23-LF


SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
F
154
(OVERTEMP LED)
8 7 6
CHKSTOP LED
PLL LOCK LED
DIAG LED
8 7 6
=PP5V_RUN_CPU
=PP5V_RUN_CPU
PP5V_ALL
DEVELOPMENT
R850
R837DEVELOPMENT
180
5%
Q802
1/16W
5%
1/16W
MF-LF
2 402
2N3906
MF-LF
2 402
LED850P1
DEVELOPMENT
3
6
R838
Q850
2N3904LF
5%
1/16W
MF-LF
402
SOT23
DEVELOPMENT
PLLLOCK 1
180
6
DEVELOPMENT
SOT23
DEVELOPMENT
Q800_G
Q800
SOT23-LF
S
2
DEVELOPMENT
DEVELOPMENT
R836
GREEN-3.6MCD
2.0X1.25MM-SM
2N3904LF
5%
1/16W
MF-LF
402
2N7002
LED802
Q803
Q800_D
LED802_1
2 Q803_B
5%
1/16W
MF-LF
2 402
6
R839
43 9
5%
1/16W
MF-LF
2 402
1K
Q803_C
4.7K
R835
5%
1/16W
MF-LF
2 402
2X1.25MM-SM
R834
1K
3
1
RED-4.0MCD
Q802_E
DEVELOPMENT
LED850P2
2 DIAG_LED_R
LED801
DEVELOPMENT
DEVELOPMENT
R851
LED801_1
1
LED850
1
DIAG_LED
MAKE_BASE=TRUE
SOT23-LF
1
2X1.25MM-SM
28
5%
1/16W
MF-LF
2 402
Q802_B
RED-4.0MCD
1K
180
2.0K
R833
DEVELOPMENT
56 43
CPU_CHKSTOP_L
10K
DEVELOPMENT
6
Q801
Q801_B 1
2N3904LF
5%
1/16W
MF-LF
402
SOT23
2
CPU HEATSINK MOUNTING HOLES

OMIT
OMIT
ZH800
SERIAL DEBUG
ZH801
4P75R4
HS_SDF800 1
4P75R4
7
HS_SDF801
OMIT
OMIT
ZH802
ZH803
4P75R4
1
HS_SDF802
4P75R4
HS_SDF803 1
PP5V_PWRON
1
20%
16V
2 CERM
402
J800
M-ST-5087
SM-LF
SCC_TXD_L
SCC_TRXC
SCC_GPIO_L
24
24
24
I2S1_SB_TO_DEV_DTO
I2S1_BITCLK
I2S1_SYNC
10
C880
0.01UF
DEVELOPMENT
I2S1_RESET_L
I2S1_MCLK
I2S1_DEV_TO_SB_DTI
24
SCC_DTR_L
SCC_RTS_L
24
SCC_RXD
24
C881
0.01UF
C882
20%
16V
2 CERM
402
C883
0.01UF
0.01UF
20%
16V
2 CERM
402
20%
16V
2 CERM
402
Signal Alias

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
F
154
I2
I3
I4
I5
I6
I7
I8
I9
I10
I12
I11
I13
I14
I15
I16
I18
I17
I19
I20
I21
I22
I24
I23
I25
I26
I27
I28
I30
I29
I31
I32
I33
I34
I36
I35
I37
I38
I39
I40
I42
I41
I43
I44
I45
I46
I48
I47
I49
I50
I51
I52
I54
I53
I55
I56
I57
I58
I60
I59
I61
I62
I63
I64
I66
I65
I67
I68
I69
I70
I72
I71
I73
I74
I75
I76
I78
I77
I79
I80
I81
I82
I84
I83
I85
I86
I87
I88
I90
I89
I222
I223
I224
I225
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
ENET_TXD_R<7>
ENET_TXD_R<6>
ENET_TXD_R<5>
ENET_TXD_R<4>
ENET_TXD_R<3>
ENET_TXD_R<2>
ENET_TXD_R<1>
ENET_TXD_R<0>
ENET_TXD<7>
ENET_TXD<6>
ENET_TXD<5>
ENET_TXD<4>
ENET_TXD<3>
ENET_TXD<2>
ENET_TXD<1>
ENET_TXD<0>
ENET_RXD_R<7>
ENET_RXD_R<6>
ENET_RXD_R<5>
ENET_RXD_R<4>
ENET_RXD_R<3>
ENET_RXD_R<2>
ENET_RXD_R<1>
ENET_RXD_R<0>
ENET_RXD<7>
ENET_RXD<6>
ENET_RXD<5>
ENET_RXD<4>
ENET_RXD<3>
ENET_RXD<2>
ENET_RXD<1>
ENET_RXD<0>
ENET_TX_EN_R
ENET_TX_ER_R
ENET_TX_EN
ENET_TX_ER
TP_HT_MB_TO_NB_CLK_N<1>
TP_HT_MB_TO_NB_CLK_P<1>
NC_CPU_AFN
NC_I2C_SMU_CPU_SCL_IN
NC_PSRO
NC_PSRO_ENABLE
NC_SLOT_TOTAL_PWR
NC_SMU_CPU_VID_LE0
NC_SMU_CPU_VID_LE1
NC_SMU_FAN_RPM3
NC_SMU_FAN_RPM4
NC_SMU_FAN_RPM5
NC_SMU_FAN_TACH3
NC_SMU_FAN_TACH4
NC_SMU_FAN_TACH5
NC_SMU_FAN_TACH7
NC_SMU_SER_SEL
NC_SYS_DOOR_AJAR_L
TP_VESTA_2_5V_EN
TP_VESTA_AN_EN
TP_VESTA_DNC_C9
TP_VESTA_DNC_E9
TP_VESTA_EN_10B
TP_VESTA_ER
TP_VESTA_F1000
TP_VESTA_FDX
TP_VESTA_FDXLED_L
TP_VESTA_HUB
TP_VESTA_LINK1_L
TP_VESTA_LINK2_L
TP_VESTA_MANMS
TP_VESTA_PHYA<0>
TP_VESTA_PHYA<1>
TP_VESTA_PHYA<2>
TP_VESTA_PHYA<3>
TP_VESTA_PHYA<4>
TP_VESTA_RBC0
TP_VESTA_RBC1
TP_VESTA_REGCTL1
TP_VESTA_REGCTL2
TP_VESTA_REGSEN1
TP_VESTA_REGSEN2
TP_VESTA_REGSUP1
TP_VESTA_REGSUP2
TP_VESTA_RGMIIEN
TP_VESTA_SPD0
TP_VESTA_TDBL<0>
TP_VESTA_TDBL<1>
TP_VESTA_TDBL<2>
TP_VESTA_TEST<0>
TP_VESTA_TEST<1>
TP_VESTA_TEST_1394<0>
TP_VESTA_TVCO
CARD_READER_ACTIVITY_R
TP_VESTA_FAVDDL
TP_NB_A_TRIGGER_OUT
TP_NB_B_TRIGGER_OUT
130 131
I91
130 131
I92
130 131
I93
130 131
I94
130 131
I95
130 131
I96
130 131
I97
130 131
I98
130 131 132
I99
130 131 132
I100
130 131 132
I101
130 131 132
I102
130 131 132
I103
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
TP_VESTA_TVCO_24
TP_VESTA_TXC_RXC_DELAY
TP_I2S2_SB_TO_DEV_DTO
TP_NB_APSYNC
TP_SB_WATCHDOG
NC_CPU_TBEN_CLK
NC_J3108_10
NC_J3108_11
NC_J3108_12
NC_J3108_8
NC_J3108_9
NC_JTAGMUX_3
NC_PP1V5_PULSAR
THE FOLLOWING NETS DO NOT HAVE

TEST POINT BECAUSE OF ROUTING DENSITY
AND SIGNAL INTEGRITY.
TEST COVERAGE WILL BE BY FCT
NOTE FOR SHARING: DO NOT INCLUDE THIS LIST UNTIL
PCB LAYOUT ADDS TEST POINTS. THIS LIST IS A RESULT OF PCB
LAYOUT HAVING DIFFICULTY PLACING TEST POINTS ON THESE NETS
THE FOLLOWING NETS ARE USED ONLY

WHEN THE DEVELOPMENT BOM OPTION IS ENABLED
I1
139
132
154
I106
NO_TEST=YES
Q803_C
I173
44
I174
24
I175
I109
NO_TEST=YES
PLLLOCK
8 43
I176
31
I177
31
I178
31
I179
31
I180
31
I114
30
I117
12
I116
130 131 132
I115
130 131 132
I118
130 131 132
I119
130 131 132
I120
130 131 132
I121
130 131 132
I124
130 131 132
I123
130 131 132
I122
130 131 132
I125
130 131 132
I126
130 131 132
I127
130 131
I128
130 131
I131
130 131
I130
130 131
I129
130 131
I132
130 131
I133
130 131
I134
130 131
I135
130 131
I138
130 131
I137
130 131 132
I136
130 131 132
I139
101
I140
101
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
LED_PP1V8_RUN_P
11
LED_PP1V8_RUN_N
11
PP1V5_RUN_FOR_LED
12
LED_PP1V5_RUN_N
12
LED_PP1V5_RUN_P
12
PULSAR_1V5_RUN_SWITCH 12
PP1V2_RUN_FOR_LED
13
LED_PP1V2_RUN_N
13
LED_PP1V2_RUN_P
13
KP_V<1>
55
KP_V<2>
55
CPU_SENSE_KP_V
55
NB_PLL_OUT_TRG_R
NB_PLL_OUT_TRG
59
PP5V_T555
T555_DISC
T555_THRES
T555_OUT
T555_PWM
PP3V3_GPU_TSENSE
93
TSENSE_GPU_OVERTEMP_L 93
TSENSE_GPU_ADD0
93
TSENSE_GPU_ADD1
93
GPU_DIODE_PLUS
93
GPU_DIODE_MINUS
93
LED8700_P
136
LED8701_P
136
I181
I182
I183
I184
I185
I186
I187
I189
I188
I191
I192
I193
I194
I195
I196
I197
I198
I199
I200
I201
I202
I203
I204
I205
I206
I208
I207
I210
THE FOLLOWING PULSAR NETS WILL BE

TESTED VIA TEST JET
56
31
I141
56
I142
56
I143
31
I144
31
I145
31
I146
31
I147
31
I148
31
I149
31
I150
31
I151
31
I152
31
I153
31
I154
31
I155
17
I156
132
I157
17
I158
17
I159
132
I160
132
I162
132
I161
132
I164
132
I163
132
I165
132
I168
132
I167
132
I166
132
I169
132
I170
132
I171
132
I172
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
I209
CPU_A_TBEN_CLK_R
26
CPU_B_TBEN_CLK_R
26
CPU_A_APSYNC_R
26
CPU_B_APSYNC_R
26
NB_APSYNC_R
26
HT_SB_REFCLK_R
26
HT_NB_REFCLK_H0_R
26
HT_NB_REFCLK_L0_R
26
CLK_RAIREF_200M_P_R 26
CLK_RAIREF_200M_N_R 26
NB_PMR_CLK_P_R
26
NB_PMR_CLK_N_R
26
NB_PCIE_REFCLK_P_C 26
NB_PCIE_REFCLK_N_C 26
GFX_SLOT_PCIE_REFCLK_P_C
GFX_SLOT_PCIE_REFCLK_N_C
PCIE_A_REFCLKIN_P_C 26
PCIE_A_REFCLKIN_N_C 26
PCIE_B_REFCLKIN_P_C 26
PCIE_B_REFCLKIN_N_C 26
PCIE_C_REFCLKIN_P_C 26
PCIE_C_REFCLKIN_N_C 26
NB_DDR_REFCLK_P_R
26
NB_DDR_REFCLK_N_R
26
CLK_RAI_GIGE_25MHZ_R 26
QUA0_REF_25MHZ_R
26
SB_CLK25M_SATA_R
26
QUA1_REF_25MHZ_R
26
PCI_CLK33M_SB_EXT_R 26
SB_AIRPRT_CLK_33MHZ_R 26
CLK_RAI_REFCLK_66M_R 26
SB_USB2_CLK_33MHZ_R 26
I211
I213
I212
I214
I216
I215
I218
I217
I219
I221
I220
I257
I258
I259
26
26
I260
I261
I262
I263
I264
I265
I266
I267
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
100M_N<0>
82 97
100M_P<0>
82 97
CKA_N<0>
84 97
CKA_P<0>
84 97
HT_NB_N<0>
98 101
HT_NB_P<0>
98 101
HT_NB_REFCLK_NF<0>
98 101
HT_NB_REFCLK_PF<0>
98 101
HT_NB_TO_SB_CAD_N<0..7> 101
HT_NB_TO_SB_CAD_P<0..7> 101
HT_NB_TO_SB_CLK_P<0> 101
HT_NB_TO_SB_CLK_N<0> 101
HT_SB_TO_NB_CAD_N<0..7> 101
HT_SB_TO_NB_CAD_P<0..7> 101
HT_SB_TO_NB_CLK_P<0> 101
HT_SB_TO_NB_CLK_N<0> 101
PCIE_SLOTA_TO_NB_N<0..15> 9 82 84 97
PCIE_SLOTA_TO_NB_P<0..15> 9 82 84 97
UATA_DA<0>
127 129
UATA_DD<1>
127 129
UATA_DD<14>
127 129
PCIE_NB_TO_SLOTA_N<0> 9 82 84 97
PCIE_NB_TO_SLOTA_N<3> 9 82 84 97
PCIE_NB_TO_SLOTA_NF<13> 9 82 97
PCIE_NB_TO_SLOTA_P<1> 9 82 84 97
PCIE_NB_TO_SLOTA_P<10> 9 82 84 97
PCIE_NB_TO_SLOTA_PF<13> 9 82 97
HT_MB_TO_NB_CTL_N<1> 98
HT_MB_TO_NB_CTL_P<1> 98
HT_NB_TO_MB_CTL_N<1> 98
HT_NB_TO_MB_CTL_P<1> 98
HT_NB_TO_SB_CTL_N<0> 101
HT_SB_TO_NB_CTL_P<0> 101
CLK_KOD_100M_NF<0>
82 97
CLK_KOD_100M_PF<0>
82 97
EI_CPU_TO_NB_CLK_N
43 56
EI_CPU_TO_NB_CLK_P
43 56
EI_CPU_TO_NB_SR_N<1> 9 43 56
EI_CPU_TO_NB_SR_P<1> 9 43 56
EI_NB_TO_CPU_CLK_N
43 56
EI_NB_TO_CPU_CLK_P
43 56
EI_NB_TO_CPU_SR_N<0> 9 43 56
EI_NB_TO_CPU_SR_P<0> 9 43 56
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
PLLTESTOUT
UATA_DD<13>
CPU_SPARE2
RFBD<51>
TP_CPU_TRIGGER_OUT
UATA_DD<12>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
EI_CPU_SYSCLK_P
EI_CPU_TO_NB_SR_N<1>
EI_CPU_TO_NB_SR_P<1>
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_SR_P<0>
JTAG TEST POINTS NEED TO BE ON THE BOTTOM

OF THE BOARD
ADDING FUNC_TEST=TRUE TO THESE NETS
D
I226
I227
I228
I229
I230
I232
I234
I233
I236
I235
I238
I240
I239
I242
I241
I244
I246
I245
I248
I247
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
TP_JTAG_SB_TCK
TP_JTAG_SB_TDI
TP_JTAG_SB_TDO
TP_JTAG_SB_TMS
JTAG_SB_TRST_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
JTAG_NB_TCK
JTAG_NB_TDI
JTAG_NB_TDO
JTAG_NB_TMS
JTAG_NB_TRST_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
TP_JTAG_VESTA_TDI
TP_JTAG_VESTA_TDO
TP_JTAG_VESTA_TCK
TP_JTAG_VESTA_TMS
TP_JTAG_VESTA_TRST_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
JTAG_CPU_TCK
JTAG_CPU_TDI
JTAG_CPU_TDO
JTAG_CPU_TMS
JTAG_CPU_TRST_L
20
20
20
20 24
20 30
20 30
20 30
20 30
20
17
17
17
17
17
30 43
30 43
30 43 47
30 43
43 47
43 47
127 129
43 47
88 89
56
127 129
43 56
9 43 56
9 43 56
9 43 56
9 43 56
132
132
132
17
17
17
17
ADDING NO_TEST TO ALL PCIE NETS

TO AVOID STUBS
WILL GET COVERAGE IN FCT WITH A DIAG
THAT CHECKS THAT THE BUS IS 16 LANES WIDE
PCIE_NB_TO_SLOTA_NF<0..15> 9 82 97
NO_TEST=YES
I249
PCIE_NB_TO_SLOTA_PF<0..15> 9 82 97
NO_TEST=YES
I250
PCIE_NB_TO_SLOTA_N<0..15> 9 82 84 97
NO_TEST=YES
I251
PCIE_NB_TO_SLOTA_P<0..15> 9 82 84 97
NO_TEST=YES
I252
PCIE_SLOTA_TO_NB_NF<0..15> 84 97
NO_TEST=YES
I253
PCIE_SLOTA_TO_NB_PF<0..15> 84 97
NO_TEST=YES
I254
PCIE_SLOTA_TO_NB_N<0..15> 9 82 84 97
NO_TEST=YES
I255
PCIE_SLOTA_TO_NB_P<0..15> 9 82 84 97
NO_TEST=YES
I256
17
17
132
132
139
139
139
132
132
139
139
FUNC TEST 2 OF 2

132
144
139
56
56
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6863
D
SCALE
20
OF
F
154
1.8V VOLTAGE REGULATOR

PP12V_ALL
PP5V_ALL
D1100
MBR0520LXXG
SOD-123
R1100
MBR0520LXXG
1UF
10%
2 6.3V
CERM
402
11 6
VCC
U1100_SS
U1100_COMP
LD
FB
SS
COMP
R1101
Q1101
U1100_GATE_H
U1100_GATE_L
U1100_FEEDBACK
NTD60N02R
1
G
CASE369-LF
2N7002
PWRON_L
SOT23-LF
C1115
0.1UF
20%
25V
2 CERM
603
1%
1/16W
MF-LF
2 402
S3
100PF
R1101_P2
1
5%
25V
2 CERM
402
C1114
6800PF
10%
2 50V
CERM
603
11 6
IHLP
NOSTUFF
5.11
C1105
10%
50V
2 CERM
402
CASE369-LF
S3
1%
1/4W
MF-LF
2 1206
NTD60N02R
1
G
0.0018UF
XW1100
SM
GND_U1100
R1104
C1106
220PF
5%
50V
2 CERM
805
CRITICAL
L1101
Q1102
C1113
PP1V8_PWRON
1UF
20%
25V
2 CERM
805
D 4
POWER BUDGET CURRENT OF TOTAL RAILS

10.9A PEAK
7.2A CONTINUOUS
1.5UH
4
1
680UF
C1117
Q1102_DRAIN
GND
9.31K
Q1100
C1103
20%
2 16V
ELEC
TH-MCZ
D 4
Q1101_GATE
1
D
680UF
20%
2 16V
ELEC
TH-MCZ
MIN_LINE_WIDTH=0.45MM U1100_VC_D
5%
1/8W MIN_NECK_WIDTH=0.25MM
MF-LF
805
SOI-LF
5
MBR0520LXXG
SOD-123
IRU3037ACS
HD
C1116
1UF
20%
R1102
25V
2 CERM
805
VC
U1100
GND_U1100
D1101
U1100_VC_R
C1111 C1102
10UF
1
10%
2 16V
CERM
1210
SOD-123
U1100_VC
C1104
D1102
4.7
5%
1/8W
MF-LF
2 805
NOTE:
SET OUTPUT=1.85V FOR FRAMEBUFFER.
IRU3037ACS VREF=0.8VDC
VOUT=VREF*(R903+R905)/R905=1.85VDC
1
1
16 15 13 12
R904_P2
3300PF
1
1
C1107 R1103
12.4K
10%
2 50V
CERM
603
1%
1/16W
MF-LF
2 402
PP12V_RUN
NOSTUFF
1
C1109
1500UF
20%
2 6.3V
ELEC
TH-MCZ
C1112
1000PF
C1110
10UF
20%
6.3V
CERM
1206
C1119
R1140
330UF
470K
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
5%
1/16W
MF-LF
2 402
R1105
5%
50V
2 CERM
1206
9.31K
0.001UF
20%
50V
2 CERM
402
7 8
Q1103
SO-8
Q903_GATE
VOLTAGE=0 V
POWER BUDGET CURRENT OF FET
IRF7413PBF 2.7A PEAK
HIGH TO ENABLE
1%
1/16W
MF-LF
2 402
C1140
1 2
2.3A CONTINUOUS
PP1V8_RUN
U1100_FEEDBACK
11 6
GND_U1100
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
376S0340
376S0388
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
Q1101,Q1102
Q1140
2N7002
54 30 26 16 15 13 12
SYS_SLEEP
SOT23-LF
PP3V3_RUN
DEVELOPMENT
1
R1160
330
5%
1/16W
MF-LF
2 402
9
LED_PP1V8_RUN_P
PP1V8_RUN
1
GREEN-3.6MCD
2.0X1.25MM-SM
LM339A
V+
DEVELOPMENT
LED1100
DEVELOPMENT
3
2
1.8V VREG
SOI-LF
14 9 LED_PP1V8_RUN_N
U1201
85 13 12
1V1_REF
GND
SYNC_MASTER=M33-PC
PLACE LED NEAR VREG
12

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
11
OF
F
154
NOTE:
KODIAK CORE VOLTAGE REGULATOR
VOUT=VREF*(R1203+R1205)/R1205=1.25VDC
1.35V
1.30V
1.25V
LOAD FROM POWER BUDGET
8.5A PEAK CURRENT DRAW

7.2A CONTINUOUS CURRENT DRAW
PP5V_ALL
R1205=2.87K
R1205=3.24K
R1205=3.65K
PP12V_ALL
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
376S0340
376S0388
BOM OPTION
REF DES
COMMENTS:
D1200
TABLE_ALT_ITEM
Q1201,Q1202
MBR0520LXXG
SOD-123
R1200
10
SOD-123
U1200_VC
C1204
1UF
2
VCC
VC
U1200
CRITICAL
8
U1200_SS
HD
COMP
FB
U1200_GATE_H
U1200_GATE_L
U1200_FEEDBACK
Q1201
Q1201_GATE
NOSTUFF
16 15 13 11
PWRON_L
Q1200
R1206
2N7002
TURN_ON_PP1V5_L
5%
1/16W
MF-LF
402
SOT23-LF
S
2
C1214
0.1UF
20%
16V
2 CERM
603
56PF
C1215
TURN_ON_PP1V2_L
5%
1/16W
MF-LF
402
12 6
C1206
5%
25V
2 CERM
402
10%
50V
2 CERM
603
NTD60N02R
CASE369-LF
R2204_P2
C1205
680UF
L1201
1.53UH
NOSTUFF
C1207
1UF
1%
1/4W
MF-LF
2 1206
20%
10V
2 CERM
603
R1203
2.05K
1%
1/16W
MF-LF
2 402
CRITICAL
1
1
0.0018UF
CRITICAL
1
C1208
1500UF
C1212
R1205
5%
50V
2 CERM
1206
C1209
1500UF
20%
2 6.3V
ELEC
TH-MCZ
1000PF
10%
2 50V
CERM
402
XW1200
SM
GND_U1200
C1202
20%
2 16V
ELEC
TH-MCZ
CRITICAL
3
5.11
CRITICAL
S3
220PF
5%
2 50V
CERM
402
SM
R1204
1
G
C1213
10%
16V
2 CERM
1210
1UF
Q1202
1
10UF
C1217
20%
25V
2 CERM
805
Q1202_DRAIN
D 4
R1201_P2
CASE369-LF
S3
6800PF
R1207
13 4
1%
1/16W
MF-LF
2 402
NTD60N02R
1
G
GND
15.8K
C1210
PP1V5_PWRON
R1201
CRITICAL
D 4
R1202
5%
1/8W
MF-LF
805
SS
LD
U1200_COMP
MBR0520LXXG
SOD-123
IRU3037ACS
SOI-LF
GND_U1200
10%
16V
2 CERM
1210
C1216
10%
2 25V
X5R
603
C1201
10UF
U1200_VC_D
1UF
10%
2 6.3V
CERM
402
12 6
D1201
U1200_VC_R
D1202
MBR0520LXXG
5%
1/8W
MF-LF
2 805
C1218
10UF
10%
6.3V
2 X5R
805
20%
2 6.3V
ELEC
TH-MCZ
2.87K
1%
1/16W
MF-LF
2 402
VOLTAGE=0 V
TURNING ON PP2V5_PWRON WITH 1V2_PWRON

SO THAT 1.5V IS THE FIRST RAIL UP ON KODIAK
U1200_FEEDBACK
12 6
GND_U1200
PP1V5_PWRON_PULSAR
PP3V3_RUN
CRITICAL
MM1571FN
R1260
1.3A PEAK CURRENT DRAW

1.0A CONTINUOUS CURRENT DRAW
5%
1/16W
MF-LF
2 402
PP1V5_RUN
9
VIN
LED_PP1V5_RUN_P
CRITICAL
R1261
Q1250
SI3446DV
C1250
20%
10V
CERM
402
V+
1V1_REF
20%
16V
CERM 2
402
100K
10UF
DEVELOPMENT
C1275
SOI-LF
1 9 LED_PP1V5_RUN_N
0.01UF
DEVELOPMENT
R1273
GND
5%
1/16W
MF-LF
2 402
DEVELOPMENT
20%
16V
CERM
402
10K
Q1271
1
IRLM2402PBF
SOT23
PULSAR_1V5_RUN_SWITCH
2
2
PP1V5_RUN_PULSAR
VOLTAGE=1.5V
DEVELOPMENT
DEVELOPMENT
Q1250G
5%
1/16W
MF-LF
402
3
D
3
D
85 50 28 7 6
2N7002
SOT23-LF
SYS_SLEEP
SYS_POWERUP_L
SOT23-LF
R1274
10K
Q1270
2N7002
Q1251
C1272
10%
6.3V
2 X5R
805
PP12V_RUN
U1270_CONT
R1250
2
RDSON=0.012 OHM
@ VGS=3.5 V
C1271 1
0.01UF
PLACE LED NEAR VREG
U1270_NOISE
GND
5%
1/16W
MF-LF
2 402
12
0.1UF
VOUT
CONT NOISE
10K
GREEN-3.6MCD
2.0X1.25MM-SM
LM339A
U1201
85 13 11
PP1V5_RUN_FOR_LED
DEVELOPMENT
LED1200
DEVELOPMENT
3
9
5%
1/16W
MF-LF
402
TSOP-LF
PP5V_PWRON
DEVELOPMENT
C1270 R1270
1UF
20%
10V
2 CERM
805
PP1V5_PWRON
PP1V5_PWRON_PULSAR
SOT-25A
330
LOAD FROM POWER BUDGET
U1270
PP3V3_PWRON
DEVELOPMENT
5%
1/16W
MF-LF
2 402
1.5V Vreg
11 13 15 16 26 30 54
NC_PP1V5_PULSAR 9
MAKE_BASE=TRUE

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
12
OF
F
154
PP1V2_ALL VOLTAGE REGULATOR

PP12V_ALL
PP5V_ALL
1
1
D1302
MBR0520LXXG
SOD-123
R1302
MBR0520LXXG C1301
10UF
SOD-123
4.7
5%
1/8W
MF-LF
2 805
D1301
U1300_VC_R
U1300_VC
C1304
1UF
10%
2 6.3V
CERM
402
13 6
VCC
U1300
IRU3037ACS
GND_U1300
SOI-LF
CRITICAL
8
U1300_SS
U1300_COMP
HD
LD
FB
SS
COMP
MIN_NECK_WIDTH=0.25MMU1300_VC_D
MBR0520LXXG
SOD-123
Q1301
5%
1/16W
MF-LF
2 402
C1315
0.1UF
SO-8
5%
1/8W
MF-LF
805
0.0068UF
13 6
R1304_P2
C1305
0.0018UF
SO-8
3.8UH
2
SM2
CRITICAL
1 2
NOSTUFF
1
1
C1307 R1303
5.36K
3300PF
1%
1/16W
MF-LF
2 402
10%
2 50V
CERM
603
C1312
1800UF
20%
2 6.3V
ELEC
TH-KZJ-LF
NOSTUFF
1000PF
C1309
1
10%
50V
2 CERM
402
XW1300
SM
GND_U1300
IRF7807ZPBF
4
1
5%
25V
2 CERM
402
10%
2 25V
CERM
402
C1306
220PF

3.2A PEAK
2.6A CONTINUOUS
10%
16V
2 CERM
1210
L1301
1%
1/4W
MF-LF
2 1206
CRITICAL
Q1302
5%
50V
2 CERM
402
10UF
PP1V2_ALL
25V
2 CERM
805
5.11
56PF
C1314
10UF
R1304
C1313
10%
16V
2 CERM
1210
C1303
C1317
U1300_GATE_H
1 2 3
Q1302_DRAIN
U1300_GATE_L
1
U1300_FEEDBACK
5 6 7 8
R1301_P2
20%
16V
2 CERM
603
10%
16V
2 CERM
1210
IRF7807ZPBF 1UF
20%
GND
18K
CRITICAL
Q1301_GATE
R1301
C1302
7 8
C1300
1UF
20%
R1300
25V
2 CERM
805
VC
NOTE:
SET OUTPUT=1.22-1.23V
VOUT=VREF*(R1003+R1005)/R1005=1.22-1.23VDC
D1300
R1305 1R1306
5%
50V
2 CERM
1206
10K
10K
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
VOLTAGE=0 V
U1300_FEEDBACK
13 6
PP1V2_PWRON FET SWITCH
GND_U1300
PP1V2_RUN FET SWITCH
PEAK CURRENT 1.3A

1.0A CONTINUOUS
PEAK CURRENT 1.3A
IF KODIAK 1.2V CAN BE TURNED OFF IN SLEEP.

CRITICAL
DEVELOPMENT
20%
16V
2 CERM
402
R1308
2
SI3446DV
TURN_ON_PP1V2_L
R1312
0
GREEN-3.6MCD
2.0X1.25MM-SM
LM339A
PP1V2_RUN_FOR_LED
DEVELOPMENT
LED1300
DEVELOPMENT
3
SOI-LF
2 9 LED_PP1V2_RUN_N
V+
5%
1/16W
MF-LF
402
U1201
85 12 11
1V1_REF
GND
5%
1/16W
MF-LF
402
R1352
47K
Q1305
Q1304 Q1307
SOT23-LF
5%
1/16W
MF-LF
402 2
3 DEVELOPMENT NOSTUFF 3
2N7002
Q1305_G
12
DEVELOPMENT
2
D
PWRON_L
20%
16V
CERM
402
R1313
16 15 12 11
LED_PP1V2_RUN_P
PLACE LED NEAR VREG
NOSTUFF
R1353
0.01UF
1
5%
1/16W
MF-LF
402 2
DEVELOPMENT
RDSON=0.04 OHM
@ VGS=2.5 V
DEVELOPMENT
Q1006_G
100K
3
13 12 4
R13511
C1322
100K 1
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
RDSON=0.04 OHM
@ VGS=2.5 V
TSOP-LF
Q1003_G
5%
1/16W
MF-LF
2 402
20%
10V
2 CERM
402
DEVELOPMENT
100K 1
330
C1350
0.1UF
1
2
R1309
2
TSOP-LF
R1350
DEVELOPMENT
SI3446DV
DEVELOPMENT
CRITICAL
C1321 Q1306
0.01UF
DEVELOPMENT
1
PP3V3_RUN
Q1303
PP5V_ALL
PP5V_ALL
PP3V3_RUN
PP1V2_RUN
PP1V2_PWRON
0.6A/M33 0.0A/M23 IF NOT

PP5V_RUN
PP1V2_ALL
PP1V2_ALL
2N7002
2N7002
SOT23-LF
SOT23-LF
SYS_SLEEP
11 12 15 16 26 30 54
2
2
5%
1/16W
MF-LF
402
NOSTUFF
R1314
13 12 4
TURN_ON_PP1V2_L
Q1304_G
5%
1/16W
MF-LF
402
DEVELOPMENT
DEVELOPMENT
R1315
85
GPU_POWERUP_L
47K
1.2V Vreg
20%
16V
2 CERM
402
5%
1/16W
MF-LF
402
C1320
0.01UF
PP1V2_PWRON COMES UP BEFORE GPU_POWERUP_L SO THAT SHASTA CORE GETS POWER BEFORE ANYTHING ELSE

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
13
OF
F
154
PP2V5_ALL VOLTAGE REGULATOR

NOTE:
SET OUTPUT=2.5V
IRU3037CS VREF=1.24VDC
VOUT=VREF*(R1581+R1582)+1=5.505VDC
D
CRITICAL

0.2A PEAK
0.1A CONTINUOUS
U1580
PP3V3_ALL
MIC39102
SOP-8-LF
2
1
C1580
10UF
R1580
3.3K
20%
6.3V
2 CERM
1206
IN
EN
OUT
ADJ
U1580_ADJ
GND
5
PP2V5_ALL
CRITICAL
R1581
1.02K
330UF
1%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
C1583
20%
2 6.3V
ELEC
6.3X8-SM
R1582
1K
U1580_EN
1%
1/16W
MF-LF
2 402
PP2V5_PWRON FET SWITCH
PP2V5_RUN FET SWITCH
PEAK CURRENT 0.1A
PEAK CURRENT 0.1A

PP2V5_ALL
PP2V5_ALL
PP2V5_RUN
CRITICAL
PP2V5_PWRON
Q1503
SI3446DV
C1581CRITICAL
0.01UF
20%
Q1506
16V
2
TSOP-LF
PP5V_ALL
CERM
402
PP5V_ALL
R1508
100K 1
2
SI3446DV
RDSON=0.04 OHM
@ VGS=2.5 V
5%
1/16W
MF-LF
402
RDSON=0.04 OHM
@ VGS=2.5 V
TSOP-LF
Q1503_G
R1509
2
100K 1
Q1506_G
C1582
0.01UF
5%
1/16W
MF-LF
402
NOSTUFF OPTION TO DELAY 2.5V PWRON TO COME UP WITH 3.3V PWRON

16 4
NOSTUFF
R1512
1
PWRON_L
2N7002DW-X-FD
SOT23-LF
Q1504
2N7002
Q1505_G
R1513
16 13 12 11
Q1505
D
5%
1/16W
MF-LF
402
20%
16V
CERM
402
Q1504
D 2N7002DW-X-F
SOT-363
SOT-363
S
SYS_SLEEP
11 12 13 16 26 30 54
2
4
5%
1/16W
MF-LF
402
2.5V Vreg

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
15
OF
F
154
PP5V_ALL
PP12V_ALL
R16021
C1600
0.01UF
20%
16V
2 CERM
402
3.6K
5%
1/16W
MF-LF
402 2
6 7
CRITICAL
Q1600
IRF7413PBF
SO-8
4
GATE_5V_PWRON
6
7 6
PP3V3_RUN
R1601
Q1601
2N7002DW-X-F
PP3V3_ALL
R16051
SOT-363
10K
47K
5%
1/16W
MF-LF
2 402
PP5V_PWRON
5%
1/16W
MF-LF
402 2
C1603
0.1UF
20%
10V
2 CERM
402
SYS_POWERUP
PP3V3_ALL
PWRON_L
5
1
54 30 26 15 13 12 11
SYS_SLEEP
02
1
3
2N7002
96 7
SYS_POWERUP_L_BUF
PP12V_ALL
SOT23-5-LF
4
U1601
Q1603
R1607
SOT23-LF
11 12 13 15
SN74LVC1G02
R1604
0
R1608
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5 6
20%
2 10V
CERM
402
5%
1/16W
MF-LF
2 402
C1601
0.1UF
3.6K
NOSTUFF
CRITICAL
Q1602
IRF7413PBF
SO-8
4
GATE_3V3_PWRON
3
1
NOSTUFF
15 4
5%
1/16W
MF-LF
402
POWER SEQUENCING PIN TO DELAY TO BRING UP 3.3V LAST FOR SHASTA
Q1601
R1603
2N7002DW-X-F
Q1601G
SOT-363
1 NOSTUFF
R1609
R1600
47K
2 3
5%
1/16W
MF-LF
2 402
PP3V3_PWRON
3.3K
5%
1/16W
MF-LF
2 402
5V & 3.3V Fets

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
16
OF
F
154
Page Notes
Power aliases required by this page:
Signal aliases required by this page:

(NONE)
BOM options provided by this page:

- VESTA1V2_BURST / VESTA1V2_PULSE
Controls operating mode of Vesta 1.2V
regulator. If both options are off the
regulator will be in continuous mode.
C
VESTA JTAG
139 132 17 7
=PP3V3_ENETFW
1
R1741 1R1742 1R1743
VESTA HAS INTERNAL PULLUPS. MLB

PULLUPS MAY BE NOSTUFFED IN EVT.
1K
1K
5%
1/16W
MF-LF
2 402
1K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
TP_JTAG_VESTA_TCK
TP_JTAG_VESTA_TDI
TP_JTAG_VESTA_TDO
TP_JTAG_VESTA_TMS
9
9 TP_JTAG_VESTA_TRST_L
9
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
=JTAG_VESTA_TCK 17
=JTAG_VESTA_TDI 17
=JTAG_VESTA_TDO 17
=JTAG_VESTA_TMS 17
17
=JTAG_VESTA_TRST_L
MAKE_BASE=TRUE
R1740
M23:
ADDED C1726 AND C1744 PER BROADCOM RECOMMENDATIONS
1K
L1700
139 132 7
PP1V2_VESTA_AVDDL
=PP1V2_ENETFWFERR-EMI-600-OHM
1
5%
1/16W
MF-LF
2 402
=PP2V5_ENETFW
MIN_LINE_WIDTH=0.50 MM
MIN_NECK_WIDTH=0.25 MM
VOLTAGE=1.2V
C1720
0.1uF
20%
10V
CERM 2
402
SM
PP3V3_ENETFW IS AN ALL RAIL
C1708
10UF
=PP3V3_ENETFW
10%
6.3V
2 X5R
805
R17501
0.1uF
C1701
0.1uF
C1702
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
20%
10V
2 CERM
402
L6/M6
L9/M9
N5/N6
C1703
10UF
10%
6.3V
2 X5R
805
5%
1/16W
MF-LF
2 402
0.1uF
20%
10V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
0.1uF
DVDD
20%
10V
2 CERM
402
AVDDL
0.1uF
20%
10V
CERM 2
402
AVDD
0.1uF
20%
10V
CERM 2
402
7 17 132 139
VESTA_RESET_L
SOT-363
H4
VESTA MISC
RESET* IPU
SCHMITT TRIGGER W/ INTERNAL PULLUP
R1752
1UF
10%
2 6.3V
CERM
402
=JTAG_VESTA_TDI
=JTAG_VESTA_TDO
=JTAG_VESTA_TCK
17 =JTAG_VESTA_TMS
17 =JTAG_VESTA_TRST_L
17
D7
10K
5%
1/16W
MF-LF
2 402
17
E10
17
E7
E8
D8
RESET ASSERT REQUIREMENT IS 20MS TO 100MS
TDI IPU
TDO
TCK IPU
TMS IPU
TRST* IPU
Q1750
R1720
132
VESTA_RESET_H
5%
1/16W
MF-LF
402
2N7002DW-X-F
SOT-363
0.1uF
20%
10V
CERM 2
402
C1726
7 132 139
10UF
20%
10V
CERM 2
402
10%
6.3V
X5R 2
805
TP_VESTA_DNC_C9
TP_VESTA_DNC_E9
C9
E9
NC
C3
NC M13
C1731
0.1uF
20%
10V
CERM 2
402
=PP3V3_ENETFW
A7
F15
C1740
0.1uF
20%
10V
CERM 2
402
C1741
0.1uF
IPD
C1742
0.1uF
20%
10V
CERM 2
402
C1743
0.1uF
20%
10V
CERM 2
402
C1744
7 17 132 139
10UF
10%
6.3V
X5R 2
805
K1
2.5V_EN M3
TP_VESTA_2_5V_EN 9
2.5V_EN
0 - OVDD=3.3V
1 - OVDD=2.5V
WHEN OVDD=2.5V GMII PINS ARE NOT 3.3V TOLERANT
REGSUP1 E1
REGSEN1 F1
REGCTL1 G5
TP_VESTA_REGSUP1 9
TP_VESTA_REGSEN1 9
TP_VESTA_REGCTL1 9
VESTA-V1.3
FBGA-200-LF
1 OF 3
20%
10V
CERM 2
402
SEE_TABLE
U1701
NOSTUFF
C1725
PVDD
A1
=PP3V3_ENETFW
Q1750
C1750
20%
10V
CERM 2
402
OVDD
C1724
N4
A15
R12
R3
P11
P10
P5
C1713
P4
N10
C1712
N9
N6
C1711
N5
M9
C1710
M6
2N7002DW-X-F
Vesta Core / Misc

DNC
DNC

REGSUP2 E2
REGSEN2 F2
REGCTL2 G4
NC
NC
TP_VESTA_REGSUP2 9
TP_VESTA_REGSEN2 9
TP_VESTA_REGCTL2 9

K2
F14
J2
C14
B2
B7
A2
P9
P8
P6
P7
GND
N8
M8
N7
M7
L7
L8
J11
J12
To keep Vesta from being held

in reset when system is off
NOTE: Reset GPIO is active HIGH
H12
AGND
H11
24
C1730
6
D
VESTA_RESET_RC
0.1uF
C1723
N9/N10
L9
C1714
47K
20%
10V
CERM 2
402
0.1uF
L6
5%
1/16W
MF-LF
402 2
R1751
0.1uF
C1722
0.1uF
ENETFW_RESET
20%
10V
2 CERM
402
J1
PP3V3_ENETFW IS AN ALL RAIL
C1721
10K
=PP3V3_ENETFW
C15
M23:
139 132 17 7
C1700
B15
139 132 17 7
B1
M23:
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
F
OF
17
154
=PPVCORE_PWRON_NB
SEE_TABLE
U1900
KODIAK-ASIC-040812
KODIAK CORE
PP1900
1.6V
PP
C1901
C1902
C1903
1UF
1UF
1UF
10%
10%
10%
10%
6.3V
CERM
402
C1905
6.3V
CERM
402
C1906
6.3V
CERM
402
C1907
6.3V
1UF
1UF
10%
10%
10%
6.3V
6.3V
6.3V
10%
C1908
1UF
10%
6.3V
C1904
1UF
CERM
402
1UF
CERM
402
6.3V
CERM
402
C1909
1UF
10%
6.3V
CERM
402
CERM
402
CERM
402
CERM
402
C1911
C1912
C1913
C1914
BGA
(9 OF 10)
1
N15
Q63 = PP1V6
P17
P21
R14
R18
R22
T16
T20
U15
U19
V17
V21
W14
W18
W22
Y16
Y20
AA15
AA19
1UF
CORE & PCI-E POWER
P4MM
SM
C1900
AA23
AB17
AB21
AC14
AC18
AC22
(1.6V-1.2V)
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
CORE_GND
N14
P16
P20
R15
C1910
1UF
1UF
1UF
1UF
10%
10%
10%
10%
6.3V
CERM
402
6.3V
6.3V
6.3V
1UF
10%
6.3V
CERM
402
CERM
402
CERM
402
CERM
402
C1916
C1917
C1918
C1919
R19
R23
T17
T21
1
U14
U18
2
V16
C1915
1UF
1UF
1UF
1UF
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
CERM
402
CERM
402
C1921
CERM
402
C1922
1UF
10%
CERM
402
C1923
6.3V
CERM
402
V20
W15
W19
W23
Y17
Y21
AA14
AA18
C1920
1UF
1UF
1UF
1UF
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
CERM
402
CERM
402
CERM
402
CERM
402
C1924
1UF
10%
6.3V
CERM
402
AA22
AB16
AB20
AC15
AC19
AC23
KODIAK CORE & BYPASS
SYNC_MASTER=Q63

LAST_MODIFIED=Tue Nov
1 13:46:17 2005

PAGE 19

APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
REV.
F
OF
19
SIZE
154
DRAWING
KODIAK ALIASES
D
SHASTA GPIO TERMINATIONS
(SOME OF THESE ARE NOSTUFF
ON PAGE 24 )
SHASTA ALIASES
NC_PMR_CLK_DIS_L
MAKE_BASE=TRUE
PMR_CLK_DIS_L
20
=PP3V3_PWRON_SB
119 56 24 23 7
PCI_RESET_L IS AN AND OF SB_PCI_RESET_L (SB)
7 20 28 30 39
AND SYS_IO_RESET_L (SMU)
R2073
1
119 92
PCI_RESET_L
MAKE_BASE=TRUE
=PCI_AIRPORT_RESET_L
=PCI_ROM_RESET_L
=PCI_USB2_RESET_L
4.7K
KODIAK JTAG_TRST PULLED HIGH

TO ALLOW SMU DEBUG ACCESS
125
122
20 9
24
NB_SLOT_RESET_L
MAKE_BASE=TRUE
=GPU_RESET_L
5%
1/16W
MF-LF
121
NOSTUFF
2 402
R2074
1
JTAG_NB_TRST_L
NB_PU_RST_L
20 30
5%
1/16W
MF-LF
402
NOSTUFF
84
R2054
4.7K
5%
1/16W
MF-LF
2 402
SHASTA JTAG
R2061
C
24 9
9
9
9
9
24
JTAG_SB_TRST_L
THESE PINS HAVE INTERNAL PULLUPS OR PULLDOWNS

JTAG_SB_TCK
TP_JTAG_SB_TCK
MAKE_BASE=TRUE
TP_JTAG_SB_TDI
JTAG_SB_TDI
MAKE_BASE=TRUE
JTAG_SB_TDO
TP_JTAG_SB_TDO
MAKE_BASE=TRUE
TP_JTAG_SB_TMS
JTAG_SB_TMS
MAKE_BASE=TRUE
R2053
24
24
RAI_EXP_INTR_L<3>
RAI_EXP_INTR_L<2>
24
24
24
RAI_EXP_INTR_L<1>
10K
10K
C2055
1UF
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
RAI_EXP_INTR_L<0>
7 39 58 59
R2062
R2063
5%
1/16W
MF-LF
2 402
24
=PP1V8_PWRON_NBMEM
5%
1/16W
MF-LF
402
4.7K
24
10K
10%
6.3V
2 CERM
402
R2064
1
10K
39 30 28 20 7
5%
1/16W
MF-LF
402
P4MM
U1900
C2055 ADDED FOR KODIAK RAM DECOUPLING
SM
PP
PAGE 58 IS SHORT ONE CAP
R2003 1
TP2002
KODIAK-ASIC-040812
1K
1%
1/16W
MF-LF
402
BGA
(10 OF 10)
30 9
30 9
30 9
20 9
JTAG_NB_TCK
JTAG_NB_TDI
JTAG_NB_TDO
JTAG_NB_TMS
JTAG_NB_TRST_L
CE0TEST
NB_OVERTEMP
=PP3V3_RUN_SMU
2.2
10%
6.3V
CRITICAL
VCC
CERM
402
15
ALERT 11
STBY
U2080
39
39
20
I2C_NB_TEMP_SDA
I2C_NB_TEMP_SCL
12
14
MAX6690MEE
SMBDATA
ADD0 10
SMBCLK
ADD1 6
NB_THERM_A
MIN_LINE_WIDTH=0.25mm
QSOP
C2081
0.0022UF
DIFFERENTIAL_PAIR=TSENSE_NB
NET_PHYSICAL_TYPE=10MIL_WIDTH
DXP
(SYM_VER2)
NC_5 5
DXN
NC_9 9
NET_SPACING_TYPE=TSENSE_DIFPAIR
PLACE BY IC
NC_13 13
10%
NB_THERM_K
SYS_OVERTEMP_L
CERM
402
7
AK06
AG08
F15
NB_THERM_A
NB_THERM_K
G15
AF02
39 30 28 20 7
AF05
AH01
NOSTUFF
R2083
1K
1K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R2086
1K
5%
1/16W
MF-LF
2 402
C2050
NEED TO CHECK ALL I2C ADDRESSES

A0 | A1 | ADDR
----+----+-----0 | 0 | 30/31
0 | hiZ| 32/33
0 | 1 | 34/35
hiZ | 0 | 52/53
hiZ | hiZ| 54/55
hiZ | 1 | 56/57
1 | 0 | 98/99
1 | hiZ| 9A/9B
1 | 1 | 9C/9D
TSENSE_NB_ADD0
TSENSE_NB_ADD1
1NOSTUFF
PMR_CLK_STOP_L
AG02
R2084
R2085
1K
C2051
C2052
1UF
1UF
1UF
10%
10%
10%
6.3V
6.3V
6.3V
CERM
402
CERM
402
CERM
402
NB_PU_RST_L
NB_HRST_L
AG01
AJ01
AK03
AH06
30
39
39
I2C_NB_C_SDA
I2C_NB_C_SCL
AJ05
39
39
I2C_NB_A_SDA
I2C_NB_A_SCL
AG03
AH03
AE10
NOSTUFF
1
39
26 27
26 27
NOSTUFF
1
R2001
60.4
39
NB_PMR_CLK_P
NB_PMR_CLK_N
AE09
R2000
30 62
I2C_NB_B_SDA
I2C_NB_B_SCL
AG04
R2002
60.4
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
TERM_RC
5%
1/16W
MF-LF
402
NOSTUFF
1
C2053
1.5PF
P4MM
SM
TP2000
PP
1 6
XW2000
PP_2V5PWRONNBMISC
+/-0.25PF
2
NOSTUFF
R2012
20
PMR_CLK_DIS_L
NOTE:
CERM
402
PLACE TERM R/C CLOSE TO KODIAK
5%
1/16W
MF-LF
402
KODIAK & SHASTA MISC
NB_PMR_CLK_STOP_L
NOTE: LOW = DISABLE PMR_CLK
5%
1/16W
MF-LF
402
50V
R2013
10K
NET_SPACING_TYPE=TSENSE_DIFPAIR
NET_PHYSICAL_TYPE=10MIL_WIDTH
PMR_CLK_STOP CAN BE USED TO STOP ALL CLOCKS IN KODIAK

USED FOR DEBUG
PLACE R2012 IN AN ACCESSIBLE LOCATION

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
REV.
051-6863
SCALE
SHT
NONE
20 30
NB_SUSPEND_ACK_L
NB_SUSPEND_REQ_L
AJ03
5%
1/16W
MF-LF
2 402
GND
DIFFERENTIAL_PAIR=TSENSE_NB
AL02
24 28 93
NC_16 16
50V
20
NC_1 1
20
5%
1/16W
MF-LF
402
C2080
1UF
R2087
1
TSENSE_NB_VCC
5%
1/16W
MF-LF
402
TSENSE_NB_OVERTEMP_L
20
AG05
AL01
SM
R2082
NOSTUFF
AG07
NORTH_BRIDGE_RESET_L
CE1_LT_TCK
HRESET_L
CE1_MC_TDI
CE1_B_TDO
SUSPENDACK_L
SUSPENDREQ_L
CE1_DI1_TMS
CE1_DI2_TRST
SYS_ISCA0
SYS_ISCL0
CE0_TEST
SYS_ISCA1
SYS_ISCL1
SYS_THDIO_D
API_ISCA
SYS_THDIO_G
API_ISCL
VD5_0
PMR_CLK_P
VD5_1
PMR_CLK_N
VD5_2
30 28 7
AJ04
POWER/TEST/MISC
30 9
F
OF
20
154
Page Notes
- =PP3V3_PWRON_SB_PCI64 (VIO1) (TO 5V OR 3.3V)
- =PP3V3_PWRON_SB_PCI32 (VIO2) (TO 5V OR 3.3V)
- =PP3V3_PWRON_SB
- =PP2V5_PWRON_SB
SM
- =PP1V2_PWRON_SB_VCORE
2
P4MM
1
XW2300
NOTE: PCI pads use the VIO supply to meet
PP_1V2PWRONSBVCORE
different drive timing
SM
PP2300
PP
characteristics required by the PCI
spec for 5V vs. 3.3V operation.
CONNECT VIO2 TO
appropriate PCI bus voltage and
SM
VIO1 TO SAME IF 64-BIT
P4MM
1
XW2303
PCI, otherwise 3.3V.
SM
PP_3V3PWRONSBPCI64
SM
XW2304
(NONE)
PP2303
PP
P4MM
NO_TEST=YES
PP_2V5PWRONSB
SM
PP2304
PP
(NONE)
Power Sequencing:
Must power Shasta VCore rail before any
other Shasta supplies.
=PP2V5_PWRON_SB
7
7 23 24 119 138
=PP1V2_PWRON_SB_VCORE
1
C2350
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
20%
20%
20%
20%
20%
10V
10V
10V
10V
10V
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
AA1
0.1uF
20%
2
10V
CERM
402
10V
CERM
402
0.1uF
20%
2
C2307
10V
CERM
402
0.1uF
20%
2
C2308
10V
CERM
402
C2309
0.1uF
20%
2
AB2
V1.1
BGA-LF
AB6
(1 OF 8)
0.1uF
2
C2311
0.1uF
C2312
0.1uF
C2313
C2355
0.1uF
0.1uF
20%
20%
K21
0.1uF
C2314
20%
20%
20%
20%
10V
10V
10V
10V
CERM
402
CERM
402
CERM
402
POWER
L21
SEE_TABLE
VIO2
10V
CERM
402
C2356
10V
CERM
402
C2357
0.1uF
20%
2
10V
CERM
402
W22
Y19
For PCI_AD<63..32>
F8
0.1uF
20%
2
H17
B2
10V
CERM
402
VIO1
B1
F4
1
=PP3V3_PWRON_SB_PCI64
CERM
402
D1
C2310
G15
10V
B5
CERM
402
H18
20%
2
10V
SHASTA
VDDO33
0.1uF
C2306
20%
2
D19
VDDO25
AB10
1
CERM
402
U2300
AA3
C2305
10V
VDDC
AA2
C2351
0.1uF
20%
T15
T10
R9
R12
R10
C2304
P15
N8
C2303
M15
L8
C2302
L15
K8
C2301
J15
J12
C2300
H8
H15
0.1uF
H1
CERM
402
VDDP_KL
L7
=PP3V3_PWRON_SB_PCI32
V8
M1
R2
1
U12
119 56 24 20 7
DIGITAL
W4
C2320
0.1uF
10V
CERM
402
0.1uF
20%
2
C2321
10V
CERM
402
0.1uF
20%
2
C2322
10V
CERM
402
0.1uF
20%
2
C2323
20%
10V
CERM
402
C2324
A1
0.1uF
A2
- 1.2V - 950 mA (1175 mW)
VDDPs
- 2.5V - 100 mA ( 250 mW)
I/O 2.5
- 2.5V -
I/O 3.3
- 3.3V - 220 mA ( 770 mW)
20 mA (
CERM
402
CERM
402
C2361
0.1uF
10V
CERM
402
20%
2
C2325
C2326
C2327
C2328
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
20%
20%
20%
20%
20%
10V
CERM
402
10V
CERM
402
10V
CERM
402
10V
CERM
402
For PCI_AD<31..0>
=PP2V5_PWRON_SB
3015 mW
AA10
U10
AA6
T12
AB1
R19
AB22
P9
C19
P4
CERM
402
D2
B
C2330
0.1uF
0.1uF
20%
2
10V
CERM
402
C2331
0.1uF
20%
2
10V
CERM
402
C2332
0.1uF
20%
2
10V
CERM
402
C2333
20%
2
10V
CERM
402
GND
GND
P10
C2334
N9
0.1uF
H9
N22
10V
J10
N13
CERM
402
J11
N12
J13
N11
CERM
402
CERM
402
CERM
402
CERM
402
M14
L9
M13
10V
M12
10V
M11
10V
M10
10V
M2
L16
20%
L14
0.1uF
20%
L13
0.1uF
20%
L12
0.1uF
20%
L11
0.1uF
20%
GND
K9
0.1uF
10V
N10
C2339
L10
K7
C2338
K13
K12
C2337
K11
CERM
402
20%
2
K10
C2336
10V
P12
H2
J22
20%
P14
F7
J16
C2335
0.1uF
2
P13
J14
1
C2365
10V
F3
7 23 24 119 138
U13
E22
CERM
402
U22
Total:
A5
C2329
10V
W19
C2362
0.1uF
20%
2
W5
60 mW)
A22
10V
10V
ANALOG12 - 1.2V - 600 mA ( 760 mW)
20%
2
20%
2
V7
C2360
0.1uF
Shasta max (est 06/30/03) current:
U9
=PP3V3_PWRON_SB
CERM
402
Shasta Core Power
SYNC_MASTER=Q63

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:20 2005
REV.
23
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
ELECTRICAL_CONSTRAINT_SET
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
119 56 24 23 20 7
I589
I590
I591
I592
I593
I594
I595
I596
I597
I598
I599
I600
I601
24 154
6.3V
7 23 119 138
CERM
402
R2405
24 26
24
3.3
MIN_NECK_WIDTH=0.38mm
5%
1/8W
MF-LF
805
24
24
C2400
C2401
10UF
1uF
10%
2
X5R
805
24 121
SM
28 24
C2431
C2430
1uF
6.3V
CERM
402
24 147
10UF
10%
24 122
3.3
6.3V
CERM
402
5%
1/8W
MF-LF
805
28 24
R2410
24
20 24
3.3
10%
6.3V
X5R
805
24
93 28 24 20
=PP3V3_PWRON_SB
24 56
24 56
C2410
C2411
10UF
1uF
10%
10%
6.3V
6.3V
X5R
805
XTAL
VDD
CERM
402
143 24
U2300
Q2476
SOT23
2
MPIC_SB
SB_CPU_A0_INT_L
TO CPU
154 24
154 24
24
RP2420
RP2430
RP2430
RP2410
I2S2_DEV_TO_SB_DTI
I2S2_SB_TO_DEV_DTO
I2S2_MCLK
I2S2_BITCLK
I2S2_SYNC
I2S2_RESET_L
RP2430
RP2420
RP2420
RP2430
33
33
33
33
I2S0_SB_TO_DEV_DTO_R
I2S0_MCLK_R
I2S0_BITCLK_R
I2S0_SYNC_R
33
33
33
33
I2S1_MCLK_R
I2S1_BITCLK_R
I2S1_SYNC_R
NorthBridge / SouthBridge MPIC Routing
119 56 24 23 20 7
33
33
33
33
I2S1DTI_H
AB5
I2S1DTO_H
I2S1MCLK_H
AA7
V5
AA5
I2S2_MCLK_R
I2S2_BITCLK_R
I2S2_SYNC_R
Y8
Y7
AB4
W9
Y2
(I2S2_RESET_L)
I2S0_RESET_L
24 SB_GPIO_H_3
SB_PCI_SEL32BIT
=PP3V3_PWRON_SB
10K
5%
1/16W
MF-LF
402 2
39
39
R2402
122 119 30 28
AB3
147 24
R2400 1
B
SYS_IO_RESET_L
43 30 28
W8
W6
I2C_SB_SCL
I2C_SB_SDA
Y9
AB7
SHASTA_SYS_IO_RESET_L
SB_STOPXTALS_L
SMU_SUSPENDREQ_L
SB_SUSPENDACK_L
SYS_PME_L
TP_SB_WATCHDOG
28
28
5%
1/16W
MF-LF
402
122 28
9
E9
W10
U11
20
20
24
24
24
SB_CPU_A0_INT_L
SB_CPU_A1_INT_L
SB_CPU_B0_INT_L
SB_CPU_B1_INT_L
=PP3V3_PWRON_SB
R2408
R2409
R2412
R2418
20
10K
1
MPIC_NB
MPIC_NB
MPIC_NB
MPIC_NB
20 9
R2480
4.7K
5%
1/16W
MF-LF
402
24
10V
CERM
402
24
1%
1/16W
MF-LF
402 2
24
10K
24 121
CRITICAL
PCI_USB2_INT_L
GPIO_H_3
PCI_SEL32BIT_H
I2CCLK_H
I2CDATA_H
STOPXTALS_L
SUSPENDREQ_L
TDO
TCK
A3
C2490
SAT_RUN
1
NOSTUFF
R2417
10K
2
1K
TMS
TRST_L
1%
1/16W
MF-LF
402
SYS_OVERTEMP_L
50V
20 24 28 93
CERM
402
PP2406
10
U16
SB_TO_SMU_INT_L
11
PCI1REQ_5_L
PCI1GNT_5_L
Y20
LOGIC_BRD_GOOD
12
PCI1AD_32_H
D18
13
A20
14
PCI1AD_33_H
PCI1AD_34_H
15
PCI1AD_35_H
F17
16
PCI1AD_36_H
PCI1AD_37_H
G16
17
18
PCI1AD_38_H
A21
19
PCI1AD_39_H
PCI1AD_40_H
B21
21
PCI1AD_41_H
G17
22
PCI1AD_42_H
PCI1AD_43_H
G18
25
PCI1AD_44_H
PCI1AD_45_H
F19
26
PCI1AD_46_H
E20
27
PCI1AD_47_H
PCI1AD_48_H
C21
28
29
PCI1AD_49_H
G19
30
C22
31
PCI1AD_50_H
PCI1AD_51_H
32
PCI1AD_52_H
G20
33
PCI1AD_53_H
PCI1AD_54_H
D22
H19
36
PCI1AD_55_H
PCI1AD_56_H
37
PCI1AD_57_H
F21
39
PCI1AD_58_H
PCI1AD_59_H
G21
40
PCI1AD_60_H
J19
38
PP
50V
CERM
402
F18
F16
C20
E19
D20
F20
D21
K18
J17
H20
TEST_MODE_H
PLLTEST
41
PCI1AD_61_H
PCI1AD_62_H
F22
42
FSTEST
43
PCI1AD_63_H
H21
W13
XTAL_18_I
44
PCI1C_BE_4_L
J20
V13
XTAL_18_O
45
H22
46
PCI1C_BE_5_L
PCI1C_BE_6_L
47
PCI1C_BE_7_L
K20
48
K17
49
PCI1REQ64_L
PCI1ACK64_L
50
PCI1PAR64_H
E18
51
XGI_CLK_H
Y4
XGI_DTO0_H
XGI_DTO1_H
U7
XGI_DTI_H
W2
U15
XTALI
V15
XTALO
24
52
53
54
C2491
5%
AA20
SM
22pF
2
PCI1GNT_4_L
V14
5%
24
P4MM
SB_CLK18M_XTALO
22pF
AB21
34
24 122
R2416
AA19
PCI1REQ_4_L
35
TDI
XTAL_18
GND
PLL_45
GND
NB_CHP_FLT_N_B
SB_SFC_RESET_L
PCI1GNT_3_L
23
RESET_L
W11
U14
NC
GPIO_H_2
U17
20
SM
5%
1/16W
MF-LF
402
PCI_AIRPORT_INT_L
18.432M
I2S2SYNC_H
GPIO_H_1
AA11
W12
SB_CLK25M_SATA
R2490
1%
1/16W
MF-LF
2 402
Y2490
5%
1/16W
MF-LF
402
R2459
1
I2S2BITCLK_H
PCI1PME_L
INTRWD_H
Y11
SB_CLK18M_XTALI
SB_CLK18M_XTALO_R
200
R2456
10K
I2S2DTO_H
I2S2MCLK_H
PCI1REQ_3_L
G22
K22
L17
T9
2
1%
1/16W
MF-LF
402
SM
PP
PP2405
24 20
SB_CPU_VDNAP1
SB_CPU_VDNAP2
SB_VDNAP0
SYS_OVERTEMP_L
SB_GPIO14
24
NOSTUFF
R2406
ABBREV=DRAWING
5%
1/16W
MF-LF
402
R2457
24 28
24
GIGE_P1_INTA_L
24
GIGE_P2_INTB_L
10K
1
24
R2413
24 31
20 24 28 93
R2432
0
10K
2
5%
1/16W
MF-LF
402
R2414
24 143
NB_SLOT_RESET_L
24
RAI_ALERT_L
10K
R2465
24
PLACE R2432 CLOSE TO SHASTA
RAI_FATAL_L
NOSTUFF
50 28 26 24
24
SYS_SLEWING_L
1K
R2421
1
MAKE_TBEN_SYNC_L
10K
5%
1/16W
MF-LF
402
R2407
153
153
NO STUFF
FW_LOWPWR
139
153
154
154
154
150
154
152
154
154
153
5%
1/16W
MF-LF
402
R2466
24
24 17
FW_LOWPWR_R
10K
5%
1/16W
MF-LF
402
ENETFW_RESET
R2467
1
132 24
10K
ENET_ENERGYDET
10K
5%
1/16W
MF-LF
402
R2468
24
24
5%
1/16W
MF-LF
402
24
24
SYS_SLEWING_L
SB_CPU_A0_SRESET_L
SB_CPU_A1_SRESET_L
SB_CPU_B0_SRESET_L
SB_CPU_B1_SRESET_L
NB_TO_SB_INT
SMU_TO_SB_INT_L
24 26 28 50
Shasta Serial / Misc
24 56
24 56
24 56
24 56

24
24
PLL_49
GND

APPLE COMPUTER INC.
10K
5%
1/16W
MF-LF
402
R2415
24
1%
1/16W
MF-LF
402
SMU_TO_SB_INT_L
10K
5%
1/16W
MF-LF
402
R2462
PCI_USB2_INT_L
24 122
FW_LOWPWR_R
24
ENETFW_RESET
17 24
MAKE_TBEN_SYNC_L
24
ENET_ENERGYDET
24 132
AUDIO_LO_DET_L
AUDIO_LO_OPTICAL_PLUG_L
AUDIO_LI_DET_L
AUDIO_LI_OPTICAL_PLUG_L
AUDIO_HP_DET_L
AUDIO_MIC_ID
AUDIO_LO_MUTE_L
AUDIO_HP_MUTE_L
AUDIO_SPKR_MUTE_L
AUDIO_EXT_MCLK_SEL
AUDIO_SPDIFIN_INT_L
AUDIO_SPKR_ID
1
5%
1/16W
MF-LF
402
20 24
5%
1/16W
MF-LF
402
24
5%
402
MF-LF
1/16W
24 28
1 13:46:21 2005
5%
1/16W
MF-LF
402
DRAWING NUMBER
REV.
051-6863
SCALE
SHT
F
OF
24
DRAWING
TITLE=KILOHANA
24
GIGE_P1_INTA_L 24
GIGE_P2_INTB_L 24
RAI_ALERT_L
24
RAI_FATAL_L
24
SPEC SHOWS LOAD CAPACITANCE OF 16PF FOR 197S0004
4.7K
10K
24 28
MB_SLOT_RESET_L
24
NB_SLOT_RESET_L_R
PCI_AIRPORT_INT_L
24 121
PCIX_INT_L 24
RAI_EXP_INTR_L<3> 20
SB_CPU_A0_INT_L
SB_CPU_A1_INT_L
SB_CPU_B0_INT_L
SB_CPU_B1_INT_L
PCIX_INT_L
R2419
24
10K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
NB_SLOT_RESET_L
R2422
1
4.7K
MB_SLOT_RESET_L
NONE
SB_GPIO14
10K
5%
1/16W
MF-LF
402
1K
SYS_OVERTEMP_L
SIZE
MAKE_TBEN_SYNC_L
5%
1/16W
MF-LF
402
R2404
1
R2460
P4MM
I2S2DTI_H
SUSPENDACK_L
AB11
SB_TEST_MODE_PD
TP_SB_PLLTEST
TP_SB_FSTEST
26 24
=PP3V3_RUN_SB_PCI
GPIO_H_0
W18
V12
JTAG_SB_TDI
JTAG_SB_TDO
JTAG_SB_TCK
JTAG_SB_TMS
JTAG_SB_TRST_L
20
24
I2S1BITCLK_H
I2S1SYNC_H
V11
PLACE R2402 CLOSE TO SHASTA
119 56 24 23 20 7
SB_VDNAP0
GPIO
6
2
5%
1/16W
MF-LF
402
R2461
NET_SPACING_TYPE=P3MM SPACING
I2S0SYNC_H
V10
AA8
(I2S2_DEV_TO_SB_DTI)
I2S0MCLK_H
I2S0BITCLK_H
V9
(I2S1_RESET_L)
I2S0DTO_H
U8
Y6
Y5
AA4
I2S0
AUDIO GPIO - see note on right
FROM SOUTHBRIDGE
5%
1/16W
MF-LF
402
I2S1_DEV_TO_SB_DTI
I2S1_SB_TO_DEV_DTO
I2S1_MCLK
I2S1_BITCLK
I2S1_SYNC
I2S1_RESET_L
V1.1
BGA-LF
(2 OF 8)
PCI
CPU_A0_INT_R_L
154 24
154 24
RP2410
RP2410
RP2420
RP2410
I2S0DTI_H
XGI
R2478
154 24
I2S2: S/P-DIF
5%
1/16W
MF-LF
402 2
154 24
2N3904LF
5%
1/16W
MF-LF
402
R2479 1
24 8
W7
GPIO
NB_INT_L_R
FROM NORTHBRIDGE
MPIC_NB 0
24 8
MPIC_SB
10K
1
24 8
I2S0_DEV_TO_SB_DTI
I2S0_SB_TO_DEV_DTO
I2S0_MCLK
I2S0_BITCLK
I2S0_SYNC
C2440
20%
10K
5%
1/16W
MF-LF
402
10K
LOGIC_BRD_GOOD
0.1uF
VIO
PME
XTAL_18 PLL_45 PLL_49

VDD
VDD
VDD
R2454
1
7 20 23 24 56 119
AA12
R2475
NB_CPU_A0_INT_L
24
SB_TO_SMU_INT_L
5%
1/8W
MF-LF
805
5%
1/16W
MF-LF
402
SAT_PWRON
24 56
24 56
VOLTAGE=2.5V
I2S1
NB_TO_SB_INT
24 8
10K
5%
1/16W
MF-LF
402
10K
SB_CPU_VDNAP2
PP2V5_PWRON_SB_XTALVDD
(SCCA)
To SouthBridge ->
R2452
1
R2455
31 24
24 154
I2C
SouthBridge MPIC will be used for

interrupt controller.
24 8
I2S1: Soft Modem
5%
1/16W
MF-LF
2 402
Selects whether NorthBridge or
MPIC_SB
24 8
10K
NOTE: XGC required for Shasta GPIOs
SB_CPU_VDNAP1
8 24
PWR_MGT
Configures Shasta for 64-bit PCI
147 24
R2476
5%
1/16W
MF-LF
402
R2430
10%
6.3V
24
TEST
147 24
R2453
PP1V2_PWRON_SB_PLL49VDD
24
XTALS
147 24
154 24
10K
SB_SFC_RESET_L
5%
1/16W
MF-LF
402
X5R
805
VOLTAGE=1.2V
I2S2
7 24
10K
1
VOLTAGE=2.5V
(SCCB)
=PP3V3_RUN_SB_PCI
(NONE)
NB_CHP_FLT_N_B
R2450
R2451
28 24
AB13
- _PP1V2_PWRON_SB
24 7
24
5%
1/16W
MF-LF
402
24
6.3V
10K
10%
2
SB_GPIO_H_3
PP2V5_PWRON_SB_XTAL18VDD
AB12
- _PP2V5_PWRON_SB
I2S0: Audio DAC
- _PP3V3_PWRON_SB
56
=PP1V2_PWRON_SB
SHASTA
- _PP3V3_PCI
R2463
24
24
Page Notes
42
10UF
10%
=PP2V5_PWRON_SB
- MPIC_NB/MPIC_SB:
C2420
1uF
Re-pin within each RPAK as necessary

DO NOT swap between RPAKs
- PCI_64BIT:
C2421
24
SB_CPU_A0_SRESET_L
SB_CPU_A1_SRESET_L
SB_CPU_B0_SRESET_L
SB_CPU_B1_SRESET_L
147 24
PP2400
5%
1/8W
MF-LF
805
24 154
24 154
3.3
24 154
SB_CPU_B1_INT_L
PCI_AIRPORT_INT_L
PCI_USB2_INT_L
I2S0_RESET_L
I2S1_RESET_L
I2S2_RESET_L
MB_SLOT_RESET_L
NB_SLOT_RESET_L
SM
PP
24
R2420
24 154
SB_CPU_B0_INT_L
PP1V2_PWRON_SB_PLL45VDD
VOLTAGE=1.2V
5%
1/16W
MF-LF
402
P4MM
PP_1V2PWRONSBPLL45VDD
necessary pull-ups & pull-downs.
I588
8 24
SB_CLK18M_XTALI
SB_CLK18M_XTALO
SB_CLK18M_XTALO_R
SB_CLK25M_SATA
NB_TO_SB_INT
SB_CPU_A0_INT_L
SB_CPU_A1_INT_L
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
SPACING
8 24
AUDIO GPIOS
I587
XW2400
8 24
the audio circuit to provide the
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
P3MM
I586
8 24
NOTE: It is the responsibility of
SB_CLK25M_ATA
SPACING
SPACING
SPACING
SPACING
10K
AUDIO PAGES IS RESPONSIBLE FOR TERMINATION OF I2S0 AND I2S2

DO NOT ADD PULLUP/DOWN FOR I2S0 AND IS=2S2 IN THIS PAGE
8 24
W17
0.38mm
0.38mm
0.38mm
0.38mm
24 147
Y12
SB_CLK18M_XTAL
I2S1_RESET_L
24 147
I2S2_DEV_TO_SB_DTI
I2S2_SB_TO_DEV_DTO
I2S2_MCLK
I2S2_BITCLK
I2S2_SYNC
0.25mm SPACING
24 8
AA13
I2S2_TO_SB
I2S2_TO_DEV
I2S2_TO_DEV
I2S2_BIDIR
I2S2_BIDIR
R2464
24 147
24 154
I2S1_DEV_TO_SB_DTI
I2S1_SB_TO_DEV_DTO
I2S1_MCLK
I2S1_BITCLK
I2S1_SYNC
0.25mm SPACING
=PP3V3_PWRON_SB
24 147
Y13
AUDIO
I2S1_TO_SB
I2S1_TO_DEV
I2S1_TO_DEV
I2S1_BIDIR
I2S1_BIDIR
I2S0_DEV_TO_SB_DTI
I2S0_SB_TO_DEV_DTO
I2S0_MCLK
I2S0_BITCLK
I2S0_SYNC
W14
I2S0_TO_SB
I2S0_TO_DEV
I2S0_TO_DEV
I2S0_BIDIR
I2S0_BIDIR
154
L2501
25 7
C9
A5
5%
1/16W
MF-LF
402
C2545
2.2UF
20%
C2511
0.1UF
C2509
0.1UF
20%
6.3V
CERM1
603
20%
10V
CERM
402
P4MM
VOLTAGE=1.5V
SM
PP2500
PP
XW2500
PP_OVDD_PULSAR1
A1
25 7
=PP1V2_PWRON_PULSAR
M10
SM
PP2504
L2503
P4MM
PP
PP2501
180-OHM-1.5A
1
XW2501
SM
PP
PP_1V2PWRONPULSAR1
Q63 APPLICATION IS POWER ON
25 7
=PP1V5_PULSAR
J11
5%
1/16W
MF-LF
402
C2569
2.2UF
20%
C2513
0.1UF
C2517
0.1UF
20%
6.3V
CERM1
603
20%
2
10V
VOLTAGE=1.5V
SM
XW2502
PP_1V5PULSAR2
NO_TEST=YES
P4MM
SM
PP2503
PP
XW2503
PP_1V5PWRONPULSAR2
C5
=PP1V5_PWRON_PULSAR
SM
SM
PP2506
180-OHM-1.5A
1
PP
PP2505
PP
R2514
4.7
C2503_1
5%
1/16W
MF-LF
402
1
2.2UF
20%
C2515
0.1UF
5%
1/16W
MF-LF
402
C2503
C2501
0.1UF
20%
CERM1
603
20%
2
26 25
6.3V
10V
CERM
402
M12
VSS_12_4
VSS_12_5
K11
VSS_12_6
E12
VDD_12_3
VDD_12_4
VDD_12_5
SYM 2 OF 2
25 7
=PP3V3_PWRON_PULSAR
A7
A3
K8
J10
VDD_15_12_1
VDD_15_12_2
VDD_15_12_3
VDD_15_12_4
VDD_15_C1
VDD_15_C2
VSS_15_C2
M6
VDD_15_C3
VSS_15_C3
G11
VDD_15_C4
VSS_15_C4
C8
VSS_15_C1
VDD_15_PLL1
VDD_15_PLL2
VDD_15_PLL3
K9
VDD_15_PLL4
G2
VSS_15_PLL1
D12
VSS_15_PLL2
VSS_15_PLL3
D1
VSS_15_PLL4
L8
VSS_25
G1
VSS_33_BC
K2
VSS_33_I
E1
VDD_25
VDD_33_BC
VDD_33_I
VDD_33_XTAL
VSS_33_XTAL
M4
D11
5%
1/16W
MF-LF
402
SM
PP2507
2
0603
PP
5%
1/16W
MF-LF
402
R2515
4.7
C2507_1
2
5%
1/16W
MF-LF
402
0
1
C2507
20%
PP3V3_PSL_XTAL
2
5%
1/16W
MF-LF
402
2.2UF
C2519
0.1UF
C2505
0.1UF
20%
6.3V
CERM1
603
20%
2
=PP3V3_RUN_PULSAR
R2511
P4MM
R2505
L4
B12
R2510
7
L2507
VSS_12_3
VDD_12_1
VDD_12_2
D2
C2
NOSTUFF
D10
L2
PP3V3_PLSR_I
CERM
402
180-OHM-1.5A
=PP2V5_PWRON_PULSAR
VOLTAGE=3.3V
VOLTAGE=1.5V
PLACE NEAR PULSAR2
10V
VSS_12_1
VSS_12_2
K4
PLL_VDD ON IN SLEEP
25 7
R2503
L6
PP1V5_PSL_PLL1
PP1V5_PSL_PLL2
PP1V5_PSL_PLL3
PP1V5_PSL_PLL4
2
0603
B5
B8
VSS_OVDD_4
VSS_OVDD_5
F2
F11
P4MM
P4MM
L2505
VDD_OVDD_4
VDD_OVDD_5
A9
1
ON IN SLEEP
CERM
402
CERM
402
25 7
PLACE NEAR PULSAR2
10V
PP
PP2502
SM
SM
0
1
C2569_1
2
5%
1/16W
MF-LF
402
P4MM
R2513
4.7
R2509
B7
K5
0603
B10
VSS_OVDD_2
VSS_OVDD_3
K12
H11
P4MM
VSS_OVDD_1
VDD_OVDD_2
VDD_OVDD_3
M3
M7
ON IN SLEEP
PLACE NEAR PULSAR2
10V
CERM
402
VDD_OVDD_1
B4
SM
B11
R2512
1
SM
5%
1/16W
MF-LF
402
=PPOVDD_PULSAR
C2545_1
4.7
PULSAR2
BGA
25 7
R2501
U2500
Q63 APPLICATION IS RUN
0603
SEE_TABLE
180-OHM-1.5A
=PP1V5_PWRON_PULSAR
SHARED PIN
10V
VOLTAGE=1.5V
CERM
402
P4MM
SM
PP2508
PLACE NEAR PULSAR2
10V
PP
25 7
=PP3V3_PWRON_PULSAR
CERM
402
26 25
PP3V3_PLSR_I
L2509
180-OHM-1.5A
25 7
=PP3V3_PWRON_PULSAR
C2521_1
B
1
C2520
0.1UF
20%
10V
20%
2
CERM
402
10V
CERM
402
0
1
2
VOLTAGE=3.3V
5%
1/16W
MF-LF
402
C2575
0.1UF
10V
R2516
4.7
1
20%
2
0603
R2507
C2551
0.1UF
C2521
2.2UF
20%
6.3V
CERM1
603
5%
1/16W
MF-LF
402
C2522
25 7
=PP2V5_PWRON_PULSAR
0.1UF
20%
2
0.1UF
CERM
402
20%
2
PLACE NEAR PULSAR2
CERM
402
10V
CERM
402
Q63 APPLICATION IS PWRON
25 7
25 7
=PP1V5_PULSAR
1
25 7
C2531
C2532
C2533
=PPOVDD_PULSAR
C2534
C2535
0.1UF
20%
20%
20%
20%
20%
20%
10V
10V
10V
10V
10V
10V
10V
C2527
CERM
402
C2528
CERM
402
CERM
402
CERM
402
CERM
402
0.1UF
C2538
0.1UF
20%
10V
0.1UF
C2537
0.1UF
20%
CERM
402
0.1UF
C2536
0.1UF
CERM
402
0.1UF
C2530
0.1UF
20%
CERM
402
10V
CERM
402
=PP1V5_PWRON_PULSAR
1
25 7
C2574
10V
C2529
0.1UF
0.1UF
0.1UF
20%
20%
20%
10V
10V
10V
CERM
402
C2523
CERM
402
C2524
C2572
0.1UF
20%
CERM
402
10V
CERM
402
=PP1V2_PWRON_PULSAR
PULSAR2 POWER
1
C2525
C2526
C2573
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
20%
20%
20%
20%
20%
10V
CERM
402
10V
CERM
402
10V
CERM
402
10V
CERM
402
SYNC_MASTER=Q63
10V
CERM
402

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:22 2005
REV.
25
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
5
PLACE ALL 0-OHM SERIES RESISTORSRES
ON THIS PAGE NEAR PULSAR
EI_CPU_A_SYSCLK_P
56
EI_CPU_A_SYSCLK_N
56
EI_CPU_B_SYSCLK_P
27
EI_CPU_B_SYSCLK_N
27
P4MM
SM
PP2602
PP
R2628
R2612
28
CLOCK_RESET_L
2
5%
25
SLEWING*
39
NOSTUFF
1
R2613
10K
5%
1/16W
MF-LF
2 402
39
R2614
C3
RESET*
PLSR2_ASEL_INT_L
I2C_CLOCK_B_SCL
I2C_CLOCK_B_SDA
D3
ASEL_INT*
402
PP3V3_PLSR_I
PLS2_RESET_L
B1 SCLK
B2
SDATA
C1
PD
U2500
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
PLSR2_PD
BGA
SYM 1 OF 2
PLSR2_TM
E3
TEST_MODE
PLSR2_OEMODE
E2
OEMODE
R2623
0
NOSTUFF
1
R2618
1K
5%
1/16W
MF-LF
2 402
R2621
1K
1%
1/16W
MF-LF
2 402
P4MM
SM
PP2601
PP
NOSTUFF
P4MM
1%
1/16W
MF-LF
402
SM
PP2600
PP
C12 XIN
C11
PLS2_REF15
H10 REF_15
PLS2_REF25
0
1
PLS2_REF33
402
XOUT
R2652
1
R2662
24
R2654
0
1
B3
200MHZ, 1.5VOVDD
HCLKN_2
A2
200MHZ, 1.5VOVDD
CPU_A_TBEN_CLK_R
CPU_B_TBEN_CLK_R
A11
66MHZ, 1.5VOVDD
HTBEN_1
A10
66MHZ, 1.5VOVDD
HSYNC_0
HSYNC_1
A8
1.5VOVDD
B9
1.5VOVDD
HSYNC_2
C10
1.5VOVDD
CPU_A_APSYNC_R
CPU_B_APSYNC_R
NB_APSYNC_R
GPCLK12_C0
H12
66MHZ, 1.2V
(100MHZ FOR ASPEN)
HT_SB_REFCLK_R
GPCLK12P_A0
GPCLK12N_A0
K3
200MHZ, 1.2V
L3
200MHZ, 1.2V
GPCLK12P_A1
M5
200MHZ, 1.2V
GPCLK12N_A1
L5
200MHZ, 1.2V
GPCLK12P_B0
L7
300MHZ, 1.2V
GPCLK12N_B0
M8
300MHZ, 1.2V
100MHZ, 1.2V
100MHZ, 1.2V
L1
REF_33
GPCLK12P_C1
L10
100MHZ, 1.2V
GPCLK12N_C1
M11
100MHZ, 1.2V
GPCLK12P_C2
GPCLK12N_C2
L11
100MHZ, 1.2V
L12
100MHZ, 1.2V
GPCLK12P_C3
K10
100MHZ, 1.2V
GPCLK12N_C3
J12
100MHZ, 1.2V
GPCLK12P_C4
GPCLK12N_C4
G12
GPCLK12P_D0
GPCLK12N_D0
1%
1/16W
MF-LF
402
R2626
330K
R2664
R2627
GPCLK25_E0
GPCLK25_E1
1%
1/16W
MF-LF
2 402
R2656
0
24
5%
1/16W
MF-LF
402
CRITICAL
Y2601
E10
66MHZ, 1.2V
E11
66MHZ, 1.2V
H1
25MHZ, 2.5V
H3
25MHZ, 2.5V
GPCLK25_F0
H2
25MHZ, 2.5V
GPCLK25_F1
J3
25MHZ, 2.5V
GPCLK33_E0
J1
66MHZ, 3.3V
GPCLK33_E1
GPCLK33_F0
J2
33MHZ, 3.3V
K1
33MHZ, 3.3V
GPCLK33_F1
GPCLK33_F2
M1
66MHZ, 3.3V
33MHZ, 3.3V
M2
C2607
HT_NB_REFCLK_H0_R
HT_NB_REFCLK_L0_R
33PF
CPU_A_APSYNC
CPU_B_APSYNC
CLK_RAIREF_200M_P_R
CLK_RAIREF_200M_N_R
REMOVED R2632 AND R2630

FROM UNUSED CLOCKS FOR EMC
56
27
NB_PMR_CLK_P_R
NB_PMR_CLK_N_R
2
5%
1/16W
MF-LF
402
NB_PCIE_REFCLK_P_C
NB_PCIE_REFCLK_N_C
GFX_SLOT_PCIE_REFCLK_P_C
GFX_SLOT_PCIE_REFCLK_N_C
HT_CLK66M_SB
CLK_RAI_200M_P<0> 27
CLK_RAI_200M_N<0> 27
2
5%
1/16W
MF-LF
402
NB_PMR_CLK_P
20 27
NB_PMR_CLK_N
20 27
R2643
0
1
2
5%
1/16W
MF-LF
402
R2666
0
5%
1/16W
MF-LF
402
R2667
CLK_KOD_100M_P<0>
82 97
CLK_KOD_100M_N<0>
82 97
5%
1/16W
MF-LF
402
R2674
0
1
98 101
R2639
NB_DDR_REFCLK_P_R
NB_DDR_REFCLK_N_R
CLK_RAI_GIGE_25MHZ_R
QUA0_REF_25MHZ_R
PCI_CLK66M_SB_INT_R
PCI_CLK33M_SB_EXT_R
SB_AIRPRT_CLK_33MHZ_R
CLK_RAI_REFCLK_66M_R
SB_USB2_CLK_33MHZ_R
98 101
HT_NB_REFCLK_N<0>
5%
1/16W
MF-LF
402
SB_CLK25M_SATA_R
QUA1_REF_25MHZ_R
HT_NB_REFCLK_P<0>
5%
1/16W
MF-LF
402
R2641
PCIE_C_REFCLKIN_P_C
PCIE_C_REFCLKIN_N_C
103
PCIE_B_REFCLKIN_P_C
PCIE_B_REFCLKIN_N_C
42 56
R2636
1
5%
1/16W
MF-LF
402
PCIE_A_REFCLKIN_P_C
PCIE_A_REFCLKIN_N_C
NB_APSYNC
2
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R2635
CLK_PCIE_SLOTA_P<0> 84 97
5%
1/16W
MF-LF
402
R2675
0
CLK_PCIE_SLOTA_N<0> 84 97
5%
1/16W
MF-LF
402
R2668
2
5%
1/16W
MF-LF
402
CLK_RAI_PCIEA_P<0>
27
CLK_RAI_PCIEA_N<0>
27
CLK_RAI_PCIEB_P<0>
27
CLK_RAI_PCIEB_N<0>
27
CLK_RAI_PCIEC_P<0>
27
CLK_RAI_PCIEC_N<0>
27
R2669
0
1
2
5%
1/16W
MF-LF
402
R2670
0
5%
1/16W
MF-LF
402
C2605
33PF
5%
50V
CERM
402
56
NC_CPU_B_TBEN_CLK_US
MAKE_BASE=TRUE
R2634
PLS2_X_OUT_B
CPU_A_TBEN_CLK_US
8X4.5MM-SM2
PLS2_X_IN_B
R2633
100MHZ, 1.2V
42 56
5%
1/16W
MF-LF
402
25.0000M
1
42 56
EI_NB_SYSCLK_N
R2631
R2637
F12
2
402
1/16W
MF-LF
HTBEN_0
EI_NB_SYSCLK_P
R2629
1
5%
L9
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
2 402
HCLKP_2
GPCLK12N_C0
1K
R2658
1
NOSTUFF
1
NO STUFF
PLS2_INTERM
0
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
2 402
200MHZ, 1.5VOVDD
GPCLK12P_C0
1%
1/16W
MF-LF
2 402
NO STUFF
PLS2_EXTCLK
NOSTUFF
F-ST-SM
3
A4
REF_25
1K
U.FL-R_SMT
200MHZ, 1.5VOVDD
F1
R2625
2
1
C4
24 28 50
1/16W
MF-LF
M9
1K
J2600
200MHZ, 1.5VOVDD
HCLKP_1
HCLKN_1
SYS_SLEWING_L
5%
NOSTUFF
200MHZ, 1.5VOVDD
B6
2
402
PLS2_X_OUT
R2600
SYS_SLEEP
A6
HCLKN_0
PLS2_X_IN
54 30 16 15 13 12 11
HCLKP_0
1
5%
PULLED UP TO PP3V3_RUN ON P.28
PULSAR2
R2616
10K
SYS_SLEWING_L_R
A12
R2671
0
5%
2
50V
5%
1/16W
MF-LF
402
CERM
402
R2672
0
1
2
5%
1/16W
MF-LF
402
R2673
0
R2645
0
1
0
2
5%
1/16W
MF-LF
402
59
27
RAM_ARB0_REF25MHZ
27
QUASAR CLOCKS ARE RESISTOR DIVIDED DOWN

TO 1.8V ON QUASAR PAGES
LAST MODIFIED: APR 26, 04
SB_CLK25M_SATA
24
R2655
1
0
5%
1/16W
MF-LF
402
RAM_ARB1_REF25MHZ
PCI_CLK66M_SB_INT
PCI_CLK33M_SB_EXT_RR
R2657
0
1
2
5%
1/16W
MF-LF
402
59
NB_DDR_REFCLK_N
CLK_RAI_GIGE_25MHZ
5%
1/16W
MF-LF
402
R2653
1
5%
1/16W
MF-LF
402
R2651
NB_DDR_REFCLK_P
2
5%
1/16W
MF-LF
402
R2649
1
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R2647
1
R2659
1
27
27 119
27 119
PULSAR2 CLOCKS
402
MF-LF
1/16W
5%
0
1
PCI_CLK33M_AIRPORT
2
5%
1/16W
MF-LF
402
R2660

121
R2663
0
1
CLK_RAI_REFCLK_66M

27

5%
1/16W
MF-LF
402
R2665
1
MB_PCIX_REFCLK

SIZE
PCI_CLK33M_USB2
5%
1/16W
MF-LF
402
27
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:22 2005
REV.
26
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
NB_PMR_CLK_P
NB_PMR_CLK_N
PCI_CLK66M_SB_INT
26 20
NC_CLK_RAI_REFCLK_66M
MAKE_BASE=TRUE
CLK_RAI_REFCLK_66M
26 20
26
119 26
119 26
NC_CLK_RAI_GIGE_25MHZ
MAKE_BASE=TRUE
N/C RAINIER CLOCKS

6
CLOCK CONSTRAINTS
N/C ALIASES
D
CLK_RAI_GIGE_25MHZ
26
NC_CLK_RAI_200M_P<0>
MAKE_BASE=TRUE
CLK_RAI_200M_P<0>
26
NC_CLK_RAI_200M_N<0>
MAKE_BASE=TRUE
CLK_RAI_200M_N<0>
26
DIFFERENTIAL_PAIR
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
NB_PMR_CLK
NB_PMR_CLK
NB_PMR_CLK
NB_PMR_CLK
PCI_CLK_SB
PCI_CLK_SB
NB_PMR_CLK_SP
NB_PMR_CLK_SP
P3MM SPACING
PCI_CLK_SB
ELECTRICAL_CONSTAINT_SET
NB_PMR_CLK
NB_PMR_CLK
PCI_CLK_SB
PCI_CLK_SB_CAP
I67
I68
I69
I70
NOTE:
ALL OTHER CLOCK CONTRAINTS ON THEIR
RESPECTIVE BUS PAGES
NC_CLK_RAI_PCIEA_P<0>
MAKE_BASE=TRUE
CLK_RAI_PCIEA_P<0>
26
NC_CLK_RAI_PCIEA_N<0>
MAKE_BASE=TRUE
CLK_RAI_PCIEA_N<0>
26
NC_CLK_RAI_PCIEB_P<0>
MAKE_BASE=TRUE
CLK_RAI_PCIEB_P<0>
26
NC_CLK_RAI_PCIEB_N<0>
MAKE_BASE=TRUE
CLK_RAI_PCIEB_N<0>
26
26
NC_CLK_RAI_PCIEC_P<0>
MAKE_BASE=TRUE
CLK_RAI_PCIEC_P<0>
26
NC_CLK_RAI_PCIEC_N<0>
MAKE_BASE=TRUE
CLK_RAI_PCIEC_N<0>
26
PCI_CLK33M_USB2
MAKE_BASE=TRUE
=PCI_CLK33M_USB2
122
N/C CPUB CLOCKS
NC_EI_CPU_B_SYSCLK_P
MAKE_BASE=TRUE
EI_CPU_B_SYSCLK_P
26
NC_EI_CPU_B_SYSCLK_N
MAKE_BASE=TRUE
EI_CPU_B_SYSCLK_N
26
NC_CPU_B_APSYNC
MAKE_BASE=TRUE
CPU_B_APSYNC
26
N/C QUASAR CLOCKS

6
MAKE_BASE=TRUE
RAM_ARB0_REF25MHZ
26
MAKE_BASE=TRUE
RAM_ARB1_REF25MHZ
26
Pulsar Aliases

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
27
OF
F
154
1
Real Time Clock
DIFFERENTIAL_PAIR
0.38MM SPACING
0.38MM SPACING
28
I457
DIFFERENTIAL_PAIR
SYS_NORTH_RESET_L 28 30
SYS_IO_RESET_L
24 30 119 122
CLOCK_RESET_L
26 28
SYS_RESET_BUTTON_L 28 29
0.25MM SPACING
SMU_RESET
SMU_RESET
I456
SMU_CLK10M_XIN
SMU_CLK10M_XOUT
SMU_CLK10M_XOUT_R
0.38MM SPACING
SMU_CLK10M_XTAL
NET_SPACING_TYPE
0.25MM SPACING
28
P3MM SPACING
I472
28
P3MM SPACING
I475
RTC_CLK32K_X1
RTC_CLK32K_X2
SMU_IO_RESET_L
SYS_NORTH_RESET_L
0.38MM SPACING
P3MM SPACING
I473
0.25MM SPACING
I474
C2808
28
0.1uF
10V
VOLTAGE=3.3V
R2815
PP_3V3ALLSMU
C2800
XW2802
SM
PP
=PP3V3_ALL_SMU
SM
P4MM
CERM
402
PP3V3_ALL_SMU_AVCC
28 30
29 28 7 6
C2801
C2802
10UF
0.1uF
0.1uF
10%
20%
20%
6.3V
Page Notes
X5R
805
10V
CERM
402
10V
CERM
402
4.7
5%
1/16W
MF-LF
402
39
XW2801
1
C2803
39
P4MM
PP_3V3ALLSMUAVCC
PP
I2C_RTC_SDA
SDA
NC
10%
2
MSOP
X1
X2
SCL
SQW/ VBAT
OUT GND
I2C_RTC_SCL
PP2801
RTC_CLK32K_X1 28
DS1338U-33
SM
6
1uF
CRITICAL
VCC
U2801
20%
28 30
D
PP2800
=PP3V3_ALL_RTC
=PP3V3_ALL_SMU
28
0.38MM SPACING
RTC_CLK32K_XTAL
29
29 28 7 6
SM
NET_SPACING_TYPE
Y2801
32.768K
RTC_CLK32K_X2 28
6.3V
CERM
402
20%
2
Server
CPU_SENSE_I
CPU_SENSE_V
CPU_TEMP
CPU_BYPASS
SMU_FAN_RPM3
SMU_FAN_RPM4
SMU_FAN_RPM5
SMU_SER_SEL
55
67
55
66
65
55
(NONE)
29
64
NOTE: CPU current/voltage monitoring
31
63
62
(CPU_SENSE_I/CPU_SENSE_V) requires
31
100K/10uF RC filter at SMU pins.
31
61
Caps should connect to GND_SMU_AVSS.
31
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
U2800
M30280F8-LF
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
AN00
RTS0*/
CTS0*
AN01
CLK0
P1[0]
P1[1]
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
P1[7]
QFP-80
AN02
RXD0
AN03
TXD0
RTS1*
(BUSY)
AN04
AN05
CLK1
AN06
RXD1
AN07
TXD1
AN20
SDA
AN21
SCL
P6[0] 43
P6[1] 42
P6[2] 41
P6[3] 40
P6[4] 31
P6[5] 30
P6[6] 29
P6[7] 28
P7[0] 27
P7[1] 26
P7[2] 25
P7[3] 24
P7[4] 23
P7[5] 22
P7[6] 21
P7[7] 20
Server
Desktop
(NONE)
78
AVCC
VCC
Desktop
Entry Desktop
S = Spare
SEE_TABLE
13
Consumer
Consumer
N = Alternate function
(see aliases below)
6 29
SMU_BOOT_SCLK
6 29
SMU_BOOT_CE
6 29
CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>
SMU_BOOT_RXD
SMU_BOOT_TXD
28 31
28 31
28 31
28 31
SMU Pull-ups / pull-down
31
6 29
6 29
29 28 7 6
P1[0] NOT USED --->
SMU_PWRSEQ_P1_0
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P1_2
SMU_PWRSEQ_P1_3
SMU_PWRSEQ_P1_4
SYS_POWERFAIL_L
SMU_FAN_TACH9
SYS_DOOR_AJAR_L
circuit, but be aware that this will
affect other analog inputs such as
AC adapter ID.
4
4
NOTE: All analog inputs to SMU should have

7
a 100pF capacitor to the SMU AVSS

31
signal (GND_SMU_AVSS).
None of
31
those capacitors are provided on

this page.
SMU_FAN_TACH6
SMU_FAN_TACH7
SMU_FAN_TACH0
SMU_FAN_TACH1
SMU_FAN_TACH2
SMU_FAN_TACH3
SMU_FAN_TACH4
SMU_FAN_TACH5
31
NOTE: Some primary and alternate functions
31
reuire pull-ups that are not.
32
provided on this page.
32
Please.
review the latest SMU specification
33
to ensure missing pull-ups are
31
provided on another page.
31
31
NOTE: Pinout matches SMU pinout v1.51.
I2C_SMU_A_SDA_IN
I2C_SMU_A_SDA_OUT_L
I2C_SMU_A_SCL_IN
I2C_SMU_A_SCL_OUT_L
I2C_SMU_E_SDA
I2C_SMU_E_SCL
DIAG_LED
SYS_OVERTEMP_L
31 28
31 28
31 28
31 28
39
39
8
93 24 20
39
38
37
36
35
34
33
32
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
TA1out
AN22
AN23
TA1in
TA2out
INT3*
TA2in
INT4*
TA3out
INT5*
TA3in
SDAmm
TA4out
SCLmm
TA4in
IOC2
INT0*
IOC3
INT1*
IOC4
INT2*
IOC5
NMI*
IOC6
CE*
IOC7
CLK3
TB0in
Sin3
TB1in
Sout3
TB2in
AN24
AN25
AN26
AN27
P8[0] 19
P8[1] 18
P8[2] 17
P8[3] 16
P8[4] 15
P8[5] 14
P8[6] 8
P8[7] 7
P9[0] 5
P9[1] 4
P9[2] 3
P9[3] 2
P9[5] 1
P9[6] 80
P9[7] 79
I2C_SMU_B_SDA
I2C_SMU_B_SCL
I2C_SMU_CPU_SDA_IN
SMU_FAN_RPM0
I2C_SMU_CPU_SCL_IN
SMU_FAN_RPM1
SB_CPU_VDNAP2
SMU_FAN_RPM2
CERM
402
28 31
SMU_VREF should be same signal or

reference used by monitoring
10V
MAKE_BASE=TRUE
Portable
Portable
Y
Y = Primary function
- =PPVREF_SMU (SMU AVCC OR 2.5V REFERENCE)
Entry Desktop
SMU_BOOT_BUSY
- =PP3V3_PWRON_SMU
C2809
0.1uF
GND_SMU_AVSS 6 28 55
- =PP3V3_ALL_RTC
SM-LF
4

- =PP3V3_ALL_SMU
CRITICAL
10K
SYS_POWERUP_L
6 7 12 28 50 85
5%
1/16W
MF-LF
402
39
28 31
32
R2801
28 31
32
10K
SYS_RESET_BUTTON_L
28 29
SYS_POWER_BUTTON_L
6 28 29
5%
1/16W
MF-LF
402
24
33
R2802
SYS_LED
29
SYS_NORTH_RESET_L
28 30
SYS_PME_L
24 28 122
SB_CPU_VDNAP0_OR_QREQ_OR_SPDIF
SYS_SLEWING_L
24 26 28 50
I2C_SMU_CPU_SDA_OUT_L
28 31
SYS_POWERUP_L
6 7 12 28 50 85
MAKE_BASE=TRUE
SMU_SLEEP
28 30
CLOCK_RESET_L
SMU_FAN_TACH8
SB_TO_SMU_INT_L
SB_STOPXTALS_L
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P9_6
SYS_SLOT_PWR
R2800
=PP3V3_ALL_SMU
39
10K
5%
1/16W
MF-LF
402
31
43 30 7
=PP3V3_PWRON_SMU
R2804
10K
SYS_PME_L
24 28 122
5%
1/16W
MF-LF
402
26 28
31
24
30 20 7
=PP3V3_RUN_SMU
R2812
2.0K
24
SYS_SLEWING_L
24 26 28 50
1%
1/16W
MF-LF
402
4
31
NOSTUFF
AN0
AN1
=PPVREF_SMU
55
AN2
P4MM
SM
P4MM
SM
PP2805
PP
PP2804
PP
28
PP2806
PP
SMU_BOOT_CNVSS
29 6 SMU_RESET_L
SMU_CLK10M_XOUT_R
28 SMU_CLK10M_XIN
29 6
9
10
12
77
SM
PCNVSS
RESET*
XOUT
XIN
VREF
AN3
KI0*
KI1*
KI2*
KI3*
P10[0] 76
P10[1] 74
P10[2] 73
P10[3] 72
P10[4] 71
P10[5] 70
P10[6] 69
P10[7] 68
SB_CPU_VDNAP1
SMU_IO_RESET_L
NB_SUSPENDACK_L
SB_SUSPENDACK_L
SMU_SUSPENDREQ_L
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
I2C_SMU_CPU_SCL_OUT_L
24
39 30 20 7
28 30
R2811
1
DRIVEN PUSH/PULL
R2825 1
R2816
10M
R2817
10K
2
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
C2825
VSS
1uF
11
24 28 30 43
XW2800
CERM
402
SMU_CLK10M_XOUT
Y2800
28 29
10K
PULLUP AT LEVEL SHIFTER P.30
SYS_NORTH_RESET_L
28 30
28 31
5%
1/16W
MF-LF
402
R2827
R2810
5%
1/16W
MF-LF
402
100K
1
SMU_SLEEP
28 30
1%
1/16W
MF-LF
402
VOLTAGE=0V
10.0000M
2
8X4.5MM-SM
18PF
C2805
Y2800S LOAD CAPACITANCE IS 12PF

1
18PF
5%
5%
50V
50V
CERM
402
R2813
6 28 29
Keep crystal subcircuit close to SMU.
C2804
24 28 30 43
CRITICAL
2
1
28
SM
SMU_SUSPENDREQ_L
NOSTUFF
10K
6.3V
470
5%
1/16W
MF-LF
402
AVSS
75
10%
1%
1/16W
MF-LF
402
24
P4MM
2.0K
30
CERM
402

Alternate Functions
SYNC_MASTER=Q63
Tower & Server

Port
31 28
31 28
31 28
31 28
31 28
31 28
31 28
CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
I2C_SMU_CPU_SDA_IN
I2C_SMU_CPU_SCL_IN
I2C_SMU_A_SDA_IN
I2C_SMU_A_SDA_OUT_L
6.0
6.1
6.2
7.2
7.4
3.0
3.1

Port
SAT_MRESET_L
CPU_A_INSERTED_L
CPU_B_INSERTED_L
SMU_FAN_PWM8
SMU_FAN_PWM9
I2C_SMU_A_SDA
I2C_SMU_A_SCL
31 28
31 28
31 28
31 28
31 28
31 39
31 28
CPU_VID<3>
6.3
CPU_VID<4>
6.4
I2C_SMU_A_SCL_IN
I2C_SMU_A_SCL_OUT_L
3.2
3.3
8.5
10.7
SMU_FAN_RPM6
SMU_FAN_RPM7
NB_TDI
NB_TCK
NB_TMS
NB_TDO_SMU

SIZE
APPLE COMPUTER INC.
31 39
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:23 2005
REV.
28
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
AMBIENT LIGHT SENSOR CONNECTOR
RTC BATTERY
NOSTUFF
R2900
CRITICAL
J2901
F-ST-SM
5
DS2900
SOD-123
PP3V3_PWRON
I6
1
I2C_ALS_SDA
I2C_ALS_SCL
39
39
28
ALWAYS ON (TRICKLE)
CRITICAL
5%
1/16W
MF-LF
402
J2902
R2902
BB10209-A5
1K 2
PP3V3_ALL_RTC
2
1 PP3V3_ALL_BATT_SAFETY 1
PP3V3_ALL_BATT 1
2
VOLTAGE=3.3V
VOLTAGE=3.3V
VOLTAGE=3.3V
5%
1/16W
MIN_NECK_WIDTH=0.2MM B0530WXF MIN_NECK_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM TH
MF-LF
MAKE_BASE=TRUE
=PP3V3_ALL_RTC
2
3
53398-0476
402
I2C ADDR:72(1001000)
518S0328
POWER BUTTON HEADER
CRITICAL
SYS LEDS
LED2901
2
CRITICAL
J2903
3X2MM-SM
M-ST-SM
3
POWER_BUTTON_L
WHITE-500MCD
53398-0276
29 6
PP5V_PWRON
SYS_LED_DRV_K
17_INCH_LCD
R2903
56.2
1%
1/16W
MF-LF
2 402
518S0327
SYS_LED_DRV_C
SYS POWER AND RESET BUTTON

28 6
SYS_POWER_BUTTON_L
R2912
28
Q2901
SYS_RESET_BUTTON_L 1 1K
POWER_BUTTON_L 6 29
R2908
SW2901
5%
1/16W
MF-LF
2 402
SW2902
SPST
SPST
SM-LF
SM-LF
2
2
1
C2905 1 C2904
0.1UF
20%
10V
2 CERM
402
4
RESET
SMU RESET BUTTON

29 28 7 6
4.7K
DEVELOPMENT
SOT23-LF
2
RESET_BUTTON_L 6
FDV301N
SYS_LED
NOSTUFF
5%
1/16W
MF-LF
402
29 6
28
5%
1/16W
MF-LF
402
DEVELOPMENT
R2913
1K
0.1UF
20%
10V
2 CERM
402
POWER
=PP3V3_ALL_SMU
SMU_MANUAL_RESET_L
1
DEVELOPMENT
D2900
SW2900
SPST
MMBD914XXG
SOT23
SM-LF
1
R2929
30K
5%
1/16W
MF-LF
2 402
R2931
0
1
SMU_RESET_L
5%
1/16W
MF-LF
402
DRIVE STRONG HRESET AND BYPASS TO CPU
6 28
C2900
1UF
56 48 47 30 7
10%
2 6.3V
CERM
402
=PPV_EI_CPU
R2983
1
1K
CPU_HRESET_L 43
5%
1/16W
MF-LF
402
SMU DEBUG/DOWNLOAD CONNECTOR
Q2984
SAME CONNECTOR AS Q63 CPU CARD FOR SAT
2N7002DW-X-F
J2904
R2930
100
1
28 6
28 6
28 6
28 6
=PP3V3_ALL_SMU
29 28 7 6
31
F-RT-SM
14
PCB: PLACE Q2984 NEAR CPU

1
SMU_BOOT_BUSY_R
SMU_BOOT_SCLK
SMU_BOOT_RXD
SMU_BOOT_CE
R2984
FROM SMU
1K
CPU_BYPASS_L 43
5%
1/16W
MF-LF
402
4
5
NC_J2904_6
SMU_MANUAL_RESET_L
SMU_BOOT_CNVSS
6
SMU_BOOT_TXD
6
28
2N7002DW-X-F
29 6
Q2984
28
SOT-363
1%
1/16W
MF-LF
402
SMU_BOOT_BUSY
SM12B-SRSS-TB-LF
CPU_HRESET
28
CPU_BYPASS
10
SOT-363
TABLE_5_HEAD
6
6
NC_J2904_11
NC_J2904_12
11
PART#
QTY
DESCRIPTION
BOM OPTION
12

TABLE_5_ITEM
114S0081
RES, 39.2 OHM, 1%, 402, LF
R2903
20_INCH_LCD
13
NOSTUFF
1
R2923
NOSTUFF
1
R2924 R2925
10K
10K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
DIGITAL GND THROUGHOUT

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
R2930, R2931, J2904 SHOULD BE MOVED BACK TO THE DEVLOPMENT BOM POST-RAMP
SHT
NONE
REV.
051-6863
OF
29
154
SMU TO NB SUSPEND_REQ
5
MISC. SMU BUFFERS
=PP3V3_PWRON_SMU
43 30 28 7
SAME AS Q63
SAME AS (Q63).
43 30 28 7
NB SUSPEND_ACK_L LEVEL 2.5V TO 3.3V LEVEL SHIFTER

1
R3091
=PP3V3_PWRON_SMU
7 20 28 30 39
R3000
1K
7 28 30 43
1K
R3001
100
R3003
U700
PMU_SUSPEND_REQ
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
14 74LC125
9
8 30 SYS_IO_RST_L_R
NB_SUSPEND_REQ_L
28
SMU_IO_RESET_L
U700
Q3005
Q3000
2N7002DW-X-F
SMU_SUSPENDREQ_L
2N7002DW-X-F
SOT-363
28
SMU_SLEEP
125
SYS_IO_RESET_L
100
1
1
R3099
5%
1/16W
MF-LF
402
SYS_SLEEP
SYS_NORTH_RESET FROM SMU TO NB_PU_RST
11 12 13 15 16 26 30 54
LEVEL SHIFT SMU TMS TO CPU (BACKUP PLAN)
43 30 28
=PP3V3_PWRON_SMU
7
R3080
1 JTAG_CPU_TCK
SMU_JTAG_TCK_L
1K
30
5%
1/16W
MF-LF
2 402
SMU_CPU_TMS
10K
5%
1/16W
MF-LF
2 402
SYS_IO_RST_L_R
30
Q3080
NOSTUFF
SOT23-LF
LEFTOVER FROM UNUSED PRIMARY PLAN - NOT STUFFED

NOSTUFF
2N7002DW-X-F
U5640
8 SN74AUC2G125
NB_PU_RST_L 20
VSSOP
VCC
Q3005
Q3000
D
5
NOTE: WE WENT WITH BACKUP PLAN, PRIMARY REMOVED

TO AVOID STUBS
NOSTUFF
R3008
R3098
R3009
0
2
3 NOSTUFF
5%
1/16W
MF-LF
402
NOSTUFF
SYS_SLEEP
SYS_NORTH_RESET_L_R
5%
1/16W
MF-LF
402
R3084
VIH=2V
30 28 20 7
5%
1/16W
MF-LF
2 402
=PP3V3_RUN_SMU
VCC
1
2
A
B
6
7
A*/B
EN*
C3070 1
Y* 3
R3083
SMU_JTAG_TDO31
5%
1/16W
MF-LF
2 402
NC_JTAGMUX_3 9
39 30 28 20 7
R3034
20%
10V
CERM 2
402
5
U3031
1
A
34
VIH = 2.0V, 3.3V TOLERANT
JTAG_NB_TDI_R
2N7002DW-X-F
GND
JTAG_NB_TDI 9 20
SMU_JTAG_TDI
R3052
R3051
100
5%
1/16W
MF-LF
2 402
TO LEVEL SHIFTER
30
JTAG_CPU_TDO_3V3
JTAG_CPU_TDO_L
JTAG_CPU_TDO_R
STRAIGHT TO NB
31 30
SMU_JTAG_TMS
Y1
E*
47 43 9
JTAG_NB_TMS 9 20
JTAG_CPU_TDO
10K
5%
1/16W
MF-LF
402
GND
JTAG_NB_TCK_R
33
JTAG_NB_TCK 9 20
5%
1/16W
MF-LF
402
Q3050
2N3904LF
SMU_JTAG_TMS
SOT-363

100K 2

R3071
SOT23
2
31 30
SMU_CPU_NB_SEL
100K 2
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
2N7002DW-X-F
100K 2
R3070
30
Q3021
D
1
100K 2
5%
1/16W
MF-LF
402
31 30
SMU_JTAG_TCK
R3050
3.3V TOLERANT
31 30
5%
1/16W
MF-LF
2 402
1K
U3071
SMU_CPU_TMS
R3037
1
1
5%
1/16W
MF-LF
402
CRITICAL
5
Y0
34
2
=PP3V3_PWRON_SMU
VCC
SC70-6
GND
0.1UF
74LVC1G
R3033
SN74AUC2G34
SOT23-6
PULLDOWNS TO BUFFERS/LOGIC GATES

R3036
31 30
43 30 28 7
IF
KODIAK JTAG IS NOSTUFFED
LEVEL SHIFT TDO FROM CPU TO MUX
C3071 1
U3031
5
VCC
5%
1/16W
MF-LF
402
SOT-363
PCB: PLACE U3071 NEAR SMU OR NEAR KODIAK.
33
5%
1/16W
MF-LF
2 402
Q3080
10K
VCC RANGE 0.8V - 2.7V
VIH = 2.0V, 3.3V TOLERANT
R3032
SN74AUC2G34
SOT23-6
SMU_JTAG_TDI
R3035 PULLUP
5%
1/16W
MF-LF
2 402
VCC RANGE 0.8V - 2.7V
VCC
10K
0.1UF
5%
1/16W
MF-LF
402
31 30
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
PCB: PLACE R3050, Q3050, R3051 NEAR CPU. PLACE Q3021, R3052 NEAR SMU.
SHT
NONE
REV.
051-6863
D
SCALE
SMU_JTAG_NB_TCK
C3031 1
1 JTAG_CPU_TDI 9 43
SMU_JTAG_NB_TDI
20%
10V
CERM 2
402
5%
1/16W
MF-LF
2 402
SOT-363
SHARE CPU AND NB JTAG TMS WITH SMU

39 30 28 20 7
2N7002DW-X-F
2
SMU_JTAG_TDI_L
Q3081
33
4.7K
GND
20%
10V
CERM 2
402
28 20 7
39 30
R3085
JTAG_CPU_TDI_2_R
Y5
0.1UF
R3031
1K
U3070
SMU_CPU_NB_SEL
PCB: PLACE U3030 AND U3031 NEAR CPU AND KODIAK.

PCB: PLACE 33 OHM RES NEAR U3030/31 PART.
SN74LVC2G157
30 20 9
R3030,R3031,C3031,U3031,R3032,R3033 SHOULD MOVE TO DEVELOPMENT BOM POST RAMP
5%
1/16W
MF-LF
2 402
PCB: PLACE U3070 NEAR SMU
TSSOP
SMU_JTAG_TCK
7 29 30 47 48 56
CRITICAL
31 30
R3030
SMU JTAG TDI TO CPU =PPV_EI_CPU

(BACKUP PLAN)
SMU DRIVES 3.3V PUSH-PULL ON

ALL JTAG-RELATED PINS
31 30
NB JTAG IS A DEVELOPMENT ONLY FEATURE

PLACE O-OHM R3030 AND R3031 TO AVOID STUBS
SOT23-LF
=PP3V3_PWRON_SMU
JTAG_CPU_TDO_3V3
JTAG_NB_TDO
SMU_JTAG_TDI
31 30
2N7002
CONSIDER COMBINING Q3040 AND Q3006 TO A DUAL PART
SHARE CPU AND NB JTAG TDO WITH SMU
30
Q3006
SYS_2SLEEP_R
5%
1/16W
MF-LF
402
43 30 28 7
6
Y
SHARE SMU JTAG TCK WITH CPU AND NB (PRIMARY PLAN)

SHARE SMU JTAG TDI WITH CPU AND NB (PRIMARY PLAN)
SOT-363
NOSTUFF
125
2N7002DW-X-F
SOT-363
GND
54 30 26 16 15 13 12 11
SOT-363
2N7002
SOT-363
2N7002DW-X-F
Q3040
SMU_JTAG_TCK
31 30
NB_PU_RESET
D
5
9 43
SYS_NORTH_RESET_L
JTAG_CPU_TMS
SOT23
28
2N7002DW-X-F
2N3904LF
5%
1/16W
MF-LF
402
SMU_IO_RESET 67
Q3031
Q3030
33
5%
1/16W
MF-LF
402
3
3
R3020
R3040
5%
1/16W
MF-LF
402
4.7K
R3010
R3028
JTAG_SMU_TMS_2_R
SOT-363
7 28 30 43
NOSTUFF
9 43
2N7002DW-X-F
5%
1/16W
MF-LF
2 402
JTAG_CPU_TMS_2_R 2
7 20 28 30 39
R3007
5%
1/16W
MF-LF
2 402
=PP3V3_PWRON_SMU
5%
1/16W
MF-LF
2 402
4.7K
33
Q3081
D
5
10K
1K
5%
1/16W
MF-LF
2 402
JTAG_CPU_TMS_2_L
5%
1/16W
MF-LF
2 402
R3006
R3027
R3026
R3082
JTAG_CPU_TCK_2_R
4.7K
STUFF IF USING REGISTERED DIMM
5%
1/16W
MF-LF
2 402
JTAG_NB_TDO 9 20 30
=PPV_EI_CPU
=PP3V3_PWRON_SMU
R3081
5%
1/16W
MF-LF
402
SAME AS Q63
5%
1/16W
MF-LF
402
=PP3V3_RUN_SMU
1K
R3038
10K
43 30 28 7
30 28 20 7
SOT-363
NOSTUFF
=PPV_EI_CPU 7 29 30 47 48 56
1K
SMU JTAG TCK TO CPU (BACKUP PLAN)
5%
1/16W
MF-LF
402
39 30 28 20 7
SMU_SUSPENDREQ_L_R
SOT23
R3092
NOSTUFF
R3002
2N7002DW-X-F
2N3904LF
56 48 47 30 29 7
NOSTUFF
28
Q3021
Q3090
5%
1/16W
MF-LF
402
24 28 119 122
5%
1/16W
MF-LF
402
4 TSSOP
10K
R3023
14 74LC125
6 SYS_SLEEP_R 2
SOT-363
NB_SUSPEND_ACK_L
5%
1/16W
MF-LF
402
10TSSOP
100
125
20
62 20
R3022
NB_SUSPENDACK_L
R3090
U700 IS POWERED BY PP3V3_ALL
4.7K
5%
1/16W
MF-LF
2 402
4.7K
R3021
5%
1/16W
MF-LF
2 402
NB_SUSPENDACK
NB_SUSPEND_ACK_L_R
5%
1/16W
MF-LF
2 402
43 28 24
R3093
5%
1/16W
MF-LF
2 402
1K
=PP3V3_PWRON_SMU
30
OF
F
154
SMU ALIASES
PP3V3_RUN
DS3100
SOD-123
2
1
ALIASES ARE ONLY NECESSARY WHERE USE DIFFERS FROM Q63.
M23/M33 ONLY CONNECTS I2C TO KODIAK NOW; CPU HAS PULLUPS ON ITS PG.
39
39
Q63 USE OF P7.2 IS PWM FAN
SELECT BETWEEN CPU OR NB TMS AND TDO FROM/TO SMU
30
SMU_CPU_NB_SEL
NC_I2C_SMU_CPU_SCL_IN
M23/M33 DOESNT HAVE THIS FAN (P7.4)

M23/M33 USES FAN_RPM0 (P7.3), FAN_RPM1 (P7.5), FAN_RPM2 (P7.7) ONLY.
M23/M33 DOESNT NEED TO MAKE VDNAP0 DO TRIPLE-DUTY.
24
SB_VDNAP0
30
SMU_JTAG_TMS
29
CPU_HRESET
Q63 USE OF P9.1 IS TACH 8.
B
SMU USES P1.1, P1.2, P1.3, P9.5, P9.6 FOR PWRSEQ ON PG 7.
M23/M33 HAS NO SLOTS.
30
NC_SLOT_TOTAL_PWR
SMU_JTAG_TDO
R3121
MAKE_BASE=TRUE
28
28
CPU_VID<4>
1
MAKE_BASE=TRUE
28
28
R3123
0
CPU_VID<5>
28
28
28
28
28
28
CPU_VID_R<2>
50
CPU_VID_R<3>
50
CPU_VID_R<4>
50
CPU_VID_R<5>
5%
1/16W
MF-LF
402
28
5%
1/16W
MF-LF
2 402
R3124
MAKE_BASE=TRUE
SMU_FAN_TACH3
SMU_FAN_TACH4
SMU_FAN_TACH5
I2C_SMU_A_SDA_IN
I2C_SMU_A_SDA_OUT_L
I2C_SMU_A_SCL_IN
I2C_SMU_A_SCL_OUT_L
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
28
1K
R3122
5%
1/16W
MF-LF
402
CPU_VID<3>
28
5%
1/16W
MF-LF
402
NC_J3108_12 9
28
SMU_FAN_TACH9
SYS_DOOR_AJAR_L
SMU_FAN_TACH6
SMU_FAN_TACH7
R3104
5%
1/16W
MF-LF
2 402
50
50
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
R3132 1R3131 1R3130 1R3129 1R3127 1R3111

1K
13
MAKE_BASE=TRUE
1K
CPU_VID_R<1>
NC_J3108_11 9
NC_J3108_10 9
CPU_VID<2>
12
28
5%
1/16W
MF-LF
2 402
50
NC_J3108_9 9
NC_SMU_FAN_TACH3
NC_SMU_FAN_TACH4
9 NC_SMU_FAN_TACH5
28 I2C_SMU_A_SDA
28 I2C_SMU_A_SCL
30 SMU_JTAG_TDI
30 SMU_JTAG_TCK
9
MAKE_BASE=TRUE
1K
5%
1/16W
MF-LF
2 402
CPU_VID_R<0>
11
M23/M33 DOESNT HAVE FAN TACHS P2.5, P2.6, P2.7.

M23/M33 USES TACH0 (P2.2), TACH1 (P2.3), TACH2 (P2.4) ONLY.
CPU_VID<1>
1K
5%
1/16W
MF-LF
2 402
R3120
NC_J3108_8 9
28
10
28
5%
1/16W
MF-LF
402
28
NC_SMU_CPU_VID_LE0
NC_SYS_DOOR_AJAR_L
NC_SMU_CPU_VID_LE1
NC_SMU_FAN_TACH7
1
MAKE_BASE=TRUE
CPU_VID<0>
CPU_VID_LE0 FOR Q82. NOT M23/M33 FEATURE.

CONSIDER DOOR_AJAR FOR M23/M33 DIMM ACCESS DOOR?
CPU_VID_LE1 FOR Q82. NOT M23/M33 FEATURE.
M23/M33 DOESNT HAVE THIS FAN.
28
28
M23/M33 DOESNT USE P1.4. NC ON PG 7.
R3119
28
SMU USES P1.1, P1.2, P1.3, P9.5, P9.6 FOR PWRSEQ ON PG 7.
SMU_FAN_RPM3
SMU_FAN_RPM4
SMU_FAN_RPM5
SMU_SER_SEL
1K
5%
1/16W
MF-LF
2 402
1K
VID CONTROLLED BY SMU
Q63 USES SMU_SER_SEL FOR SPDIF-SMU-DEBUG. NOT M23/M33 FEATURE.

M23/M33 DOESNT USE. P1.0 NC ON PG 7.
R3114 1R3116 1R3117 1R3108 1R3109
NC_SMU_FAN_RPM3
NC_SMU_FAN_RPM4
NC_SMU_FAN_RPM5
NC_SMU_SER_SEL
B0530WXF
1
P0.0
P0.1
P0.2
P0.3
P0.4
MAKE_BASE=TRUE
P0.5
MAKE_BASE=TRUE
P0.6
MAKE_BASE=TRUE
P0.7
MAKE_BASE=TRUE
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
MAKE_BASE=TRUE
P1.7
MAKE_BASE=TRUE
P2.0
MAKE_BASE=TRUE
P2.1
MAKE_BASE=TRUE
P2.2
P2.3
P2.4
P2.5
MAKE_BASE=TRUE
P2.6
MAKE_BASE=TRUE
P2.7
MAKE_BASE=TRUE
P3.0
MAKE_BASE=TRUE
P3.1
MAKE_BASE=TRUE
P3.2
MAKE_BASE=TRUE
P3.3
MAKE_BASE=TRUE
P3.4
P3.5
P3.6
P3.7
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
P7.0
P7.1
P7.2
MAKE_BASE=TRUE
P7.3
P7.4
MAKE_BASE=TRUE
P7.5
P7.6
P7.7
P8.0
P8.1
P8.2
P8.3
MAKE_BASE=TRUE
P8.4
P8.5
MAKE_BASE=TRUE
P8.6
P8.7
P9.0
P9.1
MAKE_BASE=TRUE
P9.2
P9.3
CPU VID<0:5>
F-ST-SM
14
M23/M33 DOESNT HAVE THOSE FANS.
CPU_SENSE_I0
CPU_SENSE_V0
CPU_TEMP0
CPU_BYPASS
FAN_CNTL0_4
FAN_CNTL0_5
FAN_CNTL0_6
SMU_SCCL_SEL
CPU_SENSE_I1
CPU_SENSE_V1
CPU_TEMP1
PS1_3
PS1_4
POWERFAIL*
CPU_VID_LE0
DOOR_AJAR*
CPU_VID_LE1
FAN_TACH2_1
FAN_TACH2_2
FAN_TACH2_3
FAN_TACH2_4
FAN_TACH2_5
FAN_TACH2_6
FAN_TACH2_7
IIC_A_DAT
IIC_A_CLK
TDI
TCK
IIC_E_DAT
IIC_E_CLK
DIAG_LED
OVERTEMP*
CPU_VID[0]
CPU_VID[1]
CPU_VID[2]
CPU_VID[3]
CPU_VID[4]
CPU_VID[5]
DEBUG_RXD
DEBUG_TXD
IIC_B_DAT
IIC_B_CLK
CPU_TMS
FAN_CNTL7_3
FAN_CNTL7_4
FAN_CNTL7_5
VDNAP2
FAN_CNTL7_7
SYSTEM_LED
NB_RESET*
PME*
VDNAP0
SLEWING*
NB_TMS
POWERUP*
SLEEP
CLK_RESET*
CPU_HRESET
SMU_DOORBELL*
STOP_XTAL*
PP3V3_CPU_VID_D
Q63 NET NAME (SHARED PAGE)
BM12B-SRSS-TB
Q63 NCS THESE AS IT USES A SAT.
M23 SMU ALLOCATION
NOSTUFF
M23 NET NAME
J3108
COMMENT (ONLY IF USE DIFFERS FROM Q63)
1K
5%
1/16W
MF-LF
2 402
1K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
1K
5%
1/16W
MF-LF
2 402
1K
2.0K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
NOTE:PULL UP CPU_VID<5>TO
2.2V FOR CPU VRM10.
NOTE: SC2642 VID PINS HAVE LEAKAGE TO GND.
SO PULLUPS MUST BE 1K
I2C_SMU_CPU_SDA_IN
28
I2C_SMU_CPU_SCL_IN
28
SB_CPU_VDNAP0_OR_QREQ_OR_SPDIF
28
28
SMU_FAN_TACH8
28
PS9_5
P9.5
PS9_6
P9.6
SLOT_TOTAL_PWR
P9.7
MAKE_BASE=TRUE
P10.0
VDNAP1
IO_RESET*
P10.1
P10.2
SUSPEND_ACK*
SUSPEND_IO_ACK* P10.3
SUSPEND_REQ*
P10.4
PWR_BUTTON*
P10.5
P10.6
RST_BUTTON*
TDO
P10.7
SYS_SLOT_PWR
28
28
MAKE_BASE=TRUE

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
31
OF
F
154
1.5K
R3202
5%
1/8W
MF-LF
2 805
F0_VOLTAGE8R5
M23: ODD FAN
CRITICAL
1206A-03-LF
4
M33: ODD FAN
NTHS5443T1
5%
1/8W
MF-LF
805
Q3203
Q3201
CRITICAL
1
C3204
J3200
0.47UF
SOT-363
F0_GATESLOWDN
2N7002DW-X-F
SMU_FAN_RPM0
20%
2 25V
CERM
603
3.9K
28
C3202
0.1UF
5%
1/8W
MF-LF
805 2
R3206
F0_DRV
1.5K
5%
1/4W
MF-LF
2 1206
1.0K
NOSTUFF
R32071
R3205
FAN 0
PP12V_RUN
6
7
8
1
2
3
10%
2 16V
X7R
805
3
1
Q3201
2N7002DW-X-F
R3208
0
F0_RCFEEDBK 1
SOT-363
53261-0498
NOSTUFF
1
R3215
1.0K
PP3V3_RUN
M-RT-SM
5
NOSTUFF
D3203
SMB
FAN_0_OUT
FAN_0_PWR
5%
1/8W
MF-LF
805
R3216
0
D3202
MMBD914XXG
5%
1/8W
MF-LF
2 805
MOTOR CONTROL
TACH
GND
12V DC
B130LBT01XF
1 SOT23
20%
2 16V
ELEC
6.3X11-TH-LF
5%
1/8W
MF-LF
805
R3210
10K
C3203
120UF
518S0193
5%
1/16W
MF-LF
2 402
28
SMU_FAN_TACH0
FAN 1
PP12V_RUN
R3252
1.0K
5%
R3255
NOSTUFF
1.5K
1/8W
MF-LF
2 805
R32571
5%
1/4W
MF-LF
2 1206
F1_DRV
F1_VOLTAGE8R5
R3256
3.9K
CRITICAL
F1_GATESLOWDN
SOT-363
NTHS5443T1
CRITICAL
C3254
2 16V
X7R
805
Q3251
2N7002DW-X-F
F1_RCFEEDBK
SOT-363 MIN_LINE_WIDTH=0.5MM
NOSTUFF
R3265
1.0K
5%
1/8W
MF-LF
2 805
PP3V3_RUN
J3201
0.47UF
10%
M23: HD FAN
M33: CPU FAN
1206A-03-LF
1
2
3
SMU_FAN_RPM1
Q3253
2N7002DW-X-F
28
0.1UF
5%
1/8W
MF-LF
805
53261-0598
NOSTUFF
M-RT-SM
D3253
SMB
R3258
0
1
6
7
8
Q3251
D
2
C3252
20%
25V
2 CERM
603
5%
1/8W
MF-LF
805 2
5%
1/8W
MF-LF
805
1.5K
FAN_1_OUT
6
1
2
FAN_1_PWR
B130LBT01XF
3
D3252
MMBD914XXG
1 SOT23
R3266
0
1
5%
1/8W
MF-LF
805
C3253
4
5
2 16V
ELEC
6.3X11-TH-LF
120UF
20%
MOTOR CONTROL
TACH
GND
12V DC
518S0326
R3259
10K
5%
1/16W
MF-LF
2 402
28
SMU_FAN_TACH1
Fan 0, 1 & System Temp

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863 F
32 154
OF
FAN 2
PP12V_RUN
D
1
R3302
1.5K
5%
1/8W
MF-LF
2 805
5%
1/4W
MF-LF
2 1206
F2_VOLTAGE8R5
2N7002DW-X-F
3.9K
F2_GATESLOWDN
M23: CPU FAN

M33: HD FAN
1206A-03-LF
NTHS5443T1
Q3303
CRITICAL
SOT-363
1
10%
16V
2 X7R
805
Q3301
2N7002DW-X-F
J3300
0.47UF
C3304
SOT-363
F2_RCFEEDBK
NOSTUFF
1
R3315
PP3V3_RUN
1.0K
D3303
SMB
R3308
0
5%
1/8W
MF-LF
805
5%
1/8W
MF-LF
2 805
53398-0476
NOSTUFF
6
7
8
1
2
3
20%
25V
2 CERM
603
5%
1/8W
MF-LF
805
Q3301
D
2
C3302
0.1UF
5%
1/8W
MF-LF
805 2
R3306
SMU_FAN_RPM2
1.5K
F2_DRV
28
NOSTUFF
R33071
R3305
1.0K
FAN_2_OUT
F-ST-SM
5
FAN_2_PWR
B130LBT01XF
D3302
1
R3316
MMBD914XXG
SOT23
C3303
120UF
20%
2 16V
ELEC
6.3X11-TH-LF
5%
1/8W
MF-LF
805
R3309
10K
MOTOR CONTROL
TACH
GND
12V DC
518S0328
5%
1/16W
MF-LF
2 402
C
28
SMU_FAN_TACH2
HD TEMP SENSOR
ODD TEMP SENSOR
CRITICAL
J3301
CRITICAL
53261-0498
PP3V3_RUN
J3302
M-RT-SM
5
53261-0498
PP3V3_RUN
NOTE: BROKE SYNC ON THIS PAGE

TO ALLOW EMC CAPS ON M23 ONLY
I2C ADDR:0X92(1001001)
39
39
I2C_HD_TEMP_SDA
I2C_HD_TEMP_SCL
M-RT-SM
5
I2C ADDR:0X90(1001000)
1
2
39
39
I2C_ODD_TEMP_SDA
I2C_ODD_TEMP_SCL
3
4
6
6
518S0193
518S0193
Fan 2 & HD Temp
SYNC_MASTER=M33-HS

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
33
OF
F
154
1
PP3V3_PWRON
SMU AND NB I2C A BUS

39 7
=PP3V3_RUN_I2C
SMU I2C B BUS

=PP2V5_RUN_I2C
SB I2C BUS
7 39
PP3V3_RUN
R39031
R3902
2.0K
SMU
MASTER
D
28
31
R3953
R3969
R3958
SMU
R3959
2.0K
2.0K
2.0K
2.0K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
20
I2C_NB_A_SCL
NET_SPACING_TYPE=I2C
I2C_SMU_A_SCL
R3914
MASTER
U1300
1K
5%
1/16W
MF-LF
2 402
28
NET_SPACING_TYPE=AUDIO
28
R3954
2
15K
I2C_SMU_B_SDA
MAKE_BASE=TRUE
I2C_SMU_B_SCL
MAKE_BASE=TRUE
PINS 26, 27
PULSAR2
AUDIO
R3955
15K
NOSTUFF
5%
1/16W
MF-LF
2 402
20
NOSTUFF
5%
1/16W
MF-LF
402 2
I2C_SB_SDA
24
MAKE_BASE=TRUE
I2C_SB_SCL
24
MAKE_BASE=TRUE
PINS Y9, AB7
VDIV=2.9V
28
31
1K
MASTER
U2300
I2C_NB_A_SDA
R3915
SHASTA
KODIAK
I2C_SMU_A_SDA
2.0K
5%
1/16W
MF-LF
402 2
26
U2600
I2C_CLOCK_B_SDA
U9500 / AU300
5%
1/16W
MF-LF
402
R3904
5%
1/16W
MF-LF
402
147
147
I2C_AUDIO_SDA
I2C_AUDIO_SCL
I2C_CLOCK_B_SCL
26
I2C ADDR:0XD5
PINS 18, 19
33
5%
1/16W
MF-LF
402
Q3902
G SI2302ADSE3
SOT23-3
1
R3962
Q3902_1
ALS HEADER
=PP2V5_RUN_I2C
7 39
5%
1/16W
MF-LF
402
SMU I2C E BUS

3
PP3V3_ALL
29
R3908
29
Q3901
J2901
I2C_ALS_SDA
I2C_ALS_SCL
33
1
I2C ADDR:52
G SI2302ADSE3
2
5%
1/16W
MF-LF
402
SOT23-3
1
Q3901_1
R39071
R3906
2.0K
5%
1/16W
MF-LF
402
2.0K
5%
1/16W
MF-LF
402 2
R3963
5%
1/16W
MF-LF
2 402
NB I2C C BUS
ODD TEMP SENSOR HEADER
J3302
I2C_ODD_TEMP_SDA
R3965
2
SMU E
39 7
RTC
5%
1/16W
MF-LF
402
MASTER
U2800
28
I2C_SMU_E_SDA
I2C
28
I2C_SMU_E_SCL
I2C
I2C
I2C
PINS 34,35
I2C_RTC_SDA
I2C_RTC_SCL
=PP3V3_RUN_I2C
28
R3971 1
2.0K
2.0K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
33
R3976
1
KODIAK I2C C
5%
1/16W
MF-LF
402
39 7
R3970 1
U2801
R3964
2
=PP2V5_RUN_I2C
R3972 1
R3973 1
2.0K
2.0K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
33
5%
1/16W
MF-LF
402
I2C_ODD_TEMP_SCL
33
I2C ADDR:90
HD TEMP SENSOR HEADER
28
J3301
PINS 5, 6
I2C_HD_TEMP_SDA
33
I2C_HD_TEMP_SCL
33
R3977
20
I2C_NB_C_SDA
1
I2C_NB_C_3V3_SDA
MAKE_BASE=TRUE
GPU TEMP SENSOR
=PP1V8_PWRON_NBMEM
20
KODIAK I2C B
20
I2C_NB_C_3V3_SCL
MAKE_BASE=TRUE
SI2302ADSE3
R3978
SOT23-3
33
Q3903_G 1
R3925
5%
1/16W
MF-LF
402
2
5%
1/16W
MF-LF
402
SOT23-3
I2C_NB_B_SDA
2.0K
1
5%
1/16W
MF-LF
402 2
I2C_NB_RAM_SDA 67
Q3970_G
2
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
SOT23-3
I2C_NB_B_SCL
33
5%
1/16W
MF-LF
402
I2C_NB_TEMP_SCL
20
I2C ADDR:98
SOT23-3
1
5%
1/16W
MF-LF
402 2
SI2302ADSE3 G
2.0K
Q3971
R3938
Q3904
SI2302ADSE3
20
20
R3979
2
5%
1/16W
MF-LF
402
2.0K
93
U2080
I2C_NB_TEMP_SDA
R3937
R3936
I2C_GPU_DIODE_SCL
KODIAK TEMP SENSOR
R3974
93
I2C ADDR:9C
I2C_GPU_DIODE_SDA
DDR2 DIMMS
Q3904_G 1
2
5%
1/16W
MF-LF
402
R3931 1
Q3903
SI2302ADSE3
U9390
Q3970
R3924
2.0K
MASTER
U1900
I2C_NB_C_SCL
I2C ADDR:92
B
59 58 20 7
30 28 20 7
5%
1/16W
MF-LF
402
NB I2C B BUS
33
R3975
0
Q3971_G
I2C Connections
=PP2V5_RUN_I2C 7 39
5%
1/16W
MF-LF
402
I2C_NB_RAM_SCL 67
PINS AG04, AK03

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
39
OF
F
154
Q63 APPLICATION IS PP1V5 PWRON

56 42 41 7
=PPV_EI_NB
=PPV_EI_NB
7 41 42 56
AB07
AB10
AB12
AD02
AD05
AD08
AD11
AD13
AD17
AD21
AE15
AE19
AF07
AF10
AF13
AF17
AG11
AG15
AG19
AH02
AH05
AH08
AJ13
AJ17
AJ21
AK01
AK04
AK07
AK11
AK15
AK19
AM02
AM05
AM09
AM13
AM17
AM21
AN04
AN07
AN11
AN15
AN19
AP01
AR05
AR09
AR13
AR17
AR21
AT03
AT07
AT11
AT15
AT19
K01
K04
M02
M05
M08
P01
P04
P07
P10
P12
T02
T05
T08
T11
T13
V01
V04
V07
V10
V12
Y02
Y05
Y08
Y11
Y13
AF01
AF04
AF21
AJ08
AJ09
U1900
BGA
(7 OF 10)
PART 0
PWR/GND
KODIAK-ASIC-040812
AB04
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
VD2_0
VD2_1
VD2_2
VD2_3
VD2_4
VD2_5
VD2_6
VD2_7
VD2_8
VD2_9
VD2_10
VD2_11
VD2_12
VD2_13
VD2_14
VD2_15
VD2_16
VD2_17
VD2_18
VD2_19
VD2_20
VD2_21
VD2_22
VD2_23
VD2_24
VD2_25
VD2_26
VD2_27
VD2_28
VD2_29
VD2_30
VD2_31
VD2_32
VD2_33
VD2_34
VD2_35
VD2_36
VD2_37
VD2_38
VD2_39
VD2_40
VD2_41
VD2_42
VD2_43
VD2_44
VD2_45
VD2_46
VD2_47
VD2_48
VD2_49
VD2_50
VD2_51
VD2_52
VD2_53
VD2_54
VD2_55
VD2_56
VD2_57
VD2_58
VD2_59
VD2_60
VD2_61
VD2_62
VD2_63
VD2_64
VD2_65
VD2_66
VD2_67
VD2_68
VD2_69
VD2_70
VD2_71
VD2_72
VD2_73
VD2_74
VD2_75
VD2_76
VD2_77
VD2_78
VD2_79
VD2_80
VD2_81
XW4100
AB01
AB02
SM
NO_TEST=YES
PP_VEINB
P4MM
SM
1
PP
PP4100
C4168
C4146
C4143
C4139
C4137
C4113
C4112
C4106
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
20%
20%
20%
20%
20%
20%
20%
20%
20%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
X5R
402
C4169
X5R
402
C4147
X5R
402
X5R
402
X5R
402
C4138
X5R
402
C4114
X5R
402
C4110
X5R
402
C4107
C4122
0.22UF
C4100
0.22UF
20%
X5R
402
6.3V
X5R
402
AB05
AB08
AB11
1
AB13
0.22UF
0.22UF
20%
AD01
AD04
6.3V
0.22UF
20%
6.3V
C4145
X5R
402
X5R
402
C4170
C4149
6.3V
X5R
402
0.22UF
20%
C4140
0.22UF
20%
2
6.3V
X5R
402
0.22UF
20%
6.3V
0.22UF
20%
X5R
402
C4141
0.22UF
20%
6.3V
0.22UF
20%
6.3V
C4133
0.22UF
20%
20%
6.3V
X5R
402
X5R
402
X5R
402
C4115
C4109
C4108
C4111
6.3V
X5R
402
6.3V
X5R
402
C4144
AD07
AD10
AD12
AD16
AD20
AE14
AE18
C4148
C4142
C4155
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
20%
20%
20%
20%
20%
20%
20%
20%
20%
6.3V
X5R
402
C4171
6.3V
X5R
402
C4161
6.3V
X5R
402
6.3V
X5R
402
6.3V
X5R
402
C4150
6.3V
X5R
402
C4125
6.3V
X5R
402
C4118
6.3V
X5R
402
C4116
0.22UF
20%
6.3V
X5R
402
6.3V
X5R
402
AF08
AF11
AF15
1
AF19
0.22UF
0.22UF
20%
AG13
2
AG17
6.3V
X5R
402
C4172
6.3V
C4159
0.22UF
20%
2
X5R
402
C4162
6.3V
X5R
402
C4152
0.22UF
0.22UF
20%
20%
2
6.3V
X5R
402
0.22UF
20%
2
6.3V
0.22UF
X5R
402
C4151
0.22UF
20%
20%
2
6.3V
X5R
402
C4126
X5R
402
C4124
C4181
0.22UF
20%
6.3V
X5R
402
C4117
C4166
0.22UF
20%
6.3V
20%
6.3V
X5R
402
6.3V
X5R
402
AG21
AH04
AH07
AH09
AJ11
AJ15
AJ19
C4160
C4153
C4101
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
20%
20%
20%
20%
20%
20%
20%
20%
20%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
X5R
402
C4174
X5R
402
C4165
X5R
402
X5R
402
X5R
402
C4154
X5R
402
C4127
X5R
402
X5R
402
C4177
0.22UF
20%
X5R
402
6.3V
X5R
402
AK02
AK05
AK09
1
AK13
AK17
2
AK21
C4163
C4157
C4123
C4104
C4102
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
20%
20%
20%
20%
20%
20%
20%
20%
20%
6.3V
X5R
402
C4173
6.3V
X5R
402
C4167
6.3V
X5R
402
6.3V
X5R
402
6.3V
X5R
402
C4156
6.3V
X5R
402
C4128
6.3V
X5R
402
6.3V
X5R
402
6.3V
X5R
402
AM01
AM04
AM07
AM11
AM15
AM19
C4164
C4158
C4121
C4120
C4105
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
20%
20%
20%
20%
20%
20%
20%
20%
20%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
X5R
402
C4180
AN21
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
AP02
20%
C4179
20%
20%
20%
20%
20%
20%
20%
20%
X5R
402
X5R
402
X5R
402
C4175
X5R
402
C4136
X5R
402
C4135
X5R
402
C4134
C4103
0.22UF
20%
X5R
402
AN05
X5R
402
6.3V
X5R
402
AN09
AN13
AN17
1
AR03
6.3V
X5R
402
6.3V
X5R
402
C4178
6.3V
X5R
402
C4176
6.3V
X5R
402
6.3V
X5R
402
6.3V
X5R
402
6.3V
X5R
402
6.3V
X5R
402
C4130
C4129
0.22UF
20%
6.3V
X5R
402
6.3V
X5R
402
C4131
AR07
AR11
AR15
1
AR19
C4132
0.22UF
AT05
0.22UF
20%
AT09
AT13
20%
6.3V
X5R
402
6.3V
X5R
402
AT17
AT21
K02
K05
K08
M01
M04
M07
M10
P02
P05
P08
P11
P13
T01
T04
T07
T10
T12
V02
V05
V08
V11
V13
Y01
Y04
KODIAK EI PWR & CAPS
Y07
Y10
SYNC_MASTER=Q63
Y12

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:30 2005
REV.
41
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
D
P4MM
56 26
EI_NB_SYSCLK_P
56 26
EI_NB_SYSCLK_N
SM
PP4216
PP
P4MM
1
SM
PP4201
PP
P4MM
1
SM
P4MM
PP4202
PP
SM
1
AJ06
EI OUTPUT TO CPU A
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56 26
42 24
56 42
56
EI_NB_TO_CPU_A_CLK_P
EI_NB_TO_CPU_A_CLK_N
L04
L05
EI_NB_TO_CPU_A_AD<0>
R01
R02
T06
T03
U08
U07
R03
R04
R05
T09
R09
R10
P09
U10
P06
P03
N01
N02
N03
N04
R08
V06
M03
M06
N08
N07
N06
N05
L01
L02
L03
L09
K06
K09
L10
L08
R07
R06
L06
M09
N10
N09
L07
K03
EI_NB_TO_CPU_A_SR_P<0>
EI_NB_TO_CPU_A_SR_N<0>
V09
EI_NB_TO_CPU_A_SR_P<1>
EI_NB_TO_CPU_A_SR_N<1>
W09
W10
U09
AH10
CPU_A0_QACK_L
CPU_A1_QACK_L
AF12
AC10
NB_APSYNC
W11
NB_CPU_A0_INT_L
NB_CPU_A1_INT_L
R11
AL07
NB_A_TRIGGER_OUT
API0_BCLKIP
API0_BCLKIN
API0_ADI0
API0_ADI1
API0_ADI2
API0_ADI3
API0_ADI4
API0_ADI5
API0_ADI6
API0_ADI7
API0_ADI8
API0_ADI9
API0_ADI10
API0_ADI11
API0_ADI12
API0_ADI13
API0_ADI14
API0_ADI15
API0_ADI16
API0_ADI17
API0_ADI18
API0_ADI19
API0_ADI20
API0_ADI21
API0_ADI22
API0_ADI23
API0_ADI24
API0_ADI25
API0_ADI26
API0_ADI27
API0_ADI28
API0_ADI29
API0_ADI30
API0_ADI31
API0_ADI32
API0_ADI33
API0_ADI34
API0_ADI35
API0_ADI36
API0_ADI37
API0_ADI38
API0_ADI39
API0_ADI40
API0_ADI41
API0_ADI42
API0_ADI43
U1900
BGA
(1 OF 10)
API0_SRIP0
API0_SRIN0
API0_SRIP1
API0_SRIN1
API0_BCLKOP
API0_BCLKON
AA06
EI_CPU_A_TO_NB_CLK_P
56
AA07
EI_CPU_A_TO_NB_CLK_N
56
API0_ADO0
API0_ADO1
API0_ADO2
API0_ADO3
API0_ADO4
API0_ADO5
API0_ADO6
API0_ADO7
API0_ADO8
API0_ADO9
API0_ADO10
API0_ADO11
API0_ADO12
API0_ADO13
API0_ADO14
API0_ADO15
API0_ADO16
API0_ADO17
API0_ADO18
API0_ADO19
API0_ADO20
API0_ADO21
API0_ADO22
API0_ADO23
API0_ADO24
API0_ADO25
API0_ADO26
API0_ADO27
API0_ADO28
API0_ADO29
API0_ADO30
API0_ADO31
API0_ADO32
API0_ADO33
API0_ADO34
API0_ADO35
API0_ADO36
API0_ADO37
API0_ADO38
API0_ADO39
API0_ADO40
API0_ADO41
API0_ADO42
API0_ADO43
AE03
API0_SROP0
API0_SRON0
AC01
API0_SROP1
API0_SRON1
AE08
API_QREQ0
API_QREQ1
AA11
CPU_A0_TO_NB_QREQ_L 42 56
AF18
CPU_A1_TO_NB_QREQ_L
API_QACK0
API_QACK1
EI_CPU_A_TO_NB_AD<0>
AE04
AE02
AE01
AD06
AD03
AE05
AC04
AC03
AC05
AC06
AC07
AC08
AC02
AA04
AA05
AB06
AA03
AA02
AA01
AA08
AE06
W06
W05
W07
W08
Y03
Y06
W04
W03
W02
AB09
AC09
AA10
AA09
Y09
U02
U01
U03
U04
U05
V03
W01
U06
56
56
KODIAK DEFINES ADO

AS AN INPUT AND ADI
AS AN OUTPUT. NETS
NAMED APPROPRIATELY.
56
56
56
56
56
PLEASE FOLLOW THE NAMING CONVENTION OF BUSSES FOR DIRECTION

56
OF SIGNALS. BUSSES ARE NAMED FROM THE PERSPECTIVE OF THE CPU
56
PLEASE HAVE THE KODIAK TEAM REVIEW
56
56
56
56
56
56
56
EI_BUS SYS_CLK CONSTRAINTS MOVED TO PAGE 56 TO SUPPORT M23/M33
56
56
56
56
P4MM
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
EI_CPU_A_TO_NB_SR_P<1>
EI_CPU_A_TO_NB_SR_N<1>
AE07
PP4204
56
56
EI_CPU_A_TO_NB_SR_P<0>
EI_CPU_A_TO_NB_SR_N<0>
AB03
SM
PP
56
56
=PPV_EI_NB
1
56
IRQ0
IRQ1
API_CSTP
AD09
API_REFCLK_AVDD
AG09
R4200
1
P4MM
1
SM
PP4214
PP
=PPV_PWRON_NB_REFCLK 7 59
Q63 CONNECTS THIS TO KODIAK CORE
20%
16V
CERM
402
6.3V
CERM1
603
PP4206
KODIAK EI A
SYNC_MASTER=Q63
PP

PULL DOWN QREQS TO NB
SM
1
PP

PP4208
P4MM
I290
I291
NB_CPU_A0_INT_L
NB_CPU_A1_INT_L
NET_SPACING_TYPE
P3MM SPACING
P3MM SPACING
1
24 42
R4207
SM
PP
PP4209
56 42
PP
PP4210
42
CPU_A1_TO_NB_QREQ_L
P4MM
1
10K
PP4211
5%
1/16W
MF-LF
402

SIZE
5%
1/16W
MF-LF
402
SM
PP
R4206
SM
1
10K
CPU_A0_TO_NB_QREQ_L
P4MM
42 56
PP4207
P4MM
SM
PP
PP
1%
1/8W
MF-LF
805
SM
P4MM
PP4215
SM
4.99
P4MM
P4MM
C4201
2.2UF
10%
SM
PP
C4200
0.01UF
P4MM
PP4213
CPU_CHKSTOP_L IS SHARED BY BOTH CPUS
42
EI_REFCLK_AVDD
AG10
P4MM
SM
1%
1/16W
MF-LF
402
NB_CHKSTOP_L 56
PP
R4205
4.7K
56
API0_APSYNC
API0_SE
7 41 56
56
API_REFCLK_AGND
PP4212
PP4203
EI INPUT FROM CPU A
API_REFCLK_P
API-PROC A
56
API_REFCLK_N
KODIAK-ASIC-040812
56
PP
AJ07
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:31 2005
REV.
42
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
56 9
EI_CPU_SYSCLK_P
56 55 52 50 49 48
PCB: PLACE R4303 AND R4301 AT PROCESSOR PINS
1UF
THIS RESISTOR IS HERE TO FIX A KODIAK BUG

IN TERM-OFF MODE
R4311
1
110
1UF
T22
1%
1/16W
MF-LF
402
56 9
56 9
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56 9
56 9
56
56
56
56 8
56
EI_NB_TO_CPU_CLK_P
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<4>
EI_NB_TO_CPU_AD<5>
EI_NB_TO_CPU_AD<6>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<32>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<35>
EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<43>
H21
J21
H22
J22
C13
A13
K22
H23
J24
G20
F23
G21
D22
G24
G19
B15
A14
C15
D15
A16
C22
E20
E21
B23
B24
F21
B17
B19
C14
C17
D18
B21
D20
A22
C19
C18
A21
A23
A20
A18
A15
A17
C16
A19
L24
K24
L21
L22
EI_ADI0
EI_ADI1
EI_ADI2
EI_ADI3
EI_ADI4
EI_ADI5
EI_ADI6
EI_ADI7
EI_ADI8
EI_ADI9
EI_ADI10
EI_ADI11
EI_ADI12
EI_ADI13
EI_ADI14
EI_ADI15
EI_ADI16
EI_ADI17
EI_ADI18
EI_ADI19
EI_ADI20
EI_ADI21
EI_ADI22
EI_ADI23
EI_ADI24
EI_ADI25
EI_ADI26
EI_ADI27
EI_ADI28
EI_ADI29
EI_ADI30
EI_ADI31
EI_ADI32
EI_ADI33
EI_ADI34
EI_ADI35
EI_ADI36
EI_ADI37
EI_ADI38
EI_ADI39
EI_ADI40
EI_ADI41
EI_ADI42
EI_ADI43
V21
QACK*
R20
CHKSTOP*
EI_CPU_TBEN_CLK
CPU_APSYNCOUT
AD17
TBEN
AD14
APSYNCOUT
29
CPU_HRESET_L
V20
HRESET*
56
CPU_SRESET_L
AB4
SRESET*
47
PROC_THERM_INT_L
47
47
47
PROCID0
PROCID1
PROCID2
56 47
56
56
47
47
47
47
47
47
47
47
47
47
56
56
47
47
47
47
47
47
CRITICAL
OMIT
U4300
2.1GHZ-1.10V-45W-85C
(1 OF 3)
GPUL10S-DD3.1-CBGA
EI_SRI0
EI_SRI0*
EI_SRI1
EI_SRI1*
CPU_CHKSTOP_L
EI_CLKO
EI_CLKO*
D3
EI_ADO0
EI_ADO1
EI_ADO2
EI_ADO3
EI_ADO4
EI_ADO5
EI_ADO6
EI_ADO7
EI_ADO8
EI_ADO9
EI_ADO10
EI_ADO11
EI_ADO12
EI_ADO13
EI_ADO14
EI_ADO15
EI_ADO16
EI_ADO17
EI_ADO18
EI_ADO19
EI_ADO20
EI_ADO21
EI_ADO22
EI_ADO23
EI_ADO24
EI_ADO25
EI_ADO26
EI_ADO27
EI_ADO28
EI_ADO29
EI_ADO30
EI_ADO31
EI_ADO32
EI_ADO33
EI_ADO34
EI_ADO35
EI_ADO36
EI_ADO37
EI_ADO38
EI_ADO39
EI_ADO40
EI_ADO41
EI_ADO42
EI_ADO43
N3
EI_SRO0
EI_SRO0*
EI_SRO1
EI_SRO1*
L3
M18
LSSDMODE
LSSDSCANENABLE
LSSDSTOPC2ENABLE
LSSDSTOPC2STARENABLE
LSSDSTOPENABLE
CPU_MCP_L
56 CPU_PSRO
CPU_PSRO_ENABLE
PULSESEL0
PULSESEL1
PULSESEL2
RAMSTOPENABLE
RI_L
SYNCENABLE
N21
N19
AA12
W23
AC24
AC16
AC15
U24
AB5
U19
AD8
AD7
AD11
AD18
V23
V5
AC9
AB11
AC10
AB6
AA5
AB24
K3
L1
M3
K4
K2
H3
H1
G4
F2
F4
E2
G3
B8
D11
E12
A11
B10
C11
C1
C5
B2
D6
A5
A2
D2
D8
C12
A12
B6
B4
C4
C7
A7
C8
C6
A4
A9
C9
A10
C10
A8
A6
9 56
9 56
EI_CPU_TO_NB_AD<0>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<43>
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
10%
2 6.3V
CERM
402
L2
G1
F1
AB12
CPU_QREQ_L
INT*
AB19
CPU_INT_L
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
C4355 1 C4351 1 C4349 1 C4343 1 C4341 1 C4330 1 C4326 1 C4322 1 C4318 1 C4316
1UF
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
1UF
10%
6.3V
2 CERM
402
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
1UF
10%
6.3V
2 CERM
402
1UF
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
1UF
1UF
10%
6.3V
2 CERM
402
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
C4300 1 C4360 1 C4359 1 C4358 1 C4357 1 C4336 1 C4335 1 C4334 1 C4333 1 C4332
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
C4356 1 C4352 1 C4350 1 C4344 1 C4342 1 C4331 1 C4327 1 C4323 1 C4319 1 C4317
10%
6.3V
2 CERM
402
1UF
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
C4311 1 C4310 1 C4309 1 C4308 1 C4307 1 C4306 1 C4305 1 C4304 1 C4303 1C4302
1UF
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
56
56
9 56
9 56
43
56
PCB: MATCH APSYNC LENGTH TO SYSCLK
EI_CPU_APSYNC
56
Y21
I2C_CPU_SCL
I2C_CPU_SDA
47
47
N22
I2CGO
47
AA14
CKTERMDIS_L
47
P20
EI_DISABLE
47
BUSCFG0
BUSCFG1
BUSCFG2
47
47
47
GPUL_DBG
CPU_SPARE2
47
9 47
JTAG_CPU_TCK
JTAG_CPU_TDI
JTAG_CPU_TDO
JTAG_CPU_TMS
JTAG_CPU_TRST_L
9
9
9
9
9
T19
CPU_BYPASS_L
PLLLOCK
PLLMULT
PLLRANGE0
PLLRANGE1
PLLTEST
PLLTESTOUT
29
8 9
47
47
47
47
9 47
AA13
CPU_SPARE
47
APSYNCIN
AA10
IIC_SCL
IIC_SDA
AA20
CKTERMDIS
L19
CPU_AFN
AVPRESET_L
BIMODE_L
C1UNDGLOBAL
C2UNDGLOBAL
DI2_L
H2
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_CLK_N
THERM_INT*
M19
CPU_TRIGGER_IN
CPU_TRIGGER_OUT
E3
QREQ*
I2CGO
V22
1UF
10%
2 6.3V
CERM
402
SYSCLK
E24 EI_CLKI
D24
EI_CLKI*
CPU_QACK_L
56
R22
SYSCLK*
1UF
10%
2 6.3V
CERM
402
C4354 1 C4348 1 C4346 1 C4340 1 C4338 1 C4329 1 C4325 1 C4321 1 C4315 1 C4313
10%
2 6.3V
CERM
402
C4353 1 C4347 1 C4345 1 C4339 1 C4337 1 C4328 1 C4324 1 C4320 1 C4314 1 C4312
10%
2 6.3V
CERM
402
EI_CPU_SYSCLK_N
PG 49 & 52 HAVE MORE CAPS
=PPVCORE_CPU
REMOVED BACKUP TERMINATION

OPTIONS TO OPTIMIZE ROUTING.
56
PROCID0
PROCID1
PROCID2
EI_DISABLE
TRIGGER_IN
TRIGGER_OUT
AFN
AVPRESET*
BIMODE*
C1UNDGLOBAL
C2UNDGLOBAL
DI2*
BUSCFG0
BUSCFG1
BUSCFG2
AA19
ATTENTION
GPUL_DBG
AD12
SPARE2 JTAGMODE
LSSDMODE
LSSDSCANENABLE
LSSDSTOPC2ENABLE
LSSDSTOPENABLE
MCP*
PSRO1
PSRO2 PSRO_ENABLE
PULSESEL0
PULSESEL1
PULSESEL2
RAMSTOPENABLE
RI*
SYNCENABLE*
TCK
TDI
TDO
TMS
TRST*
BYPASS*
PLLLOCK
PLLMULT
PLLRANGE0
PLLRANGE1
PLLTEST
PLLTESTOUT
SPARE
AC19
AB16
CPU_ATTENTION
AA22
W4
UNDEFINED
AD21
AB21
AD13
AD22
W20
V24
T20
AA8
AB7
AA9
W22
56
QREQ_L AND SUSPENDREQ_L AND HACK

SAME AS Q45
30 28 7
=PP3V3_PWRON_SMU
CRITICAL
1
C4372
0.1UF
U4310
74LVC1G66DBVG4
20%
10V
CERM 2
402
30
30
30 47
30
47
43
30 28 24
CPU_QREQ_L
SMU_SUSPENDREQ_L
SOT23-5
TI
VCC
CPU_TO_NB_QREQ_L 56
GND
NOSTUFF
R4310
0
1
5%
1/16W
MF-LF
402
CPU EI AND IO

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
43
154
P4MM
SM
PLEASE FOLLOW THE NAMING CONVENTION OF BUSSES FOR DIRECTION
PP4410
PP
OF SIGNALS. BUSSES ARE NAMED FROM THE PERSPECTIVE OF THE CPU
P4MM
PLEASE HAVE THE KODIAK TEAM REVIEW
EI OUTPUT TO CPU B
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56 44
56 44
AT08
EI_NB_TO_CPU_B_AD<0>
AM12
EI_NB_TO_CPU_B_SR_P<0>
EI_NB_TO_CPU_B_SR_N<0>
AP09
EI_NB_TO_CPU_B_SR_P<1>
EI_NB_TO_CPU_B_SR_N<1>
AR02
CPU_B0_QACK_L
CPU_B1_QACK_L
AF14
NB_CPU_B0_INT_L
NB_CPU_B1_INT_L
AR08
AN12
AL12
AK12
AP11
AL11
AP12
AR12
AT12
AH12
AG12
AH13
AJ12
AG14
AM10
AL10
AN10
AP10
AR10
AT10
AK10
AJ10
AM08
AN08
AL08
AP07
AT06
AR06
AP08
AT04
AR04
AP05
AM06
AN06
AP06
AP04
AM03
AN01
AL06
AL05
AL04
AL03
AN02
AN03
AL09
AP03
AC11
N11
U11
API1_BCLKOP
API1_BCLKON
AT16
API1_ADI0
U1900
API1_ADI1
BGA
API1_ADI2
(2 OF 10)
API1_ADI3
API1_ADI4
API1_ADI5
API1_ADI6
API1_ADI7
API1_ADI8
API1_ADI9
API1_ADI10
API1_ADI11
API1_ADI12
API1_ADI13
API1_ADI14
API1_ADI15
API1_ADI16
API1_ADI17
API1_ADI18
API1_ADI19
API1_ADI20
API1_ADI21
API1_ADI22
API1_ADI23
API1_ADI24
API1_ADI25
API1_ADI26
API1_ADI27
API1_ADI28
API1_ADI29
API1_ADI30
API1_ADI31
API1_ADI32
API1_ADI33
API1_ADI34
API1_ADI35
API1_ADI36
API1_ADI37
API1_ADI38
API1_ADI39
API1_ADI40
API1_ADI41
API1_ADI42
API1_ADI43
API1_ADO0
API1_ADO1
API1_ADO2
API1_ADO3
API1_ADO4
API1_ADO5
API1_ADO6
API1_ADO7
API1_ADO8
API1_ADO9
API1_ADO10
API1_ADO11
API1_ADO12
API1_ADO13
API1_ADO14
API1_ADO15
API1_ADO16
API1_ADO17
API1_ADO18
API1_ADO19
API1_ADO20
API1_ADO21
API1_ADO22
API1_ADO23
API1_ADO24
API1_ADO25
API1_ADO26
API1_ADO27
API1_ADO28
API1_ADO29
API1_ADO30
API1_ADO31
API1_ADO32
API1_ADO33
API1_ADO34
API1_ADO35
API1_ADO36
API1_ADO37
API1_ADO38
API1_ADO39
API1_ADO40
API1_ADO41
API1_ADO42
API1_ADO43
AP20
API1_SRIP0
API1_SRIN0
API1_SROP0
API1_SRON0
AG18
API1_SRIP1
API1_SRIN1
API1_SROP1
API1_SRON1
AJ18
API_QREQ2
API_QREQ3
AF16
API1_BCLKIP
API1_BCLKIN
API-PROC B
API_QACK2
API_QACK3
EI_CPU_B_TO_NB_CLK_P
EI_CPU_B_TO_NB_CLK_N
AR16
AN20
AR20
AT20
AL19
AP19
AM20
AM18
AL18
AN18
AP18
AR18
AT18
AK18
AP17
AL17
AH20
AJ20
AK20
AH19
AG20
AL20
AM16
AN16
AL16
AK16
AP15
AL15
AP16
AM14
AL14
AN14
AP14
AR14
AT14
AK14
AP13
AL13
AG16
AH15
AJ14
AH14
AH16
AH17
EI_CPU_B_TO_NB_AD<0> 56
EI_CPU_B_TO_NB_AD<22>
56
AH11
API1_APSYNC
NB_B_TRIGGER_OUT
AK08
API1_SE
WE MAY NEED A DIFFERENT

FOR CPU_A AND CPU_B.
EI_BUS SYS_CLK CONSTRAINTS MOVED TO PAGE 56 TO SUPPORT M23/M33
P4MM
1
AH18
AF20
PP4400
PP
PP4401
SM
PP
PP
PP4402
PP4403
P4MM
SM
P4MM
I49
PP
P4MM
SM
I48
SM
P4MM
PP
56
P4MM
1
SM
PP4408
56
SM
P4MM
SM
56
P4MM
PP
56
CPU_B0_TO_NB_QREQ_L 44
CPU_B1_TO_NB_QREQ_L 44
SM
PP4407
PP4413
56
P4MM
PP
SM
PP
EI_CPU_B_TO_NB_SR_P<1>
EI_CPU_B_TO_NB_SR_N<1>
WIRE TP_NB_APSYNC TO A TEST POINT
PP4406
56
EI_CPU_B_TO_NB_SR_P<0>
EI_CPU_B_TO_NB_SR_N<0>
AJ16
IRQ2
IRQ3
TP_NB_APSYNC
56
KODIAK DEFINES ADO

AS AN INPUT AND ADI
AS AN OUTPUT. NETS
NAMED APPROPRIATELY.
1
9
PP4411
PP
EI INPUT FROM CPU B
EI_NB_TO_CPU_B_CLK_P
EI_NB_TO_CPU_B_CLK_N
KODIAK-ASIC-040812
56
SM
NB_CPU_B0_INT_L
NB_CPU_B1_INT_L
PP
PP4404
P4MM
SM
1
NET_SPACING_TYPE
P3MM SPACING
P3MM SPACING
PP
PP4405
44 56
44 56
PULL DOWN QREQS TO NB
KODIAK EI B
R4407
44
10K
CPU_B0_TO_NB_QREQ_L
R4406
44
CPU_B1_TO_NB_QREQ_L
SYNC_MASTER=Q63
10K
5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:32 2005
REV.
44
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
SELECT PROCESSOR CLOCK MULTIPLIER. PROCESSOR CLOCK(MHZ)= SYSTCLOCK * PLLMULT.

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
116S0066
RES,1K OHM,1/16W,5%,0402
R4734
EI_3TO1
116S0066
RES,1K OHM,1/16W,5%,0402
R4718
EI_2TO1
SYSCLK * 12
TABLE_5_ITEM
=PPV_EI_CPU
PULLUPS
7 29 30 47 48 56
PULLDOWNS
43 9
CPU_SPARE2
R4739
0
SYSCLK * 8
SELECT EI BUS DIVIDER. BUS DATA RATE(BPS)= (PROCESSOR CLOCK) / BUSCFG.
NOTES
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
43
C1UNDGLOBAL
NOSTUFF
43
43 9
R4777
R4743
4.7K 2
5%
1/16W
MF-LF
402
C2UNDGLOBAL
JTAG_CPU_TRST_L
5%
1/16W
MF-LF
402
R4779
R4769
4.7K 2
5%
1/16W
MF-LF
402
43
BIMODE_L
DI2_L
R4761
43
43
CKTERMDIS_L
4.7K 2
1
RI_L
5%
1/16W
MF-LF
402
43
5%
1/16W
MF-LF
402
GPUL_DBG
R4740
R4742
4.7K 2
5%
1/16W
MF-LF
402
43
PROC_THERM_INT_L
LSSDSTOPC2ENABLE
5%
1/16W
MF-LF
402
I2C_CPU_SCL
M23/M33 IS JTAG ONLY, NO I2C
JTAG_CPU_TDO
R4724,R4710,R4728
NOSTUFF
116S0066
RES,1K OHM,1/16W,5%,0402
R4724,R4710,R4712
NOSTUFF
116S0066
RES,1K OHM,1/16W,5%,0402
R4708,R4726,R4728
NOSTUFF
116S0066
RES,1K OHM,1/16W,5%,0402
R4708,R4726,R4712
NOSTUFF
116S0066
RES,1K OHM,1/16W,5%,0402
R4708,R4710,R4728
NOSTUFF
116S0066
RES,1K OHM,1/16W,5%,0402
R4708,R4710,R4712
NOSTUFF
PROC / 3
PROC / 4
PROC / 6
PROC / 8
PROC / 12
PROC / 16
TABLE_5_HEAD
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
116S0066
RES,1K OHM,1/16W,5%,0402
R4736
116S0066
RES,1K OHM,1/16W,5%,0402
R4720
43
LSSDSTOPENABLE
BYPASS MODE
NOSTUFF
SELECT PLL FREQUENCY RANGE.

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
R4751
116S0066
RES,1K OHM,1/16W,5%,0402
R4730,R4732
CPU_PLL_LOW
116S0066
RES,1K OHM,1/16W,5%,0402
R4730,R4716
CPU_PLL_HIGH
116S0066
RES,1K OHM,1/16W,5%,0402
R4714,R4732
CPU_PLL_MEDIUM
116S0066
RES,1K OHM,1/16W,5%,0402
R4714,R4716
NOSTUFF
TABLE_5_ITEM
>= 1.8 GHZ *
4.7K 2
TABLE_5_ITEM
5%
1/16W
MF-LF
402
TABLE_5_ITEM
RESERVED
R4737
43
SYNCENABLE
4.7K 2
TABLE_5_HEAD
PART#
5%
1/16W
MF-LF
402
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
116S0066
RES,1K OHM,1/16W,5%,0402
AVPRESET OFF
R4722
TABLE_5_ITEM
R4755
43
RAMSTOPENABLE
116S0066
=PPV_EI_CPU 7 29 30 47 48 56
CPU_SPARE
RES,1K OHM,1/16W,5%,0402
R4738
* STUFF THESE ON M23.
R4768
10K
4.7K 2
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
402
PROCESSOR BUS CONFIGURATION

56 48 47 30 29 7
=PPV_EI_CPU
SEE STUFFING OPTIONS ABOVE
R4781
56 43
CPU_TRIGGER_IN
4.7K 2
5%
1/16W
MF-LF
402
PULSESEL0
4.7K 2
1
43
5%
1/16W
MF-LF
402
43
43
43
R4705
PULSESEL1
43
43
4.7K 2
43
5%
1/16W
MF-LF
402
43
43
R4707
43
PULSESEL2
1 OMIT
1 OMIT
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
R4708
1K
R4703
43
AVPRESET ON
NOSTUFF
R4767
43
4.7K 2
5%
1/16W
MF-LF
402
NOSTUFF
4.7K 2
5%
1/16W
MF-LF
402
RES,1K OHM,1/16W,5%,0402
PART#
4.7K 2
R4790
43 30 9
SELECT ELASTIC MODE OR BYPASS.
5%
1/16W
MF-LF
402
4.7K 2
1
5%
1/16W
MF-LF
402
116S0066
PROC / 2
TABLE_5_ITEM
TABLE_5_ITEM
R4789
I2C_CPU_SDA
43
EI_3TO1
TABLE_5_ITEM
R4749
43
4.7K 2
5%
1/16W
MF-LF
402
EI_2TO1
R4724,R4726,R4712
TABLE_5_ITEM
4.7K 2
R4788
43
R4724,R4726,R4728
RES,1K OHM,1/16W,5%,0402
TABLE_5_ITEM
5%
1/16W
MF-LF
402
4.7K 2
5%
1/16W
MF-LF
402
4.7K 2
RES,1K OHM,1/16W,5%,0402
TABLE_5_ITEM
4.7K RESISTORS FOR MANUFACTURING-TEST-TYPE PULLUPS OR PULLDOWNS.

1K RESISTORS FOR IMPORTANT USE OR STRAPPING OPTIONS.
4.7K 2
R4787
I2CGO
43
116S0066
TABLE_5_ITEM
R4747
43
116S0066
TABLE_5_ITEM
5%
1/16W
MF-LF
402
4.7K 2
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
NOSTUFF
LSSDSCANENABLE
R4765
R4773
4.7K 2
1
43
R4739 REQUIRED TO ACCESS THE RINGS
R4741
4.7K 2
1
5%
1/16W
MF-LF
402
NOSTUFF
R4775
4.7K 2
R4735
4.7K 2
1
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
4.7K 2
5%
1/16W
MF-LF
402
NOSTUFF
4.7K 2
1
LSSDMODE
R4733
43
PLLTEST
R4763
43
4.7K 2
1
5%
1/16W
MF-LF
402
JTAG DRIVEN
ON SMU PG 30
QREQ PULLDOWNS ON Q63 SHARED PAGE
SRESET DRIVEN ON PG 56
INT DRIVEN BY KODIAK
R4745
R4731
4.7K 2
5%
1/16W
MF-LF
402
4.7K 1
5%
1/16W
MF-LF
402
4.7K 2
NOSTUFF
43
5%
1/16W
MF-LF
402
R4709
4.7K 2
BUSCFG0
BUSCFG1
BUSCFG2
PLLRANGE0
PLLRANGE1
PLLMULT
EI_DISABLE
AVPRESET_L
OMIT
R4712
1K
1 OMIT
1 OMIT
1 OMIT
1 OMIT
1 OMIT
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
2 402
R4714
1K
R4716
1K
R4718
1K
R4720
1K
R4722
1K
5%
1/16W
MF-LF
B
1 OMIT
1 OMIT
1 OMIT
1 OMIT
1 OMIT
1 OMIT
1 OMIT
1 OMIT
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
2 402
R4724
1K
5%
1/16W
MF-LF
402
R4710
1K
R4726
1K
R4728
1K
R4730
1K
R4732
1K
R4734
1K
R4736
1K
R4738
1K
5%
1/16W
MF-LF
R4702
43
PROCID0
4.7K 2
5%
1/16W
MF-LF
402
R4704
43
PROCID1
4.7K 2
5%
1/16W
MF-LF
402
R4706
43
PROCID2
4.7K 2
5%
1/16W
MF-LF
402
NOSTUFF
R4771
43 9
PLLTESTOUT
4.7K 2
CPU STRAPS
5%
1/16W
MF-LF
402

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
47
154
56 55 52 50 49 43
=PPV_EI_CPU 7 29 30 47 56
=PPVCORE_CPU
VOLTAGE=1.3V
L4801
R4832
54
PPV_RUN_AVDD_CPU
2.2
VOLTAGE=2.8V
5%
1/10W
MF-LF
603
NET_PHYSICAL_TYPE=PROC_DIFF
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_TDD
60-OHM-EMI
PPV_RUN_CPU_AVDD_R
PPV_RUN_CPU_AVDD_R_L
0805
AVDD
1
C4802
10UF
10%
6.3V
2 X5R
805
C4817 1 C4816 1 C4815

10UF
10%
6.3V
2 X5R
805
6 55
VOLTAGE=2.8V
SM
P24
CPU_DIODE_POS
10UF
10%
6.3V
2 X5R
805
10UF
10%
6.3V
2 X5R
805
C4814
10UF
10%
6.3V
2 X5R
805
A1
A24
B11
B13
B16
B20
B3
B7
C2
C20
C24
D13
D17
D19
D21
D23
D5
D7
D9
E1
E10
E14
E16
E18
E22
E4
E6
E8
F11
F13
F15
F17
F19
F3
F5
F7
F9
G10
G12
G14
G16
G18
G22
G6
G8
H11
H13
H15
H17
H19
H24
H5
H7
H9
J1
J10
J12
J14
J16
J18
J2
J20
J4
J6
J8
K11
K13
K15
K17
K19
K21
K23
K5
K7
K9
L10
L12
L14
L16
L18
L20
L4
L6
L8
M1
M11
M13
M15
M17
M21
M23
M5
M7
M9
N10
N12
N14
N16
N18
N2
N20
N24
N4
N6
N8
C4800
0.1UF
10%
16V
2 X5R
402
C4806
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
OMIT
CRITICAL
2.1GHZ-1.10V-45W-85C
(2 OF 3)
GPUL10S-DD3.1-CBGA
GND
X105
0.1UF
C4805
0.1UF
20%
10V
2 CERM
402
C4803
0.1UF
20%
10V
2 CERM
402
KPVDD2
U4300
VCORE
C4811
R2
Y1
KPVDD1
DIODEPOS
1
X105
SPARE_GND
CRITICAL
A3
B1
B12
B14
B18
B22
B5
B9
C21
C23
C3
D1
D10
D12
D14
D16
D4
E11
E13
E15
E17
E19
E23
E5
E7
E9
F10
F12
F14
F16
F18
F20
F22
F24
F6
F8
G11
G13
G15
G17
G2
G23
G5
G7
G9
H10
H12
H14
H16
H18
H20
H4
H6
H8
J11
J13
J15
J17
J19
J23
J3
J5
J7
J9
K1
K10
K12
K14
K16
K18
K20
K6
K8
L11
L13
L15
L17
L23
L5
L7
L9
M10
M12
M14
M16
M2
M20
M22
M24
M4
M6
M8
N1
N11
N13
N15
N17
N23
N5
N7
N9
P10
P12
P14
P16
P1
P11
P13
P15
P17
P19
P21
P23
P3
P5
P7
P9
R10
R12
R14
R16
R18
R4
R6
R8
T1
T11
T13
T15
T17
T21
T23
T3
T5
T7
T9
U10
U12
U14
U16
U18
U2
U20
U22
U4
U6
U8
V1
V11
V13
V15
V17
V19
V3
V7
V9
W10
W12
W14
W16
W18
W2
W24
W6
W8
Y11
Y13
Y15
Y17
Y19
Y22
Y23
Y3
Y5
Y7
Y9
AA16
AA18
AA2
AA24
AA4
AA6
AB1
AB13
AB15
AB17
AB23
AB3
AB9
AC12
AC14
AC18
AC2
AC20
AC22
AC4
AC6
AC8
AD1
AD15
AD19
AD23
AD3
AD5
AD9
C4812
0.1UF
OMIT
U4300
Z_OUT
20%
2 10V
CERM
402
P18
P2
P22
P4
P6
P8
R1
R11
R13
R15
R17
R19
R21
R23
R3
R5
R7
R9
T10
T12
T14
T16
T18
T24
T4
T6
T8
U1
U11
U13
U15
U17
U21
U23
U3
U5
U7
U9
V10
V12
V14
V16
V18
V2
V4
V6
V8
W1
W11
W13
W15
W17
W19
W21
W3
W5
W7
W9
Y10
Y12
Y14
Y16
Y18
Y2
Y20
Y24
Y4
Y6
Y8
AA11
AA15
AA17
AA21
AA23
AA3
AA7
AB10
AB14
AB18
AB2
AB20
AB22
AB8
AC1
AC11
AC13
AC17
AC21
AC23
AC3
AC5
AC7
AD10
AD16
AD2
AD20
AD24
AD4
AD6
2.1GHZ-1.10V-45W-85C
(3 OF 3)
Z_SENSE
GPUL10S-DD3.1-CBGA
VCORE
X100
GND
X99
C4813
20%
10V
2 CERM
402
20%
2 10V
CERM
402
C4827
20%
10V
2 CERM
402
C4820
C4804
0.1UF
20%
2 10V
CERM
402
C4808
0.1UF
C4818
0.1UF
20%
2 10V
CERM
402
C4821
0.1UF
0.1UF
20%
2 10V
CERM
402
0.1UF
C4819
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C4828
0.1UF
20%
10V
2 CERM
402
20%
2 10V
CERM
402
0.1UF
C4810
0.1UF
0.1UF
C4807
20%
2 10V
CERM
402
20%
10V
2 CERM
402
C4826
0.1UF
20%
2 10V
CERM
402
0.1UF
C4809
C4824
0.1UF
20%
2 10V
CERM
402
C4822
0.1UF
20%
10V
2 CERM
402
C
1
C4829
0.1UF
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
C4836
0.1UF
20%
2 10V
CERM
402
C4837
0.1UF
20%
2 10V
CERM
402
C4834
0.1UF
20%
10V
2 CERM
402
0.1UF
C4832
0.1UF
C4835
0.1UF
C4830
20%
10V
2 CERM
402
20%
2 10V
CERM
402
C4845
20%
10V
2 CERM
402
0.1UF
C4823
0.1UF
0.1UF
0.1UF
C4831
20%
10V
2 CERM
402
C4838
20%
10V
2 CERM
402
20%
2 10V
CERM
402
20%
10V
2 CERM
402
C4825
C4833
0.1UF
20%
2 10V
CERM
402
C4841
0.1UF
20%
10V
2 CERM
402
C4839
0.1UF
20%
10V
2 CERM
402
DIODENEG
AGND
KPGND1
R24
AA1
KPGND2
1
T2
NOSTUFF
20%
2 10V
CERM
402
R4810
GND_CPU_AVDD
100K 2
1
2 OMIT
5%
1/10W
MF-LF
603
XW4800
SM
KPVDD2 6 50 55
DIFFERENTIAL_PAIR=P_KP2
55 6
CPU_DIODE_NEG
DIFFERENTIAL_PAIR=P_TDD
C4847
20%
10V
2 CERM
402
KPGND2 6 50 55
C4842
0.1UF
20%
2 10V
CERM
402
0.1UF
REMEMBER TO CHANGE KPVDD TO NO_TEST ON PG 6.

PCB:PUT R4810 AS CLOSE TO RESPECTIVE PINS AS POSSIBLE.
C4846
0.1UF
PROCESSOR KELVIN POINT PROBE POINT
20%
10V
2 CERM
402
0.1UF
20%
2 10V
CERM
402
C4844
0.1UF
C4840
C4843
0.1UF
20%
10V
2 CERM
402
DIFFERENTIAL_PAIR=P_KP2
CPU POWER AND BYPASS

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
48
154
D
56 55 52 50 48 43
=PPVCORE_CPU
C4922
1UF
10%
6.3V
2 CERM
402
C4993
1UF
10%
6.3V
2 CERM
402
1UF
10%
2 6.3V
CERM
402
C4994
1UF
10%
6.3V
2 CERM
402
C4995
C4996
1UF
10%
6.3V
2 CERM
402
C4997
10%
2 6.3V
CERM
402
C4998
1UF
10%
6.3V
2 CERM
402
C4999
10%
6.3V
2 CERM
402
C4902
1UF
10%
6.3V
2 CERM
402
C4903
1UF
10%
2 6.3V
CERM
402
C4971
10%
2 6.3V
CERM
402
C4970
1UF
10%
6.3V
2 CERM
402
C4982
C4981
1UF
10%
6.3V
2 CERM
402
C4984
C4983
1UF
10%
6.3V
2 CERM
402
C4992
1UF
10%
2 6.3V
CERM
402
C4961
10%
2 6.3V
CERM
402
C4964
1UF
10%
2 6.3V
CERM
402
C4966
10%
6.3V
2 CERM
402
C4976
1UF
10%
2 6.3V
CERM
402
C4977
C4979
1UF
C4980
C4975
10%
6.3V
2 CERM
402
C4991
1UF
C4990
1UF
10%
2 6.3V
CERM
402
C4935
10%
2 6.3V
CERM
402
C4936
1UF
10%
6.3V
2 CERM
402
C4939
10%
6.3V
2 CERM
402
C4940
1UF
10%
6.3V
2 CERM
402
C4952
10%
2 6.3V
CERM
402
C4953
1UF
10%
6.3V
2 CERM
402
C4957
10%
6.3V
2 CERM
402
C4958
1UF
10%
6.3V
2 CERM
402
C4988
1UF
10%
2 6.3V
CERM
402
C4937
10%
2 6.3V
CERM
402
C4938
1UF
10%
6.3V
2 CERM
402
C4950
C4951
1UF
10%
6.3V
2 CERM
402
C4954
C4955
1UF
10%
6.3V
2 CERM
402
C4987
1UF
10%
2 6.3V
CERM
402
C4926
10%
2 6.3V
CERM
402
C4927
1UF
10%
2 6.3V
CERM
402
C4931
10%
6.3V
2 CERM
402
C4943
1UF
10%
2 6.3V
CERM
402
C4944
C4948
1UF
C4946
C4949
C4947
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
C4986
1UF
10%
2 6.3V
CERM
402
C4985
1UF
10%
2 6.3V
CERM
402
C4945
10%
2 6.3V
CERM
402
C4956
1UF
10%
6.3V
2 CERM
402
C4989
1UF
C4901
1UF
10%
6.3V
2 CERM
402
C4906
1UF
C4907
1UF
10%
6.3V
2 CERM
402
C4910
1UF
C4911
1UF
10%
6.3V
2 CERM
402
C4914
1UF
10%
2 6.3V
CERM
402
C4967
1UF
10%
2 6.3V
CERM
402
C4978
1UF
10%
6.3V
2 CERM
402
C4904
1UF
10%
2 6.3V
CERM
402
C4905
1UF
10%
6.3V
2 CERM
402
1UF
10%
2 6.3V
CERM
402
C4934
10%
6.3V
2 CERM
402
1UF
10%
2 6.3V
CERM
402
C4923
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
C4900
10%
6.3V
2 CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
C4942
10%
6.3V
2 CERM
402
10%
2 6.3V
CERM
402
10%
6.3V
2 CERM
402
1UF
1UF
10%
6.3V
2 CERM
402
C4941
10%
2 6.3V
CERM
402
1UF
C4929
C4912
1UF
1UF
1UF
10%
6.3V
2 CERM
402
C4928
10%
2 6.3V
CERM
402
1UF
C4925
10%
6.3V
2 CERM
402
C4930
1UF
1UF
10%
6.3V
2 CERM
402
C4924
10%
2 6.3V
CERM
402
1UF
C4915
10%
6.3V
2 CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
6.3V
2 CERM
402
1UF
10%
2 6.3V
CERM
402
C4916
1UF
1UF
1UF
10%
2 6.3V
CERM
402
C4933
1UF
1UF
10%
2 6.3V
CERM
402
C4932
1UF
1UF
10%
2 6.3V
CERM
402
C4917
1UF
1UF
1UF
1UF
10%
6.3V
2 CERM
402
10%
2 6.3V
CERM
402
C4974
10%
2 6.3V
CERM
402
1UF
C4973
10%
6.3V
2 CERM
402
10%
2 6.3V
CERM
402
10%
6.3V
2 CERM
402
1UF
1UF
10%
6.3V
2 CERM
402
C4972
10%
2 6.3V
CERM
402
1UF
C4963
C4918
1UF
1UF
1UF
10%
6.3V
2 CERM
402
C4962
10%
2 6.3V
CERM
402
1UF
C4960
10%
6.3V
2 CERM
402
C4965
1UF
1UF
10%
6.3V
2 CERM
402
C4959
10%
2 6.3V
CERM
402
1UF
C4919
10%
6.3V
2 CERM
402
1UF
1UF
10%
2 6.3V
CERM
402
1UF
10%
6.3V
2 CERM
402
1UF
10%
2 6.3V
CERM
402
C4920
1UF
1UF
1UF
10%
2 6.3V
CERM
402
C4969
1UF
1UF
10%
2 6.3V
CERM
402
C4968
1UF
1UF
10%
2 6.3V
CERM
402
C4921
C4908
1UF
10%
2 6.3V
CERM
402
C4909
1UF
10%
6.3V
2 CERM
402
C4913
1UF
10%
2 6.3V
CERM
402
PROC DECOUPLING

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
49
OF
F
154
7
55 7
VCORE SUPPLY PHASE 1 (GD1)

C5010
=PP12V_CPU
1
R5029
VCORE VOLTAGE CONTROLLER (VC)
10
50
50
1UF
6 7 12 28 85
R5000
VRM_EN
Q5012
D
SOT23-LF
G
50 6
1.5K 2
5%
1/16W
MF-LF
402
2N7002
1
C5001
1UF
10%
6.3V
2 CERM
402
50 31
50 31
50 31
50 31
50 31
50 31
VC_BGOUT
50
VC_OSCREF
OUTSEN
CRITICAL
U5000
12 VID0
11 VID1
10 VID2
VC_OUTSEN
19
VC_OUT1
VC_OUT2
OUT1 17
OUT2 18
PGOOD 14
5
4
VC_ERROUT
1UF
SYS_SLEWING_L
20K
GSENSE
16
C5002
470PF
10%
50V
2 CERM
402
1%
1/16W
MF-LF
2 402
R5010
SOT23-LF
50
GD1_VPN
NOSTUFF
200
R5002
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
C5013
1UF
20%
16V
2 CERM
1206
50
R5016
20.5K
1%
1/16W
MF-LF
2 402
NOSTUFF
10%
16V
CERM
402
VCORE_SENSE_GND
20.5K
1%
1/16W
MF-LF
2 402
0.01UF
10%
16V
2 CERM
402
1%
1/16W
MF-LF
2 402
VC_OUTSEN
GD2_BST_R
GD2_DRN
4.99K2
VC_VCC
50
VC_OS_HUB
C5008
1
261
1K
R5006
1
1
20%
16V
2 CERM
1206
NOSTUFF
2
1
50
TG 2
3 BST
VPN 5
R5022
200
20%
2 16V
CERM
1206
50
CHOICE OF:
1) VCORE PLANE SENSING
2) KELVIN POINT SENSING
PPVCORE_CPU
R5036
0
KPVDD2
=PPVCORE_CPU 43 48 49 50 52 55 56
MIN_LINE_WIDTH
CPU SENSE SIDE
KPGND2
R5042
1
5%
1/16W
MF-LF
402
MIN_LINE_WIDTH
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.60
0.25
MM
MM
MM
MM
MM
MM
MM
MM
MM
VCORE_SENSE_VOUT 50
50
50 6
50
VCORE_SENSE_GND
50
50
50
NOSTUFF
50
R5041
0
1
NOSTUFF
50 31
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
50
50
50
50
5%
1/16W
MF-LF
402
50 6
50
50
50
50
MIN_NECK_WIDTH
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
MM
MM
MM
MM
MM
MM
MM
MM
MM
MIN_LINE_WIDTH
I432
50
I433
50
I434
50
I436
50
I435
50
I438
50
I437
50
I439
50
I440
50
TO-252AA
50
C5024
C5025
GD2_FET_RC
20%
2 6.3V
ELEC
TH-KZJ-LF
1 CRITICAL
330UF
IRLR7843PBF
1800UF
20%
2 6.3V
ELEC
TH-KZJ-LF
C5041
CRITICAL
TO-252AA
C5040
1500UF
20%
2 6.3V
ELEC
TH-MCZ
C5026
C5042
330UF
20%
20%
2 2.5V-ESR9V 2 2.5V-ESR9V
POLY
POLY
CASE-D2E-LF
CASE-D2E-LF
3300PF
0.0022UF
10%
2 50V
CERM
402
6 50
5%
1/4W
MF-LF
2 1206
C5033
10%
50V
CERM
603
NEED TO CHANGE TO 10MOHM CAPS - 8 PCS
GD2_PN
PCB:CONNECT BETWEEN THE INDUCTOR & BULK CAPS.
R5035
UNDER PROCESSOR
50
VC_OUTSEN_R
50
50
50 6
1%
1/16W
MF-LF
402
1.0
CRITICAL
IRLR7843PBF
Q5023
10%
2 50V
CERM
402
50
R5021
PHYSICAL CONSTRAINTS
OMIT
XW5002
SM
GD2_BG1
1800UF
Q5021
50
PPVCORE_CPU
2
SM
C5028
470PF
10% 16V
X7R 402
VC_AUX2
1
GD2_PN
5%
1/16W
MF-LF
2 402
C5023
50
1 CRITICAL
0.015UF
VC PROCESSOR VOLTAGE SENSING
GD2_VPN
0.36UH-30A-0.80MOHM
5%
1/16W
MF-LF
402
GD2_VREG
C5009
1.5K 2
1
5%
1/16W
MF-LF
2 402
330
PCB:PLACE R5025 CLOSE TO INDUCTOR OUTPUT LEAD.

NOSTUFF
L5020
10K
SOT23-LF
R5024
TO-252AA
CRITICAL
R5051
50
VC_OS_HUB_RC
CRITICAL
IRLR7821PBF
R5020
1UF
R5027
GD2_TG
5%
1/16W
MF-LF
2 402
50
50
THMPAD
50
1210
Q5020
D5020
BAS16-75V-0.25A
NOSTUFF
2 CERM
BG 8
VREG 7
GD2_BST
10%
16V
20%
16V
ELEC
TH-KZJ-LF
1%
1/16W
MF-LF
402
4.7
10UF
1000UF
2
1 DRN
5%
1/10W
MF-LF
603
1UF
R5026
301
C5030
5%
1/16W
MF-LF
402
50
NEED TO CHANGE TO 10MOHM CAPS - 8 PCS
C5022
C5021
D
4 CO
R5025
50
10%
50V
CERM
603
SC1211
VC_OUT2
1%
1/16W
MF-LF
402
0.33UF
50
3300PF
PP12V_CPU_R_L
U5020
PP12V_CPU_R_L
50
NOSTUFF
GD1_DRN
GD1_BST
GD1_VREG
GD1_VPN
GD1_TG
GD1_BG
GD1_FET_RC
GD1_PN
GD1_BST_R
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
C5016
20%
16V
CERM
1206
50
R5004
50
C5038
330UF
TO-252AA
1500UF
C
55 50
1UF
50
55 50
AVP ADJUSTMENT
50
C5015
CRITICAL
10%
6.3V
CERM-X5R
402
IRLR7843PBF
C5032
GD1_PN
VCORE SUPPLY PHASE 2 (GD2)

C5020
50
50
1%
1/16W
MF-LF
402
55 48 6
GD1_FET_RC
CRITICAL
Q5013
10%
2 50V
CERM
402
470PF
VCORE_SENSE_VOUT 50
R5005
55 48 6
50
C5014
6 VIN SOIC-LF
50 6
TO-252AA
330UF
10%
50V
2 CERM
402
C5005 R5015
20.5K
0.01UF
50
IRLR7843PBF
4
3
1%
1/16W
MF-LF
2 402
5%
1/4W
MF-LF
2 1206
CRITICAL
C5017
20%
20%
20%
2 2.5V-ESR9V 2 2.5V-ESR9V 2 6.3V
POLY
POLY
ELEC
CASE-D2E-LF
CASE-D2E-LF
TH-MCZ
1.0
G
330UF
R5011
0.0022UF
DIFFERENTIAL PAIR
FOR REMOTE SENSE
NOSTUFF
20.5K
C5018
6 50
MAKE_BASE=TRUE
1 CRITICAL
VC_AUX1
XW5000
SM
R5013
R5014
GD1_BG 1
PPVCORE_CPU
VC_AUX2 50
C5004
Q5011
OMIT
50
GD1_PN
50
VC_AGND 6 50
0.36UH-30A-0.80MOHM
SM
D
50
L5010
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
402
GD1_VREG
50
VC_AUX1 50
10K
D5010
BAS16-75V-0.25A
43 48 49 50 52 55
56
CRITICAL
R5050
50
=PPVCORE_CPU
TO-252AA
VPN 5
THMPAD
VC_ERROUT_RC
1
3 BST
GD1_BST
VC_VCC
CRITICAL
IRLR7821PBF
GD1_TG
50
1210
Q5010
50
R5012
5%
1/16W
MF-LF
2 402
50
5%
1/10W
MF-LF
603
10%
16V
2 CERM
TG 2
5%
1/10W
MF-LF
603
R5001
FB
20%
2 16V
CERM
1206
24 26 28
5%
1/16W
MF-LF
402
2.7M 2
221K
0.1UF
C5012
10UF
20%
2 16V
ELEC
SM-LF
BG 8
VREG 7
1 DRN
C5029 R5007
4.7
R5003
R5028
20%
2 10V
CERM
402
PGOOD IS OC
NOSTUFF
50
C5000
R5030
50
ERROUT 3
AGND
1
4 CO
C5035
330UF
20%
2 16V
ELEC
SM-LF
VC_OUT1
1
TSSOP
1 OS1
20 OS2
VC_OS1
VC_OS2
50
50
VC_PGOOD
6 DACSTEP
VC_DACSTEP
50
SC2642
9 VID3
8 VID4
13 VID5
VC_AGND
50
SC1211
C5011
330UF
U5010
PP12V_CPU_R_L
6 VIN SOIC-LF
BGOUT
15 OSCREF
CPU_VID_R<0>
CPU_VID_R<1>
CPU_VID_R<2>
CPU_VID_R<3>
CPU_VID_R<4>
CPU_VID_R<5>
50
CRITICAL
1
VCC
50
50
50 6
55 50
20%
2 16V
CERM
1206
VC_AGND
PP12V_CPU_R_L
CRITICAL
C5019
20%
16V
CERM
1206
GD1_DRN
SYS_POWERUP_L
GD1_BST_R
VC_VCC 50
1
55 50
1UF
5%
1/16W
MF-LF
2 402
M23/M33: PP12V_CPU IS AN ALL RAIL
GD2_DRN
GD2_BST
GD2_VREG
GD2_VPN
GD2_TG
GD2_BG
GD2_FET_RC
GD2_PN
GD2_BST_R
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.60
0.25
MM
MM
MM
MM
MM
MM
MM
MM
MM
MIN_NECK_WIDTH
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
MM
MM
MM
MM
MM
MM
MM
MM
MM
50
I400
50
I401
50
I402
50
I404
50
VC_OSCREF
CPU_VID_R<0..5>
VC_DACSTEP
VC_AGND
VC_BGOUT
VC_OS1
VC_OS2
VC_VCC
VC_OS_HUB
VC_OUTSEN
VC_OUTSEN_R
VCORE_SENSE_GND
VCORE_SENSE_VOUT
VC_AUX1
VC_AUX2
VC_OUT1
VC_OUT2
VC_ERROUT
VC_ERROUT_RC
VC_OS_HUB_RC
0.25
0.25
0.25
0.50
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.45
0.45
0.25
0.25
0.25
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MIN_NECK_WIDTH
0.20
0.20
0.20
0.20
0.20
0.20
0.20
0.25
0.20
0.20
0.20
0.20
0.20
0.25
0.25
0.25
0.25
0.20
0.20
0.20
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
I375
I377
I376
I378
I380
I379
I382
I381
I383
I384
CPU VCORE VREG
I385
I386
SYNC_MASTER=M33-HS
I387
I388
I392

I391
I390
I389
I393
I397
I403
SIZE
I406
I405
APPLE COMPUTER INC.
I407
SHT
NONE
REV.
051-6863
SCALE
I408
DRAWING NUMBER
50
OF
F
154
D
56 55 50 49 48 43
=PPVCORE_CPU
CRITICAL
1
C5200
10UF
10%
6.3V
2 X5R
805
C5213
10UF
10%
2 6.3V
X5R
805
C5224
10UF
10%
6.3V
2 X5R
805
C5235
10UF
10%
2 6.3V
X5R
805
C5246
10UF
10%
6.3V
2 X5R
805
C5257
10UF
10%
2 6.3V
X5R
805
C5268
10UF
10%
6.3V
2 X5R
805
C5279
10UF
10%
2 6.3V
X5R
805
C5290
10UF
10%
6.3V
2 X5R
805
C5212
10UF
10%
6.3V
2 X5R
805
C5211
10UF
10%
2 6.3V
X5R
805
C5222
10UF
10%
6.3V
2 X5R
805
C5233
10UF
10%
2 6.3V
X5R
805
C5244
10UF
10%
6.3V
2 X5R
805
C5255
10UF
10%
2 6.3V
X5R
805
C5266
10UF
10%
6.3V
2 X5R
805
C5277
10UF
10%
2 6.3V
X5R
805
C5288
10UF
10%
6.3V
2 X5R
805
C5223
10UF
10%
6.3V
2 X5R
805
C5210
10UF
10%
2 6.3V
X5R
805
C5221
10UF
10%
6.3V
2 X5R
805
C5232
10UF
10%
2 6.3V
X5R
805
C5243
10UF
10%
6.3V
2 X5R
805
C5254
10UF
10%
2 6.3V
X5R
805
C5265
10UF
10%
6.3V
2 X5R
805
C5276
10UF
10%
2 6.3V
X5R
805
C5287
10UF
10%
6.3V
2 X5R
805
C5234
10UF
10%
6.3V
2 X5R
805
C5209
10UF
10%
2 6.3V
X5R
805
C5220
10UF
10%
6.3V
2 X5R
805
C5231
10UF
10%
2 6.3V
X5R
805
C5242
10UF
10%
6.3V
2 X5R
805
C5253
10UF
10%
2 6.3V
X5R
805
C5264
10UF
10%
6.3V
2 X5R
805
C5275
10UF
10%
2 6.3V
X5R
805
C5286
10UF
10%
6.3V
2 X5R
805
C5245
10UF
10%
6.3V
2 X5R
805
C5208
10UF
10%
2 6.3V
X5R
805
C5219
10UF
10%
6.3V
2 X5R
805
C5230
10UF
10%
2 6.3V
X5R
805
C5241
10UF
10%
6.3V
2 X5R
805
C5252
10UF
10%
2 6.3V
X5R
805
C5263
10UF
10%
6.3V
2 X5R
805
C5274
10UF
10%
2 6.3V
X5R
805
C5285
10UF
10%
6.3V
2 X5R
805
C5201
10UF
10%
6.3V
2 X5R
805
C5207
10UF
10%
2 6.3V
X5R
805
C5218
10UF
10%
6.3V
2 X5R
805
C5229
10UF
10%
2 6.3V
X5R
805
C5240
10UF
10%
6.3V
2 X5R
805
C5251
10UF
10%
2 6.3V
X5R
805
C5262
10UF
10%
6.3V
2 X5R
805
C5273
10UF
10%
2 6.3V
X5R
805
C5284
10UF
10%
6.3V
2 X5R
805
C5289
10UF
10%
6.3V
2 X5R
805
C5206
10UF
10%
2 6.3V
X5R
805
C5217
10UF
10%
6.3V
2 X5R
805
C5228
10UF
10%
2 6.3V
X5R
805
C5239
10UF
10%
6.3V
2 X5R
805
C5250
10UF
10%
2 6.3V
X5R
805
C5261
10UF
10%
6.3V
2 X5R
805
C5272
10UF
10%
2 6.3V
X5R
805
C5283
10UF
10%
6.3V
2 X5R
805
C5278
10UF
10%
6.3V
2 X5R
805
C5205
C5216
10%
6.3V
2 X5R
805
C5227
C5238
10%
6.3V
2 X5R
805
C5249
10UF
C5226
C5237
10%
6.3V
2 X5R
805
C5248
10UF
C5259
10UF
10UF
10%
6.3V
2 X5R
805
C5225
C5236
10UF
C5247
C5258
10UF
10%
6.3V
2 X5R
805
C5270
C5269
10UF
10%
2 6.3V
X5R
805
C5282
10UF
10UF
10%
2 6.3V
X5R
805
10UF
10%
2 6.3V
X5R
805
10%
6.3V
2 X5R
805
C5271
C5214
10%
6.3V
2 X5R
805
10UF
10UF
10UF
10%
2 6.3V
X5R
805
C5260
C5203
10%
2 6.3V
X5R
805
10UF
10%
6.3V
2 X5R
805
10%
6.3V
2 X5R
805
10%
2 6.3V
X5R
805
C5215
10UF
10UF
10UF
10%
2 6.3V
X5R
805
10UF
C5256
10%
2 6.3V
X5R
805
10UF
10%
2 6.3V
X5R
805
C5204
10%
6.3V
2 X5R
805
10UF
10%
6.3V
2 X5R
805
10%
2 6.3V
X5R
805
10UF
10UF
10UF
10%
2 6.3V
X5R
805
C5267
10%
6.3V
2 X5R
805
10UF
10%
2 6.3V
X5R
805
C5281
10UF
10%
6.3V
2 X5R
805
C5280
10UF
10%
6.3V
2 X5R
805
B
1
C5202
10UF
10%
2 6.3V
X5R
805
C5299
10UF
10%
2 6.3V
X5R
805
C5298
10UF
10%
2 6.3V
X5R
805
C5297
10UF
10%
2 6.3V
X5R
805
C5296
10UF
10%
2 6.3V
X5R
805
C5295
10UF
10%
2 6.3V
X5R
805
C5294
10UF
10%
2 6.3V
X5R
805
C5293
10UF
10%
2 6.3V
X5R
805
C5292
10UF
C5291
10UF
10%
2 6.3V
X5R
805
10%
2 6.3V
X5R
805
CPU VCORE MORE BYPASS

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
52
OF
F
154
PROCESSOR AVDD VREG
CRITICAL
U5470
55 7
MM1572JN
=PP3V3_RUN_CPU
PPV_RUN_AVDD_CPU
SOT-25A-LF
D
1
C5470 1R5470
1UF
VIN
VOUT
CONT NOISE
10K
10%
6.3V
2 CERM
402
GND
5%
1/16W
MF-LF
2 402
55
48
VOLTAGE=2.8V
MAKE_BASE=TRUE
55
AVDDVC_NOISE
C5471
0.01UF
20%
16V
CERM 2
402
C5472
10UF
10%
2 6.3V
X5R
805
AVDDVB_CONT
3
Q5470
2N7002
30 26 16 15 13 12
11 SYS_SLEEP
SOT23-LF
ZH5400
HOLE-VIA
ZH5401
HOLE-VIA
1
HOLE-VIA
1
HOLE-VIA
ZH5420
HOLE-VIA
1
ZH5403
HOLE-VIA
1
ZH5421
HOLE-VIA
1
ZH5404
HOLE-VIA
1
ZH5422
HOLE-VIA
1
ZH5405
HOLE-VIA
1
ZH5423
HOLE-VIA
1
ZH5406
HOLE-VIA
1
ZH5424
HOLE-VIA
1
ZH5407
HOLE-VIA
1
ZH5425
HOLE-VIA
1
ZH5408
HOLE-VIA
1
ZH5426
HOLE-VIA
1
ZH5409
HOLE-VIA
1
ZH5427
HOLE-VIA
1
ZH5410
HOLE-VIA
1
ZH5428
HOLE-VIA
1
ZH5411
HOLE-VIA
ZH5419
1
ZH5402
ZH5418
HOLE-VIA
ZH5429
HOLE-VIA
1
ZH5412
HOLE-VIA
1
ZH5430
HOLE-VIA
1
ZH5413
HOLE-VIA
1
ZH5431
HOLE-VIA
1
ZH5414
HOLE-VIA
1
ZH5432
HOLE-VIA
1
ZH5415
HOLE-VIA
1
ZH5433
HOLE-VIA
1
ZH5416
HOLE-VIA
1
ZH5434
HOLE-VIA
1
ZH5417
HOLE-VIA
1
ZH5435
HOLE-VIA
1
ZH5436
HOLE-VIA
1
ZH5454
HOLE-VIA
1
ZH5437
HOLE-VIA
1
ZH5455
HOLE-VIA
1
ZH5438
HOLE-VIA
1
ZH5456
HOLE-VIA
1
ZH5439
HOLE-VIA
1
ZH5457
HOLE-VIA
1
ZH5440
HOLE-VIA
1
ZH5458
HOLE-VIA
1
ZH5441
HOLE-VIA
1
ZH5459
HOLE-VIA
1
ZH5442
HOLE-VIA
1
ZH5460
HOLE-VIA
1
ZH5443
HOLE-VIA
1
ZH5461
HOLE-VIA
1
ZH5444
HOLE-VIA
1
ZH5462
HOLE-VIA
1
ZH5445
HOLE-VIA
1
ZH5463
HOLE-VIA
1
ZH5446
HOLE-VIA
1
ZH5464
HOLE-VIA
1
ZH5447
HOLE-VIA
1
ZH5465
HOLE-VIA
ZH5448
HOLE-VIA
1
ZH5466
HOLE-VIA
1
ZH5449
HOLE-VIA
1
ZH5467
HOLE-VIA
1
ZH5450
HOLE-VIA
1
ZH5468
HOLE-VIA
1
ZH5451
HOLE-VIA
1
ZH5469
HOLE-VIA
1
ZH5452
HOLE-VIA
1
ZH5470
HOLE-VIA
1
ZH5453
HOLE-VIA
1
ZH5471
HOLE-VIA
1
CPU AVDD VREG

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
54
OF
F
154
PROCESSOR TEMP SENSE (TDIODE EXCITATION CIRCUIT AND OPAMP)
PROCESSOR VCORE VOLTAGE SENSE
R5560
55
PP3V3_CPU_DIODE
PP3V3_OPAMP
OMIT
R5540
55
VOLTAGE=3.3V
2.2UF
56 52 50 49 48 43
=PPVCORE_CPU
VOLTAGE=0V
DAGND
R5542
55
PP2V5_VREF
20.0K2
TD0_<2> 55
3
0.1%
1/16W
MF-LF
603
DAGND
CRITICAL
10.0K2
SCALE (12V)
U5500
1
R5501
5566
55
11
R5502
LVM2014MTX
R5500
0.1%
1/16W
MF-LF
603
55
1%
1/10W
MF-LF
603
TSSOP-LF
4
11
TD0_CURRENT 112.7K2
55
7
6
10.0K2
TD0_<1>
55
10.0K2
DEVELOPMENT
PP3V3_OPAMP
R5512
55 50 48 6
10.0K2
1
KPGND2
20.0K
0.1%
1/16W
MF-LF
603
0.1%
1/16W
MF-LF
2 603
100UA CURRENT SOURCE
R5546
55 50 48 6
R5543
U5550
SO-8-LF
CPU_SENSE_KP_V
0.1%
1/16W
MF-LF
603
C5502
0.0022UF
10%
2 50V
CERM
402
55 48 6
15PF
1
PHYSICAL CONSTRAINTS
5% DEVELOPMENT
50V
CERM
402
6 55
55
55
PCB: PLACE R5530 AND C5530

NEXT TO SMU.
10%
2 50V
CERM
402
55
55 9
55 9
R5505
11
10.0K2
CPU_DIODE_NEG
55
0.1%
1/16W
MF-LF
603
R5510
0
5%
1/16W
MF-LF
2 402
TD0_<4>
40.2K2
R5503
55
TD0_<3>
0.1%
1/16W
MF-LF
603
PCB: PLACE R5510, C5501 NEAR

PROCESSOR. PLACE C5502 NEAR OPAMP
MAKE A GROUND LOOP AROUND
TDIODE_PAIR FROM PROCESSOR
55
CPU_TEMP_R
LVM2014MTX
R5506
1
100K 2
CPU_TEMP 28 55
55
55 28
55 28
100K 2
0.1%
1/16W
MF-LF
603
55 6
5%
1/16W
MF-LF
402
TSSOP-LF
4
55
TO SMU
R5530
R5507
0.1%
1/16W
MF-LF
603
10.0K2
1
U5500
10
CRITICAL
MIN_LINE_WIDTH
0.0022UF
3.3 MS TIME CONSTANT

SO SMU ADC SAMPLING
WORKS WELL.
C5530
1UF
0.01uF
1
55 28
55
54
10%
6.3V
2 CERM
402
C5500
54
55
6 55
DAGND 6 55
C5542
C5505
C5501
20%
2 10V
CERM
805
DAGND
55
C5551
2.2UF
NC_NCV1009_1 6
NC_NCV1009_2 6
NC_NCV1009_3 6
NC_NCV1009_4 6
NC_NCV1009_5 6
10.0K2
1
10%
16V
CERM
402
FROM CPU
1
2
3
7
8
R5547
0.1%
1/16W
MF-LF
603
DAGND
NC_NCV1009_ADJ
GND
4
0.1%
1/16W
MF-LF
2 603
CPU_DIODE_POS
NC1
NC2
NC3
NC4
NC5
LVM2014MTX
55
9
ADJ 5
NCV1009D
100K
6
VREF
CRITICAL
14
MAKE_BASE=TRUE
U5500
0.01uF
55 48 6
VOLTAGE=2.5V
OPTION 2
NOSTUFF
TSSOP-LF
KP_V<2> 12
R5509 R5526
5%
1/16W
MF-LF
2 402
10.0K2
KPVDD2
PP2V5_VREF 55
0.1%
1/16W
MF-LF
2 603
PP2V5_VREF
DEVELOPMENT
55 9
R5551
3.3K
KP_V<1> 13
55 9
PP3V3_CPU_DIODE
1%
1/10W
MF-LF
2 603
11
B0530WXF
6 28 55
55
0.1%
1/16W
MF-LF
603
R5545
40.2K
GND_SMU_AVSS
5%
50V
CERM
402
R5544
DS5550
SOD-123
63.4
15PF
10.0K
VOLTAGE=3.3V
C5541
TD0_BUFFERED
0.1%
1/16W
MF-LF
2 603
55
=PPVREF_SMU
28
DEVELOPMENT
R5504
PCB: PLACE C5540 NEXT TO SMU
LVM2014MTX
0.1%
1/16W
MF-LF
603
55
10%
2 6.3V
CERM
402
TSSOP-LF
4
COUNT
C5540
5%
1/10W
MF-LF
2 603
28 55
1UF
1%
1/16W
MF-LF
2 402
6 V/V
.01464 V/COUNT
ADC IS 10BIT 0 TO 1023
0 TO 2.5V
U5500
2.0K
TO SMU
CPU_SENSE_V
R5511
=PP3V3_PWRON_CPU
NOSTUFF
R5550
100K 2
5%
1/16W
MF-LF
402
=PP3V3_ALL_CPU 7
1
1%
1/16W
MF-LF
2 402
R5541
DAGND 6 55
TDIODE CIRCUIT ALWAYS POWERED

TO ASSIST DIODECAL
SO SMU ADC SAMPLING
WORKS WELL.
10K
OPTION 1
NOSTUFF
PCB: PLACE R5560,C5561 NEAR U5500 PIN 4
20%
10V
2 CERM
805
XW5560
SM
1
OPTION 3
C5561
2.5V PRECISION VOLTAGE REFERENCE SOURCE

CHOICE OF SMU SENSING
1) VCORE PLANE
2) PROC KELVIN POINT
3) 12V RAIL
=PP12V_CPU
55 50 7
5%
1/10W
MF-LF
603
55 6
TD0_<1..4>
PP12V_CPU_R
TD0_CURRENT
TD0_BUFFERED
KP_V<1..2>
CPU_SENSE_KP_V
PP3V3_OPAMP
INA138_OUT
CPU_SENSE_I_R
CPU_SENSE_I
CPU_SENSE_V
CPU_TEMP
CPU_TEMP_R
AVDDVC_NOISE
AVDDVB_CONT
PP12V_CPU_R
DAGND
0.25
0.60
0.25
0.25
0.25
0.25
0.60
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.60
0.60
MIN_NECK_WIDTH
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.20
0.20
0.20
0.20
0.25
0.25
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
MM
I325
I376
I323
I321
I355
I356
I375
I357
I360
I359
I361
I362
I370
I380
I381
I382
I385
10%
16V
CERM
402
DAGND 6 55
B
PROCESSOR VCORE CURRENT SENSE
(USING 12V INPUT CURRENT TO DERIVE CPU CURRENT)
FMAX CONNECTOR
PLACE CLOSE
TO U4300
CRITICAL
L5570
NOSTUFF
J5500
R5522 0
KPVDD2_FMAX
DIFFERENTIAL_PAIR=KP2_FMAX
BM12B-SRSS-TB
F-ST-SM
14
6
2
3
R5523 402
0
1
KPGND2_FMAX
5%
1/16W
MF-LF
402
R5524
0
1
TDIODE_POS_FMAX
1/16W
MF-LF
402
R5525 0
9
10
CORE_ISNS_M
11
DIFFERENTIAL_PAIR=CORE_ISNS
12
TDIODE_NEG_FMAX
DIFFERENTIAL_PAIR=TDIODE
NOSTUFF
2
OMIT
NOSTUFF
2
CPU_DIODE_NEG
V+
SOT23-5-LF
OUT
CORE_ISNS_P
55
SCALE
2.73224 A/V
COUNT
.00675 A/COUNT
GND
2
R5571
TO SMU
BAS16-75V-0.25A
SOT23-LF
CPU_SENSE_I28 55

SO SMU ADC SAMPLING
WORKS WELL.
C5570
1UF
73.2K
10%
6.3V
2 CERM
402
1%
1/16W
MF-LF
2 402
OMIT
100K 2
1
5%
1/16W
MF-LF
402
ADC IS 10BIT 0 TO 1023

0 TO 2.5V
D5570
R5572
CRITICAL
6 48 55
6 55
CPU_SENSE_I_R
7 54
3 NOSTUFF
OMIT
GND_SMU_AVSS
XW5572
SM
2
T,V,I SENSORS
6 28 55
CORE_ISNS_M 6 55

NOSTUFF

R5520
1
51
CPU_TEMP_R 55
5%
1/16W
MF-LF
402
NOSTUFF
DIFFERENTIAL_PAIR=P_FMAXT
XW5571
SM
INA138
6 55
FMAXT_P
FMAXT_M
55 6 INA138_OUT
U5570
5
=PP3V3_RUN_CPU
XW5570
SM
VIN+ VINCPU_DIODE_POS 6 48 55
6 55
DIFFERENTIAL_PAIR=P_FMAXT
PCB:KEEP SHORTS NEXT TO U55700

PCB:PLACE D5570,R5572,C5570 BY SMU
KPGND2 6 48 50 55
DIFFERENTIAL_PAIR=CORE_ISNS
1%
1W
MF
2512-1
3
NOSTUFF
2
VOLTAGE=12V
0.0252
PP12V_CPU_R
TH-VERT-LF VOLTAGE=12V
5%
1/16W
MF-LF
402
CORE_ISNS_P
13
5%
6
7
55
1/16W
MF-LF
DIFFERENTIAL_PAIR=TDIODE
55 50
KPVDD26 48 50 55
5%
DIFFERENTIAL_PAIR=KP2_FMAX
NOSTUFF
2
=PP12V_CPU
7
PP12V_CPU_R_L 50
R5570
1UH-20A-4.5MOHM

R5521
51
SIZE
DAGND 6 55
5%
1/16W
MF-LF
402
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
55
154
EI_CPU_SYSCLK_P
EI_CPU_SYSCLK_N
EI_CPU_APSYNC
EI_CPU_TBEN_CLK
EI_NB_APSYNC
56 43
56 43
43
56
EI_CPU_A_SYSCLK_P
EI_CPU_A_SYSCLK_N
CPU_A_APSYNC
CPU_A_TBEN_CLK_US
NB_APSYNC
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
26
56 43 9
26
56 43 9
26
56 43
26 42
56 43 9
56 43 9
CONNECT KODIAK EI A TO/FROM CPU
56 43 9
EI_NB_TO_CPU_CLK_P
MAKE_BASE=TRUE
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_AD<0..43> MAKE_BASE=TRUE
EI_NB_TO_CPU_SR_P<0..1> MAKE_BASE=TRUE
EI_NB_TO_CPU_SR_N<0..1> MAKE_BASE=TRUE
56 43 9
56 43 9
56 43
56 43 9
56 43 9
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
DIFFERENTIAL_PAIR
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_AD<0..21>
EI_CPU_TO_NB_SR_P<0..1>
EI_CPU_TO_NB_SR_N<0..1>
EICNCLK
EICNCLK
EICNCAD
EI_CPU_TO_NB_CLK
EI_CPU_TO_NB_CLK
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_CLK
EI_CPU_TO_NB_CLK
EICNCSR
EICNCSR
EI_CPU_TO_NB_CLK
EI_CPU_TO_NB_CLK
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_AD
EI_NB_TO_CPU_CLK_P
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_AD<0..43>
EI_NB_TO_CPU_SR_P<0..1>
EI_NB_TO_CPU_SR_N<0..1>
EINCCLK
EINCCLK
EINCCAD
EINCCAD
EINCCAD
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EIPNAPSYNC
EIPCAPSYNC
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_AD
EI_NB_TO_CPU_AD
EIPCSYSCLK
EIPCSYSCLK
EIPNSYSCLK_P
EIPNSYSCLK_N
EICNCAD_PP
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_AD
26
MAKE_BASE=TRUE
EI_NB_TO_CPU_A_CLK_P
42
EI_NB_TO_CPU_A_CLK_N
42
EI_NB_TO_CPU_A_AD<0..43> 42
EI_NB_TO_CPU_A_SR_P<0..1> 42
EI_NB_TO_CPU_A_SR_N<0..1> 42
56 43 9
56 43
56 43 9
56 43 9
MAKE_BASE=TRUE
EI_CPU_TO_NB_CLK_P
MAKE_BASE=TRUE
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_AD<0..43> MAKE_BASE=TRUE
MAKE_BASE=TRUE
EI_CPU_TO_NB_SR_P<0..1>
EI_CPU_TO_NB_SR_N<0..1> MAKE_BASE=TRUE
56 43 9
56 43 9
56 43
56 43 9
56 43 9
56 43
EI_NB_APSYNC
EI_CPU_APSYNC
EI_CPU_SYSCLK_P
EI_CPU_SYSCLK_N
EI_NB_SYSCLK_P
EI_NB_SYSCLK_N
EI_CPU_TO_NB_AD<22>
56 43
EI_CPU_TO_NB_AD<23..43>
56
EI_CPU_A_TO_NB_CLK_P
42
EI_CPU_A_TO_NB_CLK_N
42
EI_CPU_A_TO_NB_AD<0..43> 42
EI_CPU_A_TO_NB_SR_P<0..1> 42
EI_CPU_A_TO_NB_SR_N<0..1> 42
56 43
56 43 9
56 43
42 26
MAKE_BASE=TRUE
42 26
CONNECT CPU TO KODIAK QREQ A0

CPU_TO_NB_QREQ_L
43
EI BUS AND SYSCLK CONSTRAINT LABELS
CONNECT PULSAR CLKS TO CPU/NB

56 43 9
CPU_A0_TO_NB_QREQ_L
I28
I27
I31
I34
I32
I29
I30
I35
I36
EI_NB_TO_CPU_AD
I37
I33
I38
EI_CPU_SYSCLK
EI_CPU_SYSCLK
EI_NB_SYSCLK
EI_NB_SYSCLK
I40
I41
I39
I42
I195
EICNCAD
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_AD
I196
42
MAKE_BASE=TRUE
CONNECT CPU TO KODIAK QACK A0, NC OTHERWISE

CPU_QACK_L
NC_CPU_A1_QACK_L
NC_CPU_B0_QACK_L
NC_CPU_B1_QACK_L
43
6
6
6
CPU_A0_QACK_L
CPU_A1_QACK_L
CPU_B0_QACK_L
CPU_B1_QACK_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
42
42
44
44
MAKE_BASE=TRUE
NC KODIAK EI B OUTPUT PORT
CONNECT CPU TO KODIAK/SHASTA INT A0, NC OTHERWISE
CPU_INT_L
NC_NB_CPU_A1_INT_L
NC_NB_CPU_B0_INT_L
NC_NB_CPU_B1_INT_L
43
6
6
6
CPU_A0_INT_R_L 24 56
NB_CPU_A1_INT_L 42
NB_CPU_B0_INT_L 44
NB_CPU_B1_INT_L 44
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
6
6
6
6
MAKE_BASE=TRUE
NC_EI_NB_TO_CPU_B_CLK_P
NC_EI_NB_TO_CPU_B_CLK_N
NC_EI_NB_TO_CPU_B_AD<0..43>
NC_EI_NB_TO_CPU_B_SR_P<0..1>
NC_EI_NB_TO_CPU_B_SR_N<0..1>
NC KODIAK EI B INPUT PORT

EI_NB_TO_CPU_B_CLK_P
44
EI_NB_TO_CPU_B_CLK_N
44
EI_NB_TO_CPU_B_AD<0..43> 44
EI_NB_TO_CPU_B_SR_P<0..1> 44
EI_NB_TO_CPU_B_SR_N<0..1> 44
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
6
6
6
6
6
NC_EI_CPU_B_TO_NB_CLK_P
NC_EI_CPU_B_TO_NB_CLK_N
NC_EI_CPU_B_TO_NB_AD<0..43>
NC_EI_CPU_B_TO_NB_SR_P<0..1>
NC_EI_CPU_B_TO_NB_SR_N<0..1>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
EI_CPU_B_TO_NB_CLK_P
44
EI_CPU_B_TO_NB_CLK_N
44
EI_CPU_B_TO_NB_AD<0..43> 44
EI_CPU_B_TO_NB_SR_P<0..1> 44
EI_CPU_B_TO_NB_SR_N<0..1> 44
MAKE_BASE=TRUE
CONNECT CPU TO SHASTA SRESET A0, NC OTHERWISE

CPU_SRESET_L_R
NOTUSED_CPU_A1_SRESET_L MAKE_BASE=TRUE
NOTUSED_CPU_B0_SRESET_L MAKE_BASE=TRUE
NOTUSED_CPU_B1_SRESET_L MAKE_BASE=TRUE
SB_CPU_A0_SRESET_L
SB_CPU_A1_SRESET_L
SB_CPU_B0_SRESET_L
SB_CPU_B1_SRESET_L
24 56
PULLUPS FOR SRESETS FROM SHASTA
24 56
24 56
119 24 23 20 7
NOSTUFF
=PP3V3_PWRON_SB
R5608
24 56
MAKE_BASE=TRUE
ALL SHASTA GPIOS MUST

HAVE A PULL-UP WHEN SHASTA
IS STARTING UP.
WIRE OUT KODIAK AND CPU SIGNALS FOR TPS

9
9
9
9
9
TP_NB_B_TRIGGER_OUT
TP_NB_A_TRIGGER_OUT
TP_CPU_APSYNCOUT
TP_CPU_TRIGGER_IN
TP_CPU_TRIGGER_OUT
NC_PSRO
NC_PSRO_ENABLE
TP_CPU_ATTENTION
NC_CPU_AFN
NB_B_TRIGGER_OUT 44
NB_A_TRIGGER_OUT 42
CPU_APSYNCOUT
43
CPU_TRIGGER_IN 43 47
CPU_TRIGGER_OUT 43
CPU_PSRO
43
CPU_PSRO_ENABLE 43
CPU_ATTENTION
43
CPU_AFN
43
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
SB_CPU_A0_SRESET_L 24 56
10K
SB_CPU_A1_SRESET_L
24 56
SRESET LEVEL-TRANSLATOR AND TWO-WAY GLITCH PROTECT
24 56
BUFFER LEVEL-SHIFTS SHASTAS 3.3V PUSH-PULL

SIGNAL TO CPU FOR FAST RISE/FALL TRANSITIONS. BUFFER HIGH-ZS OUTPUT
WHEN PROC VCORE NOT POWERED BUT OVDD IS, TO PROTECT
OVDD-LEVEL OUTPUT FROM CPU SRESET PIN.
R5610
2
10K
SB_CPU_B0_SRESET_L
R5611
2
10K
SB_CPU_B1_SRESET_L
56 48 47 30 29 7
REMEMBER TO UPDATE NO_TEST PROPERTIES ON PG 6
56 48 47 30 29 7
R5640 IS OPTIONAL
R5640
=PPVCORE_CPU
R5612
2
R5600
1
TO/FROM CPU
43 8
1K
NB_STOP_IS_CHKSTOP
1
TO CPU
43
CPU_MCP_L
56
100
1%
1/16W
MF-LF
402 2
1 SRCOM_VCORE_R
LM339A
10
SOI-LF
V+
10K
1%
1/16W
MF-LF
402 2
11
13
GND
12 NOSTUFF
5%
1/16W
MF-LF
402 2
C5640 1
4.7K
R5644
VSSOP
VCC
SB_CPU_A0_SRESET_L
R5643
U400
SRCOM_0V8_REF
24
56
R56421
TO/FROM NB
R5602
0.1UF
NOSTUFF 20%
10V
CERM 2
402
125
56
Y
SRCOM_SRESET
100
CPU_SRESET_L
43
5%
1/16W
MF-LF
402
CRITICAL
GND
7
4
SRCOM_SRESET_EN_L
TURN-ON VCORE > 0.80 V
TURN-OFF VCORE < 0.77 V
R5645
2
470K 1
5%
1/16W
MF-LF
402
NB_CHKSTOP_L 42
4.7K 2
NB_STOP_IS_MCP
5%
1/16W
MF-LF
402
SRCOM_SRESET
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R5601
5%
1/16W
MF-LF
402
CPU_CHKSTOP_L
1K
U5640
8 SN74AUC2G125
PULL-UP PROVIDED
NOSTUFF
VCC CAN BE 0.8V TO 2.7V

3.3V INPUT TOLERANT
DAMPEN OUTPUT
NOSTUFF
22.1K
55 52 50 49 48 43
=PPV_EI_CPU
=PPV_EI_CPU
R56411
5%
1/16W
MF-LF
402
PP2V5_ALL
CPU CHKSTOP OR MCP TO NB

56 48 47 30 29 7
NOSTUFF
IF SHASTA SHOULD DRIVE OD

WITH EI LEVEL PULLUP, STUFF
R5612, NOSTUFF R5608, STUFF R5646
=PPV_EI_CPU
R5646
24 56
5%
1/16W
MF-LF
402
MAKE_BASE=TRUE
10K
R5609
R5603
1
42 41 7
=PPV_EI_NB
NOTE, NB UNUSED INTS DO NOT REQUIRE

PULLUPS, ONLY SHASTA (SINCE
ITS OUTPUTS ARE TEMPORARILY INPUTS
ON BOOTUP).
INT PULLUP IS SO INT PIN IS NOT FLOATING
TO PROCESSOR BUT WEAK TO ALLOW
KODIAK TO DRIVE PUSH-PULL STRONGLY
5%
1/16W
MF-LF
402
R5604
2
10K
CPU_A0_INT_R_L
24 56
5%
1/16W
MF-LF
402
CPU ALIASES & MISC

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
56
154
AA26
AA29
AA32
AA35
AB24
AC27
AC30
AC33
AC36
AD25
AE23
AE26
AE29
AE32
AE35
AF25
AG23
AG27
AG30
AG33
AG36
AJ25
AJ29
AJ32
AJ35
AK23
AK27
AL31
AL33
AL36
AM25
AM29
AN23
AN27
AN31
AN35
AR25
AR29
AR33
AR35
AT23
AT27
AT31
B28
B32
C36
D30
D33
E28
E32
E35
G30
G33
G36
H28
H29
J29
J32
J35
K26
L27
L30
L33
L36
M25
N22
N26
N29
N32
N35
P24
R27
R30
R33
R36
T25
U22
U26
U29
U32
U35
V24
W27
W30
W33
W36
Y25
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
U1900
BGA
(8 OF 10)
PART 1
PWR/GND
A34
KODIAK-ASIC-040812
A30
VD3_0
VD3_1
VD3_2
VD3_3
VD3_4
VD3_5
VD3_6
VD3_7
VD3_8
VD3_9
VD3_10
VD3_11
VD3_12
VD3_13
VD3_14
VD3_15
VD3_16
VD3_17
VD3_18
VD3_19
VD3_20
VD3_21
VD3_22
VD3_23
VD3_24
VD3_25
VD3_26
VD3_27
VD3_28
VD3_29
VD3_30
VD3_31
VD3_32
VD3_33
VD3_34
VD3_35
VD3_36
VD3_37
VD3_38
VD3_39
VD3_40
VD3_41
VD3_42
VD3_43
VD3_44
VD3_45
VD3_46
VD3_47
VD3_48
VD3_49
VD3_50
VD3_51
VD3_52
VD3_53
VD3_54
VD3_55
VD3_56
VD3_57
VD3_58
VD3_59
VD3_60
VD3_61
VD3_62
VD3_63
VD3_64
VD3_65
VD3_66
VD3_67
VD3_68
VD3_69
VD3_70
VD3_71
VD3_72
VD3_73
VD3_74
VD3_75
VD3_76
VD3_77
VD3_78
VD3_79
VD3_80
VD3_81
VD3_82
VD3_83
VD3_84
VD3_85
VD3_86
VD3_87
=PP1V8_PWRON_NBMEM
A28
7 20 39 58 59
A32
AA27
AA30
59 58 39 20 7
=PP1V8_PWRON_NBMEM
AA33
1
AA36
AB25
AC26
C5836
C5835
C5834
C5832
C5831
C5830
C5829
C5822
C5811
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
10%
10%
10%
10%
10%
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
CERM
402
C5864
AE22
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
AE27
10%
10%
10%
10%
10%
10%
10%
10%
10%
AC29
CERM
402
C5859
CERM
402
C5857
CERM
402
CERM
402
C5840
CERM
402
C5837
CERM
402
C5828
CERM
402
C5801
C5800
1UF
10%
2
CERM
402
6.3V
CERM
402
AC32
AC35
AD24
1
AE30
6.3V
6.3V
6.3V
CERM
402
CERM
402
CERM
402
C5863
C5860
C5858
C5842
6.3V
CERM
402
6.3V
6.3V
6.3V
6.3V
CERM
402
CERM
402
CERM
402
CERM
402
C5841
C5838
C5827
C5802
C5855
C5833
1UF
10%
6.3V
CERM
402
6.3V
CERM
402
AE33
AE36
AF23
1
AF26
AG25
AG29
AG32
C5843
C5866
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
10%
10%
10%
10%
10%
10%
10%
10%
10%
6.3V
CERM
402
C5865
6.3V
CERM
402
C5862
6.3V
CERM
402
C5861
6.3V
CERM
402
6.3V
CERM
402
C5845
6.3V
CERM
402
C5839
6.3V
CERM
402
C5826
6.3V
CERM
402
C5803
C5844
1UF
10%
6.3V
CERM
402
6.3V
CERM
402
AG35
AJ23
AJ27
1
AJ30
1UF
1UF
10%
AJ33
2
AJ36
6.3V
1UF
10%
CERM
402
C5874
CERM
402
C5869
C5846
1UF
10%
6.3V
1UF
10%
6.3V
CERM
402
C5867
6.3V
CERM
402
1UF
10%
2
6.3V
1UF
10%
CERM
402
C5850
6.3V
1UF
10%
CERM
402
C5847
CERM
402
C5825
C5887
1UF
10%
6.3V
CERM
402
C5810
C5877
1UF
10%
6.3V
10%
6.3V
CERM
402
6.3V
CERM
402
AK25
AK29
AL32
1
AL35
AM23
AM27
C5852
C5806
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
10%
10%
10%
10%
10%
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
CERM
402
C5873
AN36
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
AP34
10%
10%
10%
10%
10%
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
AM31
CERM
402
C5870
CERM
402
C5868
CERM
402
CERM
402
C5851
CERM
402
C5848
CERM
402
C5824
CERM
402
C5812
C5804
1UF
10%
2
CERM
402
6.3V
CERM
402
AN25
AN29
AN33
1
AR23
CERM
402
C5875
CERM
402
C5872
CERM
402
C5871
C5853
CERM
402
CERM
402
C5854
CERM
402
C5849
CERM
402
C5823
CERM
402
C5813
C5807
C5805
1UF
10%
CERM
402
6.3V
CERM
402
AR27
AR31
AT25
AT29
AT33
B30
C5856
C5809
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
10%
10%
10%
10%
10%
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
CERM
402
C5886
E30
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
E33
10%
10%
10%
10%
10%
10%
10%
10%
10%
B34
CERM
402
C5885
CERM
402
C5883
CERM
402
CERM
402
C5879
CERM
402
C5876
CERM
402
C5821
CERM
402
C5818
C5808
1UF
10%
CERM
402
6.3V
CERM
402
C35
D28
D32
1
E36
6.3V
CERM
402
6.3V
CERM
402
6.3V
CERM
402
C5884
C5881
6.3V
CERM
402
6.3V
6.3V
6.3V
6.3V
CERM
402
CERM
402
CERM
402
CERM
402
C5880
C5878
C5820
C5819
C5816
C5814
1UF
10%
6.3V
CERM
402
6.3V
CERM
402
G28
G32
G35
J28
J30
J33
J36
C5882
C5817
1UF
1UF
1UF
1UF
1UF
1UF
1UF
10%
10%
10%
10%
10%
10%
10%
6.3V
CERM
402
6.3V
CERM
402
6.3V
CERM
402
6.3V
CERM
402
6.3V
CERM
402
6.3V
CERM
402
C5815
1UF
10%
6.3V
CERM
402
6.3V
CERM
402
L26
L29
L32
L35
M24
N23
N27
N30
N33
Q63: SEE P.20 FOR MORE DECOUPLING CAPS FOR THESE PINS.
N36
P25
R26
R29
R32
R35
T24
U23
U27
U30
U33
U36
V25
KODIAC NBMEM PWR & CAPS
W26
W29
SYNC_MASTER=Q63
W32
W35
Y24

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:44 2005
REV.
58
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
67 61
P32
T36
U31
P31
T30
T29
T28
W28
P34
T34
P33
T35
P35
P36
R31
T31
K36
M34
K35
N31
L31
L34
M31
M33
M27
R28
U28
T27
N28
P29
P30
N34
G34
J31
G31
J34
H30
H36
H31
H34
B35
F31
C33
F34
C34
D34
D35
E34
D31
E31
C31
F30
A33
B33
C32
C30
D27
F29
E29
D29
C29
B29
A29
C28
F36
K31
K34
F35
M30
L28
K29
K30
DDR_DQ64
DDR_DQ65
DDR_DQ66
DDR_DQ67
DDR_DQ68
DDR_DQ69
DDR_DQ70
DDR_DQ71
DDR_DQ72
DDR_DQ73
DDR_DQ74
DDR_DQ75
DDR_DQ76
DDR_DQ77
DDR_DQ78
DDR_DQ79
DDR_DQ80
DDR_DQ81
DDR_DQ82
DDR_DQ83
DDR_DQ84
DDR_DQ85
DDR_DQ86
DDR_DQ87
DDR_DQ88
DDR_DQ89
DDR_DQ90
DDR_DQ91
DDR_DQ92
DDR_DQ93
DDR_DQ94
DDR_DQ95
DDR_DQ96
DDR_DQ97
DDR_DQ98
DDR_DQ99
DDR_DQ100
DDR_DQ101
DDR_DQ102
DDR_DQ103
DDR_DQ104
DDR_DQ105
DDR_DQ106
DDR_DQ107
DDR_DQ108
DDR_DQ109
DDR_DQ110
DDR_DQ111
DDR_DQ112
DDR_DQ113
DDR_DQ114
DDR_DQ115
DDR_DQ116
DDR_DQ117
DDR_DQ118
DDR_DQ119
DDR_DQ120
DDR_DQ121
DDR_DQ122
DDR_DQ123
DDR_DQ124
DDR_DQ125
DDR_DQ126
DDR_DQ127
U1900
BGA
(4 OF 10)
DDR_DQ136
DDR_DQ137
DDR_DQ138
DDR_DQ139
DDR_DQ140
DDR_DQ141
DDR_DQ142
DDR_DQ143
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
DDR_DQ128
DDR_DQ129
DDR_DQ130
DDR_DQ131
DDR_DQ132
DDR_DQ133
DDR_DQ134
DDR_DQ135
AP31
AP32
AN32
AM30
AN30
AP30
AR30
AM32
AM36
AK31
AL34
AT34
AR34
AN34
AM33
AM34
AH31
AK34
AH32
AK33
AH30
AH29
AJ34
AK32
AE31
AG34
AE34
AH36
AF36
AF35
AF34
AG31
AF29
AF30
AD31
AG28
AD34
AD35
AH35
AH34
AB36
AC34
AA31
AD36
AB35
AB34
AB33
AC31
V32
Y32
V31
Y33
V33
V34
V35
Y29
V30
Y34
Y35
U34
AB28
AB27
W34
AA28
RAM_DQ<0>
RAM_DQ<1>
RAM_DQ<2>
RAM_DQ<3>
RAM_DQ<4>
RAM_DQ<5>
RAM_DQ<6>
RAM_DQ<7>
RAM_DQ<8>
RAM_DQ<9>
RAM_DQ<10>
RAM_DQ<11>
RAM_DQ<12>
RAM_DQ<13>
RAM_DQ<14>
RAM_DQ<15>
RAM_DQ<16>
RAM_DQ<17>
RAM_DQ<18>
RAM_DQ<19>
RAM_DQ<20>
RAM_DQ<21>
RAM_DQ<22>
RAM_DQ<23>
RAM_DQ<24>
RAM_DQ<25>
RAM_DQ<26>
RAM_DQ<27>
RAM_DQ<28>
RAM_DQ<29>
RAM_DQ<30>
RAM_DQ<31>
RAM_DQ<32>
RAM_DQ<33>
RAM_DQ<34>
RAM_DQ<35>
RAM_DQ<36>
RAM_DQ<37>
RAM_DQ<38>
RAM_DQ<39>
RAM_DQ<40>
RAM_DQ<41>
RAM_DQ<42>
RAM_DQ<43>
RAM_DQ<44>
RAM_DQ<45>
RAM_DQ<46>
RAM_DQ<47>
RAM_DQ<48>
RAM_DQ<49>
RAM_DQ<50>
RAM_DQ<51>
RAM_DQ<52>
RAM_DQ<53>
RAM_DQ<54>
RAM_DQ<55>
RAM_DQ<56>
RAM_DQ<57>
RAM_DQ<58>
RAM_DQ<59>
RAM_DQ<60>
RAM_DQ<61>
RAM_DQ<62>
RAM_DQ<63>
61 68
62 61
61 68
62 61
RAM_CLKA_P
RAM_CLKA_N
AR28
AT28
OUT
OUT
61 68
61 68
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
AL26
AK26
RAM_CAS_L
RAM_RAS_L
RAM_WE_L
AM24
RAM_BA<0>
RAM_BA<1>
RAM_BA<2>
AL22
RAM_A<0>
RAM_A<1>
RAM_A<2>
RAM_A<3>
RAM_A<4>
RAM_A<5>
RAM_A<6>
RAM_A<7>
RAM_A<8>
RAM_A<9>
RAM_A<10>
RAM_A<11>
RAM_A<12>
RAM_A<13>
RAM_A<14>
RAM_A<15>
AN26
AL24
AP23
DDR_CK_A
DDR_CK_AN
DDR_CK_B
DDR_CK_BN
DDR_CAS
DDR_RAS
DDR_WE
61 68
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
61 68
68 67 61
AP28
AN28
AP26
AR26
AT26
AM26
AL25
AP25
AH28
AL30
AR22
AJ28
AH27
AH26
AH25
AJ26
AK24
DDR_BA0
DDR_BA1
DDR_BA2
DDR_MAD0
DDR_MAD1
DDR_MAD2
DDR_MAD3
DDR_MAD4
DDR_MAD5
DDR_MAD6
DDR_MAD7
DDR_MAD8
DDR_MAD9
DDR_MAD10
DDR_MAD11
DDR_MAD12
DDR_MAD13
DDR_MAD14
DDR_MAD15
DDR_CS0_QDM0
DDR_CS1_QDM1
DDR_CS2_QDM2
DDR_CS3_QDM3
U1900 DDR_CS4_QDM4
BGA
DDR_CS5_QDM5
(3 OF 10) DDR_CS6_QDM6
DDR_CS7_QDM7
DDR_CS8_QDM8
DDR_CS9_QDM9
DDR_CS10_QDM10
DDR_CS11_QDM11
DDR_CS12_QDM12
DDR_CS13_QDM13
DDR_CS14_QDM14
DDR_CS15_QDM15
AL27
DDR_CKE0_QCKE0
DDR_CKE1_QCKE1
DDR_CKE2_QCKE2
DDR_CKE3_QCKE3
DDR_CKE4_QCS_EN
DDR_CKE5_QCS0
DDR_CKE6_QCS1
DDR_CKE7_QCS2
AJ24
DDR_MUXEN0
DDR_MUXEN1
DDR_MUXEN2
DDR_MUXEN3
DDR_MUXEN4
DDR_MUXEN5
DDR_MUXEN6
DDR_MUXEN7
AP27
DDR_ODT0_QODT_EN
DDR_ODT1_QODT0
DDR_ODT2_QODT1
DDR_ODT3_QODT2
DDR_ODT4
DDR_ODT5
DDR_ODT6_QDM16
DDR_ODT7_QDM17
AL23
DDR_REFCLK_P
DDR_REFCLK_N
AF24
61 68
61 68
61 68
68 61
61 68
68 61
RAM_DQS_P<0>
RAM_DQS_N<0>
AF22
DDR_ARB_ADDR
AR32
DDR_DQSP0
DDR_DQSN0
AT32
INTERFACE - CONTROL
MEMORY
67 61
61 68
61 68
68 61
61 68
68 61
61 68
68 61
61 68
68 61
RAM_DQS_P<1>
RAM_DQS_N<1>
AP35
AP36
RAM_DQS_P<2>
RAM_DQS_N<2>
AK35
RAM_DQS_P<3>
RAM_DQS_N<3>
AF33
AK36
DDR_DQSP1
DDR_DQSN1
DDR_DQSP2
DDR_DQSN2
61 68
61 68
68 61
61 68
68 61
61 68
68 61
61 68
68 61
AF32
RAM_DQS_P<4>
RAM_DQS_N<4>
AD33
RAM_DQS_P<5>
RAM_DQS_N<5>
AB30
RAM_DQS_P<6>
RAM_DQS_N<6>
Y31
RAM_DQS_P<7>
RAM_DQS_N<7>
Y27
AD32
DDR_DQSP3
DDR_DQSN3
DDR_DQSP4
DDR_DQSN4
61 68
61 68
68 61
61 68
68 61
61 68
68 61
61 68
68 61
AB31
Y30
DDR_DQSP5
DDR_DQSN5
DDR_DQSP6
DDR_DQSN6
61 68
61 68
68 61
61 68
68 61
61 68
67 61
61 68
67 61
Y28
RAM_DQS_P<8>
RAM_DQS_N<8>
V28
RAM_DQS_P<9>
RAM_DQS_N<9>
T33
RAM_DQS_P<10>
RAM_DQS_N<10>
M36
RAM_DQS_P<11>
RAM_DQS_N<11>
P27
RAM_DQS_P<12>
RAM_DQS_N<12>
H33
RAM_DQS_P<13>
RAM_DQS_N<13>
F33
RAM_DQS_P<14>
RAM_DQS_N<14>
A31
RAM_DQS_P<15>
RAM_DQS_N<15>
B27
V27
DDR_DQSP7
DDR_DQSN7
DDR_DQSP8
DDR_DQSN8
61 68
61 68
67 61
61 68
67 61
61 68
67 61
61 68
67 61
T32
M35
DDR_DQSP9
DDR_DQSN9
DDR_DQSP10
DDR_DQSN10
61 68
61 68
67 61
61 68
67 61
61 68
67 61
61 68
67 61
KODIAK-ASIC-040812
67 61
INTERFACE - DATA
MEMORY
RAM_DQ<64>
RAM_DQ<65>
RAM_DQ<66>
RAM_DQ<67>
RAM_DQ<68>
RAM_DQ<69>
RAM_DQ<70>
RAM_DQ<71>
RAM_DQ<72>
RAM_DQ<73>
RAM_DQ<74>
RAM_DQ<75>
RAM_DQ<76>
RAM_DQ<77>
RAM_DQ<78>
RAM_DQ<79>
RAM_DQ<80>
RAM_DQ<81>
RAM_DQ<82>
RAM_DQ<83>
RAM_DQ<84>
RAM_DQ<85>
RAM_DQ<86>
RAM_DQ<87>
RAM_DQ<88>
RAM_DQ<89>
RAM_DQ<90>
RAM_DQ<91>
RAM_DQ<92>
RAM_DQ<93>
RAM_DQ<94>
RAM_DQ<95>
RAM_DQ<96>
RAM_DQ<97>
RAM_DQ<98>
RAM_DQ<99>
RAM_DQ<100>
RAM_DQ<101>
RAM_DQ<102>
RAM_DQ<103>
RAM_DQ<104>
RAM_DQ<105>
RAM_DQ<106>
RAM_DQ<107>
RAM_DQ<108>
RAM_DQ<109>
RAM_DQ<110>
RAM_DQ<111>
RAM_DQ<112>
RAM_DQ<113>
RAM_DQ<114>
RAM_DQ<115>
RAM_DQ<116>
RAM_DQ<117>
RAM_DQ<118>
RAM_DQ<119>
RAM_DQ<120>
RAM_DQ<121>
RAM_DQ<122>
RAM_DQ<123>
RAM_DQ<124>
RAM_DQ<125>
RAM_DQ<126>
RAM_DQ<127>
67 61
KODIAK-ASIC-040812
P28
H32
DDR_DQSP11
DDR_DQSN11
AP33
AJ31
AF31
RAM_CS_L<0> 61
RAM_CS_L<4> 61
RAM_CS_L<5> 61
AB32
V36
W31
OUT
OUT
V29
RAM_CS_L<8> 61
RAM_CS_L<9> 61
R34
M32
M28
H35
D36
G29
E27
OUT
OUT
OUT
OUT
OUT
OUT
RAM_CKE<0>
RAM_CKE<1>
AH24
AL21
AP21
RAM_CKE<4>
RAM_CKE<5>
AP22
AM22
AM28
AL28
AK28
AK30
AT30
AL29
AP29
AT24
AF28
M29
PLACE NEAR KODIAK

NOSTUFF
R5928
1
AJ22
OBSV
AG22
DDR_VREF_0_1
DDR_VREF_2_3
DDR_VREF_4_16
DDR_VREF_5_6
DDR_VREF_7_8
DDR_VREF_9_10
DDR_VREF_11_17
DDR_VREF_12_13
DDR_VREF_14_15
AG26
61
RAM_ODT<2>
61
RAM_ODT<4>
61
67 61
61 68
67 61
67 61
AB29
AC28
AF27
AE28
AD29
AD30
Y36
AA34
67 61
67 61
67 61
F32
B31
A27
AD27
AD28
K32
K33
49.9
NOSTUFF
R5912
OUT
OUT
OUT
42 7
=PPV_PWRON_NB_REFCLK
4.7
5%
Q63 APPLICATION IS PP1V6
1/16W
49.9
NB_DDR_REFCLK_P
DIFFERENTIAL_PAIR=RAM_NB_DDR_REFCLK_DP
NB_DDR_REFCLK_N
NET_PHYSICAL_TYPE=RAM_NB_DDR_80
DIFFERENTIAL_PAIR=RAM_NB_DDR_REFCLK_DP
NET_PHYSICAL_TYPE=RAM_NB_DDR_80
NB_CHP_FLT_N
R5913
1K
NB_DDR_STOP_OUT
9
26
NET_SPACING_TYPE=RAM_NB_DDR_80
26
NET_SPACING_TYPE=RAM_NB_DDR_80
NB_PLL_OUT_TRG
AD26
AB26
Y26
V26
=PP1V8_PWRON_NBMEM
T26
7 20 39 58
P26
1
M26
R5910
56.2
F28
DDR_DQSP12
DDR_DQSN12
1%
1/16W
MF-LF
402
CHECK VREF CONNECTION
DDR_VREF1_9
1
DDR_DQSP13
DDR_DQSN13
C5905 C5906 C5907 C5908

1
1UF
10%
6.3V
2 CERM
402
DDR_DQSP14
DDR_DQSN14
DDR_DQSP15
DDR_DQSN15
DDR_DQSP16
DDR_DQSN16
1UF
10%
6.3V
2 CERM
402
1UF
10%
6.3V
2 CERM
402
R5911
1UF
1
1
56.2
10%
6.3V
2 CERM
402
1%
1/16W
MF-LF
402
C5904
1UF
2
2
10%
6.3V
CERM
402
C5909 1 C5910 1 C5911 1 C5912 1 C5913

1UF
1UF
1UF
1UF
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
PLACE CLOSE TO KODIAK PIN
DDR_DQSP17
DDR_DQSN17
WITHIN 20MIL FROM VIA FOR EACH VREF
R5927
R5914
DQ/DQS OKAY TO TIE TO GROUND FOR THERMALS
OUT
61 68
61 68
49.9
NOSTUFF
R5929
AH22
DDR_STOP
RAM_ODT<0>
OUT
AG24
CHP_FAULT_N
61
61
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
AP24
AK22
61
OUT
OUT
AR24
AN24
61
OUT
OUT
AT22
AN22
Kodiak 128bit CS/CKE/ODT mapping (Q63 style)

+-----------+-----+-----+-----+--------------+--------+
| DIMM RANK | CS* | CKE | ODT | M23 Function | D bits |
+-----------+-----+-----+-----+--------------+--------+
|
A0
| 0 | 0 | 0 | onboard DRAM | 0:63 |
|
A1
| 1 | 1 | - |
*unused*
| 0:63 |
+-----------+-----+-----+-----+--------------+--------+
|
B2
| 8 | 0 | 4 | J6700 rank 1 | 64:127 |
|
B3
| 9 | 1 | - | J6700 rank 2 | 64:127 |
+===========+=====+=====+=====+==============+========+
|
C4
| 2 | 2 | 1 |
*unused*
| 0:63 |
|
C5
| 3 | 3 | - |
*unused*
| 0:63 |
+-----------+-----+-----+-----+--------------+--------+
|
D6
| 10 | 2 | 5 |
*unused*
| 64:127 |
|
D7
| 11 | 3 | - |
*unused*
| 64:127 |
+===========+=====+=====+=====+==============+========+
|
E8
| 4 | 4 | 2 |
*unused*
| 0:63 |
|
E9
| 5 | 5 | - |
*unused*
| 0:63 |
+-----------+-----+-----+-----+--------------+--------+
|
F10
| 12 | 4 | 6 |
*unused*
| 64:127 |
|
F11
| 13 | 5 | - |
*unused*
| 64:127 |
+===========+=====+=====+=====+==============+========+
|
G12
| 6 | 6 | 3 |
*unused*
| 0:63 |
|
G13
| 7 | 7 | - |
*unused*
| 0:63 |
+-----------+-----+-----+-----+--------------+--------+
|
H14
| 14 | 6 | 7 |
*unused*
| 64:127 |
|
H15
| 15 | 7 | - |
*unused*
| 64:127 |
+===========+=====+=====+=====+==============+========+
Kodiak 128bit CS/CKE/ODT mapping (v1.1 only)
+-----------+-----+-----+-----+--------------+--------+
| DIMM RANK | CS* | CKE | ODT | M23 Function | D bits |
+-----------+-----+-----+-----+--------------+--------+
|
A0
| 0 | 0 | 0 | onboard DRAM | 0:63 |
|
A1
| 1 | 1 | - |
*unused*
| 0:63 |
+-----------+-----+-----+-----+--------------+--------+
|
B2
| 4 | 4 | 2 | J6700 rank 1 | 64:127 |
|
B3
| 5 | 5 | - | J6700 rank 2 | 64:127 |
+===========+=====+=====+=====+==============+========+
|
C4
| 2 | 2 | 1 |
*unused*
| 0:63 |
|
C5
| 3 | 3 | - |
*unused*
| 0:63 |
+-----------+-----+-----+-----+--------------+--------+
|
D6
| 6 | 6 | 3 |
*unused*
| 64:127 |
|
D7
| 7 | 7 | - |
*unused*
| 64:127 |
+===========+=====+=====+=====+==============+========+
OUT
OUT
OUT
AH33
2.2
1
PPV_PWRON_NB_REFCLK_PLL_R
1
MF-LF
402
C5900
2
5%
1/16W
AH23
DDR_REFCLK_AVDD
DDR_REFCLK_AGND
MF-LF
C5901
1UF
0.22UF
10%
6.3V
CERM
402
20%
6.3V
X5R
402
AH21
402
U1900_RFCK_AVDD
Kodiak Memory Dq/Ctl

CHECK CAP SIZE (0603 OR 0402)

SIZE
APPLE COMPUTER INC.
KODIAK MEMORY INTERFACE
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
REV.
F
OF
59
154
62 61 7
=PP1V8_RUN_RAM
62 61 7
=PP1V8_RUN_RAM
62 59
62 59
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
RP6107
RP6106
RP6106
RP6105
RP6105
RP6104
RP6104
RP6103
240
240
240
240
240
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
4
68 67 61 59
C6100
0.1UF
0.1UF
20%
10V
2 CERM
402
C6102
20%
10V
2 CERM
402
RP6110
RP6109
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
RAM_A<0>
RAM_A<1>
RAM_A<2>
RAM_A<3>
RAM_A<4>
RAM_A<6>
RAM_A<5>
RAM_A<7>
RP6109
C6108
67 62
0.1UF
67 62
20%
2 10V
CERM
402
67 62
67 62
67 62
67 62
RAM_RAS_L
RAM_CAS_L
RAM_WE_L
68 67 61 59
68 67 61 59
68 67 61 59
69 62
69 62
69 62
69 62
70 62
RP6109
RP6110
RP6109
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
2
6
70 62
70 62
70 62
3
62
62
RP6107
RP6106
RP6106
RP6105
RP6105
RP6104
RP6104
RP6103
240
240
240
240
240
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
RPACK/RES NEAR/UNDER CONNECTOR
62
62
62 61 7
=PP1V8_RUN_RAM
68 59
68 59

62 61 7
=PP1V8_RUN_RAM
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
68 67 61 59
RP6103
RP6102
RP6108
RP6102
RP6101
RP6110
RP6100
RP6100
240
240
240
240
240
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
68 67 61 59
C6103
0.1UF
C6104
68 67 61 59
0.1UF
20%
2 10V
CERM
402
68 67 61 59
20%
2 10V
CERM
402
RP6108
RP6107
RP6101
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
68 67 61 59
C6109
68 59
0.1UF
68 59
20%
2 10V
CERM
402
68 59
68 59
68 59
68 59
RAM_BA<0>
RAM_BA<1>
RAM_BA<2>
68 59
68 59
68 59
68 59
68 59
RAM_A<8>
RAM_A<9>
RAM_A<10>
RAM_A<11>
RAM_A<12>
RAM_A<13>
RAM_A<14>
RAM_A<15>
RP6108
RP6107
RP6101
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
68 59
68 59
68 59
3
68 59
68 59
68 59
68 59
68 59
68 59
68 59
RP6103
RP6102
RP6108
RP6102
RP6101
RP6110
RP6100
RP6100
68 59
240
240
240
240
240
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
67 59
67 59
67 59
67 59
67 59
67 59
1V8_RUN_RAM_CKE
62 61 7
R6121
61 59
61 62
62 61
=PP1V8_RUN_RAM
5
61 59
RAM_CS_L<4>
R6161
RAM_CS_L<8> 1
10
10
RP6150
RP6152
RP6151
RP6151
RP6150
240
240
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
RAM_M23_128
2
C6105
0.1UF
20%
10V
2 CERM
402
C6106
1V8_RUN_RAM_CKE
VOLTAGE=1.8V
67 59
67 59
67 59
0.1UF
20%
10V
2 CERM
402
67 59
62 61 7
67 59
=PP1V8_RUN_RAM
67 59
RAM_CS_DIMM_A
8
RP6170
240
61 67
5%
1/16W
SM-LF
402
SERIES R NEAR KODIAK
RAM_Q63_128
R6172
402
SHARE PIN 2 PADS
61 59
RAM_CS_L<0> 1
10
R6173
RP6170
240
240
5%
1/16W
MF-LF
2 402
67 59
C6107
67 59
0.1UF
67 59
20%
10V
2 CERM
402
5%
1/16W
SM-LF
1
61 59
R6162
RAM_CS_L<9> 1
10
10
RAM_M23_128
RAM_CS_DIMM_B
61 59
RAM_CKE<0>
61 67
RAM_CS_L_R<0>
61 59
RAM_ODT<0>
10
67 59
67 59
RAM_CKE_R<0>
10
67 59
402
R6123
61 59
RAM_CKE<0>
10
R6174
RP6170
240
RAM_M23_128
2
RAM_CKE_DIMM_A 61 62 67
5%
1/16W
SM-LF
402
RAM_Q63_128
70 69 68 6
61 63 68 69 70
70 69 68
R6163
67 59
61 62 63 68 69 70
67 59
RAM_ODT_R<0>
SHARE PIN 2 PADS
RAM_CKE<4>
61 63 68 69 70
R6178
RAM_Q63_128
402
61 59
67 59
67 59
402
402
10
67 59
R6175
R6122
RAM_CS_L<5>
67 59
402
61 59
240
RP6170
5%
1/16W
MF-LF
2 402
70 69 68
240
68 67 61 59
5%
1/16W
SM-LF
68 67 61 59
68 67 61 59
2
68 67 61 59
402
SHARE PIN 2 PADS
68 67 61 59
RES NEAR BRANCH POINT

CS/CKE/ODT TERMINATION
FOR ONBOARD DRAM
61 59
RAM_CKE<5>
RAM_CKE<1>
R6164
1
10
10
61 59
RAM_M23_128
RAM_CKE_DIMM_B 61 62 67
402
61 59
61 59
RAM_Q63_128
61 59
402
61 59
SHARE PIN 2 PADS
70 69 68 63 61
67 61
67 61
R6125
61 59
61 59
RAM_ODT<2>
RAM_ODT<4>
R6165
1
10
10
61 59
RAM_M23_128
402
RAM_Q63_128
RAM_ODT_DIMM_A 61 67
7
61 59
61 59
61 59
402
SHARE PIN 2 PADS

SERIES R NEAR KODIAK
68 67 61 59
68 67 61 59
R6124
61 59
ALL R PACKS ARE 1/16W 5%
RP6150
RP6152
RP6151
RP6151
RP6150
240
240
240
240
240
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
70 69 68 63 62 61
67 62 61
67 62 61
2
61 59
61 59

61 59
70 69 68 63 61
CS/CKE/ODT TERMINATION
FOR DIMM STICK
67 61
RAM_CS_L<0>
RAM_CS_L<4>
RAM_CS_L<5>
RAM_CS_L<8>
RAM_CS_L<9>
RAM_CS_L_R<0>
RAM_CS_DIMM_A
RAM_CS_DIMM_B
RAM_CKE<0>
RAM_CKE<1>
RAM_CKE<4>
RAM_CKE<5>
RAM_CKE_R<0>
RAM_CKE_DIMM_B
RAM_CKE_DIMM_A
RAM_ODT<0>
RAM_ODT<2>
RAM_ODT<4>
RAM_ODT_R<0>
RAM_ODT_DIMM_A
RAM_CS_ONBOARD_EC
RAM_CS_DIMM_EC
RAM_CS_DIMM_EC
RAM_CKE_DIMM_ONBOARD_EC
RAM_CKE_DIMM_EC
RAM_ODT_ONBOARD_EC
RAM_ODT_DIMM_EC
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
RAM_CSCKEODT
I243
70 69 68 63
I487
70 69 68 63
I242
70 69 68 63
I245
70 69 68 63
I244
70 69 68 63
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
RAM_KODIAK_CLK_EC
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_KODIAK_CLK_DP
RAM_KODIAK_CLK_DP
RAM_DIMM_A_CLK_P0
RAM_DIMM_A_CLK_N0
RAM_DIMM_A_CLK_P1
RAM_DIMM_A_CLK_N1
RAM_DIMM_A_CLK_P2
RAM_DIMM_A_CLK_N2
RAM_ONBOARD_CLK_P0_1
RAM_ONBOARD_CLK_N0_1
RAM_CLK_FBIN_P
RAM_CLK_FBIN_N
RAM_CLK_FBOUT_P
RAM_CLK_FBOUT_N
RAM_DIMM_CLK_EC
RAM_DIMM_CLK_EC
RAM_DIMM_CLK_EC
RAM_DIMM_CLK_EC
RAM_DIMM_CLK_EC
RAM_DIMM_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_ONBOARD_CLK_EC
RAM_FB_CLK_EC
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_CLK
RAM_DIMM_CLK0_DP
RAM_DIMM_CLK0_DP
RAM_DIMM_CLK1_DP
RAM_DIMM_CLK1_DP
RAM_DIMM_CLK2_DP
RAM_DIMM_CLK2_DP
RAM_ONBOARD_CLK0_DP
RAM_ONBOARD_CLK0_DP
RAM_ONBOARD_CLK2_DP
RAM_ONBOARD_CLK2_DP
RAM_ONBOARD_CLK4_DP
RAM_ONBOARD_CLK4_DP
RAM_ONBOARD_CLK6_DP
RAM_ONBOARD_CLK6_DP
RAM_FBIN_CLK_DP
RAM_FBIN_CLK_DP
RAM_FBOUT_CLK_DP
RAM_FBOUT_CLK_DP
RAM_DQ<7..0>
RAM_DQS_P<0>
RAM_DQS_N<0>
RAM_DQ<15..8>
RAM_DQS_P<1>
RAM_DQS_N<1>
RAM_DQ<23..16>
RAM_DQS_P<2>
RAM_DQS_N<2>
RAM_DQ<31..24>
RAM_DQS_P<3>
RAM_DQS_N<3>
RAM_DQ<39..32>
RAM_DQS_P<4>
RAM_DQS_N<4>
RAM_DQ<47..40>
RAM_DQS_P<5>
RAM_DQS_N<5>
RAM_DQ<55..48>
RAM_DQS_P<6>
RAM_DQS_N<6>
RAM_DQ<63..56>
RAM_DQS_P<7>
RAM_DQS_N<7>
RAM_DQ<71..64>
RAM_DQS_P<8>
RAM_DQS_N<8>
RAM_DQ<79..72>
RAM_DQS_P<9>
RAM_DQS_N<9>
RAM_DQ<87..80>
RAM_DQS_P<10>
RAM_DQS_N<10>
RAM_DQ<95..88>
RAM_DQS_P<11>
RAM_DQS_N<11>
RAM_DQ<103..96>
RAM_DQS_P<12>
RAM_DQS_N<12>
RAM_DQ<111..104>
RAM_DQS_P<13>
RAM_DQS_N<13>
RAM_DQ<119..112>
RAM_DQS_P<14>
RAM_DQS_N<14>
RAM_DQ<127..120>
RAM_DQS_P<15>
RAM_DQS_N<15>
RAM_DQ_R<127..0>
RAM_DQS_P_R<15..0>
RAM_DQS_N_R<15..0>
RAM_DQS0_EC
RAM_DQS0_EC
RAM_DQS0_EC
RAM_DQS1_EC
RAM_DQS1_EC
RAM_DQS1_EC
RAM_DQS2_EC
RAM_DQS2_EC
RAM_DQS2_EC
RAM_DQS3_EC
RAM_DQS3_EC
RAM_DQS3_EC
RAM_DQS4_EC
RAM_DQS4_EC
RAM_DQS4_EC
RAM_DQS5_EC
RAM_DQS5_EC
RAM_DQS5_EC
RAM_DQS6_EC
RAM_DQS6_EC
RAM_DQS6_EC
RAM_DQS7_EC
RAM_DQS7_EC
RAM_DQS7_EC
RAM_DQS8_EC
RAM_DQS8_EC
RAM_DQS8_EC
RAM_DQS9_EC
RAM_DQS9_EC
RAM_DQS9_EC
RAM_DQS10_EC
RAM_DQS10_EC
RAM_DQS10_EC
RAM_DQS11_EC
RAM_DQS11_EC
RAM_DQS11_EC
RAM_DQS12_EC
RAM_DQS12_EC
RAM_DQS12_EC
RAM_DQS13_EC
RAM_DQS13_EC
RAM_DQS13_EC
RAM_DQS14_EC
RAM_DQS14_EC
RAM_DQS14_EC
RAM_DQS15_EC
RAM_DQS15_EC
RAM_DQS15_EC
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_CAD
RAM_DQS
RAM_DQS
RAM_A<15..14>
RAM_A<13..0>
RAM_BA<1..0>
RAM_BA<2>
RAM_A_CTL_EC
RAM_A_CTL_EC
RAM_A_CTL_EC
RAM_A_CTL_1_EC
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_RAS_L
RAM_CAS_L
RAM_WE_L
RAM_A_R<15..0>
RAM_BA_R<2..0>
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
RAM_A_CTL_EC
RAM_A_CTL_EC
RAM_A_CTL_EC
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
RAM_CAD
I206
I207
I210
I211
I212
I213
I214
I215
I216
I217
I218
I219
I220
I221
I222
I223
I224
I225
I226
I227
I248
RAM_DQS_0_DP
RAM_DQS_0_DP
I246
I470
I252
RAM_DQS_1_DP
RAM_DQS_1_DP
I251
I471
I254
RAM_DQS_2_DP
RAM_DQS_2_DP
I253
I472
I256
RAM_DQS_3_DP
RAM_DQS_3_DP
I255
I473
I258
RAM_DQS_4_DP
RAM_DQS_4_DP
I257
I474
I260
RAM_DQS_5_DP
RAM_DQS_5_DP
I259
I475
I262
RAM_DQS_6_DP
RAM_DQS_6_DP
I261
I476
I264
RAM_DQS_7_DP
RAM_DQS_7_DP
I263
I477
I267
RAM_DQS_8_DP
RAM_DQS_8_DP
I265
I478
I268
RAM_DQS_9_DP
RAM_DQS_9_DP
I266
I479
I269
RAM_DQS_10_DP
RAM_DQS_10_DP
I270
I480
I271
RAM_DQS_11_DP
RAM_DQS_11_DP
I272
I481
I275
RAM_DQS_12_DP
RAM_DQS_12_DP
I273
I482
I277
RAM_DQS_13_DP
RAM_DQS_13_DP
I274
I483
I278
RAM_DQS_14_DP
RAM_DQS_14_DP
I276
I484
I279
RAM_DQS_15_DP
RAM_DQS_15_DP
I280
I485
I294
I305
I486
I572
I295
I296
I573
I297
I298
I299
I300
I304
I303
I302
I301
I238
Parallel Term
I241
I575
I234
I236
I235
RAM_CLK PRIMARY SPACING SET BASED ON DIFF IMPEDANCE

RAM_CLK LINE-LINE SPACING SET TO 15MIL
TOTAL LENGTH TOLERENCE = 20PS = 2.82MM
RAM_CAD SPACING IS 10MIL

I237
I230
I592
I232
I574
I576
SIZE
I577
I593
APPLE COMPUTER INC.
I594
DRAWING NUMBER
SCALE
REV.
051-6863
SHT
NONE
DIFFERENTIAL_PAIR
RAM_CLKA_P
RAM_CLKA_N
61
OF
F
154
=PP1V8_PWRON_RAM
5%
1/10W
MF-LF
603
L6200
R6200
1
RAMCLK_AVDD_R
VOLTAGE=1.8V
C6200
4.7UF
XW6200
SM
1
20%
10V
2 CERM
402
RAMCLK_AVDD
VOLTAGE=1.8V
SM
C
2
H1 D2 D3 D4 E2 E5 F2 G2 G3 G4 G5
AVDD
VDD
C6201 1 C6202
0.1UF
20%
2 6.3V
CERM
603
20%
2 10V
CERM
402
2200PF
5%
2 50V
CERM
603
R6230
10K
CRITICAL
5%
1/16W
MF-LF
2 402
RAMCLK_AVSS
VOLTAGE=0V
U6200
F5 OE
RAM_CLK_OE
D5 OS
CDCU877
BGA
R6220
1
61 59
RAM_CLKA_P
61 59
RAM_CLKA_N
61
61
100 1%
E1 CK
F1 CK*
E6 FBIN
F6 FBIN*
RAM_CLK_FBIN_P
RAM_CLK_FBIN_N
1
100 1%
NOSTUFF
=PP1V8_RUN_RAM
1V8_RUN_RAM_CKE
Q6201
C6212
0.1UF
20%
10V
2 CERM
402
C6213
0.1UF
20%
10V
2 CERM
402
RAM_DIMM_A_CLK_P0
61 67
RAM_DIMM_A_CLK_N0
61 67
Y1 A1
Y1* B1
RAM_DIMM_A_CLK_P1
61 67
RAM_DIMM_A_CLK_N1
61 67
Y2 D1
Y2* C1
RAM_DIMM_A_CLK_P2
61 67
RAM_DIMM_A_CLK_N2
61 67
Y3 J1
Y3* K1
61 69
61 69
Y4 K3
Y4* K2
61 69
61 69
Y5 A5
Y5* A4
61 70
61 70
Y6 A6
Y6* B6
61 70
61 70
GND
AGND
G1 B2 B3 B4 B5 C2 C5 H2 H5 J2 J3 J4 J5
2N7002DW-X-F
20%
10V
2 CERM
402
Y0 A2
Y0* A3
FBOUT H6
FBOUT* G6
4
S
0.1UF
Y9 K4
Y9* K5
61
5%
1/16W
MF-LF
402
C6211
Y8 J6
Y8* K6
R6201
61 7
Y7 D6
Y7* C6
R6221
C6210
0.1UF
600-OHM-EMI
SOT-363
RAM_CLK_FBOUT_P
RAM_CLK_FBOUT_N
61
R6210
1
61
R6211
1
PP5V_PWRON
1
R6242
1K
R6241
5%
1/16W
MF-LF
2 402
1K
5%
1/16W
MF-LF
2 402
NB_SUSPENDACK_L_5V
30 20
NB_SUSPEND_ACK_L 1
10K
5%
1/16W
MF-LF
402
2N7002DW-X-F
Q6200
70 69 68 63 61
RAM_CKE_DIMM_A
RAM_CKE_DIMM_B
RAM_CKE_R<0>
Q6201
R6240
67 61
67 61
SOT-363
2N3904LF
SOT23
Q6243
D
1
1
Q6245
2N7002
SOT23-LF
Q6244
2N7002
SOT23-LF
2N7002
SOT23-LF
NB_SUSPEND_ACK_L_R_5V
2
Main Memory Clock Buffer
NB_SUSPENDACK_5V

Q6243_S
Q6244_S
Q6245_S
1
R6244
R6243
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402

R6245
0
5%
1/16W
MF-LF
2 402

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
62
OF
F
154
7
70 69 68 61
RAM_A_R<0>
ZTA0
70 69 68 61
RAM_A_R<6>
RAM_A_R<12>
ZTA6
1
ZTA0_R
1
RAM_BA_R<0>
ZTA12
1
ZTA6_R
ZTA0_RR
ZTA0_RL
ZTA6_RR
ZTA6_RL
RAM_CS_L_R<0>
ZTBA0
ZTA12_R
1
ZTCS
1
ZTBA0_R
ZTCS_R
ZTA12_RR
ZTBA0_RR
ZTCS_RR
ZTA12_RL
ZTBA0_RL
ZTCS_RL
61 68 69 70
ZTA0_L
ZTA6_L
ZTA12_L
ZTBA0_L
ZTCS_L
ZTA0_LR
ZTA6_LR
ZTA12_LR
ZTBA0_LR
ZTCS_LR
ZTA0_LL
ZTA6_LL
ZTA12_LL
ZTBA0_LL
ZTCS_LL
61 68 69 70
RAM_A_R<1>
RAM_A_R<7>
ZTA1
1
RAM_A_R<13>
ZTA7
1
ZTA1_R
70 69 68 61
RAM_A_R<2>
RAM_CKE_R<0>
ZTBA1
1
ZTA13_R
70 69 68 61
RAM_A_R<3>
ZTA13_RR
ZTBA1_RR
ZTCKE_RR
ZTA1_RL
ZTA7_RL
ZTA13_RL
ZTBA1_RL
ZTCKE_RL
ZTA1_L
1
ZTA1_LR
ZTA1_LL
ZTA7_L
1
ZTA7_LR
ZTA7_LL
RAM_A_R<8>
RAM_A_R<14>
ZTA8
1
ZTA2_RR
ZTA2_RL
ZTA13_L
ZTBA1_LR
ZTCKE_LR
ZTA13_LL
ZTBA1_LL
ZTCKE_LL
RAM_BA_R<2>
ZTA14
1
ZTA8_RR
ZTA8_RL
ZTA2_L
ZTA8_L
61 68 69 70
ZTBA2
70 69 68 61
ZTA14_R
1
ZTA14_RR
ZTA14_RL
ZTODT
1
ZTBA2_RR
ZTBA2_RL
ZTODT_R
1
ZTODT_RR
ZTA14_L
ZTODT_RL
ZTBA2_L
ZTODT_L
ZTA2_LR
ZTA8_LR
ZTA14_LR
ZTBA2_LR
ZTODT_LR
ZTA2_LL
ZTA8_LL
ZTA14_LL
ZTBA2_LL
ZTODT_LL
ZTRAS_RR
ZTRAS_RL
RAM_A_R<15>
ZTA9
1
ZTA3_R
1
ZTA3_RR
ZTA3_RL
1
ZTA3_L
RAM_RAS_L_R
ZTA15
1
ZTA9_R
1
ZTA9_RR
ZTA9_RL
ZTRAS
1
ZTA15_RR
ZTA15_RL
ZTRAS_R
61 68 69 70
ZTA9_L
ZTA15_R
61 68 69 70
ZTA15_L
ZTRAS_L
ZTA3_LR
ZTA9_LR
ZTA15_LR
ZTRAS_LR
ZTA3_LL
ZTA9_LL
ZTA15_LL
ZTRAS_LL
RAM_A_R<10>
ZTA4
1
RAM_ODT_R<0>
ZTBA2_R
61 68 69 70
61 68 69 70
RAM_A_R<4>
61 62 68 69 70
RAM_A_R<9>
ZTCKE_L
ZTA13_LR
61 68 69 70
ZTA8_R
1
ZTBA1_L
61 68 69 70
ZTA2_R
ZTA3
1
ZTCKE_R
ZTA7_RR
61 68 69 70
ZTCKE
70 69 68 61
ZTBA1_R
ZTA1_RR
ZTA2
1
RAM_BA_R<1>
ZTA13
61 68 69 70
ZTA7_R
61 68 69 70
RAM_CAS_L_R
ZTA10
1
ZTA4_R
1
ZTCAS
1
ZTA10_R
ZTCAS_R
ZTA4_RR
ZTA10_RR
ZTCAS_RR
ZTA4_RL
ZTA10_RL
ZTCAS_RL
B
61 68 69 70
ZTA4_L
1
ZTA4_LR
ZTA4_LL
ZTA10_L
1
ZTA10_LR
ZTCAS_LR
ZTA10_LL
ZTCAS_LL
61 68 69 70
70 69 68 61
RAM_A_R<5>
ZTA5
70 69 68 61
61 68 69 70
RAM_A_R<11>
RAM_WE_L_R
ZTA11
1
ZTA5_R
1
ZTCAS_L
ZTWE
1
ZTA11_R
ZTWE_R
ZTA5_RR
ZTA11_RR
ZTWE_RR
ZTA5_RL
ZTA11_RL
ZTWE_RL
61 68 69 70
ZTA5_L
ZTA11_L
ZTWE_L
ZTA5_LR
ZTA11_LR
ZTWE_LR
ZTA5_LL
ZTA11_LL
ZTWE_LL
MEMORY ADDR BRANCHING

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
63
OF
F
154
56.2
C6720
61 59
1UF
61 59
VSS F-RT-TH-LF DQ4

(1 OF 2) DQ5
DQ0
4
CRITICAL VSS
DQ1
5
VSS
DM0/DQS9
6
DQS0_L
NC/DQS9_L
7
DQS0
VSS
8
DQ6
VSS
9
DQ7
DQ2
10
VSS
DQ3
11
VSS
DQ12
12
DQ8
DQ13
13
VSS
DQ9
14
VSS
DM1/DQS10
15
DQS1_L
NC/DQS10_L
16
DQS1
VSS
17
VSS
CK1/RFU
18
NC/RST_L CK1_L/RFU
19
VSS
NC1
20
VSS
DQ14
21
DQ15
DQ10
22
DQ11
VSS
23
VSS
DQ20
24
DQ16
DQ21
25
DQ17
VSS
26
DM2/DQS11
VSS
27
DQS2_L
NC/DQS11_L
28
VSS
DQS2
29
VSS
DQ22
30
DQ23
DQ18
31
DQ19
VSS
32
DQ28
VSS
33
DQ29
DQ24
34
DQ25
VSS
35
VSS
DM3/DQS12
36
DQS3_L
NC/DQS12_L
37
DQS3
VSS
38
VSS
DQ30
39
DQ31
DQ26
40
DQ27
VSS
41
CB4
VSS
42
NC/CB0
CB5
43
VSS
NC/CB1
44
VSS
DM8/DQS17
45
DQS8_L
NC/DQS17_L
46
DQS8
VSS
47
NC/CB6
VSS
48
NC/CB7
NC/CB2
49
NC/CB3
VSS
50
VSS
VDDQ
51
VDDQ
CKE1
52
CKE0
VDD
53
NC2
VDD
54
NC3
NC/BA2
55
NC/ERR_L
VDDQ
56
A12
VDDQ
57
A11
A9
58
A7
VDD
59
VDD
A8
60
A5
A6
61
A4
VDDQ
62
VDDQ
A3
63
A2
A1
64
VDD
VDD
3
RAM_DQ<92>
RAM_DQ<93>
10%
6.3V
CERM
402
61 59
61 59
61 59
61 59
61 59
61 59
RAM_DQS_N<11>
RAM_DQS_P<11>
DDR2-DIMM
2
2
RAM_DQ<91>
RAM_DQ<90>
RAM_DQ<67>
RAM_DQ<71>
NOSTUFF 1
R6700
61 59
4.7K
1%
1/16W
MF-LF
402
61 59
RAM_DIMM_RST_L
NC
FOR REG DIMMS ONLY
NOSTUFF
30
SMU_IO_RESET
Q6700
61 59
2N7002
61 59
RAM_DQ<66>
RAM_DQ<65>
SOT23-LF
61 59
2
61 59
RAM_DQS_N<8>
RAM_DQS_P<8>
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
RAM_DQ<73>
RAM_DQ<75>
RAM_DQS_N<9>
RAM_DQS_P<9>
RAM_DQ<76>
RAM_DQ<77>
RAM_DQ<87>
RAM_DQ<81>
RAM_DQS_N<10>
RAM_DQS_P<10>
RAM_DQ<80>
RAM_DQ<82>
ECC
ECC
ECC
ECC
ECC
ECC
62 61
68 61 59
RAM_CKE_DIMM_A
RAM_BA<2>
NC
68 61 59
68 61 59
68 61 59
68 61 59
68 61 59
RAM_A<11>
RAM_A<7>
RAM_A<5>
RAM_A<4>
RAM_A<2>
VDDQ=1.8V
121
122
RAM_DQ<88>
RAM_DQ<95>
123
124
125
126
59 61
59 61
DM0
NC
127
128
RAM_DQ<89>
RAM_DQ<94>
129
130
131
59 61
RAM_DQ<70>
RAM_DQ<69>
132
133
134
135
59 61
59 61
59 61
DM1
NC
65
136
66
137
138
RAM_DIMM_A_CLK_P1
RAM_DIMM_A_CLK_N1
61 62
RAM_DQ<68>
RAM_DQ<64>
61 62
59 61
68 61 59
59 61
68 61 59
142
143
144
RAM_DQ<79>
RAM_DQ<78>
59 61
68 61 59
59 61
68 61 59
145
146
147
DM2
NC
61
RAM_DQ<72>
RAM_DQ<74>
150
166
167
168
RAM_CS_DIMM_B
59 61
DM3
NC
61 59
61 59
RAM_DQ<84>
RAM_DQ<85>
59 61
61 59
ECC
ECC
61 59
61 59
DM8
NC
61 59
61 59
ECC
ECC
61 59
169
170
61 59
RAM_CKE_DIMM_B
172
173
59 61 68
61 59
59 61 68
61 59
RAM_A<8>
RAM_A<6>
180
181
59 61 68
61 59
RAM_A<3>
RAM_A<1>
183
184
RAM_DQ<117>
RAM_DQ<114>
RAM_DQS_N<14>
RAM_DQS_P<14>
RAM_DQ<118>
RAM_DQ<112>
59 61 68
61 59
182
RAM_DQ<109>
RAM_DQ<104>
59 61 68
61 59
179
RAM_DQS_N<13>
RAM_DQS_P<13>
59 61 68
RAM_A<12>
RAM_A<9>
177
178
RAM_DQ<111>
RAM_DQ<105>
SA2
NC
61 59
175
176
RAM_DQ<101>
RAM_DQ<96>
61 62
RAM_A<15>
RAM_A<14>
174
RAM_DQS_N<12>
RAM_DQS_P<12>
59 61
61 59
171
RAM_DQ<100>
RAM_DQ<102>
59 61
61 59
159
160
164
165
61 59
61 59
157
158
162
163
59 61
RAM_DQ<86>
RAM_DQ<83>
153
161
RAM_WE_L
RAM_CAS_L
59 61
61 59
151
152
154
155
156
RAM_A<10>
RAM_BA<0>
ODT
148
149
RAM_DQ<127>
RAM_DQ<122>
59 61 68
59 61 68
61 59
61 59
KEY
61 59
61 59
39
39
KEY
J6700 CK0
VSS
CK0_L
67
F-RT-TH-LF VDD
VDD
(2 OF 2)
68
NC/PAR_IN
A0
69
VDD
VDD
70
A10/AP
BA1
71
BA0
VDDQ
72
VDDQ
RAS_L
73
WE_L
S0_L
74
CAS_L
VDDQ
75
ODT0
VDDQ
76
NC/A13
S1_L
77
VDD
ODT1
78
VDDQ
VSS
79
VSS
DQ36
80
DQ32
DQ37
81
DQ33
VSS
82
VSS
DM4/DQS13
83
NC/DQS13_L
DQS4_L
84
DQS4
VSS
85
VSS
DQ38
86
DQ34
DQ39
87
VSS
DQ35
88
VSS
DQ44
89
DQ40
DQ45
90
VSS
DQ41
91
DM5/DQS14
VSS
92
DQS5_L
NC/DQS14_L
93
DQS5
VSS
94
VSS
DQ46
95
DQ42
DQ47
96
VSS
DQ43
97
VSS
DQ52
98
DQ48
DQ53
99
DQ49
VSS
100
VSS
CK2/RFU
101
CK2_L/RFU
SA2
102
NCTEST
VSS
103
VSS
DM6/DQS15
104
DQS6_L
NC/DQS15_L
105
DQS6
VSS
106
DQ54
VSS
107
DQ50
DQ55
108
DQ51
VSS
109
DQ60
VSS
110
DQ56
DQ61
111
DQ57
VSS
112
VSS
DM7/DQS16
113
DQS7_L
NC/DQS16_L
114
DQS7
VSS
115
VSS
DQ62
116
DQ58
DQ63
117
DQ59
VSS
118
VSS
VDDSPD
119
SA0
SDA
120
SA1
SCL
139
140
141
VSS
RAM_DQS_N<15>
RAM_DQS_P<15>
RAM_DQ<124>
RAM_DQ<120>
I2C_NB_RAM_SDA
I2C_NB_RAM_SCL
VDDQ=1.8V
J6700 VSS
VDD=1.8V
DDR2-DIMM
R6702 1
VREF
VDD=1.8V
MIN_LINE_WIDTH=1MM
1%
1/16W
MF-LF
402
516-0128
1
RAM_DIMM_VREF
VDDQ=1.8V
1%
1/16W
MF-LF
402
VDD=1.8V
56.2
VDD=1.8V
R6701 1
=PP1V8_PWRON_DIMM
VDDQ=1.8V
70 69 67 7
185
186
RAM_DIMM_A_CLK_P0
RAM_DIMM_A_CLK_N0
61 62
187
188
RAM_A<0>
59 61 68
190
191
RAM_BA<1>
59 61 68
192
193
RAM_RAS_L
RAM_CS_DIMM_A
61 62
189
59 61 68
61
194
195
196
RAM_ODT_DIMM_A
RAM_A<13>
61
59 61 68
197
198
199
RAM_DQ<99>
RAM_DQ<97>
200
201
202
203
204
RAM_DQ<98>
RAM_DQ<103>
206
207
208
59 61
59 61
RAM_DQ<107>
RAM_DQ<108>
209
210
212
213
59 61
DM4
NC
205
211
59 61
59 61
59 61
DM5
NC
214
215
RAM_DQ<110>
RAM_DQ<106>
59 61
59 61
216
217
218
RAM_DQ<115>
RAM_DQ<116>
59 61
59 61
219
220
221
RAM_DIMM_A_CLK_P2
RAM_DIMM_A_CLK_N2
61 62
61 62
222
223
224
225
DM6
NC
RAM_DQ<113>
RAM_DQ<119>
226
227
228
59 61
59 61
RAM_DQ<125>
RAM_DQ<126>
229
230
59 61
59 61
231
232
233
DM7
NC
234
RAM_DQ<121>
RAM_DQ<123>
235
236
59 61
59 61
237
238
239
=PP1V8_PWRON_RAM_I2C_VDD 7
RAM_DIMM_A_SA0
240
R6704
1
SA1
10K
5%
1/16W
MF-LF
402
ADDR=2 (A4/A5)
C6715
0.22UF
20%
6.3V
X5R
402
Memory Dimm A

PLACE CAPS CLOSE TO VDD/VDDQ PINS OF DIMM SOCKET

70 69 67 7
=PP1V8_PWRON_DIMM

1
C6701
2.2UF
6.3V
CERM1
603
C6702
0.22UF
20%
2
6.3V
X5R
402
C6703
0.22UF
20%
2
C6704
0.22UF
20%
2
X5R
402
6.3V
X5R
402
C6705
0.22UF
20%
6.3V
6.3V
X5R
402
C6706
0.22UF
20%
2
6.3V
X5R
402
C6707
0.22UF
20%
2
C6708
0.22UF
20%
2
X5R
402
6.3V
X5R
402
C6709
0.22UF
20%
6.3V
6.3V
X5R
402
C6710
0.22UF
20%
2
6.3V
X5R
402
C6711
0.22UF
20%
2
6.3V
X5R
402
C6712
0.22UF
20%
2
6.3V
X5R
402
C6713
0.22UF
20%
2
6.3V
X5R
402
C6714
2.2UF
20%
2
6.3V
CERM1
603
C6719
0.22UF
20%
2
6.3V
X5R
402
C6721
0.22UF
20%
2
6.3V
X5R
402
C6722
0.22UF
20%
2

SIZE
20%
2
6.3V
X5R
402
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
REV.
F
OF
67
154
ONBOARD MEMORY SHOULD FOLLOW SPEC FOR RAW CARD VERSION A
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
61 59
RAM_DQ<0>
RAM_DQ<1>
RAM_DQ<2>
RAM_DQ<3>
RAM_DQ<4>
RAM_DQ<5>
RAM_DQ<6>
RAM_DQ<7>
RAM_DQ<8>
RAM_DQ<9>
RAM_DQ<10>
RAM_DQ<11>
RAM_DQ<12>
RAM_DQ<13>
RAM_DQ<14>
RAM_DQ<15>
RAM_DQ<16>
RAM_DQ<17>
RAM_DQ<18>
RAM_DQ<19>
RAM_DQ<20>
RAM_DQ<21>
RAM_DQ<22>
RAM_DQ<23>
RAM_DQ<24>
RAM_DQ<25>
RAM_DQ<26>
RAM_DQ<27>
RAM_DQ<28>
RAM_DQ<29>
RAM_DQ<30>
RAM_DQ<31>
RAM_DQ<32>
RAM_DQ<33>
RAM_DQ<34>
RAM_DQ<35>
RAM_DQ<36>
RAM_DQ<37>
RAM_DQ<38>
RAM_DQ<39>
RAM_DQ<40>
RAM_DQ<41>
RAM_DQ<42>
RAM_DQ<43>
RAM_DQ<44>
RAM_DQ<45>
RAM_DQ<46>
RAM_DQ<47>
RAM_DQ<48>
RAM_DQ<49>
RAM_DQ<50>
RAM_DQ<51>
RAM_DQ<52>
RAM_DQ<53>
RAM_DQ<54>
RAM_DQ<55>
RAM_DQ<56>
RAM_DQ<57>
RAM_DQ<58>
RAM_DQ<59>
RAM_DQ<60>
RAM_DQ<61>
RAM_DQ<62>
RAM_DQ<63>
RAM_DQS_P<0>
RAM_DQS_N<0>
RAM_DQS_P<1>
RAM_DQS_N<1>
RAM_DQS_P<2>
RAM_DQS_N<2>
RAM_DQS_P<3>
RAM_DQS_N<3>
RAM_DQS_P<4>
RAM_DQS_N<4>
RAM_DQS_P<5>
RAM_DQS_N<5>
RAM_DQS_P<6>
RAM_DQS_N<6>
RAM_DQS_P<7>
RAM_DQS_N<7>
22
RP6800
22
RP6800
22
RP6801
22
RP6801
22
RP6801
22
RP6800
22
RP6801
22
RP6800
22
RP6802
22
RP6803
22
RP6803
22
RP6802
22
RP6803
22
RP6802
22
RP6803
22
RP6802
22
RP6805
22
RP6805
22
RP6804
22
RP6805
22
RP6804
22
RP6804
22
RP6804
22
RP6805
22
RP6807
22
RP6806
22
RP6806
22
RP6807
22
RP6807
22
RP6806
22
RP6807
22
RP6806
22
RP6809
22
RP6808
22
RP6808
22
RP6809
22
RP6809
22
RP6808
22
RP6809
22
RP6808
22
RP6810
22
RP6811
22
RP6811
22
RP6810
22
RP6811
22
RP6810
22
RP6811
22
RP6810
22
RP6812
22
RP6812
22
RP6813
22
RP6813
22
RP6813
22
RP6813
22
RP6812
22
RP6812
22
RP6814
22
RP6815
22
RP6815
22
RP6815
22
RP6814
22
RP6814
22
RP6815
22
RP6814
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
R6800
R6810
R6801
R6811
R6802
R6812
R6803
R6813
R6804
R6814
R6805
R6815
R6806
R6816
R6807
R6817
RAM_DQ_R<0>
RAM_DQ_R<1>
RAM_DQ_R<2>
RAM_DQ_R<3>
RAM_DQ_R<4>
RAM_DQ_R<5>
RAM_DQ_R<6>
RAM_DQ_R<7>
RAM_DQ_R<8>
RAM_DQ_R<9>
RAM_DQ_R<10>
RAM_DQ_R<11>
RAM_DQ_R<12>
RAM_DQ_R<13>
RAM_DQ_R<14>
RAM_DQ_R<15>
RAM_DQ_R<16>
RAM_DQ_R<17>
RAM_DQ_R<18>
RAM_DQ_R<19>
RAM_DQ_R<20>
RAM_DQ_R<21>
RAM_DQ_R<22>
RAM_DQ_R<23>
RAM_DQ_R<24>
RAM_DQ_R<25>
RAM_DQ_R<26>
RAM_DQ_R<27>
RAM_DQ_R<28>
RAM_DQ_R<29>
RAM_DQ_R<30>
RAM_DQ_R<31>
RAM_DQ_R<32>
RAM_DQ_R<33>
RAM_DQ_R<34>
RAM_DQ_R<35>
RAM_DQ_R<36>
RAM_DQ_R<37>
RAM_DQ_R<38>
RAM_DQ_R<39>
RAM_DQ_R<40>
RAM_DQ_R<41>
RAM_DQ_R<42>
RAM_DQ_R<43>
RAM_DQ_R<44>
RAM_DQ_R<45>
RAM_DQ_R<46>
RAM_DQ_R<47>
RAM_DQ_R<48>
RAM_DQ_R<49>
RAM_DQ_R<50>
RAM_DQ_R<51>
RAM_DQ_R<52>
RAM_DQ_R<53>
RAM_DQ_R<54>
RAM_DQ_R<55>
RAM_DQ_R<56>
RAM_DQ_R<57>
RAM_DQ_R<58>
RAM_DQ_R<59>
RAM_DQ_R<60>
RAM_DQ_R<61>
RAM_DQ_R<62>
RAM_DQ_R<63>
67 61 59
61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
6 61 69
67 61 59
RAM_A<0>
RAM_A<1>
RAM_A<2>
RAM_A<3>
RAM_A<4>
RAM_A<5>
RAM_A<6>
RAM_A<7>
RAM_A<8>
RAM_A<9>
RAM_A<10>
RAM_A<11>
RAM_A<12>
RAM_A<13>
RAM_A<14>
RAM_A<15>
5.1
RP6824
5.1
RP6823
5.1
RP6823
5.1
RP6822
5.1
RP6822
5.1
RP6822
5.1
RP6822
5.1
RP6821
5.1
RP6821
5.1
RP6821
5.1
RP6824
5.1
RP6821
5.1
RP6820
5.1
RP6825
5.1
RP6820
5.1
RP6820
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
61 63 69 70
ZT6800
ZT6802
61 63 69 70
61 63 69 70
61 63 69 70
61 63 69 70
ZT6809
ZT6811
ZT6813
ZT6812
61 63 69 70
61 63 69 70
ZT6807
1
ZT6810
61 63 69 70
61 63 69 70
ZT6805
1
ZT6808
61 63 69 70
61 63 69 70
ZT6803
1
ZT6806
61 63 69 70
61 63 69 70
ZT6801
1
ZT6804
61 63 69 70
61 63 69 70
ZT6814
61 63 69 70
61 69
ZT6815
6 61 69
VIAS FOR ECC STUB

6 61 69
61 69
6 61 69
6 61 69
6 61 69
6 61 69
61 69
6 61 69
6 61 69
61 69
61 69
6 61 69
67 61 59
RAM_BA<0>
5.1
RP6824
RAM_BA_R<0>
6 61 69
61 63 69
70
ZT6820
6 61 69
6 61 69
6 61 70
67 61 59
RAM_BA<1>
5.1
RP6824
RAM_BA_R<1>
61 63 69 70
1
ZT6821
6 61 70
6 61 70
61 70
67 61 59
RAM_BA<2>
5.1
RP6820
RAM_BA_R<2>
6 61 70
61 63 69
70
ZT6822
61 63 69
70
ZT6825
61 63 69
70
ZT6826
61 63 69
70
ZT6827
6 61 70
6 61 70
61 70
6 61 70
6 61 70
67 61 59
RAM_RAS_L
5.1
RP6825
RAM_RAS_L_R
61 70
6 61 70
6 61 70
67 61 59
RAM_CAS_L
5.1
RP6825
RAM_CAS_L_R
6 61 70
6 61 70
61 70
6 61 70
67 61 59
RAM_WE_L
5.1
RP6825
RAM_WE_L_R
6 61 70
6 61 70
61 70
VIAS FOR ECC STUB
6 61 70
6 61 70
6 61 70
61 70
6 61 70
6 61 70
6 61 70
6 61 70
6 61 70
61 70
61 70
6 61 70
DIFFERENTIAL_PAIR=RAM_DQS_R_0_DP
RAM_DQS_P_R<0>
RAM_DQS_N_R<0>
RAM_DQS_P_R<1>
RAM_DQS_N_R<1>
RAM_DQS_P_R<2>
RAM_DQS_N_R<2>
RAM_DQS_P_R<3>
RAM_DQS_N_R<3>
RAM_DQS_P_R<4>
RAM_DQS_N_R<4>
RAM_DQS_P_R<5>
RAM_DQS_N_R<5>
RAM_DQS_P_R<6>
RAM_DQS_N_R<6>
RAM_DQS_P_R<7>
RAM_DQS_N_R<7>
61 69
61 69
61 69
PLACE NEAR KODIAK

PRIOR TO BRANCH
61 69
PLACE AT END POINT

TO SIMULATE ECC
61 69
61 69
C6870
61 69
24PF
61 69
RAM_CS_L_R<0>
C6871
61 63 69 70
2PF
61 70
5%
50V
C0G
402
+/-0.25PF
50V
C0G
402-1
C6880
C6881
61 70
61 70
61 70
61 70
24PF
61 70
61 70
61 70
+/-0.25PF
50V
C0G
402-1
C6890
C6891
61 62 63 69 70
5%
50V
C0G
402
24PF
RAM_CKE_R<0>
2PF
RAM_ODT_R<0>
MLB Mem Series Term
61 63 69 70
2PF

5%
50V
C0G
402
+/-0.25PF
50V
C0G
402-1

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
68
1
154
70 69 67 7
70 69 68 63 62 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
VDDQ
RAM_CKE_R<0>
E8
F8
CK
CK*
F2
CKE
DM/RDQS
NU/RDQS*
DQ0
SDRAM-64MX8-DDR2-533 DQ1
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
U6900
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
NC/A13
NC/A14
NC/A15
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
G2
G3
G1
BA0
BA1
NC/BA2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
C6903
0.22UF
0.22UF
20%
6.3V
2 X5R
402
DOES VDDL NEED A SPECIAL FILTER?

CHECK DECOUPLING - TRY TO MATCH SINGLE RANK DIMM
20%
6.3V
2 X5R
402
69 62 61
RAM_DQS_P_R<0>
RAM_DQS_N_R<0>
61 68
69 62 61
70 69 68 63 62 61
70 69 68 63 61
70 69 68 63 61
RAM_DQ_R<3>
RAM_DQ_R<1>
RAM_DQ_R<6>
RAM_DQ_R<7>
RAM_DQ_R<5>
RAM_DQ_R<2>
RAM_DQ_R<0>
RAM_DQ_R<4>
CS*
G8
RAM_CS_L_R<0>
RAS*
CAS*
WE*
F7
G7
F3
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
61 68
70 69 68 63 61
61 68
61 63 68 69 70
70 69 68 63 61
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
F9
ODT
RAM_ODT_R<0>
61 63 68 69 70
70 69 68 63 61
70 69 68 63 61
E2
VREF
K9
J1
E3
A3
PPVREF_RAM_ONBOARD_0123
VSSQ
VSS
70 69 68 63 61
CK
CK*
RAM_CKE_R<0>
F2
CKE
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC/A13
NC/A14
NC/A15
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
G2
G3
G1
BA0
BA1
NC/BA2
2.2UF
DQS
DQS*
DM/RDQS
NU/RDQS*
DQ0
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
OMIT
U6910
VSSDL
R6919
C6900
1
TERM RESISTOR FOR DRAM
C6912
0.22UF
20%
2 6.3V
X5R
402
B7
A8
C6913
0.22UF
20%
2 6.3V
X5R
402
RAM_DQS_P_R<1>
RAM_DQS_N_R<1>
C6914
0.22UF
20%
2 6.3V
X5R
402
61 68
61 68
B3
A2
C8
C2
D7
D3
D1
D9
B1
B9
RAM_DQ_R<12>
RAM_DQ_R<8>
RAM_DQ_R<14>
RAM_DQ_R<15>
RAM_DQ_R<13>
RAM_DQ_R<10>
RAM_DQ_R<11>
RAM_DQ_R<9>
CS*
G8
RAM_CS_L_R<0>
RAS*
CAS*
WE*
F7
G7
F3
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
6 61 68
6 61 68
6 61 68
61 68
6 61 68
61 68
6 61 68
6 61 68
61 63 68 69 70
61 63 68 69 70
61 63 68 69 70
61 63 68 69 70
ODT
F9
RAM_ODT_R<0>
C6919
ZTCLK0_L_N
ZTCLK0_M_N
2PF
1
INCREASE TO 2PF FOR NON-ECC

OTHERWISE 1PF
ZTCLK0_R_N
VREF
E2
61 63 68 69 70
VSSQ
69
C6910
1UF
10%
2 6.3V
CERM
402
ZTCLK0_M_P
VSS
200
1
ZTCLK0_L_P
2PF
ZTCLK0_R_P
VDDQ
C6911
20%
2 10V
CERM
805
69
10%
6.3V
2 CERM
402
200
VDD
VDDL
E8
F8
1UF
C6909
61 68
B3
A2
C8
C2
D7
D3
D1
D9
B1
B9
=PP1V8_PWRON_DIMM
C6904
70 69 68 63 61
E7
20%
6.3V
2 X5R
402
70 69 68 63 61
VSSDL
R6909
1
B7
A8
OMIT
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
0.22UF
20%
10V
2 CERM
805
DQS
DQS*
C6902
A9
C1
C3
C7
C9
VDD
VDDL
A1
E9
H9
L1
A9
C1
C3
C7
C9
2.2UF
D8
D2
B8
B2
A7
69 62 61
ZTCLK0_N
C6901
D8
D2
B8
B2
A7
69 62 61
ZTCLK0_P
A1
E9
H9
L1
K9
J1
E3
A3
=PP1V8_PWRON_DIMM
E1
70 69 67 7
E1
E7
R6914
TERM RESISTOR FOR ECC STUB
200
1
ZT6900
VIAS TO SIMULATE ECC STUB
ZT6910
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
E8
F8
CK
CK*
RAM_CKE_R<0>
F2
CKE
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC/A13
NC/A14
NC/A15
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
G2
G3
G1
BA0
BA1
NC/BA2
DM/RDQS
OMIT
NU/RDQS*
DQ0
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
U6920
E7
0.22UF
20%
6.3V
2 X5R
402
RAM_DQS_P_R<2>
RAM_DQS_N_R<2>
C6923
0.22UF
20%
6.3V
2 X5R
402
70 69 67 7
C6924
20%
6.3V
2 X5R
402
61 68
69 62 61
61 68
69 62 61
70 69 68 63 62 61
70 69 68 63 61
RAM_DQ_R<22>
RAM_DQ_R<16>
RAM_DQ_R<20>
RAM_DQ_R<23>
RAM_DQ_R<19>
RAM_DQ_R<18>
RAM_DQ_R<17>
RAM_DQ_R<21>
CS*
G8
RAM_CS_L_R<0>
RAS*
CAS*
WE*
F7
G7
F3
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
70 69 68 63 61
61 63 68 69 70
61 63 68 69 70
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
R6925
61 63 68 69 70
56.2
ODT
F9
RAM_ODT_R<0>
70 69 68 63 61
1%
1/16W
MF-LF
2 402
61 63 68 69 70
VREF
VSSQ
E2
69
70 69 68 63 61
70 69 68 63 61
C6920
70 69 68 63 61
RAM_CKE_R<0>
F2
CKE
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC/A13
NC/A14
NC/A15
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
G2
G3
G1
BA0
BA1
NC/BA2
VDD
VDDQ
1%
1/16W
MF-LF
2 402
U6930
VSSQ
200
C6939
ZTCLK2_L_P
2PF
1
ZTCLK2_R_N
2.2UF
DM/RDQS
OMIT
NU/RDQS*
DQ0
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
VSS
C6931
20%
10V
2 CERM
805
DQS
DQS*
VSSDL
R6939
56.2
2PF
1
CK
CK*
R6926
1UF
C6929
1
E8
F8
10%
6.3V
2 CERM
402
200
ZTCLK2_R_P
70 69 68 63 61
70 69 68 63 61
VSS
VDDL
B3
A2
C8
C2
D7
D3
D1
D9
B1
B9
=PP1V8_PWRON_DIMM
0.22UF
A9
C1
C3
C7
C9
C6922
70 69 68 63 61
VSSDL
R6929
1
B7
A8
DQS
DQS*
A1
E9
H9
L1
VDDQ
20%
10V
2 CERM
805
E1
A9
C1
C3
C7
C9
VDD
VDDL
2.2UF
D8
D2
B8
B2
A7
C6921
K9
J1
E3
A3
70 69 68 63 62 61
ZTCLK2_N
D8
D2
B8
B2
A7
69 62 61
K9
J1
E3
A3
69 62 61
ZTCLK2_P
A1
E9
H9
L1
E7
=PP1V8_PWRON_DIMM
E1
70 69 67 7
B7
A8
C6932
0.22UF
20%
6.3V
2 X5R
402
C6933
0.22UF
20%
6.3V
2 X5R
402
RAM_DQS_P_R<3>
RAM_DQS_N_R<3>
C6934
0.22UF
20%
6.3V
2 X5R
402
61 68
61 68
B3
A2
C8
C2
D7
D3
D1
D9
B1
B9
RAM_DQ_R<28>
RAM_DQ_R<29>
RAM_DQ_R<30>
RAM_DQ_R<31>
RAM_DQ_R<25>
RAM_DQ_R<27>
RAM_DQ_R<26>
RAM_DQ_R<24>
CS*
G8
RAM_CS_L_R<0>
RAS*
CAS*
WE*
F7
G7
F3
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
6 61 68
6 61 68
6 61 68
6 61 68
61 68
61 68
6 61 68
61 63 68 69 70
61 63 68 69 70
61 63 68 69 70
61 63 68 69 70
ODT
F9
RAM_ODT_R<0>
VREF
E2
1
6 61 68
61 63 68 69 70
69
C6930
1UF
10%
6.3V
2 CERM
402
On-Board DDR SDRAM
ZTCLK2_L_N
1
ZTCLK2_M_P
ZTCLK2_M_N
R6934
1

200

1
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
IC,SDRAM,DDR2,512MBIT,X8
U6900,U6910,U6920,U6930
CRITICAL
BOM OPTION
ZT6930
ZT6920
SIZE
DRAWING NUMBER
REV.
TABLE_5_ITEM
333T0032
APPLE COMPUTER INC.
TABLE_5_ITEM
333T0032
IC,SDRAM,DDR2,512MBIT,X8
U7040,U7050,U7060,U7070
CRITICAL
051-6863
SCALE
SHT
NONE
F
OF
69
154
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
VDDQ
RAM_CKE_R<0>
E8
F8
CK
CK*
F2
CKE
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
G2
G3
G1
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
DM/RDQS
NU/RDQS*
DQ0
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
OMIT
U7040
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
CS*
RAS*
CAS*
WE*
NC/A13
NC/A14
NC/A15
ODT
C7044
70 69 67 7
20%
6.3V
2 X5R
402
DOES VDDL NEED A SPECIAL FILTER?

CHECK DECOUPLING - TRY TO MATCH SINGLE RANK DIMM
61 68
70 62 61
61 68
70 62 61
70 69 68 63 62 61
70 69 68 63 61
C8
C2
D7
D3
D1
D9
B1
B9
RAM_DQ_R<38>
RAM_DQ_R<34>
RAM_DQ_R<36>
RAM_DQ_R<37>
RAM_DQ_R<33>
RAM_DQ_R<35>
RAM_DQ_R<39>
RAM_DQ_R<32>
G8
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
61 68
70 69 68 63 61
61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
70 69 68 63 61
RAM_CS_L_R<0>
F7
G7
F3
61 63 68 69 70
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
F9
61 63 68 69 70
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
70 69 68 63 61
RAM_ODT_R<0>
VSSQ
VSS
RAM_CKE_R<0>
VDD
VDDQ
VDDL
E8
F8
CK
CK*
F2
CKE
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
DM/RDQS
NU/RDQS*
DQ0
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
U7050
NC/A13
NC/A14
NC/A15
70
70 69 68 63 61
G2
G3
G1
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
C7040
10%
6.3V
2 CERM
402
BA0
BA1
NC/BA2
C7052
20%
6.3V
2 X5R
402
C7053
0.22UF
20%
6.3V
2 X5R
402
RAM_DQS_P_R<5>
RAM_DQS_N_R<5>
C7054
0.22UF
20%
6.3V
2 X5R
402
61 68
61 68
B3
A2
C8
C2
D7
D3
D1
D9
B1
B9
RAM_DQ_R<41>
RAM_DQ_R<45>
RAM_DQ_R<46>
RAM_DQ_R<47>
RAM_DQ_R<43>
RAM_DQ_R<42>
RAM_DQ_R<40>
RAM_DQ_R<44>
CS*
G8
RAM_CS_L_R<0>
RAS*
CAS*
WE*
F7
G7
F3
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
6 61 68
6 61 68
6 61 68
61 68
6 61 68
61 68
6 61 68
6 61 68
61 63 68 69 70
61 63 68 69 70
61 63 68 69 70
R7055
61 63 68 69 70
56.2
VSSDL
R7059
1UF
B7
A8
0.22UF
20%
10V
2 CERM
805
OMIT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
C7051
2.2UF
DQS
DQS*
61 63 68 69 70
70 69 68 63 61
E2
=PP1V8_PWRON_DIMM
0.22UF
70 69 68 63 61
VREF
E7
1
2PF
1
20%
6.3V
2 X5R
402
B3
A2
C7049
1
C7043
0.22UF
RAM_DQS_P_R<4>
RAM_DQS_N_R<4>
200
ZTCLK4_R_P
70 69 68 63 61
BA0
BA1
NC/BA2
B7
A8
20%
6.3V
2 X5R
402
70 69 68 63 61
VSSDL
R7049
1
DQS
DQS*
C7042
A9
C1
C3
C7
C9
A9
C1
C3
C7
C9
VDD
VDDL
0.22UF
20%
10V
2 CERM
805
ODT
F9
VREF
E2
RAM_ODT_R<0>
VSSQ
VSS
1%
1/16W
MF-LF
2 402
61 63 68 69 70
70
C7050
R7056
1UF
D8
D2
B8
B2
A7
2.2UF
K9
J1
E3
A3
70 69 68 63 62 61
ZTCLK4_N
C7041
D8
D2
B8
B2
A7
70 62 61
K9
J1
E3
A3
70 62 61
ZTCLK4_P
A1
E9
H9
L1
E1
=PP1V8_PWRON_DIMM
E1
70 69 67 7
A1
E9
H9
L1
E7
56.2
10%
6.3V
2 CERM
402
200
C7059
1%
1/16W
MF-LF
2 402
2PF
ZTCLK4_R_N
ZTCLK4_L_P
ZTCLK4_L_N
C
ZTCLK4_M_P
R7054
1
ZTCLK4_M_N
200
1
ZT7040
1
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
70 69 68 63 61
E8
F8
CK
CK*
RAM_CKE_R<0>
F2
CKE
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC/A13
NC/A14
NC/A15
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
G2
G3
G1
BA0
BA1
NC/BA2
DM/RDQS
OMIT
NU/RDQS*
DQ0
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
U7060
E7
B7
A8
C7062
0.22UF
20%
6.3V
2 X5R
402
RAM_DQS_P_R<6>
RAM_DQS_N_R<6>
C7063
0.22UF
20%
6.3V
2 X5R
402
20%
6.3V
2 X5R
402
61 68
70 62 61
61 68
70 62 61
70 69 68 63 61
RAM_DQ_R<52>
RAM_DQ_R<48>
RAM_DQ_R<50>
RAM_DQ_R<55>
RAM_DQ_R<54>
RAM_DQ_R<51>
RAM_DQ_R<49>
RAM_DQ_R<53>
CS*
G8
RAM_CS_L_R<0>
RAS*
CAS*
WE*
F7
G7
F3
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
6 61 68
70 69 68 63 61
70 69 68 63 61
61 63 68 69 70
61 63 68 69 70
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
61 63 68 69 70
70 69 68 63 61
70 69 68 63 61
ODT
F9
RAM_ODT_R<0>
70 69 68 63 61
70 69 68 63 61
VREF
VSSQ
E2
1
70
70 69 68 63 61
CK
CK*
RAM_CKE_R<0>
F2
CKE
RAM_A_R<0>
RAM_A_R<1>
RAM_A_R<2>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<5>
RAM_A_R<6>
RAM_A_R<7>
RAM_A_R<8>
RAM_A_R<9>
RAM_A_R<10>
RAM_A_R<11>
RAM_A_R<12>
RAM_A_R<13>
RAM_A_R<14>
RAM_A_R<15>
H8
H3
H7
J2
J8
J3
J7
K2
K8
K3
H2
K7
L2
L8
L3
L7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC/A13
NC/A14
NC/A15
RAM_BA_R<0>
RAM_BA_R<1>
RAM_BA_R<2>
G2
G3
G1
BA0
BA1
NC/BA2
C7060
C7079
2PF
1
ZTCLK6_R_N
2.2UF
DM/RDQS
OMIT
NU/RDQS*
DQ0
HY5PS12821BPF-C4
DQ2
CSP
DQ3
DQ4
DQ5
DQ6
DQ7
U7070
VSS
VSSQ
C7071
20%
10V
2 CERM
805
DQS
DQS*
200
ZTCLK6_L_P
1
VDDQ
VSSDL
R7079
1UF
2PF
1
E8
F8
10%
6.3V
2 CERM
402
C7069
1
VDD
61 63 68 69 70
70 69 68 63 61
VSS
VDDL
70 69 68 63 62 61
C8
C2
D7
D3
D1
D9
B1
B9
=PP1V8_PWRON_DIMM
0.22UF
B3
A2
200
ZTCLK6_R_P
70 69 67 7
C7064
70 69 68 63 61
VSSDL
R7069
1
DQS
DQS*
A9
C1
C3
C7
C9
VDDQ
20%
10V
2 CERM
805
A1
E9
H9
L1
A9
C1
C3
C7
C9
VDD
VDDL
2.2UF
D8
D2
B8
B2
A7
C7061
K9
J1
E3
A3
70 69 68 63 62 61
ZTCLK6_N
D8
D2
B8
B2
A7
70 62 61
K9
J1
E3
A3
70 62 61
ZTCLK6_P
A1
E9
H9
L1
E1
=PP1V8_PWRON_DIMM
E1
70 69 67 7
E7
ZT7050
B7
A8
C7072
0.22UF
20%
6.3V
2 X5R
402
C7073
0.22UF
20%
6.3V
2 X5R
402
RAM_DQS_P_R<7>
RAM_DQS_N_R<7>
C7074
0.22UF
20%
6.3V
2 X5R
402
61 68
61 68
B3
A2
C8
C2
D7
D3
D1
D9
B1
B9
RAM_DQ_R<59>
RAM_DQ_R<56>
RAM_DQ_R<58>
RAM_DQ_R<61>
RAM_DQ_R<60>
RAM_DQ_R<62>
RAM_DQ_R<63>
RAM_DQ_R<57>
CS*
G8
RAM_CS_L_R<0>
RAS*
CAS*
WE*
F7
G7
F3
RAM_RAS_L_R
RAM_CAS_L_R
RAM_WE_L_R
6 61 68
6 61 68
61 68
6 61 68
61 68
6 61 68
6 61 68
61 63 68 69 70
61 63 68 69 70
61 63 68 69 70
61 63 68 69 70
ODT
F9
RAM_ODT_R<0>
VREF
E2
1
6 61 68
61 63 68 69 70
70
C7070
1UF
10%
6.3V
2 CERM
402
On-Board DDR SDRAM
ZTCLK6_L_N
ZTCLK6_M_P
R7074
1
ZT7070

ZT7060
1
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6863
SCALE

200
1
ZTCLK6_M_N
F
OF
70
154
8
82 7
7
L8200
PWR_PCIE_A_AVDD_2
0.22UH
1
KODIAK AVDD FILTERING
82 97
(LOCATE CLOSE TO POWER AND GROUND PINS)
L8203
C8200
C8201
0.01UF
C8202
10UF
10%
16V
10%
6.3V
97 82
PWR_PCIE_A_AVDD_2
97
PWR_PCIE_A_AVDD_A
97 82
PWR_PCIE_A_AVDD_1
97
PWR_PCIE_A_AVDD_B
97 82
PWR_PCIE_A_AVDD_0
97
PWR_PCIE_A_AVDD_C
7 82
C8222
J06
J07
J12
H11
K13
J09
C8225
1UF
10UF
10%
10%
10%
6.3V
6.3V
6.3V
CERM
402
CERM
402
C8224
0.01UF
C8223
1UF
10%
2
16V
CERM
402
X5R
805
(THIS PAGE)
82 7
L8201
PWR_PCIE_A_AVDD_1
0.22UH
1
PCIE_AVDD_0
(1.65V-2.75V)
SERDES
82 97
PCIE_AVDD_1
PCIE_AVDD_2 PCIE_REFCLK_AVDDA
(1.65V-2.75V) (1.65V-2.75V)
(1.65V-2.75V)
SERDES
SERDES
PLL
C8204
C8205
10UF
1UF
10%
6.3V
X5R
805
10%
6.3V
KODIAK-ASIC-040812
A08
A12
KOD_K07_GND
B06
(THIS PAGE)
82 7
L8202
B10
PWR_PCIE_A_AVDD_0
0.22UH
1
82 97
C03
D01
D04
0805-1
D08
1
C8206
C8207
1UF
10%
6.3V
X5R
805
10%
CERM
402
KODIAK PCI-E
100MHZ REFCLK
PP8201
SM
PP
6.3V
CERM
402
1
D12
E06
2
E10
82 7
97 9
97 9
E14
J11
CLK_KOD_100M_PF<0>
CLK_KOD_100M_NF<0>
J10
P4MM
97 84 9
PP8200
97 84 9
97 84 9
97 84 9
97 84 9
C8245
R8202
CLK_KOD_100M_P<0>
20.5
97 84 9
0.01UF
97 9
100M_P<0>
97 84 9
97 84 9
1%
1/16W
MF-LF
402
NOSTUFF
R8203
97 84 9
16V
CERM
402
1%
1/16W
MF-LF
402 2
0.01UF
1
10%
29.4
C8244
97 84 9
97 84 9
97 84 9
100M_G
97 84 9
10%
97 84 9
R8204 1
16V
CERM
402
97 84 9
29.4
1%
1/16W
MF-LF
402 2
R8205
97 26
CLK_KOD_100M_N<0>
20.5
97 9
97 84 9
C8246
97 84 9
0.01UF
1
100M_N<0>
97 84 9
97 84 9
1%
1/16W
MF-LF
402
KODIAK PCIE REFCLK

TERMINATION
10%
97 84 9
16V
CERM
402
97 84 9
97 84 9
(LOCATE CLOSE TO INPUT PINS)
97 84 9
97 84 9
97 84 9
97 84 9
82 7
97 84 9
97 84 9
R8200
8.2K
5%
1/16W
MF-LF
402 2
84 6
97 84 9
97 84 9
97 84 9
97 84 9
PCIE_SLOTA_TO_NB_N<0>
PCIE_SLOTA_TO_NB_P<0>
G04
G01
G02
C04
C05
C07
C06
E01
E02
J05
J04
H06
G06
E05
D05
D11
E11
F12
F13
H09
G09
F09
F08
G13
H13
C13
C12
D07
E07
G07
F07
F14
PCIE_VCAL_RES0
PCIE_VCAL_RES1
J14
7 82
F05
0805-1
G08
1
G12
H01
H04
H07
C8228
C8229
1UF
10UF
10%
10%
6.3V
CERM
402
C8230
0.01UF
10%
6.3V
16V
X5R
805
CERM
402
H10
H14
KOD_H08_GND
K12
6 82 97
(THIS PAGE)
L11
L14
M12
=PPVCORE_PWRON_NB_PCIE
7 82
C8209
7 82
A10
C8212
B08
1UF
1UF
1UF
1UF
B12
10%
10%
10%
10%
6.3V
CERM
402
C8210
6.3V
CERM
402
C8211
6.3V
CERM
402
6.3V
D02
CERM
402
D06
D14
E08
E12
C8213
C8214
C8215
C8216
1UF
1UF
1UF
1UF
10%
10%
10%
10%
6.3V
CERM
402
6.3V
CERM
402
6.3V
CERM
402
PCIE_REFCLK_P
PCIE_REFCLK_N
KODIAK PCI-E AC COUPLERS

(LOCATE NEAR SOURCE PINS)
(100MHZ)
PCIE_HSIN0
PCIE_HSIP0
PCIE_HSIN1
PCIE_HSIP1
PCIE_HSIN2
PCIE_HSIP2
PCIE_HSIN3
PCIE_HSIP3
PCIE_HSIN4
PCIE_HSIP4
PCIE_HSIN5
PCIE_HSIP5
PCIE_HSIN6
PCIE_HSIP6
PCIE_HSIN7
PCIE_HSIP7
PCIE_HSIN8
PCIE_HSIP8
PCIE_HSIN9
PCIE_HSIP9
PCIE_HSIN10
PCIE_HSIP10
PCIE_HSIN11
PCIE_HSIP11
PCIE_HSIN12
PCIE_HSIP12
PCIE_HSIN13
PCIE_HSIP13
PCIE_HSIN14
PCIE_HSIP14
PCIE_HSIN15
PCIE_HSIP15
PCIE_PRESENTN
(DNU)
PCIE_UCAL_RES0
PCIE_UCAL_RES1
PCIE_HSON0
PCIE_HSOP0
PCIE_HSON1
PCIE_HSOP1
PCIE_HSON2
PCIE_HSOP2
PCIE_HSON3
PCIE_HSOP3
PCIE_HSON4
PCIE_HSOP4
PCIE_HSON5
PCIE_HSOP5
PCIE_HSON6
PCIE_HSOP6
PCIE_HSON7
PCIE_HSOP7
PCIE_HSON8
PCIE_HSOP8
PCIE_HSON9
PCIE_HSOP9
PCIE_HSON10
PCIE_HSOP10
PCIE_HSON11
PCIE_HSOP11
PCIE_HSON12
PCIE_HSOP12
PCIE_HSON13
PCIE_HSOP13
PCIE_HSON14
PCIE_HSOP14
PCIE_HSON15
PCIE_HSOP15
D03
97 9
E03
97 9
J01
97 9
J02
97 9
C01
97 9
C02
97 9
PCIE_AVREG_2
PCIE_AVREG_1
PCIE_AVREG_0
G11
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
F04
A07
97 9
B07
97 9
F03
97 9
G03
97 9
H03
97 9
J03
97 9
A03
97 9
B03
97 9
A05
97 9
B05
97 9
C11
97 9
C10
97 9
B11
97 9
A11
97 9
F11
97 9
F10
97 9
B09
97 9
A09
97 9
D13
97 9
E13
97 9
B13
97 9
A13
97 9
D09
97 9
E09
97 9
C08
97 9
C09
97 9
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
PCIE_NB_TO_SLOTA_NF<0>
PCIE_NB_TO_SLOTA_PF<0>
NC_A_AVREG_2
NC_A_AVREG_1
NC_A_AVREG_0
J08
E04
F01
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
PCIE_GND
AVDD_0_GND
C8231
REFCLK_AGNDA
REFCLK_AGNDB
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
9 84 97
7 82
F06
C8232
1UF
C8233
1UF
C8234
1UF
C8235
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
CERM
402
CERM
402
C8237
CERM
402
C8238
1UF
10%
6.3V
CERM
402
C8239
C8236
1UF
10%
CERM
402
6.3V
CERM
402
G14
H02
H12
1
K10
C8241
1UF
K14
2
L12
C8242
1UF
C8243
1UF
1UF
1UF
1UF
10%
10%
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
C8240
1UF
10%
CERM
402
6.3V
CERM
402
M11
M13
KODIAK PCI-E DECOUPLING
AVDD_2_GND
9 84 97
KODIAK PCI-E X16

AVDD_1_GND
PCIE_NB_TO_SLOTA_N<0>
PCIE_NB_TO_SLOTA_P<0>
6.3V
CERM
402
C8247
C8248
C8249
C8250
C8251
C8252
C8253
C8254
C8255
C8256
C8257
C8258
C8259
C8260
C8261
C8262
C8263
C8264
C8265
C8266
C8267
C8268
C8269
C8270
C8271
C8272
C8273
C8274
C8275
C8276
C8277
C8278
1UF
A06
D10
0.22UH
1
1%
1/16W
MF-LF
402 2
B04
SEE_TABLE
L8205
F02
200
B02
(1.6V-1.2V)
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
BGA
(5 OF 10)
R8201 1

G05
AJ02
PCIE_SLOTA_PRSNT_L
KODIAK PCI-E DECOUPLING
(THIS PAGE)
(THIS PAGE)
SM
97 26
(1.6V-1.2V)
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
PCIE_VDD
6 82 97
KOD_H05_GND
97 82 6
P4MM
PP
C8208
10UF
10%
16V
100+
100-
0.01UF
KOD_J13_GND
PCI-E X16 INTERFACE
CERM
402
A04
97 82 6
6 82 97
(THIS PAGE)
10%
16V
KOD_L13_GND
U1900
0.01UF
CERM
402
PCIE_REFCLK_AVDD2
(1.65V-2.75V)
PLL
2
0805-1
C8203
PCIE_REFCLK_AVDDB
(1.65V-2.75V)
PLL
SYNC_MASTER=Q63
REFCLK_AGND2

H05
97 82 6
97 82 6
C8217
1UF
2
C8218
1UF
C8219
1UF
C8220
1UF
C8221
10%
10%
10%
10%
10%
6.3V
6.3V
6.3V
6.3V
6.3V
CERM
402
CERM
402
CERM
402
CERM
402
97 82 6
1UF
2
K07
G10
J13
L13
H08
KOD_H05_GND
KOD_K07_GND
KOD_G10_GND
KOD_H08_GND
KOD_L13_GND
KOD_J13_GND
(THIS PAGE, X3)
XW8200
SM
1
6 82 97
6 82 97
XW8201
XW8202
SM
XW8203
SM
1

6 82 97
PAGE 82
XW8204
SM
XW8205
SM
1
SIZE
SM
1
APPLE COMPUTER INC.
DRAWING NUMBER
REV.
051-6863
SCALE
SHT
NONE
1 13:47:03 2005
(THIS PAGE, X3)

2
CERM
402

F
OF
82
KOD_G10_GND
97 82 6
PWR_PCIE_A_AVDD
CERM
402
97
0805-1
1UF
10%
6.3V
X5R
805
CERM
402
0.22UH
0805-1
154
DRAWING
PART#
QTY
DESCRIPTION
BOM OPTION
TABLE_5_ITEM
338S0239
IC,RV370 XT, GRAPHICS CTLR
U8400
RV370XT
338S0265
IC,RV380 XT A23, GRAPHICS CTLR
U8400
RV380XT
CRITICAL
TABLE_5_ITEM
CRITICAL
=PP1V2_GPU_PCIE
R8460
PP1V2_GPU_PCIE_VDDR
THIS IS ALIASED TO
PPVCORE_GPU ON PAGE 7
84
VOLTAGE=1.2V
0.3002
REMOVED COMPLIANCE TEST POINTS

FINO WILL PLACE COUPLING CAPACITORS ON RECEIVING SIDE
(THIS IS ALLOWED FOR CHIP TO CHIP PCIE)
CAP PAD CAN BE USED FOR COMPLIANCE TEST
TABLE_5_HEAD
5%
1/8W
MF
805
R8460 BRINGS VDDR FROM

CORE (1.35) TO 1.2
R8461
GROUND VIAS FOR LAYER TRANSITIONS
0.3002
85 84
10%
6.3V
2 CERM
402
MF
SYS_POWERUP_L SHOULD CONTROL THE FET ON PP1V2_RUN
805
D
1
C8450 1 C8451
1UF
10%
6.3V
2 CERM
402
1UF
10%
6.3V
2 CERM
402
C8452 1 C8453
0.1UF
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
1UF
5%
1/8W
PP1V2_GPU_PCIE_PVDD
C8460
C8461 1 C8462
1UF
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
C8463 1 C8464
0.1UF
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
C8465 1 C8466
0.1UF
20%
10V
2 CERM
402
ZH8400
0.1UF
HOLE-VIA
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
ZH8402
HOLE-VIA
PLACE R8470 CLOSE TO U9670
U9670
FERR-220-OHM
1
20
C8444 1 C8445
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
PP1V2_GPU_PCIE_PVDD
97
84 85
97
R8471
97 82 9
301
R8472
1
21
1%
1/16W
MF-LF
2 402
97 82 9
97 82 9
R8473
97
9
CKA_P<0>
1%
1/16W
MF-LF
402
R8474
60.4
97 26
97 82 9
97 82 9
1%
1/16W
MF-LF
402
C8472
97 82 9
97 82 9
97 82 9
5PF
1%
1/16W
MF-LF
2 402
97 26
21
+/-0.25PF
2
97 82 9
50V
CERM
402
97 82 9
CLK_PCIE_SLOTA_P<0>
CLK_PCIE_SLOTA_N<0>
97 82 9
97 82 9
97 82 9
R8476
60.4
1%
1/16W
MF-LF
2 402
R8475
21
1
97 82 9
5PF
97 82 9
+/-0.25PF
2
50V
97
97 82 9
CERM
402
CKA_N<0>
9
2
1%
1/16W
MF-LF
402
C8473
R8477
97 82 9
21
1
97 82 9
1%
1/16W
MF-LF
402
R8478
97 82 9
97 82 9
301
97 82 9
1%
1/16W
MF-LF
2 402
97 82 9
97 82 9
97 82 9
PP1V2_GPU_PCIE_PVDD
97 82 9
84 85
97 82 9
PCI-E SLOTA 100MHZ

REFCLK TERMINATION
97 82 9
97 82 9
97 82 9
(LOCATE CLOSE TO GPU)
97 82 9
97 82 9
97 82 9
B
84
PP1V2_GPU_PCIE_VDDR
100
1%
1/16W
MF-LF
402
33
ZH8403
HOLE-VIA
1
5%
1/16W
MF-LF
402
8.2K
ZH8404
HOLE-VIA
5%
1/16W
MF-LF
402 2
0.1UF
20%
2 10V
CERM
402
CLK_PCIE_SLOTA_PF<0>
CLK_PCIE_SLOTA_NF<0>
AF27 PCIE_REFCLKP
AE27 PCIE_REFCLKN
AH30 PCIE_RX0P
AG30 PCIE_RX0N
AG29 PCIE_RX1P
AF29 PCIE_RX1N
AE29 PCIE_RX2P
R8400
ATI_RESET_L
125
13 TSSOP
ZH8406
ATI_RESET_L_R
HOLE-VIA
GPU PCI-E AC COUPLERS
U8400
BGA
(1 OF 5)
OMIT
AC29 PCIE_RX4P
AB29 PCIE_RX4N
AB30 PCIE_RX5P
AA30 PCIE_RX5N
AA29 PCIE_RX6P
ZH8405
HOLE-VIA
PERST* AD25
RV370XT
AE30 PCIE_RX2N
AD30 PCIE_RX3P
AD29 PCIE_RX3N
AK29
0.1UF
AJ30
20%
2 10V
CERM
402
AG27
AG28
0.1UF
PCIE_VDDR_12
C8442 1 C8443
AG26
10%
2 6.3V
CERM
402
N24
P23
1UF
T23
10%
6.3V
2 CERM
402
N23
1UF
PCIE_PVDD_12
C8440 1 C8441
W23
U23
11
R84691
VOLTAGE=1.8V
0805
12
=GPU_RESET_L
PP1V8_GPU_PCIE_PVDD
PCIE_PVDD_18 V23
=PP1V8_GPU
R8470
14 74LC125
L8440
93 87 86 85
ZH8401
HOLE-VIA
C8454 1 C8455
PCI-E
PCIE_TX0P AF26
PCIE_TX0N AE26
97 9
PCIE_TX1P AC25
PCIE_TX1N AB25
PCIE_TX2P AC27
97 9
PCIE_TX2N AB27
PCIE_TX3P AC26
97 9
PCIE_TX3N AB26
PCIE_TX4P Y25
PCIE_TX4N W25
97 9
97 9
97 9
97 9
97 9
97 9
97 9
PCIE_TX5P Y27
PCIE_TX5N W27
PCIE_TX6P Y26
97 9
Y29 PCIE_RX6N
W29 PCIE_RX7P
W30 PCIE_RX7N
PCIE_TX6N W26
PCIE_TX7P U25
PCIE_TX7N T25
97 9
V30 PCIE_RX8P
V29 PCIE_RX8N
U29 PCIE_RX9P
PCIE_TX8P U27
PCIE_TX8N T27
97 9
97 9
97 9
97 9
97 9
97 9
PCIE_TX9P U26
PCIE_TX9N T26
PCIE_TX10P P25
PCIE_TX10N N25
PCIE_TX11P P27
PCIE_TX11N N27
97 9
T29 PCIE_RX9N
T30 PCIE_RX10P
R30 PCIE_RX10N
R29 PCIE_RX11P
P29 PCIE_RX11N
N29 PCIE_RX12P
N30 PCIE_RX12N
M30 PCIE_RX13P
PCIE_TX12P P26
PCIE_TX12N N26
PCIE_TX13P L25
97 9
M29 PCIE_RX13N
L29 PCIE_RX14P
K29 PCIE_RX14N
PCIE_TX13N K25
PCIE_TX14P L27
97 9
PCIE_TX14N K27
PCIE_TX15P L26
PCIE_TX15N K26
K30 PCIE_RX15P
J30 PCIE_RX15N
97 9
97 9
97 9
97 9
97 9
97 9
97 9
97 9
97 9
97 9
97 9
PCIE_SLOTA_TO_NB_PF<0>
PCIE_SLOTA_TO_NB_NF<0>
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
(PLACE NEAR GPU)
C8400
C8401
C8402
C8403
C8404
C8405
C8406
C8407
C8408
C8409
C8410
C8411
C8412
C8413
C8414
C8415
C8416
C8417
C8418
C8419
C8420
C8421
C8422
C8423
C8424
C8425
C8426
C8427
C8428
C8429
C8430
C8431
9 82 97
ZH8407
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8408
9 82 97
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8409
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8410
9 82 97
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8411
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8412
9 82 97
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8413
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8414
9 82 97
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8415
HOLE-VIA
9 82 97
9 82 97
9 82 97
ZH8416
GPU_PCIE_CALRN
AB24 PCIE_CALRN
PCIE_CALI AB23
GPU_PCIE_CALI
GPU_PCIE_CALRP
AC23 PCIE_CALRP
PCIE_TEST AE25
GPU_PCIE_TEST
R8401
150
1%
1/16W
MF-LF
2 402
K28
L28
AH29
AF28
M24
AE28
AD28
M25
M26 PCIE_VSS
M27
HOLE-VIA
1
R84021
10K
5%
1/16W
MF-LF
402 2
ZH8417
R8403
HOLE-VIA
10K
1%
1/16W
MF-LF
2 402
ZH8418
HOLE-VIA
1
PCIE_VSS AD27
AD26
M28
N28
AD24
AC28
P28
AB28
R23
AA28
ZH8419
HOLE-VIA
1
AA26
AA27
AA25
AA23
AA24
Y28
W24
W28
V27
V28
V26
V24
V25
U28
T24
T28
R28
R26
R27
R24
R25
PCIE_VSS
XW8405
SM
82 6
PCIE_SLOTA_PRSNT_L
GPU PCIe

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
84
154
50 28 12 7 6
74LC125
11
GPU_POWERUP_L
13 85
D8501
125
13 TSSOP
GPU_VCORE_VREG_VC
MBR0520LXXG
SOD-123
R8500
=PP5V_ALL_GPU
C8504
5%
1/8W
MF-LF
2 805
1UF
20%
25V
CERM 2
805
D
85 6
U8500_VC
VC
IRU3037ACS
SOI-LF
CRITICAL HD
85 7
=PP3V3_ALL_GPU
1
C8511
20%
16V
2 CERM
402
R8511
GPU_POWERUP_L
FB
6 7
R8501
U8500_SS_L
Q8501
C8514
0.1UF
20%
16V
2 CERM
603
5%
1/16W
MF-LF
2 402
SO-8
R8501_2
1
D8511
C8523
56PF
85 6
U8500_GND
C8508
10UF
C8517
10UF
10%
6.3V
2 X5R
805
0.5%
1/10W
TF
2 603
10%
2 50V
CERM
603
C8509
1800UF
10%
6.3V
2 X5R
805
20%
2 6.3V
ELEC
TH-KZJ-LF
13 12 11
1
1
GND
PLACE LED8500 NEAR VREG
12
10K
C8512
0.5%
1/16W
MF-LF
2 603
1000PF
5%
50V
2 CERM
1206
SOI-LF
13 LED_GPU_CORE_N
U1201
11
1V1_REF
R8505
2200PF
GREEN-3.6MCD
2.0X1.25MM-SM
LM339A
V+
C8505
LED8500
DEVELOPMENT
3
2 GPU_CORE_FOR_LED 10
5%
1/16W
MF-LF
402
DEVELOPMENT
R8520
VOLTAGE=0V
SOT23
1
C8507 R8503
6.98K
3300PF
R8504_P2
SO-8
5%
2 50V
CERM
603
XW8500
SM
10%
25V
2 CERM
402
LED_GPU_CORE_P
DEVELOPMENT
NOSTUFF
1%
1/4W
MF-LF
2 1206
IRF7805ZPBF
5%
25V
2 CERM
402
0.0047UF
MMBD914XXG
C8506
220PF
5%
50V
2 CERM
402
VOLTAGE=1.25V
5.11
Q8502
C8513
5%
1/16W
MF-LF
2 402
7 86
R8504
6 7
330
1
5
R8519
PPVCORE_GPU
Q8502_DRAIN
U8500_GATE_L
DEVELOPMENT
1
10BQ040PBF
1.53UH
U8500_FEEDBACK
=PP3V3_GPU
D8500
SMB
SM
1
4
1
C8515
1UF
20%
L8501 3
25V
2 CERM
805
IRF7807ZPBF
Q8501_GATE4
7 85 92 93 96
96 93 92 85 7
GND
15K
SOT23-LF
=PP3V3_GPU
2 NOSTUFF
COMP
20%
2 16V
ELEC
SM-LF
Q8500
5%
1/16W
MF-LF
402
LD
5%
1/8W
U8500_GATE_H
MF-LF
MIN_LINE_WIDTH=0.45MM 805 MIN_LINE_WIDTH=0.45MM
2N7002
100K 2
SS
U8500_COMP
0.01UF
85 13
U8500_SS
SOD-123
330UF
MBR0520LXXG
R8502
U8500
PEAK CURRENT OF PPVCORE_GPU

7.2A WITH RV370 XT
8.3A WITH RV380 XT
C8502
GPU_VCORE_VC_D
20%
25V
2 CERM
805
10%
2 16V
CERM
1210
1UF
VCC
C8516
C8510
10UF
SOD-123
D8503
U8500_GND
D8502
MBR0520LXXG
10
1
=PP12V_ALL_GPU
M33=1.332V
7
NOTE:
SET OUTPUT = 1.25V +/- 2% FOR RV370 XT
1.30V +/- 2% FOR RV380 XT
IRU3037ACS VREF = 0.8 VDC
VOUT=VREF*(R8503+R8505)/R8505
M23=1.272V
GPU VCORE VREG
U700
14
SYS_POWERUP_L 12
85 6
C8519
330UF
U8500_GND
C8520
330UF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
U5000_FEEDBACK
GPU 1.20V PCIE PVDD
GPU 1.7V VDDC_CT

96 93 92 85 7
C8590 1
R8597
CRITICAL
4.7UF
3.3K
C8594
GPU_POWERUP_L
100K 2
ADJ 5
20%
2 6.3V
X5R
402
R8591
5.36K
R8544
1%
1/16W
MF-LF
2 402
SOT23-LF
U8540_EN
85 13
GPU_POWERUP_L
47K
4.7UF
3.3K
20%
6.3V
CERM
805
5%
1/16W
MF-LF
402 2
U8560
2
U8560_EN
SOT23-6-LF
VOUT 6
VIN
4 PG
3 EN
ADJ 5
GND
3 NOSTUFF
Q8560
5%
1/16W
MF-LF
402
1%
1/16W
MF-LF
2 402
VOUT = 0.59V * [1 + R8540 / R8541]

VOUT = 1.209V
SOT23-LF
10%
2 50V
CERM
402
96 93 92 85 7
=PP3V3_GPU
R8560
CRITICAL
10K
1%
1/16W
MF-LF
2 402
1
C8570 R8570
1UF
1
10K
20%
10V
2 CERM
805
C8562
VIN
VOUT
CONT NOISE
GND
5%
1/16W
MF-LF
2 402
U8570_NOISE
C8571
R8561
10%
6.3V
2 CERM
402
20%
16V
CERM 2
402
C8572
10UF
10%
6.3V
2 X5R
805
U8570_CONT
Q8570
2N7002
GPU 1.8V VREG
VOUT = 0.59V * [1 + R8560 / R8561]

VOUT = 1.802V
85 13
PP1V8_GPU
=PP1V8_GPU
VOLTAGE=1.8V
MAKE_BASE=TRUE
MIC39102
=PP3V3_GPU
SOP-8-LF
2
1
C8580
10UF
R8580
3.3K
20%
6.3V
2 CERM
1206
IN
EN
5%
1/16W
MF-LF
402
OUT
ADJ
GND
SOT23-LF
84 86 87 93
R85811
453
GPU_POWERUP_L
U8580
96 93 92 85 7
1%
1/16W
MF-LF
402 2
C8583
330UF
Graphics Vregs
20%
2 6.3V
ELEC
6.3X8-SM
SYNC_MASTER=M33-DD
R8582
U8580_EN
3 NOSTUFF
Q8580

1K
1%
1/16W
MF-LF
402 2

2N7002
85 13
GPU_POWERUP_L
SOT23-LF
SIZE
2
THE ENTIRE SEQUENCE SHOULD TAKE LESS THAN 40 MS (T1+T3 IN DATABOOK)
U8580_ADJ
APPLE COMPUTER INC.
HOWEVER IDEALLY ALL POWER RAILS SHOULD RAMP TOGETHER

POWER DOWN SEQUENCE SHOULD BE IN REVERSE ORDER
DRAWING NUMBER
SHT
NONE
REV.
051-6863
SCALE
3 NOSTUFF
4.87K
POWER SEQUENCING FOR RV370/80: =PP3V3_GPU > =PPV_GPU_MEM > VDDC_CT > PPVCORE_GPU
PP2V5_GPU_A2VDD > PP1V8_GPU > PCIE_PVDD
0.01UF
1uF
U8560_ADJ
CRITICAL
PP2V5_GPU_A2VDD 93
VOLTAGE=2.5V
SOT-25A-LF
U8570
MM1572FN
1%
1/16W
MF-LF
2 402
2N7002
GPU_POWERUP_L
0.001UF
FAN2558
1
C8561
9.53K
SOT23-LF
1
1
1uF
R8541
2N7002
U8540_EN_L
C8542
10%
2 6.3V
CERM
402
Q8540
PP1V8_GPU_TPVDD
93
VOLTAGE=1.8V
CRITICAL
GPU 2.5V A2VDD
=PP3V3_GPU
C8560 1
10K
1%
1/16W
MF-LF
2 402
U8540_ADJ
GND
VOUT = 0.59V * [1 + R8590 / R8591]

VOUT = 1.691V
R85621
10%
50V
2 CERM
402
R8540
20%
2 16V
CERM
402
GPU 1.80V TPVDD
85 13
ADJ 5
B
96 93 92 85 7
VOUT 6
VIN
4 PG
3 EN
C8541
0.001UF
SOT23-6-LF
1
C8544
FAN2558
0.01UF
10%
6.3V
2 CERM
402
2N7002
U8590_EN_L
5%
1/16W
MF-LF
402
U8540
2
=PP3V3_ALL_GPU
C8592
1uF
FAN2558_ADJ
Q8590
85 7
20%
6.3V
CERM
805
5%
1/16W
MF-LF
402 2
1%
1/16W
MF-LF
2 402
10%
50V
2 CERM
402
CRITICAL
4.7UF
3.3K
10K
GND
0.22UF
85 13
VOUT 6
VIN
PG
3 EN
C8591
C8540 1
R85421
R8590
0.001UF
FAN2558
4
U8590_EN
R8594
SOT23-6-LF
1
=PP3V3_ALL_GPU
=PP3V3_GPU
U8590
20%
6.3V
CERM 2
805
5%
1/16W
MF-LF
2 402
85 7
96 93 92 85 7
PP1V7_GPU_VDDC_CT 86
VOLTAGE=1.7V
=PP3V3_GPU
C
PP1V2_GPU_PCIE_PVDD 84
VOLTAGE=1.2V
OF
85
154
PPVCORE_GPU
AD13
AD15
AC17
AC13
AC15
W19
W17
W18
W14
W12
W13
V18
V19
V17
V13
V14
V12
U18
U19
U17
U13
U14
P19
U12
P18
P14
P17
P13
N19
P12
N18
N14
N17
N12
N13
M19
THERE ARE 45 CORE POWER PINS BETWEEN VDDC & VDDCI
M12
M13
86 85 7
M17
M18
M14
VDDC
C8600
10UF
AK2
AJ1
AG11
10%
6.3V
2 X5R
805
AG9
AG5
AD18
AD16
AD12
U8400
AC18
RV370XT
1
PP1V8_GPU_PVDD
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM 1
0805
4.7UF
XW8650
SM
1
PP1V7_GPU_VDDC_CT
OMIT
C8650
GND_GPU_PVSS
VOLTAGE=0V
20%
2 6.3V
CERM
805
C8651
CORE POWER
0.1UF
20%
2 10V
CERM
402
C8660
1UF
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
C8662
1UF
10%
2 6.3V
CERM
402
C8663
1UF
10%
2 6.3V
CERM
402
C8664
1UF
10%
2 6.3V
CERM
402
C8665
1UF
10%
2 6.3V
CERM
402
C8602
1UF
10%
6.3V
2 CERM
402
C8603
1UF
10%
6.3V
2 CERM
402
C8604
1UF
10%
6.3V
2 CERM
402
C8605
1UF
10%
6.3V
2 CERM
402
C8606
1UF
10%
6.3V
2 CERM
402
C8607
1UF
10%
6.3V
2 CERM
402
C8608
1UF
10%
6.3V
2 CERM
402
C8609
1UF
10%
6.3V
2 CERM
402
C8610
1UF
10%
6.3V
2 CERM
402
AC4
AB8
AB7
AB1
10%
6.3V
2 CERM
402
C8611
1UF
C8612
1UF
10%
6.3V
2 CERM
402
C8613
1UF
10%
6.3V
2 CERM
402
C8614
1UF
10%
6.3V
2 CERM
402
C8615
1UF
C8616
1UF
10%
6.3V
2 CERM
402
C8617
1UF
10%
6.3V
2 CERM
402
C8618
1UF
10%
6.3V
2 CERM
402
C8619
1UF
10%
6.3V
2 CERM
402
C8620
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
W15
W8
V16
V15
H11
H20
1
W7
85
C8661
10%
6.3V
2 CERM
402
Y4
AK28 PVDD
AJ28 PVSS
U16
M23
1
1UF
AC12
(2 OF 5)
1.8UH
=PP1V8_GPU
C8601
AC16
AC14
BGA
L8650
93 87 85 84
C8666
1UF
10%
2 6.3V
CERM
402
C8667
1UF
10%
2 6.3V
CERM
402
P8
Y8
VSS
U15
U8
C8621
1UF
10%
2 6.3V
CERM
402
C8622
1UF
10%
2 6.3V
CERM
402
C8623
1UF
10%
2 6.3V
CERM
402
C8624
1UF
10%
2 6.3V
CERM
402
C8625
1UF
10%
2 6.3V
CERM
402
C8626
1UF
10%
2 6.3V
CERM
402
C8627
1UF
C8628
1UF
10%
2 6.3V
CERM
402
C8629
1UF
10%
2 6.3V
CERM
402
10%
2 6.3V
CERM
402
C8630
1UF
10%
2 6.3V
CERM
402
U4
T19
VDD15
Y23
AC11
T18
AC20
T17
T16
T15
86 85 7
PPVCORE_GPU
T14
T13
M15
T1
R19
T12
W16
VDDCI
R18
R17
R16
R15
R14
R13
R12
R8
R7
P16
P15
P4
N16
N15
M16
M8
M7
K8
L4
K1
K7
J24
H27
J23
H23
H18
H21
H16
H12
H14
H8
H9
H4
G21
G24
G18
G12
G16
G9
D27
F27
D21
D24
D18
D12
D15
D10
D4
D6
C30
C3
C28
A29
C1
A22
A2
A10
A16
VSS
GPU Core Power

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
86
154
7
91 90 89 87 7
=PPV_GPU_MEM
C8700 1 C8701
10UF
10UF
10%
6.3V
2 X5R
805
10%
6.3V
2 X5R
805
C8702 1 C8703
0.1UF
20%
10V
2 CERM
402
0.1UF
C8704 1 C8705
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
C8706 1 C8707
0.1UF
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
C8708 1 C8709
0.1UF
C8710 1 C8711
0.1UF
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
C8712 1 C8713
0.1UF
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
C8714 1 C8715
0.1UF
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C8716 1 C8717
0.1UF
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C8718 1 C8719
0.1UF
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
L8730
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
91 88
H29
J28
J29
J26
H25
H26
G26
G30
D29
D28
E28
E29
G29
G28
F28
G25
F26
E26
F25
E24
F23
E23
D22
B29
C29
C25
C27
B28
B25
C26
B26
F17
E17
D16
F16
E15
F14
E14
F13
C17
B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10
C9
B9
B10
E13
E12
E10
F12
F11
E9
F9
F8
DQA0
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
OMIT
U8400
RV370XT
BGA
(3 OF 5)
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19
DQMA0*
DQMA1*
DQMA2*
DQMA3*
DQMA4*
DQMA5*
DQMA6*
DQMA7*
J25
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
J27
F30
F29
E25
A27
F15
C15
C11
E11
FBA<0>
FBA<1>
FBA<2>
FBA<3>
FBA<4>
FBA<5>
FBA<6>
FBA<7>
FBA<8>
FBA<9>
FBA<10>
FBA<11>
FBA<12>
FBA<13>
TP_FBA<14>
FBDQM<5>
FBDQM<4>
FBDQM<7>
FBDQM<6>
FBDQM<0>
FBDQM<1>
FBDQM<3>
FBDQM<2>
4.7UF
GND_GPU_MPVSS
VOLTAGE=0V
88 89 91
20%
6.3V
2 CERM
805
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
88 89 91
91 88
91 88
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
F24
B27
E16
B16
B11
F10
FBDQS<5>
FBDQS<4>
FBDQS<7>
FBDQS<6>
FBDQS<0>
FBDQS<1>
FBDQS<3>
FBDQS<2>
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
88 91
91 88
91 88
RASA*
A19
FBARAS_L
91 88
88 89 91
91 88
CASA*
E18
FBACAS_L
88 89 91
91 88
91 88
WEA*
E19
FBAWE_L
88 89 91
CSA0*
E20
FBACS0_L
88 89 91
CSA1*
F20
TP_FBACS1_L
CKEA
B19
91 88
91 88
91 88
91 88
FBACKE
91 88
88 89 91
91 88
CLKA0
CLKA0*
CLKA1
CLKA1*
B21
C20
C18
A18
FBACLK1
FBACLK1_L
FBACLK0
FBACLK0_L
R8700
88 89
88 89
88 89
10K
91 88
5%
1/16W
MF-LF
2 402
91 88
91 88
91 88
88 89
91 88
91 88
MVREFD
MVREFS
B7
GPU_MVREFD
=PPV_GPU_MEM
7 87 89 90 91
B8
91 88
R8720
GPU_MVREFS
91 88
100
91 88
1%
1/16W
MF-LF
2 402
DIMA_0
DIMA_1
D30
B13
TP_GPU_DIMA_0
TP_GPU_DIMA_1
C8721 1
20%
10V
CERM
402
VSSRH1
91 88
91 88
91 88
0.1UF
VSSRH0
91 88
91 88
R8721
100
91 88
1%
1/16W
MF-LF
91 88
91 88
2 402
91 88
M6
F19
91 88
91 88
=PPV_GPU_MEM
AA8
AD4
AA4
AA7
V8
AA1
V7
V4
T7
T8
R1
R4
N7
N8
C8731
L8
L23
M4
N4
C8730
K24
J8
K23
H17
H15
H10
H13
G27
G19
G22
G15
G10
G13
F4
G7
E27
D23
D26
D20
D14
D17
D11
D5
D8
B1
B30
A28
A15
A21
A9
A3
N6
VOLTAGE=1.8V
XW8730
SM
VDDR1
PP1V8_GPU_MPVDD
0.1UF
20%
10V
2 CERM
402
FBD<124>
FBD<127>
FBD<125>
FBD<121>
FBD<120>
FBD<123>
FBD<122>
FBD<126>
FBD<113>
FBD<112>
FBD<114>
FBD<115>
FBD<117>
FBD<119>
FBD<116>
FBD<118>
FBD<111>
FBD<110>
FBD<109>
FBD<108>
FBD<104>
FBD<105>
FBD<107>
FBD<106>
FBD<103>
FBD<99>
FBD<102>
FBD<97>
FBD<98>
FBD<100>
FBD<96>
FBD<101>
FBD<86>
FBD<84>
FBD<85>
FBD<87>
FBD<82>
FBD<83>
FBD<80>
FBD<81>
FBD<88>
FBD<91>
FBD<90>
FBD<89>
FBD<92>
FBD<93>
FBD<94>
FBD<95>
FBD<71>
FBD<69>
FBD<68>
FBD<70>
FBD<66>
FBD<64>
FBD<65>
FBD<67>
FBD<72>
FBD<73>
FBD<75>
FBD<74>
FBD<78>
FBD<79>
FBD<76>
FBD<77>
A7
A6
D7
F7
E7
G6
G5
F5
E5
C4
B5
C5
A4
B4
C2
D3
D1
D2
G4
H6
H5
J6
K5
K4
L6
L5
G2
F3
H2
E2
F2
J3
F1
H3
U6
U5
U3
V6
W5
W4
Y6
Y5
U2
V2
V1
V3
W3
Y2
Y3
AA2
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
AB2
AB3
AC2
AC3
AD3
AE1
AE2
AE3
VDDR1
MPVDD
MPVSS
DQB0
DQB1
DQB2
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
DQB31
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63
OMIT
U8400
RV370XT
BGA
(4 OF 5)
MEMORY INTERFACE B
91 88
H28
2
0805
MEMORY INTERFACE A
91 88
FBD<47>
FBD<46>
FBD<44>
FBD<45>
FBD<43>
FBD<41>
FBD<42>
FBD<40>
FBD<34>
FBD<38>
FBD<39>
FBD<37>
FBD<36>
FBD<32>
FBD<33>
FBD<35>
FBD<62>
FBD<63>
FBD<61>
FBD<60>
FBD<56>
FBD<59>
FBD<57>
FBD<58>
FBD<48>
FBD<50>
FBD<55>
FBD<51>
FBD<49>
FBD<54>
FBD<52>
FBD<53>
FBD<5>
FBD<4>
FBD<7>
FBD<6>
FBD<2>
FBD<1>
FBD<3>
FBD<0>
FBD<13>
FBD<15>
FBD<14>
FBD<9>
FBD<11>
FBD<8>
FBD<10>
FBD<12>
FBD<24>
FBD<26>
FBD<25>
FBD<27>
FBD<28>
FBD<31>
FBD<30>
FBD<29>
FBD<23>
FBD<22>
FBD<17>
FBD<21>
FBD<20>
FBD<16>
FBD<18>
FBD<19>
VDDRH1
91 88
VDDRH0
F18
H22
J1
J4
J7
1.8UH
=PP1V8_GPU
H19
93 86 85 84
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
N5
DQMB0*
DQMB1*
DQMB2*
DQMB3*
DQMB4*
DQMB5*
DQMB6*
DQMB7*
E6
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
F6
AD1
FBDQS<15>
FBDQS<14>
FBDQS<13>
FBDQS<12>
FBDQS<10>
FBDQS<11>
FBDQS<8>
FBDQS<9>
RASB*
R2
FBBRAS_L
88 90 91
CASB*
T5
FBBCAS_L
88 90 91
WEB*
T6
FBBWE_L
88 90 91
CSB0*
R5
FBBCS0_L
88 90 91
CSB1*
R6
TP_FBBCS1_L
CKEB
R3
FBBA<0>
FBBA<1>
FBBA<2>
FBBA<3>
FBBA<4>
FBBA<5>
FBBA<6>
FBBA<7>
FBBA<8>
FBBA<9>
FBBA<10>
FBBA<11>
FBBA<12>
FBBA<13>
TP_FBBA<14>
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2
B2
J5
G3
W6
W2
AC6
AD2
B3
K6
G1
V5
W1
AC5
FBDQM<15>
FBDQM<14>
FBDQM<13>
FBDQM<12>
FBDQM<10>
FBDQM<11>
FBDQM<8>
FBDQM<9>
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 90 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
88 91
FBBCKE
88 90 91
CLKB0
CLKB0*
N1
N2
CLKB1
CLKB1*
T2
MEMVMODE0
C6
T3
R8701
FBBCLK1
FBBCLK1_L
FBBCLK0
FBBCLK0_L
10K
88 90
5%
1/16W
MF-LF
88 90
2 402
88 90
88 90
91 90 89 87 7
MEMVMODE
* 1.8V
2.5V
2.8V
01
10
11
=PPV_GPU_MEM
NOSTUFF
01
R8724
GPU_MEMVMODE0
R8726
4.7K
MEMVMODE1
MEMTEST
C7
GPU_MEMVMODE1
5%
1/16W
MF-LF
2 402
C8 GPU_MEMTEST
DIMB_0
DIMB_1
4.7K
5%
1/16W
MF-LF
402 2
NOSTUFF
1
R8728 R87251
47
E3
TP_GPU_DIMB_0
AA3 TP_GPU_DIMB_1
R8727
4.7K
1%
1/16W
MF-LF
2 402
4.7K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
2 402
7 87 89 90 91
R8722
100
1%
1/16W
MF-LF
2 402
C8723
0.1UF
GPU Frame Buffer
1
1
20%
10V
CERM 2
402
R8723
100
1%
1/16W
MF-LF
2 402

SIZE
APPLE COMPUTER INC.
D
SCALE
DRAWING NUMBER
REV.
051-6863
F
87 154
SHT
OF
NONE
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
PLACE RS CLOSE TO MEMORY
FRAME BUFFER A TERMINATION

91 88 87
PLACE CLOCK TERMINATION AFTER MEMORY

GPU -> MEMORY -> TERMINATION
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
FBD<31>
FBD<30>
FBD<29>
FBD<28>
FBD<27>
FBD<26>
FBD<25>
FBD<24>
FBD<0>
FBD<1>
FBD<2>
FBD<3>
FBD<17>
FBD<16>
FBD<18>
FBD<19>
FBD<15>
FBD<14>
FBD<13>
FBD<12>
FBD<10>
FBD<11>
FBD<9>
FBD<8>
FBD<5>
FBD<6>
FBD<4>
FBD<7>
FBD<20>
FBD<21>
FBD<22>
FBD<23>
3
4
1
2
3
4
2
1
1
2
4
3
1
2
3
4
4
3
2
1
3
4
1
2
2
3
1
4
1
2
3
4
6
5
8
7
6
5
7
8
8
7
5
6
8
7
6
5
5
6
7
8
6
5
8
7
7
6
8
5
8
7
6
5
RP8820
RP8820
RP8820
RP8820
RP8821
RP8821
RP8821
RP8821
RP8822
RP8822
RP8822
RP8822
RP8823
RP8823
RP8823
RP8823
RP8824
RP8824
RP8824
RP8824
RP8825
RP8825
RP8825
RP8825
RP8826
RP8826
RP8826
RP8826
RP8827
RP8827
RP8827
RP8827
RFBD<31>
RFBD<30>
RFBD<29>
RFBD<28>
RFBD<27>
RFBD<26>
RFBD<25>
RFBD<24>
RFBD<0>
RFBD<1>
RFBD<2>
RFBD<3>
RFBD<17>
RFBD<16>
RFBD<18>
RFBD<19>
RFBD<15>
RFBD<14>
RFBD<13>
RFBD<12>
RFBD<10>
RFBD<11>
RFBD<9>
RFBD<8>
RFBD<5>
RFBD<6>
RFBD<4>
RFBD<7>
RFBD<20>
RFBD<21>
RFBD<22>
RFBD<23>
6 88 89
91 88 87
6 88 89
91 88 87
88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
88 89
91 88 87
88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
88 89
91 88 87
6 88 89
91 88 87
88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
6 88 89
91 88 87
FBD<32>
FBD<33>
FBD<34>
FBD<35>
FBD<36>
FBD<37>
FBD<38>
FBD<39>
FBD<40>
FBD<41>
FBD<42>
FBD<43>
FBD<44>
FBD<45>
FBD<46>
FBD<47>
FBD<48>
FBD<49>
FBD<50>
FBD<51>
FBD<52>
FBD<53>
FBD<54>
FBD<55>
FBD<56>
FBD<57>
FBD<58>
FBD<59>
FBD<60>
FBD<61>
FBD<62>
FBD<63>
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
3
4
2
1
4
3
2
1
3
4
2
1
4
3
1
2
4
2
3
1
3
4
2
1
4
3
1
2
4
2
3
1
6
5
7
8
5
6
7
8
6
5
7
8
5
6
8
7
5
7
6
8
6
5
7
8
5
6
8
7
5
7
6
8
RP8828
RP8828
RP8828
RP8828
RP8816
RP8816
RP8816
RP8816
RP8829
RP8829
RP8829
RP8829
RP8830
RP8830
RP8830
RP8830
RP8831
RP8831
RP8831
RP8831
RP8800
RP8800
RP8800
RP8800
RP8801
RP8801
RP8801
RP8801
RP8802
RP8802
RP8802
RP8802
RFBD<32>
RFBD<33>
RFBD<34>
RFBD<35>
RFBD<36>
RFBD<37>
RFBD<38>
RFBD<39>
RFBD<40>
RFBD<41>
RFBD<42>
RFBD<43>
RFBD<44>
RFBD<45>
RFBD<46>
RFBD<47>
RFBD<48>
RFBD<49>
RFBD<50>
RFBD<51>
RFBD<52>
RFBD<53>
RFBD<54>
RFBD<55>
RFBD<56>
RFBD<57>
RFBD<58>
RFBD<59>
RFBD<60>
RFBD<61>
RFBD<62>
RFBD<63>
6 88 89
91 88 87
FBDQS<0>
22
91 88 87
FBDQS<1>
22
91 88 87
FBDQS<2>
22
91 88 87
FBDQS<3>
22
91 88 87
FBDQS<4>
22
91 88 87
FBDQS<5>
22
91 88 87
FBDQS<6>
22
91 88 87
FBDQS<7>
22
6 88 89
6 88 89
88 89
6 88 89
6 88 89
6 88 89
88 89
6 88 89
6 88 89
6 88 89
88 89
R8800
R8801
R8802
R8803
R8804
R8805
R8806
R8807
RFBDQS<0>
89
RFBDQS<1>
89
RFBDQS<2>
89
RFBDQS<3>
89
RFBDQS<4>
89
RFBDQS<5>
89
RFBDQS<6>
89
RFBDQS<7>
89
89 88 87
FBACLK0
R88201
56.2
1%
1/16W
MF-LF
402 2
FBACLK0_TERM
R88211
C8821 1
56.2
0.01UF
1%
1/16W
MF-LF
402 2
6 88 89
6 88 89
20%
16V
CERM 2
402
88 89
6 88 89
91 88 87
FBDQM<0>
22
91 88 87
FBDQM<1>
22
91 88 87
FBDQM<2>
22
91 88 87
FBDQM<3>
22
91 88 87
FBDQM<4>
22
91 88 87
FBDQM<5>
22
91 88 87
FBDQM<6>
22
91 88 87
FBDQM<7>
22
6 88 89
6 88 89
6 88 89
9 88 89
6 88 89
6 88 89
6 88 89
88 89
6 88 89
6 88 89
88 89
R8830
R8831
R8832
R8833
R8834
R8835
R8836
R8837
RFBDQM<0>
89
RFBDQM<1>
89
RFBDQM<2>
89
RFBDQM<3>
89
RFBDQM<4>
89
RFBDQM<5>
89
RFBDQM<6>
89
RFBDQM<7>
89
89 88 87
FBACLK0_L
89 88 87
FBACLK1
R88221
56.2
1%
1/16W
MF-LF
402 2
FBACLK1_TERM
R88231
C8823 1
56.2
6 88 89
1%
1/16W
MF-LF
402 2
6 88 89
6 88 89
0.01UF
20%
16V
CERM 2
402
6 88 89
88 89
89 88 87
FBACLK1_L
FRAME BUFFER B TERMINATION

91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
91 88 87
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
FBD<64>
FBD<65>
FBD<66>
FBD<67>
FBD<84>
FBD<85>
FBD<86>
FBD<87>
FBD<72>
FBD<73>
FBD<75>
FBD<74>
FBD<68>
FBD<70>
FBD<69>
FBD<71>
FBD<80>
FBD<81>
FBD<82>
FBD<83>
FBD<76>
FBD<77>
FBD<78>
FBD<79>
FBD<91>
FBD<90>
FBD<89>
FBD<88>
FBD<95>
FBD<94>
FBD<93>
FBD<92>
91 88 87
90 89 88 9 6
91 89 87
91 90 87
91 88 87
91 88 87
91 89 87
91 89 87
91 89 87
91 89 87
91 89 87
91 90 87
91 90 87
91 90 87
91 90 87
91 90 87
FBD<127..0>
RFBD<127..0>
FBA<13..0>
FBBA<13..0>
FBDQM<15..0>
FBDQS<15..0>
FBARAS_L
FBACAS_L
FBAWE_L
FBACS0_L
FBACKE
FBBRAS_L
FBBCAS_L
FBBWE_L
FBBCS0_L
FBBCKE
1
4
2
3
1
2
3
4
2
1
4
3
1
2
3
4
1
2
3
4
2
1
4
3
3
4
1
2
3
4
1
2
8
5
7
6
8
7
6
5
7
8
5
6
8
7
6
5
8
7
6
5
7
8
5
6
6
5
8
7
6
5
8
7
RP8810
RP8810
RP8810
RP8810
RP8809
RP8809
RP8809
RP8809
RP8819
RP8819
RP8819
RP8819
RP8808
RP8808
RP8808
RP8808
RP8807
RP8807
RP8807
RP8807
RP8817
RP8817
RP8817
RP8817
RP8818
RP8818
RP8818
RP8818
RP8803
RP8803
RP8803
RP8803
NET_PHYSICAL_TYPE
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
RFBD<64>
RFBD<65>
RFBD<66>
RFBD<67>
RFBD<84>
RFBD<85>
RFBD<86>
RFBD<87>
RFBD<72>
RFBD<73>
RFBD<75>
RFBD<74>
RFBD<68>
RFBD<70>
RFBD<69>
RFBD<71>
RFBD<80>
RFBD<81>
RFBD<82>
RFBD<83>
RFBD<76>
RFBD<77>
RFBD<78>
RFBD<79>
RFBD<91>
RFBD<90>
RFBD<89>
RFBD<88>
RFBD<95>
RFBD<94>
RFBD<93>
RFBD<92>
88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
6 88 90
91 88 87
88 90
91 88 87
6 88 90
91 88 87
NET_SPACING_TYPE
FBD<96>
FBD<97>
FBD<98>
FBD<99>
FBD<100>
FBD<101>
FBD<102>
FBD<103>
FBD<104>
FBD<105>
FBD<106>
FBD<107>
FBD<108>
FBD<109>
FBD<110>
FBD<111>
FBD<112>
FBD<113>
FBD<114>
FBD<115>
FBD<116>
FBD<117>
FBD<118>
FBD<119>
FBD<120>
FBD<121>
FBD<122>
FBD<123>
FBD<124>
FBD<125>
FBD<126>
FBD<127>
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
3
4
2
1
3
4
2
1
3
4
2
1
4
2
3
1
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
6
5
7
8
6
5
7
8
6
5
7
8
5
7
6
8
RP8815
RP8815
RP8815
RP8815
RP8814
RP8814
RP8814
RP8814
RP8812
RP8812
RP8812
RP8812
RP8813
RP8813
RP8813
RP8813
RP8811
RP8811
RP8811
RP8811
RP8806
RP8806
RP8806
RP8806
RP8804
RP8804
RP8804
RP8804
RP8805
RP8805
RP8805
RP8805
RFBD<96>
RFBD<97>
RFBD<98>
RFBD<99>
RFBD<100>
RFBD<101>
RFBD<102>
RFBD<103>
RFBD<104>
RFBD<105>
RFBD<106>
RFBD<107>
RFBD<108>
RFBD<109>
RFBD<110>
RFBD<111>
RFBD<112>
RFBD<113>
RFBD<114>
RFBD<115>
RFBD<116>
RFBD<117>
RFBD<118>
RFBD<119>
RFBD<120>
RFBD<121>
RFBD<122>
RFBD<123>
RFBD<124>
RFBD<125>
RFBD<126>
RFBD<127>
6 88 90
91 88 87
FBDQS<8>
22
91 88 87
FBDQS<9>
22
91 88 87
FBDQS<10>
22
91 88 87
FBDQS<11>
22
91 88 87
FBDQS<12>
22
91 88 87
FBDQS<13>
22
91 88 87
FBDQS<14>
22
91 88 87
FBDQS<15>
22
6 88 90
6 88 90
88 90
6 88 90
6 88 90
6 88 90
88 90
6 88 90
6 88 90
6 88 90
88 90
R8808
R8809
R8810
R8811
R8812
R8813
R8814
R8815
90 88 87
RFBDQS<8>
90
RFBDQS<9>
90
RFBDQS<10>
90
RFBDQS<11>
90
RFBDQS<12>
90
RFBDQS<13>
90
RFBDQS<14>
90
RFBDQS<15>
90
FBBCLK0
R88241
56.2
1%
1/16W
MF-LF
402 2
FBBCLK0_TERM
1
R8825
C8825 1
56.2
1%
1/16W
MF-LF
402 2
6 88 90
90 88 87
FBBCLK0_L
90 88 87
FBBCLK1
0.01UF
20%
16V
CERM 2
402
6 88 90
6 88 90
88 90
6 88 90
91 88 87
FBDQM<8>
22
91 88 87
FBDQM<9>
22
91 88 87
FBDQM<10>
22
91 88 87
FBDQM<11>
22
91 88 87
FBDQM<12>
22
91 88 87
FBDQM<13>
22
91 88 87
FBDQM<14>
22
91 88 87
FBDQM<15>
22
6 88 90
6 88 90
88 90
6 88 90
6 88 90
6 88 90
88 90
6 88 90
6 88 90
6 88 90
R8838
R8839
R8840
R8841
R8842
R8843
R8844
R8845
RFBDQM<8>
90
RFBDQM<9>
90
RFBDQM<10>
90
RFBDQM<11>
90
RFBDQM<12>
90
R88261
56.2
1%
1/16W
MF-LF
402 2
FBBCLK1_TERM
RFBDQM<13>
90
RFBDQM<14>
90
RFBDQM<15>
90
R88271
C8827 1
56.2
1%
1/16W
MF-LF
402 2
0.01UF
20%
16V
CERM 2
402
88 90
90 88 87
6 88 90
FBBCLK1_L
6 88 90
6 88 90
88 90
DIFFERENTIAL_PAIR
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FBDQS
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
GPU_FB
I421
I425
FB Series Termination
I426
I427
I428
I429
I469
I470
89 88 87
I471
89 88 87
I472
89 88 87
I473
89 88 87
I494
90 88 87
I493
90 88 87
I495
90 88 87
I496
90 88 87
FBACLK0
FBACLK0_L
FBACLK1
FBACLK1_L
FBBCLK0
FBBCLK0_L
FBBCLK1
FBBCLK1_L
NET_PHYSICAL_TYPE
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
NET_SPACING_TYPE
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
GPU_FBCLK
DIFFERENTIAL_PAIR
FBACLK0
FBACLK0
FBACLK1
FBACLK1
FBBCLK0
FBBCLK0
FBBCLK1
FBBCLK1

I483
I484
I489
I490
I491
SIZE
I487
I488
I492
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
I497
SHT
NONE
REV.
051-6863
OF
88
154
91 90 89 87 7
=PPV_GPU_MEM
91 90 89 87 7
C8900
10UF
10%
2 6.3V
X5R
805
C8901
10UF
C8902
0.1UF
20%
2 10V
CERM
402
10%
2 6.3V
X5R
805
C8903
0.1UF
20%
2 10V
CERM
402
C8904
0.1UF
20%
2 10V
CERM
402
C8905
0.1UF
20%
2 10V
CERM
402
C8906
C8907
0.1UF
20%
2 10V
CERM
402
0.1UF
20%
2 10V
CERM
402
C8908
0.1UF
20%
2 10V
CERM
402
=PPV_GPU_MEM
C8909
0.1UF
C8920
10UF
20%
2 10V
CERM
402
C8921
10UF
10%
2 6.3V
X5R
805
10%
2 6.3V
X5R
805
C8922
0.1UF
20%
2 10V
CERM
402
C8923
0.1UF
20%
2 10V
CERM
402
C8924
0.1UF
C8925
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C8926
0.1UF
C8927
0.1UF
C8928
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C8929
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
D
91 90 89 87 7
91 90 89 87 7
=PPV_GPU_MEM
=PPV_GPU_MEM
U8901
U8900
8MX32-300MHZ-1.8V
8MX32-300MHZ-1.8V
FBGA
FBGA
D7
E5
OMIT
D8
E11
VDD
VSS
E10
91 89 88 87
K6
91 89 88 87
K7
91 89 88 87
L8
K8
91 89 88 87
L11
K9
91 89 88 87
L5
91 89 88 87
L10
91 89 88 87
L7
C3
C5
91 89 88 87
F6
C7
C8
F7
F8
91 89 88 87
C12
F9
91 89 88 87
E3
G6
VDDQ
G4
H6
88
G11
H7
VSS_THERM
VREF
VOLTAGE=0.9V
R8950
4.7K
1%
1/16W
MF-LF
402 2
88
RFBDQS<2>
RFBDQS<1>
RFBDQS<3>
RFBDQS<0>
RFBDQM<2>
RFBDQM<1>
RFBDQM<3>
RFBDQM<0>
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
FBGA
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
OMIT
DQS0
DQS1
DQS2
DQS3
B2
H13
H2
B13
B3
DM0
DM1
DM2
DM3
H12
H3
B12
J8
91 89 88 87
J9
91 89 88 87
B4
88 87
C8950
B11
88 87
0.01UF
D4
91 89 88 87
D5
91 89 88 87
D6
91 89 88 87
D9
91 89 88 87
D10
91 89 88 87
20%
16V
2 CERM
402
FBA<12>
FBA<13>
FBACLK0
FBACLK0_L
FBACKE
FBACS0_L
FBARAS_L
FBACAS_L
FBAWE_L
D11
VSSQ
N4
BA0
BA1
M5
M11
CK
CK
CKE
CS
RAS
CAS
WE
M12
N12
N2
M2
L2
L3
C4
E6
C11
E9
H4
F5
H11
F10
L12
G5
L13
G10
M3
H5
M4
H10
N3
MCL/NC
RFU1/NC
RFU2/NC
NC
B7
RFBD<23>
RFBD<21>
RFBD<22>
RFBD<20>
RFBD<19>
RFBD<18>
RFBD<16>
RFBD<17>
RFBD<14>
RFBD<15>
RFBD<12>
RFBD<13>
RFBD<11>
RFBD<10>
RFBD<8>
RFBD<9>
RFBD<30>
RFBD<31>
RFBD<28>
RFBD<29>
RFBD<27>
RFBD<26>
RFBD<25>
RFBD<24>
RFBD<7>
RFBD<6>
RFBD<5>
RFBD<4>
RFBD<2>
RFBD<1>
RFBD<3>
RFBD<0>
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
6 88
L4
6 88
L7
6 88
L8
6 88
8MX32-300MHZ-1.8V
E10
VDD
VSS
L11
88
U8901
E8
E11
(1 OF 2)
J7
K11
88
J6
K4
N13
88
H9
J11
FBA0_VREF
88
H8
J4
1%
1/16W
MF-LF
402 2
88
G8
88
4.7K
88
G9
F11
R8900
91 89 88 87
G7
E12
91 89 88 87
C10
F4
FBA<0>
FBA<1>
FBA<2>
FBA<3>
FBA<4>
FBA<5>
FBA<6>
FBA<7>
FBA<8>
FBA<9>
FBA<10>
FBA<11>
E7
E4
8MX32-300MHZ-1.8V
E8
E5
OMIT
D8
U8900
E7
E4
L4
(2 OF 2)
D7
(2 OF 2)
K6
91 89 88 87
K7
91 89 88 87
K8
91 89 88 87
K9
91 89 88 87
L5
91 89 88 87
L10
91 89 88 87
C3
6 88
C5
6 88
C7
F6
91 89 88 87
88
C8
F7
91 89 88 87
C10
F8
91 89 88 87
C12
6 88
6 88
91 89 88 87
F9
91 89 88 87
E3
G6
91 89 88 87
6 88
E12
G7
6 88
F4
6 88
F11
6 88
88
88
G8
88
G9
88
G4
H6
88
G11
H7
88
J4
H8
88
J11
H9
88
K4
J6
88
6 88
6 88
6 88
88
6 88
R89011
4.7K
1%
1/16W
MF-LF
402 2
6 88
6 88
6 88
88
4.7K
1%
1/16W
MF-LF
402 2
J7
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
B2
RFBDQS<5>
RFBDQS<6>
RFBDQS<4>
RFBDQS<7>
H13
H2
B13
B3
RFBDQM<5>
RFBDQM<6>
RFBDQM<4>
RFBDQM<7>
88
H12
H3
B12
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
FBGA
(1 OF 2)
DQS0
DQS1
DQS2
DQS3
DM0
DM1
DM2
DM3
VREF
91 89 88 87
J9
91 89 88 87
FBA<12>
FBA<13>
N4
FBACLK1
FBACLK1_L
FBACKE
FBACS0_L
FBARAS_L
FBACAS_L
FBAWE_L
M11
M5
BA0
BA1
B4
C8951
0.01UF
20%
2 16V
CERM
402
B11
88 87
D4
88 87
D5
91 89 88 87
D6
91 89 88 87
D9
91 89 88 87
D10
91 89 88 87
6 88
D11
91 89 88 87
88
E6
6 88
6 88
VSSQ
M12
N12
N2
M2
L2
L3
CK
CK
CKE
CS
RAS
CAS
WE
C4
E9
C11
F5
H4
M13
L9
M10
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
OMIT
J8
N13
VOLTAGE=0.9V
6 88
R8951
VSS_THERM
K11
FBA1_VREF
6 88
88
VDDQ
N5
FBA<0>
FBA<1>
FBA<2>
FBA<3>
FBA<4>
FBA<5>
FBA<6>
FBA<7>
FBA<8>
FBA<9>
FBA<10>
FBA<11>
NC
NC
F10
H11
G5
L12
G10
L13
H5
M3
H10
M4
J5
N3
MCL/NC
RFU1/NC
RFU2/NC
NC
B7
RFBD<41>
RFBD<42>
RFBD<40>
RFBD<43>
RFBD<44>
RFBD<45>
RFBD<47>
RFBD<46>
RFBD<50>
RFBD<48>
RFBD<51>
RFBD<49>
RFBD<53>
RFBD<52>
RFBD<54>
RFBD<55>
RFBD<32>
RFBD<33>
RFBD<35>
RFBD<34>
RFBD<37>
RFBD<36>
RFBD<38>
RFBD<39>
RFBD<56>
RFBD<57>
RFBD<59>
RFBD<58>
RFBD<60>
RFBD<61>
RFBD<62>
RFBD<63>
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
6 88
6 88
6 88
88
6 88
6 88
6 88
88
6 88
6 88
9 88
6 88
6 88
6 88
6 88
88
6 88
6 88
88
6 88
6 88
6 88
6 88
88
6 88
6 88
6 88
88
6 88
6 88
6 88
88
M13
L9
NC
NC
M10
J5
J10
J10
K5
K5
K10
K10
91 90 89 87 7
=PPV_GPU_MEM
91 90 89 87 7
C8910
0.1UF
C8911
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C8912
0.1UF
20%
2 10V
CERM
402
C8913
0.1UF
20%
2 10V
CERM
402
C8914
0.1UF
20%
2 10V
CERM
402
C8915
0.1UF
20%
2 10V
CERM
402
C8916
0.1UF
20%
2 10V
CERM
402
C8917
0.1UF
C8918
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
=PPV_GPU_MEM
C8919
0.1UF
C8930
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C8931
0.1UF
20%
2 10V
CERM
402
C8932
0.1UF
20%
2 10V
CERM
402
C8933
0.1UF
20%
2 10V
CERM
402
C8934
0.1UF
20%
2 10V
CERM
402
C8935
0.1UF
C8936
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C8937
0.1UF
C8938
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C8939
0.1UF
20%
2 10V
CERM
402
GROUND VIAS FOR SIGNAL LAYER TRANSITIONS
ZH8900
HOLE-VIA
1
ZH8901
HOLE-VIA
1
ZH8902
HOLE-VIA
1
ZH8903
HOLE-VIA
1
ZH8904
HOLE-VIA
1
ZH8905
HOLE-VIA
1
ZH8906
HOLE-VIA
1
ZH8907
HOLE-VIA
1
ZH8908
HOLE-VIA
1
ZH8909
HOLE-VIA
1
ZH8910
HOLE-VIA
1
ZH8911
HOLE-VIA
1
ZH8912
HOLE-VIA
1
ZH8918
HOLE-VIA
1
ZH8913
HOLE-VIA
1
ZH8919
HOLE-VIA
1
ZH8914
HOLE-VIA
1
ZH8920
HOLE-VIA
GPU GDDR SDRAM A
ZH8915
HOLE-VIA
1
ZH8921
HOLE-VIA
PART NUMBER
ZH8916
HOLE-VIA
1
ZH8922
HOLE-VIA
QTY
DESCRIPTION
REFERENCE DES
CRITICAL
BOM OPTION
CRITICAL
FB64MB_300MHZ_SAM
333S0319
SDRAM,4MX32,GDDR,300MHZ,1.8V,SAM
U8900,U8901
333S0311
U8900,U8901
CRITICAL
FB128MB_300MHZ_SAM
333S0312
U8900,U8901
CRITICAL
FB128MB_350MHZ_SAM
SAMSUNG

ZH8917
HOLE-VIA
1

ZH8923
HOLE-VIA
1
333S0320
SDRAM,4MX32,GDDR,300MHZ,1.8V,HYN
U8900,U8901
CRITICAL
FB64MB_300MHZ_HYN
333S0314
U8900,U8901
CRITICAL
FB128MB_300MHZ_HYN
333S0315
U8900,U8901
CRITICAL
FB128MB_350MHZ_HYN
HYNIX
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
89
154
91 90 89 87 7
=PPV_GPU_MEM
91 90 89 87 7
C9000
10UF
10%
2 6.3V
X5R
805
C9001
10UF
10%
2 6.3V
X5R
805
C9002
0.1UF
20%
2 10V
CERM
402
C9003
0.1UF
20%
2 10V
CERM
402
C9004
0.1UF
20%
2 10V
CERM
402
C9005
0.1UF
20%
2 10V
CERM
402
C9006
C9007
0.1UF
20%
2 10V
CERM
402
0.1UF
20%
2 10V
CERM
402
C9008
0.1UF
20%
2 10V
CERM
402
=PPV_GPU_MEM
C9009
0.1UF
C9020
10UF
20%
2 10V
CERM
402
C9021
10UF
10%
2 6.3V
X5R
805
10%
2 6.3V
X5R
805
C9022
0.1UF
20%
2 10V
CERM
402
C9023
0.1UF
20%
2 10V
CERM
402
C9024
0.1UF
20%
2 10V
CERM
402
C9025
0.1UF
20%
2 10V
CERM
402
C9026
0.1UF
C9027
0.1UF
20%
2 10V
CERM
402
C9028
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C9029
0.1UF
20%
2 10V
CERM
402
D
91 90 89 87 7
91 90 89 87 7
=PPV_GPU_MEM
=PPV_GPU_MEM
U9001
U9000
8MX32-300MHZ-1.8V
8MX32-300MHZ-1.8V
FBGA
FBGA
D7
E5
OMIT
D8
E11
VDD
VSS
E10
91 90 88 87
K6
91 90 88 87
K7
91 90 88 87
L8
K8
91 90 88 87
L11
K9
91 90 88 87
L5
91 90 88 87
L10
91 90 88 87
L7
C3
C5
91 90 88 87
F6
C7
C8
F7
C10
F8
C12
4.7K
VDDQ
88
G4
H6
88
G11
H7
R9050
4.7K
1%
1/16W
MF-LF
402 2
88
J4
H8
88
J11
H9
88
J6
N13
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
FBGA
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
OMIT
88
RFBDQS<8>
RFBDQS<11>
RFBDQS<9>
RFBDQS<10>
RFBDQM<8>
RFBDQM<11>
RFBDQM<9>
RFBDQM<10>
DQS0
DQS1
DQS2
DQS3
B2
H13
H2
B13
B3
DM0
DM1
DM2
DM3
H12
H3
B12
J8
91 90 88 87
J9
91 90 88 87
B4
88 87
C9050
B11
88 87
0.01UF
D4
91 90 88 87
D5
91 90 88 87
D6
91 90 88 87
D9
91 90 88 87
D10
91 90 88 87
20%
16V
2 CERM
402
FBBA<12>
FBBA<13>
FBBCLK0
FBBCLK0_L
FBBCKE
FBBCS0_L
FBBRAS_L
FBBCAS_L
FBBWE_L
D11
VSSQ
N4
BA0
BA1
M5
M11
CK
CK
CKE
CS
RAS
CAS
WE
M12
N12
N2
M2
L2
L3
C4
E6
C11
E9
H4
F5
H11
F10
L12
G5
L13
G10
M3
H5
M4
H10
N3
MCL/NC
RFU1/NC
RFU2/NC
NC
B7
RFBD<71>
RFBD<70>
RFBD<69>
RFBD<68>
RFBD<65>
RFBD<67>
RFBD<66>
RFBD<64>
RFBD<95>
RFBD<94>
RFBD<93>
RFBD<92>
RFBD<90>
RFBD<91>
RFBD<88>
RFBD<89>
RFBD<78>
RFBD<79>
RFBD<76>
RFBD<77>
RFBD<74>
RFBD<75>
RFBD<72>
RFBD<73>
RFBD<87>
RFBD<86>
RFBD<85>
RFBD<84>
RFBD<83>
RFBD<81>
RFBD<82>
RFBD<80>
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
6 88
L4
6 88
L7
6 88
L8
6 88
8MX32-300MHZ-1.8V
E10
VDD
VSS
L11
88
U9001
E8
E11
(1 OF 2)
J7
VREF
VOLTAGE=0.9V
88
G9
VSS_THERM
K11
FBB0_VREF
88
G8
K4
1%
1/16W
MF-LF
402 2
91 90 88 87
G7
F11
R90001
91 90 88 87
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
N5
G6
E12
91 90 88 87
F9
E3
F4
91 90 88 87
FBBA<0>
FBBA<1>
FBBA<2>
FBBA<3>
FBBA<4>
FBBA<5>
FBBA<6>
FBBA<7>
FBBA<8>
FBBA<9>
FBBA<10>
FBBA<11>
E7
E4
8MX32-300MHZ-1.8V
E8
E5
OMIT
D8
U9000
E7
E4
L4
(2 OF 2)
D7
(2 OF 2)
K6
91 90 88 87
K7
91 90 88 87
K8
91 90 88 87
K9
91 90 88 87
L5
91 90 88 87
L10
91 90 88 87
C3
6 88
C5
6 88
C7
F6
91 90 88 87
88
C8
F7
91 90 88 87
C10
F8
91 90 88 87
C12
F9
91 90 88 87
E3
G6
91 90 88 87
6 88
E12
G7
6 88
F4
6 88
F11
6 88
6 88
6 88
88
88
G8
88
G9
88
G4
H6
88
G11
H7
88
J4
H8
88
J11
H9
88
K4
J6
88
6 88
6 88
6 88
88
6 88
R90011
4.7K
1%
1/16W
MF-LF
402 2
6 88
6 88
6 88
88
4.7K
1%
1/16W
MF-LF
402 2
J7
88
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
B2
RFBDQS<15>
RFBDQS<12>
RFBDQS<14>
RFBDQS<13>
H13
H2
B13
B3
RFBDQM<15>
RFBDQM<12>
RFBDQM<14>
RFBDQM<13>
H12
H3
B12
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
FBGA
(1 OF 2)
DQS0
DQS1
DQS2
DQS3
DM0
DM1
DM2
DM3
VREF
FBBA<12>
FBBA<13>
N4
FBBCLK1
FBBCLK1_L
FBBCKE
FBBCS0_L
FBBRAS_L
FBBCAS_L
FBBWE_L
M11
91 90 88 87
J9
91 90 88 87
M5
BA0
BA1
B4
C9051
0.01UF
20%
2 16V
CERM
402
B11
88 87
D4
88 87
D5
91 90 88 87
D6
91 90 88 87
D9
91 90 88 87
D10
91 90 88 87
6 88
D11
91 90 88 87
88
E6
6 88
6 88
VSSQ
M12
N12
N2
M2
L2
L3
CK
CK
CKE
CS
RAS
CAS
WE
C4
E9
C11
F5
H4
M13
L9
M10
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
OMIT
J8
N13
VOLTAGE=0.9V
6 88
R9051
VSS_THERM
K11
FBB1_VREF
6 88
88
91 90 88 87
VDDQ
N5
FBBA<0>
FBBA<1>
FBBA<2>
FBBA<3>
FBBA<4>
FBBA<5>
FBBA<6>
FBBA<7>
FBBA<8>
FBBA<9>
FBBA<10>
FBBA<11>
NC
NC
F10
H11
G5
L12
G10
L13
H5
M3
H10
M4
J5
N3
MCL/NC
RFU1/NC
RFU2/NC
NC
B7
RFBD<121>
RFBD<122>
RFBD<120>
RFBD<123>
RFBD<124>
RFBD<126>
RFBD<125>
RFBD<127>
RFBD<97>
RFBD<96>
RFBD<99>
RFBD<98>
RFBD<100>
RFBD<101>
RFBD<102>
RFBD<103>
RFBD<113>
RFBD<112>
RFBD<114>
RFBD<115>
RFBD<116>
RFBD<117>
RFBD<118>
RFBD<119>
RFBD<104>
RFBD<105>
RFBD<106>
RFBD<107>
RFBD<108>
RFBD<110>
RFBD<109>
RFBD<111>
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8
6 88
6 88
6 88
88
6 88
6 88
6 88
88
6 88
6 88
88
6 88
6 88
6 88
6 88
88
6 88
6 88
6 88
88
6 88
6 88
6 88
88
6 88
6 88
6 88
88
6 88
6 88
6 88
88
M13
L9
NC
NC
M10
J5
J10
J10
K5
K5
K10
K10
91 90 89 87 7
=PPV_GPU_MEM
91 90 89 87 7
C9010
0.1UF
20%
2 10V
CERM
402
C9011
0.1UF
20%
2 10V
CERM
402
C9012
0.1UF
C9013
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C9014
0.1UF
20%
2 10V
CERM
402
C9015
0.1UF
20%
2 10V
CERM
402
C9016
0.1UF
20%
2 10V
CERM
402
C9017
0.1UF
C9018
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
=PPV_GPU_MEM
C9019
0.1UF
C9030
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C9031
0.1UF
20%
2 10V
CERM
402
C9032
0.1UF
20%
2 10V
CERM
402
C9033
0.1UF
20%
2 10V
CERM
402
C9034
0.1UF
20%
2 10V
CERM
402
C9035
0.1UF
C9036
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C9037
0.1UF
C9038
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C9039
0.1UF
20%
2 10V
CERM
402
GROUND VIAS FOR SIGNAL LAYER TRANSITIONS
ZH9000
HOLE-VIA
1
ZH9001
HOLE-VIA
1
ZH9002
HOLE-VIA
1
ZH9003
HOLE-VIA
1
ZH9004
HOLE-VIA
1
ZH9005
HOLE-VIA
1
ZH9006
HOLE-VIA
1
ZH9007
HOLE-VIA
1
ZH9008
HOLE-VIA
1
ZH9009
HOLE-VIA
1
ZH9010
HOLE-VIA
1
ZH9011
HOLE-VIA
1
ZH9012
HOLE-VIA
1
ZH9018
HOLE-VIA
1
ZH9013
HOLE-VIA
1
ZH9019
HOLE-VIA
1
ZH9014
HOLE-VIA
1
ZH9020
HOLE-VIA
GPU GDDR SDRAM B
ZH9015
HOLE-VIA
1
ZH9021
HOLE-VIA
PART NUMBER
ZH9016
HOLE-VIA
1
ZH9022
HOLE-VIA
QTY
DESCRIPTION
REFERENCE DES
CRITICAL
BOM OPTION
CRITICAL
FB64MB_300MHZ_SAM
333S0319
U9000,U9001
333S0311
U9000,U9001
CRITICAL
FB128MB_300MHZ_SAM
333S0312
U9000,U9001
CRITICAL
FB128MB_350MHZ_SAM
SAMSUNG

ZH9017
HOLE-VIA
1

ZH9023
HOLE-VIA
1
333S0320
U9000,U9001
CRITICAL
FB64MB_300MHZ_HYN
333S0314
U9000,U9001
CRITICAL
FB128MB_300MHZ_HYN
333S0315
U9000,U9001
CRITICAL
FB128MB_350MHZ_HYN
HYNIX
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
90
154
=PPV_GPU_VTT
C9190
1UF
91
NOSTUFF
R9100
88 87
FBDQS<0>
56
88 87
88 87
88 87
402
88 87
R9101
88 87
FBDQM<0>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
R9102
88 87
FBDQS<1>
56
88 87
88 87
88 87
402
88 87
R9103
88 87
FBDQM<1>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
R9104
88 87
FBDQS<2>
56
88 87
88 87
88 87
402
88 87
R9105
88 87
FBDQM<2>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
R9106
88 87
FBDQS<3>
56
88 87
88 87
88 87
402
88 87
R9107
88 87
FBDQM<3>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
88 87
R9108
88 87
88 87
FBDQS<4>
FBDQM<4>
56
88 87
88 87
402
88 87
R9109
88 87
56
88 87
88 87
402
88 87
NOSTUFF
88 87
R9110
88 87
88 87
FBDQS<5>
FBDQM<5>
56
88 87
88 87
402
88 87
R9111
88 87
56
88 87
88 87
402
88 87
NOSTUFF
R9112
88 87
FBDQS<6>
56
88 87
88 87
88 87
402
88 87
R9113
88 87
FBDQM<6>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
R9114
88 87
FBDQS<7>
56
88 87
88 87
88 87
402
88 87
R9115
88 87
FBDQM<7>
10%
6.3V
2 CERM
402
=PPV_GPU_VTT
56
88 87
88 87
402
88 87
88 87
C9159
FBD<0>
FBD<1>
FBD<2>
FBD<3>
FBD<4>
FBD<5>
FBD<6>
FBD<7>
FBD<8>
FBD<9>
FBD<10>
FBD<11>
FBD<12>
FBD<13>
FBD<14>
FBD<15>
FBD<16>
FBD<17>
FBD<18>
FBD<19>
FBD<20>
FBD<21>
FBD<22>
FBD<23>
FBD<24>
FBD<25>
FBD<26>
FBD<27>
FBD<28>
FBD<29>
FBD<30>
FBD<31>
FBD<32>
FBD<33>
FBD<34>
FBD<35>
FBD<36>
FBD<37>
FBD<38>
FBD<39>
FBD<40>
FBD<41>
FBD<42>
FBD<43>
FBD<44>
FBD<45>
FBD<46>
FBD<47>
FBD<48>
FBD<49>
FBD<50>
FBD<51>
FBD<52>
FBD<53>
FBD<54>
FBD<55>
FBD<56>
FBD<57>
FBD<58>
FBD<59>
FBD<60>
FBD<61>
FBD<62>
FBD<63>
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
FBA<0>
FBA<1>
FBA<2>
FBA<3>
FBA<4>
FBA<5>
FBA<6>
FBA<7>
FBA<8>
FBA<9>
FBA<10>
FBA<11>
FBA<12>
FBA<13>
FBARAS_L
FBACAS_L
FBAWE_L
FBACS0_L
FBACKE
1
2
3
4
1
2
3
4
2
1
3
4
1
2
3
4
2
1
3
4
1
2
3
4
1
2
4
3
2
1
4
3
2
1
3
4
1
2
3
4
2
1
3
4
1
2
4
3
1
3
2
4
2
1
3
4
1
2
4
3
1
3
2
4
8
7
6
5
8
7
6
5
7
8
6
5
8
7
6
5
7
8
6
5
8
7
6
5
8
7
5
6
7
8
5
6
7
8
6
5
8
7
6
5
7
8
6
5
8
7
5
6
8
6
7
5
7
8
6
5
8
7
5
6
8
6
7
5
RP9100
RP9100
RP9100
RP9100
RP9101
RP9101
RP9101
RP9101
RP9102
RP9102
RP9102
RP9102
RP9103
RP9103
RP9103
RP9103
RP9104
RP9104
RP9104
RP9104
RP9105
RP9105
RP9105
RP9105
RP9106
RP9106
RP9106
RP9106
RP9107
RP9107
RP9107
RP9107
RP9108
RP9108
RP9108
RP9108
RP9109
RP9109
RP9109
RP9109
RP9110
RP9110
RP9110
RP9110
RP9111
RP9111
RP9111
RP9111
RP9112
RP9112
RP9112
RP9112
RP9113
RP9113
RP9113
RP9113
RP9114
RP9114
RP9114
RP9114
RP9115
RP9115
RP9115
RP9115
C9191
C9101
1UF
91
R9116
FBDQS<8>
56
88 87
88 87
88 87
402
C9192
10%
2 6.3V
CERM
402
88 87
FBDQM<8>
88 87
R9117
88 87
88 87
56
402
88 87
88 87
NOSTUFF
R9118
88 87
FBDQS<9>
56
88 87
88 87
88 87
402
C9103
88 87
R9119
1UF
10%
2 6.3V
CERM
402
88 87
FBDQM<9>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
R9120
88 87
FBDQS<10>
56
88 87
88 87
88 87
402
C9105
88 87
R9121
1UF
10%
6.3V
2 CERM
402
88 87
FBDQM<10>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
R9122
88 87
FBDQS<11>
56
88 87
88 87
88 87
402
C9107
1UF
10%
6.3V
2 CERM
402
88 87
FBDQM<11>
88 87
R9123
88 87
88 87
56
402
88 87
88 87
88 87
FBDQS<12>
R9124
NOSTUFF
88 87
56
88 87
88 87
C9109
1UF
10%
6.3V
2 CERM
402
88 87
FBDQM<12>
402
88 87
R9125
88 87
56
88 87
88 87
402
88 87
NOSTUFF
88 87
56
88 87
R9126
88 87
FBDQS<13>
C9111
1UF
10%
6.3V
2 CERM
402
88 87
FBDQM<13>
88 87
402
88 87
R9127
88 87
56
88 87
88 87
402
88 87
NOSTUFF
R9128
88 87
FBDQS<14>
56
88 87
88 87
88 87
402
C9113
88 87
R9129
1UF
10%
6.3V
2 CERM
402
88 87
FBDQM<14>
56
88 87
88 87
402
88 87
88 87
NOSTUFF
R9130
88 87
FBDQS<15>
56
88 87
88 87
88 87
402
C9115
88 87
R9131
1UF
10%
6.3V
2 CERM
402
C9193
88 87
FBDQM<15>
10%
6.3V
2 CERM
402
=PPV_GPU_VTT
NOSTUFF
1UF
10%
2 6.3V
CERM
402
=PPV_GPU_MEM 7 87 89 90 91
1
=PPV_GPU_VTT
1UF
1UF
88 87
56
88 87
88 87
402
88 87
88 87
C9179
FBD<64>
FBD<65>
FBD<66>
FBD<67>
FBD<68>
FBD<69>
FBD<70>
FBD<71>
FBD<72>
FBD<73>
FBD<74>
FBD<75>
FBD<76>
FBD<77>
FBD<78>
FBD<79>
FBD<80>
FBD<81>
FBD<82>
FBD<83>
FBD<84>
FBD<85>
FBD<86>
FBD<87>
FBD<88>
FBD<89>
FBD<90>
FBD<91>
FBD<92>
FBD<93>
FBD<94>
FBD<95>
FBD<96>
FBD<97>
FBD<98>
FBD<99>
FBD<100>
FBD<101>
FBD<102>
FBD<103>
FBD<104>
FBD<105>
FBD<106>
FBD<107>
FBD<108>
FBD<109>
FBD<110>
FBD<111>
FBD<112>
FBD<113>
FBD<114>
FBD<115>
FBD<116>
FBD<117>
FBD<118>
FBD<119>
FBD<120>
FBD<121>
FBD<122>
FBD<123>
FBD<124>
FBD<125>
FBD<126>
FBD<127>
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
1
4
2
3
1
3
2
4
2
1
3
4
2
1
4
3
1
2
3
4
1
2
3
4
2
1
4
3
2
1
4
3
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
2
1
3
4
2
1
3
4
1
2
4
3
1
3
2
4
8
5
7
6
8
6
7
5
7
8
6
5
7
8
5
6
8
7
6
5
8
7
6
5
7
8
5
6
7
8
5
6
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
7
8
6
5
7
8
6
5
8
7
5
6
8
6
7
5
RP9116
RP9116
RP9116
RP9116
RP9117
RP9117
RP9117
RP9117
RP9118
RP9118
RP9118
RP9118
RP9119
RP9119
RP9119
RP9119
RP9120
RP9120
RP9120
RP9120
RP9121
RP9121
RP9121
RP9121
RP9122
RP9122
RP9122
RP9122
RP9123
RP9123
RP9123
RP9123
RP9124
RP9124
RP9124
RP9124
RP9125
RP9125
RP9125
RP9125
RP9126
RP9126
RP9126
RP9126
RP9127
RP9127
RP9127
RP9127
RP9128
RP9128
RP9128
RP9128
RP9129
RP9129
RP9129
RP9129
RP9130
RP9130
RP9130
RP9130
RP9131
RP9131
RP9131
RP9131
C9117
1UF
10%
6.3V
2 CERM
402
C9194
1UF
10%
6.3V
2 CERM
402
C9195
1UF
10%
6.3V
2 CERM
402
C9119
1UF
10%
6.3V
2 CERM
402
GPU VTT VREG

=PPV_GPU_MEM
1
7 87 89 90 91
C9121
1UF
10%
2 6.3V
CERM
402
1 NOSTUFF 1
C9181
47UF
10UF
20%
2 6.3V
X5R
1206-1
1
NOSTUFF
C9186
C9184
R9180
0.1UF
10%
2 6.3V
X5R
805
20%
2 16V
CERM
603
10K
5%
1/16W
MF-LF
2 402
C9123
1UF
U9180_REFOUT
U9180_EXT_REF
10%
2 6.3V
CERM
402
C9180
VDD
20%
16V
CERM 2
603
NE57814
HSO8
6
EXTREFIN REFOUT
U9180_SBY7
STANDBY*
VTT
VTTSENSE
C9125
CRITICAL
1UF
10%
2 6.3V
CERM
402
INT. 10K PULLUP
0.1UF
U9180
0.1UF
20%
16V
CERM 2
603
C9185
VD
THRML
PAD
3
2
VSS
PPV_GPU_VTT
C9182
330UF
20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF
C9127
VOLTAGE=0.9V
MAKE_BASE=TRUE
1
=PPV_GPU_VTT
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
89 88 87
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
1
1
2
2
NOSTUFF
C9183
10UF
10%
6.3V
2 X5R
805
1UF
10%
6.3V
2 CERM
402
C9129
1UF
10%
6.3V
2 CERM
402
C9131
1UF
10%
6.3V
2 CERM
402
R9140
R9141
R9142
R9143
R9144
R9145
R9146
R9147
R9148
R9149
R9150
R9151
R9152
R9153
R9154
R9155
R9156
R9157
R9158
10%
6.3V 2
X5R
805
90 88 87
90 88 87
90 88 87
C9141
90 88 87
1UF
90 88 87
10%
6.3V
2 CERM
402
90 88 87
90 88 87
90 88 87
90 88 87
90 88 87
90 88 87
C9149
90 88 87
1UF
90 88 87
10%
6.3V
2 CERM
402
90 88 87
90 88 87
90 88 87
90 88 87
90 88 87
C9157
90 88 87
1UF
FBBA<0>
FBBA<1>
FBBA<2>
FBBA<3>
FBBA<4>
FBBA<5>
FBBA<6>
FBBA<7>
FBBA<8>
FBBA<9>
FBBA<10>
FBBA<11>
FBBA<12>
FBBA<13>
56
56
56
56
56
56
56
56
56
56
56
56
56
56
FBBRAS_L
FBBCAS_L
FBBWE_L
FBBCS0_L
FBBCKE
56
56
56
56
56
NOSTUFF
10%
6.3V
2 CERM
402
R9160
R9161
R9162
R9163
R9164
R9165
R9166
R9167
R9168
R9169
R9170
R9171
R9172
R9173
R9174
R9175
R9176
R9177
R9178
C9161
1UF
10%
2 6.3V
CERM
402
C9169
1UF
10%
2 6.3V
CERM
402
FB Parallel Termination
SYNC_MASTER=M33-DD
1
C9177
1UF
10%
6.3V
2 CERM
402

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6863
SCALE
91
10UF
89 88 87
91
10%
6.3V
2 CERM
402
10UF
10%
6.3V
X5R 2
805
FRAME BUFFER B TERMINATION
7 87 89 90 91
91
=PPV_GPU_MEM
FRAME BUFFER A TERMINATION
OF
91
154
=PP3V3_GPU
7 85 92 93 96
7 85 92 93 96
96 93 92 85 7
NOSTUFF
1
93
=PP3V3_GPU
R9200
R9204
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
GPU_GPIO<1>
93
C9230
0.1UF
20%
2 10V
CERM
402
GPU_GPIO<0>
R9256
R9201
10K
5%
1/16W
MF-LF
2 402
93
GPU_PWM
5%
1/16W
MF-LF
402
GPIO<1> TRANSMITTER DE-EMPHASIS (ACTIVE LOW)
APPLE GPIOS
ATI STRAPS
=PP3V3_GPU
119 92 20
GPU_PWM_R
U9230
R9230
R9235
47
1
LCD_PWM_R
LCD_PWM
5%
1/16W
MF-LF
402
R9232
3 MC74VHC1G08
SOT23-5-LF
NOSTUFF
1
10K
5%
1/16W
MF-LF
402 2
10K
5%
1/16W
MF-LF
2 402
GPIO<0> TRANSMITTER POWER SAVINGS

(FEATURE DOES NOT WORK - PULLED HIGH TO DISABLE)
PCI_RESET_L
NOSTUFF
R9231
0
1
5%
1/16W
MF-LF
402
=PP3V3_GPU
7 85 92 93 96
RV370XT
1
R9212
R9240
47
10K
5%
1/16W
MF-LF
2 402
93
93
93
93
93
GPU_DVPDATA<0>
GPU_GPIO<4>
GPU_GPIO<5>
GPU_GPIO<6>
GPU_GPIO<8>
GPIO<4> RV370: EXTRA TX OUTPUT CURRENT

RV380 A23: LANE REVERSAL
GPIO<5> FORCE_COMPLIANCE
GPIO<6> CM_RANGE
GPIO<8> DEBUG_ACCESS
R9207
R9209
R9211
=PP3V3_GPU
RV380XT
1
R9213
10K
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
INV_CUR_HI
R9242
10K
5%
1/16W
MF-LF
2 402
R9244
47
GPU_DVPDATA<1>
NOSTUFF
1
10K
93
93
TMDS_EN
96
5%
1/16W
MF-LF
402
R9243
93
7 85 92 93 96
NOSTUFF
1
93
93
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
2 402
GPU_GPIO<9>
GPU_GPIO<11>
GPU_GPIO<12>
GPU_GPIO<13>
1
R9215
ROMIDCFG
R9217
R9219
R9221
10K
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
96 93 92 85 7
=PP3V3_GPU
NOSTUFF
1
C9245
0.1UF
20%
2 10V
CERM
402
MEMORY STRAPS
119 92 20
=PP3V3_GPU
7 85 92 93 96
93
NOSTUFF
1
R9222
93
93
93
93
93
FB64MB_300MHZ_HYN&FB128MB_300MHZ_HYN&FB128MB_350MHZ_HYN
FB128MB_300MHZ_SAM&FB128MB_300MHZ_HYN&FB128MB_350MHZ_SAM&FB128MB_350MHZ_HYN
RV380XT
RV370XT
1
1
1
1
R9224
R9202
R9226
R9228
10K
10K
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
GPU_DVPDATA<2>
U9245
FPD_PWR_ON
96
3 MC74VHC1G08
SOT23-5-LF
R9246
10K
5%
1/16W
MF-LF
402 2
GPU_GPIO<7>
GPU_GPIO<10>
GPU_GPIO<14>
GPU_DVPDATA<3>
GPU_DVPDATA<4>
R9245
0
1
5%
1/16W
MF-LF
402
R9223
FB64MB_300MHZ_SAM&FB128MB_300MHZ_SAM&FB128MB_350MHZ_SAM
FB64MB_300MHZ_SAM&FB64MB_300MHZ_HYN
RV370XT
1
1
RV380XT
1
R9225
R9203
R9227
10K
10K
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
R9229
5%
1/16W
MF-LF
2 402
GPU Straps
GPIO<7> - MEMORY DIE REVISION

0 - ORIGINAL DIE REVISION
1 - NEW (FUTURE) DIE REV
GPIO<10> - MEMORY VENDOR
0 - SAMSUNG
1 - HYNIX
GPIO<14> - MEMORY DENSITY
0 - 4MX32
1 - 8MX32
DVPDATA<3,4> - SPEED
00 - 325E / 200M
01 - 400E / 300M
10 - 500E / 350M
11 - RESERVED FOR FUTURE USE
NOSTUFF 5
1
PCI_RESET_L

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
92
154
R93831
R9381
R9385
92
92
92
402
CY25811_S1
CY25811_S0
5%
1/16W
MF-LF
402 2
92
92
GPU_SS
1 XIN/CLKIN
33 2
8 XOUT
SSCLK 5 GPU_SSCLK_UF 1
NET_SPACING_TYPE=CLOCKS 5%
1/16W
6 FRSEL
MF-LF
NC
R93821
20%
2 10V
CERM
402
CY25811
SOI-LF
5%
1/16W
MF-LF
2 402
NC
NOSTUFF
C9381
0.1uF
10%
6.3V 2
X5R
805
U9380
10UF
VDD
0
5%
1/16W
MF-LF
402 2
C9380
3
4
92
S1
S0
92
92
VSS
NOSTUFF
92
R9380
92
96 93 92 85 7
5%
1/16W
MF-LF
2 402
=PP3V3_GPU
92
92
R93161
92
1K
1%
1/16W
MF-LF
402 2
GPU_CLK27M_OSC_SS
NET_SPACING_TYPE=CLOCKS
NC
GPU_GPIO<0>
GPU_GPIO<1>
TP_GPU_GPIO<2>
TP_GPU_GPIO<3>
GPU_GPIO<4>
GPU_GPIO<5>
GPU_GPIO<6>
GPU_GPIO<7>
GPU_GPIO<8>
GPU_GPIO<9>
GPU_GPIO<10>
GPU_GPIO<11>
GPU_GPIO<12>
GPU_GPIO<13>
GPU_GPIO<14>
GPU_MEMSSIN
27M OSC
L9370
FERR-EMI-100-OHM
96 93 92 85 7
=PP3V3_GPU
2
SM
NOSTUFF
R9371
5%
1/16W
MF-LF
2 402
ATI_GPU_OE 1
C9370
0.1uF
G9370
20%
2 6.3V
CERM
805
OSC
8 GPU_CLK27M_OSC
SM-1
OUT
OMIT
GND
NC
R9327
1
1K
2 GPU_TESTEN
392
93 9
93 9
1%
1/16W
MF-LF
402
R93731
PLACE R9373 CLOSE TO ATI PIN AH28

TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
=PP3V3_GPU
96 93 92 85 7
OSC, 27MHZ, 30PPM
G9370
R9318
CRITICAL
PP1V8_GPU_TXVDDR
VOLTAGE=1.8V
0805
GND_GPU_TXVSSR
PP1V8_GPU_TPVDD
1.8UH
C9336
0.1UF
20%
2 10V
CERM
402
C9337
0.1UF
20%
2 10V
CERM
402
0805
85
C9330
20%
2 6.3V
CERM
805
GND_GPU_TPVSS
C9331
0.1UF
20%
2 10V
CERM
402
C9332
0.1UF
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
VOLTAGE=0V
L9340
PP1V8_GPU_VDDDI
0805
GND_GPU_VSSDI
20%
6.3V
2 CERM
805
C9340
4.7UF
C9341
1UF
10%
6.3V
2 CERM
402
C9342
AF25
PLLTEST
AH27
TESTEN
TEST_YCLK
TEST_MCLK
VOLTAGE=1.8V
C9345
4.7UF
GND_GPU_AVSSQ
20%
2 6.3V
CERM
805
GND_GPU_AVSSN
C9346
C9355
4.7UF
XW9355
SM
VOLTAGE=0V
20%
6.3V
2 CERM
805
C9356
1UF
10%
6.3V
2 CERM
402
C9357
1UF
NO CONNECTS
96 93
96 93
96 93
96 93
96 93
96 93
96 93
96 93
96 93
96 93
96 93
96 93
96 93
=PP3V3_GPU
TMDS0
TMDS0
TMDS0
=PP3V3_GPU
93 9
GPU_PWM
AK12
AJ12
TMDS_CKP
TMDS_CKM
TMDS_D0P
TMDS_D0M
TMDS_D1P
TMDS_D1M
TMDS_D2P
TMDS_D2M
AE23
AE22
VDD1DI
VDD2DI
VSS1DI
VSS2DI
2.2
AVSSQ
AVSSN
A2VSSN
RSET
AH26
DDC1CLK
DDC1DATA
AF24
GPIO_AUXWIN
STEREOSYNC
AG24
Y_G
C_R
COMP_B
H2SYNC
V2SYNC
AK21
AJ22
R2SET
AH21
DDC2CLK
DDC2DATA
AE13
DAC2
A2VDDQ
A2VSSQ
93 9
GPU_TEMP
1K
CRITICAL
C9390
5%
1/16W
MF-LF
402 2
GPU_TEMP
2
VCC
15
ALERT 11
STBY
I2C_GPU_DIODE_SDA
I2C_GPU_DIODE_SCL
MAX6690MEE
I579
I590
I591
I660
I661
I680
I681
I682
I683
GPU_TEMP
SMBDATA
9
ADD0
14
SMBCLK
9
ADD1 6
GPU_DIODE_PLUS
DXP
DXN
(SYM_VER2)
R9393
1K
5%
1/16W
MF-LF
2 402
TSENSE_GPU_OVERTEMP_L
NOSTUFF
R9395
NOSTUFF
R93921
NC_5 5
1K
NC_9 9
5%
1/16W
MF-LF
402 2
NC_13 13
NC_16 16
20 24 28
1NOSTUFF
R9394
1K
5%
1/16W
MF-LF
2 402
A0 | A1 | ADDR
----+----+-----0 | 0 | 30/31
0 | hiZ| 32/33
0 | 1 | 34/35
hiZ | 0 | 52/53
hiZ | hiZ| 54/55
hiZ | 1 | 56/57
1 | 0 | 98/99
1 | hiZ| 9A/9B
1 | 1 | 9C/9D
GPU_DIODE_MINUS
PLACE C9392 CLOSE TO TEMP SENSOR
93 96
93 96
93 96
93 96
93 96
93 96
93 96
93 96
93 96
93 96
GPU_DAC1_VSYNC
GPU_RSET
GPU_STEREOSYNC
DEVELOPMENT
R93261
TP_GPU_HSYNC
75
1%
1/16W
MF-LF
402 2
R93251
R9320
10K
5%
1/16W
MF-LF
402 2
TP_GPU_DDC1CLK
TP_GPU_DDC1DATA
AG25
SYS_OVERTEMP_L
NC
NC
NC
AJ25
AK25
5%
1/16W
MF-LF
402
GND
7
TSENSE_GPU_ADD1
NC_1 1
10 TSENSE_GPU_ADD0
12
499
XW9347
SM
1
1%
1/16W
MF-LF
2 402
GND_GPU_AVSSQ
NC
6 93
AH25
AK22
AJ24
AK24
AE14
ANALOG_GRN
ANALOG_RED
ANALOG_BLU
ANALOG_HSYNC
ANALOG_VSYNC
I2C_GPU_MON_SCL
I2C_GPU_MON_SDA
93 96
93 96
93 96
93 96
93 96
93 96
93 96
RV370XT
RV370XT
RV370XT
R9321 1R9322 1R9323

100
100
100
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
GPU DVI & DACs


PLACE R9321-3 & FL9600-2 NEAR MINI-VGA CONNECTOR

ROUTE GND IN BETWEEN RGB SIGNALS WITH A VIA EVERY INCH

1
1
C9365
20%
6.3V
2 CERM
805
GND_GPU_A2VSSQ
R9324
C9366
1UF
10%
6.3V
2 CERM
402
715
SIZE
1%
1/16W
MF-LF
2 402
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6863
SCALE
VOLTAGE=0V
I578
92
I2C_GPU_TMDS_SCL
I2C_GPU_TMDS_SDA
AG23
AJ26
R93911
VOLTAGE=3.3V
10%
50V
CERM 2
402
AK15
AK27
AJ27
GPU_TEMP
C9392 1
AJ14
AK16
R
G
B
HSYNC
VSYNC
A2VDD
I577
PP3V3_GPU_TSENSE
0.0022UF
AJ15
AG22
AVDD
I576
GPU THERMAL SENSOR
GPU_TEMP
AJ13
AK13
DDC3CLK
DDC3DATA
DAC1
I574
R9390
QSOP
AG12
TPVSS
I575
5%
1/16W
MF-LF
2 402
39
AK18
AH12
I573
10K
39
AF20
TPVDD
I572
I589
U9390
AJ23
TMDS
TMDS_CK
TMDS_CK
TMDS_D0
TMDS_D0
TMDS_D1
TMDS_D1
TMDS_D2
TMDS_D2
R9310
10%
6.3V
2 CERM
402
AF18
AF19
TXVSSR
DIFFERENTIAL_PAIR
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
I2C
I2C
I2C
I2C
1UF
AJ20
AJ21
TXCP
TXCM*
TX0P
TX0M*
TX1P
TX1M*
TX2P
TX2M*
NET_SPACING_TYPE
7 85 92 93 96
AE17
AE18
GPU_R2SET
4.7UF
96 93
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
10%
6.3V
2 CERM
402
PP1V8_GPU_A2VDDQ
VOLTAGE=1.8V
96 93
92
5%
1/16W
MF-LF
402
AF17
TXVDDR
NET_PHYSICAL_TYPE
TMDS_TCKM
XW9365
SM
1
92
AJ19
FERR-220-OHM
0805
96 93
AE19
GND_GPU_A2VSSN 6
92
TMDS_CKP
TMDS_CKM
TMDS_D0P
TMDS_D0M
TMDS_D1P
TMDS_D1M
TMDS_D2P
TMDS_D2M
ANALOG_GRN
ANALOG_RED
ANALOG_BLU
ANALOG_HSYNC
ANALOG_VSYNC
I2C_GPU_TMDS_SCL
I2C_GPU_TMDS_SDA
I2C_GPU_MON_SCL
I2C_GPU_MON_SDA
AE15
AE16
NC
NC
L9365
96 93
96 93 92 85 7
AF15
AF16
AF22
92
AE12
AG21
92
D9
PP2V5_GPU_A2VDD
DIFFERENTIAL IMPEDANCE SHOULD BE 100 OHM
GPU_DVPCNTL
AJ17
AJ18
AF23
10%
6.3V
2 CERM
402
GPU_TEMP
T4
AB4
AH20
C9303
1UF
10%
6.3V
2 CERM
402
AE10
E4
AD22
C9302
AH11
AG20
AH15
AH13
1UF
10%
6.3V
2 CERM
402
AJ11
AG18
AE20
AF21
1UF
10%
2 6.3V
CERM
402
AJ10
AK10
D19
D25
VOLTAGE=0V
MIN_NECK_WIDTH=0.25MM AH22
VOLTAGE=0V
AG7
HPD1
1UF
GPU_DVPDATA<0>
GPU_DVPDATA<1>
GPU_DVPDATA<2>
AH7
GPU_DVPDATA<3>
AK7
GPU_DVPDATA<4>
AJ7 TP_GPU_DVPDATA<5>
AH8 TP_GPU_DVPDATA<6>
AK9 TP_GPU_DVPDATA<10>
AE6 TP_GPU_DVPDATA<12>
AG6 TP_GPU_DVPDATA<13>
AF6 TP_GPU_DVPDATA<14>
AG16
AG17
AH23
93 6
XW9345
SM
AD10
DVOMODE
C9301
AJ6
AK6
D13
1UF
PP1V8_GPU_AVDD
0805
AC10
AD9
AD19
AD21
AC9
DVPCNTL
DPLUS
DMINUS
0
1
2
3
AH6
AG15
AE21
VOLTAGE=0V
L9345
85
XTALOUT
XTALIN
10%
6.3V
2 CERM
402
FERR-220-OHM
VREFG
AJ29
AH28
AE24
VOLTAGE=1.8V
XW9340
SM
AF2
C9333
FERR-220-OHM
AG2
AF3
AG14
AH14
4.7UF
XW9330
SM
AG1
AF13
AF14
VOLTAGE=1.8V
AH1
AG3
AG13
L9330
20%
2 6.3V
CERM
805
VOLTAGE=0V
NOSTUFF
C9335
4.7UF
XW9335
SM
1
AH2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
AJ16
5%
1/16W
MF-LF
402
FERR-220-OHM
1
L9335
=PP1V8_GPU
AH3
AJ2
AH19
AH24
R9319
MON_DETECT
96
AJ3
AK3
AH17
AH18
10K
5%
1/16W
MF-LF
402 2
87 86 85 84
20%
6.3V
2 CERM
805
AH16
TABLE_5_ITEM
197S0176
BGA
AF4
AF12
MON_DETECT_R
274
1%
1/16W
MF-LF
402 2
RV370XT
AK4
AH4
AF11
AE11
GPU_DIODE_PLUS
GPU_DIODE_MINUS
U8400
C9300
4.7UF
VDDR4
0
1
2
3
4
(5 OF 5)
5
6
OMIT
7
8
9
10
11
12
13
14
GPIO+PWRCNTL
GPIO_MEMSSIN
AJ4
E8
B6
5%
1/16W
MF-LF
402
R9372
27.0000M
OE
0.1UF
20%
2 10V
CERM
402
5%
1/16W
MF-LF
2 402
C9371
4.7uF
20%
10V
CERM 2
402
VCC
100K
C9317
NC
GPU_CLK27M_IN
VOLTAGE=3.3V
14
1K
1%
1/16W
MF-LF
402 2
GPU_SS
PP3V3_GPU_OSC
R9370
R93171
(PLACE R9371 AND R9372

CLOSE TO OSCILLATOR PIN 8)
VDDR3
ROMCS*
AJ5
AH5
AG4
GPU_VREFG
(PLACE R9371 CLOSE TO OSC)
AF5
DVPDATA
GPU_SS 7 CRITICAL
GPU_SS
GPU_SS
EXTERNAL TMDS
NOSTUFF
GPU_SS
CLK
SM
TEST
VOLTAGE=3.3V
AD7
PP3V3_GPU_SS
AC21
AC22
AC8
S0=1;S1=M => -1.5% DOWN-SPREAD
GPIO
=PP3V3_GPU
=PP3V3_GPU
SPREAD SPECTRUM SUPPORT
L9380
5
96 93 92 85 7
FERR-EMI-100-OHM
96 93 92 85 7
7
GPU_SS
AC19
OF
93
154
INTERNAL LCD
EXTERNAL VGA CONNECTOR

TABLE_5_HEAD
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
PART#
NET_PHYSICAL_TYPE
96
96
96
96
96
96
96
96
TCKP
TCKM
TD0P
TD0M
TD1P
TD1M
TD2P
TD2M
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
GPU_TMDS
TCK
TCK
TD0
TD0
TD1
TD1
TD2
TD2
I885
96 93 92 85 7
I887
R9607
2.0K
I889
2.0K
5%
1/16W
MF-LF
402 2
I890
I892
93
R9626
R9606
33
R9608
33
96
I2C_TMDS_SCL
5%
1/16W
MF-LF
402
96
96
96
96
I2C_TMDS_SDA
96
5%
1/16W
MF-LF
402
02
TMDS_D2M
96
96
96
NOSTUFF
93
96
10%
16V
CERM
402
96
96
1 C9601
0.01UF
2
I2C_GPU_TMDS_SCL
I2C_GPU_TMDS_SDA
96
96
5%
1/16W
MF-LF
2 402
I891
PLACE FILTER CLOSE

TO TMDS CONNECTOR
96
5%
1/8W
MF-LF
805
R9605
I888
93
PLACE R9600-R9604, C9600

AS CLOSE TO GPU AS POSSIBLE
I886
PP3V3_DDC
96
FILT_ANALOG_GRN
ANALOG_GRN_LC
ANALOG_GRN_LCL
FILT_ANALOG_RED
ANALOG_RED_LC
ANALOG_RED_LCL
FILT_ANALOG_BLU
ANALOG_BLU_LC
ANALOG_BLU_LCL
VGA_VSYNC
VGA_VSYNC_R
VGA_HSYNC
VGA_HSYNC_R
DESCRIPTION
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
GPU_VGA
INDUCTOR, 47NH, 0.20 OHM
L9602
90-OHM
130
I955
I956
I1037
I1038
I957
96 93 92 85 7
I1039
=PP3V3_GPU
I1040
I958
TD2M
143
PP5V_USB2
96
0.1UF
CRITICAL
I961
U9670
14 74LC125
I960
R9680
PP5V_VGA
VOLTAGE=5V
2
NOSTUFF
TMDS_D2P
TD2P
INTERNAL TMDS CONNECTOR
5%
1/8W
MF-LF
805
96
SDF9600
02
ANALOG_VSYNC
20%
10V
2 CERM
402
R9671
125
1 TSSOP
NOSTUFF
(516S0241)
02
14 74LC125
6
VGA_HSYNC 96
0.01UF
ANALOG_HSYNC
93
GND_CHASSIS_VGA
CRITICAL
33
125
4 TSSOP
7 96
VGA_HSYNC_R 96
5%
1/16W
MF-LF
402
NOSTUFF
C9607
L9608
SYM_VER-1
SM
TD1M
1%
1/16W
MF-LF
402 2
TMDS_D1P
TD1P
96
96
96
TD0M
TD0P
NOSTUFF
R9630
93
02
TMDS_D0M
96
96
L9609
R96021
90-OHM
130
TD2M
TD2P
SYM_VER-1
TD0M
96
SM
1%
1/16W
MF-LF
402 2
96
2
NOSTUFF
TMDS_D0P
TD0P
I2C_TMDS_SDA
96
R9631
93
PPVCC_TMDS
GND_CHASSIS_VGA
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
96 93 92 85 7
PP3V3_DDC
TCKM
TCKP
R96011
96
TD1M
TD1P
96
93
SM
C9616
TMDS_CK_TERM
TCKM
TCKP
R9600
10%
2 16V
CERM
1210
GND_CHASSIS_TMDS
93
1 S
I2C_GPU_MON_SCL
PANEL POWER SEQUENCING
96 92
47NH-0.20-OHM
FPD_PWR_ON
2
1
S1
NOSTUFF
NOSTUFF
R9625
75
LED9600
93
FPD_PWR_SW_G
NOSTUFF
20%
16V
CERM
402
R9613
100K
5%
1/16W
MF-LF
2 402
D9614
C9617
10UF
MMBD914XXG
10%
16V
CERM 2
1210
SOT23
3
5%
1/8W
MF-LF
805
1
ANALOG_GRN_LC
96
96 7
R9690
10K
5%
1/16W
MF-LF
2 402
75
NOSTUFF
93
R9641
ANALOG_GRN_LCL 96
VGA_HSYNC_R
96
FILT_ANALOG_RED 96
FILT_ANALOG_GRN 96
FILT_ANALOG_BLU 96
I2C_MON_SCL_R
MON_DETECT
VGA_VSYNC_R 96
4 (RED_RTN)
5
6 (GRN_RTN)
7
8
PP5V_VGA
300
5%
1/8W
MF-LF
2 805
13
14
C9605 1
0.01UF
16
10%
16V
CERM
402
ANALOG_BLU
FOR PANEL VCC FALL TIME SPEC
LCFILTER
47NH-0.20-OHM
1
ANALOG_BLU_LC
96
C9603 1
0.01UF
10%
16V
CERM
402
GND_CHASSIS_VGA
TMDS / ExtVGA
SM-220MHZ-LF
2
SYNC_MASTER=M33-DD
0805
3 4
C9644
75

NOSTUFF
R9642
ANALOG_BLU_LCL 96

402

1
DZ9600
R9645PLACE
R9321-3 & FL9600-2 CLOSE TO J9603
8.2PF
MMBZ5227B
+/-0.25PF
50V
2 CERM
402
SOT23
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6863
SCALE
10%
16V
CERM
402
96 7
92
C9604 1
0.01UF
OMIT
FL9602
1%
1/16W
MF-LF
2 402
SOT23-LF
5%
1/8W
MF-LF
805
2N7002
SYS_POWERUP_L_BUF
R9644
L9645
L9644
93
Q9690
16 7
96
10 I2C_MON_SDA_R 96
12(BLU_RTN)
11
+/-0.25PF
50V
2 CERM
402
R9691
5%
1/8W
MF-LF
2 805
10K
TMDS_EN
96
300
Q9690_D
5%
1/16W
MF-LF
2 402
3 4
C9643
F-ST-SM
15
=PP12V_GPU
R9660
R9614
GND_CHASSIS_RIGHT
8.2PF
SOT23-LF
0805
1
2N7002
J9603
96
TMDS_EN_R
Q9601
DV01793-M33-4F
SM-220MHZ-LF
1%
1/16W
MF-LF
402 2
FPD_PWR_ON_D
3 NOSTUFF
7 96
CRITICAL
LCFILTER
47NH-0.20-OHM
1
1
47PF
402
VOLTAGE=12V
C9678
5%
50V
2 CERM
402
M33: 514S0097
OMIT
FL9601
NOSTUFF
FPD_PWR_ON
SILKSCREEN: 3
0.022UF
96 92
ANALOG_GRN
GREEN-3.6MCD
2.0X1.25MM-SM
PPVCC_TMDS
R9643
L9643
L9642
C9618
NOSTUFF
820
LED5900_P1
R9640
ANALOG_RED_LCL 96
8.2PF
NOSTUFF
C9677
GND_CHASSIS_VGA
+/-0.25PF
50V
2 CERM
402
5%
1/16W
MF-LF
2 402
20%
16V
CERM 2
402
I2C_MON_SDA_R 96
C9640
5%
1/10W
MF-LF
2 603
4 376S0385
100K
0.01UF
100
3 4
R9612
GATE
C9619 1
0805
1
7 96
5%
1/4W
MF-LF
2 1206
R9676
I2C_MON_SDA
SM-220MHZ-LF
LED5900_PWR
125
10 TSSOP
2N7002DW-X-F
D 3
R9634
D4
D3
D2
D1
S3
S2
Q9675
402
1
8
I2C_MON_SCL_R 96
OMIT
FL9600
1%
1/16W
MF-LF
402 2
Q9600
SOI
5%
1/16W
MF-LF
402
LCFILTER
14 74LC125
IRF7416BF
100
5%
1/16W
MF-LF
2 402
5%
50V
CERM 2
402
1
ANALOG_RED_LC
96
5%
1/8W
MF-LF
805
=PP12V_GPU
I2C_MON_SCL
4.7K
47PF
L9640
ANALOG_RED
NOSTUFF
D 6
4 S
I2C_GPU_MON_SDA
L9641
U9670
=PP12V_GPU
R9675
SOT-363
INDUCTORS SHOULD BE 47 NH
ANY ~8PF CAP SHOULD DO
96
R9678
5%
1/16W
MF-LF
402 2
96
96 7
2N7002DW-X-F
5%
1/16W
MF-LF
402
R9633
TMDS_CKP
Q9675
SOT-363
10%
16V
CERM
402
C
1
4.7K
2
G
0.01UF
93
NOSTUFF
5%
1/16W
MF-LF
2 402
165
1%
1/16W
MF-LF
402 2
10K
C9615
10K
5%
1/16W
MF-LF
402 2
PP5V_VGA
R96771
R9674
5
1
SYM_VER-1
90-OHM
96
STDOFF-3MMOD4.6MMH-1.35-TH
L9610
1%
1/16W
MF-LF
402 2
5%
50V
CERM 2
402
93
96
I2C_TMDS_SCL
SDF9601
165
22PF
R96731
10UF
C9600 1
96
96
02
TMDS_CKM
=PP3V3_GPU
96
VOLTAGE=3.3V
NOSTUFF
93
7 96
96
R9632
22PF
5%
50V
2 CERM
402
3
NOSTUFF
R9629
93
96
C9608
5%
50V
CERM 2
402
F-ST-SM
90-OHM
NOSTUFF
1
22PF
J9602
130
96
R9672
53307-3072
R96031
VGA_VSYNC_R
5%
1/16W
MF-LF
402
U9670
C9602
R9628
TMDS_D1M
33
VGA_VSYNC 96 1
96
10%
2 16V
CERM
402
STDOFF-3MMOD4.6MMH-1.35-TH
1
93
C9670
I959
SYM_VER-1
R9627
93
FL9600,FL9601,FL9602
I1036
93
SM
1%
1/16W
MF-LF
402 2
BOM OPTION
I1035
R96041
TABLE_5_ITEM
152S0316
R9682
=PP3V3_GPU
QTY
NET_SPACING_TYPE
OF
96
154
KODIAK PCI-E PHYSICAL CONSTRAINT TABLE

SIG_NAME
9
82
9
82
82 26
82 26
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
9
82
84
82
9
84 82 9
84
9
82
9
82
84
84
82
9
84
9
82
84
82
9
84
9
82
84
82
9
84
9
82
84
82
9
84
9
82
84
82
9
84
9
82
84
82
9
84
9
82
84
82
9
84
9
82
84
82
9
84 82 9
84
9
82
9
82
84
84
9
82
84
82
9
84
9
82
84
82
9
84
9
82
84
82
9
9
82
84
84
9
82
84
82
9
84
9
82
100M_N<0>
100M_P<0>
CLK_KOD_100M_N<0>
CLK_KOD_100M_P<0>
CLK_KOD_100M_NF<0>
CLK_KOD_100M_PF<0>
PCIE_NB2SA0
PCIE_NB2SA0
PCIE_NB2SA1
PCIE_NB2SA1
PCIE_NB2SA2
PCIE_NB2SA2
PCIE_NB2SA3
PCIE_NB2SA3
PCIE_NB2SA4
PCIE_NB2SA4
PCIE_NB2SA5
PCIE_NB2SA5
PCIE_NB2SA6
PCIE_NB2SA6
PCIE_NB2SA7
PCIE_NB2SA7
PCIE_NB2SA8
PCIE_NB2SA8
PCIE_NB2SA9
PCIE_NB2SA9
PCIE_NB2SA10
PCIE_NB2SA10
PCIE_NB2SA11
PCIE_NB2SA11
PCIE_NB2SA12
PCIE_NB2SA12
PCIE_NB2SA13
PCIE_NB2SA13
PCIE_NB2SA14
PCIE_NB2SA14
PCIE_NB2SA15
PCIE_NB2SA15
DIFFERENTIAL_PAIR
NET_PHYSICAL_TYPE
CLK_100M
CLK_100M
CLK_KODPCIE_100M
CLK_KODPCIE_100M
CLK_KODPCIE_100MF
CLK_KODPCIE_100MF
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_NB_TO_SLOTA_0_F
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_NB_TO_SLOTA_0
PCIE_NB_TO_SLOTA_0
PCIE_NB_TO_SLOTA_1
PCIE_NB_TO_SLOTA_1
PCIE_NB_TO_SLOTA_2
PCIE_NB_TO_SLOTA_2
PCIE_NB_TO_SLOTA_3
PCIE_NB_TO_SLOTA_3
PCIE_NB_TO_SLOTA_4
PCIE_NB_TO_SLOTA_4
PCIE_NB_TO_SLOTA_5
PCIE_NB_TO_SLOTA_5
PCIE_NB_TO_SLOTA_6
PCIE_NB_TO_SLOTA_6
PCIE_NB_TO_SLOTA_7
PCIE_NB_TO_SLOTA_7
PCIE_NB_TO_SLOTA_8
PCIE_NB_TO_SLOTA_8
PCIE_NB_TO_SLOTA_9
PCIE_NB_TO_SLOTA_9
PCIE_NB_TO_SLOTA_10
PCIE_NB_TO_SLOTA_10
PCIE_NB_TO_SLOTA_11
PCIE_NB_TO_SLOTA_11
PCIE_NB_TO_SLOTA_12
PCIE_NB_TO_SLOTA_12
PCIE_NB_TO_SLOTA_13
PCIE_NB_TO_SLOTA_13
PCIE_NB_TO_SLOTA_14
PCIE_NB_TO_SLOTA_14
PCIE_NB_TO_SLOTA_15
PCIE_NB_TO_SLOTA_15
SIG_NAME
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
KODPCIE_CLK
KODPCIE_CLK
KODPCIE_CLKF
KODPCIE_CLKF
CLK_SLOTA_CKA
CLK_SLOTA_CKA
CLK_PCIE_SLOTA_N<0>
CLK_PCIE_SLOTA_P<0>
84 CLK_PCIE_SLOTA_NF<0>
84 CLK_PCIE_SLOTA_PF<0>
9 CKA_P<0>
84
9 CKA_N<0>
84 26
84 26
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_CLK
PCIE_SLOTA_TO_NB_0_F
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_SLOTA_TO_NB_0
PCIE_SLOTA_TO_NB_0
PCIE_SLOTA_TO_NB_1
PCIE_SLOTA_TO_NB_1
PCIE_SLOTA_TO_NB_2
PCIE_SLOTA_TO_NB_2
PCIE_SLOTA_TO_NB_3
PCIE_SLOTA_TO_NB_3
PCIE_SLOTA_TO_NB_4
PCIE_SLOTA_TO_NB_4
PCIE_SLOTA_TO_NB_5
PCIE_SLOTA_TO_NB_5
PCIE_SLOTA_TO_NB_6
PCIE_SLOTA_TO_NB_6
PCIE_SLOTA_TO_NB_7
PCIE_SLOTA_TO_NB_7
PCIE_SLOTA_TO_NB_8
PCIE_SLOTA_TO_NB_8
PCIE_SLOTA_TO_NB_9
PCIE_SLOTA_TO_NB_9
PCIE_SLOTA_TO_NB_10
PCIE_SLOTA_TO_NB_10
PCIE_SLOTA_TO_NB_11
PCIE_SLOTA_TO_NB_11
PCIE_SLOTA_TO_NB_12
PCIE_SLOTA_TO_NB_12
PCIE_SLOTA_TO_NB_13
PCIE_SLOTA_TO_NB_13
PCIE_SLOTA_TO_NB_14
PCIE_SLOTA_TO_NB_14
PCIE_SLOTA_TO_NB_15
PCIE_SLOTA_TO_NB_15
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
PCIE_DATA
84
9 PCIE_SLOTA_TO_NB_NF<1>
84
9 PCIE_SLOTA_TO_NB_PF<1>
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
9
84
9
84
84
PCIE_SA2NB0
PCIE_SA2NB0
PCIE_SA2NB1
PCIE_SA2NB1
PCIE_SA2NB2
PCIE_SA2NB2
PCIE_SA2NB3
PCIE_SA2NB3
PCIE_SA2NB4
PCIE_SA2NB4
PCIE_SA2NB5
PCIE_SA2NB5
PCIE_SA2NB6
PCIE_SA2NB6
PCIE_SA2NB7
PCIE_SA2NB7
PCIE_SA2NB8
PCIE_SA2NB8
PCIE_SA2NB9
PCIE_SA2NB9
PCIE_SA2NB10
PCIE_SA2NB10
PCIE_SA2NB11
PCIE_SA2NB11
PCIE_SA2NB12
PCIE_SA2NB12
PCIE_SA2NB13
PCIE_SA2NB13
PCIE_SA2NB14
PCIE_SA2NB14
PCIE_SA2NB15
PCIE_SA2NB15
84
9
82
84
82
9
9 PCIE_SLOTA_TO_NB_P<1>
82
84 PCIE_SLOTA_TO_NB_N<2>
9
84
82
82
9
84
82
82
9
84
82
82
9
84
82
84
82
82
9
84
82
84
82
82
9
84
82
82
9
84
82
84
82
84
9
82
84 82
84 82
84 82
84 82
84
82
9
84
82
9
84 82
84
82
9
84 82
84 82
84
82
9
I312
I313
I311
I316
I317
I314
I315
I318
I319
I320
I321
I322
I323
I328
I327
I326
I325
I324
I332
I333
I329
I330
I331
I337
I338
I334
I335
I336
I342
I341
I340
I339
82
84
KODIAK PCI-E POWER PHYSICAL CONSTRAINT TABLE
82 6
82 6
82 6
82 6
82 6
82 6
MIN_LINE_WIDTH
MIN_NECK_WIDTH
0.3MM
0.3MM
0.3MM
0.3MM
0.3MM
0.3MM
KOD_G10_GND
KOD_H05_GND
KOD_H08_GND
KOD_J13_GND
KOD_K07_GND
KOD_L13_GND
0.25MM
0.25MM
0.25MM
0.25MM
0.25MM
0.25MM
VOLTAGE
0
0
0
0
0
0
KODIAK PCI-E CONST


82
97 82
82
97 82
82
82
82
97 82
97 82
0.3MM
0.3MM
0.3MM
0.3MM
0.3MM
0.3MM
0.3MM
0.3MM
0.3MM
PWR_PCIE_A_AVDD
PWR_PCIE_A_AVDD_2
PWR_PCIE_A_AVDD_1
PWR_PCIE_A_AVDD_0
PWR_PCIE_A_AVDD_A
PWR_PCIE_A_AVDD_B
PWR_PCIE_A_AVDD_C
PWR_PCIE_A_AVDD_2
PWR_PCIE_A_AVDD_0
0.25MM
0.25MM
0.25MM
0.25MM
0.25MM
0.25MM
0.25MM
0.25MM
0.25MM
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
REV.
051-6863
SCALE
SHT
NONE

F
OF
97
154
SIG_NAME
PLANE-SPLIT AC RETURN PATHS
98 7
=PPVCORE_PWRON_NB_HT
C9834
=PP1V2_PWRON_HT_NBTX
C9808
1UF
1UF
1UF
1UF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
C9811
C9812
SM
1.6V
Q63 = PP1V6
1UF
1UF
1UF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
C9800
16V
PP
1UF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
PP9807
P4MM
C9822
PP
1.2V
Q63 = PP1V2
C9802
CERM
402
10UF
10%
6.3V
CERM
402
7 98
X5R
805
101 98 6
PP
PP
98 7
10%
6.3V
CERM
402
C9827
C9825
1UF
10%
6.3V
CERM
402
C9826
C9828
C9829
C9830
1UF
1UF
1UF
1UF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
C9832
C9833
C9831
1UF
2
10%
6.3V
CERM
402
C9841
1UF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
=PP2V5_PWRON_NB_HT
101
PWR_HT_AVDD2
C9839
C9840
1UF
1UF
1UF
1UF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
C9842
C9843
7 98
1UF
2
10%
6.3V
CERM
402
C9846
0805-1
10%
6.3V
C9803
C9804
1UF
10UF
10%
10%
6.3V
CERM
402
C9805
0.01UF
10%
6.3V
X5R
805
C9847
16V
CERM
402
KOD_L15_GND
KOD_L15_GND
K15
1
1
C9844
C9845
1UF
1UF
1UF
1UF
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
10%
6.3V
CERM
402
1UF
2
10%
6.3V
CERM
402
6 98 101
(THIS PAGE)
H15
HT_REFCLK_AVDD
(1.65V-2.75V)
SM
1UF
10%
6.3V
CERM
402
HT_REFCLK_AVDD2
(1.65V-2.75V)
P4MM
PP9809
HT_MB_TO_NB_CLK_N<0>
HT_MB_TO_NB_CLK_P<0>
E25
D25
J27
HT_MB_TO_NB_CTL_N<0>
HT_MB_TO_NB_CTL_P<0>
K27
SM
PP
PP
101
101
101
SM
101
P4MM
101
PP9801
101
101
KODIAK HT RECEIVE CLOCKS
101
101
PP9802
101
P4MM
SM
MHT1MHT1+
PP
PP
101
R9806 1
SM
8.2K
P4MM
5%
1/16W
MF-LF
402
PP9803
F26
HT_MB_TO_NB_CAD_N<0>
HT_MB_TO_NB_CAD_P<0>
101
P4MM
MHT0MHT0+
101
C9821
1UF
(THIS PAGE)
PP9800
101
L9801
98 7
101
C9824
1UF
10%
6.3V
CERM
402
1UF
10%
6.3V
SM
1UF
P4MM
101
C9823
1UF
SM
PP9808
101
PWR_HT_AVDD
101
C9801
HTM2NC0HTM2NC0+
101
C9815
1UF
0.22UH
10%
10%
6.3V
CERM
402
0805-1
CERM
402
C9814
1UF
10%
6.3V
CERM
402
0.22UH
1
0.01UF
98 7
L9800
=PP2V5_PWRON_NB_HT
C9813
1UF
C9820
1UF
10%
6.3V
CERM
402
P4MM
98 7
C9810
C9819
1UF
10%
6.3V
CERM
402
PP9806
C9818
1UF
KODIAK CORES
CERM
402
C9809
C9817
7 98
0.1UF
7 98
10V
C9807
KODIAK HT DECOUPLING
(LOCATE CLOSE TO PINS AS INDICATED)
(CAPACITORS ARE DOUBLED-UP WHERE POSSIBL;E)
20%
1
98 7
(LOCATE CLOSE TO PINS AS INDICATED)
C9806
LOCATE EACH CAPACITOR SO THAT

THEY STRADDLE EACH PLANE SPLIT
KODIAK HT DECOUPLING
101
101
101
101
F27
F25
F24
A25
B25
G25
H25
L25
K25
G27
H27
J25
J26
C26
C27
HT_CLK_RXN0
HT_CLK_RXP0
HT_CTL_RXN0
HT_CTL_RXP0
HT_CAD_RXN0
HT_CAD_RXP0
HT_CAD_RXN1
HT_CAD_RXP1
HT_CAD_RXN2
HT_CAD_RXP2
HT_CAD_RXN3
HT_CAD_RXP3
HT_CAD_RXN4
HT_CAD_RXP4
HT_CAD_RXN5
HT_CAD_RXP5
HT_CAD_RXN6
HT_CAD_RXP6
HT_CAD_RXN7
HT_CAD_RXP7
(1.6V-1.2V)
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
HT_RX_VDD
A24
A16
B22
A20
B26
B14
D24
B18
E22
D16
E26
D20
G24
E18
H26
G16
K24
G20
L22
H18
H22
K16
K20
L18
M17
M21
N19
(1.6V-1.2V)
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_VD4
HT_CLK_TXN0
HT_CLK_TXP0
J19
HT_CTL_TXN0
HT_CTL_TXP0
J22
HT_CAD_TXN0
HT_CAD_TXP0
HT_CAD_TXN1
HT_CAD_TXP1
HT_CAD_TXN2
HT_CAD_TXP2
HT_CAD_TXN3
HT_CAD_TXP3
HT_CAD_TXN4
HT_CAD_TXP4
HT_CAD_TXN5
HT_CAD_TXP5
HT_CAD_TXN6
HT_CAD_TXP6
HT_CAD_TXN7
HT_CAD_TXP7
F16
HT_CLK_TXN1
HT_CLK_TXP1
C16
HT_CTL_TXP1
HT_CTL_TXN1
E15
D15
HT_CAD_TXN8
HT_CAD_TXP8
HT_CAD_TXN9
HT_CAD_TXP9
HT_CAD_TXN10
HT_CAD_TXP10
HT_CAD_TXN11
HT_CAD_TXP11
HT_CAD_TXN12
HT_CAD_TXP12
HT_CAD_TXN13
HT_CAD_TXP13
HT_CAD_TXN14
HT_CAD_TXP14
HT_CAD_TXN15
HT_CAD_TXP15
D19
HT_LDTSTOP_L
HT_LDTREQ_L
HT_PWROK
HT_RESET_L
AF06
HT_NB_TO_MB_CLK_N<0>
HT_NB_TO_MB_CLK_P<0>
J20
HT_NB_TO_MB_CTL_N<0>
HT_NB_TO_MB_CTL_P<0>
J21
HT_NB_TO_MB_CAD_N<0>
HT_NB_TO_MB_CAD_P<0>
F17
G17
H17
J18
J17
F18
F19
G19
H19
G21
H21
F21
F20
K21
L21
101
101
101
101
101
101
101
101
101
101
101
101
101
101
101
101
101
101
101
F22
F23
9
9
E21
D21
HT_CLK_RXN1
HT_CLK_RXP1
U1900
KODIAK-ASIC-040812
HT_CTL_RXP1
HT_CTL_RXN1
HT X16 INTERFACE
C17
R9808
8.2K
7 98
NOSTUFF
101
5%
1/16W
MF-LF
2 402
101
101
BGA
R9807 1
8.2K
5%
1/16W
MF-LF
402 2
101
101
101
101
101
101
101
101
101
101
KODIAK HT REFCLK
TERMINATION
101
101
(LOCATE CLOSE TO INPUT PINS)

101
R9800
HT_NB_REFCLK_P<0>
101
100
1
1%
1/16W
MF-LF
402
R9802
20.5
1%
1/16W
MF-LF
402
101
C9837
0.01UF
101
9
HT_NB_P<0>
R9801
E23
HT_KOD_PVTREF0
HT_KOD_PVTREF1
HT_KOD_PVTREF2_ALT
HT_KOD_PVTREF3_ALT
K19
D23
A23
B23
H23
G23
C22
C23
K23
L23
J23
J24
A21
B21
C24
C25
L19
L17
K17
J16
200
1%
1/16W
MF-LF
402 2
10%
1
C9836
2
0.01UF
1
16V
R9803
CERM
402
29.4
NOSTUFF
J15
CERM
402
R9804
SM
0.01UF
R9805
1%
1/16W
MF-LF
402
HREF0HREF0+
C9838
101
9
HT_NB_N<0>
101 26
PP9804
P4MM
1%
1/16W
MF-LF
2 402
20.5
B20
D18
E16
E20
HT_RX_GND
HT_RX_GND
HT_RX_GND
HT_RX_GND
HT_RX_GND
HT_RX_GND
HT_RX_GND
HT_RX_GND
HT_RX_GND
HT_RX_GND
A22
G18
A26
G22
B24
H16
D22
H20
D26
K18
E24
L16
G26
L20
H24
M16
K22
M20
L24
N18
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
HT_VD4_GND
E17
C19
C18
A15
B15
A17
B17
B19
A19
C15
C14
C20
C21
NOSTUFF
101
101
R9809
8.2K
101
101
101
5%
1/16W
MF-LF
402
101
101
101
101
=PP2V5_PWRON_HT
101
101
101
101
101
101
R9810
1K
R9811
1K
5%
1/16W
MF-LF
2 402
R9812
R9813
1K
1K
5%
1/16W
MF-LF
402
2
5%
1/16W
MF-LF
1 402
5%
1/16W
MF-LF
2 402
HT_LDTSTOP_L
HT_LDTREQ_L
HT_PWROK
HT_LDTRESET_L
AF09
AF03
AE11
103
103
103
103
PP
PP
SYNC_MASTER=Q63
(THIS PAGE)
XW9800
1
P4MM
PP9805
10%
PAGE 98
16V
CERM
402

KODIAK HT REFCLK
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
REV.
051-6863
SCALE
SHT
NONE
1 13:47:20 2005

SM
SM
KODIAK HT16
KOD_L15_GND
HT_NB_REFCLK_N<0>
7 103
101
L15
101 98 6
29.4
B16
HT_REFCLK_N
HT_REFCLK_P
HT_NB_REFCLK_PF<0>
HT_NB_REFCLK_NF<0>
10%
A18
D17
HT_REFCLK_AGND
101 9
A14
E19
(200MHZ)
HT_NB_G
16V
SEE_TABLE
HT_PVTREF0
HT_PVTREF1
HT_PVTREF2_ALT
HT_PVTREF3_ALT
1%
1/16W
MF-LF
402
101 9
101
(6 OF 10)
HT_CAD_RXN8
HT_CAD_RXP8
HT_CAD_RXN9
HT_CAD_RXP9
HT_CAD_RXN10
HT_CAD_RXP10
HT_CAD_RXN11
HT_CAD_RXP11
HT_CAD_RXN12
HT_CAD_RXP12
HT_CAD_RXN13
HT_CAD_RXP13
HT_CAD_RXN14
HT_CAD_RXP14
HT_CAD_RXN15
HT_CAD_RXP15
F
OF
98
101 26
101
154
DRAWING
SIG_NAME
MAKE_BASE
DIFFERENTIAL_PAIR
EC_SET
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
9
9
HT_NB_TO_SB_CLK_N<0>
HT_NB_TO_SB_CLK_P<0>
TRUE
TRUE
HT_NB_TO_SB_CLK
HT_NB_TO_SB_CLK
HT_NB_TO_SB_PP
HT_NB_TO_SB_PP
HT_CAD
HT_CAD
HT_NB_TO_SB_CLK
HT_NB_TO_SB_CLK
HT_MB_TO_SB_CLK_N<0>
HT_MB_TO_SB_CLK_P<0>
9
9
98
98
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_P<0>
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
HT_NB_TO_SB_CAD0
HT_NB_TO_SB_CAD0
HT_NB_TO_SB_CAD1
HT_NB_TO_SB_CAD1
HT_NB_TO_SB_CAD2
HT_NB_TO_SB_CAD2
HT_NB_TO_SB_CAD3
HT_NB_TO_SB_CAD3
HT_NB_TO_SB_CAD4
HT_NB_TO_SB_CAD4
HT_NB_TO_SB_CAD5
HT_NB_TO_SB_CAD5
HT_NB_TO_SB_CAD6
HT_NB_TO_SB_CAD6
HT_NB_TO_SB_CAD7
HT_NB_TO_SB_CAD7
HT_NB_TO_SB_PP
HT_NB_TO_SB_PP
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_NB_TO_SB
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_MB_TO_SB_CAD_N<0>
HT_MB_TO_SB_CAD_P<0>
98
98
HT_NB_TO_SB_CTL_N<0>
HT_NB_TO_SB_CTL_P<0>
TRUE
TRUE
HT_NB_TO_SB_CTL0
HT_NB_TO_SB_CTL0
HT_NB_TO_SB
HT_NB_TO_SB
HT_CAD
HT_CAD
HT_NB_TO_SB_CAD
HT_NB_TO_SB_CAD
HT_MB_TO_SB_CTL_N<0>
HT_MB_TO_SB_CTL_P<0>
103
103
98
98
9
9
HT_SB_TO_NB_CLK_N<0>
HT_SB_TO_NB_CLK_P<0>
TRUE
TRUE
HT_SB_TO_NB_CLK
HT_SB_TO_NB_CLK
HT_SB_TO_NB_PP
HT_SB_TO_NB_PP
HT_CAD
HT_CAD
HT_SB_TO_NB_CLK
HT_SB_TO_NB_CLK
HT_SB_TO_MB_CLK_N<0>
HT_SB_TO_MB_CLK_P<0>
103
103
9
9
98
98
9
9
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CAD_P<0>
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
HT_SB_TO_NB_CAD0
HT_SB_TO_NB_CAD0
HT_SB_TO_NB_CAD1
HT_SB_TO_NB_CAD1
HT_SB_TO_NB_CAD2
HT_SB_TO_NB_CAD2
HT_SB_TO_NB_CAD3
HT_SB_TO_NB_CAD3
HT_SB_TO_NB_CAD4
HT_SB_TO_NB_CAD4
HT_SB_TO_NB_CAD5
HT_SB_TO_NB_CAD5
HT_SB_TO_NB_CAD6
HT_SB_TO_NB_CAD6
HT_SB_TO_NB_CAD7
HT_SB_TO_NB_CAD7
HT_SB_TO_NB_PP
HT_SB_TO_NB_PP
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_SB_TO_NB
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_MB_CAD_N<0>
HT_SB_TO_MB_CAD_P<0>
98
98
HT_SB_TO_NB_CTL_N<0>
HT_SB_TO_NB_CTL_P<0>
TRUE
TRUE
HT_SB_TO_NB_CTL0
HT_SB_TO_NB_CTL0
HT_SB_TO_NB
HT_SB_TO_NB
HT_CAD
HT_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_NB_CAD
HT_SB_TO_MB_CTL_N<0>
HT_SB_TO_MB_CTL_P<0>
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
6
6
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
NC_HT_MB_TO_NB_CAD_P<8..15>
NC_HT_MB_TO_NB_CAD_N<8..15>
TP_HT_MB_TO_NB_CLK_N<1>
TP_HT_MB_TO_NB_CLK_P<1>
TRUE
TRUE
TRUE
TRUE
NC_HT_NB_TO_MB_CAD_P<8..15>
NC_HT_NB_TO_MB_CAD_N<8..15>
NC_HT_NB_TO_MB_CLK_N<1>
NC_HT_NB_TO_MB_CLK_P<1>
TRUE
TRUE
TRUE
TRUE
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
103
HT_MB_TO_NB_CAD_P<8..15>
HT_MB_TO_NB_CAD_N<8..15>
HT_MB_TO_NB_CLK_N<1> 98
HT_MB_TO_NB_CLK_P<1> 98
98
HT_NB_TO_MB_CAD_P<8..15>
HT_NB_TO_MB_CAD_N<8..15>
HT_NB_TO_MB_CLK_N<1> 98
HT_NB_TO_MB_CLK_P<1> 98
98
98
I97
6
6
6
6
98
B
98 26
98 26
98 9
98 9
98 9
98 9
HT_NB_REFCLK_P<0>
HT_NB_REFCLK_N<0>
HT_NB_P<0>
HT_NB_N<0>
HT_NB_REFCLK_PF<0>
HT_NB_REFCLK_NF<0>
HT_NB_REFCLK0
HT_NB_REFCLK0
HT_NB0
HT_NB0
HT_NB_REFCLK_F0
HT_NB_REFCLK_F0
HT_NB_REFCLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
HT_CLK
IN
IN
IN
IN
IN
IN
HT ALIASES
FINO-M23
SIG_NAME
MIN_LINE_WIDTH
MIN_NECK_WIDTH
VOLTAGE
PWR_HT_AVDD
0.4MM
0.2MM
2.5
PWR_HT_AVDD2
0.4MM
0.2MM
2.5
KOD_L15_GND
0.4MM
0.2MM
98

IN
98
IN
98 6

IN
HT_NB_G
KEEP DIFF CLOCK FROM BEING A SINGLE XNET
08/26/2005
98
SIZE
IN
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
101
F
154
8
HT_CLK66M_SB
I187
I192
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
0.38mm SPACING
0.38mm SPACING
P3MM SPACING
HT_CLK66M_SB_C
HT_CLK66M_SB
HT_LDTRESET_L
103
26 103
98 103
PP1V2_PWRON_HT_PLLDVDD
RA300
=PP1V2_PWRON_SB_HT
103 7
3.3
VOLTAGE=1.2V
5%
1/8W
MF-LF
805
CA300
1uF
10%
10%
6.3V
=PP2V5_PWRON_HT
7 98
6.3V
X5R
805
CA301
10UF
CERM
402
1
CA320
0.1uF
20%
Page Notes
10V
CERM
402
PP1V2_PWRON_HT_PLLAVDD
RA310
=PP2V5_PWRON_HT
3.3
VOLTAGE=1.2V
=PP1V2_PWRON_SB_HT
5%
1/8W
MF-LF
805
=PP1V2_PWRON_HT
CA310
10UF
1uF
10%
(NONE)
10%
6.3V
X5R
805
7 103
CA311
1
6.3V
CERM
402
2
- SB_HT_200M
CA302
CA330
CA331
10UF
0.1uF
0.1uF
10%
20%
20%
6.3V
10V
10V
X5R
805
CERM
402
CA332
0.1uF
20%
CERM
402
10V
CERM
402
Stuffs resistor to select 200MHz HT I/F.
HTS2MC0-
101
101
101
P4MM
PP
G11
D10
HT_CADOUT_0_N
HT_CADOUT_1_P
C10
HT_CADOUT_1_N
A8
HT_CADOUT_2_P
HT_CADOUT_2_N
E11
HT_CADOUT_3_P
D11
HT_CADOUT_3_N
HT_CADOUT_4_P
C11
HT_CADOUT_4_N
HT_CADOUT_5_P
B11
HT_CADOUT_5_N
D12
HT_CADIN_6_P
HT_CADIN_6_N
HT_CADOUT_6_P
HT_CADOUT_6_N
E12
HT_CADIN_7_P
HT_CADOUT_7_P
A13
HT_CADOUT_7_N
B13
HT_CTLOUT_P
HT_CTLOUT_N
C13
D17
HT_CADIN_0_P
C17
HT_CADIN_0_N
HT_CADIN_1_P
A14
HT_CADIN_7_N
HT_MB_TO_SB_CTL_P<0>
HT_MB_TO_SB_CTL_N<0>
F13
HT_CTLIN_P
HT_CTLIN_N
103
5%
1/16W
MF-LF
402
HT_CADOUT_0_P
101
101
101
101
101
101
101
101
101
101
101
101
101
101
B18
A18
F15
E15
HT_CADIN_3_P
C16
HT_CADIN_3_N
HT_CADIN_4_P
B16
A16
D14
C14
E14
F14
B14
E13
C18
E17
HT_CLK66M_SB_C
SB_HT_S100M66M
SB_SELHT100
HT_CADIN_2_P
HT_CADIN_2_N
D16
E16
HT_PWROK
HT_LDTRESET_L
HT_LDTSTOP_L
HT_CADIN_1_N
HT_CADIN_4_N
HT_CADIN_5_P
HT_CADIN_5_N
6.3V
X5R
805
CA340
0.1uF
20%
20%
10V
10V
CERM
402
HT_SB_TO_MB_CLK_P<0>
HT_SB_TO_MB_CLK_N<0>
A10
B8
F11
A11
C12
F12
D13
HT_LDTREQ_L
A19
C8
HT_REFCLK
HT_R100P
E10
101
101
101
101
101
101
101
101
101
101
101
101
101
101
101
D8
HT_S100M66M
HT_R100N
F10
V6
SEL_HT00_H
HT_LDTREQ_L
98
G10
A9
HT_TXGND
A12
C6
82.5
HT_RXGND
CA350
2
1%
1/16W
MF-LF
402
CA351
47pF
5%
50V
CERM
402
NOSTUFF
10K
5%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402
RA354 1
1%
1/16W
MF-LF
402
4.7K
RA350
4.7K
RA353 1
101
SB_HT_R100_P
SB_HT_R100_N
=PP1V2_PWRON_SB_HT
0 = 66MHz
CERM
402
101
HT_LDTREQ_SB_L
CERM
402
10V
101
HT_SB_TO_MB_CTL_P<0>
HT_SB_TO_MB_CTL_N<0>
50V
1 = 100MHz
20%
101
5%
RA352 1
CA342
0.1uF
CERM
402
101
47pF
NOSTUFF
RA301
HT_RESET_L
HT_LDTSTOP_L
HT_PLL
AGND DGND
1.0V pk-pk
103 7
CA341
0.1uF
HT_PWROK_H
G12
HT_CLK66M_SB
B10
A17
103 26
(3 OF 8) HT_CLKOUT_P
HT_CLKOUT_N
HT_CLKIN_N
98
10%
V1.1
BGA-LF
HT_CLKIN_P
103 98
RA355
10UF
SEE_TABLE
U2300
SM
C15
101
SM
D15
101
P4MM
CA309
SHASTA
98
P4MM
A15
PP
PPA304
A6
PPA302
PP
HT_MB_TO_SB_CLK_P<0>
HT_MB_TO_SB_CLK_N<0>
101
SM
PPA303
1
1
AVDD DVDD VDDP HT_RXVDD HT_TXVDD

HT_PLL
HT
HYPERTRANSPORT
HTS2MC0+
B9
SM
B12
P4MM
G13
SM
B17
PP
P4MM
B15
PPA301
=PP1V2_PWRON_SB_HT 7 103
B19
PP
C7
HTS2MC0-
PPA300
B6
HTS2MC0+
1 = 100MHz
RA351 1
1K
1%
1/16W
MF-LF
402 2
0 = 200MHz
Shasta HyperTransport
SYNC_MASTER=Q63

HT RefClk
HT I/F Speed
1 = 100MHz
1 = 100MHz
0 = 66MHz
0 = 200MHz

DETERMINES THE OPERATING FREQUENCY OF HT CORE

1: THE HT SLAVE, HTGS AND THE HT SIDE OF THE PCI BRIDGES OPERATE AT 100 MHZ
0: THE HT SLAVE, HTGS AND THE HT SIDE OF THE PCI BRIDGES OPERATE AT 200 MHZ

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:45:49 2005
REV.
103
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
PCI_AD<31..28>
PCI_AD<27>
PCI_AD<26..24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<21>
PCI_AD<20>
PCI_AD<19..18>
PCI_AD<17>
PCI_AD<16..0>
120 121 122 125

120 121 122 125
120 121 122 125
120 121 122
120 121 122
120 121 122
120 121 122 125
120 121 122 125
120 121 122 125
120 121 122 125
PCI_CBE_L<3..0>
PCI_PAR
PCI_DEVSEL_L
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_CLK66M_SB_INT
P3MM SPACING
I181
120 121 122

120 121 122
119 120 121 122
119 120 121 122
119 120 121 122
119 120 121 122
119 120 121 122
26 27 119
PP
XWB900
2
PP_3V3RUNSB_B9
SM
PPB905
PP3V3_RUN_SB
Page Notes
SM
119 7
SM
Q63 APPLICATION OF POWER NET "=PP3V3_SB_PCI" IS RUN

P4MM
- =PP3V3_PCI
- =PP3V3_SB_PCI (CAN BE _PP3V3_PCI)
- =PP3V3_PWRON_SB
CB900
CB901
CB902
CB903
CB904
10UF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10%
20%
20%
20%
20%
20%
6.3V
X5R
805
10V
CERM
402
10V
CERM
402
10V
CERM
402
10V
CERM
402
CB910
P4MM
1
XWB901
1
PP_2V5PWRONSB_B9
SM
PPB906
PP
10V
CERM
402
=PP2V5_PWRON_SB
7 23 24 138
- =PP2V5_PWRON_SB
NO STUFF

1
(NONE)

2
(NONE)
CB911
CB905
CB906
CB907
CB908
CB909
10UF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10%
20%
20%
20%
20%
20%
6.3V
10V
10V
10V
10V
10V
X5R
805
CERM
402
CERM
402
CERM
402
CERM
402
CB920
CB921
CB922
CB923
0.1uF
0.1uF
0.1uF
0.1uF
20%
20%
20%
20%
10V
10V
10V
10V
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
AD28 - SATA 150 (0x1166/0x0240, PCI0 or 2)
PPB900
AD29 - UATA 133 (0x106B/0x0050, PCI0 or 2)
P4MM
PP
SM
PPB901
PCIBR_CLK_H
U19
PCI1CLK_H
119 27 26
PP
27 26
CB912
STUFF NEAR SHASTA
+/-0.25PF
50V
C0G
402-1
121 119
7 119
121 119
RPB900
"Slot A" - AD17

PCI_SLOTA_REQ_L
PCI_SLOTA_GNT_L
AB18
AA18
PCI1REQ_0_L
PCI1GNT_0_L
4.7K
PCI_SLOTA_REQ_L
122 119
PCI_SLOTA_GNT_L
119
PCI_SLOTG_REQ_L
5%
1/16W
SM-LF
"Slot G" - AD27

PCI_SLOTG_REQ_L
PCI_SLOTG_GNT_L
AB20
AB19
PCI1REQ_1_L
PCI1GNT_1_L
119 121
5%
1/16W
SM-LF
4.7K
119
119 122
"Slot D" - AD20

PCI_SLOTD_REQ_L
PCI_SLOTD_GNT_L
V17
V18
PCI1REQ_2_L
PCI1GNT_2_L
RPB900
4.7K
3
PCI_SLOTG_GNT_L
119 122
5%
1/16W
SM-LF
RPB901
4.7K
3
122 119
4.7K
RPB900
4
119 121
RPB900
1
PCI_SLOTD_REQ_L
5%
1/16W
SM-LF
119
RPB901
4.7K
4
PCI_SLOTD_GNT_L
U20
N20
J18
B20
V19
(4 OF 8)
PCI
2PF
U21
BGA-LF
NOSTUFF
5%
1/16W
SM-LF
R20
V1.1
AB9
P4MM
AD31 - Ethernet (0x106B/0x0051, PCI0)
PCIVDDP
U2300
SHASTA
P3MM SPACING
PCI_CLK66M_SB_INT
SM
AD30 - FireWire (0x106B/0x0052, PCI0 or 2)
N21
VDDOPC
SEE_TABLE
AD23 - KeyLargo (0x106B/0x004F, PCI1)
PP3V3_RUN_SB
M16
J21
(0x106B/0x0055)
H16
(0x106B/0x0054)
AD11 - PCI2
E21
(0x106B/0x0053)
AD11 - PCI1
B22
AD11 - PCI0
AA22
PCI Devices implemented on this page:
PCI1AD_0_H
PCI1AD_1_H
L18
PCI1AD_2_H
L22
PCI1AD_3_H
PCI1AD_4_H
M22
PCI1AD_5_H
PCI1AD_6_H
L20
PCI1AD_7_H
N16
PCI1AD_8_H
PCI1AD_9_H
M20
PCI1AD_10_H
M17
PCI1AD_11_H
PCI1AD_12_H
N18
PCI1AD_13_H
N19
PCI1AD_14_H
PCI1AD_15_H
P21
PCI1AD_16_H
PCI1AD_17_H
P20
PCI1AD_18_H
P18
PCI1AD_19_H
PCI1AD_20_H
T20
PCI1AD_21_H
R17
PCI1AD_22_H
PCI1AD_23_H
W21
PCI1AD_24_H
R18
PCI1AD_25_H
PCI1AD_26_H
T19
PCI1AD_27_H
PCI1AD_28_H
Y21
PCI1AD_29_H
T16
PCI1AD_30_H
PCI1AD_31_H
AA21
119
5%
1/16W
SM-LF
125 121
125 121
125 121
AB8
ROM_CS_L
ROM_OE_L
ROM_WE_L
AA9
Y10
ROMCS_L
ROMOE_L
ROMRW_L
K19
M18
M21
P22
M19
R22
V21
R16
Y22
T18
W20
T17
PCI1C_BE_0_L
L19
PCI1C_BE_1_L
P16
PCI1C_BE_2_L
PCI1C_BE_3_L
V22
PCI1DEVSEL_L
T22
PCI1FRAME_L
PCI1IRDY_L
T21
PCI1TRDY_L
P19
PCI1STOP_L
PCI1PAR_H
V20
PCI_SB_AD<0>
PCI_SB_AD<1>
PCI_SB_AD<2>
PCI_SB_AD<3>
PCI_SB_AD<4>
PCI_SB_AD<5>
PCI_SB_AD<6>
PCI_SB_AD<7>
PCI_SB_AD<8>
PCI_SB_AD<9>
PCI_SB_AD<10>
PCI_SB_AD<11>
PCI_SB_AD<12>
PCI_SB_AD<13>
PCI_SB_AD<14>
PCI_SB_AD<15>
PCI_SB_AD<16>
PCI_SB_AD<17>
PCI_SB_AD<18>
PCI_SB_AD<19>
PCI_SB_AD<20>
PCI_SB_AD<21>
PCI_SB_AD<22>
PCI_SB_AD<23>
PCI_SB_AD<24>
PCI_SB_AD<25>
PCI_SB_AD<26>
PCI_SB_AD<27>
PCI_SB_AD<28>
PCI_SB_AD<29>
PCI_SB_AD<30>
PCI_SB_AD<31>
N17
U18
SB_PCI_RESET_L
P17
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
120
119 7
PP3V3_RUN_SB
120
RPB902
120
4.7K
120
122 121 120 119
PCI_DEVSEL_L
120
5%
1/16W
SM-LF
RPB902
120
4.7K
120
122 121 120 119
PCI_FRAME_L
120
5%
1/16W
SM-LF
120
120
122 121 120 119
RPB902
4.7K
2
PCI_IRDY_L
120
5%
1/16W
SM-LF
RPB902
120
4.7K
120
122 121 120 119
PCI_TRDY_L
120
5%
1/16W
SM-LF
120
=PP3V3_PWRON_SB
PCI_SB_CBE_L<0>
PCI_SB_CBE_L<1>
PCI_SB_CBE_L<2>
PCI_SB_CBE_L<3>
PCI_SB_DEVSEL_L
PCI_SB_FRAME_L
PCI_SB_IRDY_L
PCI_SB_TRDY_L
PCI_SB_STOP_L
PCI_SB_PAR
R21
120
7 20 23 24 56
122 121 120 119
120
RPB901
4.7K
PCI_STOP_L
5%
1/16W
SM-LF
120
120
120
120
NOSTUFF
120
120
120
120
120
RB955
CB950
0.1uF
4.7K
20%
1%
1/16W
MF-LF
2 402
10V
CERM
402
RB950
4.7K
Shasta PCI Interface
1%
1/16W
MF-LF
2 402
SYNC_MASTER=Q63
PCI1RST_L
NET_SPACING_TYPE=P3MM SPACING
2
UB950
PCI_RESET_L
20 92

MC74VHC1G08
3
SOT23-5-LF
122 30 28 24
SYS_IO_RESET_L

SIZE
Shasta drives PCI RESET, but its output

may not be valid during power-up, so
it is ANDed with a reset from the SMU.
RB900
0
1
NOSTUFF
APPLE COMPUTER INC.
5%
1/16W
MF-LF
402
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:45:54 2005
REV.
119
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
ALL RESISTOR PACKS ARE 47 OHM 1/16W 5%
R PAKS ARE PIN SWAPPABLE ACROSS ALL SIGNALS (EXCEPT IDSELS)
119
PCI_SB_AD<0>
PCI_SB_AD<1>
PCI_SB_AD<2>
PCI_SB_AD<3>
PCI_SB_AD<4>
PCI_SB_AD<5>
PCI_SB_AD<6>
PCI_SB_AD<7>
PCI_SB_AD<8>
PCI_SB_AD<9>
PCI_SB_AD<10>
PCI_SB_AD<11>
PCI_SB_AD<12>
PCI_SB_AD<13>
PCI_SB_AD<14>
PCI_SB_AD<15>
PCI_SB_AD<16>
119
PCI_SB_AD<17>
119
119
119
119
119
119
119
119
119
119
119
119
119
119
119
119
RPC003
RPC003
RPC009
RPC001
RPC000
RPC003
RPC001
RPC000
RPC007
RPC002
RPC000
RPC009
RPC000
RPC009
RPC002
RPC002
RPC002
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
119 121 122 125

119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
119 121 122 125
RC000
1
47
PCI_AD<17>
119 121 122 125
5%
1/16W
MF-LF
402
119
119
119
119
119
119
119
119
119
PCI_SB_AD<18>
PCI_SB_AD<19>
PCI_SB_AD<20>
PCI_SB_AD<21>
PCI_SB_AD<22>
PCI_SB_AD<23>
PCI_SB_AD<24>
PCI_SB_AD<25>
PCI_SB_AD<26>
RPC007
RPC006
RPC007
RPC008
RPC004
RPC006
RPC008
RPC006
RPC008
47
47
47
47
47
47
47
47
47
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
119 121 122 125

119 121 122 125
119 121 122 125
119 121 122
119 121 122
119 121 122
119 121 122 125
119 121 122 125
119 121 122 125
RC001
119
PCI_SB_AD<27>
47
PCI_AD<27>
119 121 122 125
5%
1/16W
MF-LF
402
119
119
119
119
119
119
119
119
119
119
119
119
119
119
PCI_SB_AD<28>
PCI_SB_AD<29>
PCI_SB_AD<30>
PCI_SB_AD<31>
RPC004
RPC008
RPC004
RPC007
PCI_SB_CBE_L<0>
PCI_SB_CBE_L<1>
PCI_SB_CBE_L<2>
PCI_SB_CBE_L<3>
RPC003
RPC001
RPC006
RPC004
PCI_SB_DEVSEL_L
PCI_SB_FRAME_L
PCI_SB_IRDY_L
PCI_SB_TRDY_L
PCI_SB_STOP_L
PCI_SB_PAR
RPC005
RPC005
RPC005
RPC005
RPC001
RPC009
47
47
47
47
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
47
47
47
47
PCI_CBE_L<0>
PCI_CBE_L<1>
PCI_CBE_L<2>
PCI_CBE_L<3>
47
47
47
47
47
47
PCI_DEVSEL_L
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_PAR
119 121 122 125

119 121 122 125
119 121 122 125
119 121 122 125
119 121 122

119 121 122
119 121 122
119 121 122
119 121 122

119 121 122
119 121 122

119 121 122
119 121 122
119 121 122
PLACE CLOSE TO SHASTA
AD<17> IS IDSEL FOR AIRPORT

AD<27> IS IDSEL FOR USB
PCI SERIES TERMINATION

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
120
F
154
8
PCI_CLK_AIRPORT
7
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
PCI_CLK33M_AIRPORT
CLOCKS
26 121
Page Notes
- _PP3V3_PCI
- _PCI_CLK33M_AIRPORT (33MHz PCI clock)

(NONE)
AD17 (Slot "A") - AirPort (0x????/0x????)
Q85 WIRELESS CONNECTOR
NOTE: This AirPort implementation does

not support PME#.
125 7
=PP3V3_PCI
SDFC100
NOSTUFF
STDOFF-3MMOD5MMH-1.35-TH
CC150 1 CC151
10UF
10%
2 6.3V
X5R
805
1UF
10%
2 6.3V
CERM
402
CC152
1UF
10%
2 6.3V
CERM
402
CRITICAL
JC150
20-5602-080-041-829
F-ST-SM
125 122 120 119
125 122 120 119

119
125 122 120 119
125 122 120 119
122 120 119

125 122 120 119
RC151
125 122 121 120 119
PCI_AD<17>
22
122 120 119
5%
1/16W
MF-LF
402
125 122 120 119

122 120 119
122 120 119
125 122 120 119
122 120 119
121 26
122 120 119
125 122 120 119
122 120 119
125 122 120 119

125 122 120 119
122 120 119
125 122 120 119

125 122 120 119
125 122 120 119
125 122 120 119

125 122 120 119
125 122 120 119
143
143
PCI_AD<30>
PCI_AD<27>
PCI_SLOTA_REQ_L
PCI_AD<25>
PCI_AD<29>
PCI_CBE_L<3>
PCI_AD<26>
PCI_AD<22>
PCI_SLOTA_IDSEL
PCI_AD<19>
PCI_AD<21>
PCI_IRDY_L
PCI_AD<18>
PCI_DEVSEL_L
PCI_CLK33M_AIRPORT
PCI_STOP_L
PCI_AD<12>
PCI_PAR
PCI_AD<8>
PCI_AD<9>
PCI_CBE_L<0>
PCI_AD<7>
PCI_AD<3>
PCI_AD<6>
PCI_AD<1>
PCI_AD<5>
PCI_AD<0>
USB_BT_P
USB_BT_N
=PP3V3_PWRON_BT
CC160 1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
PCI_AD<31>
AIRPORT_CLKRUN_L_PD
TP_AP_PME_L
PCI_SLOTA_GNT_L
119 120 122 125
PCI_AD<24>
119 120 122
=PCI_AIRPORT_RESET_L 20
PCI_AD<28>
119 120 122
PCI_AD<23>
PCI_AD<20>
PCI_FRAME_L
PCI_AD<17>
PCI_TRDY_L
PCI_CBE_L<2>
PCI_AD<16>
PCI_AD<14>
PCI_AD<13>
PCI_AD<10>
PCI_AD<15>
AP_ALT_ANT
PCI_CBE_L<1>
PCI_AD<4>
PCI_AD<11>
ROM_WE_L
PCI_AD<2>
PCI_AIRPORT_INT_L
ROM_OE_L
ROM_ONBOARD_CS_L
ROM_CS_L
RC150
119
125
10K
5%
1/16W
MF-LF
2 402
125
119 120 122
119 120 122 125

119 120 122
119 120 121 122 125
119 120 122
119 120 122

119 120 122 125
119 120 122 125

119 120 122 125
119 120 122 125

119 120 122 125
119 120 122
NC_AP_ALT_ANT
MAKE_BASE=TRUE
NO_TEST=YES
119 120 122 125
119 120 122 125

119 125
119 120 122 125
24
119 125
125
119 125
516S0347
1UF
10%
6.3V
CERM 2
402
SDFC101
STDOFF-3MMOD5MMH-1.35-TH
1
AIRPORT & BLUETOOTH

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
121
154
8
7
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
=PCI_CLK33M_USB2
CLOCKS
27 122
Q63 APPLICATION OF POWER NET "=PPVIO_PCI_USB2" IS PP3V3_RUN
Page Notes
- _PPVIO_PCI (to 3.3V or 5V)
=PPVIO_PCI_USB2
SM
122 7
XWC200
2
- _PCI_CLK33M_USB2 (33MHz PCI clock)
P4MM
1
PP_VIOPCIUSB2_C2
SM
PP
PPC203
0.1uF
10V
CERM
402
AD27 (Slot "G") - USB2 (0x1033/0x0035)
0.1uF
20%
CC202
10V
CERM
402
0.1uF
20%
2
CC203
20%
10V
CERM
402
D3cold.
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119

125 121 120 119
121 120 119
121 120 119
121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
125 121 120 119
PCI_AD<27>
125 121 120 119

125 121 120 119
125 121 120 119
121 120 119
RC214 1
121 120 119
22
121 120 119
5%
1/16W
MF-LF
402 2
121 120 119
121 120 119

121 120 119
=PPVIO_PCI_USB2
121 120 119

121 120 119
RC216 1
RPC203
RC213 1
10K
10K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
121 120 119
24
PCI_USB2_INT_L
5
5%
1/16W
SM-LF
47
47
3
121 120 119

119
119
47
47
M1
L2
L1
K2
L3
K1
K3
J2
J1
F2
E3
E1
D3
D1
D2
C2
C1
B4
A4
B5
C4
A5
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
C5
B6
A6
PCI_CBE_L<0>
PCI_CBE_L<1>
PCI_CBE_L<2>
PCI_CBE_L<3>
M2
J3
F1
C3
J4
PCI_PAR
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
F3
F4
G1
G3
B3
PCI_DEVSEL_L
PCI_SLOTG_REQ_L
PCI_SLOTG_GNT_L
G2
C6
D6
H2
H1
C7
B7
A7
A8
B8
N6
D9
C9
5%
1/16W
MF-LF
402
CRITICAL
UC200
NEC_UPD720101_USB2
FBGA-LF
CBE0
CBE1
CBE2
CBE3
PAR
FRAME
IRDY
TRDY
STOP
IDSEL
DEVSEL
REQ
GNT
PERR
SERR OD
INTA OD
INTB OD
INTC OD
PCLK
B
IPD
NTEST1
M8
IPD
SMC
M7
TP_NEC_SMC
TEB
AMC
N7
TP_NEC_TEB
TP_NEC_AMC
TEST
L8
IPD
TP_NEC_SMI_L
L6
VBBRST (CHIP RESET)

CRUN
PME OD
VCCRST (PCI RESET)
SMI OD
IPD
NANDTEST
SRCLK
SRDTA
SRMOD
IPD
5%
1/16W
MF-LF
402
20
N3
NEC_VBBRST_L
NEC_CRUN_L_PD
NEC_PME_L
RC250
SYS_IO_RESET_L
SYS_PME_L
M3
IPD
RC251
28 24
N4
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
6
5%
1/16W
SM-LF
119 30 28 24
7
5%
1/16W
SM-LF
RPC203
P4
NEC_PERR_L_PU
NEC_SERR_L_PU
NEC_INTA_L
NEC_INTB_L
NEC_INTC_L
122 27 =PCI_CLK33M_USB2
RPC203
2
N5
PCI_SLOTG_IDSEL
47
4
P5
(PCI_AD<27>)
125 121 120 119
122 7
M5
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
VDD_PCI
H3
NOTE: This USB2 implementation supports
C8
M4
CC201
(NONE)
L7
NEC_LEGC_PD
=PCI_USB2_RESET_L
LEGC
P7
M10
M9
N9
P9
TP_NEC_NTEST1
TP_NEC_TEST
TP_NEC_NANDTEST
TP_NEC_SRCLK
TP_NEC_SRDATA
TP_NEC_SRMOD
ALL NETS TO FUNCTIONAL TEST PAGE

6
RC215 1
RPC203
4.7K
1%
1/16W
MF-LF
402
RC250, RC251 & RPC203 REQUIRED TO

facilitate NAND-tree testing
47
5%
1/16W
SM-LF
2
P4MM
SM
PPC200
PP
USB 2.0 PCI Interface
P4MM
SYNC_MASTER=Q63
SM
PPC201
PP

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:45:57 2005
REV.
122
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
Page Notes
- =PP3V3_PCI
(NONE)
(NONE)
NOTE: This page does not specify a BootROM
part number. Must use a TABLE_x_ITEM
symbol to declare U7500 part number.
125 121 7
=PP3V3_PCI
CC500
CC501
CC502
2.2UF
0.1uF
0.1uF
20%
20%
20%
6.3V
10V
10V
CERM1
603
CERM
402
CERM
402
11
VPP
122 121 120 119

122 121 120 119
122 121 120 119
122 121 120 119
122 121 120 119
122 121 120 119
122 121 120 119
122 121 120 119
121
ROM_ONBOARD_CS_L
122 121 120 119

122 121 120 119
122 121 120 119
122 121 120 119

122 121 120 119
122 121 120 119
125 121 7
=PP3V3_PCI
122 121 120 119

122 121 120 119
122 121 120 119
RC500 1
1
402
MF-LF
1/16W
5%
10K
to intercept ROM chip select
Allows ROM override module
121 119
121 119
121 119
ROM_CS_L
ROM_OE_L
ROM_WE_L
5%
1/16W
MF-LF
402 2
RC502
RC501
RC503
122 121 120 119
RC504
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
122 121 120 119

122 121 120 119
122 121 120 119
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
470
1
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
38
22
24
9
20
ROM_WP_L
=PCI_ROM_RESET_L
P4MM
SM
PPC500
PP
12
10
30
31
VCC
UC500
1MX8-3.3V-90.0NS
TSOP
A0
A1SEE_TABLE
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
25
26
27
28
32
33
34
35
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
119 120 121 122

119 120 121 122
119 120 121 122
119 120 121 122
119 120 121 122
119 120 121 122
119 120 121 122
119 120 121 122
CE
OE
WE
WP
PWD
B
GND
1
23
39
P4MM
SM
PPC501
PP
P4MM
SM
PPC502
PP
P4MM
SM
PPC503
PP
BootROM
SYNC_MASTER=Q63

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:45:58 2005
REV.
125
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
PLACE UATA TERMINATION RESISTORS NEAR JC901 CONNECTOR
DIFFERENTIAL_PAIR
SATA
SATA
SATA
SATA
SATA_RXD1_C
SATA_RXD1_C
SATA_RXD_P1_C
SATA_RXD_N1_C
SATA
SATA
SATA
SATA
SATA_TXD1
SATA_TXD1
SATA_TXD_P1
SATA_TXD_N1
SATA
SATA
SATA
SATA
SATA_RXD2_C
SATA_RXD2_C
SATA_RXD_P2_C
SATA_RXD_N2_C
127 129
RC706
127 129
129 127
UATA_RESET_L_R
33
5%
1/16W
MF-LF
402
127 129
SATA
SATA
127 129
129 127
UATA_DMACK_L_R
127 129
I172
I173
I174
I175
I176
I177
I178
I179
I180
UATA_HSTROBE_R
22
5%
1/16W
MF-LF
402
9 127 129
DIOW- :STOP >
127 129
UATA_DMACK_L
127 129
UATA_HSTROBE
127 129
129 127
UATA_STOP_R
RC703
22
UATA_STOP
127 129
UATA_CS0_L
127 129
UATA_CS1_L
127 129
5%
1/16W
MF-LF
402
9 127 129
9 127 129
127 129
RC700
127 129
127 129
129 127
33
UATA_CS0_L_R
127 129
5%
1/16W
MF-LF
402
127 129
127 129
129 127
UATA_CS1_L_R
RC701
33
127 129
5%
1/16W
MF-LF
402
127 129
127 129
UATA_DD_R<15..8>
UATA_DD_R<7>
UATA_DD_R<6..0>
UATA_DA_R<2..0>
UATA_CS0_L_R
UATA_CS1_L_R
UATA_DMACK_L_R
UATA_HSTROBE_R
UATA_STOP_R
UATA_RESET_L_R
I171
129 127
5%
1/16W
MF-LF
402
127 129
UATA_DD<15..8>
UATA_DD<7>
UATA_DD<6..0>
UATA_DA<2..0>
UATA_CS0_L
UATA_CS1_L
UATA_HSTROBE
UATA_STOP
UATA_DMACK_L
UATA_RESET_L
UATA_DSTROBE
UATA_DMARQ
UATA_INTRQ
UATA_NETSPA
DIOR- :HDMARDY- :HSTROBE >
22
127 129
SATA_TXD_P2
SATA_TXD_N2
SATA_TXD2
SATA_TXD2
127 129
RC704
RC702
SATA
SATA
UATA_RESET_L
127 129
127 129
127 129
RPC704
127 129
33
127 129
SPARE
127 129
RPC704
127 129
33
3
129 127
UATA_DA_R<0>
127 129
129 127
33
129 127
UATA_DA_R<2>
UATA_DA<1>
127 129
UATA_DA<2>
127 129
UATA_DD<0>
127 129
UATA_DD<1>
9 127 129
UATA_DD<2>
127 129
UATA_DD<3>
127 129
UATA_DD<4>
127 129
UATA_DD<5>
127 129
UATA_DD<6>
127 129
UATA_DD<7>
127 129
UATA_DD<8>
127 129
UATA_DD<9>
127 129
UATA_DD<10>
127 129
UATA_DD<11>
127 129
UATA_DD<12>
9 127 129
UATA_DD<13>
9 127 129
UATA_DD<14>
9 127 129
UATA_DD<15>
127 129
5%
1/16W
SM-LF
RPC704
127 129
9 127 129
33
1
127 129
UATA_DA<0>
RPC704
UATA_DA_R<1>
5%
1/16W
SM-LF
127 129
7
5%
1/16W
SM-LF
5
5%
1/16W
SM-LF
RPC700
33
129 127
UATA_DD_R<0>
129 127
UATA_DD_R<1>
4
5%
1/16W
SM-LF
RPC700
33
SM
600-OHM-1.0A
1
XWCC00
P4MM
6
0805
LC700
=PP1V2_PWRON_DISK_SB
PP_1V2PWRONDISKSB_CC
NO_TEST=YES
129 127
CC701
CC702
CC703
CC704
0.1uF
0.1uF
0.1uF
0.1uF
20%
20%
20%
20%
20%
20%
6.3V
CERM1
603
10V
CERM
402
10V
CERM
402
10V
CERM
402
10V
CERM
402
PPCC00
UATA_DD_R<3>
129 127
33
129 127
UATA_DD_R<5>
(5 OF 8)
UD_IDEDD_0_H
33
J6
- _PP1V2_PWRON_DISK
UD_IDEDD_1_H
UD_IDEDD_2_H
UD_IDEDD_3_H
E2
(NONE)
UD_IDEDD_4_H
UD_IDEDD_5_H
C1
UD_IDEDD_6_H
E3
UD_IDEDD_7_H
UD_IDEDD_8_H
G6
UATA
(NONE)
1.27mm
0.25mm outer
0.23mm inner
Secondary Max Sep: 2.54mm

Secondary Length:
H6
C2
G5
UD_IDEDD_9_H
D4
UD_IDEDD_10_H
UD_IDEDD_11_H
G7
UD_IDEDD_12_H
UD_IDEDD_13_H
C3
DSTROBE aka:
IORDY/HDMARDY*
UD_IDEDD_14_H
E5
UD_IDEDD_15_H
D5
UD_IDEDA0_H
UD_IDEDA1_H
E6
UD_IDEDA2_H
D6
12.70mm
F6
F5
UATA_DD_R<0>
UATA_DD_R<1>
UATA_DD_R<2>
UATA_DD_R<3>
UATA_DD_R<4>
UATA_DD_R<5>
UATA_DD_R<6>
UATA_DD_R<7>
UATA_DD_R<8>
UATA_DD_R<9>
UATA_DD_R<10>
UATA_DD_R<11>
UATA_DD_R<12>
UATA_DD_R<13>
UATA_DD_R<14>
UATA_DD_R<15>
129 127
UATA_DD_R<7>
DIOR*
SATA data pairs is 100 ohms.

STOP aka:
C4
UATA_DA_R<0>
UATA_DA_R<1>
UATA_DA_R<2>
UATA_DSTROBE
F9
129 127
UATA_DMARQ
D7
4-29-05
AS OF TODAY THIS PAGE FOR M33 IS NOT
SYNC WITH Q63.
RPAK PINS WERE REMAPPED FOR
BETTER ROUTING AROUND UATA
CONNECTOR.
UD_IDEDMARQ_H
129 127
UATA_INTRQ
C5
UD_IDEINTRQ_H
129 127
129 127
129 127
SATA_RXD_P1_C
SATA_RXD_N1_C
SATA_RXD_P2_C
SATA_RXD_N2_C
Y17
RXDP1
Y16
RXDN1
AB15
RXDP2
AA15
RXDN2
UD_IDECS1FX_L
B3
UD_IDECS3FX_L
B4
UD_IDEDMACK_L
UD_IDERD_L
E8
UD_IDEWR_L
UD_IDERST_L
D3
SATA 0
SATA 1
127 129
129 127
E4
E7
TXDP1
AA16
TXDN1
AB16
TXDP2
Y15
TXDN2
Y14
UATA_CS0_L_R
UATA_CS1_L_R
UATA_DMACK_L_R
UATA_HSTROBE_R
UATA_STOP_R
UATA_RESET_L_R
SATA_TXD_P1
SATA_TXD_N1
SATA_TXD_P2
SATA_TXD_N2
33
1
UATA_DD_R<8>
33
127 129
129 127
UATA_DD_R<9>
127 129
5%
1/16W
SM-LF
127 129
127 129
129 127
RPC702
33
3
UATA_DD_R<10>
W16
T13
AA17
127 129
5%
1/16W
SM-LF
RPC702
127 129
33
127 129
129 127
UATA_DD_R<11>
127 129
5%
1/16W
SM-LF
127 129
127 129
129 127
RPC703
33
4
UATA_DD_R<12>
127 129
5%
1/16W
SM-LF
RPC703
127 129
127 129
33
129 127
UATA_DD_R<13>
6
5%
1/16W
SM-LF
127 129
127 129
129 127
RPC703
33
2
UATA_DD_R<14>
127 129
5%
1/16W
SM-LF
RPC703
127 129
127 129
33
129 127
UATA_DD_R<15>
8
5%
1/16W
SM-LF
127 129
127 129
127 129
Shasta Disk
RC705 1
127 129
10K
5%
1/16W
MF-LF
402
127 129
127 129
SYNC_MASTER=M33-DC

2

SM
PP
5%
1/16W
SM-LF
RPC702
127 129
P4MM
1
127 129
SATA_GND
AA14
129 127
UD_IDECHRDY_H
RPC702
1/16W
SM-LF
127 129
DIOW*
129 127
8
5%
127 129
HSTROBE aka:
NOTE: Target differential impedance for
7
5%
1/16W
SM-LF
RPC701
H7
Primary Max Sep:
33
2
BGA-LF
Primary Max Sep:
RPC701
UATA_DD_R<6>
V1.1
0.38mm
6
5%
1/16W
SM-LF
129 127
5
5%
1/16W
SM-LF
RPC701
SHASTA
Net Spacing Type: SATA
33
4
SEE_TABLE
U2300
RPC701
UATA_DD_R<4>
SATA_VDD
Page Notes
8
5%
1/16W
SM-LF
CERM
402
7
5%
1/16W
SM-LF
RPC700
10V
SATA_VDD x 5
Length Tolerance:
33
2
UATA_DD_R<2>
SM
PP
129 127
Y18
0.1uF
W15
CC700
T14
2.2UF
AB17
CC705
AB14
Line To Line:
RPC700
33
1
6
5%
1/16W
SM-LF
PP1V2_SATA_VDD
PPCC01

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:45:59 2005
REV.
127
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
SATA & USB DIFF PAIR GND VIAS
SATA CONNECTOR
ADD THESE GROUND VIAS NEAR EACH LAYER JUMP

FOR THE SATA DIFF PAIRS. ONE GND VIA PER
SIGNAL VIA, AND PLACE GND VIA APPROXIMATELY
0.152MM AWAY FROM SIGNAL VIA.
CC904
0.01UF
129
SATA_TXD_P1_C
0.01UF
JC900
SATA_TXD_N1_C
129
EP00-081-91
M-ST-SM
SATA_RXD_N1
129
127 129
129 127 9
GV901
SATA_TXD_N1
129 127
CC908
0.01UF
1
SATA_RXD_N1_C 127 129
SATA_RXD_P1
129
10%
16V
CERM
402
HOLE-VIA-P5RP25
HOLE-VIA-P5RP25
129 127
GV904
GV903
0.01UF
1
GV906
GV905
HOLE-VIA-P5RP25
HOLE-VIA-P5RP25
10%
16V
CERM
402
129 127
129
129
GV908
HOLE-VIA-P5RP25
127
UATA_DD_R<15..8>
UATA_DD_R<7>
UATA_DD_R<6..0>
UATA_DA_R<2..0>
UATA_CS0_L_R
UATA_CS1_L_R
UATA_HSTROBE_R
127
UATA_STOP_R
127
UATA_DMACK_L_R
127
UATA_RESET_L_R
127
127
127
127
GV909
127
SATA_TXD_P2
NC_SATA_TXD_P2
SATA_TXD_N2
HOLE-VIA-P5RP25
GV911
GV912
HOLE-VIA-P5RP25
MAKE_BASE=TRUE
127
GV910
HOLE-VIA-P5RP25
HOLE-VIA-P5RP25
NC_SATA_TXD_N2
GV914
HOLE-VIA-P5RP25
SATA_RXD_N2_C
NC_SATA_RXD_N2_C
GV915
GV916
HOLE-VIA-P5RP25
NC_SATA_RXD_P2_C
UATA_DSTROBE
129 127
UATA_DMARQ
129 127
UATA_INTRQ
C
129 127
CRITICAL
=PP3V3_PATA
STDOFF-3.5OD1.35H-1.55-TH
NO STUFF
1
RC911
5%
1/16W
MF-LF
402 2
10K
CRITICAL
1
RC914
5%
1/16W
MF-LF
2 402 Per ATA Spec
129 127
129 127
129 127
129 127
Sourced by drive
Terminate near connector
129 127
129 127
129 127
129 127 9
129 127
RC915
129 127
UATA_DSTROBE
82
129 127
129
5%
1/16W
MF-LF
402
129
129 127
129 127 9
129 127
RC916
129 127
UATA_INTRQ
82
UATA_RESET_L
UATA_DD<7>
UATA_DD<6>
UATA_DD<5>
UATA_DD<4>
UATA_DD<3>
UATA_DD<2>
UATA_DD<1>
UATA_DD<0>
UATA_STOP
UATA_DSTROBE_R
UATA_INTRQ_R
UATA_DA<1>
UATA_DA<0>
UATA_CS0_L
UATA_DASP_L
5%
1/16W
MF-LF
402
NO STUFF
CC901 1
10pF
UATA_CSEL_PD
5%
50V
CERM 2
402
UATA_DMARQ
50
49
48
47
46
45
44
43
42
10
41
11
40
12
39
13
38
14
37
15
36
16
35
17
34
18
33
19
32
20
31
21
30
22
29
23
28
24
27
25
26
82
129
NC
NC
UATA_DD<8>
UATA_DD<9>
UATA_DD<10>
UATA_DD<11>
UATA_DD<12>
UATA_DD<13>
UATA_DD<14>
UATA_DD<15>
RC9211
5%
1/16W
MF-LF
2 402
499
Per ATA Spec
SATA_TXD1
129
SATA_TXD_N1_C
SATA_TXD1
129 127
SATA_RXD_N1_C
SATA_RXD1
129 127
SATA_RXD_P1_C
SATA_RXD1
129
SATA_RXD_N1
SATA_RXD1
129
SATA_RXD_P1
SATA_RXD1
SATA
SATA
TRUE
SATA
SATA
TRUE
SATA
SATA
TX1C
TRUE
SATA
SATA
TX1C
TRUE
SATA
SATA
SATA
SATA
SATA
SATA
RX1C
TRUE
SATA
SATA
RX1C
TRUE
TRUE
TRUE
UATA_HSTROBE
9 127 129
9 127 129
9 127 129
127 129
127 129
UATA_DMACK_L
127 129
UATA_IOCS16_PU
4-8-05
NC
UATA_DA<2>
UATA_CS1_L
NC
CC909
0.1uF
2 10V
CERM
402
127 129
NOTES FOR SHARED PAGE 127

FOR M23/M33 CREATE A WIDE SHAPE
FOR PP1V2_SATA_VDD AND THEN NECK DOWN
TO THE DEFAULT VALUE WHEN NECESSARY.
THE WIDTH/NECK PROPERTIES ON PAGE 127
ARE SET BY Q63 FOR SCHEMATIC SHARING.
127 129
CE910
10UF
20%
2 10V
CERM
805-2
LC700 CHANGED TO 155S0240 (600 OHM,0.2 OHM DCR,1A)

PREVIOUS ONE WAS 155S0031 (600 OHM,0.6 OHM DCR,0.2A)
PER TOKIN AMERICA PN: N2012Z601.
4-11-05.
PP1V2_ALL REG. IS SET TO BE 1.22V TO 1.23V
AS NOTED ON THE 1.2 REG PAGE 13. THIS WILL
HELP MITIGATE THE LOSS ACROSS THE Q1306 FET
SI3326DV.
6.2K
5%
1/16W
MF-LF
2 402
PER ATA7 SPEC
Disk Connectors
SYNC_MASTER=M33-DC

DEVELOPMENT
127 129
LEDC901
UATA_DASP_L_DS
SATA_TXD1
UATA TRACE IMPEDANCE ROUTE TO 50 OHMS
PER ATA SPEC
1%
1/16W
MF-LF
402 2
I404
127 129
RC918 1RC917
5%
1/16W
MF-LF
402 2
UATA_NETSPA
127 129
5.6K
DEVELOPMENT
UATA_NETPH
I403
SATA_TXD_P1
127 129
PLACE CC909/CC910 CLOSE TO JC901 FOR PP5V_PATA.
RC9191
=PP5V_PATA
UATA_NETSPA
I398
4-11-05: BOARD FILE HAS PHYSICAL/SPACING NAME ASSIGMENT ALREADY FOR SATA DIFF PAIRS (CAP TO SHASTA).
BUT NOT FOR THE SATA CAP TO CONNECTOR ROUTES, WHICH THE ABOVE ARE ADDED FOR THIS PURPOSE.
5%
1/16W
MF-LF
402
129 7
UATA_NETPH
I397
Obsolete
UATA_DMARQ_R
ATA-6 spec does not call out C8177
UATA_NETSPA
I396
5%
1/16W
MF-LF
2 402
516S0152
UATA_NETPH
I395
1K
20%
UATA_NETSPA
I394
SDFC901
NC
RC920
129 127
UATA_NETPH
I393
STDOFF-3.5OD1.35H-1.55-TH
RC912
M-ST-SM2-LF
NC
CRITICAL
JC901
4.7K
UATA_NETSPA
I392
I402
SATA_TXD1
10K
5%
1/16W
MF-LF
402 2
UATA_NETPH
I401
SATA_TXD_P1_C
SDFC900
ATA-6 spec does not call out R8180 or R8182
NO STUFF
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
NO_TEST
I400
SATA_TXD_N1
4-12-05
=PP5V_PATA
RC9131
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
DIFFERENTIAL_PAIR
I399
129
129 127
M33 PATA CONNECTOR

7
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA_NETSPA
UATA FROM SHASTA U2300 TO RPAKS
MAKE_BASE=TRUE
129 7
NET_SPACING_TYPE
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
UATA_NETPH
HOLE-VIA-P5RP25
SATA_RXD_P2_C
129 127
MAKE_BASE=TRUE
127
127
HOLE-VIA-P5RP25
1
127
127
GV913
MAKE_BASE=TRUE
NET_PHYSICAL_TYPE
UATA_DD
UATA_DD7
UATA_DD
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST
UATA_HOST_R
UATA_RESET_L
UATA_DEV_R_C
UATA_DEV_R
UATA_DEV_R
UATA FROM RPAKS TO JC901
GV907
HOLE-VIA-P5RP25
SATA PORT1 IS NOT USED IN M23/M33:NO TEST
UATA_DD<15..8>
UATA_DD<7>
UATA_DD<6..0>
UATA_DA<2..0>
UATA_CS0_L
UATA_CS1_L
UATA_HSTROBE
UATA_STOP
UATA_DMACK_L
UATA_RESET_L
UATA_DSTROBE_R
UATA_DMARQ_R
UATA_INTRQ_R
SATA_RXD_P1_C 127 129
129 127
129
518S0251
129 127
129 127
127 129
CC907
HOLE-VIA-P5RP25
GV902
HOLE-VIA-P5RP25
10%
16V
CERM
402
1
2
SATA_TXD_P1
10%
16V
CERM
402
CC905
CRITICAL
129 127
129 127 9
129 127 9
4-12-05.
UPDATED AC COUPLING CAPS FOR SATA JC900.
SIZE
GREEN-3.6MCD
2.0X1.25MM-SM
ADDED DECOUPLING CAPS FOR JC901 PP5V_PATA NET.
"UATA ACTIVE"
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
129
154
D
PLACE THESE SERIES TERM CLOSE TO DRIVER: VESTA
PLACE THESE SERIES TERM CLOSE TO DRIVER: SB/SHASTA
VESTA -> SHASTA
SHASTA
I58 -> VESTA
131 9
131 9
131 9
131 9
131 9
131 9
131 9
131 9
131 9
131 9
131
131
ENET_TXD_R<0>
ENET_TXD_R<1>
ENET_TXD_R<2>
ENET_TXD_R<3>
ENET_TXD_R<4>
ENET_TXD_R<5>
ENET_TXD_R<6>
ENET_TXD_R<7>
I59
I60
I61
I62
I63
I64
I65
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I66
I67 MAKE_BASE=TRUE
MAKE_BASE=TRUE
I68
MAKE_BASE=TRUE
I69
MAKE_BASE=TRUE
ENET_TX_EN_R
ENET_TX_ER_R
ENET_CLK125M_GTX_R
ENET_MDIO_R
ENET_TXD<0>
ENET_TXD<1>
ENET_TXD<2>
ENET_TXD<3>
ENET_TXD<4>
ENET_TXD<5>
ENET_TXD<6>
ENET_TXD<7>
I84
9 131 132
132
132
ENET_CLK25M_TX_R
132
ENET_CLK125M_RX_R
9 131 132
131
MAKE_BASE=TRUE
131
MAKE_BASE=TRUE
ENET_CLK125M_RX
131
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
ENET_RXD<0>
ENET_RXD<1>
ENET_RXD<2>
ENET_RXD<3>
ENET_RXD<4>
ENET_RXD<5>
ENET_RXD<6>
ENET_RXD<7>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
ENET_RX_DV
ENET_RX_ER
9 131 132
9 131 132
132 131 9
9 131 132
132 131 9
9 131 132
132 131 9
9 131 132
132 131 9
131 132
132 131 9
ENET_MDIO
ENET_CLK125M_GBE_REF
ENET_CLK25M_TX
I71
9 131 132
132 131 9
ENET_CLK125M_GTX
MAKE_BASE=TRUE
I70
9 131 132
132 131 9
ENET_TX_EN
ENET_TX_ER
ENET_CLK125M_GBE_REF_R
9 131 132
132 131 9
ENET_RXD_R<0>
ENET_RXD_R<1>
ENET_RXD_R<2>
ENET_RXD_R<3>
ENET_RXD_R<4>
ENET_RXD_R<5>
ENET_RXD_R<6>
ENET_RXD_R<7>
131 132
132 131
132 131
132 131
132 131
ENET_RX_DV_R
ENET_RX_ER_R
ENET_COL_R
ENET_CRS_R
I72
I73
I74
I75
I76
I77
I78
I79
I80
I81
I82
I83
MAKE_BASE=TRUE
MAKE_BASE=TRUE
ENET_COL
ENET_CRS
9 131
9 131
9 131
9 131
9 131
9 131
9 131
9 131
131
131
131
131
ENET SERIES TERM

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
130
F
154
0.38mm SPACING
ENET_CLK25M_TX
ENET_CLK125M_RX
ENET_CLK125M_GTX
ENET_CLK125M_GTX_R
0.38mm SPACING
I46
0.38mm SPACING
I48
0.38mm SPACING
I22
0.38mm SPACING
I50
I51
I52
ENET_FW_2X
ENET_FW_3X
ENET_FW_3X
ENET_RXD_R<7..0>
ENET_RX_DV_R
ENET_RX_ER_R
ENET_FW_2X
ENET_FW_3X
ENET_FW_3X
ENET_RXD<7..0>
ENET_RX_DV
ENET_RX_ER
ENET_FW_2X
ENET_FW_3X
ENET_FW_3X
ENET_TXD_R<7..0>
ENET_TX_EN_R
ENET_TX_ER_R
ENET_FW_2X
ENET_FW_3X
ENET_FW_3X
ENET_TXD<7..0>
ENET_TX_EN
ENET_TX_ER
ENET_FW_3X
ENET_FW_3X
ENET_CRS_R
ENET_COL_R
ENET_FW_3X
ENET_FW_3X
ENET_CRS
ENET_COL
ENET_FW_3X
ENET_FW_3X
ENET_FW_3X
ENET_FW_3X
ENET_FW_3X
ENET_FW_3X
ENET_MDC
ENET_MDIO
ENET_MDIO_R
R8405_1
R8405_2
R8407_2
I53
I54
I55
I56
I58
I57
I59
I60
I61
I62
I63
I64
I65
130 131
130 131
130 132
130 131
9 130 132
130 132
130 132
9 130 131
130 131
130 131
9 130 131
9 130 131
9 130 131
9 130 132
9 130 132
9 130 132
SM
U2300
130 132
P4MM
SHASTA
PP
PPD101
130 131
PP
V1.1
BGA-LF
130 131
(6 OF 8)
ETH_TX_CLK_H
H5
J3
ETH_RX_CLK_H
ENET_RXD<0>
ENET_RXD<1>
ENET_RXD<2>
ENET_RXD<3>
ENET_RXD<4>
ENET_RXD<5>
ENET_RXD<6>
ENET_RXD<7>
K1
ETH_RXD_0_H
ETH_RXD_1_H
131 130
ENET_RX_DV
ENET_RX_ER
K4
131 130
(NONE)
I42
I43
I45
I44
131 130
131 132
131 130
130 131 132
ETH_TXD_0_H
ETH_TXD_1_H
G4
ETH_TXD_2_H
ETH_TXD_3_H
H4
ETH_TXD_4_H
G3
ETH_RXD_5_H
ETH_RXD_6_H
ETH_TXD_5_H
ETH_TXD_6_H
F2
ETH_RXD_7_H
ETH_TXD_7_H
K6
ETH_RX_DV_H
ETH_TX_EN_H
H3
G2
ETH_RX_ER_H
ETH_TX_ER_H
F1
M5
ETH_REFCLK_H
ETH_GTX_CLK_H
K5
131 130
ENET_CRS
L6
ETH_CRS_H
ETH_MDC_H
M4
131 130
ENET_COL
L5
ETH_COL_H
ETH_MDIO_H
M6
130 131
131 130 9
131
131 130 9
131
131 130 9
131
131 130 9
131 130 9
131 130 9
131 130 9
Page Notes
131 130 9
131 130
SEE_TABLE
P4MM
PPD100
130 132
ENET_CLK25M_TX
ENET_CLK125M_RX
I41
130 131
SM
I66
I40
DIFFERENTIAL_PAIR
I47
7
NET_SPACING_TYPE
ETHERNET
8
L3
K2
J1
L4
K3
J2
G1
(NONE)
(NONE)
ETH_RXD_2_H
ETH_RXD_3_H
ETH_RXD_4_H
ENET_TXD_R<0>
ENET_TXD_R<1>
ENET_TXD_R<2>
ENET_TXD_R<3>
ENET_TXD_R<4>
ENET_TXD_R<5>
ENET_TXD_R<6>
ENET_TXD_R<7>
E1
J5
J4
9 130 131
9 130 131
9 130 131
9 130 131
9 130 131
9 130 131
9 130 131
9 130 131
ENET_TX_EN_R
ENET_TX_ER_R
9 130 131
9 130 131
ENET_CLK125M_GTX_R
130 131
ENET_MDC
131 132
ENET_MDIO_R
130 131
P4MM
SM
PPD102
PP
P4MM
P4MM
SM
PPD103
PP
SM
1
PP
PPD105
P4MM
SM
PPD104
PP
RD103 PIN 1 SHARES PIN WITH RD104 PIN 1

SEE_TABLE
RD103
131 130
ENET_MDIO_R
ENET_MDIO
5%
1/16W
MF-LF
402
SEE_TABLE
RD104
SEE_TABLE
RD106
0
1
130 131 132
0
2
SEE_TABLE
5%
1/16W
MF-LF
402
131
R8405_1
0
1
131
2
5%
1/16W
MF-LF
402
RD105
R8405_2
5%
1/16W
MF-LF
402
SEE_TABLE
SEE_TABLE
RD107
1
33
RD108
131
R8407_2
5%
1/16W
MF-LF
402
PART NUMBER

5%
1/16W
MF-LF
402
DESCRIPTION
REFERENCE DES
116S0004
QTY
1
RES,0-OHM,402,5%
RD103
CRITICAL
ENET_MDIO_DELAY_0
BOM OPTION
116S0004
RES,0-OHM,402,5%
RD104,RD105,RD106
ENET_MDIO_DELAY_2NS
116S0004
RES,0-OHM,402,5%
RD104,RD108,RD106
ENET_MDIO_DELAY_4NS
116S0030
RES,33-OHM,402,5%
RD107
ENET_MDIO_DELAY_4NS
Shasta Ethernet
SYNC_MASTER=Q63

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 12:01:57 2005
REV.
131
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
Q63 APPLICATION IS ALL
139 17 7
I118
I117
I119
I121
I120
ENET_MDI0
ENET_MDI0
ENET_MDI1
ENET_MDI1
ENET_MDI2
ENET_MDI2
ENET_MDI3
ENET_MDI3
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
VESTA_CLK25M_XTALI
I122
0.38mm SPACING
I65
132 136
0.38mm SPACING
I66
XWD200
P4MM
OMIT
TP_VESTA_BIASVDD1
SM
PPD239
PP
SM
132 136
132 136
CD201
XWD201
0.1uF
2
132 136
TP_VESTA_XTALVDD1
CERM
402
XWD202
LD201
132
PPD201
P4MM
OMIT
TP_VESTA_PLLVDD1
SM
PPD238
PP
PP1V2_VESTA_PLLVDD1
LD202
VOLTAGE=1.2V
FERR-EMI-600-OHM
132
SM
PP
VOLTAGE=2.5V
132
10V
132 136
132 136
P4MM
OMIT
20%
132 136
VESTA_CLK25M_XTALO
VESTA_CLK25M_XTALO_R
0.38mm SPACING
I64
132 136
I115
FERR-EMI-600-OHM
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
I116
VOLTAGE=2.5V
LD200
=PP2V5_ENETFW
SM
130 132
130 132
130 132
0.38mm SPACING
0.38mm SPACING
I123
SM
ENET_CLK125M_RX_R
ENET_CLK25M_TX_R
I114
I124
DIFFERENTIAL_PAIR
0.38mm SPACING
NET_SPACING_TYPE
SM
FERR-EMI-600-OHM
SM
=PP1V2_ENETFW
7 17 139
2
SM
Page Notes
CD202
10UF
2
- =PP3V3_ENET
CD203
CD204
0.001uF
10%
6.3V
X5R
805
0.001uF
20%
20%
50V
50V
CERM
402
CERM
402
CD205
10UF
VESTA SPEC CALLS FOR 2.2UF, LOW ESR CAP
10%
2
6.3V
X5R
805
ESR < 0.5 ohms
P4MM
SM
(NONE)
PPD200

131 130
PP
M1
N1
- =PP1V2_ENETFW
P1
- =PP2V5_ENETFW
XTALVDD1 BIASVDD1 PLLVDD1
ENET_CLK125M_GTX
A4
(NONE)
GTXCLK
CLK125 D1
IPD
SEE_TABLE
VESTA ENET
Net Spacing Type: ENET
130 132
A6
ENET_CLK25M_TX_R
130 132
RXC C1
ENET_CLK125M_RX_R
130 132
TXC
U1701
Line To Line:
0.38mm
Length Tolerance:
1.27mm
Primary Max Sep:
VESTA-V1.3
FBGA-200-LF
2 OF 3
0.13mm
131 130 9
131 130 9
Secondary Length:
131 130 9
12.70mm
131 130 9

131 130 9
ENET data pairs is 100 ohms.

136 132 7
131 130 9
=PP3V3_ENET
131 130 9
131 130 9
RD250 1
139 17 7
=PP3V3_ENETFW
1.5K
5%
1/16W
MF-LF
402 2
RD204 2
1K
131
1%
1/16W
MF-LF
402 1
131 130
131 130 9
131 130 9
ENET_TXD<0>
ENET_TXD<1>
ENET_TXD<2>
ENET_TXD<3>
ENET_TXD<4>
ENET_TXD<5>
ENET_TXD<6>
ENET_TXD<7>
B6
ENET_TX_EN
ENET_TX_ER
B4
C6
C7
D6
E6
C5
B5
A5
C4
ENET_MDC
ENET_MDIO
G1
G2
VESTA_ENET_LOWPWR
H5
TXD[0]
TXD[1]
TXD[2]
TXD[3]
TXD[4]
TXD[5]
TXD[6]
TXD[7]
TX_EN
TX_ER
MDC
MDIO
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
136 132 7
=PP3V3_ENET
SOT-363
CD206
LOWPWR
RBC0 A3
RBC1 B3
IPD
2 10%
6.3V
CERM
402
9
9
9
9
SOT-363
9
9
9
9
1
9
9
9
9
Vesta Config Straps:
9
9
PHYA<4..0> - PHY Address Select
MANMS - Manual Master/Slave Configuration Select
(Internal Pull-downs)
Sets manual master/slave configuration enable bit
TP_VESTA_PHYA<0>
TP_VESTA_PHYA<1>
TP_VESTA_PHYA<2>
TP_VESTA_PHYA<3>
TP_VESTA_PHYA<4>
L5
TP_VESTA_EN_10B
TP_VESTA_RGMIIEN
TP_VESTA_FDX
TP_VESTA_F1000
TP_VESTA_SPD0
TP_VESTA_MANMS
TP_VESTA_HUB
TP_VESTA_ER
K3
L4
L3
L2
L1
QD200
2N7002DW-X-F
VESTA_RESET_H
B8
C8
K4
K5
D9
A9
H3
TP_VESTA_TEST<0>
TP_VESTA_TEST<1>
TP_VESTA_TVCO
M4
M5
N3
Put crystal circuit close to PHY

132
132
HUB - Repeater Select
0 - GMII/RGMII Mode
Sets Hub/DTE bit and master/slave configuration value bit
(Internal Pull-down)
VESTA_CLK25M_XTALI
1
N2
P2
ER - Edge Rate Select
1 - RGMII/RTBI Mode
1 - Rise time approx. 5 ns
0 - GMII/TBI Mode
0 - Rise time approx. 4 ns
FDX - Full-Duplex Select
AN_EN - Auto-Negotiation Select
Sets manual duplex mode bit
1 - Auto-negotiation enabled
(Internal Pull-up)
0 - Auto-negotiation disabled
CRITICAL
YD200
25.0000M
1
33pF
50V
CERM
402
See table below
TXC_RXC_DELAY
(Internal Pull-up)
1 - If RGMII Mode enabled, RXC clock and

GTXCLK are delayed by 1.9 ns
9 130 131
9 130 131
9 130 131
9 130 131
9 130 131
130 131
130 131
ENET_COL_R
ENET_CRS_R
TP_VESTA_RBC0
TP_VESTA_RBC1
9 130 131
130 131
130 131
9
9
IPD
IPD
IPD
R4
TRD+[0]
TRD-[0] R5
ENET_MDI_P<0>
ENET_MDI_N<0>
TRD+[1] R7
TRD-[1] R6
ENET_MDI_P<1>
ENET_MDI_N<1>
132 136
ENET_MDI_P<2>
ENET_MDI_N<2>
132 136
ENET_MDI_P<3>
ENET_MDI_N<3>
132 136
132 136
132 136
IPD
TRD+[2] R8
TRD-[2] R9
EN_10B IPD
RGMIIEN IPD
TRD+[3] R11
FDX IPU
TRD-[3] R10
F1000 IPU
SPD0 IPD
INTR*/ENERGYDET D10 ENET_ENERGYDET
MANMS IPD
TP_VESTA_AN_EN
HUB IPD
IPU SLAVE*/AN_EN C10
ER IPD
QUALITY*/TXC_RXC_DELAY A8 TP_VESTA_TXC_RXC_DELAY
IPD
A10
TP_VESTA_LINK1_L
IPD
LINK1*
TP_VESTA_LINK2_L
TEST[0]
IPD
LINK2* B11
TP_VESTA_FDXLED_L
IPD
TEST[1]
FDXLED* B10
B12
TP_VESTA_XMTLED_L
IPU
XMTLED*
TVCO
TP_VESTA_ACTLED_L
IPU
ACTLED* A11
XTALI
RDAC1 R1 VESTA_RDAC1_PD
XTALO
5%
1/16W
MF-LF
402
PLLGND1
132 136
132 136
TERMINATION OFF PAGE
24
9
9
9
9
9
136
136
RD213 1
1.24K
1%
1/16W
MF-LF
402
CD219
VESTA_CLK25M_XTALO
132
5%
2
50V
CERM
402
CRYSTAL LOAD CAPACITANCE IS 20PF
SPD0 - Speed Select
132 136
33pF
5%
(Internal Pull-up)
F1000 - Speed Select
9 130 131
8X4.5MM-SM2
CD218
IPD
XTALGND BIASGND
RD209
0
RGMIIEN - RGMII Enable
PHYA[0]
PHYA[1]
PHYA[2]
PHYA[3]
PHYA[4]
P3
EN_10B - TBI Interface Select
1 - TBI/RTBI Mode
9 130 131
IPU=INTERNAL PULL-UP
1UF
17
ENET_RX_DV_R
ENET_RX_ER_R
IPU
M2
2N7002DW-X-F
RX_DV D2
RX_ER C2
COL F3
CRS G3
R2
QD200
ENET_RXD_R<0>
ENET_RXD_R<1>
ENET_RXD_R<2>
ENET_RXD_R<3>
ENET_RXD_R<4>
ENET_RXD_R<5>
ENET_RXD_R<6>
ENET_RXD_R<7>
IPD
IPD=INTERNAL PULL-DOWN
3
RXD[0]
RXD[1] F5
RXD[2] E5
RXD[3] E4
RXD[4] E3
RXD[5] D5
RXD[6] D4
RXD[7] D3
F4
Vesta Ethernet PHY
0 - No clock delay
See table below
SYNC_MASTER=Q63
AN_EN
F1000
SPD0
Description
Force 10BASE-T
Force 100BASE-TX
Force 1000BASE-T (test use only)
Auto-negotiate advertise 10BASE-T
Auto-negotiate advertise 10/100BASE-TX

Auto-negotiate advertise 10/100/1000BASE-T
Auto-negotiate advertise 1000BASE-T
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:02 2005
REV.
132
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
EXTRA CONSTRAINTS TO SUPPLEMENT THE THE MISSING NET PHYSICAL FROM EARLIER PAGE
TABLE_5_HEAD
PART#
NET_PHYSICAL_TYPE
QTY
DESCRIPTION
CRITICAL
BOM OPTION
JD600
CRITICAL
17_INCH_LCD
PUT DEVELOPMENT LEDS ON TOP SIDE OF BOARD

TABLE_5_ITEM
ENET
ENET
ENET
ENET
ENET
ENET
ENET
ENET
I295
I296
I297
I298
I299
I300
I301
I302
514-0253
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
CON,RJ-45 7 DEGRESS
132 136
TABLE_5_ITEM
514-0254
132 136
CON,RJ-45 7 DEGRESS
JD600
CRITICAL
20_INCH_LCD
132 136
132 136
136 132 7
=PP3V3_ENET
DEVELOPMENT
132 136
RD601
132 136
330
132 136
5%
1/10W
MF-LF
2 603
132 136
LED8700_P
DEVELOPMENT
LEDD600
LD600
GREEN-3.6MCD
2.0X1.25MM-SM
FERR-EMI-600-OHM
7
=PP2V5_ENET
PP2V5_ENET_CTAP
VOLTAGE=2.5V
SM
ENET TERMINATION
CD600
0.1UF
20%
2 10V
CERM
402
CD601
GND_CHASSIS_RJ45
0.1UF
CD604 1
20%
2 10V
CERM
402
0.001UF
132
10%
50V
CERM 2
402
TP_VESTA_XMTLED_L
VESTA_XMTLED_L
MAKE_BASE=TRUE
(514-0253)
OMIT
JD600
PLACE THESE PARTS NEAR VESTA

136 132
136 132
JFM38V10-0112-4F
ENET_MDI_P<0>
ENET_MDI_N<0>
F-ANG-TH
PRIMARY
1CT:1CT
13
11
RD604 1RD605
49.9
1%
1/16W
MF-LF
2 402
136 132
ENET_CTAP
ENET_CTAP
MDI_0+
MDI_0-
MDI_1+
MDI_1MDI_2+
ENET_MDI0
136 132
75 OHM
ENET_MDI_P<1>
ENET_MDI_N<1>
7
1
20%
16V
2 CERM
402
MDI_2MDI_3+
10
MDI_3-
CD606
0.01UF
RD606 RD607
49.9
136 132
1CT:1CT
SECONDARY
J1
75 OHM
J2
J3
J4
1CT:1CT
J5
J6
75 OHM
J7
J8
49.9
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
1CT:1CT
RJ45
CABLE SIDE
12
75 OHM
ENET_MDI1
136 132
49.9
1%
1/16W
MF-LF
2 402
RJ45
CHIP SIDE
ENET_MDI_P<2>
ENET_MDI_N<2>
136 132 7
RD608 RD609
49.9
=PP3V3_ENET
DEVELOPMENT
1000PF, 2000V
RD603
0.01UF
49.9
1%
1/16W
MF-LF
2 402
SHIELD
CD607
330
20%
16V
2 CERM
402
1%
1/16W
MF-LF
2 402
5%
1/10W
MF-LF
2 603
ENET_MDI2
136 132
136 132
LED8701_P
ENET_MDI_P<3>
ENET_MDI_N<3>
CD605
DEVELOPMENT
0.001UF
CD608
0.01UF
20%
2 16V
CERM
402
RD610 1RD611
49.9
GREEN-3.6MCD
2.0X1.25MM-SM
2
49.9
1%
1/16W
MF-LF
2 402
LEDD601
10%
50V
2 CERM
402
1%
1/16W
MF-LF
2 402
ENET_MDI3
1
CD609
132
TP_VESTA_ACTLED_L
0.01UF
VESTA_ACTLED_L
MAKE_BASE=TRUE
20%
2 16V
CERM
402
SPARE GND VIAS FOR LAYER TRAVERSALS DURING ROUTING
ZHD690
HOLE-VIA
1
ETHERNET CONNECTOR
ZHD691
HOLE-VIA
1
ZHD692

HOLE-VIA
1

ZHD693
HOLE-VIA
1
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
136
154
8
NET_SPACING_TYPE
I87
I88
DIFFERENTIAL_PAIR
FW_DATA<7..0>
FW_CTL_S<1..0>
FW_CTL<1..0>
FW_DATA_R<7..0>
FW_CTL_R<1..0>
FW_LPS
FW_LREQ
FW_PINT
FW_CLK98M_LCLK
FW_CLK98M_PCLK
FW_CLK98M_LCLK_R
ENET_FW_2X
ENET_FW_3X
ENET_FW_3X
ENET_FW_2X
ENET_FW_3X
ENET_FW_3X
ENET_FW_3X
ENET_FW_3X
0.38mm SPACING
0.38mm SPACING
0.38mm SPACING
I91
138 139
138 139
138 139
139
139
138 139
138 139
138 139
138 139
138 139
138
Page Notes
- _PP2V5_PWRON_SB
(NONE)
(NONE)
=PP2V5_PWRON_SB
CD800
CD801
0.1uF
0.1uF
20%
20%
10V
10V
CERM
402
CD802
0.1uF
20%
CERM
402
10V
CERM
402
N5
A4
J7
119 24 23 7
FWVDDP
U2300
SHASTA
V1.1
BGA-LF
SEE_TABLE
FIREWIRE
(7 OF 8)
PHY_DATA_0_H
N4
PHY_DATA_1_H
PHY_DATA_2_H
P5
PHY_DATA_3_H
M7
PHY_DATA_4_H
PHY_DATA_5_H
N6
PHY_DATA_6_H
PHY_DATA_7_H
M3
PHY_CTL_0_H
N2
139 138
PHY_CTL_1_H
N3
139 138
PHY_LPS_H
P6
N1
L1
L2
FW_DATA<0>
FW_DATA<1>
FW_DATA<2>
FW_DATA<3>
FW_DATA<4>
FW_DATA<5>
FW_DATA<6>
FW_DATA<7>
138 139
138 139
138 139
138 139
138 139
138 139
138 139
138 139
PHY_LREQ_H
P1
139 138
FW_CLK98M_PCLK
P2
PHY_SCLK_H
PHY_LCLK_H
R1
139 138
FW_PINT
P3
PHY_PINT_L
PHY_LINKON_L
N7
FW_LPS
FW_LREQ
138
FW_CTL_S<0>
FW_CTL_S<1>
RD801
RD802
FW_CTL<0>
FW_CTL<1>
138 139
138 139
5%
1/16W
MF-LF
402
138 139
138 139
FW_CLK98M_LCLK_R
FW_LINKON
RD800
139
22
1
FW_CLK98M_LCLK
138 139
5%
1/16W
MF-LF
402
Shasta FireWire
SYNC_MASTER=Q63

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:04 2005
REV.
138
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
8
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
ETHERNET SPACING TO ROUTE ON LAYER 8
FW_TPA0
FW_TPA0
FW_TPB0
FW_TPB0
FW
FW
FW
FW
FW
FW
FW
FW
139 140
139 140
I399
I400
CD900
10UF
PPD903
PP
SM
1
LD906
PP3V3_VESTA_FAVDDH
VOLTAGE=3.3V
FERR-EMI-600-OHM
=PP3V3_ENETFW
7 17 132 139
CD901
X5R
805
20%
CD906
50V
0.1uF
0.1uF
0.1uF
CERM
402
20%
20%
20%
10V
10V
10V
PPD901
139 140
P4MM
SM
139 140
LD901
139 140
=PP2V5_ENETFW
139
OMIT
XWD901
XWD904
SM
SM
CERM
402
CD907
CD908
CERM
402
CD917
10UF
10%
6.3V
CERM
402
X5R
805
P4MM
SM
FERR-EMI-600-OHM
139 140
OMIT
TP_VESTA_BIASVDD2
PP
139 140
SM
0.001uF
10%
6.3V
139 140
TP_VESTA_FAVDDM
PPD904
PP
LD909
PP2V5_VESTA_FAVDDM
VOLTAGE=2.5V
VOLTAGE=2.5V
FERR-EMI-600-OHM
1
CD903
0.1uF
139
138
SM
0.1uF
20%
10V
10V
OMIT
OMIT
XWD902
XWD903
SM
SM
FERR-EMI-600-OHM
1
CD911
20%
CERM
402
TP_VESTA_XTALVDD2
LD902
0.1uF
10V
P4MM
PP
CD909
20%
PPD902
138 139
CD918
10UF
10%
6.3V
CERM
402
X5R
805
P4MM
CERM
402
TP_VESTA_FAVDDL
PP1V2_VESTA_FAVDDL
VOLTAGE=2.5V
VOLTAGE=1.2V
SM
PP
LD913
PPD905
FERR-EMI-600-OHM
1
SM
Page Notes
CD904
2
140
=PP1V2_ENETFW
7 17 132 139
SM
1
7 17 132 139
SM
139
138 139
=PP2V5_ENETFW
SM
I401
SM
TP_VESTA_FAVDDH
XWD905
6
139 140
FW_CTL_S<1..0>
FW_CTL<1..0>
FW_CTL_R<1..0>
FW_CTL
FW_CTL
FW_CTL
P4MM
OMIT
VOLTAGE=1.2V
SPEC CALLS FOR 2.2UF

ESR < 0.5 ohms
139 140
VESTA_CLK24M_XTALI
VESTA_CLK24M_XTALO
0.38mm SPACING
PP1V2_VESTA_PLLVDD2
139 132 17 7
0.38mm SPACING
SM
139 140
FW_TPA_P<2>
FW_TPA_N<2>
FW_TPB_P<2>
FW_TPB_N<2>
0.38mm SPACING
TP_VESTA_PLLVDD2
FERR-EMI-600-OHM
139 140
OMIT
SM
SM
FW_TPA_P<1>
FW_TPA_N<1>
FW_TPB_P<1>
FW_TPB_N<1>
FW_TPA2
FW_TPA2
FW_TPB2
FW_TPB2
XWD900
P4MM
PP
PPD900
LD900
139
FW_TPA_P<0>
FW_TPA_N<0>
FW_TPB_P<0>
FW_TPB_N<0>
FW_TPA1
FW_TPA1
FW_TPB1
FW_TPB1
FW
FW
FW
FW
=PP1V2_ENETFW
139 132 17 7
FW_CLK98M_PCLK_R
DIFFERENTIAL_PAIR
0.38mm SPACING
(PROVIDED BY LINK PAGE)
CD905
CD913
CD914
0.001uF
0.1uF
0.1uF
0.1uF
10%
20%
20%
20%
20%
6.3V
50V
10V
10V
10V
X5R
805
CERM
402
CERM
402
CERM
402
CD915
10UF
CD919
10UF
10%
6.3V
CERM
402
X5R
805
=PPFW_PHY
RD914
- =PP2V5_ENETFW
139 132 17 7
=PP3V3_ENETFW
5%
1/16W
MF-LF
402 2
RPD900
22
138
FW_DATA<0>
4
5%
1/16W
SM-LF
If stuffed, adds external pull-up to

138
RPD900
CPS
C11
139
FW_DS_ONLY_P1_P2
FW_PLUG_PRESENT1
FW_PLUG_PRESENT2
C13
ESDET0
ESDET1
ESDET2
FW_DATA<1>
138
FW_CLK98M_LCLK
D15
PLI_LCLK
22
FW_DATA<2>
SM
PP
5%
1/16W
MF-LF
402 2
139
P4MM
1K
5%
1/16W
SM-LF
RPD900
See straps table for more information.

138
PPD906
RD911 1
counter internal pull-down in Vesta.

- VESTA_PWR_CLASS_0
139
FW_DS_ONLY_P0
22
See straps table for more information.

138
RPD900
Net Spacing Type: FW
22
FW_DATA<4>
RPD901
138
22
3
FW_DATA<5>
FW_DATA<6>
138
138
139 138
139 138
5%
1/16W
SM-LF
139 138
139 138
FW_CTL<0>
FW_CTL<1>
138
RPD901
138
22
1
FW_DATA<7>
5%
1/16W
MF-LF
402
22
RD912 1
1K
5%
1/16W
MF-LF
402 2
9
9
1K
5%
1/16W
MF-LF
402 2
1%
1/16W
MF-LF
402
F12
F13
G13
G12
G11
FW_CTL_R<0>
FW_CTL_R<1>
E14
FW_LPS
FW_LREQ
D11
FW_DS_ONLY_PO
FW_PWR_CLASS_MSB
A13
E13
D12
A12
J5
J4
N13
VESTA_CLK24M_XTALI
P14
139
RD921
P13
RD903
0
CRITICAL
YD920
139
CD920
139
22pF
CERM
402
FW_PORTS_1_2_BI
1
RD905
N12
N11
M10
L10
M12
M11
L12
L11
K13
K12
K11
PLI_DATA[0]
PLI_DATA[1]
PLI_DATA[2]
PLI_DATA[3]
PLI_DATA[4]
PLI_DATA[5]
PLI_DATA[6]
PLI_DATA[7]
139
9
9
9
FW_CLK98M_PCLK_R
IPD
IPD
IPD
IPD
PLI_LPS
PLI_LREQ
IPD
IPD
IPU
TEST_1394[0]
TEST_1394[1]
TVCO_24
IPD
1%
1/16W
MF-LF
402
RD904
CD921
VESTA_CLK24M_XTALO
139 140
139 140
800 REAR PORT
139 140
139 140
140
139 140
139 140
400 REAR PORT
139 140
139 140
140
FW_TPA_P<2>
FW_TPA_N<2>
FW_TPB_P<2>
FW_TPB_N<2>
139 140
139 140
400 FNT PNL PORT

139 140
VESTA_RDAC2_PD
VESTA_WIRESPD
WIRESPD B9
PLLGND2
10K
1%
1/16W
MF-LF
402
RD909 1
139
RD908 1
2.0K
1K
1%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
RD915 1
RD916 1
10K
10K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
=PP3V3_ENETFW
7 17 132 139
22pF
5%
50V
CERM
402
1K
1%
1/16W
MF-LF
402
CRYSTAL LOAD CAPACITANCE IS 12PF
Vesta FireWire PHY
VESTA CONFIG STRAPS:
139 140
NC_I2C_VESTA_SCL
NC_I2C_VESTA_SDA
RDAC2 R15
XTALI_24
XTALO_24
140
SDC H1
SDA H2
IPD
138
Q63 PORT ALOCATION
FW_TPA_P<1>
FW_TPA_N<1>
FW_TPB_P<1>
FW_TPB_N<1>
FW_TPBIAS<2>
TPBIAS[2] H13
TPAP[2] G15
TPAN[2] G14
TPBP[2] H15
TPBN[2] H14
IPD
FW_CLK98M_PCLK
RD902
TPBIAS[1] J13
TPAP[1] J15
TPAN[1] J14
TPBP[1] K15
TPBN[1] K14
IPD
138
FW_TPA_P<0>
FW_TPA_N<0>
FW_TPB_P<0>
FW_TPB_N<0>
FW_TPBIAS<1>
IPD
IPD
138
TPBIAS[0] L13
TPAP[0] L15
TPAN[0] L14
TPBP[0] M15
TPBN[0] M14
IPD
22
5%
1/16W
MF-LF
402
FW_TPBIAS<0>
IPD
PLI_CTL[0]
PLI_CTL[1]
LPWR_1394
DS_ONLY_EN0
PWR_CLASS
FW_PINT
FW_LINKON
PLI_INT D13
PLI_LINK D14
IPD
8X4.5MM-SM
139
1K
5%
1/16W
MF-LF
402
24.576M
1K
1%
1/16W
MF-LF
402
PLI_PCLK E15
3 OF 3
IPD
Put crystal circuit close to PHY
5%
U1701
BIASGND
50V
1K
F11
TP_VESTA_TVCO_24
FW_PORT1_NOT
RD906
IPU
FW_PWR_CLASS_MSB
RD917 1
RD901
FW_PLUG_PRESENT2
FW_PLUG_PRESENT1
FW_DS_ONLY_P1_P2
RD907
E11
J3
ESDET[0]
1=PORTS 1 AND 2 DS ONLY
0=PARTS 1 AND 2 BI-LINGUAL
ESDET[1]
1=PORT 1 PRESENT
0=PORT 1 NOT PRESENT
ESDET[2]
1=PORT 2 PRESENT
0=PORT 2 NOT PRESENT
E12
24
139
FW_DATA_R<0>
FW_DATA_R<1>
FW_DATA_R<2>
FW_DATA_R<3>
FW_DATA_R<4>
FW_DATA_R<5>
FW_DATA_R<6>
FW_DATA_R<7>
FW_LOWPWR
22
5%
1/16W
MF-LF
402
FW_PORT2_NOT
VESTA FW
8
5%
1/16W
SM-LF
RD900
IPU
FW data pairs is 110 ohms.
138
SEE_TABLE
IPU
6
5%
1/16W
SM-LF
22
138
138
138
RPD901
138
5
5%
1/16W
SM-LF
138
8
5%
1/16W
SM-LF
RPD901
138
138
22
FW_DATA<3>
C
TP_VESTA_TDBL<0>
TP_VESTA_TDBL<1>
TP_VESTA_TDBL<2>
TDBL[0] A14
TDBL[1] B13
TDBL[2] B14
FBGA-200-LF
138
5%
1/16W
SM-LF
C12
FAVDDL
IPU=INTERNAL PULL-UP
VESTA-V1.3
If stuffed, adds external pull-down to

counter internal pull-up in Vesta.
P15
R13

- VESTA_DS_ONLY_EN0
R14
FW_CPS
FAVDDM
IPD=INTERNAL PULL-DOWN
N14
(NONE)
FAVDDH
P12
390K
- =PP1V2_ENETFW
XTALVDD2
- =PP3V3_ENETFW
BIASVDD2
PLLVDD2
- =PP3V3_FW
N15
- =PPFW_PHY
139 138
FW_PWR_CLASS_MSB - FIREWIRE POWER CLASS

139 138
SYNC_MASTER=Q63
FW_CTL<1>
FW_CTL<0>
1 - Sets Power Class to 0x4
NOSTUFF
0 - Sets Power Class to 0x0

(Internal Pull-up)
139 138
139 138
FW_CTL<1>
FW_CTL<0>
RD960
FW_DS_ONLY_P0 - PORT 0 DATA/STROBE
NOSTUFF
1 - Port 0 Data/Strobe mode only
RD962
0 - Port 0 Bilingual mode

139 132 17 7
NOSTUFF
1
RD963
150
150
1%
1/16W
MF-LF
402 2
1%
1/16W
MF-LF
402 2
NOSTUFF
1
RD961

150
150
1%
1/16W
MF-LF
402 2
1%
1/16W
MF-LF
402 2

SIZE
APPLE COMPUTER INC.
=PP3V3_ENETFW
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:05 2005
REV.
139
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
8
I401
I400
I402
I404
I403
I405
I407
I406
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
NET_TYPE
SPACING PHYSICAL
FW
FW
FW
FW
=PP12V_ALL_FW
DIFFERENTIAL_PAIR
DESIGNED WITH INTENTION TO RESIZE FUSE LIMITS EQUAL FW SPEC 1.5A LIMIT
FW_PORT0_TPA_P_FL
FW_PORT0_TPA_N_FL
FW_PORT0_TPB_P_FL
FW_PORT0_TPB_N_FL
FW_TPA0_FL
FW_TPA0_FL
FW_TPB0_FL
FW_TPB0_FL
FW_PORT1_TPA_P_FL
FW_PORT1_TPA_N_FL
FW_PORT1_TPB_P_FL
FW_PORT1_TPB_N_FL
FW_TPA1_FL
FW_TPA1_FL
FW_TPB1_FL
FW_TPB1_FL
140
8 WATTS MAX
12 VOLTS
140
140
1.3
20%
1W
FF
2512
140
140
CRITICAL
DE000
RE056
MURS320XXG
PP12V_FW
VOLTAGE=12V
MAKE_BASE=TRUE
FW_VP_R
MAKE_BASE=TRUE
VOLTAGE=24V
SMC
=PPFW_PHY
139
1.3
FE000
0.75AMP-13.2V
FW_VP
VOLTAGE=24V
20%
1W
FF
2512
I443
140
FE002
RE002
MINISMD-LF
1.5AMP-33V
PPFW_PORT0_VP
PPFW_PORT1_VP
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=24V
140
VOLTAGE=24V
SM-LF
POSSIBLE CURRENT SHARING SCENARIO

KCL = CABLE POWER + SYSTEM POWER = > 1.5 AMPS
CE009
0.1UF
140
10%
2 50V
X7R
603-1
TO FW CDS PIN (CABLE POWER DETECT)
140
FW_VP MAX IS 24V
D
"Snapback" & "Late VG" Protection
140
PP3V3_FW_ESD
DPE010
DPE010
BAV99DW-X-F
SOT-363
5
BAV99DW-X-F
SOT-363
2
CE010 1
0.001UF
CE011
0.001UF
10%
50V
CERM 2
402
Termination
LE010
10%
50V
CERM 2
402
FERR-160-OHM
1206-LF
Place close to FireWire PHY
FLE010
120-OHM
VOLTAGE=1.86V
139
139
FW_TPBIAS<1>
FW_TPBIAS<0>
PORT 0
1394A
2012
SYM_VER-1
VOLTAGE=1.86V
CE050
1UF
140
FW_PORT0_TPA_P
140
FW_PORT0_TPA_N
JE000
1UF
10%
2 6.3V
CERM
402
OMIT
CE060
10%
2 6.3V
CERM
402
UF01613-M33-4F
F-ST-TH
FLE011
120-OHM
140
FW_PORT0_TPA_P_FL
140
FW_PORT0_TPA_N_FL
TPO
(TPA+)
TPO#
(TPA-)
TPI
(TPB+)
TPI#
(TPB-)
2012
SYM_VER-1
RE0501
RE051 RE0601
56.2
56.2
1%
1/16W
MF-LF
402 2
139
139
139
139
RE061
56.2
1%
1/16W
MF-LF
2 402
140
FW_PORT0_TPB_P
56.2
1%
1/16W
MF-LF
402 2
1%
1/16W
MF-LF
2 402
140
FW_PORT0_TPB_N
139
139
139
140
FW_PORT0_TPB_P_FL
140
FW_PORT0_TPB_N_FL
PPFW_PORT0_VP_FL 1
FW_TPA_P<0>
FW_TPA_N<0>
FW_TPB_P<0>
FW_TPB_N<0>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FW_PORT0_TPA_P
FW_PORT0_TPA_N
FW_PORT0_TPB_P
FW_PORT0_TPB_N
140
140
PP3V3_FW_ESD
140
DPE011
DPE011
BAV99DW-X-F
BAV99DW-X-F
SOT-363
2
140
FW_TPA_P<1>
FW_TPA_N<1>
FW_TPB_P<1>
FW_TPB_N<1>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FW_PORT1_TPA_P
FW_PORT1_TPA_N
FW_PORT1_TPB_P
FW_PORT1_TPB_N
RE052
56.2
56.2
1%
1/16W
MF-LF
402 2
CE012 1
140
0.001UF
140
CE013
10%
50V
CERM 2
402
FW_VP MAX IS 24V

1
140
VOLTAGE=0V
CE016
1%
1/16W
MF-LF
2 402
CE054 1
270pF
5%
25V
CERM 2
402
VOLTAGE=0V
1/16W
MF-LF
2 402
140
RE054
4.99K CE064 1
1%
RE064
DPE020
1%
1/16W
MF-LF
2 402
5%
25V
CERM 2
402
DPE020
BAV99DW-X-F
SOT-363
2
CE020 1
0.001UF
10%
50V
CERM 2
402
BAV99DW-X-F
CE021
SOT-363
5
0.001UF
6
10%
50V
CERM 2
402
PPFW_PORT1_VP
1
4
FLE020
120-OHM
3rd TPA/TPB pair unused

FW_TPBIAS<2>
140
NC_FW_TPBIAS2
FW_PORT1_TPA_P
1206-LF
OMIT
4
2
MAKE_BASE=TRUE
NO_TEST=YES
139
FW_TPA_P<2>
NC_FW_TPA_P2
139
FW_TPA_N<2>
NC_FW_TPA_N2
140
FW_PORT1_TPA_N
MAKE_BASE=TRUE
NO_TEST=YES
FW_PORT1_TPA_P_FL
140
FW_PORT1_TPA_N_FL
140
FW_PORT1_TPB_P_FL
140
FW_PORT1_TPB_N_FL
PPFW_PORT1_VP_FL
VOLTAGE=24V
SYM_VER-1
FW_TPB2_PD
MAKE_BASE=TRUE
NO_TEST=YES
139
140
2012
140
FW_TPB_P<2>
F-ST-TH
FLE021
120-OHM
FW_PORT1_TPB_P
140
FW_PORT1_TPB_N
FW_TPB_N<2>
140
RE0701
PP3V3_FW_ESD
1K
5%
1/16W
MF-LF
402 2
DPE021
DPE021
BAV99DW-X-F
BAV99DW-X-F
SOT-363
2
6
CE022 1
0.001UF
10%
50V
CERM 2
402
ZHE090
CE023
10%
50V
CERM 2
402
=PP3V3_FW
LE090
RE090
1
215
PP3V3_FW_ESD
400-OHM-EMI
PP3V3_FW_ESD_F
VOLTAGE=3.3V
20%
16V
CERM 2
402
ZHE091
140
ZHE092
QTY
DESCRIPTION
CRITICAL
BOM OPTION
CRITICAL
17_INCH_LCD
GND_CHASSIS_FIREWIRE 7 140

TABLE_5_ITEM
514-0248
CON,1394A 7 DEGREES
JE000
514-0248
CON,1394A 7 DEGREES
JE001
CRITICAL
17_INCH_LCD
514-0251
CON,1394A 7 DEGREES
JE000
CRITICAL
20_INCH_LCD

TABLE_5_ITEM
ZHE093
DE090
SOT23
HOLE-VIA
TABLE_5_ITEM

TABLE_5_ITEM
10
TABLE_5_HEAD
PART#
HOLE-VIA
SM-1
402
[ LATE VG NOTES ]
CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V
IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP
VOLTAGE=3.3V
VGND
8
FIREWIRE CONNECTORS
HOLE-VIA
1%
1/16W
MF-LF
(TPB-)
0.01uF
(TPB+)
TPI#
514-0251 20_INCH_VERSION SHOWN
CE026
CALCULATION = 220 OHMS, THERES ALREADY A 215 IN THE DESIGN, SO IM USING 215 INSTEAD
(TPA-)
TPI
CE025
10%
50V
2 X7R
603-1
HOLE-VIA
ESD Rail
(TPA+)
0.1UF
0.001UF
TPO
TPO#
VP
SOT-363
5
JE001
UF01613-M33-4F
MAKE_BASE=TRUE
NO_TEST=YES
139
PORT 1
1394A
LE020
FERR-160-OHM
2012
SYM_VER-1
139
140
20%
16V
CERM 2
402
PP3V3_FW_ESD
4.99K
270pF
BZX84C2V7-X-F
514-0251
CON,1394A 7 DEGREES
JE001
CRITICAL
20_INCH_LCD
SIZE
APPLE COMPUTER INC.
SPARE GND VIAS FOR LAYER TRAVERSALS DURING ROUTING
DRAWING NUMBER
SCALE
REV.
051-6863
SHT
NONE
7 140
0.01uF
FW_TPA_C<1>
1
GND_CHASSIS_FIREWIRE
10%
2 50V
X7R
603-1
"Snapback" & "Late VG" Protection

FW_TPA_C<0>
514-0251 20_INCH_VERSION SHOWN
CE015
0.1UF
56.2
1%
1/16W
MF-LF
402 2
10
0.001UF
10%
50V
CERM 2
402
140
RE063
56.2
1%
1/16W
MF-LF
2 402
RE053 RE062
VGND
SOT-363
5
MAKE_BASE=TRUE
VP
VOLTAGE=24V
140
MAKE_BASE=TRUE
139
F
OF
140
154
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
DIFFERENTIAL_PAIR
USB2
USB2
USB2_S
USB2_S
USB2_0
USB2_0
USB2_P<0>
USB2_N<0>
USB2
USB2
USB2_S
USB2_S
USB2_1
USB2_1
USB2_P<1>
USB2_N<1>
USB2
USB2
USB2_S
USB2_S
USB2_2
USB2_2
USB2_P<2>
USB2_N<2>
USB2
USB2
USB2
USB2
USB2_3
USB2_3
USB2_P<3>
USB2_N<3>
USB2
USB2
USB2
USB2
USB2_4
USB2_4
USB2_P<4>
USB2_N<4>
142 143
142 143
142 143
142 143
Q63 USB PORT ALLOCATION

REAR USB
(PORT #0)
FRONT PANEL USB (PORT #1)
REAR USB
(PORT #2)
REAR USB
(PORT #3)
142 143
142 143
142 143
142 143
PP3V3_PWRON_NEC_AVDD
142 143
FERR-EMI-100-OHM
0.38mm SPACING
NEC_CLK30M_XT1
NEC_CLK30M_XT2
NEC_CLK30M_XT2_R
0.38mm SPACING
0.38mm SPACING
142
XWE200
OMIT
P4MM
SM
SM
142
TP_NEC_AVDD
PP
SM
142
CE235
CE236
10UF
0.1uF
0.1uF
10%
20%
20%
RE235
4.7
1
Page Notes
VOLTAGE=3.3V
LE235
142 143
145 144 142 7
=PP3V3_PWRON_USB
5%
1/10W
MF-LF
603
6.3V
10V
X5R
805
CERM
402
CE237
10V
CERM
402
PPE2000
MINIMIZE TRACE LENGTH OF CAPS FROM AVDD TO AVSS PINS

2
GND_NEC_AVSS_R
6 142
0.1uF
20%
10V
10V
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
N12
N10
D7
H4
G12
D13
F13
H13
CE225
20%
J13
0.1uF
10V
L13
CE224
20%
N8
0.1uF
10V
E2
CE223
20%
A3
0.1uF
10V
A12
CE222
20%
A13
0.1uF
6.3V
X5R
805
(NONE)
CE221
10%
36
Net Spacing Type: USB2

Line To Line:
CE226
0.50mm
Length Tolerance:
Primary Max Sep:
1.27mm
Secondary Length:
CE227
CE228
CE229
CE230
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
20%
20%
20%
20%
20%
10V
0.19mm
CERM
402
10V
CERM
402
10V
CERM
402
10V
10V
CERM
402
CERM
402
RE200
VDD
2
AVDD
10UF
P12
CE220
(NONE)
P2
P3
- =PP3V3_PWRON_USB
CRITICAL
RSDM1
DM1
DP1
RSDP1
M14 143
M13
L14
USB_NEC_N<0>
(USB2_P<0>)
FBGA-LF
SM
1
RE202
145 144 142 7
RE210
5%
1/16W
MF-LF
402
U2300
SHASTA
RPE210
143
NC3
NC4
R4
NC5
R6
NC6
NC7
R7
R3
R5
R8
NC8
T1
NC9
NC10
T2
NC11
T4
NC12
NC13
T5
NC14
NC15
T7
NC16
U1
NC17
NC18
U2
NC19
U4
NC20
NC21
U5
NC22
V1
NC23
NC24
V2
NC25
NC26
V4
NC27
W3
NC28
NC29
Y1
T3
T6
T8
U3
U6
V3
W1
Y3
143
143
6
6
K12
J14
2
1%
1/16W
MF-LF
402
USB_NEC_N<1>
(USB2_P<1>)
J12 143
PP
(USB2_OC<0>)
B12
(USB2_OC<1>)
B11
(USB2_OC<2>)
B10
(USB2_OC<3>)
A10
(USB2_OC<4>)
B9
OCI1
OCI2
OCI3
OCI4
OCI5
143
143
143
143
143
USB2_PWREN<0>
USB2_PWREN<1>
USB2_PWREN<2>
USB2_PWREN<3>
USB2_PWREN<4>
C12
A11
C11
C10
A9
1%
1/16W
MF-LF
402
PPE2001
RE204
36
1
RSDM3
DM3
DP3
RSDP3
6
6
36
P4MM
USB2_OC<0>
USB2_OC<1>
USB2_OC<2>
USB2_OC<3>
USB2_OC<4>
142 143
RE203
SM
142 143
USB_NEC_P<1>
5%
1/16W
SM-LF
2
USB2_N<1>
USB2_P<1>
(USB2_N<1>)
K14 143
10K
V1.1
BGA-LF
RSDM2
DM2
DP2
RSDP2
33K
P8
=PP3V3_PWRON_USB
TP_SB<0>
TP_SB<1>
TP_SB<2>
TP_SB<3>
TP_SB<4>
TP_SB<5>
TP_SB<6>
TP_SB<7>
TP_SB<8>
TP_SB<9>
TP_SB<10>
TP_SB<11>
TP_SB<12>
TP_SB<13>
TP_SB<14>
TP_SB<15>
TP_SB<16>
TP_SB<17>
TP_SB<18>
TP_SB<19>
TP_SB<20>
TP_SB<21>
TP_SB<22>
TP_SB<23>
TP_SB<24>
TP_SB<25>
TP_SB<26>
TP_SB<27>
TP_SB<28>
TP_SB<29>
36
PPE2002
NC1
NC2
1%
1/16W
MF-LF
402
P4MM
PP
P7
36
UC200
USB2 data pairs is 90 ohms.
NC0
142 143
RE201
NEC_UPD720101_USB2
(8 OF 8)
142 143
USB_NEC_P<0>
USB2_N<0>
USB2_P<0>
(USB2_N<0>)
K13 143
12.70mm
2
1%
1/16W
MF-LF
402
PPON1
PPON2
PPON3
PPON4
PPON5
H11 143
G11
G13
2
1%
1/16W
MF-LF
402
USB_NEC_N<2>
USB2_N<2>
USB2_P<2>
(USB2_N<2>)
(USB2_P<2>)
G14 143
142 143
142 143
USB_NEC_P<2>
RE205
36
40.2 OHM RESISTORS ON PORT 2 FOR EVALUATION
1%
1/16W
MF-LF
402
6
6
6
RE206
36
6
145 144 142 7
RSDM4
DM4
DP4
RSDP4
=PP3V3_PWRON_USB
6
6
6
6
RE240
1.5K
F14
E12
USB_NEC_N<3>
(USB2_P<3>)
142 143
RE207
RE241
36
1
2
1%
1/16W
MF-LF
402
NEC_NC1_PU
NEC_NC2_PU
142 143
USB_NEC_P<3>
5%
1/16W
MF-LF
2 402
B
USB2_N<3>
USB2_P<3>
(USB2_N<3>)
E14 143
1.5K
5%
1/16W
MF-LF
402 2
F12 143
1%
1/16W
MF-LF
402
P6
M6
NC1
NC2
RE208
36
6
6
RSDM5
DM5
DP5
RSDP5
142
142
NEC_CLK30M_XT1
NEC_CLK30M_XT2_R
2
L9
P8
XT1/SCLK
XT2
E13 143
D14
C13
1%
1/16W
MF-LF
402
USB_NEC_N<4>
USB2_N<4>
USB2_P<4>
(USB2_N<4>)
(USB2_P<4>)
C14 143
36
RE245
AVSS
AVSS(R)
RREF
NEC_CLK30M_XT2 142
30.0000M
1
1%
1/16W
MF-LF
402
N11
YE245
2
VSS
P11
NEC_RREF_PD
USB Host Interfaces

RE238 1
1%
1/16W
MF-LF
402 2
SM
M12
D8
F11
J11
XWE201
MINIMIZE TRACE LENGTH TO PINS

50V
CERM
402
GND_NEC_AVSS_R
OMIT
Tie to GND at ball N11
5%
2
G4
D12
H12
L12
M11
B13
N13
N2
B2
A2
B14
N1
H14
22pF
5%
50V
CERM
402
N14
22pF
CE246
B1
P10
9.09K
8X4.5MM-SM1
CE245
2
1%
1/16W
MF-LF
402
P13
BLUTOOTH CONNECTOR,(PORT #4)
142 143
RE209
1
100
CRITICAL
142 143
USB_NEC_P<4>
6 142
VOLTAGE=0V
SPEC SHOWS LOAD CAPACITANCE OF 16PF
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
051-6863
SCALE
SHT
NONE
1 13:46:07 2005
REV.
142
DRAWING
TITLE=KILOHANA
ABBREV=DRAWING
F
OF
154
Page Notes
FERR-250-OHM
0.75AMP-13.2V
7

- _PP5V_PWRON_USB
- _PP5V_PWRON_UDASH
- _PP3V3_PWRON_UDASH
- _PP3V3_PWRON_BT
External USB Ports
=PP5V_PWRON_BNDI
VOLTAGE=5V
2 PP5V_BNDI_LE340 1
MINISMD-LF
740S0509
CRITICAL
10UF
RE346
VOLTAGE=5V
PP5V_USB2_PORT1_F
VOLTAGE=5V
SM
NOSTUFF
1
CE310
0
805
1/8W
MF-LF
5%
CE313 1
0.01uF
144
0.01uF
20%
16V
CERM 2
402
JE310
20%
16V
CERM 2
402
142
USB2_PWREN<2>
142
142
USB2_PWREN<3>
USB2_PWREN<4>
142
USB2_P<0>
USB2_PORT1_P
MAKE_BASE=TRUE
F-ST-TH
5
USB2_PORT1_N_F
USB2_PORT1_P_F
NOSTUFF
2
3
4
RE313
0
CRITICAL
6
RE311
15K
5%
1/16W
MF-LF
402 2
UE300
IN_0
OUT_0
IN_1
OUT_1 7
EN*
OC*
5%
1/16W
MF-LF
2 402
153
143 7
USB2_HUB_P<3>
6
5
143
143
143
2012
143
7 143
24
143
CE322 1 CE323
0.01uF
11
12
13
14
16
RE355
0
4-14-05
PLACE CE343, CE344 & LE340
NEAR JE350 PIN 14 IN THE
ORDER LISTED, AND NOT ON
BOTH SIDES OF THE PIN.
OMIT
JE320
20%
16V
CERM 2
402
UB01123M23-4F
F-ST-TH
5
6
SYM_VER-1
1
USB2_PORT2_N
MAKE_BASE=TRUE
4
143
2
USB2_PORT2_P
MAKE_BASE=TRUE
USB2_P<1>
GND_BNDI
USB2_P_L<3>
USB2_N_L<3>
SB_GPIO14
PP5V_PWRON_BNDI
0.01uF
20%
16V
CERM 2
402
2012
142
10
GND_USB_PORT2
VOLTAGE=0V
LE322
120-OHM
USB2_N<1>
RE335
1
142
GND_CHASSIS_BNDI
USB2_HUB_P_L<2>
USB2_HUB_N_L<2>
NOSTUFF
USB2_HUB_N<3>
330UF
USB_OC
MAKE_BASE=TRUE
SYM_VER-2
PP5V_USB2_PORT2_F
VOLTAGE=5V
CE320
20%
2 6.3V
POLY
SMD
9
143
120-OHM
402
SM
NOSTUFF
143 7
LE352
1
2
402
LE320
AUD_MIC_IN_P_CONN
GND_AUDIO_MIC_CONN
AUD_MIC_IN_N_CONN
GND_CHASSIS_BNDI
NOSTUFF
RE354
FERR-250-OHM
805
1/8W
MF-LF
5%
USB2_OC<2>
RE342
402
144
142
USB2_HUB_N<2>
153
153
VOLTAGE=0
GND
142
NOSTUFF
15K
USB2_OC<1>
402
RE310
OUT_2
USB2_OC<0>
144
144
GND_CHASSIS_USB
1
M-RT-SM
15
SYM_VER-2
514-0247
NOSTUFF
=PP5V_PWRON_USB
142
USB HUB IMPLIMENTS 15K PULLDOWNS INTERNAL

SO THEY ARE NOT NEEDED HERE
402
SOI-LF
7
143
VDD
DD+
GND
RE312
TPS2024
JE350
53261-1498
2012
UB01123M23-4F
518S0324
120-OHM
FHB CONNECTOR
LE342
USB2_HUB_P<2>
OMIT
143
NOSTUFF
RE322
0
VDD
DD+
GND
USB2_PORT2_N_F
USB2_PORT2_P_F
2
3
4
SENDS NEC USB PORT 3 TO BLUETOOTH MODULE

121 USB_BT_P
MAKE_BASE=TRUE
121 USB_BT_N
MAKE_BASE=TRUE
PORT 2
142
USB2_PORT1_N
MAKE_BASE=TRUE
GND_CHASSIS_BNDI
402
CE312
143
NOTE: This design does not provide power

control on USB ports 2-4. Rename
USB controller outputs to indicate
single-pin connections.
USB2_PWREN<1>
USB2_N<0>
20%
16V
CERM 2
402
GND_USB_PORT1
VOLTAGE=0V
2012
142
143 7
0.01uF
RE343
LE312
120-OHM
neoBorg Implementation
CE343
0.01uF
1
2
143
20%
16V
CERM 2
402
SYM_VER-1
TP_USB2_PWREN<0>
MAKE_BASE=TRUE
TP_USB2_PWREN<1>
MAKE_BASE=TRUE
TP_USB2_PWREN<2>
MAKE_BASE=TRUE
TP_USB2_PWREN<3>
MAKE_BASE=TRUE
TP_USB2_PWREN<4>
MAKE_BASE=TRUE
CE342
RE336
1
GND_BNDI
VOLTAGE=0V
NOSTUFF
20%
2 6.3V
POLY
SMD2
NOTE: USB pairs are NOT constrained on

this page. It is assumed that the
USB Host Controller page will
provide the appropriate constraints
to apply to entire USB D+/D- XNets.
USB2_PWREN<0>
150UF

(NONE)
142
805
1/8W
MF-LF
5%
PORT 1
LE310
PP5V_USB2
143
VOLTAGE=5V
CE344
20%
10V
2 CERM
805-2
FERR-250-OHM
96
PP5V_PWRON_BNDI
2
SM

(NONE)
NOTE: This page is expected to contain the
necessary aliases to map the
USB pairs to their appropriate
destinations and/or to properly
terminate unused signals.
LE340
FE301
RE3501
USB2_P<3>
142
USB2_N<3>
142
RE351
15K
15K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
2 402
402
514-0247
NOSTUFF
RE323
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
514-0294
USB RECEPTACLE,4P,UB1123-M23B-4F
JE310,JE320,JE330
CRITICAL
17_INCH_LCD
514-0295
USB RECEPTACLE,4P,UB1123-M33B-4F
JE310,JE320,JE330
CRITICAL
20_INCH_LCD
TABLE_5_ITEM
GND_CHASSIS_USB
402
7 143
TABLE_5_ITEM
RE3201
15K
5%
1/16W
MF-LF
402 2
RE321
15K
5%
1/16W
MF-LF
2 402
SENDS NEC CONTROLLER PORT 4 TO USB HUB UPSTREAM PORT

USB2_HUB_P<0>
142 USB2_P<4>
144
MAKE_BASE=TRUE
USB2_HUB_N<0>
142 USB2_N<4>
144
MAKE_BASE=TRUE
LE330
FERR-250-OHM
1
PP5V_USB2_PORT3_F
VOLTAGE=5V
SM
RE3521
I602
I603
I604
I605
PROVIDED
BY
USB
CONTROLLER
I606
I607
I608
I609
I610
NET_SPACING_TYPE
USB2
USB2
USB2_PORT1_F
USB2_PORT1_F
USB2
USB2
USB2_PORT1_P_F
USB2_PORT1_N_F
USB2
USB2
USB2_PORT2_F
USB2_PORT2_F
USB2
USB2
USB2_PORT2_P_F
USB2_PORT2_N_F
USB2
USB2
USB2
USB2
USB2
USB2
USB2_PORT3_F
USB2_PORT3_F
USB2_HUB_F
USB2
USB2
USB2
USB2
USB2
USB2
USB2_PORT3_P_F
USB2_PORT3_N_F
USB2_HUB_P_L<2>
USB2_HUB_N_L<2>
USB2_P_L<3>
USB2_N_L<3>
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB2
I615
I616
I619
I620
I621
I622
I623
I624
I625
NET_PHYSICAL_TYPE
I611
I618
DIFFERENTIAL_PAIR
USB2_HUB_F
USB2_BNDI_F
USB2_BNDI_F
USB2_0_IC
USB2_0_IC
USB2_1_IC
USB2_1_IC
USB2_2_IC
USB2_2_IC
USB2_3_IC
USB2_3_IC
USB2_4_IC
USB2_4_IC
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB_NEC_P<0>
USB_NEC_N<0>
USB_NEC_P<1>
USB_NEC_N<1>
USB_NEC_P<2>
USB_NEC_N<2>
USB_NEC_P<3>
USB_NEC_N<3>
USB_NEC_P<4>
USB_NEC_N<4>
143
GND_USB_PORT3
VOLTAGE=0V
805
1/8W
MF-LF
5%
143
CE332
0.01uF
143
20%
16V
CERM 2
402
143
CE333 1
143
USB2_N<2>
142
USB2_P<2>
143
143
1
USB2_PORT3_N
MAKE_BASE=TRUE
143
USB2_PORT3_N_F
2
USB2_PORT3_P
MAKE_BASE=TRUE
143
USB2_PORT3_P_F
142
VDD
DD+
GND
NOSTUFF
142
RE332
142
142
RE333
142
142
142
RE3301
15K
5%
1/16W
MF-LF
402 2
RE331
2
3
4
USB Device Interfaces

GND_CHASSIS_USB
514-0247
NOSTUFF
142
402
142
142
F-ST-TH
5
6
143
5%
1/16W
MF-LF
2 402
UB01123M23-4F
SYM_VER-1
142
15K
JE330
20%
16V
CERM 2
402
2012
143
RE353
5%
1/16W
MF-LF
402 2
OMIT
0.01uF
LE332
120-OHM
143
15K
PORT 3
RE334

7 143
402
15K
5%
1/16W
MF-LF
2 402
SIZE
APPLE COMPUTER INC.
DUE TO THESE NETS ARE ON A Q63 SHARED PAGE 124,

THESE PROPERTIES FOR M23/M33 WERE PLACED ON THIS PAGE.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
143
154
CARD_READER
RE400
TABLE_5_HEAD
DESCRIPTION
CRITICAL
BOM OPTION
PP3V3_CARD_READER_VDDA VOLTAGE=3.3V 1
MIN_LINE_WIDTH=.38 MM
CARD_READER
MIN_NECK_WIDTH=.2 MM
TABLE_5_ITEM
USX2006-NU-01 CUSTOM MASK
UE400
CRITICAL
CARD_READER
CE405
0.1UF
0.1UF
4.7UF
20%
10V
2 CERM
402
20%
2 6.3V
CERM
805
20%
2 6.3V
CERM
603
=PP3V3_PWRON_USB
=PP3V3_PWRON_USB
7 142 144 145
CARD_READER
20%
2 6.3V
CERM
805
VDDA33
1
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
ACTIVE HIGH
USB_HUB_PRTPWR_POL 18 PRTPWR_POL
GANGED POWER
5%
1/16W
MF-LF
2 402
20
USB_HUB_GANG_EN
SELF POWERED
INTERNAL DEFAULTS
28 SELF_PWR
USB_HUB_CFG_SEL1
27
37
CE425
0.1UF
RE410
10K
RE411
RE425
5%
1/16W
MF-LF
2 402
20%
2 10V
CERM
402
1M
5%
1/16W
MF-LF
402
USB_HUB_CLKIN_EN
35
144
XTAL_IN_USB_HUB
43
144
XTAL_OUT_USB_HUB
42
144
USB_HUB_ATEST
46
144
USB_HUB_VBUS_DET
29
143
USB2_HUB_P<0>
USB2_HUB_N<0>
143
5%
1/16W
MF-LF
402
YE401
24.000M
1
144
CRYSTAL IS 60PP INCLUDING AGING

NEED TO CHECK LOADING
CRYTAL LOADING IS 16PF
XTAL_OUT_USB_HUB_R
5X3.2X1.2-SM
25
CRITICAL
1
CE426
22PF
CE427
INTERNAL DEFAULTS
USB_HUB_CFG_SEL0
22PF
5%
50V
2 CERM
402
39
44
RE417
CRITICAL
GANG_EN
USB_HUB_SELF_PWR
USB_HUB_RESET_L
EXTERNAL CRYSTAL
USBDP1
USBDN1 5
OCS1* 34
21
GR1/NON_REM0
PRTPWR1 33
5%
1/16W
MF-LF
2 402
RE412
10K
5%
1/16W
MF-LF
2 402
=PP3V3_PWRON_USB
145 144 142 7
RESET*
8
USBDP2
9
USBDN2
32
OCS2*
19
GR2/NON_REM1
16
PRTPWR2
CLKIN_EN
XTAL1/CLKIN
XTAL2
USB_HUB_NON_REM1
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
12
USBDP3
USBDN3 11
15
OCS3*
17
GR3/PRT_DIS0
14
PRTPWR3
VBUS_DET
USBDP0
USBDN0
SDA/SMBDATA
USB2_HUB_P<3> 143 144

USB2_HUB_N<3> 143 144
USB_HUB_PRT_DIS0
NOSTUFF
1
RE418 1RE419
PORT 3 ENABLED
26 SCL/SMBCLK/CFG_SEL0
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
=PP3V3_PWRON_USB
THRML_PAD
RE413
12.1K
RE426
1%
1/16W
MF-LF
2 402
100K
CARD_READER
RE450
0
SD_DET
SD_DET_RC
NOSTUFF
CE450 1
0.1UF
20%
10V
CERM 2
402
7 142 144 145
144
RE401
1CARD_READER
10K
5%
1/16W
MF-LF
2 402
NET_PHYSICAL_TYPE
RE435
RE433
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
CARD_READER_ACTIVITY114
CARD_READER_EE_CS
113
CARD_READER
CARD_READER_VBUS_DETECT
94
CARD_READER_EE_DIO
10K 2
111
144
1
SD_DET_R
110
5%
1/16W
109
SD DETECT ACTIVE LOW
MF-LF
3 AT SMSC
402
107
144 CARD_READER_EE_CLK
NOSTUFF
D
42
2N7002
105
145 CF_PS
SOT23-LF
1 G
S
79
44
145 144 SD_PWR
2
CARD_READER
93
CARD_READER
1
1
92
0.1UF
10K
20%
91
5%
10V
1/16W
2 CERM
90
MF-LF
402
144
144
RE427
QE000
CE430
RE422 RE423
100K
NET_SPACING_TYPE
17
14
13
1 CARD_READER
100K
5%
1/16W
MF-LF
2 402
1CARD_READER
5%
1/16W
MF-LF
2 402
DIFFERENTIAL_PAIR
2 402
CARD_READER_RESET_L
144
IN
144
IN
144 143
IN
144 143
IN
144
143
144 143
USB2
USB2
USB2
USB2
USB2
USB2
0.38MM SPACING
0.38MM SPACING
0.38MM SPACING
IN
IN
144
IN
144
IN
144
IN
144
IN
144
IN
144
IN
USB2
USB2
USB2
USB2
USB2
USB2
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
32
33
34
35
36
37
38
39
40
41
45
46
48
50
51
52
CF_D<0>
CF_D<1>
CF_D<2>
CF_D<3>
CF_D<4>
CF_D<5>
CF_D<6>
CF_D<7>
CF_D<8>
CF_D<9>
CF_D<10>
CF_D<11>
CF_D<12>
CF_D<13>
CF_D<14>
CF_D<15>
CF_NCS0
CF_NCS1
60
61
CF_CS_L<0>
CF_CS_L<1>
CF_SA0
CF_SA1
CF_SA2
62
63
64
CF_SA<0>
CF_SA<1>
CF_SA<2>
CF_NIOR*
CF_NIOW*
CF_IRQ
CF_NRESET*
CF_IORDY
CF_NCD1*
CF_NCD2*
57
58
55
59
56
53
54
CF_IOR_L
CF_IOW_L
CF_IRQ
CF_RESET_L
CF_IORDY
CF_CD_L<1>
CF_CD_L<2>
SM_D0
SM_D1
SM_D2
SM_D3
SM_D4
SM_D5
SM_D6
SM_D7
65
66
67
68
69
70
71
72
USB2227
VTQFP
USB2_HUB_1
USB2_HUB_1
USB2_HUB_2
USB2_HUB_2
USB2_HUB_3
USB2_HUB_3
USB2_HUB_P<1>
USB2_HUB_N<1>
USB2_HUB_P<2>
USB2_HUB_N<2>
USB2_HUB_P<3>
USB2_HUB_N<3>
XTAL_IN_CARD_READER
XTAL_OUT_CARD_READER
XTAL_OUT_CARD_READER_R
CE410
CARD_READER_TEST_N0_L
CARD_READER_TEST_N1_L
0.1UF
20%
10V
2 CERM
402
144
144
96
95
XTAL_IN_CARD_READER 102
XTAL_OUT_CARD_READER 103
RE424
CARD_READER
RE403
XTAL_IN_USB_HUB
XTAL_OUT_USB_HUB
XTAL_OUT_USB_HUB_R
DEVELOPMENT
1
RE434
330
5%
1/16W
MF-LF
2 402
1M
GPIO1
GPIO2
GPIO3
SM_CLE
GPIO4
SM_NRE*
GPIO5
SM_NWE*
GPIO6/ROMEN
SM_NWP*
GPIO7
SM_NB/R*
GPIO8/CRD_PWR0
SM_NCE*
GPIO9
SM_NCD*
GPIO10/CRD_PWR1
SM_ALE
GPIO11/CRD_PWR2
SM_NWPS*
GPIO12
GPIO13
MS_D0/MS_SDIO
GPIO14
MS_D1
GPIO15
MS_D2
MS_D3
RESET_N*
MS_BS
TEST_N0*
TEST_N1*
CARD_READER
CARD_READER
YE400
CRYSTAL IS 60PPM INCLUDING AGING

CRITICAL 24.000M
1
2
144
CRYSTAL LOADING IS 16PF

NEED TO CHECK LOADING CAPS
MS_SCLK
MS_INS
XTAL1/CLKIN
XTAL2
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
CE401
0.1UF
20%
10V
2 CERM
402
145
145
145
145
145
145
145
145
145
145
145
145
145
145
145
145
75
81
82
74
77
83
78
73
76
CARD_READER_ACTIVITY_R
22PF
5%
2 50V
CERM
402
1 DEVELOPMENT
LEDE400
GREEN-3.6MCD
145
145
145
145
145
145
145
145
145
145
145
7 142 144 145
NOSTUFF
1
CE431
0.1UF
20%
2 10V
CERM
402
6
144
144
CARD_READER_EE_CS 1
CARD_READER_EE_CLK 2
NOSTUFF
VCC
UE402
93LC56A
SOI
ORG*/NC DI
CS CRITICAL DO
CLK
NC
VSS
3
4
CARD_READER_EE_DIO
CR_EE_DO NOSTUFF
144
RE431
330
5%
1/16W
MF-LF
402
19
20
21
22
SD_PWR
145 144
24
NOSTUFF
23
18
RE421
10K
NOSTUFF
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
26
27
28
29
SD_D<0>
SD_D<1>
SD_D<2>
SD_D<3>
SD_CLK
SD_NWP*
SD_CMD
31
25
30
SD_CLK_R
SD_WP_L
SD_CMD
145
145
145
145
1CARD_READER 1
5%
1/16W
MF-LF
2 402
CARD_READER
RE428 RE429 RE420

10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
33
5%
1/16W
MF-LF
402
145
SD_CLK
CE429
10PF
5%
50V
2 CERM
402
145
Flash Media Ctrl
CARD_READER
CE412
22PF
5%
50V
2 CERM
402
2.0X1.25MM-SM
2

VSS
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6863
D
SCALE
145
CARD_READER
XTAL_OUT_CARD_READER_R
5X3.2X1.2-SM
CE411
145
=PP3V3_PWRON_USB
CARD_READER
115
NMCE*
NMWR*
NMRD*
CARD_READER
CARD_READER_ACTIVITY 144
0.38MM SPACING
0.38MM SPACING
0.38MM SPACING
MA0/CLK_SEL0
MA1/CLK_SEL1
MA2/SEL_CLKDRV
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
7 142 144 145
NOSTUFF
1CARD_READER
5%
1/16W
MF-LF
402
USB_HUB_VBUS_DET
5
6
7
8
9
10
11
12
116
117
118
119
120
121
122
123
124
125
126
127
128
1
2
4
ATEST/REG_EN
=PP3V3_PWRON_USB
1.8V INTERNAL REGULATOR ENABLED
USB_HUB_ATEST 144
DATA SHEET SAYS 12.0K 1%
HIGH = PORT 2 AND 3 NON-REMOVABLE

LOW = PORT 2 AND 3 REMOVABLE
RE415
10K
5%
1/16W
MF-LF
2 402
USB2_HUB_P<2> 143 144

USB2_HUB_N<2> 143 144
145
10K
USBDM
USBDP
RBIAS
ATEST
VDD18
CF_D0
CF_D1
CF_D2
CF_D3
CF_D4
CF_D5
CF_D6
CF_D7
CF_D8
CF_D9
CF_D10
CF_D11
CF_D12
CF_D13
CF_D14
CF_D15
VDD33
OMIT
CARD_READER
20%
6.3V
2 CERM
603
CFG_SEL1
RE414
1%
1/16W
MF-LF
2 402
10K
HIGH = PORT 1 NON-REMOVABLE
=PP3V3_PWRON_USB
12.1K
USB_HUB_NON_REM0
DATA SHEET SAYS 12.0K 1%

144 142 7
145
87
88
98
99
CE400
4.7UF
UE400
CARD_READER
7 142 144 145
RE432
VSS
1
144
10K
USB2_HUB_P<1> 144
USB2_HUB_N<1> 144
USB_HUB_RBIAS 47 RBIAS
5%
50V
2 CERM
402
USB2_HUB_N<1>
USB2_HUB_P<1>
CARD_READER_RBIAS
CARD_READER_ATEST
144
RE402
49
100K
=PP3V3_PWRON_USB
USB2503
48
RE409
5%
1/16W
MF-LF
2 402
20%
10V
2 CERM
402
UE401
38
41
2.2K
0.1UF
QFN
CARD_READER
SD INTERFACE
10K
4.7UF
20%
6.3V
2 CERM
805
CARD_READER
104 VSSPLL
86 VSSA
10K
30
7 142 144
145
10K
20%
10V
2 CERM
402
RE430
CE424
VDD18 VDDA33PLL VDD33CR

VDDA18PLL
TEST PINS SET XNOR

TP_USB_HUB_TEST<0> 24 TEST0
TP_USB_HUB_TEST<1> 36 TEST1
=PP3V3_PWRON_USB
10K
45
=PP3V3_PWRON_USB
RE404 1RE405 1RE406 1RE407
CE423
0.1UF
1
7
20%
2 16V
CERM
402
10
22
145 144 142 7
CARD_READER
4.7UF
31
40
20%
2 10V
CERM
402
20%
2 10V
CERM
402
0.01UF
23
0.1UF
CE422
13
0.1UF
CE404
CE409
4.7UF
CE419 1 CE420 1 CE421
0.1UF
20%
10V
2 CERM
402
7 142 144 145
CARD_READER
PP1V8_CARD_READER_PLL
VOLTAGE=1.8V
145 144 142 7
CE403
PP1V8_CARD_READER_INTERNAL
VOLTAGE=1.8V
CE418
4.7UF
20%
6.3V
2 CERM
805
CARD_READER
49
106
=PP3V3_PWRON_USB
CE416
20%
10V
2 CERM
402
COMPACTFLASH
INTERFACE
20%
10V
2 CERM
402
20%
10V
2 CERM
402
0.1UF
CE402
0.1UF
20%
6.3V
2 CERM
805
SMARTMEDIA
INTERFACE
145 144 142 7
0.1UF
CARD_READER
MEMORY
STICK
INTERFACE
CE414 1 CE415
4.7UF
=PP3V3_PWRON_USB
MEMORY/IO
INTERFACE
0.1UF
CE407
MISC
CE413
CARD_READER
PP1V8_USB_HUB_PLL_INTERNAL
VOLTAGE=1.8V
15
16
47
84
85
97
112
CE406
20%
10V
2 CERM
402
20%
10V
2 CERM
402
PP1V8_USB_HUB_VDD_INTERNAL
VOLTAGE=1.8V
5%
1/16W
MF-LF
402
3
43
80
108
100
USB
INTERFACE
338S0257
101
89
QTY
VDD18PLL
VDDA33
PART#
OF
144
F
154
IF USING THE CARD READER, MUST CHANGE THESE BOM OPTIONS TO:
TABLE_5_HEAD
CRITICAL
BOM OPTION
512S0010
PART#
QTY
1
DESCRIPTION
CONN, MEDIA CARD M23
JE500
CRITICAL
CARD_READER
512S0012
CONN, MEDIA CARD M33
JE500
CRITICAL
CARD_READER
TABLE_5_ITEM
17_INCH_LCD
TABLE_5_ITEM
144 142 7
20_INCH_LCD
=PP3V3_PWRON_USB
CARD_READER
QE500
2
CARD_READER
NTR4101P
RE500
SOT-23
CF_PS_R
100K 2
G
NOSTUFF
CE500
20%
10V
2 CERM
402
144
0.1UF
144
CF_PWR
VOLTAGE=3.3V
CARD_READER
1
SD_PWR
CARD_READER
CE501 1 CE502
0.1UF
0.1UF
20%
2 10V
CERM
402
OMIT
CF_PS
5%
1/16W
MF-LF
402
20%
2 10V
CERM
402
JE500
WRITE PROTECT AND CARD DETECT SWITCHES
CARD-READER-2IN1
F-ST-SM
144
144
144
144
144
144
144
CF_CD_L<1>
CF_D<11>
CF_D<12>
CF_D<13>
CF_D<14>
CF_D<15>
CF_CS_L<1>
144
CF_IOR_L
CF_IOW_L
144
CF_IRQ
144
144
144
144
144
144
CF_RESET_L
CF_IORDY
CF1 1
CF2 2
CF3 3
29 CF29
30 CF30
31 CF31
CF4 4
CF5 5
CF6 6
32 CF32
33 CF33
34 CF34
CF7 7
CF8 8
CF9 9
35 CF35
36 CF36
37 CF37
CF10 10
CF11 11
CF12 12
38 CF38
39 CF39
40 CF40
CF13 13
CF14 14
41 CF41
42 CF42
43 CF43
44 CF44
45 CF45
CF_D<8>
CF_D<9>
CF_D<10>
NC
NC
NC
NC
26 CF26
27 CF27
28 CF28
CF_D<3>
CF_D<4>
CF_D<5>
CF_D<6>
CF_D<7>
CF_CS_L<0>
144
CARD STATUS
WRITE PROTECT
WRITE ENABLE
CARD DETECT
NOT INSERTED
OPEN
OPEN
OPEN
FULLY INSERTED
OPEN
CLOSE
CLOSE
144
144
144
144
CF15 15
CF16 16
CF17 17
46 CF46
47 CF47
48 CF48
CF21 21
CF22 22
CF23 23
CF_SA<2>
CF_SA<1>
CF_SA<0>
CF_D<0>
CF_D<1>
CF_D<2>
49 CF49
50 CF50
CF24 24
CF25 25
CF_CD_L<2>
63 SHLD1
64 SHLD2
65 SHLD3
66 SHLD4
144
CF18 18
CF19 19
CF20 20
SD9 51
SD1 52
SD2 53
SD3 54
SD4 55
SD5 56
SD6 57
SD7 58
SD8 59
SD_CD_SW 60
SD_COMMON 61
SD_WP_SW 62
SD_D<2>
SD_D<3>
SD_CMD
SD_CLK
SD_D<0>
SD_D<1>
SD_DET
SD_WP_L
144
144
144
144
144
144
144
144
144
144
144
144
144
144
144
Flash Connector

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
145
F
154
AUDIO CODEC
APPLE P/N 353S0933
154 153 152 7
VOLTAGE=3.3V
LE700
VOLTAGE=3.3V
1000-OHM-200MA
1
=PP3V3_AUDIO
VOLTAGE=4.5V
PPV_3V3_AUDIO_CODEC
PP4V5_AUDIO_ANALOG
148 154
0603
CRITICAL
CE700
1
1
CRITICAL
CE701
1UF
10UF
CE703
1UF
10%
2 10V
CERM
805
10%
2 10V
CERM
805
31
23
16
CRITICAL
1UF
10%
2 10V
CERM
805
10%
6.3V
X5R 2
805
CRITICAL
CE702
GND_AUDIO_CODEC
6 147 148 150 154
VCC
VDD
UE700
C
24
I2S0_SB_TO_DEV_DTO
19
18
PCM3052A
VQFN
VINL
BCK
VINR
LRCK
DOUT
VOUTL
DOUTS
VOUTR
DIN
VCOM
I2CEN
VREF1
ADR
VREF2
L/M#
SCL
REFO
SDA
PDWN*
11
10
AUDI2S0OUT
AUDSPDIFOUT
13
14
12
21
NC 20
39
I2C_AUDIO_SCL
I2C_AUDIO_SDA
24
I2S0_RESET_L
39
154
AUD_CODEC_MCLK
17
RE700
I2S0_DEV_TO_SB_DTI
RE701
4.7K
5%
1/16W
MF-LF
2 402
AUD_SPDIF_OUT
SCKI
ATEST
AGND
33
AUD_CODEC_IN_L 148
AUD_CODEC_IN_R 148
6
25
24
AUD_CODEC_OUT_L
AUD_CODEC_OUT_R
26
4
5
AUD_PCM_VCOM
AUD_CODEC_LI_SHDN_L
AUD_PSEUDO_VREF
32
27
28
29
1
CE704
0.1UF
10%
2 50V
X7R
603-1
CRITICAL
1
CE706
10UF
20%
2 16V
ELEC
4X5.5-SM
CRITICAL
1
CRITICAL
CE708
10UF
CE710
10UF
20%
2 16V
ELEC
4X5.5-SM
20%
2 16V
ELEC
4X5.5-SM
CRITICAL
CRITICAL
CRITICAL
CE705 1
CE707 1
CE709 1
CE711 1
10%
50V
X7R 2
603-1
10%
50V
X7R 2
603-1
10%
50V
X7R 2
603-1
10%
50V
X7R 2
603-1
5%
1/16W
MF-LF
402
154 150 148 147 6
150 152
152
148
148
AUD_PCM_MBIAS 154
AUD_MICIN_N 154
AUD_MICIN_P 154
0.1UF
150 152
AUD_PCM_REF1
AUD_PCM_REF2
CRITICAL
RE702
CRITICAL
DGND
5%
1/16W
MF-LF
402
153
NC
15
24
33
MBIAS
MINM
MINP
24
I2S0_BITCLK
I2S0_SYNC
22
30
24
0.1UF
0.1UF
CRITICAL
1
CE712
10UF
20%
2 16V
ELEC
4X5.5-SM
0.1UF
GND_AUDIO_CODEC
VOLTAGE=0V
AUDIO: CODEC
SYNC_MASTER=FINO-SO

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
147
154
LINE IN PSEUDO-DIFFERENTIAL AMP

AV= 0.49
D
NOSTUFF
CE803
47PF
154 148 147
PP4V5_AUDIO_ANALOG
CRITICAL
CE800
RE804
10UF
153
AUD_LI_L
AUD_LI_L1
47K
5%
1/16W
MF-LF
402 2
RE803
0.47UF
100K
CRITICAL
RE800
165
AUD_LI_GNDL1
20.5K2
148 147
SOT-363
2
V+
UE800
MAX4253EUB
UMAX
1
AUD_CODEC_IN_L 147
V-
APPLE P/N 353S0642
AUD_LI_VREFL
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
2 402
BAV99DW-X-F
1%
1/16W
MF-LF
402
RE805
20%
16V
ELEC
4X5.5-SM
10
2
10UF
AUD_LI_GND
10K
DE800
1
20%
10V
CERM 2
603
1%
1/16W
MF-LF
2 402
CE801
153 148
AUD_LI_L2
CRITICAL
CE802
RE802
RE807
20.5K2
1%
1/16W
MF-LF
402
20%
16V
ELEC
4X5.5-SM
5%
50V
CERM
402
RE806
AUD_PSEUDO_VREF
10K
1%
1/16W
MF-LF
402
154 150 148 147 6
GND_AUDIO_CODEC
NOSTUFF
RE801
147
AUD_CODEC_LI_SHDN_L
AUD_CODEC_LI_SHDN_L1
5%
1/16W
MF-LF
402
NOSTUFF
CE806
47PF
154 148 147
PP4V5_AUDIO_ANALOG
CRITICAL
CE804
RE809
10UF
153
AUD_LI_R
AUD_LI_R1
20.5K2
RE812
1
AUD_LI_R2
1%
1/16W
MF-LF
402
20%
16V
ELEC
4X5.5-SM
CRITICAL
DE800
RE808
1%
1/16W
MF-LF
2 402
V+
UE800
MAX4253EUB
UMAX
AUD_CODEC_IN_R 147
V-
APPLE P/N 353S0642
RE810
10UF
2
CE805
10K
1%
1/16W
MF-LF
402
9
3
CRITICAL
AUD_LI_GND
SOT-363
5
100K
153 148
10
BAV99DW-X-F
5%
50V
CERM
402
AUD_LI_GNDR1
20.5K2
AUD_LI_VREFR
1%
1/16W
MF-LF
402
20%
16V
ELEC
4X5.5-SM
RE811
148 147
AUD_PSEUDO_VREF
10K
1%
1/16W
MF-LF
402
154 150 148 147 6
GND_AUDIO_CODEC
AUDIO: LINE INPUT AMP
SYNC_MASTER=FINO-SO

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
148
154
LINE OUT LOW-PASS FILTER

FC = 37 KHZ, HO = -1.4
RF001
14.0K2
1%
1/16W
MF-LF
402
CRITICAL
CRITICAL
CF000
RF000
10UF
152 147
AUD_CODEC_OUT_L
AUDCODECOUTL
10K
1%
1/16W
MF-LF
402
20%
16V
ELEC
4X5.5-SM
270PF
3.92K2
AUDCODECOUTL1
CF001
RF002
1%
1/16W
MF-LF
402
AUD_LOAMP_OUT_L
150
5%
50V
CERM
603
AUD_LOAMP_IN_L_M 150
CRITICAL
1
CF002
1.5NF
5%
25V
2 CERM
0603
153
RF003
14.0K2
AUD_LO_GND_PRB
AUD_LOAMP_IN_L_P 150
1%
1/16W
MF-LF
402
RF004
10K
1%
1/16W
MF-LF
2 402
LINE OUT
GROUND NOISE
CANCELLATION
RF005
10K
MIN_LINE_WIDTH=1MM
154 150 148 147 6
1%
1/16W
MF-LF
2 402
RF006
GND_AUDIO_CODEC
14.0K2
AUD_LOAMP_IN_R_P 150
1%
1/16W
MF-LF
402
CRITICAL
CF004
1.5NF
5%
25V
2 CERM
0603
CRITICAL
CF003
RF007
10UF
152 147
AUD_CODEC_OUT_R
AUDCODECOUTR
10K
CF005
270PF
3.92K2
AUDCODECOUTR1
1%
1/16W
MF-LF
402
20%
16V
ELEC
4X5.5-SM
CRITICAL
RF008
C
AUD_LOAMP_IN_R_M 150
1%
1/16W
MF-LF
402
AUD_LOAMP_OUT_R
150
5%
50V
CERM
603
RF009
14.0K2
1%
1/16W
MF-LF
402
LINE OUT AMP

APPLE P/N 353S0687
154 153 7
VOLTAGE=5V
PP5V_AUDIO_ANALOG
VOLTAGE=5V
PP5V_AUDIO_LOAMP
RF010
1
4.7
5%
1/10W
MF-LF
603
CRITICAL
1
CF006
10UF
CF007
20%
2 16V
ELEC
4X5.5-SM
CRITICAL
1
GND_AUD_LOAMP_CHGPMP 6 150
154
10UF
10%
6.3V
X5R 2
805
154 150 148 147 6
5%
1/16W
MF-LF
402
CF012 1
5%
1/16W
MF-LF
402 2
18K
100PF
AUDIO_LO_MUTE_L_F
CF013
13
PVDD
VDDR
VDDL
SHDN*
VSS
C1P 2
C1N 4
11
4.7K
16
RF016
AUDIO_LO_MUTE_L
RF0151
ROUT 10
PVSS
8
7
AUD_LOAMP_IN_R_M
AUD_LOAMP_IN_R_P
TO GPIO 38
24
RINRIN+
MAX9722AETE
QFN
0.1UF
5%
50V
CERM 2
402
NC 17
RF012
1
CF008
1UF
14
153
AUD_LO_R
153
1%
1/8W
MF-LF
805
AUD_MAX9722_C1P
1
AUD_LO_L
1%
1/8W
MF-LF
805
CF009
AUD_LOAMP_OUT_R
150
1UF
10%
10V
2 CERM
805
10%
10V
2 CERM
805
AUD_MAX9722_C1N
RF017
1K
1%
1/16W
MF-LF
2 402
RF018
1K
1%
1/16W
MF-LF
2 402
AUDIO: LINE OUT AMP
AUD_MAX9722_PVSS
CRITICAL
CF010
154 6
14
20%
10V
CERM 2
402
GND_AUDIO_CODEC
154 150 6
150
RF011
1
LOUT 12
SGND
150
AUD_LOAMP_OUT_L
UF000
LINLIN+
150
14
15
AUD_LOAMP_IN_L_M
AUD_LOAMP_IN_L_P
PGND
150
150
154 150 6
CRITICAL
CF011

10UF
10%
10V
CERM 2
805
CRITICAL
1UF
VOLTAGE=0V
SYNC_MASTER=FINO-SO
20%
1 16V
ELEC
4X5.5-SM
VOLTAGE=0V

RF013
1
GND_AUD_LOAMP
AUD_LO_GND
153
SIZE
5%
1/8W
MF-LF
805
VOLTAGE=0V
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
150 154
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
MIN_LINE_WIDTH=1MM
VOLTAGE=12V
FERR-250-OHM
1
PP12V_AUDIO_SPKRAMP
APPLE P/N 353S0680
PP12V_AUD_SPKRAMP_PLANE
SM-1
CF217 1
CF200 1
20%
16V 2
ELEC
6.3X8-SM
20%
16V 2
ELEC
6.3X8-SM
220UF
CRITICAL
LF205
AUDSAMPINLN
AUD_PCM_VCOM
CRITICAL
LF207
CF206
1000-OHM-200MA
0.47UF
1
AUDSAMPINRP
0603
152
10%
16V
X7R
805
CRITICAL
CF216
152
100PF
1000-OHM-200MA
1
AUD_CODEC_OUT_R
152
5%
50V
2 CERM
402
LF208
152
CF207
1
AUDSAMPINRN
0603
=PP3V3_AUDIO
10K
2 AUDIO_SPKR_MUTE_L_INV
1%
1/16W
MF-LF
402
TIE TO GPIO 40
24
AUDIO_SPKR_MUTE_L
47K
AUDIO_SPKR_MUTE_L_F
5%
1/16W
MF-LF
402
RF2121
4.7K
CF220 1
CF221 1
100PF
100PF
5%
1/16W
MF-LF
402 2
5%
50V
CERM 2
402
SOT-363
AUD_SAMP_INR_P
16 INR+
AUD_SAMP_INR_N
15 INR-
AUD_SAMP_G1
AUD_SAMP_G2
17 G1
18 G2
AUD_SAMP_FS1
AUD_SAMP_FS2
19 FS1
20 FS2
NC
CF203
10UF
10%
16V
2 CERM
1210
6 152 154
LF201
180-OHM-1.5A
1
AUD_SPKR_OUTL_P
153
0603
OUTL- 29
OUTL- 30
UF200
C1+ 6
AUDSAMPCPP
C1- 5
AUDSAMPCPN
QFN-LF
OUTR+ 27
OUTR+ 28
SHDN*
AUD_SPKR_OUTL_N
153
CRITICAL
CF208
0.1UF
10%
50V
2 X7R
603-1
AUDSAMPOURTP
OUTR- 25
OUTR- 26
8 NC
180-OHM-1.5A
0603
MAX9714
LF202
AUDSAMPOUTLN
C
LF203
180-OHM-1.5A
1
AUD_SPKR_OUTR_P
153
0603
AUD_MAX9714_VREG
14 REG
THM
AGND PAD
SS 12
PGND
AUDSAMPOUTRN
AUDSAMPCSS
LF204
180-OHM-1.5A
1
AUD_SPKR_OUTR_N
CRITICAL
1
CF210
1000PF
5%
2 25V
CERM
603
4
1
1
CRITICAL
1
CF211
1000PF
5%
2 25V
CERM
603
CRITICAL
1
CRITICAL
CF212
1000PF
CF213
1000PF
5%
2 25V
CERM
603
5%
2 25V
CERM
603
CF209
0.47UF
CF214
10%
16V
2 X7R
805
0.47UF
10%
2 16V
X7R
805
5%
50V
CERM 2
402
153
0603
SOT-363
CF223
10UF
10%
16V
2 CERM
1210
2N7002DW-X-F
20%
16V
2 CERM
603
AUDSAMPOUTLP
OUTL+ 31
OUTL+ 32
QF200
2N7002DW-X-F
10 INL+
AUD_SAMP_SHDN_L 11
0.1UF
CHOLD 7
QF200
RF213
AUD_SAMP_INL_P
2
10%
16V
X7R
805
RF215
154 153 152 147 7
9 INL-
CRITICAL
0.47UF
AUD_SAMP_INL_N
CF219
GND_AUDIO_SPKRAMP_PLANE
24
1
10%
16V
X7R
805
21
VDD
0.47UF
AUDSAMPINLP
0603
CRITICAL
CF205
22
1%
1/16W
MF-LF
2 402
CRITICAL
10K
23
5%
2 50V
CERM
402
1000-OHM-200MA
RF214
4
100PF
LF206
2
10%
16V
X7R
805
CF215
154
20%
16V
2 CERM
1206
AUD_CODEC_OUT_L
CF202
1UF
20%
16V
CERM 2
603
0.47UF
CRITICAL
150 147
0.1UF
=PP3V3_AUDIO 7 147 152 153
CF204
0603
147
CF218 1
10%
16V
CERM 2
1210
1000-OHM-200MA
150 147
10UF
33
154 152 6
CF201
220UF
AUD_MAX9714_CHOLD
CRITICAL
CRITICAL
13
7 6
SPEAKER AMP
MIN_LINE_WIDTH=1MM
VOLTAGE=12V
LF200
XWF201
SM
MIN_LINE_WIDTH=1MM
XCF200
50R28
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
MIN_LINE_WIDTH=1MM
OMIT
154 7 6
GND_AUDIO_SPKRAMP
GAIN SETTINGS: +19DB

MODULATION SETTING: LOW EMI
154 152 6
GAIN AND SWITCHING FREQUENCY STUFF OPTIONS
154 153 152 147 7
=PP3V3_AUDIO
8 7
6 5
RPF200
47K
5%
1/16W
SM-LF
1 2
152
152
152
152
AUDIO: SPEAKER AMP
3 4
SYNC_MASTER=FINO-SO
AUD_SAMP_FS2
AUD_SAMP_FS1
AUD_SAMP_G2
AUD_SAMP_G1

RF208
5%
1/16W
MF-LF
2 402
154 152 6
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-6863
OF
152
154
LINE IN JACK
SPEAKER CABLE CONNECTOR
APPLE P/N 514-0246 (M23) APPLE P/N 514-0249 (M33)

OMIT
JF300
LF300
AUD_LI_L_JACK
JA03333-M23-4F
F-ST-TH
5
FERR-EMI-100-OHM
1
FERR-EMI-100-OHM
1
LF305
AUD_LI_DET_EMI
FERR-EMI-100-OHM
1
SM
AUD_LI_R_JACK
7
8
LF302
AUD_LI_R_EMI
LF307
CF300
100PF
AUD_LI_GND_EMI
CF301
100PF
5%
2 50V
CERM
402
5%
2 50V
CERM
402
CF302
100PF
100PF
5%
2 50V
CERM
402
=PP3V3_AUDIO
148
24
AUD_LI_GND 148
152
180-OHM-1.5A
1
AUD_SPKR_OUTL_P
0405
1
LF308
FERR-EMI-100-OHM
1
CF326
5%
1/16W
MF-LF
2 402
100K
5%
1/16W
MF-LF
2 402
DIFFERENTIAL_PAIR=AUDIO_MIC
154 AUD_MIC_IN_P
CF319
1000PF
5%
25V
2 CERM
603
AUD_LI_DET_H
2N7002
AUDLINDETH
5%
1/16W
MF-LF
402
LF310
TABLE_5_HEAD
GND_AUDIO_MIC_CONN 143
CF308
DIFFERENTIAL_PAIR=MIC_IN_EMI
AUD_MIC_IN_P_EMI
DIFFERENTIAL_PAIR=MIC_IN_EMI
AUD_MIC_IN_N_EMI
CF320
1000PF
0.1UF
QTY
DESCRIPTION
BOM OPTION
AUD_MIC_IN_P_CONN 143
AUD_MIC_IN_N_CONN 143
DIFFERENTIAL_PAIR=MIC_IN
LF313
CF321
NC
LINE IN CONNECTOR, 5.5 DEG
JF300
17_INCH_LCD
CRITICAL 514-0260
COMBO OUT CONN, 4.5 DEG
JF303
17_INCH_LCD
CRITICAL 514-0249
LINE IN CONNECTOR, 5.5 DEG
JF300
20_INCH_LCD
CRITICAL 514-0261
COMBO OUT CONN, 4.5 DEG
JF303
20_INCH_LCD
DZF302
DZF303
0405
0405
14V-15A
CF322
2
10%
25V
2 X7R
402
LINE OUT PLUG DETECTS
1000PF
10%
25V
2 X7R
402
TABLE_5_ITEM
CRITICAL 514-0246
TABLE_5_ITEM
DIFFERENTIAL_PAIR=MIC_IN
FERR-EMI-100-OHM
1000PF
10%
25V
2 X7R
402
20%
10V
2 CERM
402
PART#
TABLE_5_ITEM
LF312
FERR-EMI-100-OHM
SM
1000PF
5%
25V
2 CERM
603
TABLE_5_ITEM
SM
SOT23-LF
1000PF
5%
25V
2 CERM
603
CRITICAL
24
CF325
CF327
LF311
SM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
GND_AUDIO_MIC_EMI
SM
154 AUD_MIC_IN_N
QF300
RF302
FERR-EMI-100-OHM
TO GPIO 34
AUDIO_LI_DET_L
153
SM
LF309
RF300
2
0603
=PP3V3_AUDIO
47K
14V-15A
SM
LF334
152
DZF300
154 6 GND_AUDIO_MIC
47K
LF331
AUD_SPKR_OUTL_N
AUD_SPKR_OUTL_N_CONN
AUD_SPKR_OUTL_P_CONN
0603
5%
2 50V
CERM
402
LINE IN PLUG DETECT

RF301
AUDIO_SPKR_ID
5%
25V
2 CERM
603
0603
1000PF
154 153 152 147 7
AUDIO_SPKR_ID_CONN
1000-OHM-200MA
5%
1/16W
MF-LF
2 402
AUD_SPKR_OUTR_N_CONN
AUD_SPKR_OUTR_P_CONN
LF332
RF313
AUDIO_IN_DET0_L = LOW: PLUG INSERTED

AUDIO_IN_DET0_L = HIGH: PLUG NOT INSERTED
180-OHM-1.5A
CF303
2
154 153 7
SM
1
153
SM
154 153 7
FERR-EMI-100-OHM
SM
FERR-EMI-100-OHM
1
AUD_LI_R
M-RT-SM
8
180-OHM-1.5A
47K
LF303
AUD_LI_GND_JACK
154 153 152 147 7
SPEAKER TYPE DETECT

TO GPIO 43
FERR-EMI-100-OHM MIN_NECK_WIDTH=0.15MM
SM
53261-0798
0603
AUD_LI_DET_H
153
LF306
FERR-EMI-100-OHM
JF301
LF330
152 AUD_SPKR_OUTR_P
SM
180-OHM-1.5A
1
APPLE P/N 518S0249
0603
SM
LF301
AUD_LI_DET_JACK
152
AUD_LI_L 148
FERR-EMI-100-OHM
SM
LF304
AUD_LI_L_EMI
LF333
AUD_SPKR_OUTR_N
AUDIO_LO_DET_L = LOW: PLUG INSERTED

AUDIO_LO_DET_L = HIGH: PLUG NOT INSERTED
14V-15A
2
AUDIO_LO_OPTICAL_PLUG_L = LOW: OPTICAL DIGITAL AUDIO PLUG INSERTED

AUDIO_LO_OPTICAL_PLUG_L = HIGH: ANALOG AUDIO PLUG INSERTED
NC
GND_CHASSIS_AUDIO_INTERNAL
154 153 152 147 7
=PP3V3_AUDIO
1
154 150 7
RF304
PP5V_AUDIO_ANALOG
LF314
LF322
FERR-EMI-100-OHM
=PP3V3_AUDIO
152 147 7
154 153
RF311
0
147
AUD_SPDIF_OUT_EMI
5%
1/16W
MF-LF
2 402
100K
5%
1/16W
MF-LF
2 402
AUD_SPDIF_OUT_JACK
SM
RF310
5%
1/16W
MF-LF
2 402
LF315
LF323
PP5V_AUDIO_SPDIF_EMI
FERR-EMI-100-OHM
2
FERR-EMI-100-OHM
1
SM
LF316
LF324
FERR-EMI-100-OHM
1
AUD_LO_DET1
SM
FERR-EMI-100-OHM
AUD_LO_DET1_EMI
APPLE P/N 514-0260 (M23)

APPLE P/N 514-0261
(M33)
OMIT
CF317
0.1UF
20%
10V
2 CERM
402
SM
LINE OUT JACK
PP5V_AUDIO_SPDIF_JACK
SM
153
47K
10%
10V
2 CERM
805
24
QF301
2N7002DW-X-F
SOT-363
S
4
CF309
0.1UF
UCNT2052E007-0
1UF
AUD_LO_DET2_1
5%
1/16W
MF-LF
402
JF303
CF318
RF305
AUD_LO_DET2
TO GPIO 32
AUDIO_LO_DET_L
NOSTUFF
153
SM
AUDIO_SPDIF_PWR
RF303
FERR-EMI-100-OHM
5%
1/16W
MF-LF
2 402
AUD_SPDIF_OUT
47K
20%
2 10V
CERM
402
F-ANG-TH
10
AUD_LO_L
150
11
LF326
AUD_LO_L_EMI
FERR-EMI-100-OHM
1
SM
LF319
AUD_LO_DET2
FERR-EMI-100-OHM
AUD_LO_DET2_EMI
FERR-EMI-100-OHM
1
AUD_LO_R
LF320
AUD_LO_GND
6
D
RF308
GND
153
AUD_LO_DET1
NOSTUFF
1
RF309
AUD_SPDIF_GND
TO GPIO 33
AUDIO_LO_OPTICAL_PLUG_L
47K
AUD_LO_DET1_1
5%
1/16W
MF-LF
402
24
QF301
2N7002DW-X-F
SOT-363
S
1
CF310
0.1UF
20%
2 10V
CERM
402
5%
1/16W
MF-LF
2 402
RF3121
0
LF321
5%
1/16W
MF-LF
402 2
LF329
FERR-EMI-100-OHM
1
AUD_LO_GND_PRB_EMI
SM
AUDIO: CONNECTORS
SYNC_MASTER=FINO-SO
SM

1
100PF
CF316
0.01UF
10%
16V
2 CERM
402
CF312
100PF
5%
50V
2 CERM
402
CF314
100PF
5%
50V
2 CERM
402
CF315
100PF
5%
50V
2 CERM
402
CF313
100PF
5%
50V
2 CERM
402
AUD_LI_GND_EMI 153
CF324

100PF
5%
50V
2 CERM
402
CF323
5%
50V
2 CERM
402
DZF301
15V
100PF
5%
50V
2 CERM
402
CF311
MMBZ15DLT1
SOT23LF
SIZE
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
GND_2
VIN
VCC
47K
100K
SM
FERR-EMI-100-OHM
1
RF307
RF306
100K
AUD_LO_GND_PRB
13
LF328
SM
150
RING
GND_1
=PP3V3_AUDIO
12
FERR-EMI-100-OHM
AUD_LO_GND_EMI
4
1
8
9
SM
AUD_LO_R_EMI
154 153 152 147 7
TYPE_DET
TIP
TIP_DET
SM
FERR-EMI-100-OHM
FERR-EMI-100-OHM
150
AUD_LO_GND_JACK
3
6
LF325
SM
SM
LF317
150
LF327
FERR-EMI-100-OHM
153
SM
AUD_LO_DET1_JACK
AUD_LO_L_JACK
AUD_LO_DET2_JACK
AUD_LO_R_JACK
LED
LF318
FERR-EMI-100-OHM
APPLE COMPUTER INC.

154 153 7
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6863
OF
153
F
154
UNUSED GPIO TERMINATIONS
154 153 152 147 7
=PP3V3_AUDIO
RF406
24
AUDIO_LI_OPTICAL_PLUG_L
47K
5%
1/16W
MF-LF
402
RF407
24
RF416
152 6
MAX8510EXK45+T
SC70-5
VOLTAGE=4.5V
OUT 5
IN
PP4V5_AUDIO_ANALOG
RF403
NOSTUFF
154 153 152 147 7
BP
5%
1/16W
MF-LF
402 2
100K 2
CRITICAL
10UF
CF407
47K
5%
1/16W
MF-LF
402
RF410
24
AUDIO_SPDIFIN_INT_L
CF408
47K
5%
1/16W
MF-LF
402
PLACE ACROSS GROUND SPLIT

AT CODEC UE700
I2S2_BITCLK
GND_AUDIO_CODEC
GND_AUDIO_CODEC
47K
5%
1/16W
MF-LF
402
RF405
154 150 148 147 6
RF411
24
154 150 148 147 6
I2S2_DEV_TO_SB_DTI
20%
2 16V
ELEC
4X5.5-SM
10%
50V
2 X7R
603-1
10%
6.3V
2 X5R
805
RF409
24
10UF
10%
10V
2 CERM
805
0.1UF
47K
5%
1/16W
MF-LF
402
CRITICAL
1UF
CF405
I2S2_SYNC
5%
1/8W
MF-LF
805
CRITICAL
CRITICAL
CF404
GND_AUDIO_SPKRAMP
AUD_4V5_FB
AUD_4V5_SHDN*
5%
1/16W
MF-LF
402
152 7 6
10%
16V
2 CERM
402
GND
24
NOSTUFF
CF406
RF408
6 147 148 150 154
RF417
0.01UF
100K
RF404
=PP3V3_AUDIO
SHDN*
GND_AUDIO_CODEC
PLACE NEAR ENTRY TO SPEAKER

AMP GROUND PLANE
147 148
CRITICAL
3
5%
1/8W
MF-LF
805
VRF401
1
CRITICAL
47K
5%
1/16W
MF-LF
402
NOSTUFF
APPLE P/N 353S0733
153 150 7
PLACE ACROSS GROUND SPLIT
4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP
DIFFERENTIAL_PAIR=AUD_PWR
VOLTAGE=5V
PP5V_AUDIO_ANALOG
AUDIO_HP_DET_L
20_INCH_LCD
RF412
5%
1/8W
MF-LF
805
24
AUDIO_MIC_ID
47K
5%
1/16W
MF-LF
402
17_INCH_LCD
RF418
PLACE AT JF303
5%
1/16W
MF-LF
402
RF429
153 7
47K
RF413
5%
1/8W
MF-LF
805
24
AUDIO_HP_MUTE_L
47K
5%
1/16W
MF-LF
402
RF414
24
AUDIO_EXT_MCLK_SEL
47K
5%
1/16W
MF-LF
402
RF415
24
MICROPHONE IMPEDANCE MATCHING CIRCUIT

AUDIO GROUND RETURNS
DIFFERENTIAL_PAIR=AUD_PWR
VOLTAGE=0V
XWF400
SM
GND_AUDIO
CF411
10UF
20%
2 16V
ELEC
4X5.5-SM
6 147 148 150 154
RF423
XWF401
SM
1K
VOLTAGE=0V
1%
1/16W
MF-LF
2 402
OMIT
XWF402
SM
GND_AUDIO_MIC 6 153 154
VOLTAGE=0V
153
RF419
1
AUD_MIC_IN_P
CF412
GND_AUD_LOAMP 6 150
165
1%
1/16W
MF-LF
402
CRITICAL
OMIT
XWF403
SM
VOLTAGE=0V
OMIT
50R28
153
10%
25V 2
X7R
402
AUD_MIC_IN_N
1%
1/16W
MF-LF
402
6 150
0.1UF
1
I89
MAKE_BASE=TRUE
NC_I2S2_MCLK
I116
24
MAKE_BASE=TRUE
I2S0_MCLK
6 147 148 150 154
100K
5%
1/16W
MF-LF
402 2
AUD_CODEC_MCLK
CF414
0.1UF
AUD_MIC_M1
DIFFERENTIAL_PAIR=AUDIO_MIC_1
10%
50V
X7R
603-1
RF424
AUD_MICIN_N 147

SIZE
GND_AUDIO_MIC
APPLE COMPUTER INC.
147
DRAWING NUMBER
REV.
051-6863
SHT
NONE
24
SCALE
24
AUDIO: POWER SUPPLIES
1%
1/16W
MF-LF
2 402
154 153 6
I2S2_MCLK
SYNC_MASTER=FINO-SO
CRITICAL
I2S2_SB_TO_DEV_DTO
AUD_MICIN_P 147
10%
50V
X7R
603-1
RF4221
MAKE_BASE=TRUE
TP_I2S2_SB_TO_DEV_DTO
I88
1K
CRITICAL
AUD_MIC_P1
RF420
165
GND_AUDIO_CODEC
CF413
1000PF
XCF401
47K
5%
1/16W
MF-LF
402
CRITICAL
VOLTAGE=0V
GND_AUDIO_CODEC
AUD_PCM_MBIAS 147
OMIT
7 6
I2S2_RESET_L
OF
154
154

System Block Diagram for Apple Computer PDF CSA Contents

Caricato da

Informazioni sul documento

Descrizione originale:

Titolo originale

Copyright

Formati disponibili

Condividi questo documento

Condividi o incorpora il documento

Opzioni di condivisione

Hai trovato utile questo documento?

Questo contenuto è inappropriato?

Copyright:

Formati disponibili

System Block Diagram for Apple Computer PDF CSA Contents

Caricato da

Copyright:

Formati disponibili

8

PDF CSA CONTENTS

PDF CSA CONTENTS

System Block Diagram

Power Block Diagram

POWER CONN / ALIAS

5V & 3.3V Fets

Vesta Core / Misc

KODIAK CORE & BYPASS

KODIAK & SHASTA MISC

Shasta Core Power

Shasta Serial / Misc

System Management Unit

SMU SUPPLEMENTAL (2)

SMU SUPPLEMENTAL (3)

SMU SUPPLEMENTAL (4)

Fan 0, 1 & System Temp

Fan 2 & HD Temp

KODIAK EI PWR & CAPS

CPU POWER AND BYPASS

138 Shasta FireWire

139 Vesta FireWire PHY

140 FIREWIRE CONNECTORS

142 USB Host Interfaces

143 USB Device Interfaces

144 Flash Media Ctrl

145 Flash Connector

147 AUDIO: CODEC

148 AUDIO: LINE INPUT AMP

150 AUDIO: LINE OUT AMP

152 AUDIO: SPEAKER AMP

153 AUDIO: CONNECTORS

154 AUDIO: POWER SUPPLIES

Kodiak Memory Dq/Ctl

Main Memory Clock Buffer FINO-M23

MEMORY ADDR BRANCHING

MLB Mem Series Term

On-Board DDR SDRAM

On-Board DDR SDRAM

KODIAK PCI-E X16

GPU Core Power

GPU Frame Buffer

GPU GDDR SDRAM A

GPU GDDR SDRAM B

GPU DVI & DACs

KODIAK PCI-E CONST

103 Shasta HyperTransport

119 Shasta PCI Interface

120 PCI SERIES TERMINATION

DIMENSIONS ARE IN MILLIMETERS

121 AIRPORT & BLUETOOTH

122 USB 2.0 PCI Interface

Apple Computer Inc.

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

127 Shasta Disk

129 Disk Connectors

130 ENET SERIES TERM

DO NOT SCALE DRAWING

CPU VCORE VREG

CPU VCORE MORE BYPASS