OPTIMUM POWER FLOW CONTROL ALGORITHM FOR AN ULTRACAPACITOR BIDIRECTIONAL DC-DC CONVERTER

O.A. Ahmed, J.A.M Bleijs

Department of Engineering, University of Leicester, University Road, Leicester LE1 7RH, (United Kingdom) e-mail: oa49@leicester.ac.uk , jamb1@leicester.ac.uk Keywords: Bidirectional converter, ultracapacitor energy buffer, phase-shift modulation, circulating power flow.
Phase-shifted (1)

Abstract
In this paper, new modulation schemes are proposed to minimise the circulating power flow, minimise RMS currents and maximise the operating efficiency of a voltage-fed phaseshifted bidirectional DC-DC converter for an ultracapacitor energy buffer, with an IGBT voltage doubler circuit. The mathematical analysis to obtain an optimum power flow controller of the bidirectional converter is presented. Theoretical and simulation results show that the proposed method can maintain minimum circulating power flow even if the ultracapacitor voltage is fluctuating between 50% and 100% of the rated voltage. Furthermore, using the proposed modulation methods a considerable improvement in converter efficiency (up to 93.4%) is achieved in comparison to that for the conventional phase-shift modulation method (around 80%). The proposed modulation scheme is verified by PSpice/Simulink co-simulation using SLPS.

Vuc

Converter I

VPri

Lt

Vsec

Converter II

Vo

Power Flow

(a)

D1 D2
(b)

D1 D2
(c)

D1 D2
(d)

D1 D2
(e)

Fig.1 Bidirectional converter: (a) Simplified block diagram of BDC, and voltage waveforms of different modulation scheme approaches when: (b) D1 D2 = 50% (i.e. CPC modulation), (c) D1= 50% D2 50%, (d) D1 50% D2 = 50%, (e) D1 50% D2 50%.

1 Introduction
To improve the dynamic response of a fuel cell power source in a DC microgrid, a fast response energy storage medium such as ultracapacitor (UC) is needed. For interfacing an ultracapacitor to the DC link of a DC microgrid several configurations have been proposed and used. One of the efficient ways is to connect the ultracapacitor to the fuel cell power converter at the same high voltage DC link via a bidirectional DC-DC converter (BDC), as shown in Fig.1. Typically BDCs use a phase-shift control strategy to control the transfer of power in both directions. Conventional phase-shift control (CPC) modulation as proposed in [1] is a modulation method that has been used widely because of its simplicity of implementation and the capability of realizing soft-switching operation for the BDC. As shown in Fig.1b, in this modulation scheme all BDC switches are driven at 50% duty cycle with an additional phase-shift between the voltages across both sides of the isolation transformer. The BDC with CPC is capable of operating with zero-voltage switching (ZVS) for the entire phase-shift angle range, but only when the secondary voltage reflected to the primary (Vsec) is equal to the input voltage (Vuc) and both voltages remain essentially constant (e.g. fixed-voltage DC-DC converters or battery chargers/dischargers). The BDC operating under CPC has a limited soft-switching range when operated with sources that have a wide input voltage variation, such as ultracapacitors. In addition, the CPC method increases the RMS current and circulating energy in the BDC.

The disadvantages of CPC modulation have led many authors to find an alternative modulation approach, seeking to improve the performance and the efficiency of the BDC. Most of those approaches use the phase-shift between the primary and secondary voltages to deliver the required power (Puc) while changing the duty cycle (D1 and D2) below 50% to maximize operating efficiency of the BDC (Fig.1b-e). In [2], a modified phase-shift modulation scheme is proposed to extend the ZVS range of the BDC by shaping the current in the primary winding to a triangular or trapezoidal waveform based on the required power, where the two BDC bridges are driven at a duty cycle less than 50% (Fig.1e). The softswitching operation range is significantly improved, but the penalty is high peak currents, a complicated control algo rithm, and it cannot be used if Vuc = V sec. Modified triangular (TRM) and trapezoidal (TZM) modulation schemes are presented in [3], based on optimum selection of the duty cycles D1 and D2 in respect to lower switching losses, where zerocurrent switching (ZCS) is realized for the low voltage side (LVS) switches,. However, using these modulation methods the current through the primary winding becomes discontinuous which is not appropriate in most applications due to the higher device current stresses. A switching modulation strategy based on minimization of peak currents and switching losses with a modulation scheme employing D1=50% and D250% is presented in [4]. However, it does not reduce the circulating energy and it restricts the converter power capability. Hybrid modulation for the BDC based on a combination of a modified TRM scheme and CPC modulation was presented in [5]. This method has the drawback of high RMS and peak currents especially at the transition from TRM to CPC mode. Further efficiency enhancements were developed by a

DC Link

combination of TRM, TZM, and CPC modulation schemes so that the appropriate scheme is selected based on the required output power [6]. To realize ZVS down to light-load and to reduce circulating energy, a composite scheme based on selecting either D150% and D250% for low power transfer or D1=50% and D250% for high power transfer is presented in [7]. Using this scheme, maximum efficiency occurs only in the light load range. [8] proposes a duty ratio control modulation to improve the soft-switching operation of the BDC with D1 set to 50% and D2 calculated as (D2 = Vuc_min/ 2Vuc), where Vuc_min = 50% of Vuc. This means that D2 = 50% if Vuc = Vuc_min, and D2 = 25% if Vuc = Vuc_max. This choice for D1 and D2 can provide ZVS for the ultracapacitor bridge side but only for a limited load range. Furthermore, if Vuc = Vuc_min the BDC has to be operated under CPC for the full power range. Also, the effect of the conduction losses and circulating energy is not addressed. To control the power flow of the BDC with minimum circulating power flow (cf. Section 3), minimum peak current and minimum RMS current, a new modulation method is presented in this paper. The proposed modulation can maintain a minimum circulating power flow even if the UC voltage is reduced to 50% of the rated voltage. Compared to TRM in [2, 3, 5, 6] the proposed modulation keeps the primary current continuous for the entire output power range, resulting in lower peak and RMS current (cf. Section 4). In comparison with CPC modulation the proposed modulation scheme results in a higher converter efficiency (cf. Section 5).

MOSFETs H-Bridge

IGBTs Voltage-Doubler

iuc
S1

DS1

S3

Z1

iuco
DZ1

DS3

Lt

1:n

ic1

C1
DC-Link

Vpri
S4

iLt V sec
HF Tr. Z2

vo

ic2
D Z2

DS4

S2

C2

DS2

Fig.2 Schematic of BDC with voltage doubler on high voltage side

Volt
( + )

D1=D2=50% S1 S4 D1 D1 S2 S3 D1 Z1 D2 Vpri 0.5 Vsec Z2 D2

S1 S2 D1 Z1

( + ) vLt

vpri vsec =

Z2

( + ) + ( + ) 2

+ )

1 2

1 2

1.5 -0.5 1 0.5 0.5 2 1.5 (a)

= IS1IS4 (Vuc > Vsec) IS1IS4 (Vuc = Vsec) IS1IS4 (Vuc < Vsec)

T1 T 2 T3 T4 T 5 T6 T7 T 8 T1

(b)

Fig.3 Key waveforms of: (a) Switching control strategy with fixed D 1 D2, (b) Voltage and current waveforms for arbitrary 1 and 2: T1 (0 ), T2 ( 1), T3 (1 2), T4 (2 ), T5 ( + ), T6 ( + +1), T7 ( +1 +2), T8 ( +2 2).

2 Features of the Investigated BDC

The BDC topology that is analysed in this paper is depicted in Fig.2. The converter comprises a low-voltage MOSFET Hbridge, connected to an ultracapacitor operating from 50% to 100% of its rated voltage (24VVuc 48V), and an IGBT high-voltage bidirectional voltage-doubler circuit with a DC voltage (Vo) of 650V. The rated power is 1.2kW for both power flow directions, where the direction is defined as: Puc > 0: power transfer from UC side to DC link side Puc < 0: power transfer from DC link side to UC side By combining the bidirectional voltage doubler with an Hbridge, a converter with a lower number of active devices at the lowest voltage rating and highest efficiency can be realized. However, the voltage doubler arrangement somewhat restricts the modulation scheme that can be used on the highvoltage side thus a limited range of optimal operating points can be obtained. To improve the soft-switching range of the voltage-doubler switches further, an asymmetric duty cycle, as described in [9], could be used for switches Z1 and Z2. But that would result in imbalanced current stresses in the switches and an asymmetrical voltage across the secondary winding. Therefore, the switching control strategy adapted in this paper is to modify the primary voltage only by overlap of the top/bottom switches of the ultracapacitor bridge side for a specific period, by inserting a phase-shift angle (2) between S1 and S3 with a fixed 50% duty cycle, as shown in Fig.3a. The switching of S2 and S4 is complementary to that of S3 and S1 respectively. This method will facilitate implementation of the switching controller since no duty cycle variation is

required. The waveforms of the primary voltage (vpri), secondary voltage (vsec), leakage inductance voltage (vLt), and the MOSFETs (S1 and S4) currents are shown in Fig.3b for arbitrary 1 and 2 for the condition: Puc > 0 and 2nVuc > Vo. Modified waveforms apply for other ultracapacitor voltages and reverse power flow.

3 Circulating Power Flow Analysis

It is known that circulating power flow (CPF) or circulating energy in the converter has a major effect in increasing the conduction losses, thereby reducing the operating efficiency [10]. This power that occurs during a certain interval in the cycle depends on the used modulation scheme and varies with the load conditions. Therefore, the definition and determination of this interval is first discussed in this section, after which a modulation scheme is investigated that provides a minimum CPF interval. 3.1 Definition of CPF interval To limit the RMS currents via the converters switches and transformer windings, an external inductance (Lext) in series with the leakage inductance (L) of the transformer is required, giving a total circuit inductance Lt = Lext+ L. This limit determines the rated power of the converter. Due to this inductance the primary and secondary currents lag their voltage by an angle that varies with the required power. Consequently, part of the absorbed power is circulating through the converter and flows back to the input source. This is shown in Fig.4 where the instantaneous power is plotted for one full cycle of the converter operation. The interval denoted by is

defined in this paper as a circulating power flow interval and is related to the power required by the load. If the BDC is operating with CPC modulation, this interval can be reduced either by minimizing Lt (with a higher RMS current rating as a consequence) or by selecting a smaller 1 (at the detriment of the power transfer capability of BDC). Therefore, an alternative modulation is required to minimize this period without the above effects.
() = 0

(7)

In Fig.5 the contour surface of the CPF interval in relation to 1 and 2 is depicted for two different UC voltage (Vuc = 48V and 28V) when 0 1 0.5, 0.5 2 , and Puc > 0, and it can be seen that for certain combinations of 1 and 2 a zero CPF interval can be obtained.

4 Proposed Optimal Modulation Scheme

As shown in Section 3, finding the angles (1 and 2) in Fig.5 that realize a zero-CPF interval assists to develop a modulation scheme leading the BDC to operate with minimum losses and a higher efficiency as will be described next. However, the zero-CPF interval is limited by the required power transfer and the UC voltage variations (cf. Fig.11). In order to operate the BDC over the full power range with minimum CPF, RMS current, and peak current, two more operational modes have been developed. 4.1 Zero-CPF Interval Mode (ZCPFM) From Fig.4, (6) and (7) it is evident that for constant Vo the CPF interval depends on 1 and 2, the UC voltage variation, the transformer turns ratio and the required power. Hence, the phase-shift angles 1 and 2 must be calculated in relation to the UC voltage and the required power to ensure operation at zero CPF. From the current and voltage waveforms and equations in Fig.3b, the power transfer of the BDC for arbitrary 1 and 2 when Puc > 0 and 2nVuc > Vo can be obtained as:
( )

Fig.4 Instantaneous power flow of the BDC measured across the primary side (Ppri) for Puc > 0 plotted for arbitrary 1 and 2.

3.2 CPF Determination Using the waveforms and equations in Fig.3b, the values of the currents Io, I1, I2, and I for Puc > 0 and 2nVuc > Vo can be derived as:

(1) (2) (3)

(8)

(4) For the interval T2 in Fig.3b, the inductance current iLt is given by:
( )

According to (6), to realize a zero-CPF interval (i.e. =0) the phase-shift angle 2 must be equal to:

(5)

(9)

Substitution of (9) in (8) shows that the required phase-shift angle 1 in this mode is given by:
60

60

40

Vuc=28V

Vuc=48V

20 0 100

40 20

(10)

50 100

50 0 180 160

140

120

100

80

0 100

50 0 200

150

Fig.5 CPF interval durations against 1 and 2 for Puc > 0

where Vc1 and Vc2 are C1 and C2 voltages equal to (Vo/2). If the UC voltage is less than (Vo/2n) while Puc > 0, the power transfer for arbitrary 1 and 2 is given by:

As can be seen in Fig.3b, during the CPF interval the current through the inductance (Lt) ramps from a value of Io until it reaches zero at = , where I = 0 Io 0. By substituting this condition and (1) into (5), the duration of CPF interval is found as:

(11)

To ensure zero-CPF the required values for 1 and 2 are:

(12)

(6)

and

Similarly the CPF interval for 2nVuc < Vo is obtained as:

1200 1000 800 600 400 200 0 40

100

100

vpri Volt, Amps vsec iLt Volt, Amps

50 0 -50
50 0

vsec iLt

vpri

Puc (W)

48V 43.9V 38V 31V

-50

-100

7.82

7.83

7.84

7.85

Time (sec) (a)

100

7.86 4 x 10

-100

7.82

7.83

7.84

7.85

Time (sec) (b)

100

7.86 4 x 10

Volt, Amps

Fig.6 Phase-shift angles required to achieve zero-CPF for Puc>0

0 -50

iLt

Volt, Amps

20 0 180 160 140

120

100
50

vpri

vsec

50 0

vsec iLt

vpri

-50

-100

7.82

7.83

7.84

7.85

Time (sec)

7.86 4 x 10

-100

7.82

7.83

7.84

7.85

Time (sec) (d)

7.86 4 x 10

(13)
)

(c)

Fig.7 Simulation results show the inductance current at the boundary of zeroCPF interval mode when (a) Puc = 0.205kW, Vuc= 48V, (b) Puc =1.025kW, Vuc= 48V, (c) Puc = 0.218kW, Vuc= 38V, (d) Puc = 0.781kW, Vuc= 38V.

Using (9), (10), (12), and (13), the required combinations of 1 and 2 that achieve zero-CPF can be plotted against the transferred power for the different UC voltages as shown in Fig.6. The achievable power range for zero-CPF lies within the power transfer range of the BDC. Fig.7 shows the simulated waveforms of vpri, vsec, and iLt at the boundaries of the zero-CPF interval mode range when 2nVuc > Vo and Puc > 0. From Fig.7a, the transferable power which can be achieved during this mode for the low power operation can be given as:

(18) The maximum power transfer of the BDC at high power operation is given by: (19) Using a similar procedure the proposed zero-CPF interval mode boundaries can be obtained when 2nVuc < Vo and Puc > 0 as depicted in Table1. The zero-CPF mode boundaries for Puc < 0 are the mirror images of those for Puc > 0.
Table1 Zero-CPF interval boundary when 2nVuc < Vo and Puc > 0

(14)

It can be seen from (14), that during low power operation the power transfer is solely controlled by 2 at this mode. The minimum transferable power ( ) in this mode of operation is equal to:

(15)

when the phase-shift angles are 0 and . As the required power increases both 1 and 2 have to be recalculated, as shown in Fig.6 and the simulation results in Fig.7b, in order to maintain operation at zero-CPF. The power that can be transferred is given by:
( )

(16) ) to for

By substituting (9) in (16) and equating ( zero the maximum phase-shift angles this mode are obtained as:

It has been shown that the operation of the BDC under zeroCPF mode is only possible over a limited power range. Additional modulation schemes are therefore required to allow for optimum operation of the BDC over the entire power range with minimum CPF interval and losses. 4.3 Inner Single Phase-Shift Mode (ISPM) Another mode has been developed in this paper by setting 1 = 0 and modifying 2 only, in order for the BDC to deliver a power below that of the zero-CPF interval mode. This mode

and

(17) and

has been called inner single-phase shift mode (ISPM) as the power is controlled by 2 only. Fig.8a shows the converter waveforms in this mode, and it can be seen that the inductance current iLt increases from Io to I2 at = 2 and reduces to Io when = . Based on this condition, the power transfer during this mode is found as:
(20)

Puc > 0
MCPFM CPC Puc(W) Ip (A) CPC MCPFM

Puc > 0 Vuc=48V

ISPM ZCPFM

ZCPFM ISPM

when 2nVuc > Vo and Puc > 0. The phase-shift angle 2 is equal to:

Vuc=48V (a)

(b)

Fig.9 3D contour surfaces of (a) BDC power flow and (b) peak current

(21)

Volt, Amps

Volt, Amps

Operation in ISPM is similar to the TRM scheme in terms of the current waveform shape and the ability to operate with a minimum conduction loss. However, the proposed ISPM introduces a small CPF interval as shown in Fig.8, which is needed to achieve ZVS for the UC side switches at light load operation (cf. Table2). Unlike TRM scheme, the ISPM keeps the inductance current of the BDC continuous for its entire power range, as shown in Fig.8a&b. Thus, a lower current stress is achieved. Also a change of the duty cycle is not required as in TRM scheme. In addition, this mode can be used even if 2nVuc = Vo.
100

(23)

The selection of the phase-shift angles for all modes is indicated by the red, yellow, and blue curves in Fig.9 a&b. As shown in the simulation results in Fig10, a minimum CPF interval with a lower peak current is achieved using the proposed MCPFM.
100 50 0 -50
100

vpri

vsec iLt

50 0 -50

vpri

vsec iLt

100

vpri Volt, Amps

50

Volt, Amps

v sec 5iLt

vpri
50

vsec 5iLt

Vuc=48V
-100 7.82 7.83 7.84 7.85

Vuc=38V
7.86 4 x 10
-100 7.82 7.83 7.84 7.85

Time (sec) (a)

Time (sec) (b)

7.86 4 x 10

-50

-50

Vuc=48V
-100 7.82 7.83 7.84 7.85

Vuc=48V
7.86 4 x 10

Fig.10 Simulation waveforms of MCPFM for (a) Puc=1.161kW, (b) Puc=1kW.

7.74 7.75 7.76 4 x 10

-100 7.71

7.72

7.73

5 Combination of Modulation Schemes

Fig.11 gives an overview of all proposed modulation schemes and demonstrates that the BDC can be operated with a zero/minimum CPF interval for both power flow directions over wide UC voltage variations.
ISPM
45

Time (sec) (a)

Time (sec) (b)

Fig.8 Simulation waveforms of the ISPM for (a) Puc = 27W, (b) Puc =200W.

It is found that ISPM can operate with a minimum CPF interval until the phase-shift angle 2 is equal to 0.5, where the maximum power achieved is: (22) However, due to the high peak current this mode is limited to and for Puc > 0, 2nVuc > Vo 4.3 Minimum-CPF Mode (MCPFM) A third operational mode has been developed to minimise the CPF interval and reduce the peak current at BDC operating powers exceeding the zero-CPF interval mode range. Fig.9 shows contour surface for both the power flow and the peak current. Fig.9a indicates that at a high power level (>1000W) the BDC is required to operate with a large angle 1. This results in a longer CPF interval and higher RMS current. However, there is no closed-form expression to calculate the combination of 1 and 2 that optimises the power flow operation at the higher power level. However, the contours suggest that a near-optimum combination is obtained by selecting 1 as (2-0.5); 2 can then be calculated using:

40

Puc_rated MCPFM
-1000

2nVuc=Vo ZCPFM

2nVuc=Vo ZCPFM Puc_rated MCPFM

500 1000

Vuc

35 30 25 -500 0

ISPM Puc<0 Puc>0

Fig.11Proposed Operating mode of the BDC for different UC voltages and different power transfer levels, n=7.4, L =10H.

Fig11 shows that the zero-CPF mode range decreases with decreasing UC voltage and depends on the required power. In contrast, MCPFM has a constant range for any variation in UC voltage. The minimum range of the zero-CPF interval mode is achieved when 2nVuc = Vo, where is equal zero. In comparison with the CPC modulation, it is clear from Fig.13a that the proposed modulation scheme keeps the CPF interval as low as possible for the full power transfer range.

As shown in Fig.12a a further reduction in the RMS current is achieved compared to CPC modulation. Fig.12b compares the efficiencies obtained from simulation for CPC modulation and the proposed modulation scheme. It can be seen that with the proposed modulation scheme the efficiency is improvement over the entire load range. The improvement over CPC modulation is the result of a reduction in the RMS current, as shown in Fig.12a, and lower switching losses, as shown in Table2. Using MCPFM the BDC converter is only operated under CPC modulation for one operating point at the full rated power. Using ISPM a lower CPF interval has been achieved while extending the soft-switching operation (see Fig.13a and Table2).
50

ductance current iLt either ends at zero (Fig.8b) or starts from the zero (Fig. 7a and 10a). This claim is verified through the SLPS simulation results, shown in Fig.13b, where the power changes without chattering. Implementation of the controller is also simplified because no hysteresis block is required to select the appropriate mode.

6 Conclusions
A circulating power flow is the main source of the high RMS current, conduction loss and current ripple in the phaseshifted bidirectional DC-DC converter. The circulating power flow has an interval related to the power required by the load and is implicit in the operation of the phase-shifted bidirectional converter. This paper presented a new modulation scheme to minimise the circulating power flow interval in the bidirectional DC-DC converter for the ultracapacitor energy buffer. The proposed scheme decreases the circulating power flow to zero over most of the power range and minimises it over the remainder of the range for a wide variation of the ultracapacitor voltage. In addition, the proposed modulation shows an increase in the soft-switching range and achieves a seamless transition between the proposed modes as the power required is increased. Use of the proposed modulation scheme with an H-bridge voltage doubler circuit shows an improved efficiency (up to 93.4%) in comparison to the conventional phase-shifted BDC (typically 80%).

100

RMS Current

Efficiency

40

80

Proposed CPC

30

60

20

CPC

Proposed Vuc=48V

40

10

20

Vuc=48V
0 0 200 400 600 800 1000 1200 1400

0.4

0.6

0.8

1.2

Power (kW) (b)

Power (W) (b)

Fig.12 Performance comparison with the proposed modulation scheme for Puc>0: (a) RMS current comparison and (b) Efficiency comparison.
200

Phase-shift angles (Deg)

150

1000

References
[1] M. H. G. Kheraluwala, R.W.; Divan, D.M.; Bauman, E., "Performance
characterization of a high power dual active bridge DC/DC converter," in Industry Applications Society Annual Meeting , 1990. [2] N. Schibli, "Symmetrical multilevel converters with two quadrant DCDC feeding." Ph.D. Lausanne: Swiss Federal Institute of Technology, 2000. [3] F. Krismer, S. Round, and J. W. Kolar, "Performance Optimization of a High Current Dual Active Bridge with a Wide Operating Voltage Range," in 37th IEEE Power Electronics Specialists Conference, PESC '06. , 2006, pp. 1-7. [4] G. G. Oggier, G. O. Garcia, and A. R. Oliva, "Switching Control Strategy to Minimize Dual Active Bridge Converter Losses," Power Electronics, IEEE Transactions on, vol. 24, pp. 1826-1838, 2009. [5] Z. Haihua and A. M. Khambadkone, "Hybrid Modulation for DualActive-Bridge Bidirectional Converter With Extended Power Range for Ultracapacitor Application," Industry Applications, IEEE Transactions on, vol. 45, pp. 1434-1442, 2009. [6] Y. Wang, S. W. H. de Haan, and J. A. Ferreira, "Optimal operating ranges of three modulation methods in dual active bridge converters," in Power Electronics and Motion Control Conference, 2009. IPEMC '09. IEEE 6th International, 2009, pp. 1397-1401. [7] A. K. Jain and R. Ayyanar, "PWM Control of Dual Active Bridge: Comprehensive Analysis and Experimental Verification," Power Electronics, IEEE Transactions on, vol. 26, pp. 1215-1227, 2011. [8] T. Haimin, A. Kotsopoulos, J. L. Duarte, and M. A. M. Hendrix, "Transformer-Coupled Multiport ZVS Bidirectional DC-DC Converter With Wide Input Range," Power Electronics, IEEE Transactions on, vol. 23, pp. 771-781, 2008. [9] W. Zhan and L. Hui, "Optimized operating mode of current-fed dual half bridges dc-dc converters for energy storage applications," in Energy Conversion Congress and Exposition, 2009. ECCE 2009. IEEE , 2009, pp. 731-737. [10]X. Yanhui, S. Jing, and J. S. Freudenberg, "Power Flow Characterization of a Bidirectional Galvanically Isolated High-Power DC/DC Converter Over a Wide Operating Range," Power Electronics, IEEE Transactions on, vol. 25, pp. 54-66, 2010.

Puc(W)

500

100

50

Vuc=48V

0 0

0.2

0.4

0.6

0.8

1.2

1.4

-500

Vuc=48V
0.5 1 1.5

Power (kW) (a)

Time (sec) (b)

2 5 x 10

Fig.13 Simulation results of: (a) the required phase-shift angles to achieve minimum CPF interval (blue) compared with CPC (red), (b) BDC power changes (green: calculated; blue: simulated). Table2 Soft-switching status for the proposed modulation scheme

Puc > 0 and 2nVuc > Vo Schemes States 0 1 2 0 1 2 0 1 2 ZVS S1 on S3on S2 on, Z2on S1 on S3on S2on S1 on S3on S2on ZCS S2 off

Puc > 0 and 2nVuc < Vo ZVS ZCS S1 on S2off S3on S4 on S1off, Z2 on S2off Z1 on S1off S2off Z2 on S3on S1off

ISPM

S1off S2off Z1 on

S2on

ZCPFM

S3on S1off Z1 on

MCPFM

In addition, the proposed modulation scheme shows a seamless transition between the operating modes because the in-