Computer Architecture And Microprocessor

Table of Content UNIT I

1.0 1.1 1.2 Introduction Objective Content 1.2.1 Number System 1.2.2 Representation of Negative Number 1.2.3 2s Complement representation of numbers 1.2.4 Binary Coded Decimal (BCD) 1.2.5 Hexadecimal Number System 1.2.6 ASCII Code 1.2.7 Boolean Algebra 1.2.8 Flip Flop 1.2.9 Register 1.2.10 Counters 1.2.11 Basic Logic gates 1.2.12 Logic circuits 1.2.13 TTL Circuit 1.2.14 Computer Languages Revision Points Intext Questions Summary Terminal Exercises Supplementary Materials Assignments Suggested Reading Learning Activities Keywords 1 1 1 1 3 6 7 9 12 15 18 18 19 22 25 29 30 41 41 41 44 45 45 45 45 45

1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.10 1.11

UNIT II
2.0 2.1 2.2 Introduction Objective Content 2.2.1 Microprocessor architecture and its operations 2.2.2 Microprocessor-initiated operations and 8085/8080A bus organization 2.2.3 Memory 2.2.4 Memory map 2.2.5 Example of a microcomputer system 2.2.6 Interfacing devices 46 46 46 46 47 52 54 58 59

2.2.7 2.2.8 2.2.9 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11

The 8085 MPU The 8085 Microprocessor A detailed look at the 8085 MPU and its architecture

63 64 72 75 75 76 76 77 77 77 77 77

Revision Points Intext Questions Summary Terminal Exercises Supplementary Materials Assignments Suggested Reading Learning Activities Keywords

UNIT III
3.0 3.1 3.2 Introduction Objective Content 3.2.1 Organization of the 8085 3.2.2 Instruction Types 3.2.3 Data Transfer (COPY) Operations 3.2.4 Addressing Modes 3.2.5 Arithmetic Operations 3.2.6 Flag Concepts and Cautions 3.2.7 Logic Operations 3.2.8 Data Masking with Logic AND 3.2.9 Branch Operations 3.2.10 Looping, Counting Revision Points Intext Questions Summary Terminal Exercises Supplementary Materials Assignments Suggested Reading Learning Activities Keywords 78 78 78 78 80 80 82 89 97 97 99 103 109 114 115 115 116 116 116 116 117 117

3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11

UNIT IV
4.0 4.1 4.2 Introduction Objective Content 4.2.1 Counter 118 118 118 118

4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11

4.2.2 Time delay 4.2.3 Counter design with time delay 4.2.4 Stack 4.2.5 Subroutine 4.2.6 BCD to Binary Conversion 4.2.7 Binary to BCD Conversion 4.2.8 BCD to seven-segment led code conversion 4.2.9 Binary to ASCII and ASCII to Binary Code Conversion 4.2.10 Software Development System Revision Points Intext Questions Summary Terminal Exercises Supplementary Materials Assignments Suggested Reading Learning Activities Keywords

119 124 129 138 147 150 152 155 159 163 163 163 164 164 164 165 165 165

UNIT V
5.0 5.1 5.2 Introduction Objective Content 5.2.1 The 8080A Interrupt 5.2.2 The 8085 Interrupts 5.2.3 Concepts in Serial I/O 5.2.4 Synchronous vs. Asynchronous Transmission 5.2.5 Programmable Interface Devices 5.2.6 The 8155/8156 Programmable I/O Ports and Timer 5.2.7 Interfacing the 8355/8755 Programmable I/O Ports 5.2.8 The 8279 Programmable Keyboard/Display Interface 5.2.9 Applications of Microprocessors 5.2.10 A Temperature Monitoring System 5.2.11 Closed Loop Process Control Revision Points Intext Questions Summary Terminal Exercises Supplementary Materials Assignments Suggested Reading Learning Activities Keywords 166 166 166 166 170 175 177 179 180 199 199 206 206 240 245 246 246 246 247 247 247 247 247

5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11