IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

3, MARCH 2013 1219

Synchronous-Reference-Frame-Based Control of
Switched Boost Inverter for Standalone DC
Nanogrid Applications
Ravindranath Adda, Student Member, IEEE, Olive Ray, Student Member, IEEE, Santanu K. Mishra, Member, IEEE,
and Avinash Joshi
AbstractSwitched boost inverter (SBI) is a single-stage power
converter derived from Inverse Watkins Johnson topology. Unlike
the traditional buck-type voltage source inverter (VSI), the SBI
can produce an ac output voltage that is either greater or less
than the available dc input voltage. Also, the SBI exhibits better
electromagnetic interference noise immunity when compared to
the VSI, which enables compact design of the power converter.
Another advantage of SBI is that it can supply both dc and ac
loads simultaneously from a single dc input. These features make
the SBI suitable for dc nanogrid applications. In this paper, the
SBI is proposed as a power electronic interface in dc nanogrid.
The structure and advantages of the proposed SBI-based nanogrid
are discussed in detail. This paper also presents a dq synchronous-
reference-frame-based controller for SBI, which regulates both dc
and ac bus voltages of the nanogrid to their respective reference
values under steady state as well as under dynamic load variation
in the nanogrid. The control systemof SBI has been experimentally
validatedusing a 0.5-kWlaboratory prototype of the SBI supplying
both dc and ac loads simultaneously, and the relevant experimental
results are given in this paper. The low cross regulation and the
dynamic performance of the control systemhave also been veried
experimentally for a 20% step change in either dc or ac load of
SBI. These experimental results conrm the suitability of the SBI
and its closed-loop control strategy for dc nanogrid applications.
Index TermsDC nanogrid, switched boost inverter (SBI),
synchronous reference frame (SRF) control.
I. INTRODUCTION
D
CNANOGRIDis a low-power dc distribution systemsuit-
able for residential power applications [1][3]. The aver-
age load demand in the nanogrid is generally met by the local
renewable energy sources like solar, wind, etc. An energy stor-
age unit is also required in the nanogrid to ensure uninterruptible
power supply to the critical loads and to maintain power balance
in the nanogrid.
Fig. 1 shows the schematic of a dc nanogrid consisting of a
solar panel as an energy source, a storage unit, and some dc
and local ac loads. The solar panel is associated with a series-
blocking diode D
S
to avoid reverse power conduction. As the
Manuscript received February 29, 2012; revised May 21, 2012; accepted
July 7, 2012. Date of current version October 12, 2012. Recommended for pub-
lication by Associate Editor D. Perreault.
The authors are with the Department of Electrical Engineering, Indian Insti-
tute of Technology Kanpur, Kanpur 208 016, India (e-mail: raviadda@iitk.ac.in;
olive@iitk.ac.in; santanum@iitk.ac.in; ajoshi@iitk.ac.in).
Color versions of one or more of the gures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TPEL.2012.2211039
Fig. 1. Schematic of a dc nanogrid.
dynamic behaviors of all the different units of nanogrid are not
uniform, they are interfaced to a common dc bus using power
electronic converters, as shown in Fig. 1. As per the consumer
preference, each dc load in the nanogrid also has its own power
electronic interface [1][3] which is not shown in Fig. 1 for
simplicity.
In the nanogrid structure of Fig. 1, three different power con-
verter stages are used to interface the renewable energy source,
energy storage unit, and the local ac loads in the system to the
dc bus. This paper proposes a structure of the dc nanogrid us-
ing switched boost inverter (SBI) [4][6] as a power electronic
interface. Fig. 2 shows the structure of the proposed SBI-based
dc nanogrid, and Fig. 3 shows the circuit diagram of the SBI
supplying both dc and ac loads.
As shown in Fig. 3, the SBI has one active switch (S), two
diodes (D
a
, D
b
), one inductor (L), and one capacitor (C) con-
nected between voltage source V
g
and the inverter bridge. A
low-pass LC lter is used at the output of the inverter bridge to
lter the switching frequency components in the inverter output
voltage v
AB
. As shown in Fig. 3, the capacitor C (connected
between node V
DC
and ground) of SBI acts as a dc bus for
dc loads while the capacitor C
f
(connected between nodes A
O
and B
O
) of SBI acts as an ac bus for ac loads. The operating
principle and pulsewidth modulation (PWM) control of the SBI
have been explained in Section III of this paper.
Fig. 2 shows structure of the proposed SBI-based dc nanogrid
which has the following advantages when compared to the con-
ventional structure [1][3]:
1) SBI is a single-stage power converter that can supply both
dc (between node V
DC
and ground) and ac loads (between
nodes A
O
and B
O
) simultaneously from a single dc input.
So, it can realize both the dc-to-dc converter for solar panel
and the dc-to-ac converter in a single stage. This decreases
size and cost of overall system.
0885-8993/$31.00 2012 IEEE
1220 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 3, MARCH 2013
Fig. 2. Structure of the proposed SBI-based dc nanogrid.
Fig. 3. Circuit diagram of SBI supplying both dc and ac loads.
2) The output ac voltage of SBI can be either higher or lower
than the available source voltage. So, it has wide range of
obtainable output voltage for a given source voltage.
3) SBI exhibits better electromagnetic interference (EMI)
noise immunity when compared to a traditional voltage
source inverter (VSI), as the shoot-through (both switches
in one leg of the inverter bridge are turned ON simulta-
neously) due to EMI noise will not damage the inverter
switches [4]. This reduces extra burden on the power con-
verter protection circuit and helps in realization of com-
pact design of the power converter.
4) As the SBI allows shoot-through in the inverter legs, it does
not require a dead-time circuit and hence eliminates the
need for complex dead-time compensation technologies
[9], [10].
This paper presents a structure of the SBI-based dc nanogrid
and its advantages compared to the conventional structure shown
in Fig. 1. This paper also describes the steady-state and small-
signal analysis of SBI supplying both dc and ac loads along with
its PWM control technique. Also, a closed-loop control strategy
of SBI that regulates both the dc and ac bus voltages of SBI to
their respective reference values has been given in this paper.
The closed-loop control strategy has also been experimentally
validated using a 0.5-kW laboratory prototype of SBI shown in
Fig. 3.
The organizationof this paper is as follows. SectionII presents
a review of the SBI and its comparison with the traditional two-
stage conversion system. Section III describes the steady-state
operation of the SBI supplying both dc and ac loads, followed
Fig. 4. (a) Schematic of IWJ topology. (b) Equivalent circuit of IWJ topology
in DT
S
interval. (c) Equivalent circuit of IWJ topology in (1 D)T
S
interval.
(d) CIWJ topology.
by its PWM control strategy. The small-signal analysis of SBI
and design of a closed-loop control system using synchronous
reference frame (SRF) approach has been given in Section IV.
In Section V, the control strategy has been experimentally val-
idated using a 0.5-kW laboratory prototype of SBI controlled
using TMS320F28335 DSP. Section VI presents some conclud-
ing remarks of this paper.
Note that in this paper, G
S
, G
S 1
, G
S 2
, G
S 3
, and G
S 4
repre-
sent the gate control signals of switches S, S
1
, S
2
, S
3
, and S
4
,
respectively, fed through a noninverting gate driver. Lowercase
letters are used to represent the sinusoidal signals and uppercase
letters are used to represent the dc signals. Uppercase letter with
a hat () represents peak value of a signal, while lowercase let-
ter with a hat () represents small-signal variation in the signal.
Also

X is the phasor representation of a sinusoidal signal x. The
superscript is used to represent the reference signals to the
control system of dc nanogrid.
II. SWITCHED BOOST INVERTER TOPOLOGY
SBI is a single-stage power converter derived from Inverse
Watkins Johnson (IWJ) Topology [4]. This topology exhibits
properties similar to that of a Z-source inverter (ZSI) [7] with
lower number of passive components and more active compo-
nents. This section presents a review of the approach used to
derive the SBI from IWJ topology. A detailed comparison of
SBI with a traditional two-stage dc-to-ac conversion system is
also given in this section.
A. Derivation of SBI From IWJ Topology
The schematic of IWJ converter [26] is shown in Fig. 4(a)
and its equivalent circuits in DT
S
and (1 D)T
S
intervals of a
switching cycle T
S
are shown in Fig. 4(b) and (c), respectively.
As shown in Fig. 4(b), during DT
S
interval, the two switches
of the converter are in position 1, and inductor L is connected
between the input and the output. Similarly, during (1 D)T
S
interval, the switches are in position 0 and the inductor is con-
nected between the output and the ground, as shown in Fig. 4(c).
ADDA et al.: SYNCHRONOUS-REFERENCE-FRAME-BASED CONTROL OF SWITCHED BOOST INVERTER 1221
Fig. 5. (a) Realization of CIWJ topology using power semiconductor devices. (b) Connection of a VSI across the dc output node V
DC
of CIWJ topology.
(c) Connection of a VSI across the switching terminal V
i
of the CIWJ topology (switch S
i
can be realized by using the shoot-through state of the VSI).
Interchanging the DT
S
(position 1), and (1 D)T
S
(position 0)
intervals of IWJ converter leads to Fig. 4(d). This conguration
is named as the complementary IWJ (CIWJ) topology in [4].
Note that this interchange has no impact on the states of the
converter. However, as far as implementation is concerned, this
will imply that the controlled switch and diode of CIWJ and
IWJ are interchanged.
Fig. 5(a) shows the realization of CIWJ topology using power
semiconductor devices [4], [5]. The output of this converter
is a dc voltage V
DC
. In order to convert this dc voltage to an
ac voltage, one has to use a VSI. This VSI may be directly
connected at the output node V
DC
of CIWJ topology [shown
in Fig. 5(b)], which becomes a cascaded connection of a dcdc
converter and a regular VSI. But this combination cannot
overcome the general limitations of a traditional VSI [7], [8],
viz., 1) dead-time is necessary to prevent the damage of the
switches in the event of shoot-through in inverter phase legs,
2) complex dead-time compensation technologies should
be used to compensate the waveform distortion caused by
dead-time.
Fig. 5(c) shows another possible connection of the VSI, in
which the inverter bridge is connected across the switch node
V
i
of the CIWJ topology. Note that this combination requires
only controlled switch S apart from the inverter bridge. The
switch S
i
of CIWJ topology can be realized by utilizing the
shoot-through state of the inverter bridge. Also, similar to the
cascaded connection shown in Fig. 5(b), this circuit can also
supply a dc load (at the output of CIWJ) and an ac load (at
the output of the inverter bridge) simultaneously from a single
dc voltage source V
g
. The circuit of Fig. 5(c) is named as SBI
topology in [4]. Note that it is not a direct cascade connection of
CIWJ topology and VSI, as the inverter bridge is connected at
a switch node of CIWJ converter but not at its output terminal.
When compared to the cascaded connection shown in Fig. 5(b),
the SBI has following advantages:
1) In the event of shoot-through in any phase leg of the in-
verter bridge, the diode D
b
is reverse-biased and capaci-
tor C is disconnected from the inverter bridge. Now, the
current through the circuit is limited by the inductor L.
So, similar to ZSI, shoot-through does not damage the
switches of the SBI also.
2) As the SBI allows shoot-through, no dead-time is needed
to protect the converter. Also this circuit exhibits better
EMI noise immunity compared to a traditional VSI.
3) Since dead-time is not required, there is no need of extra
dead-time compensation technologies to compensate the
waveform distortion caused by dead-time.
Note that a ZSI [7] also exhibits similar advantages of SBI
mentioned above. But the SBI achieves these properties with
lower number of passive components and more active com-
ponents compared to ZSI [4]. This is because the impedance
network of ZSI uses two inductors, two capacitors, and a diode
apart from the inverter bridge, while the SBI requires only one
inductor, one capacitor, a controlled switch, and two diodes. The
reduction in number of passive components leads to the reduced
size of the power converter stage. Also ZSI requires passive
components with high consistency [7], [8] which is not the case
with SBI. Another major advantage of SBI when compared to
ZSI is that it can supply both dc and ac loads simultaneously
from a single dc voltage source, as shown in Fig. 3. However,
the limitation of SBI is that its peak inverter input voltage is
only (1 D) times that of ZSI, where D is the shoot-through
duty ratio of the inverter bridge. A more detailed quantitative
comparison of SBI and ZSI is given in [4].
B. Comparison of SBI With a Traditional Two-Stage DC-to-AC
Conversion System
In the previous section, it is shown that the SBI is a single-
input, two-output (one dc output and one ac output) power con-
verter derived from IWJ converter and a VSI. Similar to the tra-
ditional two-stage dc-to-ac conversion system shown in Fig. 6,
the SBI can also generate an ac output voltage that is either
greater or less than the input dc voltage. However, the SBI has
certain advantages and limitations when compared to the two-
stage conversion system shown in Fig. 6, which are discussed
below.
1) Dead-Time Requirement: A shoot-through event in the
inverter bridge of the two-stage conversion system damages the
power converter stage, as well as the dc loads connected to the
dc bus of the nanogrid. So a dead-time circuit is necessary to
minimize the occurrence of shoot-through events in this system.
1222 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 3, MARCH 2013
Fig. 6. Traditional two-stage dc-to-ac conversion system: Boost converter cascaded with a VSI.
Moreover, to compensate the waveform distortion caused by
dead-time, one has to use the complex dead-time compensation
technologies [8][10]. This is not the case with SBI, as it allows
shoot-through in the inverter phase legs. So the use of SBI elim-
inates the need for a dead-time circuit as well as the requirement
of dead-time compensation technologies.
2) Reliability and EMI Noise Immunity: Even with a dead-
time circuit, the probability of a shoot-through event cannot be
eliminated completely because an EMI noise can also cause
shoot-through in the inverter phase legs [4], [7]. With the use of
SBI, the shoot-through event does not damage the switches of
the power converter. So, SBI exhibits better EMI noise immu-
nity and hence has better reliability compared to the two-stage
conversion system.
3) Extreme Duty Cycle Operation: At the extreme duty ratio
operation (e.g., for D0.75) of a conventional boost converter,
the inductor L is charged over a longer time duration in the
switching cycle, and very small time interval is left to discharge
the inductor through the output diode D
b
. So this diode should
sustain a short pulsewidth current with relatively high ampli-
tude. Also, this causes severe diode reverse recovery current
and increases the EMI noise levels in the converter [11][14].
This also imposes a limit on the switching frequency of the
boost converter and thus increases the size of the passive
components used in the two-stage conversion system shown
in Fig. 6.
In case of SBI, the maximum shoot-through duty ratio is
always limited to 0.5 for a positive dc bus voltage V
DC
[4].
So, even when the converter operates at the point of maximum
conversion ratio, the conduction time of the diodes D
a
, D
b
of SBI is approximately equal to 50% of the switching time
period, which alleviates the problems due to extreme duty ratio
operation of a boost converter. So, SBI can operate at relatively
higher switching frequencies compared to the traditional two-
stage conversion system. This also decreases the size of passive
components used in the power converter.
4) Voltage Stress of Switching Devices: Table I compares
the voltage stress of the semiconductor devices used in the SBI
and the two-stage conversion system shown in Fig. 6. From
this table, it can be observed that the switch S has less voltage
TABLE I
VOLTAGE STRESS COMPARISON OF SBI AND TWO-STAGE CONVERSION SYSTEM
stress (V
DC
V
g
) in case of SBI. For all other devices, the voltage
stress is same for both SBI and the two-stage conversion system.
5) Maximum Conversion Ratio: The maximum conversion
ratio (V
DC
/V
g
) of a practical boost converter cannot exceed 3.0
(approximately), due to the effects of various nonidealities [26]
such as DCR/ESR of the passive components, on-state voltage
drops of the semiconductor devices, etc. This value may slightly
vary depending on the actual values of nonideal elements present
in the converter. Similarly, the rms ac output voltage (v
AC
(rms))
of a single-phase inverter using sinusoidal PWM cannot exceed
1
_
2 times the dc link voltage (V
DC
) [25], [27] in the linear
modulation range (0 < M < 1), for a low distortion sine wave
output. So the maximumoverall rms ac-to-dc conversion ratio of
two-stage conversion system shown in Fig. 6 is approximately
2.12. This value may still decrease if the effects of nonidealities
in VSI are taken into consideration.
The rms ac-to-dc conversion ratio of the two-stage conversion
ratio may be increased slightly by using semiconductor devices
with very low forward voltage drops and passive components
with very low ESR/DCR. This enhances the overall cost of the
power converter stage. Another way to increase the conversion
ratio of the two-stage conversion system is to use high step-
up dc-to-dc converters [12][14] or the converters with trans-
former/coupled inductor [8], [26]. These converters require ad-
ditional semiconductor devices and passive components which
increase the size as well as cost of the power converter stage.
In this paper, it is shown experimentally in Section V that
the maximum rms ac-to-dc conversion ratio of the SBI is 2,
which is comparable to that of a two-stage conversion system.
Also, as explained above, SBI has no diode reverse recovery
ADDA et al.: SYNCHRONOUS-REFERENCE-FRAME-BASED CONTROL OF SWITCHED BOOST INVERTER 1223
problems with extreme duty ratio operation. So this conversion
ratio is possible even at high switching frequency and with better
reliability and EMI noise immunity.
Note that, in this paper, the SBI has been tested with only one
PWM control technique proposed in [6], where the maximum
value of modulation index (M) is limited by the shoot-through
duty ratio (D). However, as the operation of SBI is similar to ZSI,
it is possible to extend maximum boost control and maximum
constant boost control techniques of ZSI [15][17] to SBI. This
may help SBI to achieve higher conversion ratios compared to
the two-stage conversion system, without increasing the number
of devices.
6) Number of Control Variables: Similar to a two-stage con-
version system, the SBI also has two control variables: Shoot-
through duty ratio (D) and the modulation index (M). The dc bus
voltage V
DC
is controlled by D, while ac output voltage of the
converter is controlled by M. However, similar to ZSI [7], the
value one of these two control variables decides the upper limit
of the second control variable of SBI. The mathematical relation
between D and M depends on the control technique used. Note
that, as mentioned above, it is possible to extend most of the
PWM control techniques of ZSI [15][17] to control the SBI
also.
7) Number of Devices: As shown in Fig. 3, the SBI requires
ve active switches, six diodes, two inductors, and two capaci-
tors for its realization. The two-stage conversion system shown
in Fig. 6 uses only one diode (D
a
) less compared to the SBI.
However, in a dc nanogrid, the input comes froma renewable en-
ergy source, e.g., solar panel or fuel cell, which should always
be associated with a series diode to block the reverse power
ow [7], [18], [19]. So the diode D
a
of SBI can be a part of
the renewable energy source which eliminates the need for an
external diode. Thus, the number of devices in both converters
is same.
III. STEADY-STATE ANALYSIS AND PWM CONTROL OF SBI
SUPPLYING BOTH DC AND AC LOADS
A. Steady-State Analysis of SBI
The circuit diagram of SBI supplying both dc and ac loads is
shown in Fig. 3. Fig. 7(a) and (b) shows the equivalent circuits
of SBI during the shoot-through interval DT
S
and non-shoot-
through interval (1 D)T
S
of the inverter bridge, respectively.
As shown in Fig. 7(a), during DT
S
interval, the inverter is in
shoot-through zero state and switch S is turned ON. The diodes
D
a
and D
b
are reverse biased as V
DC
> V
g
. In this interval,
capacitor C charges the inductor L through switch S and the
inverter bridge. So, the inductor current equals the capacitor
discharging current minus the dc load current.
During (1 D) T
S
interval, the inverter is in non-shoot-
through state and the switch S is turned OFF. The inverter bridge
is represented by a current source in this interval as shown in
the equivalent circuit of Fig. 7(b). Now, the voltage source V
g
and inductor L together supply power to the dc load, inverter,
and the capacitor through diodes D
a
and D
b
. The inductor
current in this interval equals the capacitor charging current
added to the inverter input current and the dc load current. Note
Fig. 7. (a) Equivalent circuit of SBI in DT
S
interval. (b) Equivalent circuit
of SBI in (1 D)T
S
interval. (c) Steady-state waveforms. (d) Transfer (dcdc)
characteristics of SBI.
that the inductor current is assumed to be sufcient enough for
the continuous conduction of the diodes D
a
, D
b
for the entire
interval (1 D)T
S
.
Fig. 7(c) shows the steady-state waveforms of the converter
operation for one switching cycle T
S
with respect to the gate
control signal G
S
of switch S. From Fig. 7(a) and (b), one has
v
L
(t) =

v
DC
(t), if 0 < t < D T
S
V
g
v
DC
(t), if D T
S
< t < T
S
(1)
i
C
(t) =

i
L
(t) i
DC
(t), if 0 < t < D T
S
i
L
(t) i
DC
(t) i
i
(t), if D T
S
< t < T
S
(2)
v
i
(t) =

0, if 0 < t < D T
S
v
DC
(t), if D T
S
< t < T
S
.
(3)
Using small ripple approximation, (1)(3) can be rewritten as
v
L
(t) =

V
DC
, if 0 < t < D T
S
V
g
V
DC
, if D T
S
< t < T
S
(4)
i
C
(t) =

I
L
I
DC
, if 0 < t < D T
S
I
L
I
DC
I
i
, if D T
S
< t < T
S
(5)
v
i
(t) =

0, if 0 < t < D T
S
V
DC
, if D T
S
< t < T
S
.
(6)
Here, V
DC
, I
L
, and I
DC
are dc components in v
DC
(t), i
L
(t),
and i
DC
(t), respectively, and I
i
is the current drawn by inverter
bridge in (1 D) T
S
interval. Under steady state, the average
voltage across the inductor and average current through the
1224 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 3, MARCH 2013
capacitor in one switching cycle should be zero. Using volt-
second balance, we have
V
DC
D + (V
g
V
DC
) (1 D) = 0
V
DC
V
g
=
1 D
1 2D
.
(7)
Similarly, using charge-second balance, one can write
(I
L
I
DC
) D + (I
L
I
DC
I
i
) (1 D) = 0
I
L
=
_
1
1 2D
_
I
DC
+
_
1 D
1 2D
_
I
i
. (8)
The average dc link voltage V
i
can be calculated as
V
i
= 0 D +V
DC
(1 D) = V
DC
(1 D) . (9)
The expression for conversion ratio (V
DC
/V
g
) is plotted in
Fig. 7(d). As shown in the gure, (V
DC
/V
g
) is unity when
D = 0 and it becomes very high as D approaches 0.5. Note that,
similar to a ZSI [7], the shoot-through duty ratio (D) of the SBI
also cannot exceed 0.5 for a positive dc bus voltage, V
DC
.
B. PWM Control of SBI
The SBI utilizes the shoot-through interval of the H-bridge
to invoke the boost operation. So, the traditional PWM tech-
niques of VSI [25], [27] have to be modied to incorporate the
shoot-through state, so that they are suitable for SBI. In [6],
a PWM scheme for SBI is developed based on the traditional
sine-triangle PWM with unipolar voltage switching [25], [27].
This technique has been illustrated in Fig. 8 during positive and
negative half cycles of the sinusoidal modulation signal v
m
(t)
[shown in Fig. 8(a)].
As shown in Fig. 8(b) and (d), during positive half cycle
of v
m
(t) (v
m
(t) > 0), the gate control signals G
S 1
and G
S 2
are generated by comparing the sinusoidal modulation signals
v
m
(t), and v
m
(t) [shown in Fig. 8(a)] with a high-frequency
triangular carrier v
tri
(t) of amplitude V
p
. The frequency f
S
of
the carrier signal is chosen such that f
S
f
O
. Therefore, v
m
(t)
is assumed to be nearly constant in Fig. 8(d). The signals ST
1
and ST
2
are generated by comparing v
tri
(t) with two constant
voltages V
ST
and V
ST
, respectively. The purpose of these two
signals is to insert the required shoot-through interval DT
S
in
the PWM signals of the inverter bridge. Now the gate control
signals for switches S
3
, S
4
, and S can be obtained using the
logical expressions given as follows:
G
S3
=G
S2
+ST
1
; G
S4
=G
S1
+ ST
2
; G
S
= ST
1
+ ST
2
.
(10)
Similarly, as shown in Fig. 8(c) and (e), during negative half
cycle of v
m
(t) (v
m
(t) < 0), the gate control signals G
S3
and
G
S4
are generated by comparing the modulation signals v
m
(t),
and v
m
(t) with the triangular carrier v
tri
(t). The shoot-through
signals ST
1
and ST
2
are generated in the same manner as in
the positive half cycle. The gate control signals for switches S
1
,
S
2
, and S can be obtained using the logical expressions given as
follows:
G
S1
=G
S4
+ST
1
; G
S2
=G
S3
+ ST
2
; G
S
= ST
1
+ ST
2
.
(11)
Fig. 8. (a) Sinusoidal Modulation Signals v
m
(t) and v
m
(t). (b) Schematic
of the PWM control circuit when v
m
(t) > 0. (c) Schematic of the PWM control
circuit when v
m
(t) < 0. (d) Generation of gate control signals for SBI when
v
m
(t) > 0. (e) Generation of gate control signals for SBI when v
m
(t) < 0.
ADDA et al.: SYNCHRONOUS-REFERENCE-FRAME-BASED CONTROL OF SWITCHED BOOST INVERTER 1225
Fig. 9. Closed-loop control architecture of the dc nanogrid.
It can be observed from Fig. 8 that, during positive half cycle
of v
m
(t), the shoot-through signals ST
1
, ST
2
are logically added
to G
S2
, G
S1
, respectively, while in negative half cycle of v
m
(t),
these signals are logically added to G
S4
, G
S3
, respectively. This
takes care that all four switches of the inverter bridge equally
participate in generating the shoot-through interval.
Note that with this PWMcontrol technique, the shoot-through
state of the inverter bridge will have no effect on the harmonic
spectrum of the inverters output voltage v
AB
, if the sum of
shoot-through duty ratio (D) and the modulation index (M) is
less than or equal to unity [6], i.e.,
M +D 1. (12)
If the values of M and D are chosen according to (12), the
peak value of the ac output voltage v
AC
is given by [6]

V
AC
=
_

V
AB
_
fundmental
= M V
DC
= M
_
1 D
1 2D
_
V
g
.
(13)
Inequality (12) limits the maximum ac-to-dc conversion ratio
of SBI that can be achieved with this PWM control technique.
However, as the operation of SBI is similar to that of a ZSI,
it is possible to extend maximum boost control and maximum
constant boost control techniques of ZSI [15][17] to SBI. With
these techniques, the sum of M and D of SBI can be more than
unity. Thus, the SBI can achieve higher ac-to-dc conversion
ratios with these control techniques.
IV. CLOSED-LOOP CONTROL OF SBI
Fig. 9 shows the closed-loop control architecture of the SBI
supplying both dc and ac loads. In this scheme, the task of the
controller is to generate gate control signals (G
S
, G
S 1
, G
S 2
,
G
S 3
, and G
S 4
) for SBI shown in Fig. 3 such that the volt-
ages at the dc bus (V
DC
) and the ac bus (v
AC
) are regulated
to their respective reference values V

DC
and v

AC
. As shown in
Fig. 9, the controller for the dc nanogrid has been implemented
in digital domain using Texas Instruments TMS320F28335
DSP [30], [31]. This DSP has a built-in 12-bit analog-to-digital
converter that accepts analog feedback signals (V
DC
, v
AC
, and
Fig. 10. Equivalent circuit of SBI referred to ac side (R
Lf
: DCR of the
inductor L
f
, R
AC
: ac load).
Fig. 11. Bode plots of (a) inner current control loop and (b) outer voltage
control loop.
i
Lf
) from SBI and converts them into digital domain. These
feedback signals along with the reference signals for the ac and
dc bus voltages are given as inputs to the controller block. The
controller block has two separate control loops for controlling
the dc bus voltage V
DC
and ac bus voltage v
AC
. The ac bus
voltage controller has a cascaded control structure with an in-
ner current control loop and an outer voltage control loop. Note
that, as the ac bus voltage controller is designed using SRF ap-
proach [20][22], the reference for ac bus voltage v

AC
is directly
given in dq domain (V

d
,V

q
, and frequency ) in Fig. 9, in order
to reduce the extra computational burden on the DSP.
The outputs of the controller block are shoot-through duty
ratio D and modulation signal (m =v
m
(t)) of the SBI. These are
1226 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 3, MARCH 2013
Fig. 12. Block diagram of the ac bus voltage controller, (a) outer voltage
controller, and (b) inner current controller.
given as inputs to the enhanced pulsewidth modulation (ePWM)
modules [31] of DSP which are the key peripherals to generate
the PWM signals of SBI. Now the gate control signals (G
S
,
G
S 1
, G
S 2
, G
S 3
, and G
S 4
) for SBI are generated by the ePWM
modules using the modied unipolar sine-triangle PWM tech-
nique of SBI described in the previous section.
A. AC Bus Voltage Controller
Fig. 10 shows the equivalent circuit of SBI referred to the ac
side, in which the ac load is represented by an equivalent resistor
R
AC
. From this gure, one can write
di
Lf
dt
=
R
Lf
L
f
i
Lf
+
1
L
f
(v
inv
v
AC
) (14)
dv
AC
dt
=
1
C
f
i
Lf

v
AC
R
AC
C
f
. (15)
Equations (14) and (15) can be written in dq domain [20][22]
as (using the transformation matrix T given in (22))
d
dt
_
I
d
I
q
_
=

R
Lf
L
f

R
Lf
L
f

_
I
d
I
q
_
+
1
L
f
Fig. 13. Simplied equivalent circuit of SBI referred to dc side.
Fig. 14. Bode plots of dc bus voltage control loop.

_
V
invd
V
d
V
invq
V
q
_
(16)
d
dt
_
V
d
V
q
_
=

1
R
AC
C
f

1
R
AC
C
f

_
V
d
V
q
_
+
1
C
f

_
I
d
I
q
_
. (17)
Transforming these equations into s-domain, the control to
output transfer functions of inner current control loop and outer
voltage control loop are given by
I
d
(s)
U

id
(s)
=
I
q
(s)
U

iq
(s)
=
1
s L
f
+R
Lf
(18)
V
d
(s)
U

vd
(s)
=
V
q
(s)
U

vq
(s)
=
R
AC
s R
AC
C
f
+ 1
(19)
where
U

id
=V
invd
V
d
+ L
f
I
q
; U

iq
= V
invq
V
q
L
f
I
d
;
U
vd
= I
d
+ C
f
V
q
; and U

vq
= I
q
C
f
V
d
.
Fig. 11 shows open-loop (uncompensated) and loop (compen-
sated) bode plots of the inner current and outer voltage control
loops with the plant parameters given in Table II. Fig. 12(a) and
(b) show the detailed block diagrams of the outer voltage con-
troller and inner current controller, respectively. The complete
ADDA et al.: SYNCHRONOUS-REFERENCE-FRAME-BASED CONTROL OF SWITCHED BOOST INVERTER 1227
Fig. 15. Complete Block diagram of the DSP-based controller for the SBI supplying both dc and ac loads.
block diagram of the ac bus voltage control loop is given in
Fig. 15.
B. DC Bus Voltage Controller
Fig. 13 shows the simplied equivalent circuit of SBI, in
which the dc load is represented by an equivalent resistor R
DC
,
and the inverter bridge is represented by parallel combination of
a switch S
i
and a resistor R
i
[24]. Using state-space averaging
approach [26], [27], the small-signal state-space model of the
SBI can be obtained as follows:
K.

x = A. x +B. u
y = E. x +F. u (20)
where
x =
_

i
L
v
DC

T
; u =
_

d v
g

T
;
y = [ v
DC
] ; and K =
_
L 0
0 C
_
.
The matrices A, B, E, and F of (20) are given in Appendix
A. From this state-space model, the control to output transfer
function of the dc bus voltage controller ( v
DC
/

d) can be obtained
as
v
DC

d
=
b
1
s +b
0
a
2
s
2
+a
1
s +a
0
. (21)
The coefcients a
x
(x = 0 to 2) and b
y
(y = 0, 1) of (21) are
given in Appendix A. Fig. 14 shows the open-loop (uncompen-
sated) and loop (compensated) bode plots of the dc bus voltage
control loop with the parameters given in Table II. Note that
the transfer function ( v
DC
/

d) of SBI is a nonminimum phase

transfer function with a real zero at s = (b
0
/b
1
) in the right
half of the s-plane.
C. Complete Block Diagram of the Closed-Loop
Control System
Fig. 15 shows the complete block diagram of the closed-loop
control system of SBI for dc nanogrid applications. As shown
in Fig. 15, the control system has a dc bus voltage controller
that regulates the dc bus voltage V
DC
to its reference value V

DC
.
The output of this controller is the shoot-through duty ratio D
of the SBI. The ac bus voltage controller has a cascaded control
structure with an inner current controller block and an outer
voltage controller block, as shown in Fig. 15. The detailed view
of these two controllers is given in Fig. 12. Note that, as the ac
bus voltage controller is implemented using SRF approach, the
feedback signals (v
AC
, i
Lf
) should also be transformed from
single phase (1) to dq domain. This transformation involves
the following two steps.
Step 1: 1 to transformation
The sensed sinusoidal voltage v
AC
of SBI is passed
through a quadrature signal generator (QSG) that is based on
second-order generalized integrator (SOGI) [23]. The tuning
1228 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 3, MARCH 2013
TABLE II
PARAMETERS USED FOR EXPERIMENT
TABLE III
COMPONENTS USED FOR EXPERIMENT
Fig. 16. Photograph of the power stage of SBI.
frequency of the SOGI is set to the input frequency , as
shown in Fig. 15. The outputs of the SOGI-QSG are two in-
quadrature sinusoidal signals v

and v

such that

V

=

V
AC
and

V

= (j1).

V
AC
. A similar technique is used to transform
the sensed sinusoidal current i
Lf
into domain, as shown
in Fig. 15.
Step 2: to dq transformation
In this step, the sinusoidal signals (v

, v

) and (i

, i

) are
premultiplied by the transformation matrix, T [21], as given in
the following equation:
_
V
d
V
q
_
= T
_
v

_
;
_
I
d
I
q
_
= T
_
i

_
Fig. 17. Gate control signals of SBI generated by the DSP (a) during positive
half cycle of v
m
(t) and (b) during negative half cycle of v
m
(t).
TABLE IV
EXPERIMENTAL VERIFICATION OF BUCKBOOST CAPABILITY OF THE SBI
where T =
_
sin cos
cos sin
_
. (22)
Note that as the controller is designed for a standalone system,
is generated by integration of the input frequency , as
shown in Fig. 15. As a result of the transformation given in
(22), these sinusoidal signals are transformed into dc signals
(V
d
, V
q
) and (I
d
, I
q
), respectively. Now the sensed feedback
signals are in dq domain and can be given as inputs to the ac
ADDA et al.: SYNCHRONOUS-REFERENCE-FRAME-BASED CONTROL OF SWITCHED BOOST INVERTER 1229
Fig. 18. Experimental results of SBI with different values of rms ac-to-dc conversion ratios and input voltages. (a) Boost mode with V
g
= 24 V. (b) Buck mode
with V
g
= 24 V. (c) Boost mode with V
g
= 48 V. (d) Buck mode with V
g
= 48 V.
bus voltage controller, as shown in Fig. 15. The outputs of the
ac bus voltage controller are the modulation signals of the SBI
in dq domain, i.e., M
d
and M
q
. From these two dc signals in
dq domain, the sinusoidal modulation signal, m (= v
m
(t)) of
SBI can be obtained using dq to 1 transformation given in the
following equation:
v
m
(t) = m = M
d
. sin +M
q
. cos . (23)
The outputs of the controller block (D and m) are given as
inputs to the ePWM modules [31] of DSP in order to generate
the gate control signals (G
S
, G
S 1
, G
S 2
, G
S 3
, and G
S 4
) for
SBI, using the PWMcontrol technique described in the previous
section.
V. EXPERIMENTAL VERIFICATION
A 500-W laboratory prototype of the SBI supplying both dc
and ac loads, shown in Fig. 3, is developed to verify the the-
oretical analysis given in the paper. Tables II and III list the
parameters and components used for the experimental veri-
cation. Fig. 16 shows the photograph of power stage of the
SBI prototype used for experimentation. The closed-loop con-
trol strategy has been implemented using the Texas instruments
TMS320F28335 DSP as mentioned in previous sections.
A. Gate Signals Generated by the DSP
Fig. 17 shows the gate control signals of SBI during positive
and negative half cycles of the modulation signal v
m
(t), gener-
ated using TMS320F28335 DSP. It can be observed that these
gate signals are consistent with the PWM control signals given
in Fig. 8(d) and (e).
B. Verication of BuckBoost Capability of SBI
One of the main advantages of SBI over the traditional VSI is
that it can generate an ac output voltage that is either higher or
lower than the source voltage V
g
. To verify this experimentally,
1230 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 3, MARCH 2013
Fig. 19. Steady-state operation of SBI (a) input voltage V
g
, dc load voltage
V
DC
, ac output voltage of SBI v
AC
, and ac load voltage, and (b) dc load voltage
V
DC
, switch node 1 voltage V
sn1
, input voltage of the inverter bridge V
i
, and
output voltage of H-Bridge V
AB
.
TABLE V
COMPARISON OF ACTUAL VOLTAGES OF THE SBI IN FIG. 19(a) WITH THEIR
REFERENCE SIGNALS (N = 5)
the SBI has been tested for different conversion ratios and input
voltages given in Table IV, and the corresponding experimental
results are given in Fig. 18. From these results, it is clear that
the rms ac-to-dc conversion ratio can vary between 0.5 and 2.
This veries the buckboost capability of the SBI.
Note that, in this paper, the SBI has been tested with the
PWM technique proposed in [6], where the maximum value of
modulation index M is limited by the shoot-through duty ratio
D [see inequality (12)]. However, as the operation of SBI is
similar to ZSI, it is possible to extend most of the PWM control
techniques of ZSI [15][17] to SBI. These techniques help to
further improve the rms ac-to-dc conversion ratio of the SBI.
C. Operation of SBI With an Isolation Transformer
Most of the residential and commercial ac loads require either
110 V or 230 V rms ac supply. In order to generate 230-V
AC
output using SBI, one can either increase input voltage level to
120 V
DC
(since the maximumpractical rms ac-to-dc conversion
ratio of SBI is 2 with the PWM technique used in this paper) or
use a step-up transformer at the ac output of the SBI. The use of
transformer also provides galvanic isolation between the power
converter stage and loads, which increases protection level and
reliability of the system.
In the previous section (see Fig. 18 and Table IV), it is already
shown that both the dc and ac output voltages of SBI can be
increased by increasing the input voltage V
g
. In this section, the
operation of SBI has been tested with an isolation transformer
connected between the ac output and the ac load of the converter.
This section also veries the capability of SBI to supply both dc
and ac loads simultaneously.
Fig. 19(a) shows the steady-state waveforms of the SBI sup-
plying a 250-W dc load and a 250-W ac load simultaneously,
with an input voltage V
g
= 48 V. The ac load is isolated from
the power converter stage using a 1:5 isolation transformer. The
reference signals for the closed-loop control system of SBI are
V

DC
= 130 V, v

AC
= 46 V (rms), V

d
= 65 V, V

q
= 0 V, and
= 100 rad/s. Note that the reference value for v
AC
is chosen
such that the ac load voltage is equal to 230 Vrms (=5 46 V).
Table V compares the actual voltages at various nodes of the
SBI with their respective reference values. From Fig. 19(a) and
Table V, it is clear that the actual voltages are matching well
with their respective reference signals. These results verify the
operation of SBI with an isolation transformer at the ac output
of the converter. Also these results show that the SBI can supply
both dc and ac loads simultaneously from a single input V
g
.
Fig. 19(b) shows the dc bus voltage V
DC
, switch node voltage
V
sn1
, inverter input voltage V
i
, and inverter output voltage V
AB
of the SBI. It is important to note that as the VSI is connected
at the switch node V
i
of the CIWJ topology, the input voltage
of the inverter bridge V
i
in SBI is a switching waveform that
varies from 0 to V
DC
. Also, it can be observed from Fig. 19(b)
that the width of the shoot-through interval (when V
sn1
= V
DC
,
V
i
= 0) is less than the width of zero-interval (when v
AB
= 0)
which proves that inequality (12) is satised.
D. Performance of the Closed-Loop Control SystemWith a Step
Change in the Load
To test the dynamic performance of the closed-loop control
system, a 20% step change has been applied in both ac and dc
ADDA et al.: SYNCHRONOUS-REFERENCE-FRAME-BASED CONTROL OF SWITCHED BOOST INVERTER 1231
Fig. 20. Performance of the controller with (a) 20% step-down change in ac load current, (b) 20% step-up change in ac load current, (c) 20% step-down change
in dc load current, and (d) 20% step-up change in dc load current.
loads of SBI separately, and the results are presented in Fig. 20.
In all these gures, the signal shown in channel 1 (orange)
represents the ac or dc load current. It can be observed fromthese
gures that both the dc bus and ac bus voltages are maintained
to be constant by the closed-loop controller even during a step
change in either ac load or dc load. This conrms that the DSP-
based closed-loop control system presented in this paper shows
excellent dynamic performance as well as low cross regulation
of ac and dc bus voltages of SBI.
E. Performance of SBI With an RL and Rectier Loads
Fig. 21(a) shows the experimental results of SBI supplying an
RL load: (18+j14) , 125 W, 0.8 pf lag. As shown in Fig. 21(a),
with an input voltage V
g
of 48 V, the SBI generates a dc bus
voltage of 150 V and an output ac voltage v
AC
of 60 V rms.
Channel 1 (Orange) shows the ac load current i
AC
of SBI. It
can be observed from this gure that the ac load current lags
the load voltage, which is the characteristic of an RL Load. This
veries the performance of SBI with RL loads.
Fig. 21(b) shows the experimental results of SBI supplying a
single-phase diode bridge rectier with RC load: 150- resistor
in parallel with a 470-F capacitor. Channel 1 (Orange) shows
the current i
AC
drawn by the rectier bridge from SBI, and
Channel 3 (Pink) shows the output voltage of the rectier bridge
V
Rect
. It can be observed that the output ac voltage v
AC
of
SBI is distorted due to the harmonics in the current drawn by
rectier. Note that this distortion happens even with a regular
VSI supplying a rectier load [28], [29]. However, it is possible
to improve the quality of output voltage by modifying the closed-
loop control technique of the inverter [28], [29].
VI. CONCLUSION
This paper presents a novel power electronic interface called
switched boost inverter (SBI) for dc nanogrid applications. It is
1232 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 3, MARCH 2013
Fig. 21. (a) Experimental results of SBI supplying an RL load. (b) Experi-
mental results of SBI supplying a rectier load.
shown that the SBI is a single-stage power converter that can
supply both dc and ac loads simultaneously from a single dc
input. It is also proven that the SBI can generate an ac output
voltage that is either higher or lower than the available source
voltage. This paper also describes the advantages and limitations
of SBI when compared to the ZSI and the traditional two-stage
dc-to-ac conversion system. The steady-state and small-signal
analysis of the SBI supplying both dc and ac loads, and a PWM
control technique suitable for SBI are also described in this
paper. Also, the analysis and design of a SRF-based controller
that regulates both the dc and ac bus voltages of SBI to their
respective reference values has been discussed in this paper.
The steady state and dynamic performance as well as the low
cross regulation of the closed-loop control strategy have been
experimentally validated using a 0.5-kW laboratory prototype
of SBI supplying both dc and ac loads. The performance of SBI
has been tested experimentally with an isolation transformer and
also with three different types of ac loads: R, RL, and nonlinear
loads. It can be concluded from the experimental results that
the control strategy of SBI shows excellent performance during
steady state as well as during a step change in either dc or ac load
in the system. These results conrm the suitability of SBI and
its closed-loop control strategy for dc nanogrid applications.
APPENDIX A
The matrices A, B, E, and F in (20) are
A =

0 2D 1
1 2D
D
R
DC

1 D
R
eq

B =
_
2 V
DC
V
g
1 D
V
DC

_
1
R
e q

1
R
D C
_
2 I
L
0
_
E = [ 0 1 ] ; F = [ 0 0 ] ; and R
eq
=
R
DC
R
i
R
DC
+R
i
.
The coefcients of ( v
DC
/

d) in (21) are given by

a
0
= R
DC
R
eq
(2D 1)
2
a
1
= L (D R
eq
+ (1 D) R
DC
)
a
2
= C L R
DC
R
eq
b
0
= R
DC
(2D 1) (2V
DC
V
g
) R
eq
b
1
= L (V
DC
(R
eq
R
DC
) + 2 I
L
R
DC
R
eq
) .
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Ravindranath Adda (S11) received the B.E. degree
from Andhra University, Vishakhapatnam, India, in
2007, and the M.Tech. degree from the Indian Insti-
tute of Technology Kanpur, Kanpur, India, in 2009,
both in electrical engineering, where he is currently
working toward the Ph.D. degree in the Department
of Electrical Engineering.
His research interests include power electronics
for dc distribution systems, pulsewidth modulation
control techniques of inverters, and digital control in
power electronics.
Olive Ray (S12) received the B.E.E. degree from
Jadavpur University, Kolkata, India, in 2009, the
M.Tech. degree from the Indian Institute of Tech-
nology Kanpur, Kanpur, India, in 2011, both in elec-
trical engineering, where he is currently working to-
ward the Ph.D. degree in the Department of Electrical
Engineering.
His research interests include converter modeling
and control, dc distribution systems, and digital con-
trol in power electronics.
Santanu K. Mishra (S00M04) received the
B.Tech. degree in electrical engineering fromthe Col-
lege of Engineering and Technology, Bhubaneswar,
India, in 1998, the M.Tech. degree in energy systems
engineering from the Indian Institute of Technology
Chennai, Chennai, India, in 2000, and the Ph.D. de-
gree fromthe Department of Electrical and Computer
Engineering, University of Florida, Gainesville, in
2006.
He worked as a Senior and Staff Application Engi-
neer with the International Rectier Corporation from
2004 to 2008. He is currently an Associate Professor at the Indian Institute of
Technology Kanpur, Kanpur, India. His research interests include server power
system, low-voltage power conversion, and converter modeling and control.
Avinash Joshi received the Ph.D. degree in electrical
engineering from the University of Toronto, Toronto,
ON, Canada, in 1979.
He is currently a Professor of electrical engineer-
ing at the Indian Institute of Technology Kanpur,
Kanpur, India. From 1970 to 1973, he was with the
General Electric Company of India Ltd., Calcutta,
India. His research interests include power electron-
ics, circuits, digital electronics, and microprocessor
systems.