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Analysis and Design Considerations of a Buck Converter with a Hysteretic PWM Controller
Takashi Nabeshima, Ternkazu Sat0 Oita University Oita, Japan Email: nabesima@eee.oita-u.ac.jp
Shinichi Yoshida, Shin Chiba and Kenichi Onda Renesas Technology Corp. Takasaki, Japan Email: yoshida.shinichi@enesas.com
Abstract-This paper presents an analysis and design considerations of a buck converter with a hysteretic PWM controller consists only of a comparator with a hysteresis. The ramp voltage superimposed on the output is supplied the comparator from a simple RC network connected in parallel to the inductor winding. The steady-state output voltage and the switching frequency are initially examined taking the propagation delay in the control circuit into account Next, the transfer functions of the output voltage for the input voltage and the load current are analyzed. The transient response of the output voltage for the step load change is also investigated by using the state equation. Furthermore, the design of the time constant of RC network as a key parameter is discussed.
1.
signal is similar to the inductor current [ 11-[3]. The control circuit consists only of a comparator with a hysteresis and neither error amplifier nor a clock generator is used. The control signal voltage supplied to the comparator is obtained from a simple RC network connected to the inductor winding. The steady-state output voltage and the switching frequency are initially examined taking the propagation delay in the controller into account. The dynamic characteristics is then analyzed both in frequency and time domains. These results are verified by the experiments. In addition, the design method is discussed focusing on the time constant of the RC network.
INTRODUCTION
1. 1
The convergence of computing and communications is happening on both the signal and the power path. In addition, rapid progress of integrated technology results a downward proliferation of power supply voltages from the old 5 V to 3.2 V, 2.5 V, 1.5 V and so on. When a several loads, such as MPUs, memories or chip sets, require well regulated supply voltages, a voltage regulator module (VRM) or a point-ofload (POL) converter is generally used for each single load. For high performance MPUs such as the latest Intel Pentium, the supply current exceeds SO A. Furthermore the power supply maintain the regulated output under high load current slew rate. To meat the above demands, a multiphase interleaved buck converters have been widely used. The main reasons to use the multiphase converter is to minimize the inductance not only to improve the speed of transient response but also to reduce the ripple current in the output capacitor. For other loads, on the other hand, such as memories or chip sets, they generally need the supply current less than 20 A. In such a case, a single phase converter is sufficiently able to distribute the regulated power to the load without paralleling the switching devices. Most of such a power supply connected to the power bus is composed by a nonisolated buck converter and is called POL converter. This paper presents an analysis and design considerations ofthe buck converter controlled by hysteretic PWM method. This control method has the advantage of fast transient response because of no delay and limitations on the duty cycle in ideal case. Moreover, this controlled method is quite stable without phase compensation since its control
Figure 1 shows the basic circuit configuration of the buck converter with a hysteretic PWM controller. The control circuit consists only of the hysteretic comparator and the drive circuit and neither error amplifier nor external clock signal is necessary. Furthermore, since there is no phase delay due to a high-gain operational amplifier, any phase compensation circuit to improve the dynamic performance of the regulator is no longer necessary. The control input voltage of the comparator v p is obtained through the RC network as a sum of the output voltage vo and the voltage vcfacross the capacitor CJ The voltage waveforms of vfi and the cornparator output Vp are illustrated in Fig.2. When the voltage vfi reaches the
171 I
VP
on
Off
Off
I T
0
I .......
IO
.. .. . , ... .... .. .. . .
.. . .... ,. . . .. ..
. ... . .. ..
,
1 W
3w
Tc [PI
Fig. 4 Switching frequency& for time musfant T,. (K:=5V. V= I .5V, Td,= ISOnS, T d q =15011s) .
threshold voltage V, during turn-off period of the high-side V, switch QH., changes to high level until v p reaches an upper voltage threshold of VitVh. Thereafter, the output of the comparator V, again changes to low level. A. Sieady Slate Output Voltage When the hysteresis window voltage Vh is much smaller than the input voltage, the slope of vp is nearly constant and is determined by the integrated voltage across the inductor winding. When the parasitic resistance rL exists in the winding, the voltage drop of rL due to the inductor 5urrent appears on the voltage vcfas a dc component. Therefore, the steady-state output voltage V, is expressed as
When the propagation d d a y in the controller circuit is not negligibly small, this value affects the switching frequency. Figure 3 shows the voltage waveforms o f v p and the drive signals of the switching transistor QH. The delay in the control circuit reduces the switching frequency and increase of the voltage v C j By taking the time delay at the turn on and turn off into account, the actual switching frequency is
where Td,,, and Tdoff are the turn-on and turn-off delays, respectively. The anal!itical and experimental results of the switching frequencies for the time constant Tc are shown in Fig.4. The switching frequency is more affected by the propagation delay for the smaller value of Tc.
111.
VO = v r + - 1 h - lil, v
2
0)
The control characteri:itics of the hysteretic PWM method is essentially different from the conventional one. Especially the control to output transfer function is important since it affects the dynamic characteristics of the regulator system.
The steady-state error voltage only depends on the parasitic resistance rr and is independent of the other resistive components in the converter circuit.
B. Switching Frequency The control circuit has no clock signal and the switching frequency is determined by the slope of the voltage v p and the voltage of the hysteresis window Vh. The slope of vy, is obtained from the time constant of the RC network and the voltage across the winding. The switching frequency h in the ideal case is expressed as follows.
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Aachen, C e m n y , 2004
Rf
Cf
Fig. 6 Voltage waveform of vfi and Comparator output when v, changes linearly.
I+sZ
(4)
As can he seen from (9), the above transfer function has a derivative characteristics and its coefficient is proportional to the time constant T,. This means the stability of the converter is quite excellent without introducing any phase compensation. In addition, the hysteresis window voltage Vh does not affect to the transfer function at all.
(5)
E. Audiosuscepfibility
It is obvious that the off time of the presented control method in one switching cycle is a hnction of the output voltage and the time constant Te. Hence the change of the input voltage only affects the on time. The equivalent circuit for the input voltage change AV; is shown in Fig. 7. When AV; changes in step, AV@ is approximated as follows:
(6)
Figure 6 shows the voltage waveforms of v p and the output of the comparator in one switching cycle where the solid line illustrates the steady state. When the output voltage vanes as a ramp function of at, the slope of vfi during the on state of the switch QH increases a, and decreases a during the off time as shown by dotted line. Therefore the new on time T6" and the off time T'glfin this case are
-- Z t ,
Avi
(10)
When the step change of the input voltage occurs during the off state of the switch QH, the slope of the voltage waveform of A v p changes only in on state as shown in Fig. 8. The on time . is then ; ' 7
From Fig. 8 and (1 I), the variation of the duty ratio AD is obtained
K(s)
& & !
AV&)
= -g s .
r4
(9)
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l+pLj$d
__ Vi =
2s
Fig. 9 Bolck diagram of converterd t h hysteretic PWM wntmlln.
negligibly small, the block diagram of the converter including the hysteretic PWM controller is shown in Fig. 9. The transfer function G(s) in this figure is given by
100
Ik
IOk
frequency [Hz]
look
Fig.10 Gain chmcteristicr of open loop -fer function where dotted line indicates ViC(s). (L=0.45pH, c-sOo$, vi=5v, v0=1.5v)
where
As seen from the block diagram, the feedforward pass from the input to the duty control eliminates the effect of the input voltage variation. Hence, the output voltage is not influenced by the fluctuation of the input voltage at all.
C. Output Impedance It is well known that the output impedance of the converter has resonance peak due to the LC resonance of the filter circuit. This resonance causes a large overshoot and undershoot voltages on the output for the load changes. The frequency response of the output impedance Z&) is examined from the small signal analysis by using the transfer functions in Fig. 9 as
100
lk
LOk
1OOk
Frequency [Hz]
Fig.] 1 Frequency chiucteristics of output impedance for T. , (L+.45pH, C=500pF, Yh=3OmV, r~=2&)
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. . . . . . .. .. .... ... ,. . . . .
'
. : .2 , w . . . . . . . . . . . . . . . ... .. .. . . . ...... . .. .. . . . . . .
(a) experimentalresults
Fig.5 Transient waveforms of vo for step load change boom 2.4 to 17A wt current slew rate of 30Nps taking ih time constant T a a parameter. (Vh = 3 b V , L = 0.45flH, C = 500pF. Vi = 5v, v = 1.sv) , s ,
during the on-state and the off-state of the switch Q,, as follows:
Transient waveforms for the step load change from heavy load to light load are not shown here since both waveforms are almost symmetrical.
IV.
DESIGN CONSIDERATION
v,
v,
+ ciL
The coefficients b , and b, in the on state are l / L and UTc, respectively while both are zero in the off state. The theoretical predictions of the transient responses for the step change of the load resistance R are performed by step-by-step numerical calculation applying Runge-Kutta method to the state equation (15). Approximated initial conditions of each variable are easily obtained from the steady-state analysis and then the computation time is much shorter than the use of conventional simulation programs such as SPICE. Theoretical and experimental transient responses of the output voltage are compared in Fig. 12 for the case that the load current changes from 2A to 17A with current threwrate of 30Aiys. All experiments were implemented by a synchronous buck converter using a hysteretic PWM controller HA16167 (Renesas Tech.) having 300ns total propagation delay. It is observed that the undershoot voltage is well decreased with increase of Tc and both results show very good agreement. The effect of derivative control characteristics appears on the iransient voltage after its peak.
The minimum output transient peak voltage for the load change is limited by the ratio of LIC of the filter circuit [4] and independent of the switching frequency. In addition, high-frequency loop gain, which mainly depends on the PWM control characteristics, also affects the transient performance. The open loop gain employing the hysteretic PWM controller is a function of the time constant T, as shown in Fig. IO. It is obvious that the larger value of Tc increases the higher open loop gain. Generally the transfer function C(s) in Fig. 9 has a conjugate complex pole. This nieaus the response of the converter itself is oscillative. By applying the hysteretic controller to the converter, the roots of the characteristic equation is changed to real from complex at certain value of T,. This critical damping condition of the time constant T,, is obtained by the open loop transfer function as
(-) r,= 2 1 6
w,
T, used in the experiment is 30ys. It is preferable to choose the time constant larger than T, from the view point ofthe transient performance. On the other hand, the increase of Tc decreases the switching frequency as expressed in (2). This causes an increase of the ripple current in the output capacitor and the
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ripple voltage on the output. Therefore the allowable maximum value of T, is limited by the specified conditions stated above. Especially when using the output capacitor having relatively large ESR, the ripple voltage is no longer reduced by the increase of capacitance. The choice of Tc is a trade-off between the transient performance and the ripple voltage. To overcome this trade-off, the hysteresis window voltage Vh and the propagation delay in the control circuit should be smaller as possible.
V.
CONCLUSION
Steady-state operations and the dynamic characteristics of the buck converter controlled by a hysteretic PWM method have been presented. From the frequency domain and the time domain analyses, this control method essentially has a derivative control characteristics. In addition, a feedfonvard control pass from the input voltage to the duty control completely eliminates the influence of input voltage fluchiations. The time constant of the RC network connected to the inductor is the most important parameter to improve the transient response and the hysteresis window voltage does not affect the transient behavior. However, the switching frequency is decreased by increasing these values. The reduction of the hysteresis window voltage becomes important key to solve both problems.
REFERENCES
[I]
R. Mihkhutdinov, Analysis and Optimization of Synchronous Buck Converter at High Slew-Rate Load Current Transients. hoc. of Power Electronics Specialists Conference, 2W0, pp.714-720.
[2]
W.Huang,ANou Control for Multi-phase Buck Converter with Fast Transient Response, Roc. of Applied Power Electronics Conference, 2001, pp.273-279.
R. Rcdl, B. P. Erisman and 2. Zansky, Wptimizing the Load Transient Response of the Buck Converter, Pmc. of Applied Power Electronics Conference. 1998, pp.170-176.
[3]
[4]
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